1 // SPDX-License-Identifier: GPL-2.0-only 2 /* Copyright (C) 2023 Intel Corporation */ 3 4 #include <net/libeth/rx.h> 5 #include <net/libeth/tx.h> 6 7 #include "idpf.h" 8 #include "idpf_ptp.h" 9 #include "idpf_virtchnl.h" 10 11 #define idpf_tx_buf_next(buf) (*(u32 *)&(buf)->priv) 12 LIBETH_SQE_CHECK_PRIV(u32); 13 14 /** 15 * idpf_chk_linearize - Check if skb exceeds max descriptors per packet 16 * @skb: send buffer 17 * @max_bufs: maximum scatter gather buffers for single packet 18 * @count: number of buffers this packet needs 19 * 20 * Make sure we don't exceed maximum scatter gather buffers for a single 21 * packet. 22 * TSO case has been handled earlier from idpf_features_check(). 23 */ 24 static bool idpf_chk_linearize(const struct sk_buff *skb, 25 unsigned int max_bufs, 26 unsigned int count) 27 { 28 if (likely(count <= max_bufs)) 29 return false; 30 31 if (skb_is_gso(skb)) 32 return false; 33 34 return true; 35 } 36 37 /** 38 * idpf_tx_timeout - Respond to a Tx Hang 39 * @netdev: network interface device structure 40 * @txqueue: TX queue 41 */ 42 void idpf_tx_timeout(struct net_device *netdev, unsigned int txqueue) 43 { 44 struct idpf_adapter *adapter = idpf_netdev_to_adapter(netdev); 45 46 adapter->tx_timeout_count++; 47 48 netdev_err(netdev, "Detected Tx timeout: Count %d, Queue %d\n", 49 adapter->tx_timeout_count, txqueue); 50 if (!idpf_is_reset_in_prog(adapter)) { 51 set_bit(IDPF_HR_FUNC_RESET, adapter->flags); 52 queue_delayed_work(adapter->vc_event_wq, 53 &adapter->vc_event_task, 54 msecs_to_jiffies(10)); 55 } 56 } 57 58 /** 59 * idpf_tx_buf_rel_all - Free any empty Tx buffers 60 * @txq: queue to be cleaned 61 */ 62 static void idpf_tx_buf_rel_all(struct idpf_tx_queue *txq) 63 { 64 struct libeth_sq_napi_stats ss = { }; 65 struct libeth_cq_pp cp = { 66 .dev = txq->dev, 67 .ss = &ss, 68 }; 69 u32 i; 70 71 /* Buffers already cleared, nothing to do */ 72 if (!txq->tx_buf) 73 return; 74 75 /* Free all the Tx buffer sk_buffs */ 76 for (i = 0; i < txq->buf_pool_size; i++) 77 libeth_tx_complete(&txq->tx_buf[i], &cp); 78 79 kfree(txq->tx_buf); 80 txq->tx_buf = NULL; 81 } 82 83 /** 84 * idpf_tx_desc_rel - Free Tx resources per queue 85 * @txq: Tx descriptor ring for a specific queue 86 * 87 * Free all transmit software resources 88 */ 89 static void idpf_tx_desc_rel(struct idpf_tx_queue *txq) 90 { 91 idpf_tx_buf_rel_all(txq); 92 netdev_tx_reset_subqueue(txq->netdev, txq->idx); 93 94 if (!txq->desc_ring) 95 return; 96 97 if (txq->refillq) 98 kfree(txq->refillq->ring); 99 100 dmam_free_coherent(txq->dev, txq->size, txq->desc_ring, txq->dma); 101 txq->desc_ring = NULL; 102 txq->next_to_use = 0; 103 txq->next_to_clean = 0; 104 } 105 106 /** 107 * idpf_compl_desc_rel - Free completion resources per queue 108 * @complq: completion queue 109 * 110 * Free all completion software resources. 111 */ 112 static void idpf_compl_desc_rel(struct idpf_compl_queue *complq) 113 { 114 if (!complq->comp) 115 return; 116 117 dma_free_coherent(complq->netdev->dev.parent, complq->size, 118 complq->comp, complq->dma); 119 complq->comp = NULL; 120 complq->next_to_use = 0; 121 complq->next_to_clean = 0; 122 } 123 124 /** 125 * idpf_tx_desc_rel_all - Free Tx Resources for All Queues 126 * @vport: virtual port structure 127 * 128 * Free all transmit software resources 129 */ 130 static void idpf_tx_desc_rel_all(struct idpf_vport *vport) 131 { 132 int i, j; 133 134 if (!vport->txq_grps) 135 return; 136 137 for (i = 0; i < vport->num_txq_grp; i++) { 138 struct idpf_txq_group *txq_grp = &vport->txq_grps[i]; 139 140 for (j = 0; j < txq_grp->num_txq; j++) 141 idpf_tx_desc_rel(txq_grp->txqs[j]); 142 143 if (idpf_is_queue_model_split(vport->txq_model)) 144 idpf_compl_desc_rel(txq_grp->complq); 145 } 146 } 147 148 /** 149 * idpf_tx_buf_alloc_all - Allocate memory for all buffer resources 150 * @tx_q: queue for which the buffers are allocated 151 * 152 * Returns 0 on success, negative on failure 153 */ 154 static int idpf_tx_buf_alloc_all(struct idpf_tx_queue *tx_q) 155 { 156 /* Allocate book keeping buffers only. Buffers to be supplied to HW 157 * are allocated by kernel network stack and received as part of skb 158 */ 159 if (idpf_queue_has(FLOW_SCH_EN, tx_q)) 160 tx_q->buf_pool_size = U16_MAX; 161 else 162 tx_q->buf_pool_size = tx_q->desc_count; 163 tx_q->tx_buf = kcalloc(tx_q->buf_pool_size, sizeof(*tx_q->tx_buf), 164 GFP_KERNEL); 165 if (!tx_q->tx_buf) 166 return -ENOMEM; 167 168 return 0; 169 } 170 171 /** 172 * idpf_tx_desc_alloc - Allocate the Tx descriptors 173 * @vport: vport to allocate resources for 174 * @tx_q: the tx ring to set up 175 * 176 * Returns 0 on success, negative on failure 177 */ 178 static int idpf_tx_desc_alloc(const struct idpf_vport *vport, 179 struct idpf_tx_queue *tx_q) 180 { 181 struct device *dev = tx_q->dev; 182 struct idpf_sw_queue *refillq; 183 int err; 184 185 err = idpf_tx_buf_alloc_all(tx_q); 186 if (err) 187 goto err_alloc; 188 189 tx_q->size = tx_q->desc_count * sizeof(*tx_q->base_tx); 190 191 /* Allocate descriptors also round up to nearest 4K */ 192 tx_q->size = ALIGN(tx_q->size, 4096); 193 tx_q->desc_ring = dmam_alloc_coherent(dev, tx_q->size, &tx_q->dma, 194 GFP_KERNEL); 195 if (!tx_q->desc_ring) { 196 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring, size=%d\n", 197 tx_q->size); 198 err = -ENOMEM; 199 goto err_alloc; 200 } 201 202 tx_q->next_to_use = 0; 203 tx_q->next_to_clean = 0; 204 idpf_queue_set(GEN_CHK, tx_q); 205 206 if (!idpf_queue_has(FLOW_SCH_EN, tx_q)) 207 return 0; 208 209 refillq = tx_q->refillq; 210 refillq->desc_count = tx_q->buf_pool_size; 211 refillq->ring = kcalloc(refillq->desc_count, sizeof(u32), 212 GFP_KERNEL); 213 if (!refillq->ring) { 214 err = -ENOMEM; 215 goto err_alloc; 216 } 217 218 for (unsigned int i = 0; i < refillq->desc_count; i++) 219 refillq->ring[i] = 220 FIELD_PREP(IDPF_RFL_BI_BUFID_M, i) | 221 FIELD_PREP(IDPF_RFL_BI_GEN_M, 222 idpf_queue_has(GEN_CHK, refillq)); 223 224 /* Go ahead and flip the GEN bit since this counts as filling 225 * up the ring, i.e. we already ring wrapped. 226 */ 227 idpf_queue_change(GEN_CHK, refillq); 228 229 tx_q->last_re = tx_q->desc_count - IDPF_TX_SPLITQ_RE_MIN_GAP; 230 231 return 0; 232 233 err_alloc: 234 idpf_tx_desc_rel(tx_q); 235 236 return err; 237 } 238 239 /** 240 * idpf_compl_desc_alloc - allocate completion descriptors 241 * @vport: vport to allocate resources for 242 * @complq: completion queue to set up 243 * 244 * Return: 0 on success, -errno on failure. 245 */ 246 static int idpf_compl_desc_alloc(const struct idpf_vport *vport, 247 struct idpf_compl_queue *complq) 248 { 249 complq->size = array_size(complq->desc_count, sizeof(*complq->comp)); 250 251 complq->comp = dma_alloc_coherent(complq->netdev->dev.parent, 252 complq->size, &complq->dma, 253 GFP_KERNEL); 254 if (!complq->comp) 255 return -ENOMEM; 256 257 complq->next_to_use = 0; 258 complq->next_to_clean = 0; 259 idpf_queue_set(GEN_CHK, complq); 260 261 return 0; 262 } 263 264 /** 265 * idpf_tx_desc_alloc_all - allocate all queues Tx resources 266 * @vport: virtual port private structure 267 * 268 * Returns 0 on success, negative on failure 269 */ 270 static int idpf_tx_desc_alloc_all(struct idpf_vport *vport) 271 { 272 int err = 0; 273 int i, j; 274 275 /* Setup buffer queues. In single queue model buffer queues and 276 * completion queues will be same 277 */ 278 for (i = 0; i < vport->num_txq_grp; i++) { 279 for (j = 0; j < vport->txq_grps[i].num_txq; j++) { 280 struct idpf_tx_queue *txq = vport->txq_grps[i].txqs[j]; 281 282 err = idpf_tx_desc_alloc(vport, txq); 283 if (err) { 284 pci_err(vport->adapter->pdev, 285 "Allocation for Tx Queue %u failed\n", 286 i); 287 goto err_out; 288 } 289 } 290 291 if (!idpf_is_queue_model_split(vport->txq_model)) 292 continue; 293 294 /* Setup completion queues */ 295 err = idpf_compl_desc_alloc(vport, vport->txq_grps[i].complq); 296 if (err) { 297 pci_err(vport->adapter->pdev, 298 "Allocation for Tx Completion Queue %u failed\n", 299 i); 300 goto err_out; 301 } 302 } 303 304 err_out: 305 if (err) 306 idpf_tx_desc_rel_all(vport); 307 308 return err; 309 } 310 311 /** 312 * idpf_rx_page_rel - Release an rx buffer page 313 * @rx_buf: the buffer to free 314 */ 315 static void idpf_rx_page_rel(struct libeth_fqe *rx_buf) 316 { 317 if (unlikely(!rx_buf->netmem)) 318 return; 319 320 libeth_rx_recycle_slow(rx_buf->netmem); 321 322 rx_buf->netmem = 0; 323 rx_buf->offset = 0; 324 } 325 326 /** 327 * idpf_rx_hdr_buf_rel_all - Release header buffer memory 328 * @bufq: queue to use 329 */ 330 static void idpf_rx_hdr_buf_rel_all(struct idpf_buf_queue *bufq) 331 { 332 struct libeth_fq fq = { 333 .fqes = bufq->hdr_buf, 334 .pp = bufq->hdr_pp, 335 }; 336 337 for (u32 i = 0; i < bufq->desc_count; i++) 338 idpf_rx_page_rel(&bufq->hdr_buf[i]); 339 340 libeth_rx_fq_destroy(&fq); 341 bufq->hdr_buf = NULL; 342 bufq->hdr_pp = NULL; 343 } 344 345 /** 346 * idpf_rx_buf_rel_bufq - Free all Rx buffer resources for a buffer queue 347 * @bufq: queue to be cleaned 348 */ 349 static void idpf_rx_buf_rel_bufq(struct idpf_buf_queue *bufq) 350 { 351 struct libeth_fq fq = { 352 .fqes = bufq->buf, 353 .pp = bufq->pp, 354 }; 355 356 /* queue already cleared, nothing to do */ 357 if (!bufq->buf) 358 return; 359 360 /* Free all the bufs allocated and given to hw on Rx queue */ 361 for (u32 i = 0; i < bufq->desc_count; i++) 362 idpf_rx_page_rel(&bufq->buf[i]); 363 364 if (idpf_queue_has(HSPLIT_EN, bufq)) 365 idpf_rx_hdr_buf_rel_all(bufq); 366 367 libeth_rx_fq_destroy(&fq); 368 bufq->buf = NULL; 369 bufq->pp = NULL; 370 } 371 372 /** 373 * idpf_rx_buf_rel_all - Free all Rx buffer resources for a receive queue 374 * @rxq: queue to be cleaned 375 */ 376 static void idpf_rx_buf_rel_all(struct idpf_rx_queue *rxq) 377 { 378 struct libeth_fq fq = { 379 .fqes = rxq->rx_buf, 380 .pp = rxq->pp, 381 }; 382 383 if (!rxq->rx_buf) 384 return; 385 386 for (u32 i = 0; i < rxq->desc_count; i++) 387 idpf_rx_page_rel(&rxq->rx_buf[i]); 388 389 libeth_rx_fq_destroy(&fq); 390 rxq->rx_buf = NULL; 391 rxq->pp = NULL; 392 } 393 394 /** 395 * idpf_rx_desc_rel - Free a specific Rx q resources 396 * @rxq: queue to clean the resources from 397 * @dev: device to free DMA memory 398 * @model: single or split queue model 399 * 400 * Free a specific rx queue resources 401 */ 402 static void idpf_rx_desc_rel(struct idpf_rx_queue *rxq, struct device *dev, 403 u32 model) 404 { 405 if (!rxq) 406 return; 407 408 if (rxq->skb) { 409 dev_kfree_skb_any(rxq->skb); 410 rxq->skb = NULL; 411 } 412 413 if (!idpf_is_queue_model_split(model)) 414 idpf_rx_buf_rel_all(rxq); 415 416 rxq->next_to_alloc = 0; 417 rxq->next_to_clean = 0; 418 rxq->next_to_use = 0; 419 if (!rxq->desc_ring) 420 return; 421 422 dmam_free_coherent(dev, rxq->size, rxq->desc_ring, rxq->dma); 423 rxq->desc_ring = NULL; 424 } 425 426 /** 427 * idpf_rx_desc_rel_bufq - free buffer queue resources 428 * @bufq: buffer queue to clean the resources from 429 * @dev: device to free DMA memory 430 */ 431 static void idpf_rx_desc_rel_bufq(struct idpf_buf_queue *bufq, 432 struct device *dev) 433 { 434 if (!bufq) 435 return; 436 437 idpf_rx_buf_rel_bufq(bufq); 438 439 bufq->next_to_alloc = 0; 440 bufq->next_to_clean = 0; 441 bufq->next_to_use = 0; 442 443 if (!bufq->split_buf) 444 return; 445 446 dma_free_coherent(dev, bufq->size, bufq->split_buf, bufq->dma); 447 bufq->split_buf = NULL; 448 } 449 450 /** 451 * idpf_rx_desc_rel_all - Free Rx Resources for All Queues 452 * @vport: virtual port structure 453 * 454 * Free all rx queues resources 455 */ 456 static void idpf_rx_desc_rel_all(struct idpf_vport *vport) 457 { 458 struct device *dev = &vport->adapter->pdev->dev; 459 struct idpf_rxq_group *rx_qgrp; 460 u16 num_rxq; 461 int i, j; 462 463 if (!vport->rxq_grps) 464 return; 465 466 for (i = 0; i < vport->num_rxq_grp; i++) { 467 rx_qgrp = &vport->rxq_grps[i]; 468 469 if (!idpf_is_queue_model_split(vport->rxq_model)) { 470 for (j = 0; j < rx_qgrp->singleq.num_rxq; j++) 471 idpf_rx_desc_rel(rx_qgrp->singleq.rxqs[j], dev, 472 VIRTCHNL2_QUEUE_MODEL_SINGLE); 473 continue; 474 } 475 476 num_rxq = rx_qgrp->splitq.num_rxq_sets; 477 for (j = 0; j < num_rxq; j++) 478 idpf_rx_desc_rel(&rx_qgrp->splitq.rxq_sets[j]->rxq, 479 dev, VIRTCHNL2_QUEUE_MODEL_SPLIT); 480 481 if (!rx_qgrp->splitq.bufq_sets) 482 continue; 483 484 for (j = 0; j < vport->num_bufqs_per_qgrp; j++) { 485 struct idpf_bufq_set *bufq_set = 486 &rx_qgrp->splitq.bufq_sets[j]; 487 488 idpf_rx_desc_rel_bufq(&bufq_set->bufq, dev); 489 } 490 } 491 } 492 493 /** 494 * idpf_rx_buf_hw_update - Store the new tail and head values 495 * @bufq: queue to bump 496 * @val: new head index 497 */ 498 static void idpf_rx_buf_hw_update(struct idpf_buf_queue *bufq, u32 val) 499 { 500 bufq->next_to_use = val; 501 502 if (unlikely(!bufq->tail)) 503 return; 504 505 /* writel has an implicit memory barrier */ 506 writel(val, bufq->tail); 507 } 508 509 /** 510 * idpf_rx_hdr_buf_alloc_all - Allocate memory for header buffers 511 * @bufq: ring to use 512 * 513 * Returns 0 on success, negative on failure. 514 */ 515 static int idpf_rx_hdr_buf_alloc_all(struct idpf_buf_queue *bufq) 516 { 517 struct libeth_fq fq = { 518 .count = bufq->desc_count, 519 .type = LIBETH_FQE_HDR, 520 .nid = idpf_q_vector_to_mem(bufq->q_vector), 521 }; 522 int ret; 523 524 ret = libeth_rx_fq_create(&fq, &bufq->q_vector->napi); 525 if (ret) 526 return ret; 527 528 bufq->hdr_pp = fq.pp; 529 bufq->hdr_buf = fq.fqes; 530 bufq->hdr_truesize = fq.truesize; 531 bufq->rx_hbuf_size = fq.buf_len; 532 533 return 0; 534 } 535 536 /** 537 * idpf_post_buf_refill - Post buffer id to refill queue 538 * @refillq: refill queue to post to 539 * @buf_id: buffer id to post 540 */ 541 static void idpf_post_buf_refill(struct idpf_sw_queue *refillq, u16 buf_id) 542 { 543 u32 nta = refillq->next_to_use; 544 545 /* store the buffer ID and the SW maintained GEN bit to the refillq */ 546 refillq->ring[nta] = 547 FIELD_PREP(IDPF_RFL_BI_BUFID_M, buf_id) | 548 FIELD_PREP(IDPF_RFL_BI_GEN_M, 549 idpf_queue_has(GEN_CHK, refillq)); 550 551 if (unlikely(++nta == refillq->desc_count)) { 552 nta = 0; 553 idpf_queue_change(GEN_CHK, refillq); 554 } 555 556 refillq->next_to_use = nta; 557 } 558 559 /** 560 * idpf_rx_post_buf_desc - Post buffer to bufq descriptor ring 561 * @bufq: buffer queue to post to 562 * @buf_id: buffer id to post 563 * 564 * Returns false if buffer could not be allocated, true otherwise. 565 */ 566 static bool idpf_rx_post_buf_desc(struct idpf_buf_queue *bufq, u16 buf_id) 567 { 568 struct virtchnl2_splitq_rx_buf_desc *splitq_rx_desc = NULL; 569 struct libeth_fq_fp fq = { 570 .count = bufq->desc_count, 571 }; 572 u16 nta = bufq->next_to_alloc; 573 dma_addr_t addr; 574 575 splitq_rx_desc = &bufq->split_buf[nta]; 576 577 if (idpf_queue_has(HSPLIT_EN, bufq)) { 578 fq.pp = bufq->hdr_pp; 579 fq.fqes = bufq->hdr_buf; 580 fq.truesize = bufq->hdr_truesize; 581 582 addr = libeth_rx_alloc(&fq, buf_id); 583 if (addr == DMA_MAPPING_ERROR) 584 return false; 585 586 splitq_rx_desc->hdr_addr = cpu_to_le64(addr); 587 } 588 589 fq.pp = bufq->pp; 590 fq.fqes = bufq->buf; 591 fq.truesize = bufq->truesize; 592 593 addr = libeth_rx_alloc(&fq, buf_id); 594 if (addr == DMA_MAPPING_ERROR) 595 return false; 596 597 splitq_rx_desc->pkt_addr = cpu_to_le64(addr); 598 splitq_rx_desc->qword0.buf_id = cpu_to_le16(buf_id); 599 600 nta++; 601 if (unlikely(nta == bufq->desc_count)) 602 nta = 0; 603 bufq->next_to_alloc = nta; 604 605 return true; 606 } 607 608 /** 609 * idpf_rx_post_init_bufs - Post initial buffers to bufq 610 * @bufq: buffer queue to post working set to 611 * @working_set: number of buffers to put in working set 612 * 613 * Returns true if @working_set bufs were posted successfully, false otherwise. 614 */ 615 static bool idpf_rx_post_init_bufs(struct idpf_buf_queue *bufq, 616 u16 working_set) 617 { 618 int i; 619 620 for (i = 0; i < working_set; i++) { 621 if (!idpf_rx_post_buf_desc(bufq, i)) 622 return false; 623 } 624 625 idpf_rx_buf_hw_update(bufq, ALIGN_DOWN(bufq->next_to_alloc, 626 IDPF_RX_BUF_STRIDE)); 627 628 return true; 629 } 630 631 /** 632 * idpf_rx_buf_alloc_singleq - Allocate memory for all buffer resources 633 * @rxq: queue for which the buffers are allocated 634 * 635 * Return: 0 on success, -ENOMEM on failure. 636 */ 637 static int idpf_rx_buf_alloc_singleq(struct idpf_rx_queue *rxq) 638 { 639 if (idpf_rx_singleq_buf_hw_alloc_all(rxq, rxq->desc_count - 1)) 640 goto err; 641 642 return 0; 643 644 err: 645 idpf_rx_buf_rel_all(rxq); 646 647 return -ENOMEM; 648 } 649 650 /** 651 * idpf_rx_bufs_init_singleq - Initialize page pool and allocate Rx bufs 652 * @rxq: buffer queue to create page pool for 653 * 654 * Return: 0 on success, -errno on failure. 655 */ 656 static int idpf_rx_bufs_init_singleq(struct idpf_rx_queue *rxq) 657 { 658 struct libeth_fq fq = { 659 .count = rxq->desc_count, 660 .type = LIBETH_FQE_MTU, 661 .nid = idpf_q_vector_to_mem(rxq->q_vector), 662 }; 663 int ret; 664 665 ret = libeth_rx_fq_create(&fq, &rxq->q_vector->napi); 666 if (ret) 667 return ret; 668 669 rxq->pp = fq.pp; 670 rxq->rx_buf = fq.fqes; 671 rxq->truesize = fq.truesize; 672 rxq->rx_buf_size = fq.buf_len; 673 674 return idpf_rx_buf_alloc_singleq(rxq); 675 } 676 677 /** 678 * idpf_rx_buf_alloc_all - Allocate memory for all buffer resources 679 * @rxbufq: queue for which the buffers are allocated 680 * 681 * Returns 0 on success, negative on failure 682 */ 683 static int idpf_rx_buf_alloc_all(struct idpf_buf_queue *rxbufq) 684 { 685 int err = 0; 686 687 if (idpf_queue_has(HSPLIT_EN, rxbufq)) { 688 err = idpf_rx_hdr_buf_alloc_all(rxbufq); 689 if (err) 690 goto rx_buf_alloc_all_out; 691 } 692 693 /* Allocate buffers to be given to HW. */ 694 if (!idpf_rx_post_init_bufs(rxbufq, IDPF_RX_BUFQ_WORKING_SET(rxbufq))) 695 err = -ENOMEM; 696 697 rx_buf_alloc_all_out: 698 if (err) 699 idpf_rx_buf_rel_bufq(rxbufq); 700 701 return err; 702 } 703 704 /** 705 * idpf_rx_bufs_init - Initialize page pool, allocate rx bufs, and post to HW 706 * @bufq: buffer queue to create page pool for 707 * @type: type of Rx buffers to allocate 708 * 709 * Returns 0 on success, negative on failure 710 */ 711 static int idpf_rx_bufs_init(struct idpf_buf_queue *bufq, 712 enum libeth_fqe_type type) 713 { 714 struct libeth_fq fq = { 715 .truesize = bufq->truesize, 716 .count = bufq->desc_count, 717 .type = type, 718 .hsplit = idpf_queue_has(HSPLIT_EN, bufq), 719 .nid = idpf_q_vector_to_mem(bufq->q_vector), 720 }; 721 int ret; 722 723 ret = libeth_rx_fq_create(&fq, &bufq->q_vector->napi); 724 if (ret) 725 return ret; 726 727 bufq->pp = fq.pp; 728 bufq->buf = fq.fqes; 729 bufq->truesize = fq.truesize; 730 bufq->rx_buf_size = fq.buf_len; 731 732 return idpf_rx_buf_alloc_all(bufq); 733 } 734 735 /** 736 * idpf_rx_bufs_init_all - Initialize all RX bufs 737 * @vport: virtual port struct 738 * 739 * Returns 0 on success, negative on failure 740 */ 741 int idpf_rx_bufs_init_all(struct idpf_vport *vport) 742 { 743 bool split = idpf_is_queue_model_split(vport->rxq_model); 744 int i, j, err; 745 746 for (i = 0; i < vport->num_rxq_grp; i++) { 747 struct idpf_rxq_group *rx_qgrp = &vport->rxq_grps[i]; 748 u32 truesize = 0; 749 750 /* Allocate bufs for the rxq itself in singleq */ 751 if (!split) { 752 int num_rxq = rx_qgrp->singleq.num_rxq; 753 754 for (j = 0; j < num_rxq; j++) { 755 struct idpf_rx_queue *q; 756 757 q = rx_qgrp->singleq.rxqs[j]; 758 err = idpf_rx_bufs_init_singleq(q); 759 if (err) 760 return err; 761 } 762 763 continue; 764 } 765 766 /* Otherwise, allocate bufs for the buffer queues */ 767 for (j = 0; j < vport->num_bufqs_per_qgrp; j++) { 768 enum libeth_fqe_type type; 769 struct idpf_buf_queue *q; 770 771 q = &rx_qgrp->splitq.bufq_sets[j].bufq; 772 q->truesize = truesize; 773 774 type = truesize ? LIBETH_FQE_SHORT : LIBETH_FQE_MTU; 775 776 err = idpf_rx_bufs_init(q, type); 777 if (err) 778 return err; 779 780 truesize = q->truesize >> 1; 781 } 782 } 783 784 return 0; 785 } 786 787 /** 788 * idpf_rx_desc_alloc - Allocate queue Rx resources 789 * @vport: vport to allocate resources for 790 * @rxq: Rx queue for which the resources are setup 791 * 792 * Returns 0 on success, negative on failure 793 */ 794 static int idpf_rx_desc_alloc(const struct idpf_vport *vport, 795 struct idpf_rx_queue *rxq) 796 { 797 struct device *dev = &vport->adapter->pdev->dev; 798 799 rxq->size = rxq->desc_count * sizeof(union virtchnl2_rx_desc); 800 801 /* Allocate descriptors and also round up to nearest 4K */ 802 rxq->size = ALIGN(rxq->size, 4096); 803 rxq->desc_ring = dmam_alloc_coherent(dev, rxq->size, 804 &rxq->dma, GFP_KERNEL); 805 if (!rxq->desc_ring) { 806 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring, size=%d\n", 807 rxq->size); 808 return -ENOMEM; 809 } 810 811 rxq->next_to_alloc = 0; 812 rxq->next_to_clean = 0; 813 rxq->next_to_use = 0; 814 idpf_queue_set(GEN_CHK, rxq); 815 816 return 0; 817 } 818 819 /** 820 * idpf_bufq_desc_alloc - Allocate buffer queue descriptor ring 821 * @vport: vport to allocate resources for 822 * @bufq: buffer queue for which the resources are set up 823 * 824 * Return: 0 on success, -ENOMEM on failure. 825 */ 826 static int idpf_bufq_desc_alloc(const struct idpf_vport *vport, 827 struct idpf_buf_queue *bufq) 828 { 829 struct device *dev = &vport->adapter->pdev->dev; 830 831 bufq->size = array_size(bufq->desc_count, sizeof(*bufq->split_buf)); 832 833 bufq->split_buf = dma_alloc_coherent(dev, bufq->size, &bufq->dma, 834 GFP_KERNEL); 835 if (!bufq->split_buf) 836 return -ENOMEM; 837 838 bufq->next_to_alloc = 0; 839 bufq->next_to_clean = 0; 840 bufq->next_to_use = 0; 841 842 idpf_queue_set(GEN_CHK, bufq); 843 844 return 0; 845 } 846 847 /** 848 * idpf_rx_desc_alloc_all - allocate all RX queues resources 849 * @vport: virtual port structure 850 * 851 * Returns 0 on success, negative on failure 852 */ 853 static int idpf_rx_desc_alloc_all(struct idpf_vport *vport) 854 { 855 struct idpf_rxq_group *rx_qgrp; 856 int i, j, err; 857 u16 num_rxq; 858 859 for (i = 0; i < vport->num_rxq_grp; i++) { 860 rx_qgrp = &vport->rxq_grps[i]; 861 if (idpf_is_queue_model_split(vport->rxq_model)) 862 num_rxq = rx_qgrp->splitq.num_rxq_sets; 863 else 864 num_rxq = rx_qgrp->singleq.num_rxq; 865 866 for (j = 0; j < num_rxq; j++) { 867 struct idpf_rx_queue *q; 868 869 if (idpf_is_queue_model_split(vport->rxq_model)) 870 q = &rx_qgrp->splitq.rxq_sets[j]->rxq; 871 else 872 q = rx_qgrp->singleq.rxqs[j]; 873 874 err = idpf_rx_desc_alloc(vport, q); 875 if (err) { 876 pci_err(vport->adapter->pdev, 877 "Memory allocation for Rx Queue %u failed\n", 878 i); 879 goto err_out; 880 } 881 } 882 883 if (!idpf_is_queue_model_split(vport->rxq_model)) 884 continue; 885 886 for (j = 0; j < vport->num_bufqs_per_qgrp; j++) { 887 struct idpf_buf_queue *q; 888 889 q = &rx_qgrp->splitq.bufq_sets[j].bufq; 890 891 err = idpf_bufq_desc_alloc(vport, q); 892 if (err) { 893 pci_err(vport->adapter->pdev, 894 "Memory allocation for Rx Buffer Queue %u failed\n", 895 i); 896 goto err_out; 897 } 898 } 899 } 900 901 return 0; 902 903 err_out: 904 idpf_rx_desc_rel_all(vport); 905 906 return err; 907 } 908 909 /** 910 * idpf_txq_group_rel - Release all resources for txq groups 911 * @vport: vport to release txq groups on 912 */ 913 static void idpf_txq_group_rel(struct idpf_vport *vport) 914 { 915 bool split, flow_sch_en; 916 int i, j; 917 918 if (!vport->txq_grps) 919 return; 920 921 split = idpf_is_queue_model_split(vport->txq_model); 922 flow_sch_en = !idpf_is_cap_ena(vport->adapter, IDPF_OTHER_CAPS, 923 VIRTCHNL2_CAP_SPLITQ_QSCHED); 924 925 for (i = 0; i < vport->num_txq_grp; i++) { 926 struct idpf_txq_group *txq_grp = &vport->txq_grps[i]; 927 928 for (j = 0; j < txq_grp->num_txq; j++) { 929 if (flow_sch_en) { 930 kfree(txq_grp->txqs[j]->refillq); 931 txq_grp->txqs[j]->refillq = NULL; 932 } 933 934 kfree(txq_grp->txqs[j]); 935 txq_grp->txqs[j] = NULL; 936 } 937 938 if (!split) 939 continue; 940 941 kfree(txq_grp->complq); 942 txq_grp->complq = NULL; 943 } 944 kfree(vport->txq_grps); 945 vport->txq_grps = NULL; 946 } 947 948 /** 949 * idpf_rxq_sw_queue_rel - Release software queue resources 950 * @rx_qgrp: rx queue group with software queues 951 */ 952 static void idpf_rxq_sw_queue_rel(struct idpf_rxq_group *rx_qgrp) 953 { 954 int i, j; 955 956 for (i = 0; i < rx_qgrp->vport->num_bufqs_per_qgrp; i++) { 957 struct idpf_bufq_set *bufq_set = &rx_qgrp->splitq.bufq_sets[i]; 958 959 for (j = 0; j < bufq_set->num_refillqs; j++) { 960 kfree(bufq_set->refillqs[j].ring); 961 bufq_set->refillqs[j].ring = NULL; 962 } 963 kfree(bufq_set->refillqs); 964 bufq_set->refillqs = NULL; 965 } 966 } 967 968 /** 969 * idpf_rxq_group_rel - Release all resources for rxq groups 970 * @vport: vport to release rxq groups on 971 */ 972 static void idpf_rxq_group_rel(struct idpf_vport *vport) 973 { 974 int i; 975 976 if (!vport->rxq_grps) 977 return; 978 979 for (i = 0; i < vport->num_rxq_grp; i++) { 980 struct idpf_rxq_group *rx_qgrp = &vport->rxq_grps[i]; 981 u16 num_rxq; 982 int j; 983 984 if (idpf_is_queue_model_split(vport->rxq_model)) { 985 num_rxq = rx_qgrp->splitq.num_rxq_sets; 986 for (j = 0; j < num_rxq; j++) { 987 kfree(rx_qgrp->splitq.rxq_sets[j]); 988 rx_qgrp->splitq.rxq_sets[j] = NULL; 989 } 990 991 idpf_rxq_sw_queue_rel(rx_qgrp); 992 kfree(rx_qgrp->splitq.bufq_sets); 993 rx_qgrp->splitq.bufq_sets = NULL; 994 } else { 995 num_rxq = rx_qgrp->singleq.num_rxq; 996 for (j = 0; j < num_rxq; j++) { 997 kfree(rx_qgrp->singleq.rxqs[j]); 998 rx_qgrp->singleq.rxqs[j] = NULL; 999 } 1000 } 1001 } 1002 kfree(vport->rxq_grps); 1003 vport->rxq_grps = NULL; 1004 } 1005 1006 /** 1007 * idpf_vport_queue_grp_rel_all - Release all queue groups 1008 * @vport: vport to release queue groups for 1009 */ 1010 static void idpf_vport_queue_grp_rel_all(struct idpf_vport *vport) 1011 { 1012 idpf_txq_group_rel(vport); 1013 idpf_rxq_group_rel(vport); 1014 } 1015 1016 /** 1017 * idpf_vport_queues_rel - Free memory for all queues 1018 * @vport: virtual port 1019 * 1020 * Free the memory allocated for queues associated to a vport 1021 */ 1022 void idpf_vport_queues_rel(struct idpf_vport *vport) 1023 { 1024 idpf_tx_desc_rel_all(vport); 1025 idpf_rx_desc_rel_all(vport); 1026 idpf_vport_queue_grp_rel_all(vport); 1027 1028 kfree(vport->txqs); 1029 vport->txqs = NULL; 1030 } 1031 1032 /** 1033 * idpf_vport_init_fast_path_txqs - Initialize fast path txq array 1034 * @vport: vport to init txqs on 1035 * 1036 * We get a queue index from skb->queue_mapping and we need a fast way to 1037 * dereference the queue from queue groups. This allows us to quickly pull a 1038 * txq based on a queue index. 1039 * 1040 * Returns 0 on success, negative on failure 1041 */ 1042 static int idpf_vport_init_fast_path_txqs(struct idpf_vport *vport) 1043 { 1044 struct idpf_ptp_vport_tx_tstamp_caps *caps = vport->tx_tstamp_caps; 1045 struct work_struct *tstamp_task = &vport->tstamp_task; 1046 int i, j, k = 0; 1047 1048 vport->txqs = kcalloc(vport->num_txq, sizeof(*vport->txqs), 1049 GFP_KERNEL); 1050 1051 if (!vport->txqs) 1052 return -ENOMEM; 1053 1054 for (i = 0; i < vport->num_txq_grp; i++) { 1055 struct idpf_txq_group *tx_grp = &vport->txq_grps[i]; 1056 1057 for (j = 0; j < tx_grp->num_txq; j++, k++) { 1058 vport->txqs[k] = tx_grp->txqs[j]; 1059 vport->txqs[k]->idx = k; 1060 1061 if (!caps) 1062 continue; 1063 1064 vport->txqs[k]->cached_tstamp_caps = caps; 1065 vport->txqs[k]->tstamp_task = tstamp_task; 1066 } 1067 } 1068 1069 return 0; 1070 } 1071 1072 /** 1073 * idpf_vport_init_num_qs - Initialize number of queues 1074 * @vport: vport to initialize queues 1075 * @vport_msg: data to be filled into vport 1076 */ 1077 void idpf_vport_init_num_qs(struct idpf_vport *vport, 1078 struct virtchnl2_create_vport *vport_msg) 1079 { 1080 struct idpf_vport_user_config_data *config_data; 1081 u16 idx = vport->idx; 1082 1083 config_data = &vport->adapter->vport_config[idx]->user_config; 1084 vport->num_txq = le16_to_cpu(vport_msg->num_tx_q); 1085 vport->num_rxq = le16_to_cpu(vport_msg->num_rx_q); 1086 /* number of txqs and rxqs in config data will be zeros only in the 1087 * driver load path and we dont update them there after 1088 */ 1089 if (!config_data->num_req_tx_qs && !config_data->num_req_rx_qs) { 1090 config_data->num_req_tx_qs = le16_to_cpu(vport_msg->num_tx_q); 1091 config_data->num_req_rx_qs = le16_to_cpu(vport_msg->num_rx_q); 1092 } 1093 1094 if (idpf_is_queue_model_split(vport->txq_model)) 1095 vport->num_complq = le16_to_cpu(vport_msg->num_tx_complq); 1096 if (idpf_is_queue_model_split(vport->rxq_model)) 1097 vport->num_bufq = le16_to_cpu(vport_msg->num_rx_bufq); 1098 1099 /* Adjust number of buffer queues per Rx queue group. */ 1100 if (!idpf_is_queue_model_split(vport->rxq_model)) { 1101 vport->num_bufqs_per_qgrp = 0; 1102 1103 return; 1104 } 1105 1106 vport->num_bufqs_per_qgrp = IDPF_MAX_BUFQS_PER_RXQ_GRP; 1107 } 1108 1109 /** 1110 * idpf_vport_calc_num_q_desc - Calculate number of queue groups 1111 * @vport: vport to calculate q groups for 1112 */ 1113 void idpf_vport_calc_num_q_desc(struct idpf_vport *vport) 1114 { 1115 struct idpf_vport_user_config_data *config_data; 1116 int num_bufqs = vport->num_bufqs_per_qgrp; 1117 u32 num_req_txq_desc, num_req_rxq_desc; 1118 u16 idx = vport->idx; 1119 int i; 1120 1121 config_data = &vport->adapter->vport_config[idx]->user_config; 1122 num_req_txq_desc = config_data->num_req_txq_desc; 1123 num_req_rxq_desc = config_data->num_req_rxq_desc; 1124 1125 vport->complq_desc_count = 0; 1126 if (num_req_txq_desc) { 1127 vport->txq_desc_count = num_req_txq_desc; 1128 if (idpf_is_queue_model_split(vport->txq_model)) { 1129 vport->complq_desc_count = num_req_txq_desc; 1130 if (vport->complq_desc_count < IDPF_MIN_TXQ_COMPLQ_DESC) 1131 vport->complq_desc_count = 1132 IDPF_MIN_TXQ_COMPLQ_DESC; 1133 } 1134 } else { 1135 vport->txq_desc_count = IDPF_DFLT_TX_Q_DESC_COUNT; 1136 if (idpf_is_queue_model_split(vport->txq_model)) 1137 vport->complq_desc_count = 1138 IDPF_DFLT_TX_COMPLQ_DESC_COUNT; 1139 } 1140 1141 if (num_req_rxq_desc) 1142 vport->rxq_desc_count = num_req_rxq_desc; 1143 else 1144 vport->rxq_desc_count = IDPF_DFLT_RX_Q_DESC_COUNT; 1145 1146 for (i = 0; i < num_bufqs; i++) { 1147 if (!vport->bufq_desc_count[i]) 1148 vport->bufq_desc_count[i] = 1149 IDPF_RX_BUFQ_DESC_COUNT(vport->rxq_desc_count, 1150 num_bufqs); 1151 } 1152 } 1153 1154 /** 1155 * idpf_vport_calc_total_qs - Calculate total number of queues 1156 * @adapter: private data struct 1157 * @vport_idx: vport idx to retrieve vport pointer 1158 * @vport_msg: message to fill with data 1159 * @max_q: vport max queue info 1160 * 1161 * Return 0 on success, error value on failure. 1162 */ 1163 int idpf_vport_calc_total_qs(struct idpf_adapter *adapter, u16 vport_idx, 1164 struct virtchnl2_create_vport *vport_msg, 1165 struct idpf_vport_max_q *max_q) 1166 { 1167 int dflt_splitq_txq_grps = 0, dflt_singleq_txqs = 0; 1168 int dflt_splitq_rxq_grps = 0, dflt_singleq_rxqs = 0; 1169 u16 num_req_tx_qs = 0, num_req_rx_qs = 0; 1170 struct idpf_vport_config *vport_config; 1171 u16 num_txq_grps, num_rxq_grps; 1172 u32 num_qs; 1173 1174 vport_config = adapter->vport_config[vport_idx]; 1175 if (vport_config) { 1176 num_req_tx_qs = vport_config->user_config.num_req_tx_qs; 1177 num_req_rx_qs = vport_config->user_config.num_req_rx_qs; 1178 } else { 1179 int num_cpus; 1180 1181 /* Restrict num of queues to cpus online as a default 1182 * configuration to give best performance. User can always 1183 * override to a max number of queues via ethtool. 1184 */ 1185 num_cpus = num_online_cpus(); 1186 1187 dflt_splitq_txq_grps = min_t(int, max_q->max_txq, num_cpus); 1188 dflt_singleq_txqs = min_t(int, max_q->max_txq, num_cpus); 1189 dflt_splitq_rxq_grps = min_t(int, max_q->max_rxq, num_cpus); 1190 dflt_singleq_rxqs = min_t(int, max_q->max_rxq, num_cpus); 1191 } 1192 1193 if (idpf_is_queue_model_split(le16_to_cpu(vport_msg->txq_model))) { 1194 num_txq_grps = num_req_tx_qs ? num_req_tx_qs : dflt_splitq_txq_grps; 1195 vport_msg->num_tx_complq = cpu_to_le16(num_txq_grps * 1196 IDPF_COMPLQ_PER_GROUP); 1197 vport_msg->num_tx_q = cpu_to_le16(num_txq_grps * 1198 IDPF_DFLT_SPLITQ_TXQ_PER_GROUP); 1199 } else { 1200 num_txq_grps = IDPF_DFLT_SINGLEQ_TX_Q_GROUPS; 1201 num_qs = num_txq_grps * (num_req_tx_qs ? num_req_tx_qs : 1202 dflt_singleq_txqs); 1203 vport_msg->num_tx_q = cpu_to_le16(num_qs); 1204 vport_msg->num_tx_complq = 0; 1205 } 1206 if (idpf_is_queue_model_split(le16_to_cpu(vport_msg->rxq_model))) { 1207 num_rxq_grps = num_req_rx_qs ? num_req_rx_qs : dflt_splitq_rxq_grps; 1208 vport_msg->num_rx_bufq = cpu_to_le16(num_rxq_grps * 1209 IDPF_MAX_BUFQS_PER_RXQ_GRP); 1210 vport_msg->num_rx_q = cpu_to_le16(num_rxq_grps * 1211 IDPF_DFLT_SPLITQ_RXQ_PER_GROUP); 1212 } else { 1213 num_rxq_grps = IDPF_DFLT_SINGLEQ_RX_Q_GROUPS; 1214 num_qs = num_rxq_grps * (num_req_rx_qs ? num_req_rx_qs : 1215 dflt_singleq_rxqs); 1216 vport_msg->num_rx_q = cpu_to_le16(num_qs); 1217 vport_msg->num_rx_bufq = 0; 1218 } 1219 1220 return 0; 1221 } 1222 1223 /** 1224 * idpf_vport_calc_num_q_groups - Calculate number of queue groups 1225 * @vport: vport to calculate q groups for 1226 */ 1227 void idpf_vport_calc_num_q_groups(struct idpf_vport *vport) 1228 { 1229 if (idpf_is_queue_model_split(vport->txq_model)) 1230 vport->num_txq_grp = vport->num_txq; 1231 else 1232 vport->num_txq_grp = IDPF_DFLT_SINGLEQ_TX_Q_GROUPS; 1233 1234 if (idpf_is_queue_model_split(vport->rxq_model)) 1235 vport->num_rxq_grp = vport->num_rxq; 1236 else 1237 vport->num_rxq_grp = IDPF_DFLT_SINGLEQ_RX_Q_GROUPS; 1238 } 1239 1240 /** 1241 * idpf_vport_calc_numq_per_grp - Calculate number of queues per group 1242 * @vport: vport to calculate queues for 1243 * @num_txq: return parameter for number of TX queues 1244 * @num_rxq: return parameter for number of RX queues 1245 */ 1246 static void idpf_vport_calc_numq_per_grp(struct idpf_vport *vport, 1247 u16 *num_txq, u16 *num_rxq) 1248 { 1249 if (idpf_is_queue_model_split(vport->txq_model)) 1250 *num_txq = IDPF_DFLT_SPLITQ_TXQ_PER_GROUP; 1251 else 1252 *num_txq = vport->num_txq; 1253 1254 if (idpf_is_queue_model_split(vport->rxq_model)) 1255 *num_rxq = IDPF_DFLT_SPLITQ_RXQ_PER_GROUP; 1256 else 1257 *num_rxq = vport->num_rxq; 1258 } 1259 1260 /** 1261 * idpf_rxq_set_descids - set the descids supported by this queue 1262 * @vport: virtual port data structure 1263 * @q: rx queue for which descids are set 1264 * 1265 */ 1266 static void idpf_rxq_set_descids(const struct idpf_vport *vport, 1267 struct idpf_rx_queue *q) 1268 { 1269 if (idpf_is_queue_model_split(vport->rxq_model)) { 1270 q->rxdids = VIRTCHNL2_RXDID_2_FLEX_SPLITQ_M; 1271 } else { 1272 if (vport->base_rxd) 1273 q->rxdids = VIRTCHNL2_RXDID_1_32B_BASE_M; 1274 else 1275 q->rxdids = VIRTCHNL2_RXDID_2_FLEX_SQ_NIC_M; 1276 } 1277 } 1278 1279 /** 1280 * idpf_txq_group_alloc - Allocate all txq group resources 1281 * @vport: vport to allocate txq groups for 1282 * @num_txq: number of txqs to allocate for each group 1283 * 1284 * Returns 0 on success, negative on failure 1285 */ 1286 static int idpf_txq_group_alloc(struct idpf_vport *vport, u16 num_txq) 1287 { 1288 bool split, flow_sch_en; 1289 int i; 1290 1291 vport->txq_grps = kcalloc(vport->num_txq_grp, 1292 sizeof(*vport->txq_grps), GFP_KERNEL); 1293 if (!vport->txq_grps) 1294 return -ENOMEM; 1295 1296 split = idpf_is_queue_model_split(vport->txq_model); 1297 flow_sch_en = !idpf_is_cap_ena(vport->adapter, IDPF_OTHER_CAPS, 1298 VIRTCHNL2_CAP_SPLITQ_QSCHED); 1299 1300 for (i = 0; i < vport->num_txq_grp; i++) { 1301 struct idpf_txq_group *tx_qgrp = &vport->txq_grps[i]; 1302 struct idpf_adapter *adapter = vport->adapter; 1303 int j; 1304 1305 tx_qgrp->vport = vport; 1306 tx_qgrp->num_txq = num_txq; 1307 1308 for (j = 0; j < tx_qgrp->num_txq; j++) { 1309 tx_qgrp->txqs[j] = kzalloc(sizeof(*tx_qgrp->txqs[j]), 1310 GFP_KERNEL); 1311 if (!tx_qgrp->txqs[j]) 1312 goto err_alloc; 1313 } 1314 1315 for (j = 0; j < tx_qgrp->num_txq; j++) { 1316 struct idpf_tx_queue *q = tx_qgrp->txqs[j]; 1317 1318 q->dev = &adapter->pdev->dev; 1319 q->desc_count = vport->txq_desc_count; 1320 q->tx_max_bufs = idpf_get_max_tx_bufs(adapter); 1321 q->tx_min_pkt_len = idpf_get_min_tx_pkt_len(adapter); 1322 q->netdev = vport->netdev; 1323 q->txq_grp = tx_qgrp; 1324 1325 if (!split) { 1326 q->clean_budget = vport->compln_clean_budget; 1327 idpf_queue_assign(CRC_EN, q, 1328 vport->crc_enable); 1329 } 1330 1331 if (!flow_sch_en) 1332 continue; 1333 1334 idpf_queue_set(FLOW_SCH_EN, q); 1335 1336 q->refillq = kzalloc(sizeof(*q->refillq), GFP_KERNEL); 1337 if (!q->refillq) 1338 goto err_alloc; 1339 1340 idpf_queue_set(GEN_CHK, q->refillq); 1341 idpf_queue_set(RFL_GEN_CHK, q->refillq); 1342 } 1343 1344 if (!split) 1345 continue; 1346 1347 tx_qgrp->complq = kcalloc(IDPF_COMPLQ_PER_GROUP, 1348 sizeof(*tx_qgrp->complq), 1349 GFP_KERNEL); 1350 if (!tx_qgrp->complq) 1351 goto err_alloc; 1352 1353 tx_qgrp->complq->desc_count = vport->complq_desc_count; 1354 tx_qgrp->complq->txq_grp = tx_qgrp; 1355 tx_qgrp->complq->netdev = vport->netdev; 1356 tx_qgrp->complq->clean_budget = vport->compln_clean_budget; 1357 1358 if (flow_sch_en) 1359 idpf_queue_set(FLOW_SCH_EN, tx_qgrp->complq); 1360 } 1361 1362 return 0; 1363 1364 err_alloc: 1365 idpf_txq_group_rel(vport); 1366 1367 return -ENOMEM; 1368 } 1369 1370 /** 1371 * idpf_rxq_group_alloc - Allocate all rxq group resources 1372 * @vport: vport to allocate rxq groups for 1373 * @num_rxq: number of rxqs to allocate for each group 1374 * 1375 * Returns 0 on success, negative on failure 1376 */ 1377 static int idpf_rxq_group_alloc(struct idpf_vport *vport, u16 num_rxq) 1378 { 1379 int i, k, err = 0; 1380 bool hs; 1381 1382 vport->rxq_grps = kcalloc(vport->num_rxq_grp, 1383 sizeof(struct idpf_rxq_group), GFP_KERNEL); 1384 if (!vport->rxq_grps) 1385 return -ENOMEM; 1386 1387 hs = idpf_vport_get_hsplit(vport) == ETHTOOL_TCP_DATA_SPLIT_ENABLED; 1388 1389 for (i = 0; i < vport->num_rxq_grp; i++) { 1390 struct idpf_rxq_group *rx_qgrp = &vport->rxq_grps[i]; 1391 int j; 1392 1393 rx_qgrp->vport = vport; 1394 if (!idpf_is_queue_model_split(vport->rxq_model)) { 1395 rx_qgrp->singleq.num_rxq = num_rxq; 1396 for (j = 0; j < num_rxq; j++) { 1397 rx_qgrp->singleq.rxqs[j] = 1398 kzalloc(sizeof(*rx_qgrp->singleq.rxqs[j]), 1399 GFP_KERNEL); 1400 if (!rx_qgrp->singleq.rxqs[j]) { 1401 err = -ENOMEM; 1402 goto err_alloc; 1403 } 1404 } 1405 goto skip_splitq_rx_init; 1406 } 1407 rx_qgrp->splitq.num_rxq_sets = num_rxq; 1408 1409 for (j = 0; j < num_rxq; j++) { 1410 rx_qgrp->splitq.rxq_sets[j] = 1411 kzalloc(sizeof(struct idpf_rxq_set), 1412 GFP_KERNEL); 1413 if (!rx_qgrp->splitq.rxq_sets[j]) { 1414 err = -ENOMEM; 1415 goto err_alloc; 1416 } 1417 } 1418 1419 rx_qgrp->splitq.bufq_sets = kcalloc(vport->num_bufqs_per_qgrp, 1420 sizeof(struct idpf_bufq_set), 1421 GFP_KERNEL); 1422 if (!rx_qgrp->splitq.bufq_sets) { 1423 err = -ENOMEM; 1424 goto err_alloc; 1425 } 1426 1427 for (j = 0; j < vport->num_bufqs_per_qgrp; j++) { 1428 struct idpf_bufq_set *bufq_set = 1429 &rx_qgrp->splitq.bufq_sets[j]; 1430 int swq_size = sizeof(struct idpf_sw_queue); 1431 struct idpf_buf_queue *q; 1432 1433 q = &rx_qgrp->splitq.bufq_sets[j].bufq; 1434 q->desc_count = vport->bufq_desc_count[j]; 1435 q->rx_buffer_low_watermark = IDPF_LOW_WATERMARK; 1436 1437 idpf_queue_assign(HSPLIT_EN, q, hs); 1438 1439 bufq_set->num_refillqs = num_rxq; 1440 bufq_set->refillqs = kcalloc(num_rxq, swq_size, 1441 GFP_KERNEL); 1442 if (!bufq_set->refillqs) { 1443 err = -ENOMEM; 1444 goto err_alloc; 1445 } 1446 for (k = 0; k < bufq_set->num_refillqs; k++) { 1447 struct idpf_sw_queue *refillq = 1448 &bufq_set->refillqs[k]; 1449 1450 refillq->desc_count = 1451 vport->bufq_desc_count[j]; 1452 idpf_queue_set(GEN_CHK, refillq); 1453 idpf_queue_set(RFL_GEN_CHK, refillq); 1454 refillq->ring = kcalloc(refillq->desc_count, 1455 sizeof(*refillq->ring), 1456 GFP_KERNEL); 1457 if (!refillq->ring) { 1458 err = -ENOMEM; 1459 goto err_alloc; 1460 } 1461 } 1462 } 1463 1464 skip_splitq_rx_init: 1465 for (j = 0; j < num_rxq; j++) { 1466 struct idpf_rx_queue *q; 1467 1468 if (!idpf_is_queue_model_split(vport->rxq_model)) { 1469 q = rx_qgrp->singleq.rxqs[j]; 1470 goto setup_rxq; 1471 } 1472 q = &rx_qgrp->splitq.rxq_sets[j]->rxq; 1473 rx_qgrp->splitq.rxq_sets[j]->refillq[0] = 1474 &rx_qgrp->splitq.bufq_sets[0].refillqs[j]; 1475 if (vport->num_bufqs_per_qgrp > IDPF_SINGLE_BUFQ_PER_RXQ_GRP) 1476 rx_qgrp->splitq.rxq_sets[j]->refillq[1] = 1477 &rx_qgrp->splitq.bufq_sets[1].refillqs[j]; 1478 1479 idpf_queue_assign(HSPLIT_EN, q, hs); 1480 1481 setup_rxq: 1482 q->desc_count = vport->rxq_desc_count; 1483 q->rx_ptype_lkup = vport->rx_ptype_lkup; 1484 q->netdev = vport->netdev; 1485 q->bufq_sets = rx_qgrp->splitq.bufq_sets; 1486 q->idx = (i * num_rxq) + j; 1487 q->rx_buffer_low_watermark = IDPF_LOW_WATERMARK; 1488 q->rx_max_pkt_size = vport->netdev->mtu + 1489 LIBETH_RX_LL_LEN; 1490 idpf_rxq_set_descids(vport, q); 1491 } 1492 } 1493 1494 err_alloc: 1495 if (err) 1496 idpf_rxq_group_rel(vport); 1497 1498 return err; 1499 } 1500 1501 /** 1502 * idpf_vport_queue_grp_alloc_all - Allocate all queue groups/resources 1503 * @vport: vport with qgrps to allocate 1504 * 1505 * Returns 0 on success, negative on failure 1506 */ 1507 static int idpf_vport_queue_grp_alloc_all(struct idpf_vport *vport) 1508 { 1509 u16 num_txq, num_rxq; 1510 int err; 1511 1512 idpf_vport_calc_numq_per_grp(vport, &num_txq, &num_rxq); 1513 1514 err = idpf_txq_group_alloc(vport, num_txq); 1515 if (err) 1516 goto err_out; 1517 1518 err = idpf_rxq_group_alloc(vport, num_rxq); 1519 if (err) 1520 goto err_out; 1521 1522 return 0; 1523 1524 err_out: 1525 idpf_vport_queue_grp_rel_all(vport); 1526 1527 return err; 1528 } 1529 1530 /** 1531 * idpf_vport_queues_alloc - Allocate memory for all queues 1532 * @vport: virtual port 1533 * 1534 * Allocate memory for queues associated with a vport. Returns 0 on success, 1535 * negative on failure. 1536 */ 1537 int idpf_vport_queues_alloc(struct idpf_vport *vport) 1538 { 1539 int err; 1540 1541 err = idpf_vport_queue_grp_alloc_all(vport); 1542 if (err) 1543 goto err_out; 1544 1545 err = idpf_tx_desc_alloc_all(vport); 1546 if (err) 1547 goto err_out; 1548 1549 err = idpf_rx_desc_alloc_all(vport); 1550 if (err) 1551 goto err_out; 1552 1553 err = idpf_vport_init_fast_path_txqs(vport); 1554 if (err) 1555 goto err_out; 1556 1557 return 0; 1558 1559 err_out: 1560 idpf_vport_queues_rel(vport); 1561 1562 return err; 1563 } 1564 1565 /** 1566 * idpf_tx_handle_sw_marker - Handle queue marker packet 1567 * @tx_q: tx queue to handle software marker 1568 */ 1569 static void idpf_tx_handle_sw_marker(struct idpf_tx_queue *tx_q) 1570 { 1571 struct idpf_netdev_priv *priv = netdev_priv(tx_q->netdev); 1572 struct idpf_vport *vport = priv->vport; 1573 int i; 1574 1575 idpf_queue_clear(SW_MARKER, tx_q); 1576 /* Hardware must write marker packets to all queues associated with 1577 * completion queues. So check if all queues received marker packets 1578 */ 1579 for (i = 0; i < vport->num_txq; i++) 1580 /* If we're still waiting on any other TXQ marker completions, 1581 * just return now since we cannot wake up the marker_wq yet. 1582 */ 1583 if (idpf_queue_has(SW_MARKER, vport->txqs[i])) 1584 return; 1585 1586 /* Drain complete */ 1587 set_bit(IDPF_VPORT_SW_MARKER, vport->flags); 1588 wake_up(&vport->sw_marker_wq); 1589 } 1590 1591 /** 1592 * idpf_tx_read_tstamp - schedule a work to read Tx timestamp value 1593 * @txq: queue to read the timestamp from 1594 * @skb: socket buffer to provide Tx timestamp value 1595 * 1596 * Schedule a work to read Tx timestamp value generated once the packet is 1597 * transmitted. 1598 */ 1599 static void idpf_tx_read_tstamp(struct idpf_tx_queue *txq, struct sk_buff *skb) 1600 { 1601 struct idpf_ptp_vport_tx_tstamp_caps *tx_tstamp_caps; 1602 struct idpf_ptp_tx_tstamp_status *tx_tstamp_status; 1603 1604 tx_tstamp_caps = txq->cached_tstamp_caps; 1605 spin_lock_bh(&tx_tstamp_caps->status_lock); 1606 1607 for (u32 i = 0; i < tx_tstamp_caps->num_entries; i++) { 1608 tx_tstamp_status = &tx_tstamp_caps->tx_tstamp_status[i]; 1609 if (tx_tstamp_status->state != IDPF_PTP_FREE) 1610 continue; 1611 1612 tx_tstamp_status->skb = skb; 1613 tx_tstamp_status->state = IDPF_PTP_REQUEST; 1614 1615 /* Fetch timestamp from completion descriptor through 1616 * virtchnl msg to report to stack. 1617 */ 1618 queue_work(system_unbound_wq, txq->tstamp_task); 1619 break; 1620 } 1621 1622 spin_unlock_bh(&tx_tstamp_caps->status_lock); 1623 } 1624 1625 #define idpf_tx_splitq_clean_bump_ntc(txq, ntc, desc, buf) \ 1626 do { \ 1627 if (unlikely(++(ntc) == (txq)->desc_count)) { \ 1628 ntc = 0; \ 1629 buf = (txq)->tx_buf; \ 1630 desc = &(txq)->flex_tx[0]; \ 1631 } else { \ 1632 (buf)++; \ 1633 (desc)++; \ 1634 } \ 1635 } while (0) 1636 1637 /** 1638 * idpf_tx_splitq_clean - Reclaim resources from buffer queue 1639 * @tx_q: Tx queue to clean 1640 * @end: queue index until which it should be cleaned 1641 * @napi_budget: Used to determine if we are in netpoll 1642 * @cleaned: pointer to stats struct to track cleaned packets/bytes 1643 * @descs_only: true if queue is using flow-based scheduling and should 1644 * not clean buffers at this time 1645 * 1646 * Cleans the queue descriptor ring. If the queue is using queue-based 1647 * scheduling, the buffers will be cleaned as well. If the queue is using 1648 * flow-based scheduling, only the descriptors are cleaned at this time. 1649 * Separate packet completion events will be reported on the completion queue, 1650 * and the buffers will be cleaned separately. The stats are not updated from 1651 * this function when using flow-based scheduling. 1652 */ 1653 static void idpf_tx_splitq_clean(struct idpf_tx_queue *tx_q, u16 end, 1654 int napi_budget, 1655 struct libeth_sq_napi_stats *cleaned, 1656 bool descs_only) 1657 { 1658 union idpf_tx_flex_desc *next_pending_desc = NULL; 1659 union idpf_tx_flex_desc *tx_desc; 1660 u32 ntc = tx_q->next_to_clean; 1661 struct libeth_cq_pp cp = { 1662 .dev = tx_q->dev, 1663 .ss = cleaned, 1664 .napi = napi_budget, 1665 }; 1666 struct idpf_tx_buf *tx_buf; 1667 1668 if (descs_only) { 1669 /* Bump ring index to mark as cleaned. */ 1670 tx_q->next_to_clean = end; 1671 return; 1672 } 1673 1674 tx_desc = &tx_q->flex_tx[ntc]; 1675 next_pending_desc = &tx_q->flex_tx[end]; 1676 tx_buf = &tx_q->tx_buf[ntc]; 1677 1678 while (tx_desc != next_pending_desc) { 1679 u32 eop_idx; 1680 1681 /* If this entry in the ring was used as a context descriptor, 1682 * it's corresponding entry in the buffer ring is reserved. We 1683 * can skip this descriptor since there is no buffer to clean. 1684 */ 1685 if (tx_buf->type <= LIBETH_SQE_CTX) 1686 goto fetch_next_txq_desc; 1687 1688 if (unlikely(tx_buf->type != LIBETH_SQE_SKB)) 1689 break; 1690 1691 eop_idx = tx_buf->rs_idx; 1692 libeth_tx_complete(tx_buf, &cp); 1693 1694 /* unmap remaining buffers */ 1695 while (ntc != eop_idx) { 1696 idpf_tx_splitq_clean_bump_ntc(tx_q, ntc, 1697 tx_desc, tx_buf); 1698 1699 /* unmap any remaining paged data */ 1700 libeth_tx_complete(tx_buf, &cp); 1701 } 1702 1703 fetch_next_txq_desc: 1704 idpf_tx_splitq_clean_bump_ntc(tx_q, ntc, tx_desc, tx_buf); 1705 } 1706 1707 tx_q->next_to_clean = ntc; 1708 } 1709 1710 /** 1711 * idpf_tx_clean_bufs - clean flow scheduling TX queue buffers 1712 * @txq: queue to clean 1713 * @buf_id: packet's starting buffer ID, from completion descriptor 1714 * @cleaned: pointer to stats struct to track cleaned packets/bytes 1715 * @budget: Used to determine if we are in netpoll 1716 * 1717 * Clean all buffers associated with the packet starting at buf_id. Returns the 1718 * byte/segment count for the cleaned packet. 1719 */ 1720 static void idpf_tx_clean_bufs(struct idpf_tx_queue *txq, u32 buf_id, 1721 struct libeth_sq_napi_stats *cleaned, 1722 int budget) 1723 { 1724 struct idpf_tx_buf *tx_buf = NULL; 1725 struct libeth_cq_pp cp = { 1726 .dev = txq->dev, 1727 .ss = cleaned, 1728 .napi = budget, 1729 }; 1730 1731 tx_buf = &txq->tx_buf[buf_id]; 1732 if (tx_buf->type == LIBETH_SQE_SKB) { 1733 if (skb_shinfo(tx_buf->skb)->tx_flags & SKBTX_IN_PROGRESS) 1734 idpf_tx_read_tstamp(txq, tx_buf->skb); 1735 1736 libeth_tx_complete(tx_buf, &cp); 1737 idpf_post_buf_refill(txq->refillq, buf_id); 1738 } 1739 1740 while (idpf_tx_buf_next(tx_buf) != IDPF_TXBUF_NULL) { 1741 buf_id = idpf_tx_buf_next(tx_buf); 1742 1743 tx_buf = &txq->tx_buf[buf_id]; 1744 libeth_tx_complete(tx_buf, &cp); 1745 idpf_post_buf_refill(txq->refillq, buf_id); 1746 } 1747 } 1748 1749 /** 1750 * idpf_tx_handle_rs_completion - clean a single packet and all of its buffers 1751 * whether on the buffer ring or in the hash table 1752 * @txq: Tx ring to clean 1753 * @desc: pointer to completion queue descriptor to extract completion 1754 * information from 1755 * @cleaned: pointer to stats struct to track cleaned packets/bytes 1756 * @budget: Used to determine if we are in netpoll 1757 * 1758 * Returns bytes/packets cleaned 1759 */ 1760 static void idpf_tx_handle_rs_completion(struct idpf_tx_queue *txq, 1761 struct idpf_splitq_tx_compl_desc *desc, 1762 struct libeth_sq_napi_stats *cleaned, 1763 int budget) 1764 { 1765 /* RS completion contains queue head for queue based scheduling or 1766 * completion tag for flow based scheduling. 1767 */ 1768 u16 rs_compl_val = le16_to_cpu(desc->q_head_compl_tag.q_head); 1769 1770 if (!idpf_queue_has(FLOW_SCH_EN, txq)) { 1771 idpf_tx_splitq_clean(txq, rs_compl_val, budget, cleaned, false); 1772 return; 1773 } 1774 1775 idpf_tx_clean_bufs(txq, rs_compl_val, cleaned, budget); 1776 } 1777 1778 /** 1779 * idpf_tx_clean_complq - Reclaim resources on completion queue 1780 * @complq: Tx ring to clean 1781 * @budget: Used to determine if we are in netpoll 1782 * @cleaned: returns number of packets cleaned 1783 * 1784 * Returns true if there's any budget left (e.g. the clean is finished) 1785 */ 1786 static bool idpf_tx_clean_complq(struct idpf_compl_queue *complq, int budget, 1787 int *cleaned) 1788 { 1789 struct idpf_splitq_tx_compl_desc *tx_desc; 1790 s16 ntc = complq->next_to_clean; 1791 struct idpf_netdev_priv *np; 1792 unsigned int complq_budget; 1793 bool complq_ok = true; 1794 int i; 1795 1796 complq_budget = complq->clean_budget; 1797 tx_desc = &complq->comp[ntc]; 1798 ntc -= complq->desc_count; 1799 1800 do { 1801 struct libeth_sq_napi_stats cleaned_stats = { }; 1802 struct idpf_tx_queue *tx_q; 1803 int rel_tx_qid; 1804 u16 hw_head; 1805 u8 ctype; /* completion type */ 1806 u16 gen; 1807 1808 /* if the descriptor isn't done, no work yet to do */ 1809 gen = le16_get_bits(tx_desc->qid_comptype_gen, 1810 IDPF_TXD_COMPLQ_GEN_M); 1811 if (idpf_queue_has(GEN_CHK, complq) != gen) 1812 break; 1813 1814 /* Find necessary info of TX queue to clean buffers */ 1815 rel_tx_qid = le16_get_bits(tx_desc->qid_comptype_gen, 1816 IDPF_TXD_COMPLQ_QID_M); 1817 if (rel_tx_qid >= complq->txq_grp->num_txq || 1818 !complq->txq_grp->txqs[rel_tx_qid]) { 1819 netdev_err(complq->netdev, "TxQ not found\n"); 1820 goto fetch_next_desc; 1821 } 1822 tx_q = complq->txq_grp->txqs[rel_tx_qid]; 1823 1824 /* Determine completion type */ 1825 ctype = le16_get_bits(tx_desc->qid_comptype_gen, 1826 IDPF_TXD_COMPLQ_COMPL_TYPE_M); 1827 switch (ctype) { 1828 case IDPF_TXD_COMPLT_RE: 1829 hw_head = le16_to_cpu(tx_desc->q_head_compl_tag.q_head); 1830 1831 idpf_tx_splitq_clean(tx_q, hw_head, budget, 1832 &cleaned_stats, true); 1833 break; 1834 case IDPF_TXD_COMPLT_RS: 1835 idpf_tx_handle_rs_completion(tx_q, tx_desc, 1836 &cleaned_stats, budget); 1837 break; 1838 case IDPF_TXD_COMPLT_SW_MARKER: 1839 idpf_tx_handle_sw_marker(tx_q); 1840 break; 1841 default: 1842 netdev_err(tx_q->netdev, 1843 "Unknown TX completion type: %d\n", ctype); 1844 goto fetch_next_desc; 1845 } 1846 1847 u64_stats_update_begin(&tx_q->stats_sync); 1848 u64_stats_add(&tx_q->q_stats.packets, cleaned_stats.packets); 1849 u64_stats_add(&tx_q->q_stats.bytes, cleaned_stats.bytes); 1850 tx_q->cleaned_pkts += cleaned_stats.packets; 1851 tx_q->cleaned_bytes += cleaned_stats.bytes; 1852 complq->num_completions++; 1853 u64_stats_update_end(&tx_q->stats_sync); 1854 1855 fetch_next_desc: 1856 tx_desc++; 1857 ntc++; 1858 if (unlikely(!ntc)) { 1859 ntc -= complq->desc_count; 1860 tx_desc = &complq->comp[0]; 1861 idpf_queue_change(GEN_CHK, complq); 1862 } 1863 1864 prefetch(tx_desc); 1865 1866 /* update budget accounting */ 1867 complq_budget--; 1868 } while (likely(complq_budget)); 1869 1870 /* Store the state of the complq to be used later in deciding if a 1871 * TXQ can be started again 1872 */ 1873 if (unlikely(IDPF_TX_COMPLQ_PENDING(complq->txq_grp) > 1874 IDPF_TX_COMPLQ_OVERFLOW_THRESH(complq))) 1875 complq_ok = false; 1876 1877 np = netdev_priv(complq->netdev); 1878 for (i = 0; i < complq->txq_grp->num_txq; ++i) { 1879 struct idpf_tx_queue *tx_q = complq->txq_grp->txqs[i]; 1880 struct netdev_queue *nq; 1881 bool dont_wake; 1882 1883 /* We didn't clean anything on this queue, move along */ 1884 if (!tx_q->cleaned_bytes) 1885 continue; 1886 1887 *cleaned += tx_q->cleaned_pkts; 1888 1889 /* Update BQL */ 1890 nq = netdev_get_tx_queue(tx_q->netdev, tx_q->idx); 1891 1892 dont_wake = !complq_ok || np->state != __IDPF_VPORT_UP || 1893 !netif_carrier_ok(tx_q->netdev); 1894 /* Check if the TXQ needs to and can be restarted */ 1895 __netif_txq_completed_wake(nq, tx_q->cleaned_pkts, tx_q->cleaned_bytes, 1896 IDPF_DESC_UNUSED(tx_q), IDPF_TX_WAKE_THRESH, 1897 dont_wake); 1898 1899 /* Reset cleaned stats for the next time this queue is 1900 * cleaned 1901 */ 1902 tx_q->cleaned_bytes = 0; 1903 tx_q->cleaned_pkts = 0; 1904 } 1905 1906 ntc += complq->desc_count; 1907 complq->next_to_clean = ntc; 1908 1909 return !!complq_budget; 1910 } 1911 1912 /** 1913 * idpf_tx_splitq_build_ctb - populate command tag and size for queue 1914 * based scheduling descriptors 1915 * @desc: descriptor to populate 1916 * @params: pointer to tx params struct 1917 * @td_cmd: command to be filled in desc 1918 * @size: size of buffer 1919 */ 1920 void idpf_tx_splitq_build_ctb(union idpf_tx_flex_desc *desc, 1921 struct idpf_tx_splitq_params *params, 1922 u16 td_cmd, u16 size) 1923 { 1924 desc->q.qw1.cmd_dtype = 1925 le16_encode_bits(params->dtype, IDPF_FLEX_TXD_QW1_DTYPE_M); 1926 desc->q.qw1.cmd_dtype |= 1927 le16_encode_bits(td_cmd, IDPF_FLEX_TXD_QW1_CMD_M); 1928 desc->q.qw1.buf_size = cpu_to_le16(size); 1929 desc->q.qw1.l2tags.l2tag1 = cpu_to_le16(params->td_tag); 1930 } 1931 1932 /** 1933 * idpf_tx_splitq_build_flow_desc - populate command tag and size for flow 1934 * scheduling descriptors 1935 * @desc: descriptor to populate 1936 * @params: pointer to tx params struct 1937 * @td_cmd: command to be filled in desc 1938 * @size: size of buffer 1939 */ 1940 void idpf_tx_splitq_build_flow_desc(union idpf_tx_flex_desc *desc, 1941 struct idpf_tx_splitq_params *params, 1942 u16 td_cmd, u16 size) 1943 { 1944 *(u32 *)&desc->flow.qw1.cmd_dtype = (u8)(params->dtype | td_cmd); 1945 desc->flow.qw1.rxr_bufsize = cpu_to_le16((u16)size); 1946 desc->flow.qw1.compl_tag = cpu_to_le16(params->compl_tag); 1947 } 1948 1949 /** 1950 * idpf_tx_splitq_has_room - check if enough Tx splitq resources are available 1951 * @tx_q: the queue to be checked 1952 * @descs_needed: number of descriptors required for this packet 1953 * @bufs_needed: number of Tx buffers required for this packet 1954 * 1955 * Return: 0 if no room available, 1 otherwise 1956 */ 1957 static int idpf_txq_has_room(struct idpf_tx_queue *tx_q, u32 descs_needed, 1958 u32 bufs_needed) 1959 { 1960 if (IDPF_DESC_UNUSED(tx_q) < descs_needed || 1961 IDPF_TX_COMPLQ_PENDING(tx_q->txq_grp) > 1962 IDPF_TX_COMPLQ_OVERFLOW_THRESH(tx_q->txq_grp->complq) || 1963 idpf_tx_splitq_get_free_bufs(tx_q->refillq) < bufs_needed) 1964 return 0; 1965 return 1; 1966 } 1967 1968 /** 1969 * idpf_tx_maybe_stop_splitq - 1st level check for Tx splitq stop conditions 1970 * @tx_q: the queue to be checked 1971 * @descs_needed: number of descriptors required for this packet 1972 * @bufs_needed: number of buffers needed for this packet 1973 * 1974 * Return: 0 if stop is not needed 1975 */ 1976 static int idpf_tx_maybe_stop_splitq(struct idpf_tx_queue *tx_q, 1977 u32 descs_needed, 1978 u32 bufs_needed) 1979 { 1980 /* Since we have multiple resources to check for splitq, our 1981 * start,stop_thrs becomes a boolean check instead of a count 1982 * threshold. 1983 */ 1984 if (netif_subqueue_maybe_stop(tx_q->netdev, tx_q->idx, 1985 idpf_txq_has_room(tx_q, descs_needed, 1986 bufs_needed), 1987 1, 1)) 1988 return 0; 1989 1990 u64_stats_update_begin(&tx_q->stats_sync); 1991 u64_stats_inc(&tx_q->q_stats.q_busy); 1992 u64_stats_update_end(&tx_q->stats_sync); 1993 1994 return -EBUSY; 1995 } 1996 1997 /** 1998 * idpf_tx_buf_hw_update - Store the new tail value 1999 * @tx_q: queue to bump 2000 * @val: new tail index 2001 * @xmit_more: more skb's pending 2002 * 2003 * The naming here is special in that 'hw' signals that this function is about 2004 * to do a register write to update our queue status. We know this can only 2005 * mean tail here as HW should be owning head for TX. 2006 */ 2007 void idpf_tx_buf_hw_update(struct idpf_tx_queue *tx_q, u32 val, 2008 bool xmit_more) 2009 { 2010 struct netdev_queue *nq; 2011 2012 nq = netdev_get_tx_queue(tx_q->netdev, tx_q->idx); 2013 tx_q->next_to_use = val; 2014 2015 /* Force memory writes to complete before letting h/w 2016 * know there are new descriptors to fetch. (Only 2017 * applicable for weak-ordered memory model archs, 2018 * such as IA-64). 2019 */ 2020 wmb(); 2021 2022 /* notify HW of packet */ 2023 if (netif_xmit_stopped(nq) || !xmit_more) 2024 writel(val, tx_q->tail); 2025 } 2026 2027 /** 2028 * idpf_tx_res_count_required - get number of Tx resources needed for this pkt 2029 * @txq: queue to send buffer on 2030 * @skb: send buffer 2031 * @bufs_needed: (output) number of buffers needed for this skb. 2032 * 2033 * Return: number of data descriptors and buffers needed for this skb. 2034 */ 2035 unsigned int idpf_tx_res_count_required(struct idpf_tx_queue *txq, 2036 struct sk_buff *skb, 2037 u32 *bufs_needed) 2038 { 2039 const struct skb_shared_info *shinfo; 2040 unsigned int count = 0, i; 2041 2042 count += !!skb_headlen(skb); 2043 2044 if (!skb_is_nonlinear(skb)) 2045 return count; 2046 2047 shinfo = skb_shinfo(skb); 2048 *bufs_needed += shinfo->nr_frags; 2049 for (i = 0; i < shinfo->nr_frags; i++) { 2050 unsigned int size; 2051 2052 size = skb_frag_size(&shinfo->frags[i]); 2053 2054 /* We only need to use the idpf_size_to_txd_count check if the 2055 * fragment is going to span multiple descriptors, 2056 * i.e. size >= 16K. 2057 */ 2058 if (size >= SZ_16K) 2059 count += idpf_size_to_txd_count(size); 2060 else 2061 count++; 2062 } 2063 2064 if (idpf_chk_linearize(skb, txq->tx_max_bufs, count)) { 2065 if (__skb_linearize(skb)) 2066 return 0; 2067 2068 count = idpf_size_to_txd_count(skb->len); 2069 u64_stats_update_begin(&txq->stats_sync); 2070 u64_stats_inc(&txq->q_stats.linearize); 2071 u64_stats_update_end(&txq->stats_sync); 2072 } 2073 2074 return count; 2075 } 2076 2077 /** 2078 * idpf_tx_splitq_bump_ntu - adjust NTU and generation 2079 * @txq: the tx ring to wrap 2080 * @ntu: ring index to bump 2081 */ 2082 static unsigned int idpf_tx_splitq_bump_ntu(struct idpf_tx_queue *txq, u16 ntu) 2083 { 2084 ntu++; 2085 2086 if (ntu == txq->desc_count) 2087 ntu = 0; 2088 2089 return ntu; 2090 } 2091 2092 /** 2093 * idpf_tx_get_free_buf_id - get a free buffer ID from the refill queue 2094 * @refillq: refill queue to get buffer ID from 2095 * @buf_id: return buffer ID 2096 * 2097 * Return: true if a buffer ID was found, false if not 2098 */ 2099 static bool idpf_tx_get_free_buf_id(struct idpf_sw_queue *refillq, 2100 u32 *buf_id) 2101 { 2102 u32 ntc = refillq->next_to_clean; 2103 u32 refill_desc; 2104 2105 refill_desc = refillq->ring[ntc]; 2106 2107 if (unlikely(idpf_queue_has(RFL_GEN_CHK, refillq) != 2108 !!(refill_desc & IDPF_RFL_BI_GEN_M))) 2109 return false; 2110 2111 *buf_id = FIELD_GET(IDPF_RFL_BI_BUFID_M, refill_desc); 2112 2113 if (unlikely(++ntc == refillq->desc_count)) { 2114 idpf_queue_change(RFL_GEN_CHK, refillq); 2115 ntc = 0; 2116 } 2117 2118 refillq->next_to_clean = ntc; 2119 2120 return true; 2121 } 2122 2123 /** 2124 * idpf_tx_splitq_pkt_err_unmap - Unmap buffers and bump tail in case of error 2125 * @txq: Tx queue to unwind 2126 * @params: pointer to splitq params struct 2127 * @first: starting buffer for packet to unmap 2128 */ 2129 static void idpf_tx_splitq_pkt_err_unmap(struct idpf_tx_queue *txq, 2130 struct idpf_tx_splitq_params *params, 2131 struct idpf_tx_buf *first) 2132 { 2133 struct idpf_sw_queue *refillq = txq->refillq; 2134 struct libeth_sq_napi_stats ss = { }; 2135 struct idpf_tx_buf *tx_buf = first; 2136 struct libeth_cq_pp cp = { 2137 .dev = txq->dev, 2138 .ss = &ss, 2139 }; 2140 2141 u64_stats_update_begin(&txq->stats_sync); 2142 u64_stats_inc(&txq->q_stats.dma_map_errs); 2143 u64_stats_update_end(&txq->stats_sync); 2144 2145 libeth_tx_complete(tx_buf, &cp); 2146 while (idpf_tx_buf_next(tx_buf) != IDPF_TXBUF_NULL) { 2147 tx_buf = &txq->tx_buf[idpf_tx_buf_next(tx_buf)]; 2148 libeth_tx_complete(tx_buf, &cp); 2149 } 2150 2151 /* Update tail in case netdev_xmit_more was previously true. */ 2152 idpf_tx_buf_hw_update(txq, params->prev_ntu, false); 2153 2154 if (!refillq) 2155 return; 2156 2157 /* Restore refillq state to avoid leaking tags. */ 2158 if (params->prev_refill_gen != idpf_queue_has(RFL_GEN_CHK, refillq)) 2159 idpf_queue_change(RFL_GEN_CHK, refillq); 2160 refillq->next_to_clean = params->prev_refill_ntc; 2161 } 2162 2163 /** 2164 * idpf_tx_splitq_map - Build the Tx flex descriptor 2165 * @tx_q: queue to send buffer on 2166 * @params: pointer to splitq params struct 2167 * @first: first buffer info buffer to use 2168 * 2169 * This function loops over the skb data pointed to by *first 2170 * and gets a physical address for each memory location and programs 2171 * it and the length into the transmit flex descriptor. 2172 */ 2173 static void idpf_tx_splitq_map(struct idpf_tx_queue *tx_q, 2174 struct idpf_tx_splitq_params *params, 2175 struct idpf_tx_buf *first) 2176 { 2177 union idpf_tx_flex_desc *tx_desc; 2178 unsigned int data_len, size; 2179 struct idpf_tx_buf *tx_buf; 2180 u16 i = tx_q->next_to_use; 2181 struct netdev_queue *nq; 2182 struct sk_buff *skb; 2183 skb_frag_t *frag; 2184 u32 next_buf_id; 2185 u16 td_cmd = 0; 2186 dma_addr_t dma; 2187 2188 skb = first->skb; 2189 2190 td_cmd = params->offload.td_cmd; 2191 2192 data_len = skb->data_len; 2193 size = skb_headlen(skb); 2194 2195 tx_desc = &tx_q->flex_tx[i]; 2196 2197 dma = dma_map_single(tx_q->dev, skb->data, size, DMA_TO_DEVICE); 2198 2199 tx_buf = first; 2200 first->nr_frags = 0; 2201 2202 for (frag = &skb_shinfo(skb)->frags[0];; frag++) { 2203 unsigned int max_data = IDPF_TX_MAX_DESC_DATA_ALIGNED; 2204 2205 if (unlikely(dma_mapping_error(tx_q->dev, dma))) { 2206 idpf_tx_buf_next(tx_buf) = IDPF_TXBUF_NULL; 2207 return idpf_tx_splitq_pkt_err_unmap(tx_q, params, 2208 first); 2209 } 2210 2211 first->nr_frags++; 2212 tx_buf->type = LIBETH_SQE_FRAG; 2213 2214 /* record length, and DMA address */ 2215 dma_unmap_len_set(tx_buf, len, size); 2216 dma_unmap_addr_set(tx_buf, dma, dma); 2217 2218 /* buf_addr is in same location for both desc types */ 2219 tx_desc->q.buf_addr = cpu_to_le64(dma); 2220 2221 /* The stack can send us fragments that are too large for a 2222 * single descriptor i.e. frag size > 16K-1. We will need to 2223 * split the fragment across multiple descriptors in this case. 2224 * To adhere to HW alignment restrictions, the fragment needs 2225 * to be split such that the first chunk ends on a 4K boundary 2226 * and all subsequent chunks start on a 4K boundary. We still 2227 * want to send as much data as possible though, so our 2228 * intermediate descriptor chunk size will be 12K. 2229 * 2230 * For example, consider a 32K fragment mapped to DMA addr 2600. 2231 * ------------------------------------------------------------ 2232 * | frag_size = 32K | 2233 * ------------------------------------------------------------ 2234 * |2600 |16384 |28672 2235 * 2236 * 3 descriptors will be used for this fragment. The HW expects 2237 * the descriptors to contain the following: 2238 * ------------------------------------------------------------ 2239 * | size = 13784 | size = 12K | size = 6696 | 2240 * | dma = 2600 | dma = 16384 | dma = 28672 | 2241 * ------------------------------------------------------------ 2242 * 2243 * We need to first adjust the max_data for the first chunk so 2244 * that it ends on a 4K boundary. By negating the value of the 2245 * DMA address and taking only the low order bits, we're 2246 * effectively calculating 2247 * 4K - (DMA addr lower order bits) = 2248 * bytes to next boundary. 2249 * 2250 * Add that to our base aligned max_data (12K) and we have 2251 * our first chunk size. In the example above, 2252 * 13784 = 12K + (4096-2600) 2253 * 2254 * After guaranteeing the first chunk ends on a 4K boundary, we 2255 * will give the intermediate descriptors 12K chunks and 2256 * whatever is left to the final descriptor. This ensures that 2257 * all descriptors used for the remaining chunks of the 2258 * fragment start on a 4K boundary and we use as few 2259 * descriptors as possible. 2260 */ 2261 max_data += -dma & (IDPF_TX_MAX_READ_REQ_SIZE - 1); 2262 while (unlikely(size > IDPF_TX_MAX_DESC_DATA)) { 2263 idpf_tx_splitq_build_desc(tx_desc, params, td_cmd, 2264 max_data); 2265 2266 if (unlikely(++i == tx_q->desc_count)) { 2267 tx_desc = &tx_q->flex_tx[0]; 2268 i = 0; 2269 } else { 2270 tx_desc++; 2271 } 2272 2273 /* Adjust the DMA offset and the remaining size of the 2274 * fragment. On the first iteration of this loop, 2275 * max_data will be >= 12K and <= 16K-1. On any 2276 * subsequent iteration of this loop, max_data will 2277 * always be 12K. 2278 */ 2279 dma += max_data; 2280 size -= max_data; 2281 2282 /* Reset max_data since remaining chunks will be 12K 2283 * at most 2284 */ 2285 max_data = IDPF_TX_MAX_DESC_DATA_ALIGNED; 2286 2287 /* buf_addr is in same location for both desc types */ 2288 tx_desc->q.buf_addr = cpu_to_le64(dma); 2289 } 2290 2291 if (!data_len) 2292 break; 2293 2294 idpf_tx_splitq_build_desc(tx_desc, params, td_cmd, size); 2295 2296 if (unlikely(++i == tx_q->desc_count)) { 2297 tx_desc = &tx_q->flex_tx[0]; 2298 i = 0; 2299 } else { 2300 tx_desc++; 2301 } 2302 2303 if (idpf_queue_has(FLOW_SCH_EN, tx_q)) { 2304 if (unlikely(!idpf_tx_get_free_buf_id(tx_q->refillq, 2305 &next_buf_id))) { 2306 idpf_tx_buf_next(tx_buf) = IDPF_TXBUF_NULL; 2307 return idpf_tx_splitq_pkt_err_unmap(tx_q, params, 2308 first); 2309 } 2310 } else { 2311 next_buf_id = i; 2312 } 2313 idpf_tx_buf_next(tx_buf) = next_buf_id; 2314 tx_buf = &tx_q->tx_buf[next_buf_id]; 2315 2316 size = skb_frag_size(frag); 2317 data_len -= size; 2318 2319 dma = skb_frag_dma_map(tx_q->dev, frag, 0, size, 2320 DMA_TO_DEVICE); 2321 } 2322 2323 /* record SW timestamp if HW timestamp is not available */ 2324 skb_tx_timestamp(skb); 2325 2326 first->type = LIBETH_SQE_SKB; 2327 2328 /* write last descriptor with RS and EOP bits */ 2329 first->rs_idx = i; 2330 idpf_tx_buf_next(tx_buf) = IDPF_TXBUF_NULL; 2331 td_cmd |= params->eop_cmd; 2332 idpf_tx_splitq_build_desc(tx_desc, params, td_cmd, size); 2333 i = idpf_tx_splitq_bump_ntu(tx_q, i); 2334 2335 tx_q->txq_grp->num_completions_pending++; 2336 2337 /* record bytecount for BQL */ 2338 nq = netdev_get_tx_queue(tx_q->netdev, tx_q->idx); 2339 netdev_tx_sent_queue(nq, first->bytes); 2340 2341 idpf_tx_buf_hw_update(tx_q, i, netdev_xmit_more()); 2342 } 2343 2344 /** 2345 * idpf_tso - computes mss and TSO length to prepare for TSO 2346 * @skb: pointer to skb 2347 * @off: pointer to struct that holds offload parameters 2348 * 2349 * Returns error (negative) if TSO was requested but cannot be applied to the 2350 * given skb, 0 if TSO does not apply to the given skb, or 1 otherwise. 2351 */ 2352 int idpf_tso(struct sk_buff *skb, struct idpf_tx_offload_params *off) 2353 { 2354 const struct skb_shared_info *shinfo; 2355 union { 2356 struct iphdr *v4; 2357 struct ipv6hdr *v6; 2358 unsigned char *hdr; 2359 } ip; 2360 union { 2361 struct tcphdr *tcp; 2362 struct udphdr *udp; 2363 unsigned char *hdr; 2364 } l4; 2365 u32 paylen, l4_start; 2366 int err; 2367 2368 if (!skb_is_gso(skb)) 2369 return 0; 2370 2371 err = skb_cow_head(skb, 0); 2372 if (err < 0) 2373 return err; 2374 2375 shinfo = skb_shinfo(skb); 2376 2377 ip.hdr = skb_network_header(skb); 2378 l4.hdr = skb_transport_header(skb); 2379 2380 /* initialize outer IP header fields */ 2381 if (ip.v4->version == 4) { 2382 ip.v4->tot_len = 0; 2383 ip.v4->check = 0; 2384 } else if (ip.v6->version == 6) { 2385 ip.v6->payload_len = 0; 2386 } 2387 2388 l4_start = skb_transport_offset(skb); 2389 2390 /* remove payload length from checksum */ 2391 paylen = skb->len - l4_start; 2392 2393 switch (shinfo->gso_type & ~SKB_GSO_DODGY) { 2394 case SKB_GSO_TCPV4: 2395 case SKB_GSO_TCPV6: 2396 csum_replace_by_diff(&l4.tcp->check, 2397 (__force __wsum)htonl(paylen)); 2398 off->tso_hdr_len = __tcp_hdrlen(l4.tcp) + l4_start; 2399 break; 2400 case SKB_GSO_UDP_L4: 2401 csum_replace_by_diff(&l4.udp->check, 2402 (__force __wsum)htonl(paylen)); 2403 /* compute length of segmentation header */ 2404 off->tso_hdr_len = sizeof(struct udphdr) + l4_start; 2405 l4.udp->len = htons(shinfo->gso_size + sizeof(struct udphdr)); 2406 break; 2407 default: 2408 return -EINVAL; 2409 } 2410 2411 off->tso_len = skb->len - off->tso_hdr_len; 2412 off->mss = shinfo->gso_size; 2413 off->tso_segs = shinfo->gso_segs; 2414 2415 off->tx_flags |= IDPF_TX_FLAGS_TSO; 2416 2417 return 1; 2418 } 2419 2420 2421 /** 2422 * idpf_tx_splitq_get_ctx_desc - grab next desc and update buffer ring 2423 * @txq: queue to put context descriptor on 2424 * 2425 * Since the TX buffer rings mimics the descriptor ring, update the tx buffer 2426 * ring entry to reflect that this index is a context descriptor 2427 */ 2428 static union idpf_flex_tx_ctx_desc * 2429 idpf_tx_splitq_get_ctx_desc(struct idpf_tx_queue *txq) 2430 { 2431 union idpf_flex_tx_ctx_desc *desc; 2432 int i = txq->next_to_use; 2433 2434 /* grab the next descriptor */ 2435 desc = &txq->flex_ctx[i]; 2436 txq->next_to_use = idpf_tx_splitq_bump_ntu(txq, i); 2437 2438 return desc; 2439 } 2440 2441 /** 2442 * idpf_tx_drop_skb - free the SKB and bump tail if necessary 2443 * @tx_q: queue to send buffer on 2444 * @skb: pointer to skb 2445 */ 2446 netdev_tx_t idpf_tx_drop_skb(struct idpf_tx_queue *tx_q, struct sk_buff *skb) 2447 { 2448 u64_stats_update_begin(&tx_q->stats_sync); 2449 u64_stats_inc(&tx_q->q_stats.skb_drops); 2450 u64_stats_update_end(&tx_q->stats_sync); 2451 2452 idpf_tx_buf_hw_update(tx_q, tx_q->next_to_use, false); 2453 2454 dev_kfree_skb(skb); 2455 2456 return NETDEV_TX_OK; 2457 } 2458 2459 #if (IS_ENABLED(CONFIG_PTP_1588_CLOCK)) 2460 /** 2461 * idpf_tx_tstamp - set up context descriptor for hardware timestamp 2462 * @tx_q: queue to send buffer on 2463 * @skb: pointer to the SKB we're sending 2464 * @off: pointer to the offload struct 2465 * 2466 * Return: Positive index number on success, negative otherwise. 2467 */ 2468 static int idpf_tx_tstamp(struct idpf_tx_queue *tx_q, struct sk_buff *skb, 2469 struct idpf_tx_offload_params *off) 2470 { 2471 int err, idx; 2472 2473 /* only timestamp the outbound packet if the user has requested it */ 2474 if (likely(!(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP))) 2475 return -1; 2476 2477 if (!idpf_ptp_get_txq_tstamp_capability(tx_q)) 2478 return -1; 2479 2480 /* Tx timestamps cannot be sampled when doing TSO */ 2481 if (off->tx_flags & IDPF_TX_FLAGS_TSO) 2482 return -1; 2483 2484 /* Grab an open timestamp slot */ 2485 err = idpf_ptp_request_ts(tx_q, skb, &idx); 2486 if (err) { 2487 u64_stats_update_begin(&tx_q->stats_sync); 2488 u64_stats_inc(&tx_q->q_stats.tstamp_skipped); 2489 u64_stats_update_end(&tx_q->stats_sync); 2490 2491 return -1; 2492 } 2493 2494 off->tx_flags |= IDPF_TX_FLAGS_TSYN; 2495 2496 return idx; 2497 } 2498 2499 /** 2500 * idpf_tx_set_tstamp_desc - Set the Tx descriptor fields needed to generate 2501 * PHY Tx timestamp 2502 * @ctx_desc: Context descriptor 2503 * @idx: Index of the Tx timestamp latch 2504 */ 2505 static void idpf_tx_set_tstamp_desc(union idpf_flex_tx_ctx_desc *ctx_desc, 2506 u32 idx) 2507 { 2508 ctx_desc->tsyn.qw1 = le64_encode_bits(IDPF_TX_DESC_DTYPE_CTX, 2509 IDPF_TX_CTX_DTYPE_M) | 2510 le64_encode_bits(IDPF_TX_CTX_DESC_TSYN, 2511 IDPF_TX_CTX_CMD_M) | 2512 le64_encode_bits(idx, IDPF_TX_CTX_TSYN_REG_M); 2513 } 2514 #else /* CONFIG_PTP_1588_CLOCK */ 2515 static int idpf_tx_tstamp(struct idpf_tx_queue *tx_q, struct sk_buff *skb, 2516 struct idpf_tx_offload_params *off) 2517 { 2518 return -1; 2519 } 2520 2521 static void idpf_tx_set_tstamp_desc(union idpf_flex_tx_ctx_desc *ctx_desc, 2522 u32 idx) 2523 { } 2524 #endif /* CONFIG_PTP_1588_CLOCK */ 2525 2526 /** 2527 * idpf_tx_splitq_need_re - check whether RE bit needs to be set 2528 * @tx_q: pointer to Tx queue 2529 * 2530 * Return: true if RE bit needs to be set, false otherwise 2531 */ 2532 static bool idpf_tx_splitq_need_re(struct idpf_tx_queue *tx_q) 2533 { 2534 int gap = tx_q->next_to_use - tx_q->last_re; 2535 2536 gap += (gap < 0) ? tx_q->desc_count : 0; 2537 2538 return gap >= IDPF_TX_SPLITQ_RE_MIN_GAP; 2539 } 2540 2541 /** 2542 * idpf_tx_splitq_frame - Sends buffer on Tx ring using flex descriptors 2543 * @skb: send buffer 2544 * @tx_q: queue to send buffer on 2545 * 2546 * Returns NETDEV_TX_OK if sent, else an error code 2547 */ 2548 static netdev_tx_t idpf_tx_splitq_frame(struct sk_buff *skb, 2549 struct idpf_tx_queue *tx_q) 2550 { 2551 struct idpf_tx_splitq_params tx_params = { 2552 .prev_ntu = tx_q->next_to_use, 2553 }; 2554 union idpf_flex_tx_ctx_desc *ctx_desc; 2555 struct idpf_tx_buf *first; 2556 u32 count, buf_count = 1; 2557 int tso, idx; 2558 u32 buf_id; 2559 2560 count = idpf_tx_res_count_required(tx_q, skb, &buf_count); 2561 if (unlikely(!count)) 2562 return idpf_tx_drop_skb(tx_q, skb); 2563 2564 tso = idpf_tso(skb, &tx_params.offload); 2565 if (unlikely(tso < 0)) 2566 return idpf_tx_drop_skb(tx_q, skb); 2567 2568 /* Check for splitq specific TX resources */ 2569 count += (IDPF_TX_DESCS_PER_CACHE_LINE + tso); 2570 if (idpf_tx_maybe_stop_splitq(tx_q, count, buf_count)) { 2571 idpf_tx_buf_hw_update(tx_q, tx_q->next_to_use, false); 2572 2573 return NETDEV_TX_BUSY; 2574 } 2575 2576 if (tso) { 2577 /* If tso is needed, set up context desc */ 2578 ctx_desc = idpf_tx_splitq_get_ctx_desc(tx_q); 2579 2580 ctx_desc->tso.qw1.cmd_dtype = 2581 cpu_to_le16(IDPF_TX_DESC_DTYPE_FLEX_TSO_CTX | 2582 IDPF_TX_FLEX_CTX_DESC_CMD_TSO); 2583 ctx_desc->tso.qw0.flex_tlen = 2584 cpu_to_le32(tx_params.offload.tso_len & 2585 IDPF_TXD_FLEX_CTX_TLEN_M); 2586 ctx_desc->tso.qw0.mss_rt = 2587 cpu_to_le16(tx_params.offload.mss & 2588 IDPF_TXD_FLEX_CTX_MSS_RT_M); 2589 ctx_desc->tso.qw0.hdr_len = tx_params.offload.tso_hdr_len; 2590 2591 u64_stats_update_begin(&tx_q->stats_sync); 2592 u64_stats_inc(&tx_q->q_stats.lso_pkts); 2593 u64_stats_update_end(&tx_q->stats_sync); 2594 } 2595 2596 idx = idpf_tx_tstamp(tx_q, skb, &tx_params.offload); 2597 if (idx != -1) { 2598 ctx_desc = idpf_tx_splitq_get_ctx_desc(tx_q); 2599 idpf_tx_set_tstamp_desc(ctx_desc, idx); 2600 } 2601 2602 if (idpf_queue_has(FLOW_SCH_EN, tx_q)) { 2603 struct idpf_sw_queue *refillq = tx_q->refillq; 2604 2605 /* Save refillq state in case of a packet rollback. Otherwise, 2606 * the tags will be leaked since they will be popped from the 2607 * refillq but never reposted during cleaning. 2608 */ 2609 tx_params.prev_refill_gen = 2610 idpf_queue_has(RFL_GEN_CHK, refillq); 2611 tx_params.prev_refill_ntc = refillq->next_to_clean; 2612 2613 if (unlikely(!idpf_tx_get_free_buf_id(tx_q->refillq, 2614 &buf_id))) { 2615 if (tx_params.prev_refill_gen != 2616 idpf_queue_has(RFL_GEN_CHK, refillq)) 2617 idpf_queue_change(RFL_GEN_CHK, refillq); 2618 refillq->next_to_clean = tx_params.prev_refill_ntc; 2619 2620 tx_q->next_to_use = tx_params.prev_ntu; 2621 return idpf_tx_drop_skb(tx_q, skb); 2622 } 2623 tx_params.compl_tag = buf_id; 2624 2625 tx_params.dtype = IDPF_TX_DESC_DTYPE_FLEX_FLOW_SCHE; 2626 tx_params.eop_cmd = IDPF_TXD_FLEX_FLOW_CMD_EOP; 2627 /* Set the RE bit to periodically "clean" the descriptor ring. 2628 * MIN_GAP is set to MIN_RING size to ensure it will be set at 2629 * least once each time around the ring. 2630 */ 2631 if (idpf_tx_splitq_need_re(tx_q)) { 2632 tx_params.eop_cmd |= IDPF_TXD_FLEX_FLOW_CMD_RE; 2633 tx_q->txq_grp->num_completions_pending++; 2634 tx_q->last_re = tx_q->next_to_use; 2635 } 2636 2637 if (skb->ip_summed == CHECKSUM_PARTIAL) 2638 tx_params.offload.td_cmd |= IDPF_TXD_FLEX_FLOW_CMD_CS_EN; 2639 2640 } else { 2641 buf_id = tx_q->next_to_use; 2642 2643 tx_params.dtype = IDPF_TX_DESC_DTYPE_FLEX_L2TAG1_L2TAG2; 2644 tx_params.eop_cmd = IDPF_TXD_LAST_DESC_CMD; 2645 2646 if (skb->ip_summed == CHECKSUM_PARTIAL) 2647 tx_params.offload.td_cmd |= IDPF_TX_FLEX_DESC_CMD_CS_EN; 2648 } 2649 2650 first = &tx_q->tx_buf[buf_id]; 2651 first->skb = skb; 2652 2653 if (tso) { 2654 first->packets = tx_params.offload.tso_segs; 2655 first->bytes = skb->len + 2656 ((first->packets - 1) * tx_params.offload.tso_hdr_len); 2657 } else { 2658 first->packets = 1; 2659 first->bytes = max_t(unsigned int, skb->len, ETH_ZLEN); 2660 } 2661 2662 idpf_tx_splitq_map(tx_q, &tx_params, first); 2663 2664 return NETDEV_TX_OK; 2665 } 2666 2667 /** 2668 * idpf_tx_start - Selects the right Tx queue to send buffer 2669 * @skb: send buffer 2670 * @netdev: network interface device structure 2671 * 2672 * Returns NETDEV_TX_OK if sent, else an error code 2673 */ 2674 netdev_tx_t idpf_tx_start(struct sk_buff *skb, struct net_device *netdev) 2675 { 2676 struct idpf_vport *vport = idpf_netdev_to_vport(netdev); 2677 struct idpf_tx_queue *tx_q; 2678 2679 if (unlikely(skb_get_queue_mapping(skb) >= vport->num_txq)) { 2680 dev_kfree_skb_any(skb); 2681 2682 return NETDEV_TX_OK; 2683 } 2684 2685 tx_q = vport->txqs[skb_get_queue_mapping(skb)]; 2686 2687 /* hardware can't handle really short frames, hardware padding works 2688 * beyond this point 2689 */ 2690 if (skb_put_padto(skb, tx_q->tx_min_pkt_len)) { 2691 idpf_tx_buf_hw_update(tx_q, tx_q->next_to_use, false); 2692 2693 return NETDEV_TX_OK; 2694 } 2695 2696 if (idpf_is_queue_model_split(vport->txq_model)) 2697 return idpf_tx_splitq_frame(skb, tx_q); 2698 else 2699 return idpf_tx_singleq_frame(skb, tx_q); 2700 } 2701 2702 /** 2703 * idpf_rx_hash - set the hash value in the skb 2704 * @rxq: Rx descriptor ring packet is being transacted on 2705 * @skb: pointer to current skb being populated 2706 * @rx_desc: Receive descriptor 2707 * @decoded: Decoded Rx packet type related fields 2708 */ 2709 static void 2710 idpf_rx_hash(const struct idpf_rx_queue *rxq, struct sk_buff *skb, 2711 const struct virtchnl2_rx_flex_desc_adv_nic_3 *rx_desc, 2712 struct libeth_rx_pt decoded) 2713 { 2714 u32 hash; 2715 2716 if (!libeth_rx_pt_has_hash(rxq->netdev, decoded)) 2717 return; 2718 2719 hash = le16_to_cpu(rx_desc->hash1) | 2720 (rx_desc->ff2_mirrid_hash2.hash2 << 16) | 2721 (rx_desc->hash3 << 24); 2722 2723 libeth_rx_pt_set_hash(skb, hash, decoded); 2724 } 2725 2726 /** 2727 * idpf_rx_csum - Indicate in skb if checksum is good 2728 * @rxq: Rx descriptor ring packet is being transacted on 2729 * @skb: pointer to current skb being populated 2730 * @csum_bits: checksum fields extracted from the descriptor 2731 * @decoded: Decoded Rx packet type related fields 2732 * 2733 * skb->protocol must be set before this function is called 2734 */ 2735 static void idpf_rx_csum(struct idpf_rx_queue *rxq, struct sk_buff *skb, 2736 struct libeth_rx_csum csum_bits, 2737 struct libeth_rx_pt decoded) 2738 { 2739 bool ipv4, ipv6; 2740 2741 /* check if Rx checksum is enabled */ 2742 if (!libeth_rx_pt_has_checksum(rxq->netdev, decoded)) 2743 return; 2744 2745 /* check if HW has decoded the packet and checksum */ 2746 if (unlikely(!csum_bits.l3l4p)) 2747 return; 2748 2749 ipv4 = libeth_rx_pt_get_ip_ver(decoded) == LIBETH_RX_PT_OUTER_IPV4; 2750 ipv6 = libeth_rx_pt_get_ip_ver(decoded) == LIBETH_RX_PT_OUTER_IPV6; 2751 2752 if (unlikely(ipv4 && (csum_bits.ipe || csum_bits.eipe))) 2753 goto checksum_fail; 2754 2755 if (unlikely(ipv6 && csum_bits.ipv6exadd)) 2756 return; 2757 2758 /* check for L4 errors and handle packets that were not able to be 2759 * checksummed 2760 */ 2761 if (unlikely(csum_bits.l4e)) 2762 goto checksum_fail; 2763 2764 if (!csum_bits.raw_csum_valid || 2765 decoded.inner_prot == LIBETH_RX_PT_INNER_SCTP) { 2766 skb->ip_summed = CHECKSUM_UNNECESSARY; 2767 return; 2768 } 2769 2770 skb->csum = csum_unfold((__force __sum16)~swab16(csum_bits.raw_csum)); 2771 skb->ip_summed = CHECKSUM_COMPLETE; 2772 2773 return; 2774 2775 checksum_fail: 2776 u64_stats_update_begin(&rxq->stats_sync); 2777 u64_stats_inc(&rxq->q_stats.hw_csum_err); 2778 u64_stats_update_end(&rxq->stats_sync); 2779 } 2780 2781 /** 2782 * idpf_rx_splitq_extract_csum_bits - Extract checksum bits from descriptor 2783 * @rx_desc: receive descriptor 2784 * 2785 * Return: parsed checksum status. 2786 **/ 2787 static struct libeth_rx_csum 2788 idpf_rx_splitq_extract_csum_bits(const struct virtchnl2_rx_flex_desc_adv_nic_3 *rx_desc) 2789 { 2790 struct libeth_rx_csum csum = { }; 2791 u8 qword0, qword1; 2792 2793 qword0 = rx_desc->status_err0_qw0; 2794 qword1 = rx_desc->status_err0_qw1; 2795 2796 csum.ipe = FIELD_GET(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_XSUM_IPE_M, 2797 qword1); 2798 csum.eipe = FIELD_GET(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_XSUM_EIPE_M, 2799 qword1); 2800 csum.l4e = FIELD_GET(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_XSUM_L4E_M, 2801 qword1); 2802 csum.l3l4p = FIELD_GET(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_L3L4P_M, 2803 qword1); 2804 csum.ipv6exadd = FIELD_GET(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_IPV6EXADD_M, 2805 qword0); 2806 csum.raw_csum_valid = 2807 !le16_get_bits(rx_desc->ptype_err_fflags0, 2808 VIRTCHNL2_RX_FLEX_DESC_ADV_RAW_CSUM_INV_M); 2809 csum.raw_csum = le16_to_cpu(rx_desc->misc.raw_cs); 2810 2811 return csum; 2812 } 2813 2814 /** 2815 * idpf_rx_rsc - Set the RSC fields in the skb 2816 * @rxq : Rx descriptor ring packet is being transacted on 2817 * @skb : pointer to current skb being populated 2818 * @rx_desc: Receive descriptor 2819 * @decoded: Decoded Rx packet type related fields 2820 * 2821 * Return 0 on success and error code on failure 2822 * 2823 * Populate the skb fields with the total number of RSC segments, RSC payload 2824 * length and packet type. 2825 */ 2826 static int idpf_rx_rsc(struct idpf_rx_queue *rxq, struct sk_buff *skb, 2827 const struct virtchnl2_rx_flex_desc_adv_nic_3 *rx_desc, 2828 struct libeth_rx_pt decoded) 2829 { 2830 u16 rsc_segments, rsc_seg_len; 2831 bool ipv4, ipv6; 2832 int len; 2833 2834 if (unlikely(libeth_rx_pt_get_ip_ver(decoded) == 2835 LIBETH_RX_PT_OUTER_L2)) 2836 return -EINVAL; 2837 2838 rsc_seg_len = le16_to_cpu(rx_desc->misc.rscseglen); 2839 if (unlikely(!rsc_seg_len)) 2840 return -EINVAL; 2841 2842 ipv4 = libeth_rx_pt_get_ip_ver(decoded) == LIBETH_RX_PT_OUTER_IPV4; 2843 ipv6 = libeth_rx_pt_get_ip_ver(decoded) == LIBETH_RX_PT_OUTER_IPV6; 2844 2845 if (unlikely(!(ipv4 ^ ipv6))) 2846 return -EINVAL; 2847 2848 rsc_segments = DIV_ROUND_UP(skb->data_len, rsc_seg_len); 2849 2850 NAPI_GRO_CB(skb)->count = rsc_segments; 2851 skb_shinfo(skb)->gso_size = rsc_seg_len; 2852 2853 skb_reset_network_header(skb); 2854 2855 if (ipv4) { 2856 struct iphdr *ipv4h = ip_hdr(skb); 2857 2858 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4; 2859 2860 /* Reset and set transport header offset in skb */ 2861 skb_set_transport_header(skb, sizeof(struct iphdr)); 2862 len = skb->len - skb_transport_offset(skb); 2863 2864 /* Compute the TCP pseudo header checksum*/ 2865 tcp_hdr(skb)->check = 2866 ~tcp_v4_check(len, ipv4h->saddr, ipv4h->daddr, 0); 2867 } else { 2868 struct ipv6hdr *ipv6h = ipv6_hdr(skb); 2869 2870 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6; 2871 skb_set_transport_header(skb, sizeof(struct ipv6hdr)); 2872 len = skb->len - skb_transport_offset(skb); 2873 tcp_hdr(skb)->check = 2874 ~tcp_v6_check(len, &ipv6h->saddr, &ipv6h->daddr, 0); 2875 } 2876 2877 tcp_gro_complete(skb); 2878 2879 u64_stats_update_begin(&rxq->stats_sync); 2880 u64_stats_inc(&rxq->q_stats.rsc_pkts); 2881 u64_stats_update_end(&rxq->stats_sync); 2882 2883 return 0; 2884 } 2885 2886 /** 2887 * idpf_rx_hwtstamp - check for an RX timestamp and pass up the stack 2888 * @rxq: pointer to the rx queue that receives the timestamp 2889 * @rx_desc: pointer to rx descriptor containing timestamp 2890 * @skb: skb to put timestamp in 2891 */ 2892 static void 2893 idpf_rx_hwtstamp(const struct idpf_rx_queue *rxq, 2894 const struct virtchnl2_rx_flex_desc_adv_nic_3 *rx_desc, 2895 struct sk_buff *skb) 2896 { 2897 u64 cached_time, ts_ns; 2898 u32 ts_high; 2899 2900 if (!(rx_desc->ts_low & VIRTCHNL2_RX_FLEX_TSTAMP_VALID)) 2901 return; 2902 2903 cached_time = READ_ONCE(rxq->cached_phc_time); 2904 2905 ts_high = le32_to_cpu(rx_desc->ts_high); 2906 ts_ns = idpf_ptp_tstamp_extend_32b_to_64b(cached_time, ts_high); 2907 2908 *skb_hwtstamps(skb) = (struct skb_shared_hwtstamps) { 2909 .hwtstamp = ns_to_ktime(ts_ns), 2910 }; 2911 } 2912 2913 /** 2914 * idpf_rx_process_skb_fields - Populate skb header fields from Rx descriptor 2915 * @rxq: Rx descriptor ring packet is being transacted on 2916 * @skb: pointer to current skb being populated 2917 * @rx_desc: Receive descriptor 2918 * 2919 * This function checks the ring, descriptor, and packet information in 2920 * order to populate the hash, checksum, protocol, and 2921 * other fields within the skb. 2922 */ 2923 static int 2924 idpf_rx_process_skb_fields(struct idpf_rx_queue *rxq, struct sk_buff *skb, 2925 const struct virtchnl2_rx_flex_desc_adv_nic_3 *rx_desc) 2926 { 2927 struct libeth_rx_csum csum_bits; 2928 struct libeth_rx_pt decoded; 2929 u16 rx_ptype; 2930 2931 rx_ptype = le16_get_bits(rx_desc->ptype_err_fflags0, 2932 VIRTCHNL2_RX_FLEX_DESC_ADV_PTYPE_M); 2933 decoded = rxq->rx_ptype_lkup[rx_ptype]; 2934 2935 /* process RSS/hash */ 2936 idpf_rx_hash(rxq, skb, rx_desc, decoded); 2937 2938 if (idpf_queue_has(PTP, rxq)) 2939 idpf_rx_hwtstamp(rxq, rx_desc, skb); 2940 2941 skb->protocol = eth_type_trans(skb, rxq->netdev); 2942 skb_record_rx_queue(skb, rxq->idx); 2943 2944 if (le16_get_bits(rx_desc->hdrlen_flags, 2945 VIRTCHNL2_RX_FLEX_DESC_ADV_RSC_M)) 2946 return idpf_rx_rsc(rxq, skb, rx_desc, decoded); 2947 2948 csum_bits = idpf_rx_splitq_extract_csum_bits(rx_desc); 2949 idpf_rx_csum(rxq, skb, csum_bits, decoded); 2950 2951 return 0; 2952 } 2953 2954 /** 2955 * idpf_rx_add_frag - Add contents of Rx buffer to sk_buff as a frag 2956 * @rx_buf: buffer containing page to add 2957 * @skb: sk_buff to place the data into 2958 * @size: packet length from rx_desc 2959 * 2960 * This function will add the data contained in rx_buf->page to the skb. 2961 * It will just attach the page as a frag to the skb. 2962 * The function will then update the page offset. 2963 */ 2964 void idpf_rx_add_frag(struct idpf_rx_buf *rx_buf, struct sk_buff *skb, 2965 unsigned int size) 2966 { 2967 u32 hr = netmem_get_pp(rx_buf->netmem)->p.offset; 2968 2969 skb_add_rx_frag_netmem(skb, skb_shinfo(skb)->nr_frags, rx_buf->netmem, 2970 rx_buf->offset + hr, size, rx_buf->truesize); 2971 } 2972 2973 /** 2974 * idpf_rx_hsplit_wa - handle header buffer overflows and split errors 2975 * @hdr: Rx buffer for the headers 2976 * @buf: Rx buffer for the payload 2977 * @data_len: number of bytes received to the payload buffer 2978 * 2979 * When a header buffer overflow occurs or the HW was unable do parse the 2980 * packet type to perform header split, the whole frame gets placed to the 2981 * payload buffer. We can't build a valid skb around a payload buffer when 2982 * the header split is active since it doesn't reserve any head- or tailroom. 2983 * In that case, copy either the whole frame when it's short or just the 2984 * Ethernet header to the header buffer to be able to build an skb and adjust 2985 * the data offset in the payload buffer, IOW emulate the header split. 2986 * 2987 * Return: number of bytes copied to the header buffer. 2988 */ 2989 static u32 idpf_rx_hsplit_wa(const struct libeth_fqe *hdr, 2990 struct libeth_fqe *buf, u32 data_len) 2991 { 2992 u32 copy = data_len <= L1_CACHE_BYTES ? data_len : ETH_HLEN; 2993 struct page *hdr_page, *buf_page; 2994 const void *src; 2995 void *dst; 2996 2997 if (unlikely(netmem_is_net_iov(buf->netmem)) || 2998 !libeth_rx_sync_for_cpu(buf, copy)) 2999 return 0; 3000 3001 hdr_page = __netmem_to_page(hdr->netmem); 3002 buf_page = __netmem_to_page(buf->netmem); 3003 dst = page_address(hdr_page) + hdr->offset + 3004 pp_page_to_nmdesc(hdr_page)->pp->p.offset; 3005 src = page_address(buf_page) + buf->offset + 3006 pp_page_to_nmdesc(buf_page)->pp->p.offset; 3007 3008 memcpy(dst, src, LARGEST_ALIGN(copy)); 3009 buf->offset += copy; 3010 3011 return copy; 3012 } 3013 3014 /** 3015 * idpf_rx_build_skb - Allocate skb and populate it from header buffer 3016 * @buf: Rx buffer to pull data from 3017 * @size: the length of the packet 3018 * 3019 * This function allocates an skb. It then populates it with the page data from 3020 * the current receive descriptor, taking care to set up the skb correctly. 3021 */ 3022 struct sk_buff *idpf_rx_build_skb(const struct libeth_fqe *buf, u32 size) 3023 { 3024 struct page *buf_page = __netmem_to_page(buf->netmem); 3025 u32 hr = pp_page_to_nmdesc(buf_page)->pp->p.offset; 3026 struct sk_buff *skb; 3027 void *va; 3028 3029 va = page_address(buf_page) + buf->offset; 3030 prefetch(va + hr); 3031 3032 skb = napi_build_skb(va, buf->truesize); 3033 if (unlikely(!skb)) 3034 return NULL; 3035 3036 skb_mark_for_recycle(skb); 3037 3038 skb_reserve(skb, hr); 3039 __skb_put(skb, size); 3040 3041 return skb; 3042 } 3043 3044 /** 3045 * idpf_rx_splitq_test_staterr - tests bits in Rx descriptor 3046 * status and error fields 3047 * @stat_err_field: field from descriptor to test bits in 3048 * @stat_err_bits: value to mask 3049 * 3050 */ 3051 static bool idpf_rx_splitq_test_staterr(const u8 stat_err_field, 3052 const u8 stat_err_bits) 3053 { 3054 return !!(stat_err_field & stat_err_bits); 3055 } 3056 3057 /** 3058 * idpf_rx_splitq_is_eop - process handling of EOP buffers 3059 * @rx_desc: Rx descriptor for current buffer 3060 * 3061 * If the buffer is an EOP buffer, this function exits returning true, 3062 * otherwise return false indicating that this is in fact a non-EOP buffer. 3063 */ 3064 static bool idpf_rx_splitq_is_eop(struct virtchnl2_rx_flex_desc_adv_nic_3 *rx_desc) 3065 { 3066 /* if we are the last buffer then there is nothing else to do */ 3067 return likely(idpf_rx_splitq_test_staterr(rx_desc->status_err0_qw1, 3068 IDPF_RXD_EOF_SPLITQ)); 3069 } 3070 3071 /** 3072 * idpf_rx_splitq_clean - Clean completed descriptors from Rx queue 3073 * @rxq: Rx descriptor queue to retrieve receive buffer queue 3074 * @budget: Total limit on number of packets to process 3075 * 3076 * This function provides a "bounce buffer" approach to Rx interrupt 3077 * processing. The advantage to this is that on systems that have 3078 * expensive overhead for IOMMU access this provides a means of avoiding 3079 * it by maintaining the mapping of the page to the system. 3080 * 3081 * Returns amount of work completed 3082 */ 3083 static int idpf_rx_splitq_clean(struct idpf_rx_queue *rxq, int budget) 3084 { 3085 int total_rx_bytes = 0, total_rx_pkts = 0; 3086 struct idpf_buf_queue *rx_bufq = NULL; 3087 struct sk_buff *skb = rxq->skb; 3088 u16 ntc = rxq->next_to_clean; 3089 3090 /* Process Rx packets bounded by budget */ 3091 while (likely(total_rx_pkts < budget)) { 3092 struct virtchnl2_rx_flex_desc_adv_nic_3 *rx_desc; 3093 struct libeth_fqe *hdr, *rx_buf = NULL; 3094 struct idpf_sw_queue *refillq = NULL; 3095 struct idpf_rxq_set *rxq_set = NULL; 3096 unsigned int pkt_len = 0; 3097 unsigned int hdr_len = 0; 3098 u16 gen_id, buf_id = 0; 3099 int bufq_id; 3100 u8 rxdid; 3101 3102 /* get the Rx desc from Rx queue based on 'next_to_clean' */ 3103 rx_desc = &rxq->rx[ntc].flex_adv_nic_3_wb; 3104 3105 /* This memory barrier is needed to keep us from reading 3106 * any other fields out of the rx_desc 3107 */ 3108 dma_rmb(); 3109 3110 /* if the descriptor isn't done, no work yet to do */ 3111 gen_id = le16_get_bits(rx_desc->pktlen_gen_bufq_id, 3112 VIRTCHNL2_RX_FLEX_DESC_ADV_GEN_M); 3113 3114 if (idpf_queue_has(GEN_CHK, rxq) != gen_id) 3115 break; 3116 3117 rxdid = FIELD_GET(VIRTCHNL2_RX_FLEX_DESC_ADV_RXDID_M, 3118 rx_desc->rxdid_ucast); 3119 if (rxdid != VIRTCHNL2_RXDID_2_FLEX_SPLITQ) { 3120 IDPF_RX_BUMP_NTC(rxq, ntc); 3121 u64_stats_update_begin(&rxq->stats_sync); 3122 u64_stats_inc(&rxq->q_stats.bad_descs); 3123 u64_stats_update_end(&rxq->stats_sync); 3124 continue; 3125 } 3126 3127 pkt_len = le16_get_bits(rx_desc->pktlen_gen_bufq_id, 3128 VIRTCHNL2_RX_FLEX_DESC_ADV_LEN_PBUF_M); 3129 3130 bufq_id = le16_get_bits(rx_desc->pktlen_gen_bufq_id, 3131 VIRTCHNL2_RX_FLEX_DESC_ADV_BUFQ_ID_M); 3132 3133 rxq_set = container_of(rxq, struct idpf_rxq_set, rxq); 3134 refillq = rxq_set->refillq[bufq_id]; 3135 3136 /* retrieve buffer from the rxq */ 3137 rx_bufq = &rxq->bufq_sets[bufq_id].bufq; 3138 3139 buf_id = le16_to_cpu(rx_desc->buf_id); 3140 3141 rx_buf = &rx_bufq->buf[buf_id]; 3142 3143 if (!rx_bufq->hdr_pp) 3144 goto payload; 3145 3146 #define __HBO_BIT VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_HBO_M 3147 #define __HDR_LEN_MASK VIRTCHNL2_RX_FLEX_DESC_ADV_LEN_HDR_M 3148 if (likely(!(rx_desc->status_err0_qw1 & __HBO_BIT))) 3149 /* If a header buffer overflow, occurs, i.e. header is 3150 * too large to fit in the header split buffer, HW will 3151 * put the entire packet, including headers, in the 3152 * data/payload buffer. 3153 */ 3154 hdr_len = le16_get_bits(rx_desc->hdrlen_flags, 3155 __HDR_LEN_MASK); 3156 #undef __HDR_LEN_MASK 3157 #undef __HBO_BIT 3158 3159 hdr = &rx_bufq->hdr_buf[buf_id]; 3160 3161 if (unlikely(!hdr_len && !skb)) { 3162 hdr_len = idpf_rx_hsplit_wa(hdr, rx_buf, pkt_len); 3163 /* If failed, drop both buffers by setting len to 0 */ 3164 pkt_len -= hdr_len ? : pkt_len; 3165 3166 u64_stats_update_begin(&rxq->stats_sync); 3167 u64_stats_inc(&rxq->q_stats.hsplit_buf_ovf); 3168 u64_stats_update_end(&rxq->stats_sync); 3169 } 3170 3171 if (libeth_rx_sync_for_cpu(hdr, hdr_len)) { 3172 skb = idpf_rx_build_skb(hdr, hdr_len); 3173 if (!skb) 3174 break; 3175 3176 u64_stats_update_begin(&rxq->stats_sync); 3177 u64_stats_inc(&rxq->q_stats.hsplit_pkts); 3178 u64_stats_update_end(&rxq->stats_sync); 3179 } 3180 3181 hdr->netmem = 0; 3182 3183 payload: 3184 if (!libeth_rx_sync_for_cpu(rx_buf, pkt_len)) 3185 goto skip_data; 3186 3187 if (skb) 3188 idpf_rx_add_frag(rx_buf, skb, pkt_len); 3189 else 3190 skb = idpf_rx_build_skb(rx_buf, pkt_len); 3191 3192 /* exit if we failed to retrieve a buffer */ 3193 if (!skb) 3194 break; 3195 3196 skip_data: 3197 rx_buf->netmem = 0; 3198 3199 idpf_post_buf_refill(refillq, buf_id); 3200 IDPF_RX_BUMP_NTC(rxq, ntc); 3201 3202 /* skip if it is non EOP desc */ 3203 if (!idpf_rx_splitq_is_eop(rx_desc) || unlikely(!skb)) 3204 continue; 3205 3206 /* pad skb if needed (to make valid ethernet frame) */ 3207 if (eth_skb_pad(skb)) { 3208 skb = NULL; 3209 continue; 3210 } 3211 3212 /* probably a little skewed due to removing CRC */ 3213 total_rx_bytes += skb->len; 3214 3215 /* protocol */ 3216 if (unlikely(idpf_rx_process_skb_fields(rxq, skb, rx_desc))) { 3217 dev_kfree_skb_any(skb); 3218 skb = NULL; 3219 continue; 3220 } 3221 3222 /* send completed skb up the stack */ 3223 napi_gro_receive(rxq->napi, skb); 3224 skb = NULL; 3225 3226 /* update budget accounting */ 3227 total_rx_pkts++; 3228 } 3229 3230 rxq->next_to_clean = ntc; 3231 3232 rxq->skb = skb; 3233 u64_stats_update_begin(&rxq->stats_sync); 3234 u64_stats_add(&rxq->q_stats.packets, total_rx_pkts); 3235 u64_stats_add(&rxq->q_stats.bytes, total_rx_bytes); 3236 u64_stats_update_end(&rxq->stats_sync); 3237 3238 /* guarantee a trip back through this routine if there was a failure */ 3239 return total_rx_pkts; 3240 } 3241 3242 /** 3243 * idpf_rx_update_bufq_desc - Update buffer queue descriptor 3244 * @bufq: Pointer to the buffer queue 3245 * @buf_id: buffer ID 3246 * @buf_desc: Buffer queue descriptor 3247 * 3248 * Return 0 on success and negative on failure. 3249 */ 3250 static int idpf_rx_update_bufq_desc(struct idpf_buf_queue *bufq, u32 buf_id, 3251 struct virtchnl2_splitq_rx_buf_desc *buf_desc) 3252 { 3253 struct libeth_fq_fp fq = { 3254 .pp = bufq->pp, 3255 .fqes = bufq->buf, 3256 .truesize = bufq->truesize, 3257 .count = bufq->desc_count, 3258 }; 3259 dma_addr_t addr; 3260 3261 addr = libeth_rx_alloc(&fq, buf_id); 3262 if (addr == DMA_MAPPING_ERROR) 3263 return -ENOMEM; 3264 3265 buf_desc->pkt_addr = cpu_to_le64(addr); 3266 buf_desc->qword0.buf_id = cpu_to_le16(buf_id); 3267 3268 if (!idpf_queue_has(HSPLIT_EN, bufq)) 3269 return 0; 3270 3271 fq.pp = bufq->hdr_pp; 3272 fq.fqes = bufq->hdr_buf; 3273 fq.truesize = bufq->hdr_truesize; 3274 3275 addr = libeth_rx_alloc(&fq, buf_id); 3276 if (addr == DMA_MAPPING_ERROR) 3277 return -ENOMEM; 3278 3279 buf_desc->hdr_addr = cpu_to_le64(addr); 3280 3281 return 0; 3282 } 3283 3284 /** 3285 * idpf_rx_clean_refillq - Clean refill queue buffers 3286 * @bufq: buffer queue to post buffers back to 3287 * @refillq: refill queue to clean 3288 * 3289 * This function takes care of the buffer refill management 3290 */ 3291 static void idpf_rx_clean_refillq(struct idpf_buf_queue *bufq, 3292 struct idpf_sw_queue *refillq) 3293 { 3294 struct virtchnl2_splitq_rx_buf_desc *buf_desc; 3295 u16 bufq_nta = bufq->next_to_alloc; 3296 u16 ntc = refillq->next_to_clean; 3297 int cleaned = 0; 3298 3299 buf_desc = &bufq->split_buf[bufq_nta]; 3300 3301 /* make sure we stop at ring wrap in the unlikely case ring is full */ 3302 while (likely(cleaned < refillq->desc_count)) { 3303 u32 buf_id, refill_desc = refillq->ring[ntc]; 3304 bool failure; 3305 3306 if (idpf_queue_has(RFL_GEN_CHK, refillq) != 3307 !!(refill_desc & IDPF_RFL_BI_GEN_M)) 3308 break; 3309 3310 buf_id = FIELD_GET(IDPF_RFL_BI_BUFID_M, refill_desc); 3311 failure = idpf_rx_update_bufq_desc(bufq, buf_id, buf_desc); 3312 if (failure) 3313 break; 3314 3315 if (unlikely(++ntc == refillq->desc_count)) { 3316 idpf_queue_change(RFL_GEN_CHK, refillq); 3317 ntc = 0; 3318 } 3319 3320 if (unlikely(++bufq_nta == bufq->desc_count)) { 3321 buf_desc = &bufq->split_buf[0]; 3322 bufq_nta = 0; 3323 } else { 3324 buf_desc++; 3325 } 3326 3327 cleaned++; 3328 } 3329 3330 if (!cleaned) 3331 return; 3332 3333 /* We want to limit how many transactions on the bus we trigger with 3334 * tail writes so we only do it in strides. It's also important we 3335 * align the write to a multiple of 8 as required by HW. 3336 */ 3337 if (((bufq->next_to_use <= bufq_nta ? 0 : bufq->desc_count) + 3338 bufq_nta - bufq->next_to_use) >= IDPF_RX_BUF_POST_STRIDE) 3339 idpf_rx_buf_hw_update(bufq, ALIGN_DOWN(bufq_nta, 3340 IDPF_RX_BUF_POST_STRIDE)); 3341 3342 /* update next to alloc since we have filled the ring */ 3343 refillq->next_to_clean = ntc; 3344 bufq->next_to_alloc = bufq_nta; 3345 } 3346 3347 /** 3348 * idpf_rx_clean_refillq_all - Clean all refill queues 3349 * @bufq: buffer queue with refill queues 3350 * @nid: ID of the closest NUMA node with memory 3351 * 3352 * Iterates through all refill queues assigned to the buffer queue assigned to 3353 * this vector. Returns true if clean is complete within budget, false 3354 * otherwise. 3355 */ 3356 static void idpf_rx_clean_refillq_all(struct idpf_buf_queue *bufq, int nid) 3357 { 3358 struct idpf_bufq_set *bufq_set; 3359 int i; 3360 3361 page_pool_nid_changed(bufq->pp, nid); 3362 if (bufq->hdr_pp) 3363 page_pool_nid_changed(bufq->hdr_pp, nid); 3364 3365 bufq_set = container_of(bufq, struct idpf_bufq_set, bufq); 3366 for (i = 0; i < bufq_set->num_refillqs; i++) 3367 idpf_rx_clean_refillq(bufq, &bufq_set->refillqs[i]); 3368 } 3369 3370 /** 3371 * idpf_vport_intr_clean_queues - MSIX mode Interrupt Handler 3372 * @irq: interrupt number 3373 * @data: pointer to a q_vector 3374 * 3375 */ 3376 static irqreturn_t idpf_vport_intr_clean_queues(int __always_unused irq, 3377 void *data) 3378 { 3379 struct idpf_q_vector *q_vector = (struct idpf_q_vector *)data; 3380 3381 q_vector->total_events++; 3382 napi_schedule(&q_vector->napi); 3383 3384 return IRQ_HANDLED; 3385 } 3386 3387 /** 3388 * idpf_vport_intr_napi_del_all - Unregister napi for all q_vectors in vport 3389 * @vport: virtual port structure 3390 * 3391 */ 3392 static void idpf_vport_intr_napi_del_all(struct idpf_vport *vport) 3393 { 3394 u16 v_idx; 3395 3396 for (v_idx = 0; v_idx < vport->num_q_vectors; v_idx++) 3397 netif_napi_del(&vport->q_vectors[v_idx].napi); 3398 } 3399 3400 /** 3401 * idpf_vport_intr_napi_dis_all - Disable NAPI for all q_vectors in the vport 3402 * @vport: main vport structure 3403 */ 3404 static void idpf_vport_intr_napi_dis_all(struct idpf_vport *vport) 3405 { 3406 int v_idx; 3407 3408 for (v_idx = 0; v_idx < vport->num_q_vectors; v_idx++) 3409 napi_disable(&vport->q_vectors[v_idx].napi); 3410 } 3411 3412 /** 3413 * idpf_vport_intr_rel - Free memory allocated for interrupt vectors 3414 * @vport: virtual port 3415 * 3416 * Free the memory allocated for interrupt vectors associated to a vport 3417 */ 3418 void idpf_vport_intr_rel(struct idpf_vport *vport) 3419 { 3420 for (u32 v_idx = 0; v_idx < vport->num_q_vectors; v_idx++) { 3421 struct idpf_q_vector *q_vector = &vport->q_vectors[v_idx]; 3422 3423 kfree(q_vector->complq); 3424 q_vector->complq = NULL; 3425 kfree(q_vector->bufq); 3426 q_vector->bufq = NULL; 3427 kfree(q_vector->tx); 3428 q_vector->tx = NULL; 3429 kfree(q_vector->rx); 3430 q_vector->rx = NULL; 3431 } 3432 3433 kfree(vport->q_vectors); 3434 vport->q_vectors = NULL; 3435 } 3436 3437 /** 3438 * idpf_vport_intr_rel_irq - Free the IRQ association with the OS 3439 * @vport: main vport structure 3440 */ 3441 static void idpf_vport_intr_rel_irq(struct idpf_vport *vport) 3442 { 3443 struct idpf_adapter *adapter = vport->adapter; 3444 int vector; 3445 3446 for (vector = 0; vector < vport->num_q_vectors; vector++) { 3447 struct idpf_q_vector *q_vector = &vport->q_vectors[vector]; 3448 int irq_num, vidx; 3449 3450 /* free only the irqs that were actually requested */ 3451 if (!q_vector) 3452 continue; 3453 3454 vidx = vport->q_vector_idxs[vector]; 3455 irq_num = adapter->msix_entries[vidx].vector; 3456 3457 kfree(free_irq(irq_num, q_vector)); 3458 } 3459 } 3460 3461 /** 3462 * idpf_vport_intr_dis_irq_all - Disable all interrupt 3463 * @vport: main vport structure 3464 */ 3465 static void idpf_vport_intr_dis_irq_all(struct idpf_vport *vport) 3466 { 3467 struct idpf_q_vector *q_vector = vport->q_vectors; 3468 int q_idx; 3469 3470 for (q_idx = 0; q_idx < vport->num_q_vectors; q_idx++) 3471 writel(0, q_vector[q_idx].intr_reg.dyn_ctl); 3472 } 3473 3474 /** 3475 * idpf_vport_intr_buildreg_itr - Enable default interrupt generation settings 3476 * @q_vector: pointer to q_vector 3477 */ 3478 static u32 idpf_vport_intr_buildreg_itr(struct idpf_q_vector *q_vector) 3479 { 3480 u32 itr_val = q_vector->intr_reg.dyn_ctl_intena_m; 3481 int type = IDPF_NO_ITR_UPDATE_IDX; 3482 u16 itr = 0; 3483 3484 if (q_vector->wb_on_itr) { 3485 /* 3486 * Trigger a software interrupt when exiting wb_on_itr, to make 3487 * sure we catch any pending write backs that might have been 3488 * missed due to interrupt state transition. 3489 */ 3490 itr_val |= q_vector->intr_reg.dyn_ctl_swint_trig_m | 3491 q_vector->intr_reg.dyn_ctl_sw_itridx_ena_m; 3492 type = IDPF_SW_ITR_UPDATE_IDX; 3493 itr = IDPF_ITR_20K; 3494 } 3495 3496 itr &= IDPF_ITR_MASK; 3497 /* Don't clear PBA because that can cause lost interrupts that 3498 * came in while we were cleaning/polling 3499 */ 3500 itr_val |= (type << q_vector->intr_reg.dyn_ctl_itridx_s) | 3501 (itr << (q_vector->intr_reg.dyn_ctl_intrvl_s - 1)); 3502 3503 return itr_val; 3504 } 3505 3506 /** 3507 * idpf_update_dim_sample - Update dim sample with packets and bytes 3508 * @q_vector: the vector associated with the interrupt 3509 * @dim_sample: dim sample to update 3510 * @dim: dim instance structure 3511 * @packets: total packets 3512 * @bytes: total bytes 3513 * 3514 * Update the dim sample with the packets and bytes which are passed to this 3515 * function. Set the dim state appropriately if the dim settings gets stale. 3516 */ 3517 static void idpf_update_dim_sample(struct idpf_q_vector *q_vector, 3518 struct dim_sample *dim_sample, 3519 struct dim *dim, u64 packets, u64 bytes) 3520 { 3521 dim_update_sample(q_vector->total_events, packets, bytes, dim_sample); 3522 dim_sample->comp_ctr = 0; 3523 3524 /* if dim settings get stale, like when not updated for 1 second or 3525 * longer, force it to start again. This addresses the frequent case 3526 * of an idle queue being switched to by the scheduler. 3527 */ 3528 if (ktime_ms_delta(dim_sample->time, dim->start_sample.time) >= HZ) 3529 dim->state = DIM_START_MEASURE; 3530 } 3531 3532 /** 3533 * idpf_net_dim - Update net DIM algorithm 3534 * @q_vector: the vector associated with the interrupt 3535 * 3536 * Create a DIM sample and notify net_dim() so that it can possibly decide 3537 * a new ITR value based on incoming packets, bytes, and interrupts. 3538 * 3539 * This function is a no-op if the queue is not configured to dynamic ITR. 3540 */ 3541 static void idpf_net_dim(struct idpf_q_vector *q_vector) 3542 { 3543 struct dim_sample dim_sample = { }; 3544 u64 packets, bytes; 3545 u32 i; 3546 3547 if (!IDPF_ITR_IS_DYNAMIC(q_vector->tx_intr_mode)) 3548 goto check_rx_itr; 3549 3550 for (i = 0, packets = 0, bytes = 0; i < q_vector->num_txq; i++) { 3551 struct idpf_tx_queue *txq = q_vector->tx[i]; 3552 unsigned int start; 3553 3554 do { 3555 start = u64_stats_fetch_begin(&txq->stats_sync); 3556 packets += u64_stats_read(&txq->q_stats.packets); 3557 bytes += u64_stats_read(&txq->q_stats.bytes); 3558 } while (u64_stats_fetch_retry(&txq->stats_sync, start)); 3559 } 3560 3561 idpf_update_dim_sample(q_vector, &dim_sample, &q_vector->tx_dim, 3562 packets, bytes); 3563 net_dim(&q_vector->tx_dim, &dim_sample); 3564 3565 check_rx_itr: 3566 if (!IDPF_ITR_IS_DYNAMIC(q_vector->rx_intr_mode)) 3567 return; 3568 3569 for (i = 0, packets = 0, bytes = 0; i < q_vector->num_rxq; i++) { 3570 struct idpf_rx_queue *rxq = q_vector->rx[i]; 3571 unsigned int start; 3572 3573 do { 3574 start = u64_stats_fetch_begin(&rxq->stats_sync); 3575 packets += u64_stats_read(&rxq->q_stats.packets); 3576 bytes += u64_stats_read(&rxq->q_stats.bytes); 3577 } while (u64_stats_fetch_retry(&rxq->stats_sync, start)); 3578 } 3579 3580 idpf_update_dim_sample(q_vector, &dim_sample, &q_vector->rx_dim, 3581 packets, bytes); 3582 net_dim(&q_vector->rx_dim, &dim_sample); 3583 } 3584 3585 /** 3586 * idpf_vport_intr_update_itr_ena_irq - Update itr and re-enable MSIX interrupt 3587 * @q_vector: q_vector for which itr is being updated and interrupt enabled 3588 * 3589 * Update the net_dim() algorithm and re-enable the interrupt associated with 3590 * this vector. 3591 */ 3592 void idpf_vport_intr_update_itr_ena_irq(struct idpf_q_vector *q_vector) 3593 { 3594 u32 intval; 3595 3596 /* net_dim() updates ITR out-of-band using a work item */ 3597 idpf_net_dim(q_vector); 3598 3599 intval = idpf_vport_intr_buildreg_itr(q_vector); 3600 q_vector->wb_on_itr = false; 3601 3602 writel(intval, q_vector->intr_reg.dyn_ctl); 3603 } 3604 3605 /** 3606 * idpf_vport_intr_req_irq - get MSI-X vectors from the OS for the vport 3607 * @vport: main vport structure 3608 */ 3609 static int idpf_vport_intr_req_irq(struct idpf_vport *vport) 3610 { 3611 struct idpf_adapter *adapter = vport->adapter; 3612 const char *drv_name, *if_name, *vec_name; 3613 int vector, err, irq_num, vidx; 3614 3615 drv_name = dev_driver_string(&adapter->pdev->dev); 3616 if_name = netdev_name(vport->netdev); 3617 3618 for (vector = 0; vector < vport->num_q_vectors; vector++) { 3619 struct idpf_q_vector *q_vector = &vport->q_vectors[vector]; 3620 char *name; 3621 3622 vidx = vport->q_vector_idxs[vector]; 3623 irq_num = adapter->msix_entries[vidx].vector; 3624 3625 if (q_vector->num_rxq && q_vector->num_txq) 3626 vec_name = "TxRx"; 3627 else if (q_vector->num_rxq) 3628 vec_name = "Rx"; 3629 else if (q_vector->num_txq) 3630 vec_name = "Tx"; 3631 else 3632 continue; 3633 3634 name = kasprintf(GFP_KERNEL, "%s-%s-%s-%d", drv_name, if_name, 3635 vec_name, vidx); 3636 3637 err = request_irq(irq_num, idpf_vport_intr_clean_queues, 0, 3638 name, q_vector); 3639 if (err) { 3640 netdev_err(vport->netdev, 3641 "Request_irq failed, error: %d\n", err); 3642 goto free_q_irqs; 3643 } 3644 } 3645 3646 return 0; 3647 3648 free_q_irqs: 3649 while (--vector >= 0) { 3650 vidx = vport->q_vector_idxs[vector]; 3651 irq_num = adapter->msix_entries[vidx].vector; 3652 kfree(free_irq(irq_num, &vport->q_vectors[vector])); 3653 } 3654 3655 return err; 3656 } 3657 3658 /** 3659 * idpf_vport_intr_write_itr - Write ITR value to the ITR register 3660 * @q_vector: q_vector structure 3661 * @itr: Interrupt throttling rate 3662 * @tx: Tx or Rx ITR 3663 */ 3664 void idpf_vport_intr_write_itr(struct idpf_q_vector *q_vector, u16 itr, bool tx) 3665 { 3666 struct idpf_intr_reg *intr_reg; 3667 3668 if (tx && !q_vector->tx) 3669 return; 3670 else if (!tx && !q_vector->rx) 3671 return; 3672 3673 intr_reg = &q_vector->intr_reg; 3674 writel(ITR_REG_ALIGN(itr) >> IDPF_ITR_GRAN_S, 3675 tx ? intr_reg->tx_itr : intr_reg->rx_itr); 3676 } 3677 3678 /** 3679 * idpf_vport_intr_ena_irq_all - Enable IRQ for the given vport 3680 * @vport: main vport structure 3681 */ 3682 static void idpf_vport_intr_ena_irq_all(struct idpf_vport *vport) 3683 { 3684 bool dynamic; 3685 int q_idx; 3686 u16 itr; 3687 3688 for (q_idx = 0; q_idx < vport->num_q_vectors; q_idx++) { 3689 struct idpf_q_vector *qv = &vport->q_vectors[q_idx]; 3690 3691 /* Set the initial ITR values */ 3692 if (qv->num_txq) { 3693 dynamic = IDPF_ITR_IS_DYNAMIC(qv->tx_intr_mode); 3694 itr = vport->tx_itr_profile[qv->tx_dim.profile_ix]; 3695 idpf_vport_intr_write_itr(qv, dynamic ? 3696 itr : qv->tx_itr_value, 3697 true); 3698 } 3699 3700 if (qv->num_rxq) { 3701 dynamic = IDPF_ITR_IS_DYNAMIC(qv->rx_intr_mode); 3702 itr = vport->rx_itr_profile[qv->rx_dim.profile_ix]; 3703 idpf_vport_intr_write_itr(qv, dynamic ? 3704 itr : qv->rx_itr_value, 3705 false); 3706 } 3707 3708 if (qv->num_txq || qv->num_rxq) 3709 idpf_vport_intr_update_itr_ena_irq(qv); 3710 } 3711 } 3712 3713 /** 3714 * idpf_vport_intr_deinit - Release all vector associations for the vport 3715 * @vport: main vport structure 3716 */ 3717 void idpf_vport_intr_deinit(struct idpf_vport *vport) 3718 { 3719 idpf_vport_intr_dis_irq_all(vport); 3720 idpf_vport_intr_napi_dis_all(vport); 3721 idpf_vport_intr_napi_del_all(vport); 3722 idpf_vport_intr_rel_irq(vport); 3723 } 3724 3725 /** 3726 * idpf_tx_dim_work - Call back from the stack 3727 * @work: work queue structure 3728 */ 3729 static void idpf_tx_dim_work(struct work_struct *work) 3730 { 3731 struct idpf_q_vector *q_vector; 3732 struct idpf_vport *vport; 3733 struct dim *dim; 3734 u16 itr; 3735 3736 dim = container_of(work, struct dim, work); 3737 q_vector = container_of(dim, struct idpf_q_vector, tx_dim); 3738 vport = q_vector->vport; 3739 3740 if (dim->profile_ix >= ARRAY_SIZE(vport->tx_itr_profile)) 3741 dim->profile_ix = ARRAY_SIZE(vport->tx_itr_profile) - 1; 3742 3743 /* look up the values in our local table */ 3744 itr = vport->tx_itr_profile[dim->profile_ix]; 3745 3746 idpf_vport_intr_write_itr(q_vector, itr, true); 3747 3748 dim->state = DIM_START_MEASURE; 3749 } 3750 3751 /** 3752 * idpf_rx_dim_work - Call back from the stack 3753 * @work: work queue structure 3754 */ 3755 static void idpf_rx_dim_work(struct work_struct *work) 3756 { 3757 struct idpf_q_vector *q_vector; 3758 struct idpf_vport *vport; 3759 struct dim *dim; 3760 u16 itr; 3761 3762 dim = container_of(work, struct dim, work); 3763 q_vector = container_of(dim, struct idpf_q_vector, rx_dim); 3764 vport = q_vector->vport; 3765 3766 if (dim->profile_ix >= ARRAY_SIZE(vport->rx_itr_profile)) 3767 dim->profile_ix = ARRAY_SIZE(vport->rx_itr_profile) - 1; 3768 3769 /* look up the values in our local table */ 3770 itr = vport->rx_itr_profile[dim->profile_ix]; 3771 3772 idpf_vport_intr_write_itr(q_vector, itr, false); 3773 3774 dim->state = DIM_START_MEASURE; 3775 } 3776 3777 /** 3778 * idpf_init_dim - Set up dynamic interrupt moderation 3779 * @qv: q_vector structure 3780 */ 3781 static void idpf_init_dim(struct idpf_q_vector *qv) 3782 { 3783 INIT_WORK(&qv->tx_dim.work, idpf_tx_dim_work); 3784 qv->tx_dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE; 3785 qv->tx_dim.profile_ix = IDPF_DIM_DEFAULT_PROFILE_IX; 3786 3787 INIT_WORK(&qv->rx_dim.work, idpf_rx_dim_work); 3788 qv->rx_dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE; 3789 qv->rx_dim.profile_ix = IDPF_DIM_DEFAULT_PROFILE_IX; 3790 } 3791 3792 /** 3793 * idpf_vport_intr_napi_ena_all - Enable NAPI for all q_vectors in the vport 3794 * @vport: main vport structure 3795 */ 3796 static void idpf_vport_intr_napi_ena_all(struct idpf_vport *vport) 3797 { 3798 int q_idx; 3799 3800 for (q_idx = 0; q_idx < vport->num_q_vectors; q_idx++) { 3801 struct idpf_q_vector *q_vector = &vport->q_vectors[q_idx]; 3802 3803 idpf_init_dim(q_vector); 3804 napi_enable(&q_vector->napi); 3805 } 3806 } 3807 3808 /** 3809 * idpf_tx_splitq_clean_all- Clean completion queues 3810 * @q_vec: queue vector 3811 * @budget: Used to determine if we are in netpoll 3812 * @cleaned: returns number of packets cleaned 3813 * 3814 * Returns false if clean is not complete else returns true 3815 */ 3816 static bool idpf_tx_splitq_clean_all(struct idpf_q_vector *q_vec, 3817 int budget, int *cleaned) 3818 { 3819 u16 num_complq = q_vec->num_complq; 3820 bool clean_complete = true; 3821 int i, budget_per_q; 3822 3823 if (unlikely(!num_complq)) 3824 return true; 3825 3826 budget_per_q = DIV_ROUND_UP(budget, num_complq); 3827 3828 for (i = 0; i < num_complq; i++) 3829 clean_complete &= idpf_tx_clean_complq(q_vec->complq[i], 3830 budget_per_q, cleaned); 3831 3832 return clean_complete; 3833 } 3834 3835 /** 3836 * idpf_rx_splitq_clean_all- Clean completion queues 3837 * @q_vec: queue vector 3838 * @budget: Used to determine if we are in netpoll 3839 * @cleaned: returns number of packets cleaned 3840 * 3841 * Returns false if clean is not complete else returns true 3842 */ 3843 static bool idpf_rx_splitq_clean_all(struct idpf_q_vector *q_vec, int budget, 3844 int *cleaned) 3845 { 3846 u16 num_rxq = q_vec->num_rxq; 3847 bool clean_complete = true; 3848 int pkts_cleaned = 0; 3849 int i, budget_per_q; 3850 int nid; 3851 3852 /* We attempt to distribute budget to each Rx queue fairly, but don't 3853 * allow the budget to go below 1 because that would exit polling early. 3854 */ 3855 budget_per_q = num_rxq ? max(budget / num_rxq, 1) : 0; 3856 for (i = 0; i < num_rxq; i++) { 3857 struct idpf_rx_queue *rxq = q_vec->rx[i]; 3858 int pkts_cleaned_per_q; 3859 3860 pkts_cleaned_per_q = idpf_rx_splitq_clean(rxq, budget_per_q); 3861 /* if we clean as many as budgeted, we must not be done */ 3862 if (pkts_cleaned_per_q >= budget_per_q) 3863 clean_complete = false; 3864 pkts_cleaned += pkts_cleaned_per_q; 3865 } 3866 *cleaned = pkts_cleaned; 3867 3868 nid = numa_mem_id(); 3869 3870 for (i = 0; i < q_vec->num_bufq; i++) 3871 idpf_rx_clean_refillq_all(q_vec->bufq[i], nid); 3872 3873 return clean_complete; 3874 } 3875 3876 /** 3877 * idpf_vport_splitq_napi_poll - NAPI handler 3878 * @napi: struct from which you get q_vector 3879 * @budget: budget provided by stack 3880 */ 3881 static int idpf_vport_splitq_napi_poll(struct napi_struct *napi, int budget) 3882 { 3883 struct idpf_q_vector *q_vector = 3884 container_of(napi, struct idpf_q_vector, napi); 3885 bool clean_complete; 3886 int work_done = 0; 3887 3888 /* Handle case where we are called by netpoll with a budget of 0 */ 3889 if (unlikely(!budget)) { 3890 idpf_tx_splitq_clean_all(q_vector, budget, &work_done); 3891 3892 return 0; 3893 } 3894 3895 clean_complete = idpf_rx_splitq_clean_all(q_vector, budget, &work_done); 3896 clean_complete &= idpf_tx_splitq_clean_all(q_vector, budget, &work_done); 3897 3898 /* If work not completed, return budget and polling will return */ 3899 if (!clean_complete) { 3900 idpf_vport_intr_set_wb_on_itr(q_vector); 3901 return budget; 3902 } 3903 3904 /* Switch to poll mode in the tear-down path after sending disable 3905 * queues virtchnl message, as the interrupts will be disabled after 3906 * that. 3907 */ 3908 if (unlikely(q_vector->num_txq && idpf_queue_has(POLL_MODE, 3909 q_vector->tx[0]))) 3910 return budget; 3911 3912 work_done = min_t(int, work_done, budget - 1); 3913 3914 /* Exit the polling mode, but don't re-enable interrupts if stack might 3915 * poll us due to busy-polling 3916 */ 3917 if (likely(napi_complete_done(napi, work_done))) 3918 idpf_vport_intr_update_itr_ena_irq(q_vector); 3919 else 3920 idpf_vport_intr_set_wb_on_itr(q_vector); 3921 3922 return work_done; 3923 } 3924 3925 /** 3926 * idpf_vport_intr_map_vector_to_qs - Map vectors to queues 3927 * @vport: virtual port 3928 * 3929 * Mapping for vectors to queues 3930 */ 3931 static void idpf_vport_intr_map_vector_to_qs(struct idpf_vport *vport) 3932 { 3933 bool split = idpf_is_queue_model_split(vport->rxq_model); 3934 u16 num_txq_grp = vport->num_txq_grp; 3935 struct idpf_rxq_group *rx_qgrp; 3936 struct idpf_txq_group *tx_qgrp; 3937 u32 i, qv_idx, q_index; 3938 3939 for (i = 0, qv_idx = 0; i < vport->num_rxq_grp; i++) { 3940 u16 num_rxq; 3941 3942 if (qv_idx >= vport->num_q_vectors) 3943 qv_idx = 0; 3944 3945 rx_qgrp = &vport->rxq_grps[i]; 3946 if (split) 3947 num_rxq = rx_qgrp->splitq.num_rxq_sets; 3948 else 3949 num_rxq = rx_qgrp->singleq.num_rxq; 3950 3951 for (u32 j = 0; j < num_rxq; j++) { 3952 struct idpf_rx_queue *q; 3953 3954 if (split) 3955 q = &rx_qgrp->splitq.rxq_sets[j]->rxq; 3956 else 3957 q = rx_qgrp->singleq.rxqs[j]; 3958 q->q_vector = &vport->q_vectors[qv_idx]; 3959 q_index = q->q_vector->num_rxq; 3960 q->q_vector->rx[q_index] = q; 3961 q->q_vector->num_rxq++; 3962 3963 if (split) 3964 q->napi = &q->q_vector->napi; 3965 } 3966 3967 if (split) { 3968 for (u32 j = 0; j < vport->num_bufqs_per_qgrp; j++) { 3969 struct idpf_buf_queue *bufq; 3970 3971 bufq = &rx_qgrp->splitq.bufq_sets[j].bufq; 3972 bufq->q_vector = &vport->q_vectors[qv_idx]; 3973 q_index = bufq->q_vector->num_bufq; 3974 bufq->q_vector->bufq[q_index] = bufq; 3975 bufq->q_vector->num_bufq++; 3976 } 3977 } 3978 3979 qv_idx++; 3980 } 3981 3982 split = idpf_is_queue_model_split(vport->txq_model); 3983 3984 for (i = 0, qv_idx = 0; i < num_txq_grp; i++) { 3985 u16 num_txq; 3986 3987 if (qv_idx >= vport->num_q_vectors) 3988 qv_idx = 0; 3989 3990 tx_qgrp = &vport->txq_grps[i]; 3991 num_txq = tx_qgrp->num_txq; 3992 3993 for (u32 j = 0; j < num_txq; j++) { 3994 struct idpf_tx_queue *q; 3995 3996 q = tx_qgrp->txqs[j]; 3997 q->q_vector = &vport->q_vectors[qv_idx]; 3998 q->q_vector->tx[q->q_vector->num_txq++] = q; 3999 } 4000 4001 if (split) { 4002 struct idpf_compl_queue *q = tx_qgrp->complq; 4003 4004 q->q_vector = &vport->q_vectors[qv_idx]; 4005 q->q_vector->complq[q->q_vector->num_complq++] = q; 4006 } 4007 4008 qv_idx++; 4009 } 4010 } 4011 4012 /** 4013 * idpf_vport_intr_init_vec_idx - Initialize the vector indexes 4014 * @vport: virtual port 4015 * 4016 * Initialize vector indexes with values returened over mailbox 4017 */ 4018 static int idpf_vport_intr_init_vec_idx(struct idpf_vport *vport) 4019 { 4020 struct idpf_adapter *adapter = vport->adapter; 4021 struct virtchnl2_alloc_vectors *ac; 4022 u16 *vecids, total_vecs; 4023 int i; 4024 4025 ac = adapter->req_vec_chunks; 4026 if (!ac) { 4027 for (i = 0; i < vport->num_q_vectors; i++) 4028 vport->q_vectors[i].v_idx = vport->q_vector_idxs[i]; 4029 4030 return 0; 4031 } 4032 4033 total_vecs = idpf_get_reserved_vecs(adapter); 4034 vecids = kcalloc(total_vecs, sizeof(u16), GFP_KERNEL); 4035 if (!vecids) 4036 return -ENOMEM; 4037 4038 idpf_get_vec_ids(adapter, vecids, total_vecs, &ac->vchunks); 4039 4040 for (i = 0; i < vport->num_q_vectors; i++) 4041 vport->q_vectors[i].v_idx = vecids[vport->q_vector_idxs[i]]; 4042 4043 kfree(vecids); 4044 4045 return 0; 4046 } 4047 4048 /** 4049 * idpf_vport_intr_napi_add_all- Register napi handler for all qvectors 4050 * @vport: virtual port structure 4051 */ 4052 static void idpf_vport_intr_napi_add_all(struct idpf_vport *vport) 4053 { 4054 int (*napi_poll)(struct napi_struct *napi, int budget); 4055 u16 v_idx, qv_idx; 4056 int irq_num; 4057 4058 if (idpf_is_queue_model_split(vport->txq_model)) 4059 napi_poll = idpf_vport_splitq_napi_poll; 4060 else 4061 napi_poll = idpf_vport_singleq_napi_poll; 4062 4063 for (v_idx = 0; v_idx < vport->num_q_vectors; v_idx++) { 4064 struct idpf_q_vector *q_vector = &vport->q_vectors[v_idx]; 4065 qv_idx = vport->q_vector_idxs[v_idx]; 4066 irq_num = vport->adapter->msix_entries[qv_idx].vector; 4067 4068 netif_napi_add_config(vport->netdev, &q_vector->napi, 4069 napi_poll, v_idx); 4070 netif_napi_set_irq(&q_vector->napi, irq_num); 4071 } 4072 } 4073 4074 /** 4075 * idpf_vport_intr_alloc - Allocate memory for interrupt vectors 4076 * @vport: virtual port 4077 * 4078 * We allocate one q_vector per queue interrupt. If allocation fails we 4079 * return -ENOMEM. 4080 */ 4081 int idpf_vport_intr_alloc(struct idpf_vport *vport) 4082 { 4083 u16 txqs_per_vector, rxqs_per_vector, bufqs_per_vector; 4084 struct idpf_vport_user_config_data *user_config; 4085 struct idpf_q_vector *q_vector; 4086 struct idpf_q_coalesce *q_coal; 4087 u32 complqs_per_vector, v_idx; 4088 u16 idx = vport->idx; 4089 4090 user_config = &vport->adapter->vport_config[idx]->user_config; 4091 vport->q_vectors = kcalloc(vport->num_q_vectors, 4092 sizeof(struct idpf_q_vector), GFP_KERNEL); 4093 if (!vport->q_vectors) 4094 return -ENOMEM; 4095 4096 txqs_per_vector = DIV_ROUND_UP(vport->num_txq_grp, 4097 vport->num_q_vectors); 4098 rxqs_per_vector = DIV_ROUND_UP(vport->num_rxq_grp, 4099 vport->num_q_vectors); 4100 bufqs_per_vector = vport->num_bufqs_per_qgrp * 4101 DIV_ROUND_UP(vport->num_rxq_grp, 4102 vport->num_q_vectors); 4103 complqs_per_vector = DIV_ROUND_UP(vport->num_txq_grp, 4104 vport->num_q_vectors); 4105 4106 for (v_idx = 0; v_idx < vport->num_q_vectors; v_idx++) { 4107 q_vector = &vport->q_vectors[v_idx]; 4108 q_coal = &user_config->q_coalesce[v_idx]; 4109 q_vector->vport = vport; 4110 4111 q_vector->tx_itr_value = q_coal->tx_coalesce_usecs; 4112 q_vector->tx_intr_mode = q_coal->tx_intr_mode; 4113 q_vector->tx_itr_idx = VIRTCHNL2_ITR_IDX_1; 4114 4115 q_vector->rx_itr_value = q_coal->rx_coalesce_usecs; 4116 q_vector->rx_intr_mode = q_coal->rx_intr_mode; 4117 q_vector->rx_itr_idx = VIRTCHNL2_ITR_IDX_0; 4118 4119 q_vector->tx = kcalloc(txqs_per_vector, sizeof(*q_vector->tx), 4120 GFP_KERNEL); 4121 if (!q_vector->tx) 4122 goto error; 4123 4124 q_vector->rx = kcalloc(rxqs_per_vector, sizeof(*q_vector->rx), 4125 GFP_KERNEL); 4126 if (!q_vector->rx) 4127 goto error; 4128 4129 if (!idpf_is_queue_model_split(vport->rxq_model)) 4130 continue; 4131 4132 q_vector->bufq = kcalloc(bufqs_per_vector, 4133 sizeof(*q_vector->bufq), 4134 GFP_KERNEL); 4135 if (!q_vector->bufq) 4136 goto error; 4137 4138 q_vector->complq = kcalloc(complqs_per_vector, 4139 sizeof(*q_vector->complq), 4140 GFP_KERNEL); 4141 if (!q_vector->complq) 4142 goto error; 4143 } 4144 4145 return 0; 4146 4147 error: 4148 idpf_vport_intr_rel(vport); 4149 4150 return -ENOMEM; 4151 } 4152 4153 /** 4154 * idpf_vport_intr_init - Setup all vectors for the given vport 4155 * @vport: virtual port 4156 * 4157 * Returns 0 on success or negative on failure 4158 */ 4159 int idpf_vport_intr_init(struct idpf_vport *vport) 4160 { 4161 int err; 4162 4163 err = idpf_vport_intr_init_vec_idx(vport); 4164 if (err) 4165 return err; 4166 4167 idpf_vport_intr_map_vector_to_qs(vport); 4168 idpf_vport_intr_napi_add_all(vport); 4169 4170 err = vport->adapter->dev_ops.reg_ops.intr_reg_init(vport); 4171 if (err) 4172 goto unroll_vectors_alloc; 4173 4174 err = idpf_vport_intr_req_irq(vport); 4175 if (err) 4176 goto unroll_vectors_alloc; 4177 4178 return 0; 4179 4180 unroll_vectors_alloc: 4181 idpf_vport_intr_napi_del_all(vport); 4182 4183 return err; 4184 } 4185 4186 void idpf_vport_intr_ena(struct idpf_vport *vport) 4187 { 4188 idpf_vport_intr_napi_ena_all(vport); 4189 idpf_vport_intr_ena_irq_all(vport); 4190 } 4191 4192 /** 4193 * idpf_config_rss - Send virtchnl messages to configure RSS 4194 * @vport: virtual port 4195 * 4196 * Return 0 on success, negative on failure 4197 */ 4198 int idpf_config_rss(struct idpf_vport *vport) 4199 { 4200 int err; 4201 4202 err = idpf_send_get_set_rss_key_msg(vport, false); 4203 if (err) 4204 return err; 4205 4206 return idpf_send_get_set_rss_lut_msg(vport, false); 4207 } 4208 4209 /** 4210 * idpf_fill_dflt_rss_lut - Fill the indirection table with the default values 4211 * @vport: virtual port structure 4212 */ 4213 static void idpf_fill_dflt_rss_lut(struct idpf_vport *vport) 4214 { 4215 struct idpf_adapter *adapter = vport->adapter; 4216 u16 num_active_rxq = vport->num_rxq; 4217 struct idpf_rss_data *rss_data; 4218 int i; 4219 4220 rss_data = &adapter->vport_config[vport->idx]->user_config.rss_data; 4221 4222 for (i = 0; i < rss_data->rss_lut_size; i++) { 4223 rss_data->rss_lut[i] = i % num_active_rxq; 4224 rss_data->cached_lut[i] = rss_data->rss_lut[i]; 4225 } 4226 } 4227 4228 /** 4229 * idpf_init_rss - Allocate and initialize RSS resources 4230 * @vport: virtual port 4231 * 4232 * Return 0 on success, negative on failure 4233 */ 4234 int idpf_init_rss(struct idpf_vport *vport) 4235 { 4236 struct idpf_adapter *adapter = vport->adapter; 4237 struct idpf_rss_data *rss_data; 4238 u32 lut_size; 4239 4240 rss_data = &adapter->vport_config[vport->idx]->user_config.rss_data; 4241 4242 lut_size = rss_data->rss_lut_size * sizeof(u32); 4243 rss_data->rss_lut = kzalloc(lut_size, GFP_KERNEL); 4244 if (!rss_data->rss_lut) 4245 return -ENOMEM; 4246 4247 rss_data->cached_lut = kzalloc(lut_size, GFP_KERNEL); 4248 if (!rss_data->cached_lut) { 4249 kfree(rss_data->rss_lut); 4250 rss_data->rss_lut = NULL; 4251 4252 return -ENOMEM; 4253 } 4254 4255 /* Fill the default RSS lut values */ 4256 idpf_fill_dflt_rss_lut(vport); 4257 4258 return idpf_config_rss(vport); 4259 } 4260 4261 /** 4262 * idpf_deinit_rss - Release RSS resources 4263 * @vport: virtual port 4264 */ 4265 void idpf_deinit_rss(struct idpf_vport *vport) 4266 { 4267 struct idpf_adapter *adapter = vport->adapter; 4268 struct idpf_rss_data *rss_data; 4269 4270 rss_data = &adapter->vport_config[vport->idx]->user_config.rss_data; 4271 kfree(rss_data->cached_lut); 4272 rss_data->cached_lut = NULL; 4273 kfree(rss_data->rss_lut); 4274 rss_data->rss_lut = NULL; 4275 } 4276