1 // SPDX-License-Identifier: GPL-2.0-only 2 /* Copyright (C) 2023 Intel Corporation */ 3 4 #include <net/libeth/rx.h> 5 #include <net/libeth/tx.h> 6 7 #include "idpf.h" 8 #include "idpf_ptp.h" 9 #include "idpf_virtchnl.h" 10 11 struct idpf_tx_stash { 12 struct hlist_node hlist; 13 struct libeth_sqe buf; 14 }; 15 16 #define idpf_tx_buf_compl_tag(buf) (*(u32 *)&(buf)->priv) 17 LIBETH_SQE_CHECK_PRIV(u32); 18 19 static bool idpf_chk_linearize(struct sk_buff *skb, unsigned int max_bufs, 20 unsigned int count); 21 22 /** 23 * idpf_buf_lifo_push - push a buffer pointer onto stack 24 * @stack: pointer to stack struct 25 * @buf: pointer to buf to push 26 * 27 * Returns 0 on success, negative on failure 28 **/ 29 static int idpf_buf_lifo_push(struct idpf_buf_lifo *stack, 30 struct idpf_tx_stash *buf) 31 { 32 if (unlikely(stack->top == stack->size)) 33 return -ENOSPC; 34 35 stack->bufs[stack->top++] = buf; 36 37 return 0; 38 } 39 40 /** 41 * idpf_buf_lifo_pop - pop a buffer pointer from stack 42 * @stack: pointer to stack struct 43 **/ 44 static struct idpf_tx_stash *idpf_buf_lifo_pop(struct idpf_buf_lifo *stack) 45 { 46 if (unlikely(!stack->top)) 47 return NULL; 48 49 return stack->bufs[--stack->top]; 50 } 51 52 /** 53 * idpf_tx_timeout - Respond to a Tx Hang 54 * @netdev: network interface device structure 55 * @txqueue: TX queue 56 */ 57 void idpf_tx_timeout(struct net_device *netdev, unsigned int txqueue) 58 { 59 struct idpf_adapter *adapter = idpf_netdev_to_adapter(netdev); 60 61 adapter->tx_timeout_count++; 62 63 netdev_err(netdev, "Detected Tx timeout: Count %d, Queue %d\n", 64 adapter->tx_timeout_count, txqueue); 65 if (!idpf_is_reset_in_prog(adapter)) { 66 set_bit(IDPF_HR_FUNC_RESET, adapter->flags); 67 queue_delayed_work(adapter->vc_event_wq, 68 &adapter->vc_event_task, 69 msecs_to_jiffies(10)); 70 } 71 } 72 73 /** 74 * idpf_tx_buf_rel_all - Free any empty Tx buffers 75 * @txq: queue to be cleaned 76 */ 77 static void idpf_tx_buf_rel_all(struct idpf_tx_queue *txq) 78 { 79 struct libeth_sq_napi_stats ss = { }; 80 struct idpf_buf_lifo *buf_stack; 81 struct idpf_tx_stash *stash; 82 struct libeth_cq_pp cp = { 83 .dev = txq->dev, 84 .ss = &ss, 85 }; 86 struct hlist_node *tmp; 87 u32 i, tag; 88 89 /* Buffers already cleared, nothing to do */ 90 if (!txq->tx_buf) 91 return; 92 93 /* Free all the Tx buffer sk_buffs */ 94 for (i = 0; i < txq->desc_count; i++) 95 libeth_tx_complete(&txq->tx_buf[i], &cp); 96 97 kfree(txq->tx_buf); 98 txq->tx_buf = NULL; 99 100 if (!idpf_queue_has(FLOW_SCH_EN, txq)) 101 return; 102 103 buf_stack = &txq->stash->buf_stack; 104 if (!buf_stack->bufs) 105 return; 106 107 /* 108 * If a Tx timeout occurred, there are potentially still bufs in the 109 * hash table, free them here. 110 */ 111 hash_for_each_safe(txq->stash->sched_buf_hash, tag, tmp, stash, 112 hlist) { 113 if (!stash) 114 continue; 115 116 libeth_tx_complete(&stash->buf, &cp); 117 hash_del(&stash->hlist); 118 idpf_buf_lifo_push(buf_stack, stash); 119 } 120 121 for (i = 0; i < buf_stack->size; i++) 122 kfree(buf_stack->bufs[i]); 123 124 kfree(buf_stack->bufs); 125 buf_stack->bufs = NULL; 126 } 127 128 /** 129 * idpf_tx_desc_rel - Free Tx resources per queue 130 * @txq: Tx descriptor ring for a specific queue 131 * 132 * Free all transmit software resources 133 */ 134 static void idpf_tx_desc_rel(struct idpf_tx_queue *txq) 135 { 136 idpf_tx_buf_rel_all(txq); 137 netdev_tx_reset_subqueue(txq->netdev, txq->idx); 138 139 if (!txq->desc_ring) 140 return; 141 142 dmam_free_coherent(txq->dev, txq->size, txq->desc_ring, txq->dma); 143 txq->desc_ring = NULL; 144 txq->next_to_use = 0; 145 txq->next_to_clean = 0; 146 } 147 148 /** 149 * idpf_compl_desc_rel - Free completion resources per queue 150 * @complq: completion queue 151 * 152 * Free all completion software resources. 153 */ 154 static void idpf_compl_desc_rel(struct idpf_compl_queue *complq) 155 { 156 if (!complq->comp) 157 return; 158 159 dma_free_coherent(complq->netdev->dev.parent, complq->size, 160 complq->comp, complq->dma); 161 complq->comp = NULL; 162 complq->next_to_use = 0; 163 complq->next_to_clean = 0; 164 } 165 166 /** 167 * idpf_tx_desc_rel_all - Free Tx Resources for All Queues 168 * @vport: virtual port structure 169 * 170 * Free all transmit software resources 171 */ 172 static void idpf_tx_desc_rel_all(struct idpf_vport *vport) 173 { 174 int i, j; 175 176 if (!vport->txq_grps) 177 return; 178 179 for (i = 0; i < vport->num_txq_grp; i++) { 180 struct idpf_txq_group *txq_grp = &vport->txq_grps[i]; 181 182 for (j = 0; j < txq_grp->num_txq; j++) 183 idpf_tx_desc_rel(txq_grp->txqs[j]); 184 185 if (idpf_is_queue_model_split(vport->txq_model)) 186 idpf_compl_desc_rel(txq_grp->complq); 187 } 188 } 189 190 /** 191 * idpf_tx_buf_alloc_all - Allocate memory for all buffer resources 192 * @tx_q: queue for which the buffers are allocated 193 * 194 * Returns 0 on success, negative on failure 195 */ 196 static int idpf_tx_buf_alloc_all(struct idpf_tx_queue *tx_q) 197 { 198 struct idpf_buf_lifo *buf_stack; 199 int buf_size; 200 int i; 201 202 /* Allocate book keeping buffers only. Buffers to be supplied to HW 203 * are allocated by kernel network stack and received as part of skb 204 */ 205 buf_size = sizeof(struct idpf_tx_buf) * tx_q->desc_count; 206 tx_q->tx_buf = kzalloc(buf_size, GFP_KERNEL); 207 if (!tx_q->tx_buf) 208 return -ENOMEM; 209 210 if (!idpf_queue_has(FLOW_SCH_EN, tx_q)) 211 return 0; 212 213 buf_stack = &tx_q->stash->buf_stack; 214 215 /* Initialize tx buf stack for out-of-order completions if 216 * flow scheduling offload is enabled 217 */ 218 buf_stack->bufs = kcalloc(tx_q->desc_count, sizeof(*buf_stack->bufs), 219 GFP_KERNEL); 220 if (!buf_stack->bufs) 221 return -ENOMEM; 222 223 buf_stack->size = tx_q->desc_count; 224 buf_stack->top = tx_q->desc_count; 225 226 for (i = 0; i < tx_q->desc_count; i++) { 227 buf_stack->bufs[i] = kzalloc(sizeof(*buf_stack->bufs[i]), 228 GFP_KERNEL); 229 if (!buf_stack->bufs[i]) 230 return -ENOMEM; 231 } 232 233 return 0; 234 } 235 236 /** 237 * idpf_tx_desc_alloc - Allocate the Tx descriptors 238 * @vport: vport to allocate resources for 239 * @tx_q: the tx ring to set up 240 * 241 * Returns 0 on success, negative on failure 242 */ 243 static int idpf_tx_desc_alloc(const struct idpf_vport *vport, 244 struct idpf_tx_queue *tx_q) 245 { 246 struct device *dev = tx_q->dev; 247 int err; 248 249 err = idpf_tx_buf_alloc_all(tx_q); 250 if (err) 251 goto err_alloc; 252 253 tx_q->size = tx_q->desc_count * sizeof(*tx_q->base_tx); 254 255 /* Allocate descriptors also round up to nearest 4K */ 256 tx_q->size = ALIGN(tx_q->size, 4096); 257 tx_q->desc_ring = dmam_alloc_coherent(dev, tx_q->size, &tx_q->dma, 258 GFP_KERNEL); 259 if (!tx_q->desc_ring) { 260 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring, size=%d\n", 261 tx_q->size); 262 err = -ENOMEM; 263 goto err_alloc; 264 } 265 266 tx_q->next_to_use = 0; 267 tx_q->next_to_clean = 0; 268 idpf_queue_set(GEN_CHK, tx_q); 269 270 return 0; 271 272 err_alloc: 273 idpf_tx_desc_rel(tx_q); 274 275 return err; 276 } 277 278 /** 279 * idpf_compl_desc_alloc - allocate completion descriptors 280 * @vport: vport to allocate resources for 281 * @complq: completion queue to set up 282 * 283 * Return: 0 on success, -errno on failure. 284 */ 285 static int idpf_compl_desc_alloc(const struct idpf_vport *vport, 286 struct idpf_compl_queue *complq) 287 { 288 complq->size = array_size(complq->desc_count, sizeof(*complq->comp)); 289 290 complq->comp = dma_alloc_coherent(complq->netdev->dev.parent, 291 complq->size, &complq->dma, 292 GFP_KERNEL); 293 if (!complq->comp) 294 return -ENOMEM; 295 296 complq->next_to_use = 0; 297 complq->next_to_clean = 0; 298 idpf_queue_set(GEN_CHK, complq); 299 300 return 0; 301 } 302 303 /** 304 * idpf_tx_desc_alloc_all - allocate all queues Tx resources 305 * @vport: virtual port private structure 306 * 307 * Returns 0 on success, negative on failure 308 */ 309 static int idpf_tx_desc_alloc_all(struct idpf_vport *vport) 310 { 311 int err = 0; 312 int i, j; 313 314 /* Setup buffer queues. In single queue model buffer queues and 315 * completion queues will be same 316 */ 317 for (i = 0; i < vport->num_txq_grp; i++) { 318 for (j = 0; j < vport->txq_grps[i].num_txq; j++) { 319 struct idpf_tx_queue *txq = vport->txq_grps[i].txqs[j]; 320 u8 gen_bits = 0; 321 u16 bufidx_mask; 322 323 err = idpf_tx_desc_alloc(vport, txq); 324 if (err) { 325 pci_err(vport->adapter->pdev, 326 "Allocation for Tx Queue %u failed\n", 327 i); 328 goto err_out; 329 } 330 331 if (!idpf_is_queue_model_split(vport->txq_model)) 332 continue; 333 334 txq->compl_tag_cur_gen = 0; 335 336 /* Determine the number of bits in the bufid 337 * mask and add one to get the start of the 338 * generation bits 339 */ 340 bufidx_mask = txq->desc_count - 1; 341 while (bufidx_mask >> 1) { 342 txq->compl_tag_gen_s++; 343 bufidx_mask = bufidx_mask >> 1; 344 } 345 txq->compl_tag_gen_s++; 346 347 gen_bits = IDPF_TX_SPLITQ_COMPL_TAG_WIDTH - 348 txq->compl_tag_gen_s; 349 txq->compl_tag_gen_max = GETMAXVAL(gen_bits); 350 351 /* Set bufid mask based on location of first 352 * gen bit; it cannot simply be the descriptor 353 * ring size-1 since we can have size values 354 * where not all of those bits are set. 355 */ 356 txq->compl_tag_bufid_m = 357 GETMAXVAL(txq->compl_tag_gen_s); 358 } 359 360 if (!idpf_is_queue_model_split(vport->txq_model)) 361 continue; 362 363 /* Setup completion queues */ 364 err = idpf_compl_desc_alloc(vport, vport->txq_grps[i].complq); 365 if (err) { 366 pci_err(vport->adapter->pdev, 367 "Allocation for Tx Completion Queue %u failed\n", 368 i); 369 goto err_out; 370 } 371 } 372 373 err_out: 374 if (err) 375 idpf_tx_desc_rel_all(vport); 376 377 return err; 378 } 379 380 /** 381 * idpf_rx_page_rel - Release an rx buffer page 382 * @rx_buf: the buffer to free 383 */ 384 static void idpf_rx_page_rel(struct libeth_fqe *rx_buf) 385 { 386 if (unlikely(!rx_buf->page)) 387 return; 388 389 page_pool_put_full_page(rx_buf->page->pp, rx_buf->page, false); 390 391 rx_buf->page = NULL; 392 rx_buf->offset = 0; 393 } 394 395 /** 396 * idpf_rx_hdr_buf_rel_all - Release header buffer memory 397 * @bufq: queue to use 398 */ 399 static void idpf_rx_hdr_buf_rel_all(struct idpf_buf_queue *bufq) 400 { 401 struct libeth_fq fq = { 402 .fqes = bufq->hdr_buf, 403 .pp = bufq->hdr_pp, 404 }; 405 406 for (u32 i = 0; i < bufq->desc_count; i++) 407 idpf_rx_page_rel(&bufq->hdr_buf[i]); 408 409 libeth_rx_fq_destroy(&fq); 410 bufq->hdr_buf = NULL; 411 bufq->hdr_pp = NULL; 412 } 413 414 /** 415 * idpf_rx_buf_rel_bufq - Free all Rx buffer resources for a buffer queue 416 * @bufq: queue to be cleaned 417 */ 418 static void idpf_rx_buf_rel_bufq(struct idpf_buf_queue *bufq) 419 { 420 struct libeth_fq fq = { 421 .fqes = bufq->buf, 422 .pp = bufq->pp, 423 }; 424 425 /* queue already cleared, nothing to do */ 426 if (!bufq->buf) 427 return; 428 429 /* Free all the bufs allocated and given to hw on Rx queue */ 430 for (u32 i = 0; i < bufq->desc_count; i++) 431 idpf_rx_page_rel(&bufq->buf[i]); 432 433 if (idpf_queue_has(HSPLIT_EN, bufq)) 434 idpf_rx_hdr_buf_rel_all(bufq); 435 436 libeth_rx_fq_destroy(&fq); 437 bufq->buf = NULL; 438 bufq->pp = NULL; 439 } 440 441 /** 442 * idpf_rx_buf_rel_all - Free all Rx buffer resources for a receive queue 443 * @rxq: queue to be cleaned 444 */ 445 static void idpf_rx_buf_rel_all(struct idpf_rx_queue *rxq) 446 { 447 struct libeth_fq fq = { 448 .fqes = rxq->rx_buf, 449 .pp = rxq->pp, 450 }; 451 452 if (!rxq->rx_buf) 453 return; 454 455 for (u32 i = 0; i < rxq->desc_count; i++) 456 idpf_rx_page_rel(&rxq->rx_buf[i]); 457 458 libeth_rx_fq_destroy(&fq); 459 rxq->rx_buf = NULL; 460 rxq->pp = NULL; 461 } 462 463 /** 464 * idpf_rx_desc_rel - Free a specific Rx q resources 465 * @rxq: queue to clean the resources from 466 * @dev: device to free DMA memory 467 * @model: single or split queue model 468 * 469 * Free a specific rx queue resources 470 */ 471 static void idpf_rx_desc_rel(struct idpf_rx_queue *rxq, struct device *dev, 472 u32 model) 473 { 474 if (!rxq) 475 return; 476 477 if (rxq->skb) { 478 dev_kfree_skb_any(rxq->skb); 479 rxq->skb = NULL; 480 } 481 482 if (!idpf_is_queue_model_split(model)) 483 idpf_rx_buf_rel_all(rxq); 484 485 rxq->next_to_alloc = 0; 486 rxq->next_to_clean = 0; 487 rxq->next_to_use = 0; 488 if (!rxq->desc_ring) 489 return; 490 491 dmam_free_coherent(dev, rxq->size, rxq->desc_ring, rxq->dma); 492 rxq->desc_ring = NULL; 493 } 494 495 /** 496 * idpf_rx_desc_rel_bufq - free buffer queue resources 497 * @bufq: buffer queue to clean the resources from 498 * @dev: device to free DMA memory 499 */ 500 static void idpf_rx_desc_rel_bufq(struct idpf_buf_queue *bufq, 501 struct device *dev) 502 { 503 if (!bufq) 504 return; 505 506 idpf_rx_buf_rel_bufq(bufq); 507 508 bufq->next_to_alloc = 0; 509 bufq->next_to_clean = 0; 510 bufq->next_to_use = 0; 511 512 if (!bufq->split_buf) 513 return; 514 515 dma_free_coherent(dev, bufq->size, bufq->split_buf, bufq->dma); 516 bufq->split_buf = NULL; 517 } 518 519 /** 520 * idpf_rx_desc_rel_all - Free Rx Resources for All Queues 521 * @vport: virtual port structure 522 * 523 * Free all rx queues resources 524 */ 525 static void idpf_rx_desc_rel_all(struct idpf_vport *vport) 526 { 527 struct device *dev = &vport->adapter->pdev->dev; 528 struct idpf_rxq_group *rx_qgrp; 529 u16 num_rxq; 530 int i, j; 531 532 if (!vport->rxq_grps) 533 return; 534 535 for (i = 0; i < vport->num_rxq_grp; i++) { 536 rx_qgrp = &vport->rxq_grps[i]; 537 538 if (!idpf_is_queue_model_split(vport->rxq_model)) { 539 for (j = 0; j < rx_qgrp->singleq.num_rxq; j++) 540 idpf_rx_desc_rel(rx_qgrp->singleq.rxqs[j], dev, 541 VIRTCHNL2_QUEUE_MODEL_SINGLE); 542 continue; 543 } 544 545 num_rxq = rx_qgrp->splitq.num_rxq_sets; 546 for (j = 0; j < num_rxq; j++) 547 idpf_rx_desc_rel(&rx_qgrp->splitq.rxq_sets[j]->rxq, 548 dev, VIRTCHNL2_QUEUE_MODEL_SPLIT); 549 550 if (!rx_qgrp->splitq.bufq_sets) 551 continue; 552 553 for (j = 0; j < vport->num_bufqs_per_qgrp; j++) { 554 struct idpf_bufq_set *bufq_set = 555 &rx_qgrp->splitq.bufq_sets[j]; 556 557 idpf_rx_desc_rel_bufq(&bufq_set->bufq, dev); 558 } 559 } 560 } 561 562 /** 563 * idpf_rx_buf_hw_update - Store the new tail and head values 564 * @bufq: queue to bump 565 * @val: new head index 566 */ 567 static void idpf_rx_buf_hw_update(struct idpf_buf_queue *bufq, u32 val) 568 { 569 bufq->next_to_use = val; 570 571 if (unlikely(!bufq->tail)) 572 return; 573 574 /* writel has an implicit memory barrier */ 575 writel(val, bufq->tail); 576 } 577 578 /** 579 * idpf_rx_hdr_buf_alloc_all - Allocate memory for header buffers 580 * @bufq: ring to use 581 * 582 * Returns 0 on success, negative on failure. 583 */ 584 static int idpf_rx_hdr_buf_alloc_all(struct idpf_buf_queue *bufq) 585 { 586 struct libeth_fq fq = { 587 .count = bufq->desc_count, 588 .type = LIBETH_FQE_HDR, 589 .nid = idpf_q_vector_to_mem(bufq->q_vector), 590 }; 591 int ret; 592 593 ret = libeth_rx_fq_create(&fq, &bufq->q_vector->napi); 594 if (ret) 595 return ret; 596 597 bufq->hdr_pp = fq.pp; 598 bufq->hdr_buf = fq.fqes; 599 bufq->hdr_truesize = fq.truesize; 600 bufq->rx_hbuf_size = fq.buf_len; 601 602 return 0; 603 } 604 605 /** 606 * idpf_rx_post_buf_refill - Post buffer id to refill queue 607 * @refillq: refill queue to post to 608 * @buf_id: buffer id to post 609 */ 610 static void idpf_rx_post_buf_refill(struct idpf_sw_queue *refillq, u16 buf_id) 611 { 612 u32 nta = refillq->next_to_use; 613 614 /* store the buffer ID and the SW maintained GEN bit to the refillq */ 615 refillq->ring[nta] = 616 FIELD_PREP(IDPF_RX_BI_BUFID_M, buf_id) | 617 FIELD_PREP(IDPF_RX_BI_GEN_M, 618 idpf_queue_has(GEN_CHK, refillq)); 619 620 if (unlikely(++nta == refillq->desc_count)) { 621 nta = 0; 622 idpf_queue_change(GEN_CHK, refillq); 623 } 624 625 refillq->next_to_use = nta; 626 } 627 628 /** 629 * idpf_rx_post_buf_desc - Post buffer to bufq descriptor ring 630 * @bufq: buffer queue to post to 631 * @buf_id: buffer id to post 632 * 633 * Returns false if buffer could not be allocated, true otherwise. 634 */ 635 static bool idpf_rx_post_buf_desc(struct idpf_buf_queue *bufq, u16 buf_id) 636 { 637 struct virtchnl2_splitq_rx_buf_desc *splitq_rx_desc = NULL; 638 struct libeth_fq_fp fq = { 639 .count = bufq->desc_count, 640 }; 641 u16 nta = bufq->next_to_alloc; 642 dma_addr_t addr; 643 644 splitq_rx_desc = &bufq->split_buf[nta]; 645 646 if (idpf_queue_has(HSPLIT_EN, bufq)) { 647 fq.pp = bufq->hdr_pp; 648 fq.fqes = bufq->hdr_buf; 649 fq.truesize = bufq->hdr_truesize; 650 651 addr = libeth_rx_alloc(&fq, buf_id); 652 if (addr == DMA_MAPPING_ERROR) 653 return false; 654 655 splitq_rx_desc->hdr_addr = cpu_to_le64(addr); 656 } 657 658 fq.pp = bufq->pp; 659 fq.fqes = bufq->buf; 660 fq.truesize = bufq->truesize; 661 662 addr = libeth_rx_alloc(&fq, buf_id); 663 if (addr == DMA_MAPPING_ERROR) 664 return false; 665 666 splitq_rx_desc->pkt_addr = cpu_to_le64(addr); 667 splitq_rx_desc->qword0.buf_id = cpu_to_le16(buf_id); 668 669 nta++; 670 if (unlikely(nta == bufq->desc_count)) 671 nta = 0; 672 bufq->next_to_alloc = nta; 673 674 return true; 675 } 676 677 /** 678 * idpf_rx_post_init_bufs - Post initial buffers to bufq 679 * @bufq: buffer queue to post working set to 680 * @working_set: number of buffers to put in working set 681 * 682 * Returns true if @working_set bufs were posted successfully, false otherwise. 683 */ 684 static bool idpf_rx_post_init_bufs(struct idpf_buf_queue *bufq, 685 u16 working_set) 686 { 687 int i; 688 689 for (i = 0; i < working_set; i++) { 690 if (!idpf_rx_post_buf_desc(bufq, i)) 691 return false; 692 } 693 694 idpf_rx_buf_hw_update(bufq, ALIGN_DOWN(bufq->next_to_alloc, 695 IDPF_RX_BUF_STRIDE)); 696 697 return true; 698 } 699 700 /** 701 * idpf_rx_buf_alloc_singleq - Allocate memory for all buffer resources 702 * @rxq: queue for which the buffers are allocated 703 * 704 * Return: 0 on success, -ENOMEM on failure. 705 */ 706 static int idpf_rx_buf_alloc_singleq(struct idpf_rx_queue *rxq) 707 { 708 if (idpf_rx_singleq_buf_hw_alloc_all(rxq, rxq->desc_count - 1)) 709 goto err; 710 711 return 0; 712 713 err: 714 idpf_rx_buf_rel_all(rxq); 715 716 return -ENOMEM; 717 } 718 719 /** 720 * idpf_rx_bufs_init_singleq - Initialize page pool and allocate Rx bufs 721 * @rxq: buffer queue to create page pool for 722 * 723 * Return: 0 on success, -errno on failure. 724 */ 725 static int idpf_rx_bufs_init_singleq(struct idpf_rx_queue *rxq) 726 { 727 struct libeth_fq fq = { 728 .count = rxq->desc_count, 729 .type = LIBETH_FQE_MTU, 730 .nid = idpf_q_vector_to_mem(rxq->q_vector), 731 }; 732 int ret; 733 734 ret = libeth_rx_fq_create(&fq, &rxq->q_vector->napi); 735 if (ret) 736 return ret; 737 738 rxq->pp = fq.pp; 739 rxq->rx_buf = fq.fqes; 740 rxq->truesize = fq.truesize; 741 rxq->rx_buf_size = fq.buf_len; 742 743 return idpf_rx_buf_alloc_singleq(rxq); 744 } 745 746 /** 747 * idpf_rx_buf_alloc_all - Allocate memory for all buffer resources 748 * @rxbufq: queue for which the buffers are allocated 749 * 750 * Returns 0 on success, negative on failure 751 */ 752 static int idpf_rx_buf_alloc_all(struct idpf_buf_queue *rxbufq) 753 { 754 int err = 0; 755 756 if (idpf_queue_has(HSPLIT_EN, rxbufq)) { 757 err = idpf_rx_hdr_buf_alloc_all(rxbufq); 758 if (err) 759 goto rx_buf_alloc_all_out; 760 } 761 762 /* Allocate buffers to be given to HW. */ 763 if (!idpf_rx_post_init_bufs(rxbufq, IDPF_RX_BUFQ_WORKING_SET(rxbufq))) 764 err = -ENOMEM; 765 766 rx_buf_alloc_all_out: 767 if (err) 768 idpf_rx_buf_rel_bufq(rxbufq); 769 770 return err; 771 } 772 773 /** 774 * idpf_rx_bufs_init - Initialize page pool, allocate rx bufs, and post to HW 775 * @bufq: buffer queue to create page pool for 776 * @type: type of Rx buffers to allocate 777 * 778 * Returns 0 on success, negative on failure 779 */ 780 static int idpf_rx_bufs_init(struct idpf_buf_queue *bufq, 781 enum libeth_fqe_type type) 782 { 783 struct libeth_fq fq = { 784 .truesize = bufq->truesize, 785 .count = bufq->desc_count, 786 .type = type, 787 .hsplit = idpf_queue_has(HSPLIT_EN, bufq), 788 .nid = idpf_q_vector_to_mem(bufq->q_vector), 789 }; 790 int ret; 791 792 ret = libeth_rx_fq_create(&fq, &bufq->q_vector->napi); 793 if (ret) 794 return ret; 795 796 bufq->pp = fq.pp; 797 bufq->buf = fq.fqes; 798 bufq->truesize = fq.truesize; 799 bufq->rx_buf_size = fq.buf_len; 800 801 return idpf_rx_buf_alloc_all(bufq); 802 } 803 804 /** 805 * idpf_rx_bufs_init_all - Initialize all RX bufs 806 * @vport: virtual port struct 807 * 808 * Returns 0 on success, negative on failure 809 */ 810 int idpf_rx_bufs_init_all(struct idpf_vport *vport) 811 { 812 bool split = idpf_is_queue_model_split(vport->rxq_model); 813 int i, j, err; 814 815 for (i = 0; i < vport->num_rxq_grp; i++) { 816 struct idpf_rxq_group *rx_qgrp = &vport->rxq_grps[i]; 817 u32 truesize = 0; 818 819 /* Allocate bufs for the rxq itself in singleq */ 820 if (!split) { 821 int num_rxq = rx_qgrp->singleq.num_rxq; 822 823 for (j = 0; j < num_rxq; j++) { 824 struct idpf_rx_queue *q; 825 826 q = rx_qgrp->singleq.rxqs[j]; 827 err = idpf_rx_bufs_init_singleq(q); 828 if (err) 829 return err; 830 } 831 832 continue; 833 } 834 835 /* Otherwise, allocate bufs for the buffer queues */ 836 for (j = 0; j < vport->num_bufqs_per_qgrp; j++) { 837 enum libeth_fqe_type type; 838 struct idpf_buf_queue *q; 839 840 q = &rx_qgrp->splitq.bufq_sets[j].bufq; 841 q->truesize = truesize; 842 843 type = truesize ? LIBETH_FQE_SHORT : LIBETH_FQE_MTU; 844 845 err = idpf_rx_bufs_init(q, type); 846 if (err) 847 return err; 848 849 truesize = q->truesize >> 1; 850 } 851 } 852 853 return 0; 854 } 855 856 /** 857 * idpf_rx_desc_alloc - Allocate queue Rx resources 858 * @vport: vport to allocate resources for 859 * @rxq: Rx queue for which the resources are setup 860 * 861 * Returns 0 on success, negative on failure 862 */ 863 static int idpf_rx_desc_alloc(const struct idpf_vport *vport, 864 struct idpf_rx_queue *rxq) 865 { 866 struct device *dev = &vport->adapter->pdev->dev; 867 868 rxq->size = rxq->desc_count * sizeof(union virtchnl2_rx_desc); 869 870 /* Allocate descriptors and also round up to nearest 4K */ 871 rxq->size = ALIGN(rxq->size, 4096); 872 rxq->desc_ring = dmam_alloc_coherent(dev, rxq->size, 873 &rxq->dma, GFP_KERNEL); 874 if (!rxq->desc_ring) { 875 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring, size=%d\n", 876 rxq->size); 877 return -ENOMEM; 878 } 879 880 rxq->next_to_alloc = 0; 881 rxq->next_to_clean = 0; 882 rxq->next_to_use = 0; 883 idpf_queue_set(GEN_CHK, rxq); 884 885 return 0; 886 } 887 888 /** 889 * idpf_bufq_desc_alloc - Allocate buffer queue descriptor ring 890 * @vport: vport to allocate resources for 891 * @bufq: buffer queue for which the resources are set up 892 * 893 * Return: 0 on success, -ENOMEM on failure. 894 */ 895 static int idpf_bufq_desc_alloc(const struct idpf_vport *vport, 896 struct idpf_buf_queue *bufq) 897 { 898 struct device *dev = &vport->adapter->pdev->dev; 899 900 bufq->size = array_size(bufq->desc_count, sizeof(*bufq->split_buf)); 901 902 bufq->split_buf = dma_alloc_coherent(dev, bufq->size, &bufq->dma, 903 GFP_KERNEL); 904 if (!bufq->split_buf) 905 return -ENOMEM; 906 907 bufq->next_to_alloc = 0; 908 bufq->next_to_clean = 0; 909 bufq->next_to_use = 0; 910 911 idpf_queue_set(GEN_CHK, bufq); 912 913 return 0; 914 } 915 916 /** 917 * idpf_rx_desc_alloc_all - allocate all RX queues resources 918 * @vport: virtual port structure 919 * 920 * Returns 0 on success, negative on failure 921 */ 922 static int idpf_rx_desc_alloc_all(struct idpf_vport *vport) 923 { 924 struct idpf_rxq_group *rx_qgrp; 925 int i, j, err; 926 u16 num_rxq; 927 928 for (i = 0; i < vport->num_rxq_grp; i++) { 929 rx_qgrp = &vport->rxq_grps[i]; 930 if (idpf_is_queue_model_split(vport->rxq_model)) 931 num_rxq = rx_qgrp->splitq.num_rxq_sets; 932 else 933 num_rxq = rx_qgrp->singleq.num_rxq; 934 935 for (j = 0; j < num_rxq; j++) { 936 struct idpf_rx_queue *q; 937 938 if (idpf_is_queue_model_split(vport->rxq_model)) 939 q = &rx_qgrp->splitq.rxq_sets[j]->rxq; 940 else 941 q = rx_qgrp->singleq.rxqs[j]; 942 943 err = idpf_rx_desc_alloc(vport, q); 944 if (err) { 945 pci_err(vport->adapter->pdev, 946 "Memory allocation for Rx Queue %u failed\n", 947 i); 948 goto err_out; 949 } 950 } 951 952 if (!idpf_is_queue_model_split(vport->rxq_model)) 953 continue; 954 955 for (j = 0; j < vport->num_bufqs_per_qgrp; j++) { 956 struct idpf_buf_queue *q; 957 958 q = &rx_qgrp->splitq.bufq_sets[j].bufq; 959 960 err = idpf_bufq_desc_alloc(vport, q); 961 if (err) { 962 pci_err(vport->adapter->pdev, 963 "Memory allocation for Rx Buffer Queue %u failed\n", 964 i); 965 goto err_out; 966 } 967 } 968 } 969 970 return 0; 971 972 err_out: 973 idpf_rx_desc_rel_all(vport); 974 975 return err; 976 } 977 978 /** 979 * idpf_txq_group_rel - Release all resources for txq groups 980 * @vport: vport to release txq groups on 981 */ 982 static void idpf_txq_group_rel(struct idpf_vport *vport) 983 { 984 bool split, flow_sch_en; 985 int i, j; 986 987 if (!vport->txq_grps) 988 return; 989 990 split = idpf_is_queue_model_split(vport->txq_model); 991 flow_sch_en = !idpf_is_cap_ena(vport->adapter, IDPF_OTHER_CAPS, 992 VIRTCHNL2_CAP_SPLITQ_QSCHED); 993 994 for (i = 0; i < vport->num_txq_grp; i++) { 995 struct idpf_txq_group *txq_grp = &vport->txq_grps[i]; 996 997 for (j = 0; j < txq_grp->num_txq; j++) { 998 kfree(txq_grp->txqs[j]); 999 txq_grp->txqs[j] = NULL; 1000 } 1001 1002 if (!split) 1003 continue; 1004 1005 kfree(txq_grp->complq); 1006 txq_grp->complq = NULL; 1007 1008 if (flow_sch_en) 1009 kfree(txq_grp->stashes); 1010 } 1011 kfree(vport->txq_grps); 1012 vport->txq_grps = NULL; 1013 } 1014 1015 /** 1016 * idpf_rxq_sw_queue_rel - Release software queue resources 1017 * @rx_qgrp: rx queue group with software queues 1018 */ 1019 static void idpf_rxq_sw_queue_rel(struct idpf_rxq_group *rx_qgrp) 1020 { 1021 int i, j; 1022 1023 for (i = 0; i < rx_qgrp->vport->num_bufqs_per_qgrp; i++) { 1024 struct idpf_bufq_set *bufq_set = &rx_qgrp->splitq.bufq_sets[i]; 1025 1026 for (j = 0; j < bufq_set->num_refillqs; j++) { 1027 kfree(bufq_set->refillqs[j].ring); 1028 bufq_set->refillqs[j].ring = NULL; 1029 } 1030 kfree(bufq_set->refillqs); 1031 bufq_set->refillqs = NULL; 1032 } 1033 } 1034 1035 /** 1036 * idpf_rxq_group_rel - Release all resources for rxq groups 1037 * @vport: vport to release rxq groups on 1038 */ 1039 static void idpf_rxq_group_rel(struct idpf_vport *vport) 1040 { 1041 int i; 1042 1043 if (!vport->rxq_grps) 1044 return; 1045 1046 for (i = 0; i < vport->num_rxq_grp; i++) { 1047 struct idpf_rxq_group *rx_qgrp = &vport->rxq_grps[i]; 1048 u16 num_rxq; 1049 int j; 1050 1051 if (idpf_is_queue_model_split(vport->rxq_model)) { 1052 num_rxq = rx_qgrp->splitq.num_rxq_sets; 1053 for (j = 0; j < num_rxq; j++) { 1054 kfree(rx_qgrp->splitq.rxq_sets[j]); 1055 rx_qgrp->splitq.rxq_sets[j] = NULL; 1056 } 1057 1058 idpf_rxq_sw_queue_rel(rx_qgrp); 1059 kfree(rx_qgrp->splitq.bufq_sets); 1060 rx_qgrp->splitq.bufq_sets = NULL; 1061 } else { 1062 num_rxq = rx_qgrp->singleq.num_rxq; 1063 for (j = 0; j < num_rxq; j++) { 1064 kfree(rx_qgrp->singleq.rxqs[j]); 1065 rx_qgrp->singleq.rxqs[j] = NULL; 1066 } 1067 } 1068 } 1069 kfree(vport->rxq_grps); 1070 vport->rxq_grps = NULL; 1071 } 1072 1073 /** 1074 * idpf_vport_queue_grp_rel_all - Release all queue groups 1075 * @vport: vport to release queue groups for 1076 */ 1077 static void idpf_vport_queue_grp_rel_all(struct idpf_vport *vport) 1078 { 1079 idpf_txq_group_rel(vport); 1080 idpf_rxq_group_rel(vport); 1081 } 1082 1083 /** 1084 * idpf_vport_queues_rel - Free memory for all queues 1085 * @vport: virtual port 1086 * 1087 * Free the memory allocated for queues associated to a vport 1088 */ 1089 void idpf_vport_queues_rel(struct idpf_vport *vport) 1090 { 1091 idpf_tx_desc_rel_all(vport); 1092 idpf_rx_desc_rel_all(vport); 1093 idpf_vport_queue_grp_rel_all(vport); 1094 1095 kfree(vport->txqs); 1096 vport->txqs = NULL; 1097 } 1098 1099 /** 1100 * idpf_vport_init_fast_path_txqs - Initialize fast path txq array 1101 * @vport: vport to init txqs on 1102 * 1103 * We get a queue index from skb->queue_mapping and we need a fast way to 1104 * dereference the queue from queue groups. This allows us to quickly pull a 1105 * txq based on a queue index. 1106 * 1107 * Returns 0 on success, negative on failure 1108 */ 1109 static int idpf_vport_init_fast_path_txqs(struct idpf_vport *vport) 1110 { 1111 struct idpf_ptp_vport_tx_tstamp_caps *caps = vport->tx_tstamp_caps; 1112 struct work_struct *tstamp_task = &vport->tstamp_task; 1113 int i, j, k = 0; 1114 1115 vport->txqs = kcalloc(vport->num_txq, sizeof(*vport->txqs), 1116 GFP_KERNEL); 1117 1118 if (!vport->txqs) 1119 return -ENOMEM; 1120 1121 for (i = 0; i < vport->num_txq_grp; i++) { 1122 struct idpf_txq_group *tx_grp = &vport->txq_grps[i]; 1123 1124 for (j = 0; j < tx_grp->num_txq; j++, k++) { 1125 vport->txqs[k] = tx_grp->txqs[j]; 1126 vport->txqs[k]->idx = k; 1127 1128 if (!caps) 1129 continue; 1130 1131 vport->txqs[k]->cached_tstamp_caps = caps; 1132 vport->txqs[k]->tstamp_task = tstamp_task; 1133 } 1134 } 1135 1136 return 0; 1137 } 1138 1139 /** 1140 * idpf_vport_init_num_qs - Initialize number of queues 1141 * @vport: vport to initialize queues 1142 * @vport_msg: data to be filled into vport 1143 */ 1144 void idpf_vport_init_num_qs(struct idpf_vport *vport, 1145 struct virtchnl2_create_vport *vport_msg) 1146 { 1147 struct idpf_vport_user_config_data *config_data; 1148 u16 idx = vport->idx; 1149 1150 config_data = &vport->adapter->vport_config[idx]->user_config; 1151 vport->num_txq = le16_to_cpu(vport_msg->num_tx_q); 1152 vport->num_rxq = le16_to_cpu(vport_msg->num_rx_q); 1153 /* number of txqs and rxqs in config data will be zeros only in the 1154 * driver load path and we dont update them there after 1155 */ 1156 if (!config_data->num_req_tx_qs && !config_data->num_req_rx_qs) { 1157 config_data->num_req_tx_qs = le16_to_cpu(vport_msg->num_tx_q); 1158 config_data->num_req_rx_qs = le16_to_cpu(vport_msg->num_rx_q); 1159 } 1160 1161 if (idpf_is_queue_model_split(vport->txq_model)) 1162 vport->num_complq = le16_to_cpu(vport_msg->num_tx_complq); 1163 if (idpf_is_queue_model_split(vport->rxq_model)) 1164 vport->num_bufq = le16_to_cpu(vport_msg->num_rx_bufq); 1165 1166 /* Adjust number of buffer queues per Rx queue group. */ 1167 if (!idpf_is_queue_model_split(vport->rxq_model)) { 1168 vport->num_bufqs_per_qgrp = 0; 1169 1170 return; 1171 } 1172 1173 vport->num_bufqs_per_qgrp = IDPF_MAX_BUFQS_PER_RXQ_GRP; 1174 } 1175 1176 /** 1177 * idpf_vport_calc_num_q_desc - Calculate number of queue groups 1178 * @vport: vport to calculate q groups for 1179 */ 1180 void idpf_vport_calc_num_q_desc(struct idpf_vport *vport) 1181 { 1182 struct idpf_vport_user_config_data *config_data; 1183 int num_bufqs = vport->num_bufqs_per_qgrp; 1184 u32 num_req_txq_desc, num_req_rxq_desc; 1185 u16 idx = vport->idx; 1186 int i; 1187 1188 config_data = &vport->adapter->vport_config[idx]->user_config; 1189 num_req_txq_desc = config_data->num_req_txq_desc; 1190 num_req_rxq_desc = config_data->num_req_rxq_desc; 1191 1192 vport->complq_desc_count = 0; 1193 if (num_req_txq_desc) { 1194 vport->txq_desc_count = num_req_txq_desc; 1195 if (idpf_is_queue_model_split(vport->txq_model)) { 1196 vport->complq_desc_count = num_req_txq_desc; 1197 if (vport->complq_desc_count < IDPF_MIN_TXQ_COMPLQ_DESC) 1198 vport->complq_desc_count = 1199 IDPF_MIN_TXQ_COMPLQ_DESC; 1200 } 1201 } else { 1202 vport->txq_desc_count = IDPF_DFLT_TX_Q_DESC_COUNT; 1203 if (idpf_is_queue_model_split(vport->txq_model)) 1204 vport->complq_desc_count = 1205 IDPF_DFLT_TX_COMPLQ_DESC_COUNT; 1206 } 1207 1208 if (num_req_rxq_desc) 1209 vport->rxq_desc_count = num_req_rxq_desc; 1210 else 1211 vport->rxq_desc_count = IDPF_DFLT_RX_Q_DESC_COUNT; 1212 1213 for (i = 0; i < num_bufqs; i++) { 1214 if (!vport->bufq_desc_count[i]) 1215 vport->bufq_desc_count[i] = 1216 IDPF_RX_BUFQ_DESC_COUNT(vport->rxq_desc_count, 1217 num_bufqs); 1218 } 1219 } 1220 1221 /** 1222 * idpf_vport_calc_total_qs - Calculate total number of queues 1223 * @adapter: private data struct 1224 * @vport_idx: vport idx to retrieve vport pointer 1225 * @vport_msg: message to fill with data 1226 * @max_q: vport max queue info 1227 * 1228 * Return 0 on success, error value on failure. 1229 */ 1230 int idpf_vport_calc_total_qs(struct idpf_adapter *adapter, u16 vport_idx, 1231 struct virtchnl2_create_vport *vport_msg, 1232 struct idpf_vport_max_q *max_q) 1233 { 1234 int dflt_splitq_txq_grps = 0, dflt_singleq_txqs = 0; 1235 int dflt_splitq_rxq_grps = 0, dflt_singleq_rxqs = 0; 1236 u16 num_req_tx_qs = 0, num_req_rx_qs = 0; 1237 struct idpf_vport_config *vport_config; 1238 u16 num_txq_grps, num_rxq_grps; 1239 u32 num_qs; 1240 1241 vport_config = adapter->vport_config[vport_idx]; 1242 if (vport_config) { 1243 num_req_tx_qs = vport_config->user_config.num_req_tx_qs; 1244 num_req_rx_qs = vport_config->user_config.num_req_rx_qs; 1245 } else { 1246 int num_cpus; 1247 1248 /* Restrict num of queues to cpus online as a default 1249 * configuration to give best performance. User can always 1250 * override to a max number of queues via ethtool. 1251 */ 1252 num_cpus = num_online_cpus(); 1253 1254 dflt_splitq_txq_grps = min_t(int, max_q->max_txq, num_cpus); 1255 dflt_singleq_txqs = min_t(int, max_q->max_txq, num_cpus); 1256 dflt_splitq_rxq_grps = min_t(int, max_q->max_rxq, num_cpus); 1257 dflt_singleq_rxqs = min_t(int, max_q->max_rxq, num_cpus); 1258 } 1259 1260 if (idpf_is_queue_model_split(le16_to_cpu(vport_msg->txq_model))) { 1261 num_txq_grps = num_req_tx_qs ? num_req_tx_qs : dflt_splitq_txq_grps; 1262 vport_msg->num_tx_complq = cpu_to_le16(num_txq_grps * 1263 IDPF_COMPLQ_PER_GROUP); 1264 vport_msg->num_tx_q = cpu_to_le16(num_txq_grps * 1265 IDPF_DFLT_SPLITQ_TXQ_PER_GROUP); 1266 } else { 1267 num_txq_grps = IDPF_DFLT_SINGLEQ_TX_Q_GROUPS; 1268 num_qs = num_txq_grps * (num_req_tx_qs ? num_req_tx_qs : 1269 dflt_singleq_txqs); 1270 vport_msg->num_tx_q = cpu_to_le16(num_qs); 1271 vport_msg->num_tx_complq = 0; 1272 } 1273 if (idpf_is_queue_model_split(le16_to_cpu(vport_msg->rxq_model))) { 1274 num_rxq_grps = num_req_rx_qs ? num_req_rx_qs : dflt_splitq_rxq_grps; 1275 vport_msg->num_rx_bufq = cpu_to_le16(num_rxq_grps * 1276 IDPF_MAX_BUFQS_PER_RXQ_GRP); 1277 vport_msg->num_rx_q = cpu_to_le16(num_rxq_grps * 1278 IDPF_DFLT_SPLITQ_RXQ_PER_GROUP); 1279 } else { 1280 num_rxq_grps = IDPF_DFLT_SINGLEQ_RX_Q_GROUPS; 1281 num_qs = num_rxq_grps * (num_req_rx_qs ? num_req_rx_qs : 1282 dflt_singleq_rxqs); 1283 vport_msg->num_rx_q = cpu_to_le16(num_qs); 1284 vport_msg->num_rx_bufq = 0; 1285 } 1286 1287 return 0; 1288 } 1289 1290 /** 1291 * idpf_vport_calc_num_q_groups - Calculate number of queue groups 1292 * @vport: vport to calculate q groups for 1293 */ 1294 void idpf_vport_calc_num_q_groups(struct idpf_vport *vport) 1295 { 1296 if (idpf_is_queue_model_split(vport->txq_model)) 1297 vport->num_txq_grp = vport->num_txq; 1298 else 1299 vport->num_txq_grp = IDPF_DFLT_SINGLEQ_TX_Q_GROUPS; 1300 1301 if (idpf_is_queue_model_split(vport->rxq_model)) 1302 vport->num_rxq_grp = vport->num_rxq; 1303 else 1304 vport->num_rxq_grp = IDPF_DFLT_SINGLEQ_RX_Q_GROUPS; 1305 } 1306 1307 /** 1308 * idpf_vport_calc_numq_per_grp - Calculate number of queues per group 1309 * @vport: vport to calculate queues for 1310 * @num_txq: return parameter for number of TX queues 1311 * @num_rxq: return parameter for number of RX queues 1312 */ 1313 static void idpf_vport_calc_numq_per_grp(struct idpf_vport *vport, 1314 u16 *num_txq, u16 *num_rxq) 1315 { 1316 if (idpf_is_queue_model_split(vport->txq_model)) 1317 *num_txq = IDPF_DFLT_SPLITQ_TXQ_PER_GROUP; 1318 else 1319 *num_txq = vport->num_txq; 1320 1321 if (idpf_is_queue_model_split(vport->rxq_model)) 1322 *num_rxq = IDPF_DFLT_SPLITQ_RXQ_PER_GROUP; 1323 else 1324 *num_rxq = vport->num_rxq; 1325 } 1326 1327 /** 1328 * idpf_rxq_set_descids - set the descids supported by this queue 1329 * @vport: virtual port data structure 1330 * @q: rx queue for which descids are set 1331 * 1332 */ 1333 static void idpf_rxq_set_descids(const struct idpf_vport *vport, 1334 struct idpf_rx_queue *q) 1335 { 1336 if (idpf_is_queue_model_split(vport->rxq_model)) { 1337 q->rxdids = VIRTCHNL2_RXDID_2_FLEX_SPLITQ_M; 1338 } else { 1339 if (vport->base_rxd) 1340 q->rxdids = VIRTCHNL2_RXDID_1_32B_BASE_M; 1341 else 1342 q->rxdids = VIRTCHNL2_RXDID_2_FLEX_SQ_NIC_M; 1343 } 1344 } 1345 1346 /** 1347 * idpf_txq_group_alloc - Allocate all txq group resources 1348 * @vport: vport to allocate txq groups for 1349 * @num_txq: number of txqs to allocate for each group 1350 * 1351 * Returns 0 on success, negative on failure 1352 */ 1353 static int idpf_txq_group_alloc(struct idpf_vport *vport, u16 num_txq) 1354 { 1355 bool split, flow_sch_en; 1356 int i; 1357 1358 vport->txq_grps = kcalloc(vport->num_txq_grp, 1359 sizeof(*vport->txq_grps), GFP_KERNEL); 1360 if (!vport->txq_grps) 1361 return -ENOMEM; 1362 1363 split = idpf_is_queue_model_split(vport->txq_model); 1364 flow_sch_en = !idpf_is_cap_ena(vport->adapter, IDPF_OTHER_CAPS, 1365 VIRTCHNL2_CAP_SPLITQ_QSCHED); 1366 1367 for (i = 0; i < vport->num_txq_grp; i++) { 1368 struct idpf_txq_group *tx_qgrp = &vport->txq_grps[i]; 1369 struct idpf_adapter *adapter = vport->adapter; 1370 struct idpf_txq_stash *stashes; 1371 int j; 1372 1373 tx_qgrp->vport = vport; 1374 tx_qgrp->num_txq = num_txq; 1375 1376 for (j = 0; j < tx_qgrp->num_txq; j++) { 1377 tx_qgrp->txqs[j] = kzalloc(sizeof(*tx_qgrp->txqs[j]), 1378 GFP_KERNEL); 1379 if (!tx_qgrp->txqs[j]) 1380 goto err_alloc; 1381 } 1382 1383 if (split && flow_sch_en) { 1384 stashes = kcalloc(num_txq, sizeof(*stashes), 1385 GFP_KERNEL); 1386 if (!stashes) 1387 goto err_alloc; 1388 1389 tx_qgrp->stashes = stashes; 1390 } 1391 1392 for (j = 0; j < tx_qgrp->num_txq; j++) { 1393 struct idpf_tx_queue *q = tx_qgrp->txqs[j]; 1394 1395 q->dev = &adapter->pdev->dev; 1396 q->desc_count = vport->txq_desc_count; 1397 q->tx_max_bufs = idpf_get_max_tx_bufs(adapter); 1398 q->tx_min_pkt_len = idpf_get_min_tx_pkt_len(adapter); 1399 q->netdev = vport->netdev; 1400 q->txq_grp = tx_qgrp; 1401 1402 if (!split) { 1403 q->clean_budget = vport->compln_clean_budget; 1404 idpf_queue_assign(CRC_EN, q, 1405 vport->crc_enable); 1406 } 1407 1408 if (!flow_sch_en) 1409 continue; 1410 1411 if (split) { 1412 q->stash = &stashes[j]; 1413 hash_init(q->stash->sched_buf_hash); 1414 } 1415 1416 idpf_queue_set(FLOW_SCH_EN, q); 1417 } 1418 1419 if (!split) 1420 continue; 1421 1422 tx_qgrp->complq = kcalloc(IDPF_COMPLQ_PER_GROUP, 1423 sizeof(*tx_qgrp->complq), 1424 GFP_KERNEL); 1425 if (!tx_qgrp->complq) 1426 goto err_alloc; 1427 1428 tx_qgrp->complq->desc_count = vport->complq_desc_count; 1429 tx_qgrp->complq->txq_grp = tx_qgrp; 1430 tx_qgrp->complq->netdev = vport->netdev; 1431 tx_qgrp->complq->clean_budget = vport->compln_clean_budget; 1432 1433 if (flow_sch_en) 1434 idpf_queue_set(FLOW_SCH_EN, tx_qgrp->complq); 1435 } 1436 1437 return 0; 1438 1439 err_alloc: 1440 idpf_txq_group_rel(vport); 1441 1442 return -ENOMEM; 1443 } 1444 1445 /** 1446 * idpf_rxq_group_alloc - Allocate all rxq group resources 1447 * @vport: vport to allocate rxq groups for 1448 * @num_rxq: number of rxqs to allocate for each group 1449 * 1450 * Returns 0 on success, negative on failure 1451 */ 1452 static int idpf_rxq_group_alloc(struct idpf_vport *vport, u16 num_rxq) 1453 { 1454 int i, k, err = 0; 1455 bool hs; 1456 1457 vport->rxq_grps = kcalloc(vport->num_rxq_grp, 1458 sizeof(struct idpf_rxq_group), GFP_KERNEL); 1459 if (!vport->rxq_grps) 1460 return -ENOMEM; 1461 1462 hs = idpf_vport_get_hsplit(vport) == ETHTOOL_TCP_DATA_SPLIT_ENABLED; 1463 1464 for (i = 0; i < vport->num_rxq_grp; i++) { 1465 struct idpf_rxq_group *rx_qgrp = &vport->rxq_grps[i]; 1466 int j; 1467 1468 rx_qgrp->vport = vport; 1469 if (!idpf_is_queue_model_split(vport->rxq_model)) { 1470 rx_qgrp->singleq.num_rxq = num_rxq; 1471 for (j = 0; j < num_rxq; j++) { 1472 rx_qgrp->singleq.rxqs[j] = 1473 kzalloc(sizeof(*rx_qgrp->singleq.rxqs[j]), 1474 GFP_KERNEL); 1475 if (!rx_qgrp->singleq.rxqs[j]) { 1476 err = -ENOMEM; 1477 goto err_alloc; 1478 } 1479 } 1480 goto skip_splitq_rx_init; 1481 } 1482 rx_qgrp->splitq.num_rxq_sets = num_rxq; 1483 1484 for (j = 0; j < num_rxq; j++) { 1485 rx_qgrp->splitq.rxq_sets[j] = 1486 kzalloc(sizeof(struct idpf_rxq_set), 1487 GFP_KERNEL); 1488 if (!rx_qgrp->splitq.rxq_sets[j]) { 1489 err = -ENOMEM; 1490 goto err_alloc; 1491 } 1492 } 1493 1494 rx_qgrp->splitq.bufq_sets = kcalloc(vport->num_bufqs_per_qgrp, 1495 sizeof(struct idpf_bufq_set), 1496 GFP_KERNEL); 1497 if (!rx_qgrp->splitq.bufq_sets) { 1498 err = -ENOMEM; 1499 goto err_alloc; 1500 } 1501 1502 for (j = 0; j < vport->num_bufqs_per_qgrp; j++) { 1503 struct idpf_bufq_set *bufq_set = 1504 &rx_qgrp->splitq.bufq_sets[j]; 1505 int swq_size = sizeof(struct idpf_sw_queue); 1506 struct idpf_buf_queue *q; 1507 1508 q = &rx_qgrp->splitq.bufq_sets[j].bufq; 1509 q->desc_count = vport->bufq_desc_count[j]; 1510 q->rx_buffer_low_watermark = IDPF_LOW_WATERMARK; 1511 1512 idpf_queue_assign(HSPLIT_EN, q, hs); 1513 1514 bufq_set->num_refillqs = num_rxq; 1515 bufq_set->refillqs = kcalloc(num_rxq, swq_size, 1516 GFP_KERNEL); 1517 if (!bufq_set->refillqs) { 1518 err = -ENOMEM; 1519 goto err_alloc; 1520 } 1521 for (k = 0; k < bufq_set->num_refillqs; k++) { 1522 struct idpf_sw_queue *refillq = 1523 &bufq_set->refillqs[k]; 1524 1525 refillq->desc_count = 1526 vport->bufq_desc_count[j]; 1527 idpf_queue_set(GEN_CHK, refillq); 1528 idpf_queue_set(RFL_GEN_CHK, refillq); 1529 refillq->ring = kcalloc(refillq->desc_count, 1530 sizeof(*refillq->ring), 1531 GFP_KERNEL); 1532 if (!refillq->ring) { 1533 err = -ENOMEM; 1534 goto err_alloc; 1535 } 1536 } 1537 } 1538 1539 skip_splitq_rx_init: 1540 for (j = 0; j < num_rxq; j++) { 1541 struct idpf_rx_queue *q; 1542 1543 if (!idpf_is_queue_model_split(vport->rxq_model)) { 1544 q = rx_qgrp->singleq.rxqs[j]; 1545 goto setup_rxq; 1546 } 1547 q = &rx_qgrp->splitq.rxq_sets[j]->rxq; 1548 rx_qgrp->splitq.rxq_sets[j]->refillq[0] = 1549 &rx_qgrp->splitq.bufq_sets[0].refillqs[j]; 1550 if (vport->num_bufqs_per_qgrp > IDPF_SINGLE_BUFQ_PER_RXQ_GRP) 1551 rx_qgrp->splitq.rxq_sets[j]->refillq[1] = 1552 &rx_qgrp->splitq.bufq_sets[1].refillqs[j]; 1553 1554 idpf_queue_assign(HSPLIT_EN, q, hs); 1555 1556 setup_rxq: 1557 q->desc_count = vport->rxq_desc_count; 1558 q->rx_ptype_lkup = vport->rx_ptype_lkup; 1559 q->netdev = vport->netdev; 1560 q->bufq_sets = rx_qgrp->splitq.bufq_sets; 1561 q->idx = (i * num_rxq) + j; 1562 q->rx_buffer_low_watermark = IDPF_LOW_WATERMARK; 1563 q->rx_max_pkt_size = vport->netdev->mtu + 1564 LIBETH_RX_LL_LEN; 1565 idpf_rxq_set_descids(vport, q); 1566 } 1567 } 1568 1569 err_alloc: 1570 if (err) 1571 idpf_rxq_group_rel(vport); 1572 1573 return err; 1574 } 1575 1576 /** 1577 * idpf_vport_queue_grp_alloc_all - Allocate all queue groups/resources 1578 * @vport: vport with qgrps to allocate 1579 * 1580 * Returns 0 on success, negative on failure 1581 */ 1582 static int idpf_vport_queue_grp_alloc_all(struct idpf_vport *vport) 1583 { 1584 u16 num_txq, num_rxq; 1585 int err; 1586 1587 idpf_vport_calc_numq_per_grp(vport, &num_txq, &num_rxq); 1588 1589 err = idpf_txq_group_alloc(vport, num_txq); 1590 if (err) 1591 goto err_out; 1592 1593 err = idpf_rxq_group_alloc(vport, num_rxq); 1594 if (err) 1595 goto err_out; 1596 1597 return 0; 1598 1599 err_out: 1600 idpf_vport_queue_grp_rel_all(vport); 1601 1602 return err; 1603 } 1604 1605 /** 1606 * idpf_vport_queues_alloc - Allocate memory for all queues 1607 * @vport: virtual port 1608 * 1609 * Allocate memory for queues associated with a vport. Returns 0 on success, 1610 * negative on failure. 1611 */ 1612 int idpf_vport_queues_alloc(struct idpf_vport *vport) 1613 { 1614 int err; 1615 1616 err = idpf_vport_queue_grp_alloc_all(vport); 1617 if (err) 1618 goto err_out; 1619 1620 err = idpf_tx_desc_alloc_all(vport); 1621 if (err) 1622 goto err_out; 1623 1624 err = idpf_rx_desc_alloc_all(vport); 1625 if (err) 1626 goto err_out; 1627 1628 err = idpf_vport_init_fast_path_txqs(vport); 1629 if (err) 1630 goto err_out; 1631 1632 return 0; 1633 1634 err_out: 1635 idpf_vport_queues_rel(vport); 1636 1637 return err; 1638 } 1639 1640 /** 1641 * idpf_tx_handle_sw_marker - Handle queue marker packet 1642 * @tx_q: tx queue to handle software marker 1643 */ 1644 static void idpf_tx_handle_sw_marker(struct idpf_tx_queue *tx_q) 1645 { 1646 struct idpf_netdev_priv *priv = netdev_priv(tx_q->netdev); 1647 struct idpf_vport *vport = priv->vport; 1648 int i; 1649 1650 idpf_queue_clear(SW_MARKER, tx_q); 1651 /* Hardware must write marker packets to all queues associated with 1652 * completion queues. So check if all queues received marker packets 1653 */ 1654 for (i = 0; i < vport->num_txq; i++) 1655 /* If we're still waiting on any other TXQ marker completions, 1656 * just return now since we cannot wake up the marker_wq yet. 1657 */ 1658 if (idpf_queue_has(SW_MARKER, vport->txqs[i])) 1659 return; 1660 1661 /* Drain complete */ 1662 set_bit(IDPF_VPORT_SW_MARKER, vport->flags); 1663 wake_up(&vport->sw_marker_wq); 1664 } 1665 1666 /** 1667 * idpf_tx_read_tstamp - schedule a work to read Tx timestamp value 1668 * @txq: queue to read the timestamp from 1669 * @skb: socket buffer to provide Tx timestamp value 1670 * 1671 * Schedule a work to read Tx timestamp value generated once the packet is 1672 * transmitted. 1673 */ 1674 static void idpf_tx_read_tstamp(struct idpf_tx_queue *txq, struct sk_buff *skb) 1675 { 1676 struct idpf_ptp_vport_tx_tstamp_caps *tx_tstamp_caps; 1677 struct idpf_ptp_tx_tstamp_status *tx_tstamp_status; 1678 1679 tx_tstamp_caps = txq->cached_tstamp_caps; 1680 spin_lock_bh(&tx_tstamp_caps->status_lock); 1681 1682 for (u32 i = 0; i < tx_tstamp_caps->num_entries; i++) { 1683 tx_tstamp_status = &tx_tstamp_caps->tx_tstamp_status[i]; 1684 if (tx_tstamp_status->state != IDPF_PTP_FREE) 1685 continue; 1686 1687 tx_tstamp_status->skb = skb; 1688 tx_tstamp_status->state = IDPF_PTP_REQUEST; 1689 1690 /* Fetch timestamp from completion descriptor through 1691 * virtchnl msg to report to stack. 1692 */ 1693 queue_work(system_unbound_wq, txq->tstamp_task); 1694 break; 1695 } 1696 1697 spin_unlock_bh(&tx_tstamp_caps->status_lock); 1698 } 1699 1700 /** 1701 * idpf_tx_clean_stashed_bufs - clean bufs that were stored for 1702 * out of order completions 1703 * @txq: queue to clean 1704 * @compl_tag: completion tag of packet to clean (from completion descriptor) 1705 * @cleaned: pointer to stats struct to track cleaned packets/bytes 1706 * @budget: Used to determine if we are in netpoll 1707 */ 1708 static void idpf_tx_clean_stashed_bufs(struct idpf_tx_queue *txq, 1709 u16 compl_tag, 1710 struct libeth_sq_napi_stats *cleaned, 1711 int budget) 1712 { 1713 struct idpf_tx_stash *stash; 1714 struct hlist_node *tmp_buf; 1715 struct libeth_cq_pp cp = { 1716 .dev = txq->dev, 1717 .ss = cleaned, 1718 .napi = budget, 1719 }; 1720 1721 /* Buffer completion */ 1722 hash_for_each_possible_safe(txq->stash->sched_buf_hash, stash, tmp_buf, 1723 hlist, compl_tag) { 1724 if (unlikely(idpf_tx_buf_compl_tag(&stash->buf) != compl_tag)) 1725 continue; 1726 1727 hash_del(&stash->hlist); 1728 1729 if (stash->buf.type == LIBETH_SQE_SKB && 1730 (skb_shinfo(stash->buf.skb)->tx_flags & SKBTX_IN_PROGRESS)) 1731 idpf_tx_read_tstamp(txq, stash->buf.skb); 1732 1733 libeth_tx_complete(&stash->buf, &cp); 1734 1735 /* Push shadow buf back onto stack */ 1736 idpf_buf_lifo_push(&txq->stash->buf_stack, stash); 1737 } 1738 } 1739 1740 /** 1741 * idpf_stash_flow_sch_buffers - store buffer parameters info to be freed at a 1742 * later time (only relevant for flow scheduling mode) 1743 * @txq: Tx queue to clean 1744 * @tx_buf: buffer to store 1745 */ 1746 static int idpf_stash_flow_sch_buffers(struct idpf_tx_queue *txq, 1747 struct idpf_tx_buf *tx_buf) 1748 { 1749 struct idpf_tx_stash *stash; 1750 1751 if (unlikely(tx_buf->type <= LIBETH_SQE_CTX)) 1752 return 0; 1753 1754 stash = idpf_buf_lifo_pop(&txq->stash->buf_stack); 1755 if (unlikely(!stash)) { 1756 net_err_ratelimited("%s: No out-of-order TX buffers left!\n", 1757 netdev_name(txq->netdev)); 1758 1759 return -ENOMEM; 1760 } 1761 1762 /* Store buffer params in shadow buffer */ 1763 stash->buf.skb = tx_buf->skb; 1764 stash->buf.bytes = tx_buf->bytes; 1765 stash->buf.packets = tx_buf->packets; 1766 stash->buf.type = tx_buf->type; 1767 stash->buf.nr_frags = tx_buf->nr_frags; 1768 dma_unmap_addr_set(&stash->buf, dma, dma_unmap_addr(tx_buf, dma)); 1769 dma_unmap_len_set(&stash->buf, len, dma_unmap_len(tx_buf, len)); 1770 idpf_tx_buf_compl_tag(&stash->buf) = idpf_tx_buf_compl_tag(tx_buf); 1771 1772 /* Add buffer to buf_hash table to be freed later */ 1773 hash_add(txq->stash->sched_buf_hash, &stash->hlist, 1774 idpf_tx_buf_compl_tag(&stash->buf)); 1775 1776 tx_buf->type = LIBETH_SQE_EMPTY; 1777 1778 return 0; 1779 } 1780 1781 #define idpf_tx_splitq_clean_bump_ntc(txq, ntc, desc, buf) \ 1782 do { \ 1783 if (unlikely(++(ntc) == (txq)->desc_count)) { \ 1784 ntc = 0; \ 1785 buf = (txq)->tx_buf; \ 1786 desc = &(txq)->flex_tx[0]; \ 1787 } else { \ 1788 (buf)++; \ 1789 (desc)++; \ 1790 } \ 1791 } while (0) 1792 1793 /** 1794 * idpf_tx_splitq_clean - Reclaim resources from buffer queue 1795 * @tx_q: Tx queue to clean 1796 * @end: queue index until which it should be cleaned 1797 * @napi_budget: Used to determine if we are in netpoll 1798 * @cleaned: pointer to stats struct to track cleaned packets/bytes 1799 * @descs_only: true if queue is using flow-based scheduling and should 1800 * not clean buffers at this time 1801 * 1802 * Cleans the queue descriptor ring. If the queue is using queue-based 1803 * scheduling, the buffers will be cleaned as well. If the queue is using 1804 * flow-based scheduling, only the descriptors are cleaned at this time. 1805 * Separate packet completion events will be reported on the completion queue, 1806 * and the buffers will be cleaned separately. The stats are not updated from 1807 * this function when using flow-based scheduling. 1808 * 1809 * Furthermore, in flow scheduling mode, check to make sure there are enough 1810 * reserve buffers to stash the packet. If there are not, return early, which 1811 * will leave next_to_clean pointing to the packet that failed to be stashed. 1812 * 1813 * Return: false in the scenario above, true otherwise. 1814 */ 1815 static bool idpf_tx_splitq_clean(struct idpf_tx_queue *tx_q, u16 end, 1816 int napi_budget, 1817 struct libeth_sq_napi_stats *cleaned, 1818 bool descs_only) 1819 { 1820 union idpf_tx_flex_desc *next_pending_desc = NULL; 1821 union idpf_tx_flex_desc *tx_desc; 1822 u32 ntc = tx_q->next_to_clean; 1823 struct libeth_cq_pp cp = { 1824 .dev = tx_q->dev, 1825 .ss = cleaned, 1826 .napi = napi_budget, 1827 }; 1828 struct idpf_tx_buf *tx_buf; 1829 bool clean_complete = true; 1830 1831 tx_desc = &tx_q->flex_tx[ntc]; 1832 next_pending_desc = &tx_q->flex_tx[end]; 1833 tx_buf = &tx_q->tx_buf[ntc]; 1834 1835 while (tx_desc != next_pending_desc) { 1836 u32 eop_idx; 1837 1838 /* If this entry in the ring was used as a context descriptor, 1839 * it's corresponding entry in the buffer ring is reserved. We 1840 * can skip this descriptor since there is no buffer to clean. 1841 */ 1842 if (tx_buf->type <= LIBETH_SQE_CTX) 1843 goto fetch_next_txq_desc; 1844 1845 if (unlikely(tx_buf->type != LIBETH_SQE_SKB)) 1846 break; 1847 1848 eop_idx = tx_buf->rs_idx; 1849 1850 if (descs_only) { 1851 if (IDPF_TX_BUF_RSV_UNUSED(tx_q) < tx_buf->nr_frags) { 1852 clean_complete = false; 1853 goto tx_splitq_clean_out; 1854 } 1855 1856 idpf_stash_flow_sch_buffers(tx_q, tx_buf); 1857 1858 while (ntc != eop_idx) { 1859 idpf_tx_splitq_clean_bump_ntc(tx_q, ntc, 1860 tx_desc, tx_buf); 1861 idpf_stash_flow_sch_buffers(tx_q, tx_buf); 1862 } 1863 } else { 1864 libeth_tx_complete(tx_buf, &cp); 1865 1866 /* unmap remaining buffers */ 1867 while (ntc != eop_idx) { 1868 idpf_tx_splitq_clean_bump_ntc(tx_q, ntc, 1869 tx_desc, tx_buf); 1870 1871 /* unmap any remaining paged data */ 1872 libeth_tx_complete(tx_buf, &cp); 1873 } 1874 } 1875 1876 fetch_next_txq_desc: 1877 idpf_tx_splitq_clean_bump_ntc(tx_q, ntc, tx_desc, tx_buf); 1878 } 1879 1880 tx_splitq_clean_out: 1881 tx_q->next_to_clean = ntc; 1882 1883 return clean_complete; 1884 } 1885 1886 #define idpf_tx_clean_buf_ring_bump_ntc(txq, ntc, buf) \ 1887 do { \ 1888 (buf)++; \ 1889 (ntc)++; \ 1890 if (unlikely((ntc) == (txq)->desc_count)) { \ 1891 buf = (txq)->tx_buf; \ 1892 ntc = 0; \ 1893 } \ 1894 } while (0) 1895 1896 /** 1897 * idpf_tx_clean_buf_ring - clean flow scheduling TX queue buffers 1898 * @txq: queue to clean 1899 * @compl_tag: completion tag of packet to clean (from completion descriptor) 1900 * @cleaned: pointer to stats struct to track cleaned packets/bytes 1901 * @budget: Used to determine if we are in netpoll 1902 * 1903 * Cleans all buffers associated with the input completion tag either from the 1904 * TX buffer ring or from the hash table if the buffers were previously 1905 * stashed. Returns the byte/segment count for the cleaned packet associated 1906 * this completion tag. 1907 */ 1908 static bool idpf_tx_clean_buf_ring(struct idpf_tx_queue *txq, u16 compl_tag, 1909 struct libeth_sq_napi_stats *cleaned, 1910 int budget) 1911 { 1912 u16 idx = compl_tag & txq->compl_tag_bufid_m; 1913 struct idpf_tx_buf *tx_buf = NULL; 1914 struct libeth_cq_pp cp = { 1915 .dev = txq->dev, 1916 .ss = cleaned, 1917 .napi = budget, 1918 }; 1919 u16 ntc, orig_idx = idx; 1920 1921 tx_buf = &txq->tx_buf[idx]; 1922 1923 if (unlikely(tx_buf->type <= LIBETH_SQE_CTX || 1924 idpf_tx_buf_compl_tag(tx_buf) != compl_tag)) 1925 return false; 1926 1927 if (tx_buf->type == LIBETH_SQE_SKB) { 1928 if (skb_shinfo(tx_buf->skb)->tx_flags & SKBTX_IN_PROGRESS) 1929 idpf_tx_read_tstamp(txq, tx_buf->skb); 1930 1931 libeth_tx_complete(tx_buf, &cp); 1932 } 1933 1934 idpf_tx_clean_buf_ring_bump_ntc(txq, idx, tx_buf); 1935 1936 while (idpf_tx_buf_compl_tag(tx_buf) == compl_tag) { 1937 libeth_tx_complete(tx_buf, &cp); 1938 idpf_tx_clean_buf_ring_bump_ntc(txq, idx, tx_buf); 1939 } 1940 1941 /* 1942 * It's possible the packet we just cleaned was an out of order 1943 * completion, which means we can stash the buffers starting from 1944 * the original next_to_clean and reuse the descriptors. We need 1945 * to compare the descriptor ring next_to_clean packet's "first" buffer 1946 * to the "first" buffer of the packet we just cleaned to determine if 1947 * this is the case. Howevever, next_to_clean can point to either a 1948 * reserved buffer that corresponds to a context descriptor used for the 1949 * next_to_clean packet (TSO packet) or the "first" buffer (single 1950 * packet). The orig_idx from the packet we just cleaned will always 1951 * point to the "first" buffer. If next_to_clean points to a reserved 1952 * buffer, let's bump ntc once and start the comparison from there. 1953 */ 1954 ntc = txq->next_to_clean; 1955 tx_buf = &txq->tx_buf[ntc]; 1956 1957 if (tx_buf->type == LIBETH_SQE_CTX) 1958 idpf_tx_clean_buf_ring_bump_ntc(txq, ntc, tx_buf); 1959 1960 /* 1961 * If ntc still points to a different "first" buffer, clean the 1962 * descriptor ring and stash all of the buffers for later cleaning. If 1963 * we cannot stash all of the buffers, next_to_clean will point to the 1964 * "first" buffer of the packet that could not be stashed and cleaning 1965 * will start there next time. 1966 */ 1967 if (unlikely(tx_buf != &txq->tx_buf[orig_idx] && 1968 !idpf_tx_splitq_clean(txq, orig_idx, budget, cleaned, 1969 true))) 1970 return true; 1971 1972 /* 1973 * Otherwise, update next_to_clean to reflect the cleaning that was 1974 * done above. 1975 */ 1976 txq->next_to_clean = idx; 1977 1978 return true; 1979 } 1980 1981 /** 1982 * idpf_tx_handle_rs_completion - clean a single packet and all of its buffers 1983 * whether on the buffer ring or in the hash table 1984 * @txq: Tx ring to clean 1985 * @desc: pointer to completion queue descriptor to extract completion 1986 * information from 1987 * @cleaned: pointer to stats struct to track cleaned packets/bytes 1988 * @budget: Used to determine if we are in netpoll 1989 * 1990 * Returns bytes/packets cleaned 1991 */ 1992 static void idpf_tx_handle_rs_completion(struct idpf_tx_queue *txq, 1993 struct idpf_splitq_tx_compl_desc *desc, 1994 struct libeth_sq_napi_stats *cleaned, 1995 int budget) 1996 { 1997 u16 compl_tag; 1998 1999 if (!idpf_queue_has(FLOW_SCH_EN, txq)) { 2000 u16 head = le16_to_cpu(desc->q_head_compl_tag.q_head); 2001 2002 idpf_tx_splitq_clean(txq, head, budget, cleaned, false); 2003 return; 2004 } 2005 2006 compl_tag = le16_to_cpu(desc->q_head_compl_tag.compl_tag); 2007 2008 /* If we didn't clean anything on the ring, this packet must be 2009 * in the hash table. Go clean it there. 2010 */ 2011 if (!idpf_tx_clean_buf_ring(txq, compl_tag, cleaned, budget)) 2012 idpf_tx_clean_stashed_bufs(txq, compl_tag, cleaned, budget); 2013 } 2014 2015 /** 2016 * idpf_tx_clean_complq - Reclaim resources on completion queue 2017 * @complq: Tx ring to clean 2018 * @budget: Used to determine if we are in netpoll 2019 * @cleaned: returns number of packets cleaned 2020 * 2021 * Returns true if there's any budget left (e.g. the clean is finished) 2022 */ 2023 static bool idpf_tx_clean_complq(struct idpf_compl_queue *complq, int budget, 2024 int *cleaned) 2025 { 2026 struct idpf_splitq_tx_compl_desc *tx_desc; 2027 s16 ntc = complq->next_to_clean; 2028 struct idpf_netdev_priv *np; 2029 unsigned int complq_budget; 2030 bool complq_ok = true; 2031 int i; 2032 2033 complq_budget = complq->clean_budget; 2034 tx_desc = &complq->comp[ntc]; 2035 ntc -= complq->desc_count; 2036 2037 do { 2038 struct libeth_sq_napi_stats cleaned_stats = { }; 2039 struct idpf_tx_queue *tx_q; 2040 int rel_tx_qid; 2041 u16 hw_head; 2042 u8 ctype; /* completion type */ 2043 u16 gen; 2044 2045 /* if the descriptor isn't done, no work yet to do */ 2046 gen = le16_get_bits(tx_desc->qid_comptype_gen, 2047 IDPF_TXD_COMPLQ_GEN_M); 2048 if (idpf_queue_has(GEN_CHK, complq) != gen) 2049 break; 2050 2051 /* Find necessary info of TX queue to clean buffers */ 2052 rel_tx_qid = le16_get_bits(tx_desc->qid_comptype_gen, 2053 IDPF_TXD_COMPLQ_QID_M); 2054 if (rel_tx_qid >= complq->txq_grp->num_txq || 2055 !complq->txq_grp->txqs[rel_tx_qid]) { 2056 netdev_err(complq->netdev, "TxQ not found\n"); 2057 goto fetch_next_desc; 2058 } 2059 tx_q = complq->txq_grp->txqs[rel_tx_qid]; 2060 2061 /* Determine completion type */ 2062 ctype = le16_get_bits(tx_desc->qid_comptype_gen, 2063 IDPF_TXD_COMPLQ_COMPL_TYPE_M); 2064 switch (ctype) { 2065 case IDPF_TXD_COMPLT_RE: 2066 hw_head = le16_to_cpu(tx_desc->q_head_compl_tag.q_head); 2067 2068 idpf_tx_splitq_clean(tx_q, hw_head, budget, 2069 &cleaned_stats, true); 2070 break; 2071 case IDPF_TXD_COMPLT_RS: 2072 idpf_tx_handle_rs_completion(tx_q, tx_desc, 2073 &cleaned_stats, budget); 2074 break; 2075 case IDPF_TXD_COMPLT_SW_MARKER: 2076 idpf_tx_handle_sw_marker(tx_q); 2077 break; 2078 default: 2079 netdev_err(tx_q->netdev, 2080 "Unknown TX completion type: %d\n", ctype); 2081 goto fetch_next_desc; 2082 } 2083 2084 u64_stats_update_begin(&tx_q->stats_sync); 2085 u64_stats_add(&tx_q->q_stats.packets, cleaned_stats.packets); 2086 u64_stats_add(&tx_q->q_stats.bytes, cleaned_stats.bytes); 2087 tx_q->cleaned_pkts += cleaned_stats.packets; 2088 tx_q->cleaned_bytes += cleaned_stats.bytes; 2089 complq->num_completions++; 2090 u64_stats_update_end(&tx_q->stats_sync); 2091 2092 fetch_next_desc: 2093 tx_desc++; 2094 ntc++; 2095 if (unlikely(!ntc)) { 2096 ntc -= complq->desc_count; 2097 tx_desc = &complq->comp[0]; 2098 idpf_queue_change(GEN_CHK, complq); 2099 } 2100 2101 prefetch(tx_desc); 2102 2103 /* update budget accounting */ 2104 complq_budget--; 2105 } while (likely(complq_budget)); 2106 2107 /* Store the state of the complq to be used later in deciding if a 2108 * TXQ can be started again 2109 */ 2110 if (unlikely(IDPF_TX_COMPLQ_PENDING(complq->txq_grp) > 2111 IDPF_TX_COMPLQ_OVERFLOW_THRESH(complq))) 2112 complq_ok = false; 2113 2114 np = netdev_priv(complq->netdev); 2115 for (i = 0; i < complq->txq_grp->num_txq; ++i) { 2116 struct idpf_tx_queue *tx_q = complq->txq_grp->txqs[i]; 2117 struct netdev_queue *nq; 2118 bool dont_wake; 2119 2120 /* We didn't clean anything on this queue, move along */ 2121 if (!tx_q->cleaned_bytes) 2122 continue; 2123 2124 *cleaned += tx_q->cleaned_pkts; 2125 2126 /* Update BQL */ 2127 nq = netdev_get_tx_queue(tx_q->netdev, tx_q->idx); 2128 2129 dont_wake = !complq_ok || IDPF_TX_BUF_RSV_LOW(tx_q) || 2130 np->state != __IDPF_VPORT_UP || 2131 !netif_carrier_ok(tx_q->netdev); 2132 /* Check if the TXQ needs to and can be restarted */ 2133 __netif_txq_completed_wake(nq, tx_q->cleaned_pkts, tx_q->cleaned_bytes, 2134 IDPF_DESC_UNUSED(tx_q), IDPF_TX_WAKE_THRESH, 2135 dont_wake); 2136 2137 /* Reset cleaned stats for the next time this queue is 2138 * cleaned 2139 */ 2140 tx_q->cleaned_bytes = 0; 2141 tx_q->cleaned_pkts = 0; 2142 } 2143 2144 ntc += complq->desc_count; 2145 complq->next_to_clean = ntc; 2146 2147 return !!complq_budget; 2148 } 2149 2150 /** 2151 * idpf_tx_splitq_build_ctb - populate command tag and size for queue 2152 * based scheduling descriptors 2153 * @desc: descriptor to populate 2154 * @params: pointer to tx params struct 2155 * @td_cmd: command to be filled in desc 2156 * @size: size of buffer 2157 */ 2158 void idpf_tx_splitq_build_ctb(union idpf_tx_flex_desc *desc, 2159 struct idpf_tx_splitq_params *params, 2160 u16 td_cmd, u16 size) 2161 { 2162 desc->q.qw1.cmd_dtype = 2163 le16_encode_bits(params->dtype, IDPF_FLEX_TXD_QW1_DTYPE_M); 2164 desc->q.qw1.cmd_dtype |= 2165 le16_encode_bits(td_cmd, IDPF_FLEX_TXD_QW1_CMD_M); 2166 desc->q.qw1.buf_size = cpu_to_le16(size); 2167 desc->q.qw1.l2tags.l2tag1 = cpu_to_le16(params->td_tag); 2168 } 2169 2170 /** 2171 * idpf_tx_splitq_build_flow_desc - populate command tag and size for flow 2172 * scheduling descriptors 2173 * @desc: descriptor to populate 2174 * @params: pointer to tx params struct 2175 * @td_cmd: command to be filled in desc 2176 * @size: size of buffer 2177 */ 2178 void idpf_tx_splitq_build_flow_desc(union idpf_tx_flex_desc *desc, 2179 struct idpf_tx_splitq_params *params, 2180 u16 td_cmd, u16 size) 2181 { 2182 *(u32 *)&desc->flow.qw1.cmd_dtype = (u8)(params->dtype | td_cmd); 2183 desc->flow.qw1.rxr_bufsize = cpu_to_le16((u16)size); 2184 desc->flow.qw1.compl_tag = cpu_to_le16(params->compl_tag); 2185 } 2186 2187 /* Global conditions to tell whether the txq (and related resources) 2188 * has room to allow the use of "size" descriptors. 2189 */ 2190 static int idpf_txq_has_room(struct idpf_tx_queue *tx_q, u32 size) 2191 { 2192 if (IDPF_DESC_UNUSED(tx_q) < size || 2193 IDPF_TX_COMPLQ_PENDING(tx_q->txq_grp) > 2194 IDPF_TX_COMPLQ_OVERFLOW_THRESH(tx_q->txq_grp->complq) || 2195 IDPF_TX_BUF_RSV_LOW(tx_q)) 2196 return 0; 2197 return 1; 2198 } 2199 2200 /** 2201 * idpf_tx_maybe_stop_splitq - 1st level check for Tx splitq stop conditions 2202 * @tx_q: the queue to be checked 2203 * @descs_needed: number of descriptors required for this packet 2204 * 2205 * Returns 0 if stop is not needed 2206 */ 2207 static int idpf_tx_maybe_stop_splitq(struct idpf_tx_queue *tx_q, 2208 unsigned int descs_needed) 2209 { 2210 if (netif_subqueue_maybe_stop(tx_q->netdev, tx_q->idx, 2211 idpf_txq_has_room(tx_q, descs_needed), 2212 1, 1)) 2213 return 0; 2214 2215 u64_stats_update_begin(&tx_q->stats_sync); 2216 u64_stats_inc(&tx_q->q_stats.q_busy); 2217 u64_stats_update_end(&tx_q->stats_sync); 2218 2219 return -EBUSY; 2220 } 2221 2222 /** 2223 * idpf_tx_buf_hw_update - Store the new tail value 2224 * @tx_q: queue to bump 2225 * @val: new tail index 2226 * @xmit_more: more skb's pending 2227 * 2228 * The naming here is special in that 'hw' signals that this function is about 2229 * to do a register write to update our queue status. We know this can only 2230 * mean tail here as HW should be owning head for TX. 2231 */ 2232 void idpf_tx_buf_hw_update(struct idpf_tx_queue *tx_q, u32 val, 2233 bool xmit_more) 2234 { 2235 struct netdev_queue *nq; 2236 2237 nq = netdev_get_tx_queue(tx_q->netdev, tx_q->idx); 2238 tx_q->next_to_use = val; 2239 2240 /* Force memory writes to complete before letting h/w 2241 * know there are new descriptors to fetch. (Only 2242 * applicable for weak-ordered memory model archs, 2243 * such as IA-64). 2244 */ 2245 wmb(); 2246 2247 /* notify HW of packet */ 2248 if (netif_xmit_stopped(nq) || !xmit_more) 2249 writel(val, tx_q->tail); 2250 } 2251 2252 /** 2253 * idpf_tx_desc_count_required - calculate number of Tx descriptors needed 2254 * @txq: queue to send buffer on 2255 * @skb: send buffer 2256 * 2257 * Returns number of data descriptors needed for this skb. 2258 */ 2259 unsigned int idpf_tx_desc_count_required(struct idpf_tx_queue *txq, 2260 struct sk_buff *skb) 2261 { 2262 const struct skb_shared_info *shinfo; 2263 unsigned int count = 0, i; 2264 2265 count += !!skb_headlen(skb); 2266 2267 if (!skb_is_nonlinear(skb)) 2268 return count; 2269 2270 shinfo = skb_shinfo(skb); 2271 for (i = 0; i < shinfo->nr_frags; i++) { 2272 unsigned int size; 2273 2274 size = skb_frag_size(&shinfo->frags[i]); 2275 2276 /* We only need to use the idpf_size_to_txd_count check if the 2277 * fragment is going to span multiple descriptors, 2278 * i.e. size >= 16K. 2279 */ 2280 if (size >= SZ_16K) 2281 count += idpf_size_to_txd_count(size); 2282 else 2283 count++; 2284 } 2285 2286 if (idpf_chk_linearize(skb, txq->tx_max_bufs, count)) { 2287 if (__skb_linearize(skb)) 2288 return 0; 2289 2290 count = idpf_size_to_txd_count(skb->len); 2291 u64_stats_update_begin(&txq->stats_sync); 2292 u64_stats_inc(&txq->q_stats.linearize); 2293 u64_stats_update_end(&txq->stats_sync); 2294 } 2295 2296 return count; 2297 } 2298 2299 /** 2300 * idpf_tx_dma_map_error - handle TX DMA map errors 2301 * @txq: queue to send buffer on 2302 * @skb: send buffer 2303 * @first: original first buffer info buffer for packet 2304 * @idx: starting point on ring to unwind 2305 */ 2306 void idpf_tx_dma_map_error(struct idpf_tx_queue *txq, struct sk_buff *skb, 2307 struct idpf_tx_buf *first, u16 idx) 2308 { 2309 struct libeth_sq_napi_stats ss = { }; 2310 struct libeth_cq_pp cp = { 2311 .dev = txq->dev, 2312 .ss = &ss, 2313 }; 2314 2315 u64_stats_update_begin(&txq->stats_sync); 2316 u64_stats_inc(&txq->q_stats.dma_map_errs); 2317 u64_stats_update_end(&txq->stats_sync); 2318 2319 /* clear dma mappings for failed tx_buf map */ 2320 for (;;) { 2321 struct idpf_tx_buf *tx_buf; 2322 2323 tx_buf = &txq->tx_buf[idx]; 2324 libeth_tx_complete(tx_buf, &cp); 2325 if (tx_buf == first) 2326 break; 2327 if (idx == 0) 2328 idx = txq->desc_count; 2329 idx--; 2330 } 2331 2332 if (skb_is_gso(skb)) { 2333 union idpf_tx_flex_desc *tx_desc; 2334 2335 /* If we failed a DMA mapping for a TSO packet, we will have 2336 * used one additional descriptor for a context 2337 * descriptor. Reset that here. 2338 */ 2339 tx_desc = &txq->flex_tx[idx]; 2340 memset(tx_desc, 0, sizeof(*tx_desc)); 2341 if (idx == 0) 2342 idx = txq->desc_count; 2343 idx--; 2344 } 2345 2346 /* Update tail in case netdev_xmit_more was previously true */ 2347 idpf_tx_buf_hw_update(txq, idx, false); 2348 } 2349 2350 /** 2351 * idpf_tx_splitq_bump_ntu - adjust NTU and generation 2352 * @txq: the tx ring to wrap 2353 * @ntu: ring index to bump 2354 */ 2355 static unsigned int idpf_tx_splitq_bump_ntu(struct idpf_tx_queue *txq, u16 ntu) 2356 { 2357 ntu++; 2358 2359 if (ntu == txq->desc_count) { 2360 ntu = 0; 2361 txq->compl_tag_cur_gen = IDPF_TX_ADJ_COMPL_TAG_GEN(txq); 2362 } 2363 2364 return ntu; 2365 } 2366 2367 /** 2368 * idpf_tx_splitq_map - Build the Tx flex descriptor 2369 * @tx_q: queue to send buffer on 2370 * @params: pointer to splitq params struct 2371 * @first: first buffer info buffer to use 2372 * 2373 * This function loops over the skb data pointed to by *first 2374 * and gets a physical address for each memory location and programs 2375 * it and the length into the transmit flex descriptor. 2376 */ 2377 static void idpf_tx_splitq_map(struct idpf_tx_queue *tx_q, 2378 struct idpf_tx_splitq_params *params, 2379 struct idpf_tx_buf *first) 2380 { 2381 union idpf_tx_flex_desc *tx_desc; 2382 unsigned int data_len, size; 2383 struct idpf_tx_buf *tx_buf; 2384 u16 i = tx_q->next_to_use; 2385 struct netdev_queue *nq; 2386 struct sk_buff *skb; 2387 skb_frag_t *frag; 2388 u16 td_cmd = 0; 2389 dma_addr_t dma; 2390 2391 skb = first->skb; 2392 2393 td_cmd = params->offload.td_cmd; 2394 2395 data_len = skb->data_len; 2396 size = skb_headlen(skb); 2397 2398 tx_desc = &tx_q->flex_tx[i]; 2399 2400 dma = dma_map_single(tx_q->dev, skb->data, size, DMA_TO_DEVICE); 2401 2402 tx_buf = first; 2403 first->nr_frags = 0; 2404 2405 params->compl_tag = 2406 (tx_q->compl_tag_cur_gen << tx_q->compl_tag_gen_s) | i; 2407 2408 for (frag = &skb_shinfo(skb)->frags[0];; frag++) { 2409 unsigned int max_data = IDPF_TX_MAX_DESC_DATA_ALIGNED; 2410 2411 if (dma_mapping_error(tx_q->dev, dma)) 2412 return idpf_tx_dma_map_error(tx_q, skb, first, i); 2413 2414 first->nr_frags++; 2415 idpf_tx_buf_compl_tag(tx_buf) = params->compl_tag; 2416 tx_buf->type = LIBETH_SQE_FRAG; 2417 2418 /* record length, and DMA address */ 2419 dma_unmap_len_set(tx_buf, len, size); 2420 dma_unmap_addr_set(tx_buf, dma, dma); 2421 2422 /* buf_addr is in same location for both desc types */ 2423 tx_desc->q.buf_addr = cpu_to_le64(dma); 2424 2425 /* The stack can send us fragments that are too large for a 2426 * single descriptor i.e. frag size > 16K-1. We will need to 2427 * split the fragment across multiple descriptors in this case. 2428 * To adhere to HW alignment restrictions, the fragment needs 2429 * to be split such that the first chunk ends on a 4K boundary 2430 * and all subsequent chunks start on a 4K boundary. We still 2431 * want to send as much data as possible though, so our 2432 * intermediate descriptor chunk size will be 12K. 2433 * 2434 * For example, consider a 32K fragment mapped to DMA addr 2600. 2435 * ------------------------------------------------------------ 2436 * | frag_size = 32K | 2437 * ------------------------------------------------------------ 2438 * |2600 |16384 |28672 2439 * 2440 * 3 descriptors will be used for this fragment. The HW expects 2441 * the descriptors to contain the following: 2442 * ------------------------------------------------------------ 2443 * | size = 13784 | size = 12K | size = 6696 | 2444 * | dma = 2600 | dma = 16384 | dma = 28672 | 2445 * ------------------------------------------------------------ 2446 * 2447 * We need to first adjust the max_data for the first chunk so 2448 * that it ends on a 4K boundary. By negating the value of the 2449 * DMA address and taking only the low order bits, we're 2450 * effectively calculating 2451 * 4K - (DMA addr lower order bits) = 2452 * bytes to next boundary. 2453 * 2454 * Add that to our base aligned max_data (12K) and we have 2455 * our first chunk size. In the example above, 2456 * 13784 = 12K + (4096-2600) 2457 * 2458 * After guaranteeing the first chunk ends on a 4K boundary, we 2459 * will give the intermediate descriptors 12K chunks and 2460 * whatever is left to the final descriptor. This ensures that 2461 * all descriptors used for the remaining chunks of the 2462 * fragment start on a 4K boundary and we use as few 2463 * descriptors as possible. 2464 */ 2465 max_data += -dma & (IDPF_TX_MAX_READ_REQ_SIZE - 1); 2466 while (unlikely(size > IDPF_TX_MAX_DESC_DATA)) { 2467 idpf_tx_splitq_build_desc(tx_desc, params, td_cmd, 2468 max_data); 2469 2470 if (unlikely(++i == tx_q->desc_count)) { 2471 tx_buf = tx_q->tx_buf; 2472 tx_desc = &tx_q->flex_tx[0]; 2473 i = 0; 2474 tx_q->compl_tag_cur_gen = 2475 IDPF_TX_ADJ_COMPL_TAG_GEN(tx_q); 2476 } else { 2477 tx_buf++; 2478 tx_desc++; 2479 } 2480 2481 /* Since this packet has a buffer that is going to span 2482 * multiple descriptors, it's going to leave holes in 2483 * to the TX buffer ring. To ensure these holes do not 2484 * cause issues in the cleaning routines, we will clear 2485 * them of any stale data and assign them the same 2486 * completion tag as the current packet. Then when the 2487 * packet is being cleaned, the cleaning routines will 2488 * simply pass over these holes and finish cleaning the 2489 * rest of the packet. 2490 */ 2491 tx_buf->type = LIBETH_SQE_EMPTY; 2492 idpf_tx_buf_compl_tag(tx_buf) = params->compl_tag; 2493 2494 /* Adjust the DMA offset and the remaining size of the 2495 * fragment. On the first iteration of this loop, 2496 * max_data will be >= 12K and <= 16K-1. On any 2497 * subsequent iteration of this loop, max_data will 2498 * always be 12K. 2499 */ 2500 dma += max_data; 2501 size -= max_data; 2502 2503 /* Reset max_data since remaining chunks will be 12K 2504 * at most 2505 */ 2506 max_data = IDPF_TX_MAX_DESC_DATA_ALIGNED; 2507 2508 /* buf_addr is in same location for both desc types */ 2509 tx_desc->q.buf_addr = cpu_to_le64(dma); 2510 } 2511 2512 if (!data_len) 2513 break; 2514 2515 idpf_tx_splitq_build_desc(tx_desc, params, td_cmd, size); 2516 2517 if (unlikely(++i == tx_q->desc_count)) { 2518 tx_buf = tx_q->tx_buf; 2519 tx_desc = &tx_q->flex_tx[0]; 2520 i = 0; 2521 tx_q->compl_tag_cur_gen = IDPF_TX_ADJ_COMPL_TAG_GEN(tx_q); 2522 } else { 2523 tx_buf++; 2524 tx_desc++; 2525 } 2526 2527 size = skb_frag_size(frag); 2528 data_len -= size; 2529 2530 dma = skb_frag_dma_map(tx_q->dev, frag, 0, size, 2531 DMA_TO_DEVICE); 2532 } 2533 2534 /* record SW timestamp if HW timestamp is not available */ 2535 skb_tx_timestamp(skb); 2536 2537 first->type = LIBETH_SQE_SKB; 2538 2539 /* write last descriptor with RS and EOP bits */ 2540 first->rs_idx = i; 2541 td_cmd |= params->eop_cmd; 2542 idpf_tx_splitq_build_desc(tx_desc, params, td_cmd, size); 2543 i = idpf_tx_splitq_bump_ntu(tx_q, i); 2544 2545 tx_q->txq_grp->num_completions_pending++; 2546 2547 /* record bytecount for BQL */ 2548 nq = netdev_get_tx_queue(tx_q->netdev, tx_q->idx); 2549 netdev_tx_sent_queue(nq, first->bytes); 2550 2551 idpf_tx_buf_hw_update(tx_q, i, netdev_xmit_more()); 2552 } 2553 2554 /** 2555 * idpf_tso - computes mss and TSO length to prepare for TSO 2556 * @skb: pointer to skb 2557 * @off: pointer to struct that holds offload parameters 2558 * 2559 * Returns error (negative) if TSO was requested but cannot be applied to the 2560 * given skb, 0 if TSO does not apply to the given skb, or 1 otherwise. 2561 */ 2562 int idpf_tso(struct sk_buff *skb, struct idpf_tx_offload_params *off) 2563 { 2564 const struct skb_shared_info *shinfo; 2565 union { 2566 struct iphdr *v4; 2567 struct ipv6hdr *v6; 2568 unsigned char *hdr; 2569 } ip; 2570 union { 2571 struct tcphdr *tcp; 2572 struct udphdr *udp; 2573 unsigned char *hdr; 2574 } l4; 2575 u32 paylen, l4_start; 2576 int err; 2577 2578 if (!skb_is_gso(skb)) 2579 return 0; 2580 2581 err = skb_cow_head(skb, 0); 2582 if (err < 0) 2583 return err; 2584 2585 shinfo = skb_shinfo(skb); 2586 2587 ip.hdr = skb_network_header(skb); 2588 l4.hdr = skb_transport_header(skb); 2589 2590 /* initialize outer IP header fields */ 2591 if (ip.v4->version == 4) { 2592 ip.v4->tot_len = 0; 2593 ip.v4->check = 0; 2594 } else if (ip.v6->version == 6) { 2595 ip.v6->payload_len = 0; 2596 } 2597 2598 l4_start = skb_transport_offset(skb); 2599 2600 /* remove payload length from checksum */ 2601 paylen = skb->len - l4_start; 2602 2603 switch (shinfo->gso_type & ~SKB_GSO_DODGY) { 2604 case SKB_GSO_TCPV4: 2605 case SKB_GSO_TCPV6: 2606 csum_replace_by_diff(&l4.tcp->check, 2607 (__force __wsum)htonl(paylen)); 2608 off->tso_hdr_len = __tcp_hdrlen(l4.tcp) + l4_start; 2609 break; 2610 case SKB_GSO_UDP_L4: 2611 csum_replace_by_diff(&l4.udp->check, 2612 (__force __wsum)htonl(paylen)); 2613 /* compute length of segmentation header */ 2614 off->tso_hdr_len = sizeof(struct udphdr) + l4_start; 2615 l4.udp->len = htons(shinfo->gso_size + sizeof(struct udphdr)); 2616 break; 2617 default: 2618 return -EINVAL; 2619 } 2620 2621 off->tso_len = skb->len - off->tso_hdr_len; 2622 off->mss = shinfo->gso_size; 2623 off->tso_segs = shinfo->gso_segs; 2624 2625 off->tx_flags |= IDPF_TX_FLAGS_TSO; 2626 2627 return 1; 2628 } 2629 2630 /** 2631 * __idpf_chk_linearize - Check skb is not using too many buffers 2632 * @skb: send buffer 2633 * @max_bufs: maximum number of buffers 2634 * 2635 * For TSO we need to count the TSO header and segment payload separately. As 2636 * such we need to check cases where we have max_bufs-1 fragments or more as we 2637 * can potentially require max_bufs+1 DMA transactions, 1 for the TSO header, 1 2638 * for the segment payload in the first descriptor, and another max_buf-1 for 2639 * the fragments. 2640 */ 2641 static bool __idpf_chk_linearize(struct sk_buff *skb, unsigned int max_bufs) 2642 { 2643 const struct skb_shared_info *shinfo = skb_shinfo(skb); 2644 const skb_frag_t *frag, *stale; 2645 int nr_frags, sum; 2646 2647 /* no need to check if number of frags is less than max_bufs - 1 */ 2648 nr_frags = shinfo->nr_frags; 2649 if (nr_frags < (max_bufs - 1)) 2650 return false; 2651 2652 /* We need to walk through the list and validate that each group 2653 * of max_bufs-2 fragments totals at least gso_size. 2654 */ 2655 nr_frags -= max_bufs - 2; 2656 frag = &shinfo->frags[0]; 2657 2658 /* Initialize size to the negative value of gso_size minus 1. We use 2659 * this as the worst case scenario in which the frag ahead of us only 2660 * provides one byte which is why we are limited to max_bufs-2 2661 * descriptors for a single transmit as the header and previous 2662 * fragment are already consuming 2 descriptors. 2663 */ 2664 sum = 1 - shinfo->gso_size; 2665 2666 /* Add size of frags 0 through 4 to create our initial sum */ 2667 sum += skb_frag_size(frag++); 2668 sum += skb_frag_size(frag++); 2669 sum += skb_frag_size(frag++); 2670 sum += skb_frag_size(frag++); 2671 sum += skb_frag_size(frag++); 2672 2673 /* Walk through fragments adding latest fragment, testing it, and 2674 * then removing stale fragments from the sum. 2675 */ 2676 for (stale = &shinfo->frags[0];; stale++) { 2677 int stale_size = skb_frag_size(stale); 2678 2679 sum += skb_frag_size(frag++); 2680 2681 /* The stale fragment may present us with a smaller 2682 * descriptor than the actual fragment size. To account 2683 * for that we need to remove all the data on the front and 2684 * figure out what the remainder would be in the last 2685 * descriptor associated with the fragment. 2686 */ 2687 if (stale_size > IDPF_TX_MAX_DESC_DATA) { 2688 int align_pad = -(skb_frag_off(stale)) & 2689 (IDPF_TX_MAX_READ_REQ_SIZE - 1); 2690 2691 sum -= align_pad; 2692 stale_size -= align_pad; 2693 2694 do { 2695 sum -= IDPF_TX_MAX_DESC_DATA_ALIGNED; 2696 stale_size -= IDPF_TX_MAX_DESC_DATA_ALIGNED; 2697 } while (stale_size > IDPF_TX_MAX_DESC_DATA); 2698 } 2699 2700 /* if sum is negative we failed to make sufficient progress */ 2701 if (sum < 0) 2702 return true; 2703 2704 if (!nr_frags--) 2705 break; 2706 2707 sum -= stale_size; 2708 } 2709 2710 return false; 2711 } 2712 2713 /** 2714 * idpf_chk_linearize - Check if skb exceeds max descriptors per packet 2715 * @skb: send buffer 2716 * @max_bufs: maximum scatter gather buffers for single packet 2717 * @count: number of buffers this packet needs 2718 * 2719 * Make sure we don't exceed maximum scatter gather buffers for a single 2720 * packet. We have to do some special checking around the boundary (max_bufs-1) 2721 * if TSO is on since we need count the TSO header and payload separately. 2722 * E.g.: a packet with 7 fragments can require 9 DMA transactions; 1 for TSO 2723 * header, 1 for segment payload, and then 7 for the fragments. 2724 */ 2725 static bool idpf_chk_linearize(struct sk_buff *skb, unsigned int max_bufs, 2726 unsigned int count) 2727 { 2728 if (likely(count < max_bufs)) 2729 return false; 2730 if (skb_is_gso(skb)) 2731 return __idpf_chk_linearize(skb, max_bufs); 2732 2733 return count > max_bufs; 2734 } 2735 2736 /** 2737 * idpf_tx_splitq_get_ctx_desc - grab next desc and update buffer ring 2738 * @txq: queue to put context descriptor on 2739 * 2740 * Since the TX buffer rings mimics the descriptor ring, update the tx buffer 2741 * ring entry to reflect that this index is a context descriptor 2742 */ 2743 static union idpf_flex_tx_ctx_desc * 2744 idpf_tx_splitq_get_ctx_desc(struct idpf_tx_queue *txq) 2745 { 2746 union idpf_flex_tx_ctx_desc *desc; 2747 int i = txq->next_to_use; 2748 2749 txq->tx_buf[i].type = LIBETH_SQE_CTX; 2750 2751 /* grab the next descriptor */ 2752 desc = &txq->flex_ctx[i]; 2753 txq->next_to_use = idpf_tx_splitq_bump_ntu(txq, i); 2754 2755 return desc; 2756 } 2757 2758 /** 2759 * idpf_tx_drop_skb - free the SKB and bump tail if necessary 2760 * @tx_q: queue to send buffer on 2761 * @skb: pointer to skb 2762 */ 2763 netdev_tx_t idpf_tx_drop_skb(struct idpf_tx_queue *tx_q, struct sk_buff *skb) 2764 { 2765 u64_stats_update_begin(&tx_q->stats_sync); 2766 u64_stats_inc(&tx_q->q_stats.skb_drops); 2767 u64_stats_update_end(&tx_q->stats_sync); 2768 2769 idpf_tx_buf_hw_update(tx_q, tx_q->next_to_use, false); 2770 2771 dev_kfree_skb(skb); 2772 2773 return NETDEV_TX_OK; 2774 } 2775 2776 #if (IS_ENABLED(CONFIG_PTP_1588_CLOCK)) 2777 /** 2778 * idpf_tx_tstamp - set up context descriptor for hardware timestamp 2779 * @tx_q: queue to send buffer on 2780 * @skb: pointer to the SKB we're sending 2781 * @off: pointer to the offload struct 2782 * 2783 * Return: Positive index number on success, negative otherwise. 2784 */ 2785 static int idpf_tx_tstamp(struct idpf_tx_queue *tx_q, struct sk_buff *skb, 2786 struct idpf_tx_offload_params *off) 2787 { 2788 int err, idx; 2789 2790 /* only timestamp the outbound packet if the user has requested it */ 2791 if (likely(!(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP))) 2792 return -1; 2793 2794 if (!idpf_ptp_get_txq_tstamp_capability(tx_q)) 2795 return -1; 2796 2797 /* Tx timestamps cannot be sampled when doing TSO */ 2798 if (off->tx_flags & IDPF_TX_FLAGS_TSO) 2799 return -1; 2800 2801 /* Grab an open timestamp slot */ 2802 err = idpf_ptp_request_ts(tx_q, skb, &idx); 2803 if (err) { 2804 u64_stats_update_begin(&tx_q->stats_sync); 2805 u64_stats_inc(&tx_q->q_stats.tstamp_skipped); 2806 u64_stats_update_end(&tx_q->stats_sync); 2807 2808 return -1; 2809 } 2810 2811 off->tx_flags |= IDPF_TX_FLAGS_TSYN; 2812 2813 return idx; 2814 } 2815 2816 /** 2817 * idpf_tx_set_tstamp_desc - Set the Tx descriptor fields needed to generate 2818 * PHY Tx timestamp 2819 * @ctx_desc: Context descriptor 2820 * @idx: Index of the Tx timestamp latch 2821 */ 2822 static void idpf_tx_set_tstamp_desc(union idpf_flex_tx_ctx_desc *ctx_desc, 2823 u32 idx) 2824 { 2825 ctx_desc->tsyn.qw1 = le64_encode_bits(IDPF_TX_DESC_DTYPE_CTX, 2826 IDPF_TX_CTX_DTYPE_M) | 2827 le64_encode_bits(IDPF_TX_CTX_DESC_TSYN, 2828 IDPF_TX_CTX_CMD_M) | 2829 le64_encode_bits(idx, IDPF_TX_CTX_TSYN_REG_M); 2830 } 2831 #else /* CONFIG_PTP_1588_CLOCK */ 2832 static int idpf_tx_tstamp(struct idpf_tx_queue *tx_q, struct sk_buff *skb, 2833 struct idpf_tx_offload_params *off) 2834 { 2835 return -1; 2836 } 2837 2838 static void idpf_tx_set_tstamp_desc(union idpf_flex_tx_ctx_desc *ctx_desc, 2839 u32 idx) 2840 { } 2841 #endif /* CONFIG_PTP_1588_CLOCK */ 2842 2843 /** 2844 * idpf_tx_splitq_frame - Sends buffer on Tx ring using flex descriptors 2845 * @skb: send buffer 2846 * @tx_q: queue to send buffer on 2847 * 2848 * Returns NETDEV_TX_OK if sent, else an error code 2849 */ 2850 static netdev_tx_t idpf_tx_splitq_frame(struct sk_buff *skb, 2851 struct idpf_tx_queue *tx_q) 2852 { 2853 struct idpf_tx_splitq_params tx_params = { }; 2854 union idpf_flex_tx_ctx_desc *ctx_desc; 2855 struct idpf_tx_buf *first; 2856 unsigned int count; 2857 int tso, idx; 2858 2859 count = idpf_tx_desc_count_required(tx_q, skb); 2860 if (unlikely(!count)) 2861 return idpf_tx_drop_skb(tx_q, skb); 2862 2863 tso = idpf_tso(skb, &tx_params.offload); 2864 if (unlikely(tso < 0)) 2865 return idpf_tx_drop_skb(tx_q, skb); 2866 2867 /* Check for splitq specific TX resources */ 2868 count += (IDPF_TX_DESCS_PER_CACHE_LINE + tso); 2869 if (idpf_tx_maybe_stop_splitq(tx_q, count)) { 2870 idpf_tx_buf_hw_update(tx_q, tx_q->next_to_use, false); 2871 2872 return NETDEV_TX_BUSY; 2873 } 2874 2875 if (tso) { 2876 /* If tso is needed, set up context desc */ 2877 ctx_desc = idpf_tx_splitq_get_ctx_desc(tx_q); 2878 2879 ctx_desc->tso.qw1.cmd_dtype = 2880 cpu_to_le16(IDPF_TX_DESC_DTYPE_FLEX_TSO_CTX | 2881 IDPF_TX_FLEX_CTX_DESC_CMD_TSO); 2882 ctx_desc->tso.qw0.flex_tlen = 2883 cpu_to_le32(tx_params.offload.tso_len & 2884 IDPF_TXD_FLEX_CTX_TLEN_M); 2885 ctx_desc->tso.qw0.mss_rt = 2886 cpu_to_le16(tx_params.offload.mss & 2887 IDPF_TXD_FLEX_CTX_MSS_RT_M); 2888 ctx_desc->tso.qw0.hdr_len = tx_params.offload.tso_hdr_len; 2889 2890 u64_stats_update_begin(&tx_q->stats_sync); 2891 u64_stats_inc(&tx_q->q_stats.lso_pkts); 2892 u64_stats_update_end(&tx_q->stats_sync); 2893 } 2894 2895 idx = idpf_tx_tstamp(tx_q, skb, &tx_params.offload); 2896 if (idx != -1) { 2897 ctx_desc = idpf_tx_splitq_get_ctx_desc(tx_q); 2898 idpf_tx_set_tstamp_desc(ctx_desc, idx); 2899 } 2900 2901 /* record the location of the first descriptor for this packet */ 2902 first = &tx_q->tx_buf[tx_q->next_to_use]; 2903 first->skb = skb; 2904 2905 if (tso) { 2906 first->packets = tx_params.offload.tso_segs; 2907 first->bytes = skb->len + 2908 ((first->packets - 1) * tx_params.offload.tso_hdr_len); 2909 } else { 2910 first->packets = 1; 2911 first->bytes = max_t(unsigned int, skb->len, ETH_ZLEN); 2912 } 2913 2914 if (idpf_queue_has(FLOW_SCH_EN, tx_q)) { 2915 tx_params.dtype = IDPF_TX_DESC_DTYPE_FLEX_FLOW_SCHE; 2916 tx_params.eop_cmd = IDPF_TXD_FLEX_FLOW_CMD_EOP; 2917 /* Set the RE bit to catch any packets that may have not been 2918 * stashed during RS completion cleaning. MIN_GAP is set to 2919 * MIN_RING size to ensure it will be set at least once each 2920 * time around the ring. 2921 */ 2922 if (!(tx_q->next_to_use % IDPF_TX_SPLITQ_RE_MIN_GAP)) { 2923 tx_params.eop_cmd |= IDPF_TXD_FLEX_FLOW_CMD_RE; 2924 tx_q->txq_grp->num_completions_pending++; 2925 } 2926 2927 if (skb->ip_summed == CHECKSUM_PARTIAL) 2928 tx_params.offload.td_cmd |= IDPF_TXD_FLEX_FLOW_CMD_CS_EN; 2929 2930 } else { 2931 tx_params.dtype = IDPF_TX_DESC_DTYPE_FLEX_L2TAG1_L2TAG2; 2932 tx_params.eop_cmd = IDPF_TXD_LAST_DESC_CMD; 2933 2934 if (skb->ip_summed == CHECKSUM_PARTIAL) 2935 tx_params.offload.td_cmd |= IDPF_TX_FLEX_DESC_CMD_CS_EN; 2936 } 2937 2938 idpf_tx_splitq_map(tx_q, &tx_params, first); 2939 2940 return NETDEV_TX_OK; 2941 } 2942 2943 /** 2944 * idpf_tx_start - Selects the right Tx queue to send buffer 2945 * @skb: send buffer 2946 * @netdev: network interface device structure 2947 * 2948 * Returns NETDEV_TX_OK if sent, else an error code 2949 */ 2950 netdev_tx_t idpf_tx_start(struct sk_buff *skb, struct net_device *netdev) 2951 { 2952 struct idpf_vport *vport = idpf_netdev_to_vport(netdev); 2953 struct idpf_tx_queue *tx_q; 2954 2955 if (unlikely(skb_get_queue_mapping(skb) >= vport->num_txq)) { 2956 dev_kfree_skb_any(skb); 2957 2958 return NETDEV_TX_OK; 2959 } 2960 2961 tx_q = vport->txqs[skb_get_queue_mapping(skb)]; 2962 2963 /* hardware can't handle really short frames, hardware padding works 2964 * beyond this point 2965 */ 2966 if (skb_put_padto(skb, tx_q->tx_min_pkt_len)) { 2967 idpf_tx_buf_hw_update(tx_q, tx_q->next_to_use, false); 2968 2969 return NETDEV_TX_OK; 2970 } 2971 2972 if (idpf_is_queue_model_split(vport->txq_model)) 2973 return idpf_tx_splitq_frame(skb, tx_q); 2974 else 2975 return idpf_tx_singleq_frame(skb, tx_q); 2976 } 2977 2978 /** 2979 * idpf_rx_hash - set the hash value in the skb 2980 * @rxq: Rx descriptor ring packet is being transacted on 2981 * @skb: pointer to current skb being populated 2982 * @rx_desc: Receive descriptor 2983 * @decoded: Decoded Rx packet type related fields 2984 */ 2985 static void 2986 idpf_rx_hash(const struct idpf_rx_queue *rxq, struct sk_buff *skb, 2987 const struct virtchnl2_rx_flex_desc_adv_nic_3 *rx_desc, 2988 struct libeth_rx_pt decoded) 2989 { 2990 u32 hash; 2991 2992 if (!libeth_rx_pt_has_hash(rxq->netdev, decoded)) 2993 return; 2994 2995 hash = le16_to_cpu(rx_desc->hash1) | 2996 (rx_desc->ff2_mirrid_hash2.hash2 << 16) | 2997 (rx_desc->hash3 << 24); 2998 2999 libeth_rx_pt_set_hash(skb, hash, decoded); 3000 } 3001 3002 /** 3003 * idpf_rx_csum - Indicate in skb if checksum is good 3004 * @rxq: Rx descriptor ring packet is being transacted on 3005 * @skb: pointer to current skb being populated 3006 * @csum_bits: checksum fields extracted from the descriptor 3007 * @decoded: Decoded Rx packet type related fields 3008 * 3009 * skb->protocol must be set before this function is called 3010 */ 3011 static void idpf_rx_csum(struct idpf_rx_queue *rxq, struct sk_buff *skb, 3012 struct libeth_rx_csum csum_bits, 3013 struct libeth_rx_pt decoded) 3014 { 3015 bool ipv4, ipv6; 3016 3017 /* check if Rx checksum is enabled */ 3018 if (!libeth_rx_pt_has_checksum(rxq->netdev, decoded)) 3019 return; 3020 3021 /* check if HW has decoded the packet and checksum */ 3022 if (unlikely(!csum_bits.l3l4p)) 3023 return; 3024 3025 ipv4 = libeth_rx_pt_get_ip_ver(decoded) == LIBETH_RX_PT_OUTER_IPV4; 3026 ipv6 = libeth_rx_pt_get_ip_ver(decoded) == LIBETH_RX_PT_OUTER_IPV6; 3027 3028 if (unlikely(ipv4 && (csum_bits.ipe || csum_bits.eipe))) 3029 goto checksum_fail; 3030 3031 if (unlikely(ipv6 && csum_bits.ipv6exadd)) 3032 return; 3033 3034 /* check for L4 errors and handle packets that were not able to be 3035 * checksummed 3036 */ 3037 if (unlikely(csum_bits.l4e)) 3038 goto checksum_fail; 3039 3040 if (!csum_bits.raw_csum_valid || 3041 decoded.inner_prot == LIBETH_RX_PT_INNER_SCTP) { 3042 skb->ip_summed = CHECKSUM_UNNECESSARY; 3043 return; 3044 } 3045 3046 skb->csum = csum_unfold((__force __sum16)~swab16(csum_bits.raw_csum)); 3047 skb->ip_summed = CHECKSUM_COMPLETE; 3048 3049 return; 3050 3051 checksum_fail: 3052 u64_stats_update_begin(&rxq->stats_sync); 3053 u64_stats_inc(&rxq->q_stats.hw_csum_err); 3054 u64_stats_update_end(&rxq->stats_sync); 3055 } 3056 3057 /** 3058 * idpf_rx_splitq_extract_csum_bits - Extract checksum bits from descriptor 3059 * @rx_desc: receive descriptor 3060 * 3061 * Return: parsed checksum status. 3062 **/ 3063 static struct libeth_rx_csum 3064 idpf_rx_splitq_extract_csum_bits(const struct virtchnl2_rx_flex_desc_adv_nic_3 *rx_desc) 3065 { 3066 struct libeth_rx_csum csum = { }; 3067 u8 qword0, qword1; 3068 3069 qword0 = rx_desc->status_err0_qw0; 3070 qword1 = rx_desc->status_err0_qw1; 3071 3072 csum.ipe = FIELD_GET(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_XSUM_IPE_M, 3073 qword1); 3074 csum.eipe = FIELD_GET(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_XSUM_EIPE_M, 3075 qword1); 3076 csum.l4e = FIELD_GET(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_XSUM_L4E_M, 3077 qword1); 3078 csum.l3l4p = FIELD_GET(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_L3L4P_M, 3079 qword1); 3080 csum.ipv6exadd = FIELD_GET(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_IPV6EXADD_M, 3081 qword0); 3082 csum.raw_csum_valid = 3083 !le16_get_bits(rx_desc->ptype_err_fflags0, 3084 VIRTCHNL2_RX_FLEX_DESC_ADV_RAW_CSUM_INV_M); 3085 csum.raw_csum = le16_to_cpu(rx_desc->misc.raw_cs); 3086 3087 return csum; 3088 } 3089 3090 /** 3091 * idpf_rx_rsc - Set the RSC fields in the skb 3092 * @rxq : Rx descriptor ring packet is being transacted on 3093 * @skb : pointer to current skb being populated 3094 * @rx_desc: Receive descriptor 3095 * @decoded: Decoded Rx packet type related fields 3096 * 3097 * Return 0 on success and error code on failure 3098 * 3099 * Populate the skb fields with the total number of RSC segments, RSC payload 3100 * length and packet type. 3101 */ 3102 static int idpf_rx_rsc(struct idpf_rx_queue *rxq, struct sk_buff *skb, 3103 const struct virtchnl2_rx_flex_desc_adv_nic_3 *rx_desc, 3104 struct libeth_rx_pt decoded) 3105 { 3106 u16 rsc_segments, rsc_seg_len; 3107 bool ipv4, ipv6; 3108 int len; 3109 3110 if (unlikely(libeth_rx_pt_get_ip_ver(decoded) == 3111 LIBETH_RX_PT_OUTER_L2)) 3112 return -EINVAL; 3113 3114 rsc_seg_len = le16_to_cpu(rx_desc->misc.rscseglen); 3115 if (unlikely(!rsc_seg_len)) 3116 return -EINVAL; 3117 3118 ipv4 = libeth_rx_pt_get_ip_ver(decoded) == LIBETH_RX_PT_OUTER_IPV4; 3119 ipv6 = libeth_rx_pt_get_ip_ver(decoded) == LIBETH_RX_PT_OUTER_IPV6; 3120 3121 if (unlikely(!(ipv4 ^ ipv6))) 3122 return -EINVAL; 3123 3124 rsc_segments = DIV_ROUND_UP(skb->data_len, rsc_seg_len); 3125 3126 NAPI_GRO_CB(skb)->count = rsc_segments; 3127 skb_shinfo(skb)->gso_size = rsc_seg_len; 3128 3129 skb_reset_network_header(skb); 3130 3131 if (ipv4) { 3132 struct iphdr *ipv4h = ip_hdr(skb); 3133 3134 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4; 3135 3136 /* Reset and set transport header offset in skb */ 3137 skb_set_transport_header(skb, sizeof(struct iphdr)); 3138 len = skb->len - skb_transport_offset(skb); 3139 3140 /* Compute the TCP pseudo header checksum*/ 3141 tcp_hdr(skb)->check = 3142 ~tcp_v4_check(len, ipv4h->saddr, ipv4h->daddr, 0); 3143 } else { 3144 struct ipv6hdr *ipv6h = ipv6_hdr(skb); 3145 3146 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6; 3147 skb_set_transport_header(skb, sizeof(struct ipv6hdr)); 3148 len = skb->len - skb_transport_offset(skb); 3149 tcp_hdr(skb)->check = 3150 ~tcp_v6_check(len, &ipv6h->saddr, &ipv6h->daddr, 0); 3151 } 3152 3153 tcp_gro_complete(skb); 3154 3155 u64_stats_update_begin(&rxq->stats_sync); 3156 u64_stats_inc(&rxq->q_stats.rsc_pkts); 3157 u64_stats_update_end(&rxq->stats_sync); 3158 3159 return 0; 3160 } 3161 3162 /** 3163 * idpf_rx_hwtstamp - check for an RX timestamp and pass up the stack 3164 * @rxq: pointer to the rx queue that receives the timestamp 3165 * @rx_desc: pointer to rx descriptor containing timestamp 3166 * @skb: skb to put timestamp in 3167 */ 3168 static void 3169 idpf_rx_hwtstamp(const struct idpf_rx_queue *rxq, 3170 const struct virtchnl2_rx_flex_desc_adv_nic_3 *rx_desc, 3171 struct sk_buff *skb) 3172 { 3173 u64 cached_time, ts_ns; 3174 u32 ts_high; 3175 3176 if (!(rx_desc->ts_low & VIRTCHNL2_RX_FLEX_TSTAMP_VALID)) 3177 return; 3178 3179 cached_time = READ_ONCE(rxq->cached_phc_time); 3180 3181 ts_high = le32_to_cpu(rx_desc->ts_high); 3182 ts_ns = idpf_ptp_tstamp_extend_32b_to_64b(cached_time, ts_high); 3183 3184 *skb_hwtstamps(skb) = (struct skb_shared_hwtstamps) { 3185 .hwtstamp = ns_to_ktime(ts_ns), 3186 }; 3187 } 3188 3189 /** 3190 * idpf_rx_process_skb_fields - Populate skb header fields from Rx descriptor 3191 * @rxq: Rx descriptor ring packet is being transacted on 3192 * @skb: pointer to current skb being populated 3193 * @rx_desc: Receive descriptor 3194 * 3195 * This function checks the ring, descriptor, and packet information in 3196 * order to populate the hash, checksum, protocol, and 3197 * other fields within the skb. 3198 */ 3199 static int 3200 idpf_rx_process_skb_fields(struct idpf_rx_queue *rxq, struct sk_buff *skb, 3201 const struct virtchnl2_rx_flex_desc_adv_nic_3 *rx_desc) 3202 { 3203 struct libeth_rx_csum csum_bits; 3204 struct libeth_rx_pt decoded; 3205 u16 rx_ptype; 3206 3207 rx_ptype = le16_get_bits(rx_desc->ptype_err_fflags0, 3208 VIRTCHNL2_RX_FLEX_DESC_ADV_PTYPE_M); 3209 decoded = rxq->rx_ptype_lkup[rx_ptype]; 3210 3211 /* process RSS/hash */ 3212 idpf_rx_hash(rxq, skb, rx_desc, decoded); 3213 3214 if (idpf_queue_has(PTP, rxq)) 3215 idpf_rx_hwtstamp(rxq, rx_desc, skb); 3216 3217 skb->protocol = eth_type_trans(skb, rxq->netdev); 3218 skb_record_rx_queue(skb, rxq->idx); 3219 3220 if (le16_get_bits(rx_desc->hdrlen_flags, 3221 VIRTCHNL2_RX_FLEX_DESC_ADV_RSC_M)) 3222 return idpf_rx_rsc(rxq, skb, rx_desc, decoded); 3223 3224 csum_bits = idpf_rx_splitq_extract_csum_bits(rx_desc); 3225 idpf_rx_csum(rxq, skb, csum_bits, decoded); 3226 3227 return 0; 3228 } 3229 3230 /** 3231 * idpf_rx_add_frag - Add contents of Rx buffer to sk_buff as a frag 3232 * @rx_buf: buffer containing page to add 3233 * @skb: sk_buff to place the data into 3234 * @size: packet length from rx_desc 3235 * 3236 * This function will add the data contained in rx_buf->page to the skb. 3237 * It will just attach the page as a frag to the skb. 3238 * The function will then update the page offset. 3239 */ 3240 void idpf_rx_add_frag(struct idpf_rx_buf *rx_buf, struct sk_buff *skb, 3241 unsigned int size) 3242 { 3243 u32 hr = rx_buf->page->pp->p.offset; 3244 3245 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buf->page, 3246 rx_buf->offset + hr, size, rx_buf->truesize); 3247 } 3248 3249 /** 3250 * idpf_rx_hsplit_wa - handle header buffer overflows and split errors 3251 * @hdr: Rx buffer for the headers 3252 * @buf: Rx buffer for the payload 3253 * @data_len: number of bytes received to the payload buffer 3254 * 3255 * When a header buffer overflow occurs or the HW was unable do parse the 3256 * packet type to perform header split, the whole frame gets placed to the 3257 * payload buffer. We can't build a valid skb around a payload buffer when 3258 * the header split is active since it doesn't reserve any head- or tailroom. 3259 * In that case, copy either the whole frame when it's short or just the 3260 * Ethernet header to the header buffer to be able to build an skb and adjust 3261 * the data offset in the payload buffer, IOW emulate the header split. 3262 * 3263 * Return: number of bytes copied to the header buffer. 3264 */ 3265 static u32 idpf_rx_hsplit_wa(const struct libeth_fqe *hdr, 3266 struct libeth_fqe *buf, u32 data_len) 3267 { 3268 u32 copy = data_len <= L1_CACHE_BYTES ? data_len : ETH_HLEN; 3269 const void *src; 3270 void *dst; 3271 3272 if (!libeth_rx_sync_for_cpu(buf, copy)) 3273 return 0; 3274 3275 dst = page_address(hdr->page) + hdr->offset + hdr->page->pp->p.offset; 3276 src = page_address(buf->page) + buf->offset + buf->page->pp->p.offset; 3277 memcpy(dst, src, LARGEST_ALIGN(copy)); 3278 3279 buf->offset += copy; 3280 3281 return copy; 3282 } 3283 3284 /** 3285 * idpf_rx_build_skb - Allocate skb and populate it from header buffer 3286 * @buf: Rx buffer to pull data from 3287 * @size: the length of the packet 3288 * 3289 * This function allocates an skb. It then populates it with the page data from 3290 * the current receive descriptor, taking care to set up the skb correctly. 3291 */ 3292 struct sk_buff *idpf_rx_build_skb(const struct libeth_fqe *buf, u32 size) 3293 { 3294 u32 hr = buf->page->pp->p.offset; 3295 struct sk_buff *skb; 3296 void *va; 3297 3298 va = page_address(buf->page) + buf->offset; 3299 prefetch(va + hr); 3300 3301 skb = napi_build_skb(va, buf->truesize); 3302 if (unlikely(!skb)) 3303 return NULL; 3304 3305 skb_mark_for_recycle(skb); 3306 3307 skb_reserve(skb, hr); 3308 __skb_put(skb, size); 3309 3310 return skb; 3311 } 3312 3313 /** 3314 * idpf_rx_splitq_test_staterr - tests bits in Rx descriptor 3315 * status and error fields 3316 * @stat_err_field: field from descriptor to test bits in 3317 * @stat_err_bits: value to mask 3318 * 3319 */ 3320 static bool idpf_rx_splitq_test_staterr(const u8 stat_err_field, 3321 const u8 stat_err_bits) 3322 { 3323 return !!(stat_err_field & stat_err_bits); 3324 } 3325 3326 /** 3327 * idpf_rx_splitq_is_eop - process handling of EOP buffers 3328 * @rx_desc: Rx descriptor for current buffer 3329 * 3330 * If the buffer is an EOP buffer, this function exits returning true, 3331 * otherwise return false indicating that this is in fact a non-EOP buffer. 3332 */ 3333 static bool idpf_rx_splitq_is_eop(struct virtchnl2_rx_flex_desc_adv_nic_3 *rx_desc) 3334 { 3335 /* if we are the last buffer then there is nothing else to do */ 3336 return likely(idpf_rx_splitq_test_staterr(rx_desc->status_err0_qw1, 3337 IDPF_RXD_EOF_SPLITQ)); 3338 } 3339 3340 /** 3341 * idpf_rx_splitq_clean - Clean completed descriptors from Rx queue 3342 * @rxq: Rx descriptor queue to retrieve receive buffer queue 3343 * @budget: Total limit on number of packets to process 3344 * 3345 * This function provides a "bounce buffer" approach to Rx interrupt 3346 * processing. The advantage to this is that on systems that have 3347 * expensive overhead for IOMMU access this provides a means of avoiding 3348 * it by maintaining the mapping of the page to the system. 3349 * 3350 * Returns amount of work completed 3351 */ 3352 static int idpf_rx_splitq_clean(struct idpf_rx_queue *rxq, int budget) 3353 { 3354 int total_rx_bytes = 0, total_rx_pkts = 0; 3355 struct idpf_buf_queue *rx_bufq = NULL; 3356 struct sk_buff *skb = rxq->skb; 3357 u16 ntc = rxq->next_to_clean; 3358 3359 /* Process Rx packets bounded by budget */ 3360 while (likely(total_rx_pkts < budget)) { 3361 struct virtchnl2_rx_flex_desc_adv_nic_3 *rx_desc; 3362 struct libeth_fqe *hdr, *rx_buf = NULL; 3363 struct idpf_sw_queue *refillq = NULL; 3364 struct idpf_rxq_set *rxq_set = NULL; 3365 unsigned int pkt_len = 0; 3366 unsigned int hdr_len = 0; 3367 u16 gen_id, buf_id = 0; 3368 int bufq_id; 3369 u8 rxdid; 3370 3371 /* get the Rx desc from Rx queue based on 'next_to_clean' */ 3372 rx_desc = &rxq->rx[ntc].flex_adv_nic_3_wb; 3373 3374 /* This memory barrier is needed to keep us from reading 3375 * any other fields out of the rx_desc 3376 */ 3377 dma_rmb(); 3378 3379 /* if the descriptor isn't done, no work yet to do */ 3380 gen_id = le16_get_bits(rx_desc->pktlen_gen_bufq_id, 3381 VIRTCHNL2_RX_FLEX_DESC_ADV_GEN_M); 3382 3383 if (idpf_queue_has(GEN_CHK, rxq) != gen_id) 3384 break; 3385 3386 rxdid = FIELD_GET(VIRTCHNL2_RX_FLEX_DESC_ADV_RXDID_M, 3387 rx_desc->rxdid_ucast); 3388 if (rxdid != VIRTCHNL2_RXDID_2_FLEX_SPLITQ) { 3389 IDPF_RX_BUMP_NTC(rxq, ntc); 3390 u64_stats_update_begin(&rxq->stats_sync); 3391 u64_stats_inc(&rxq->q_stats.bad_descs); 3392 u64_stats_update_end(&rxq->stats_sync); 3393 continue; 3394 } 3395 3396 pkt_len = le16_get_bits(rx_desc->pktlen_gen_bufq_id, 3397 VIRTCHNL2_RX_FLEX_DESC_ADV_LEN_PBUF_M); 3398 3399 bufq_id = le16_get_bits(rx_desc->pktlen_gen_bufq_id, 3400 VIRTCHNL2_RX_FLEX_DESC_ADV_BUFQ_ID_M); 3401 3402 rxq_set = container_of(rxq, struct idpf_rxq_set, rxq); 3403 refillq = rxq_set->refillq[bufq_id]; 3404 3405 /* retrieve buffer from the rxq */ 3406 rx_bufq = &rxq->bufq_sets[bufq_id].bufq; 3407 3408 buf_id = le16_to_cpu(rx_desc->buf_id); 3409 3410 rx_buf = &rx_bufq->buf[buf_id]; 3411 3412 if (!rx_bufq->hdr_pp) 3413 goto payload; 3414 3415 #define __HBO_BIT VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_HBO_M 3416 #define __HDR_LEN_MASK VIRTCHNL2_RX_FLEX_DESC_ADV_LEN_HDR_M 3417 if (likely(!(rx_desc->status_err0_qw1 & __HBO_BIT))) 3418 /* If a header buffer overflow, occurs, i.e. header is 3419 * too large to fit in the header split buffer, HW will 3420 * put the entire packet, including headers, in the 3421 * data/payload buffer. 3422 */ 3423 hdr_len = le16_get_bits(rx_desc->hdrlen_flags, 3424 __HDR_LEN_MASK); 3425 #undef __HDR_LEN_MASK 3426 #undef __HBO_BIT 3427 3428 hdr = &rx_bufq->hdr_buf[buf_id]; 3429 3430 if (unlikely(!hdr_len && !skb)) { 3431 hdr_len = idpf_rx_hsplit_wa(hdr, rx_buf, pkt_len); 3432 pkt_len -= hdr_len; 3433 3434 u64_stats_update_begin(&rxq->stats_sync); 3435 u64_stats_inc(&rxq->q_stats.hsplit_buf_ovf); 3436 u64_stats_update_end(&rxq->stats_sync); 3437 } 3438 3439 if (libeth_rx_sync_for_cpu(hdr, hdr_len)) { 3440 skb = idpf_rx_build_skb(hdr, hdr_len); 3441 if (!skb) 3442 break; 3443 3444 u64_stats_update_begin(&rxq->stats_sync); 3445 u64_stats_inc(&rxq->q_stats.hsplit_pkts); 3446 u64_stats_update_end(&rxq->stats_sync); 3447 } 3448 3449 hdr->page = NULL; 3450 3451 payload: 3452 if (!libeth_rx_sync_for_cpu(rx_buf, pkt_len)) 3453 goto skip_data; 3454 3455 if (skb) 3456 idpf_rx_add_frag(rx_buf, skb, pkt_len); 3457 else 3458 skb = idpf_rx_build_skb(rx_buf, pkt_len); 3459 3460 /* exit if we failed to retrieve a buffer */ 3461 if (!skb) 3462 break; 3463 3464 skip_data: 3465 rx_buf->page = NULL; 3466 3467 idpf_rx_post_buf_refill(refillq, buf_id); 3468 IDPF_RX_BUMP_NTC(rxq, ntc); 3469 3470 /* skip if it is non EOP desc */ 3471 if (!idpf_rx_splitq_is_eop(rx_desc) || unlikely(!skb)) 3472 continue; 3473 3474 /* pad skb if needed (to make valid ethernet frame) */ 3475 if (eth_skb_pad(skb)) { 3476 skb = NULL; 3477 continue; 3478 } 3479 3480 /* probably a little skewed due to removing CRC */ 3481 total_rx_bytes += skb->len; 3482 3483 /* protocol */ 3484 if (unlikely(idpf_rx_process_skb_fields(rxq, skb, rx_desc))) { 3485 dev_kfree_skb_any(skb); 3486 skb = NULL; 3487 continue; 3488 } 3489 3490 /* send completed skb up the stack */ 3491 napi_gro_receive(rxq->napi, skb); 3492 skb = NULL; 3493 3494 /* update budget accounting */ 3495 total_rx_pkts++; 3496 } 3497 3498 rxq->next_to_clean = ntc; 3499 3500 rxq->skb = skb; 3501 u64_stats_update_begin(&rxq->stats_sync); 3502 u64_stats_add(&rxq->q_stats.packets, total_rx_pkts); 3503 u64_stats_add(&rxq->q_stats.bytes, total_rx_bytes); 3504 u64_stats_update_end(&rxq->stats_sync); 3505 3506 /* guarantee a trip back through this routine if there was a failure */ 3507 return total_rx_pkts; 3508 } 3509 3510 /** 3511 * idpf_rx_update_bufq_desc - Update buffer queue descriptor 3512 * @bufq: Pointer to the buffer queue 3513 * @buf_id: buffer ID 3514 * @buf_desc: Buffer queue descriptor 3515 * 3516 * Return 0 on success and negative on failure. 3517 */ 3518 static int idpf_rx_update_bufq_desc(struct idpf_buf_queue *bufq, u32 buf_id, 3519 struct virtchnl2_splitq_rx_buf_desc *buf_desc) 3520 { 3521 struct libeth_fq_fp fq = { 3522 .pp = bufq->pp, 3523 .fqes = bufq->buf, 3524 .truesize = bufq->truesize, 3525 .count = bufq->desc_count, 3526 }; 3527 dma_addr_t addr; 3528 3529 addr = libeth_rx_alloc(&fq, buf_id); 3530 if (addr == DMA_MAPPING_ERROR) 3531 return -ENOMEM; 3532 3533 buf_desc->pkt_addr = cpu_to_le64(addr); 3534 buf_desc->qword0.buf_id = cpu_to_le16(buf_id); 3535 3536 if (!idpf_queue_has(HSPLIT_EN, bufq)) 3537 return 0; 3538 3539 fq.pp = bufq->hdr_pp; 3540 fq.fqes = bufq->hdr_buf; 3541 fq.truesize = bufq->hdr_truesize; 3542 3543 addr = libeth_rx_alloc(&fq, buf_id); 3544 if (addr == DMA_MAPPING_ERROR) 3545 return -ENOMEM; 3546 3547 buf_desc->hdr_addr = cpu_to_le64(addr); 3548 3549 return 0; 3550 } 3551 3552 /** 3553 * idpf_rx_clean_refillq - Clean refill queue buffers 3554 * @bufq: buffer queue to post buffers back to 3555 * @refillq: refill queue to clean 3556 * 3557 * This function takes care of the buffer refill management 3558 */ 3559 static void idpf_rx_clean_refillq(struct idpf_buf_queue *bufq, 3560 struct idpf_sw_queue *refillq) 3561 { 3562 struct virtchnl2_splitq_rx_buf_desc *buf_desc; 3563 u16 bufq_nta = bufq->next_to_alloc; 3564 u16 ntc = refillq->next_to_clean; 3565 int cleaned = 0; 3566 3567 buf_desc = &bufq->split_buf[bufq_nta]; 3568 3569 /* make sure we stop at ring wrap in the unlikely case ring is full */ 3570 while (likely(cleaned < refillq->desc_count)) { 3571 u32 buf_id, refill_desc = refillq->ring[ntc]; 3572 bool failure; 3573 3574 if (idpf_queue_has(RFL_GEN_CHK, refillq) != 3575 !!(refill_desc & IDPF_RX_BI_GEN_M)) 3576 break; 3577 3578 buf_id = FIELD_GET(IDPF_RX_BI_BUFID_M, refill_desc); 3579 failure = idpf_rx_update_bufq_desc(bufq, buf_id, buf_desc); 3580 if (failure) 3581 break; 3582 3583 if (unlikely(++ntc == refillq->desc_count)) { 3584 idpf_queue_change(RFL_GEN_CHK, refillq); 3585 ntc = 0; 3586 } 3587 3588 if (unlikely(++bufq_nta == bufq->desc_count)) { 3589 buf_desc = &bufq->split_buf[0]; 3590 bufq_nta = 0; 3591 } else { 3592 buf_desc++; 3593 } 3594 3595 cleaned++; 3596 } 3597 3598 if (!cleaned) 3599 return; 3600 3601 /* We want to limit how many transactions on the bus we trigger with 3602 * tail writes so we only do it in strides. It's also important we 3603 * align the write to a multiple of 8 as required by HW. 3604 */ 3605 if (((bufq->next_to_use <= bufq_nta ? 0 : bufq->desc_count) + 3606 bufq_nta - bufq->next_to_use) >= IDPF_RX_BUF_POST_STRIDE) 3607 idpf_rx_buf_hw_update(bufq, ALIGN_DOWN(bufq_nta, 3608 IDPF_RX_BUF_POST_STRIDE)); 3609 3610 /* update next to alloc since we have filled the ring */ 3611 refillq->next_to_clean = ntc; 3612 bufq->next_to_alloc = bufq_nta; 3613 } 3614 3615 /** 3616 * idpf_rx_clean_refillq_all - Clean all refill queues 3617 * @bufq: buffer queue with refill queues 3618 * @nid: ID of the closest NUMA node with memory 3619 * 3620 * Iterates through all refill queues assigned to the buffer queue assigned to 3621 * this vector. Returns true if clean is complete within budget, false 3622 * otherwise. 3623 */ 3624 static void idpf_rx_clean_refillq_all(struct idpf_buf_queue *bufq, int nid) 3625 { 3626 struct idpf_bufq_set *bufq_set; 3627 int i; 3628 3629 page_pool_nid_changed(bufq->pp, nid); 3630 if (bufq->hdr_pp) 3631 page_pool_nid_changed(bufq->hdr_pp, nid); 3632 3633 bufq_set = container_of(bufq, struct idpf_bufq_set, bufq); 3634 for (i = 0; i < bufq_set->num_refillqs; i++) 3635 idpf_rx_clean_refillq(bufq, &bufq_set->refillqs[i]); 3636 } 3637 3638 /** 3639 * idpf_vport_intr_clean_queues - MSIX mode Interrupt Handler 3640 * @irq: interrupt number 3641 * @data: pointer to a q_vector 3642 * 3643 */ 3644 static irqreturn_t idpf_vport_intr_clean_queues(int __always_unused irq, 3645 void *data) 3646 { 3647 struct idpf_q_vector *q_vector = (struct idpf_q_vector *)data; 3648 3649 q_vector->total_events++; 3650 napi_schedule(&q_vector->napi); 3651 3652 return IRQ_HANDLED; 3653 } 3654 3655 /** 3656 * idpf_vport_intr_napi_del_all - Unregister napi for all q_vectors in vport 3657 * @vport: virtual port structure 3658 * 3659 */ 3660 static void idpf_vport_intr_napi_del_all(struct idpf_vport *vport) 3661 { 3662 u16 v_idx; 3663 3664 for (v_idx = 0; v_idx < vport->num_q_vectors; v_idx++) 3665 netif_napi_del(&vport->q_vectors[v_idx].napi); 3666 } 3667 3668 /** 3669 * idpf_vport_intr_napi_dis_all - Disable NAPI for all q_vectors in the vport 3670 * @vport: main vport structure 3671 */ 3672 static void idpf_vport_intr_napi_dis_all(struct idpf_vport *vport) 3673 { 3674 int v_idx; 3675 3676 for (v_idx = 0; v_idx < vport->num_q_vectors; v_idx++) 3677 napi_disable(&vport->q_vectors[v_idx].napi); 3678 } 3679 3680 /** 3681 * idpf_vport_intr_rel - Free memory allocated for interrupt vectors 3682 * @vport: virtual port 3683 * 3684 * Free the memory allocated for interrupt vectors associated to a vport 3685 */ 3686 void idpf_vport_intr_rel(struct idpf_vport *vport) 3687 { 3688 for (u32 v_idx = 0; v_idx < vport->num_q_vectors; v_idx++) { 3689 struct idpf_q_vector *q_vector = &vport->q_vectors[v_idx]; 3690 3691 kfree(q_vector->complq); 3692 q_vector->complq = NULL; 3693 kfree(q_vector->bufq); 3694 q_vector->bufq = NULL; 3695 kfree(q_vector->tx); 3696 q_vector->tx = NULL; 3697 kfree(q_vector->rx); 3698 q_vector->rx = NULL; 3699 } 3700 3701 kfree(vport->q_vectors); 3702 vport->q_vectors = NULL; 3703 } 3704 3705 /** 3706 * idpf_vport_intr_rel_irq - Free the IRQ association with the OS 3707 * @vport: main vport structure 3708 */ 3709 static void idpf_vport_intr_rel_irq(struct idpf_vport *vport) 3710 { 3711 struct idpf_adapter *adapter = vport->adapter; 3712 int vector; 3713 3714 for (vector = 0; vector < vport->num_q_vectors; vector++) { 3715 struct idpf_q_vector *q_vector = &vport->q_vectors[vector]; 3716 int irq_num, vidx; 3717 3718 /* free only the irqs that were actually requested */ 3719 if (!q_vector) 3720 continue; 3721 3722 vidx = vport->q_vector_idxs[vector]; 3723 irq_num = adapter->msix_entries[vidx].vector; 3724 3725 kfree(free_irq(irq_num, q_vector)); 3726 } 3727 } 3728 3729 /** 3730 * idpf_vport_intr_dis_irq_all - Disable all interrupt 3731 * @vport: main vport structure 3732 */ 3733 static void idpf_vport_intr_dis_irq_all(struct idpf_vport *vport) 3734 { 3735 struct idpf_q_vector *q_vector = vport->q_vectors; 3736 int q_idx; 3737 3738 for (q_idx = 0; q_idx < vport->num_q_vectors; q_idx++) 3739 writel(0, q_vector[q_idx].intr_reg.dyn_ctl); 3740 } 3741 3742 /** 3743 * idpf_vport_intr_buildreg_itr - Enable default interrupt generation settings 3744 * @q_vector: pointer to q_vector 3745 */ 3746 static u32 idpf_vport_intr_buildreg_itr(struct idpf_q_vector *q_vector) 3747 { 3748 u32 itr_val = q_vector->intr_reg.dyn_ctl_intena_m; 3749 int type = IDPF_NO_ITR_UPDATE_IDX; 3750 u16 itr = 0; 3751 3752 if (q_vector->wb_on_itr) { 3753 /* 3754 * Trigger a software interrupt when exiting wb_on_itr, to make 3755 * sure we catch any pending write backs that might have been 3756 * missed due to interrupt state transition. 3757 */ 3758 itr_val |= q_vector->intr_reg.dyn_ctl_swint_trig_m | 3759 q_vector->intr_reg.dyn_ctl_sw_itridx_ena_m; 3760 type = IDPF_SW_ITR_UPDATE_IDX; 3761 itr = IDPF_ITR_20K; 3762 } 3763 3764 itr &= IDPF_ITR_MASK; 3765 /* Don't clear PBA because that can cause lost interrupts that 3766 * came in while we were cleaning/polling 3767 */ 3768 itr_val |= (type << q_vector->intr_reg.dyn_ctl_itridx_s) | 3769 (itr << (q_vector->intr_reg.dyn_ctl_intrvl_s - 1)); 3770 3771 return itr_val; 3772 } 3773 3774 /** 3775 * idpf_update_dim_sample - Update dim sample with packets and bytes 3776 * @q_vector: the vector associated with the interrupt 3777 * @dim_sample: dim sample to update 3778 * @dim: dim instance structure 3779 * @packets: total packets 3780 * @bytes: total bytes 3781 * 3782 * Update the dim sample with the packets and bytes which are passed to this 3783 * function. Set the dim state appropriately if the dim settings gets stale. 3784 */ 3785 static void idpf_update_dim_sample(struct idpf_q_vector *q_vector, 3786 struct dim_sample *dim_sample, 3787 struct dim *dim, u64 packets, u64 bytes) 3788 { 3789 dim_update_sample(q_vector->total_events, packets, bytes, dim_sample); 3790 dim_sample->comp_ctr = 0; 3791 3792 /* if dim settings get stale, like when not updated for 1 second or 3793 * longer, force it to start again. This addresses the frequent case 3794 * of an idle queue being switched to by the scheduler. 3795 */ 3796 if (ktime_ms_delta(dim_sample->time, dim->start_sample.time) >= HZ) 3797 dim->state = DIM_START_MEASURE; 3798 } 3799 3800 /** 3801 * idpf_net_dim - Update net DIM algorithm 3802 * @q_vector: the vector associated with the interrupt 3803 * 3804 * Create a DIM sample and notify net_dim() so that it can possibly decide 3805 * a new ITR value based on incoming packets, bytes, and interrupts. 3806 * 3807 * This function is a no-op if the queue is not configured to dynamic ITR. 3808 */ 3809 static void idpf_net_dim(struct idpf_q_vector *q_vector) 3810 { 3811 struct dim_sample dim_sample = { }; 3812 u64 packets, bytes; 3813 u32 i; 3814 3815 if (!IDPF_ITR_IS_DYNAMIC(q_vector->tx_intr_mode)) 3816 goto check_rx_itr; 3817 3818 for (i = 0, packets = 0, bytes = 0; i < q_vector->num_txq; i++) { 3819 struct idpf_tx_queue *txq = q_vector->tx[i]; 3820 unsigned int start; 3821 3822 do { 3823 start = u64_stats_fetch_begin(&txq->stats_sync); 3824 packets += u64_stats_read(&txq->q_stats.packets); 3825 bytes += u64_stats_read(&txq->q_stats.bytes); 3826 } while (u64_stats_fetch_retry(&txq->stats_sync, start)); 3827 } 3828 3829 idpf_update_dim_sample(q_vector, &dim_sample, &q_vector->tx_dim, 3830 packets, bytes); 3831 net_dim(&q_vector->tx_dim, &dim_sample); 3832 3833 check_rx_itr: 3834 if (!IDPF_ITR_IS_DYNAMIC(q_vector->rx_intr_mode)) 3835 return; 3836 3837 for (i = 0, packets = 0, bytes = 0; i < q_vector->num_rxq; i++) { 3838 struct idpf_rx_queue *rxq = q_vector->rx[i]; 3839 unsigned int start; 3840 3841 do { 3842 start = u64_stats_fetch_begin(&rxq->stats_sync); 3843 packets += u64_stats_read(&rxq->q_stats.packets); 3844 bytes += u64_stats_read(&rxq->q_stats.bytes); 3845 } while (u64_stats_fetch_retry(&rxq->stats_sync, start)); 3846 } 3847 3848 idpf_update_dim_sample(q_vector, &dim_sample, &q_vector->rx_dim, 3849 packets, bytes); 3850 net_dim(&q_vector->rx_dim, &dim_sample); 3851 } 3852 3853 /** 3854 * idpf_vport_intr_update_itr_ena_irq - Update itr and re-enable MSIX interrupt 3855 * @q_vector: q_vector for which itr is being updated and interrupt enabled 3856 * 3857 * Update the net_dim() algorithm and re-enable the interrupt associated with 3858 * this vector. 3859 */ 3860 void idpf_vport_intr_update_itr_ena_irq(struct idpf_q_vector *q_vector) 3861 { 3862 u32 intval; 3863 3864 /* net_dim() updates ITR out-of-band using a work item */ 3865 idpf_net_dim(q_vector); 3866 3867 intval = idpf_vport_intr_buildreg_itr(q_vector); 3868 q_vector->wb_on_itr = false; 3869 3870 writel(intval, q_vector->intr_reg.dyn_ctl); 3871 } 3872 3873 /** 3874 * idpf_vport_intr_req_irq - get MSI-X vectors from the OS for the vport 3875 * @vport: main vport structure 3876 */ 3877 static int idpf_vport_intr_req_irq(struct idpf_vport *vport) 3878 { 3879 struct idpf_adapter *adapter = vport->adapter; 3880 const char *drv_name, *if_name, *vec_name; 3881 int vector, err, irq_num, vidx; 3882 3883 drv_name = dev_driver_string(&adapter->pdev->dev); 3884 if_name = netdev_name(vport->netdev); 3885 3886 for (vector = 0; vector < vport->num_q_vectors; vector++) { 3887 struct idpf_q_vector *q_vector = &vport->q_vectors[vector]; 3888 char *name; 3889 3890 vidx = vport->q_vector_idxs[vector]; 3891 irq_num = adapter->msix_entries[vidx].vector; 3892 3893 if (q_vector->num_rxq && q_vector->num_txq) 3894 vec_name = "TxRx"; 3895 else if (q_vector->num_rxq) 3896 vec_name = "Rx"; 3897 else if (q_vector->num_txq) 3898 vec_name = "Tx"; 3899 else 3900 continue; 3901 3902 name = kasprintf(GFP_KERNEL, "%s-%s-%s-%d", drv_name, if_name, 3903 vec_name, vidx); 3904 3905 err = request_irq(irq_num, idpf_vport_intr_clean_queues, 0, 3906 name, q_vector); 3907 if (err) { 3908 netdev_err(vport->netdev, 3909 "Request_irq failed, error: %d\n", err); 3910 goto free_q_irqs; 3911 } 3912 } 3913 3914 return 0; 3915 3916 free_q_irqs: 3917 while (--vector >= 0) { 3918 vidx = vport->q_vector_idxs[vector]; 3919 irq_num = adapter->msix_entries[vidx].vector; 3920 kfree(free_irq(irq_num, &vport->q_vectors[vector])); 3921 } 3922 3923 return err; 3924 } 3925 3926 /** 3927 * idpf_vport_intr_write_itr - Write ITR value to the ITR register 3928 * @q_vector: q_vector structure 3929 * @itr: Interrupt throttling rate 3930 * @tx: Tx or Rx ITR 3931 */ 3932 void idpf_vport_intr_write_itr(struct idpf_q_vector *q_vector, u16 itr, bool tx) 3933 { 3934 struct idpf_intr_reg *intr_reg; 3935 3936 if (tx && !q_vector->tx) 3937 return; 3938 else if (!tx && !q_vector->rx) 3939 return; 3940 3941 intr_reg = &q_vector->intr_reg; 3942 writel(ITR_REG_ALIGN(itr) >> IDPF_ITR_GRAN_S, 3943 tx ? intr_reg->tx_itr : intr_reg->rx_itr); 3944 } 3945 3946 /** 3947 * idpf_vport_intr_ena_irq_all - Enable IRQ for the given vport 3948 * @vport: main vport structure 3949 */ 3950 static void idpf_vport_intr_ena_irq_all(struct idpf_vport *vport) 3951 { 3952 bool dynamic; 3953 int q_idx; 3954 u16 itr; 3955 3956 for (q_idx = 0; q_idx < vport->num_q_vectors; q_idx++) { 3957 struct idpf_q_vector *qv = &vport->q_vectors[q_idx]; 3958 3959 /* Set the initial ITR values */ 3960 if (qv->num_txq) { 3961 dynamic = IDPF_ITR_IS_DYNAMIC(qv->tx_intr_mode); 3962 itr = vport->tx_itr_profile[qv->tx_dim.profile_ix]; 3963 idpf_vport_intr_write_itr(qv, dynamic ? 3964 itr : qv->tx_itr_value, 3965 true); 3966 } 3967 3968 if (qv->num_rxq) { 3969 dynamic = IDPF_ITR_IS_DYNAMIC(qv->rx_intr_mode); 3970 itr = vport->rx_itr_profile[qv->rx_dim.profile_ix]; 3971 idpf_vport_intr_write_itr(qv, dynamic ? 3972 itr : qv->rx_itr_value, 3973 false); 3974 } 3975 3976 if (qv->num_txq || qv->num_rxq) 3977 idpf_vport_intr_update_itr_ena_irq(qv); 3978 } 3979 } 3980 3981 /** 3982 * idpf_vport_intr_deinit - Release all vector associations for the vport 3983 * @vport: main vport structure 3984 */ 3985 void idpf_vport_intr_deinit(struct idpf_vport *vport) 3986 { 3987 idpf_vport_intr_dis_irq_all(vport); 3988 idpf_vport_intr_napi_dis_all(vport); 3989 idpf_vport_intr_napi_del_all(vport); 3990 idpf_vport_intr_rel_irq(vport); 3991 } 3992 3993 /** 3994 * idpf_tx_dim_work - Call back from the stack 3995 * @work: work queue structure 3996 */ 3997 static void idpf_tx_dim_work(struct work_struct *work) 3998 { 3999 struct idpf_q_vector *q_vector; 4000 struct idpf_vport *vport; 4001 struct dim *dim; 4002 u16 itr; 4003 4004 dim = container_of(work, struct dim, work); 4005 q_vector = container_of(dim, struct idpf_q_vector, tx_dim); 4006 vport = q_vector->vport; 4007 4008 if (dim->profile_ix >= ARRAY_SIZE(vport->tx_itr_profile)) 4009 dim->profile_ix = ARRAY_SIZE(vport->tx_itr_profile) - 1; 4010 4011 /* look up the values in our local table */ 4012 itr = vport->tx_itr_profile[dim->profile_ix]; 4013 4014 idpf_vport_intr_write_itr(q_vector, itr, true); 4015 4016 dim->state = DIM_START_MEASURE; 4017 } 4018 4019 /** 4020 * idpf_rx_dim_work - Call back from the stack 4021 * @work: work queue structure 4022 */ 4023 static void idpf_rx_dim_work(struct work_struct *work) 4024 { 4025 struct idpf_q_vector *q_vector; 4026 struct idpf_vport *vport; 4027 struct dim *dim; 4028 u16 itr; 4029 4030 dim = container_of(work, struct dim, work); 4031 q_vector = container_of(dim, struct idpf_q_vector, rx_dim); 4032 vport = q_vector->vport; 4033 4034 if (dim->profile_ix >= ARRAY_SIZE(vport->rx_itr_profile)) 4035 dim->profile_ix = ARRAY_SIZE(vport->rx_itr_profile) - 1; 4036 4037 /* look up the values in our local table */ 4038 itr = vport->rx_itr_profile[dim->profile_ix]; 4039 4040 idpf_vport_intr_write_itr(q_vector, itr, false); 4041 4042 dim->state = DIM_START_MEASURE; 4043 } 4044 4045 /** 4046 * idpf_init_dim - Set up dynamic interrupt moderation 4047 * @qv: q_vector structure 4048 */ 4049 static void idpf_init_dim(struct idpf_q_vector *qv) 4050 { 4051 INIT_WORK(&qv->tx_dim.work, idpf_tx_dim_work); 4052 qv->tx_dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE; 4053 qv->tx_dim.profile_ix = IDPF_DIM_DEFAULT_PROFILE_IX; 4054 4055 INIT_WORK(&qv->rx_dim.work, idpf_rx_dim_work); 4056 qv->rx_dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE; 4057 qv->rx_dim.profile_ix = IDPF_DIM_DEFAULT_PROFILE_IX; 4058 } 4059 4060 /** 4061 * idpf_vport_intr_napi_ena_all - Enable NAPI for all q_vectors in the vport 4062 * @vport: main vport structure 4063 */ 4064 static void idpf_vport_intr_napi_ena_all(struct idpf_vport *vport) 4065 { 4066 int q_idx; 4067 4068 for (q_idx = 0; q_idx < vport->num_q_vectors; q_idx++) { 4069 struct idpf_q_vector *q_vector = &vport->q_vectors[q_idx]; 4070 4071 idpf_init_dim(q_vector); 4072 napi_enable(&q_vector->napi); 4073 } 4074 } 4075 4076 /** 4077 * idpf_tx_splitq_clean_all- Clean completion queues 4078 * @q_vec: queue vector 4079 * @budget: Used to determine if we are in netpoll 4080 * @cleaned: returns number of packets cleaned 4081 * 4082 * Returns false if clean is not complete else returns true 4083 */ 4084 static bool idpf_tx_splitq_clean_all(struct idpf_q_vector *q_vec, 4085 int budget, int *cleaned) 4086 { 4087 u16 num_complq = q_vec->num_complq; 4088 bool clean_complete = true; 4089 int i, budget_per_q; 4090 4091 if (unlikely(!num_complq)) 4092 return true; 4093 4094 budget_per_q = DIV_ROUND_UP(budget, num_complq); 4095 4096 for (i = 0; i < num_complq; i++) 4097 clean_complete &= idpf_tx_clean_complq(q_vec->complq[i], 4098 budget_per_q, cleaned); 4099 4100 return clean_complete; 4101 } 4102 4103 /** 4104 * idpf_rx_splitq_clean_all- Clean completion queues 4105 * @q_vec: queue vector 4106 * @budget: Used to determine if we are in netpoll 4107 * @cleaned: returns number of packets cleaned 4108 * 4109 * Returns false if clean is not complete else returns true 4110 */ 4111 static bool idpf_rx_splitq_clean_all(struct idpf_q_vector *q_vec, int budget, 4112 int *cleaned) 4113 { 4114 u16 num_rxq = q_vec->num_rxq; 4115 bool clean_complete = true; 4116 int pkts_cleaned = 0; 4117 int i, budget_per_q; 4118 int nid; 4119 4120 /* We attempt to distribute budget to each Rx queue fairly, but don't 4121 * allow the budget to go below 1 because that would exit polling early. 4122 */ 4123 budget_per_q = num_rxq ? max(budget / num_rxq, 1) : 0; 4124 for (i = 0; i < num_rxq; i++) { 4125 struct idpf_rx_queue *rxq = q_vec->rx[i]; 4126 int pkts_cleaned_per_q; 4127 4128 pkts_cleaned_per_q = idpf_rx_splitq_clean(rxq, budget_per_q); 4129 /* if we clean as many as budgeted, we must not be done */ 4130 if (pkts_cleaned_per_q >= budget_per_q) 4131 clean_complete = false; 4132 pkts_cleaned += pkts_cleaned_per_q; 4133 } 4134 *cleaned = pkts_cleaned; 4135 4136 nid = numa_mem_id(); 4137 4138 for (i = 0; i < q_vec->num_bufq; i++) 4139 idpf_rx_clean_refillq_all(q_vec->bufq[i], nid); 4140 4141 return clean_complete; 4142 } 4143 4144 /** 4145 * idpf_vport_splitq_napi_poll - NAPI handler 4146 * @napi: struct from which you get q_vector 4147 * @budget: budget provided by stack 4148 */ 4149 static int idpf_vport_splitq_napi_poll(struct napi_struct *napi, int budget) 4150 { 4151 struct idpf_q_vector *q_vector = 4152 container_of(napi, struct idpf_q_vector, napi); 4153 bool clean_complete; 4154 int work_done = 0; 4155 4156 /* Handle case where we are called by netpoll with a budget of 0 */ 4157 if (unlikely(!budget)) { 4158 idpf_tx_splitq_clean_all(q_vector, budget, &work_done); 4159 4160 return 0; 4161 } 4162 4163 clean_complete = idpf_rx_splitq_clean_all(q_vector, budget, &work_done); 4164 clean_complete &= idpf_tx_splitq_clean_all(q_vector, budget, &work_done); 4165 4166 /* If work not completed, return budget and polling will return */ 4167 if (!clean_complete) { 4168 idpf_vport_intr_set_wb_on_itr(q_vector); 4169 return budget; 4170 } 4171 4172 /* Switch to poll mode in the tear-down path after sending disable 4173 * queues virtchnl message, as the interrupts will be disabled after 4174 * that. 4175 */ 4176 if (unlikely(q_vector->num_txq && idpf_queue_has(POLL_MODE, 4177 q_vector->tx[0]))) 4178 return budget; 4179 4180 work_done = min_t(int, work_done, budget - 1); 4181 4182 /* Exit the polling mode, but don't re-enable interrupts if stack might 4183 * poll us due to busy-polling 4184 */ 4185 if (likely(napi_complete_done(napi, work_done))) 4186 idpf_vport_intr_update_itr_ena_irq(q_vector); 4187 else 4188 idpf_vport_intr_set_wb_on_itr(q_vector); 4189 4190 return work_done; 4191 } 4192 4193 /** 4194 * idpf_vport_intr_map_vector_to_qs - Map vectors to queues 4195 * @vport: virtual port 4196 * 4197 * Mapping for vectors to queues 4198 */ 4199 static void idpf_vport_intr_map_vector_to_qs(struct idpf_vport *vport) 4200 { 4201 bool split = idpf_is_queue_model_split(vport->rxq_model); 4202 u16 num_txq_grp = vport->num_txq_grp; 4203 struct idpf_rxq_group *rx_qgrp; 4204 struct idpf_txq_group *tx_qgrp; 4205 u32 i, qv_idx, q_index; 4206 4207 for (i = 0, qv_idx = 0; i < vport->num_rxq_grp; i++) { 4208 u16 num_rxq; 4209 4210 if (qv_idx >= vport->num_q_vectors) 4211 qv_idx = 0; 4212 4213 rx_qgrp = &vport->rxq_grps[i]; 4214 if (split) 4215 num_rxq = rx_qgrp->splitq.num_rxq_sets; 4216 else 4217 num_rxq = rx_qgrp->singleq.num_rxq; 4218 4219 for (u32 j = 0; j < num_rxq; j++) { 4220 struct idpf_rx_queue *q; 4221 4222 if (split) 4223 q = &rx_qgrp->splitq.rxq_sets[j]->rxq; 4224 else 4225 q = rx_qgrp->singleq.rxqs[j]; 4226 q->q_vector = &vport->q_vectors[qv_idx]; 4227 q_index = q->q_vector->num_rxq; 4228 q->q_vector->rx[q_index] = q; 4229 q->q_vector->num_rxq++; 4230 4231 if (split) 4232 q->napi = &q->q_vector->napi; 4233 } 4234 4235 if (split) { 4236 for (u32 j = 0; j < vport->num_bufqs_per_qgrp; j++) { 4237 struct idpf_buf_queue *bufq; 4238 4239 bufq = &rx_qgrp->splitq.bufq_sets[j].bufq; 4240 bufq->q_vector = &vport->q_vectors[qv_idx]; 4241 q_index = bufq->q_vector->num_bufq; 4242 bufq->q_vector->bufq[q_index] = bufq; 4243 bufq->q_vector->num_bufq++; 4244 } 4245 } 4246 4247 qv_idx++; 4248 } 4249 4250 split = idpf_is_queue_model_split(vport->txq_model); 4251 4252 for (i = 0, qv_idx = 0; i < num_txq_grp; i++) { 4253 u16 num_txq; 4254 4255 if (qv_idx >= vport->num_q_vectors) 4256 qv_idx = 0; 4257 4258 tx_qgrp = &vport->txq_grps[i]; 4259 num_txq = tx_qgrp->num_txq; 4260 4261 for (u32 j = 0; j < num_txq; j++) { 4262 struct idpf_tx_queue *q; 4263 4264 q = tx_qgrp->txqs[j]; 4265 q->q_vector = &vport->q_vectors[qv_idx]; 4266 q->q_vector->tx[q->q_vector->num_txq++] = q; 4267 } 4268 4269 if (split) { 4270 struct idpf_compl_queue *q = tx_qgrp->complq; 4271 4272 q->q_vector = &vport->q_vectors[qv_idx]; 4273 q->q_vector->complq[q->q_vector->num_complq++] = q; 4274 } 4275 4276 qv_idx++; 4277 } 4278 } 4279 4280 /** 4281 * idpf_vport_intr_init_vec_idx - Initialize the vector indexes 4282 * @vport: virtual port 4283 * 4284 * Initialize vector indexes with values returened over mailbox 4285 */ 4286 static int idpf_vport_intr_init_vec_idx(struct idpf_vport *vport) 4287 { 4288 struct idpf_adapter *adapter = vport->adapter; 4289 struct virtchnl2_alloc_vectors *ac; 4290 u16 *vecids, total_vecs; 4291 int i; 4292 4293 ac = adapter->req_vec_chunks; 4294 if (!ac) { 4295 for (i = 0; i < vport->num_q_vectors; i++) 4296 vport->q_vectors[i].v_idx = vport->q_vector_idxs[i]; 4297 4298 return 0; 4299 } 4300 4301 total_vecs = idpf_get_reserved_vecs(adapter); 4302 vecids = kcalloc(total_vecs, sizeof(u16), GFP_KERNEL); 4303 if (!vecids) 4304 return -ENOMEM; 4305 4306 idpf_get_vec_ids(adapter, vecids, total_vecs, &ac->vchunks); 4307 4308 for (i = 0; i < vport->num_q_vectors; i++) 4309 vport->q_vectors[i].v_idx = vecids[vport->q_vector_idxs[i]]; 4310 4311 kfree(vecids); 4312 4313 return 0; 4314 } 4315 4316 /** 4317 * idpf_vport_intr_napi_add_all- Register napi handler for all qvectors 4318 * @vport: virtual port structure 4319 */ 4320 static void idpf_vport_intr_napi_add_all(struct idpf_vport *vport) 4321 { 4322 int (*napi_poll)(struct napi_struct *napi, int budget); 4323 u16 v_idx, qv_idx; 4324 int irq_num; 4325 4326 if (idpf_is_queue_model_split(vport->txq_model)) 4327 napi_poll = idpf_vport_splitq_napi_poll; 4328 else 4329 napi_poll = idpf_vport_singleq_napi_poll; 4330 4331 for (v_idx = 0; v_idx < vport->num_q_vectors; v_idx++) { 4332 struct idpf_q_vector *q_vector = &vport->q_vectors[v_idx]; 4333 qv_idx = vport->q_vector_idxs[v_idx]; 4334 irq_num = vport->adapter->msix_entries[qv_idx].vector; 4335 4336 netif_napi_add_config(vport->netdev, &q_vector->napi, 4337 napi_poll, v_idx); 4338 netif_napi_set_irq(&q_vector->napi, irq_num); 4339 } 4340 } 4341 4342 /** 4343 * idpf_vport_intr_alloc - Allocate memory for interrupt vectors 4344 * @vport: virtual port 4345 * 4346 * We allocate one q_vector per queue interrupt. If allocation fails we 4347 * return -ENOMEM. 4348 */ 4349 int idpf_vport_intr_alloc(struct idpf_vport *vport) 4350 { 4351 u16 txqs_per_vector, rxqs_per_vector, bufqs_per_vector; 4352 struct idpf_q_vector *q_vector; 4353 u32 complqs_per_vector, v_idx; 4354 4355 vport->q_vectors = kcalloc(vport->num_q_vectors, 4356 sizeof(struct idpf_q_vector), GFP_KERNEL); 4357 if (!vport->q_vectors) 4358 return -ENOMEM; 4359 4360 txqs_per_vector = DIV_ROUND_UP(vport->num_txq_grp, 4361 vport->num_q_vectors); 4362 rxqs_per_vector = DIV_ROUND_UP(vport->num_rxq_grp, 4363 vport->num_q_vectors); 4364 bufqs_per_vector = vport->num_bufqs_per_qgrp * 4365 DIV_ROUND_UP(vport->num_rxq_grp, 4366 vport->num_q_vectors); 4367 complqs_per_vector = DIV_ROUND_UP(vport->num_txq_grp, 4368 vport->num_q_vectors); 4369 4370 for (v_idx = 0; v_idx < vport->num_q_vectors; v_idx++) { 4371 q_vector = &vport->q_vectors[v_idx]; 4372 q_vector->vport = vport; 4373 4374 q_vector->tx_itr_value = IDPF_ITR_TX_DEF; 4375 q_vector->tx_intr_mode = IDPF_ITR_DYNAMIC; 4376 q_vector->tx_itr_idx = VIRTCHNL2_ITR_IDX_1; 4377 4378 q_vector->rx_itr_value = IDPF_ITR_RX_DEF; 4379 q_vector->rx_intr_mode = IDPF_ITR_DYNAMIC; 4380 q_vector->rx_itr_idx = VIRTCHNL2_ITR_IDX_0; 4381 4382 q_vector->tx = kcalloc(txqs_per_vector, sizeof(*q_vector->tx), 4383 GFP_KERNEL); 4384 if (!q_vector->tx) 4385 goto error; 4386 4387 q_vector->rx = kcalloc(rxqs_per_vector, sizeof(*q_vector->rx), 4388 GFP_KERNEL); 4389 if (!q_vector->rx) 4390 goto error; 4391 4392 if (!idpf_is_queue_model_split(vport->rxq_model)) 4393 continue; 4394 4395 q_vector->bufq = kcalloc(bufqs_per_vector, 4396 sizeof(*q_vector->bufq), 4397 GFP_KERNEL); 4398 if (!q_vector->bufq) 4399 goto error; 4400 4401 q_vector->complq = kcalloc(complqs_per_vector, 4402 sizeof(*q_vector->complq), 4403 GFP_KERNEL); 4404 if (!q_vector->complq) 4405 goto error; 4406 } 4407 4408 return 0; 4409 4410 error: 4411 idpf_vport_intr_rel(vport); 4412 4413 return -ENOMEM; 4414 } 4415 4416 /** 4417 * idpf_vport_intr_init - Setup all vectors for the given vport 4418 * @vport: virtual port 4419 * 4420 * Returns 0 on success or negative on failure 4421 */ 4422 int idpf_vport_intr_init(struct idpf_vport *vport) 4423 { 4424 int err; 4425 4426 err = idpf_vport_intr_init_vec_idx(vport); 4427 if (err) 4428 return err; 4429 4430 idpf_vport_intr_map_vector_to_qs(vport); 4431 idpf_vport_intr_napi_add_all(vport); 4432 4433 err = vport->adapter->dev_ops.reg_ops.intr_reg_init(vport); 4434 if (err) 4435 goto unroll_vectors_alloc; 4436 4437 err = idpf_vport_intr_req_irq(vport); 4438 if (err) 4439 goto unroll_vectors_alloc; 4440 4441 return 0; 4442 4443 unroll_vectors_alloc: 4444 idpf_vport_intr_napi_del_all(vport); 4445 4446 return err; 4447 } 4448 4449 void idpf_vport_intr_ena(struct idpf_vport *vport) 4450 { 4451 idpf_vport_intr_napi_ena_all(vport); 4452 idpf_vport_intr_ena_irq_all(vport); 4453 } 4454 4455 /** 4456 * idpf_config_rss - Send virtchnl messages to configure RSS 4457 * @vport: virtual port 4458 * 4459 * Return 0 on success, negative on failure 4460 */ 4461 int idpf_config_rss(struct idpf_vport *vport) 4462 { 4463 int err; 4464 4465 err = idpf_send_get_set_rss_key_msg(vport, false); 4466 if (err) 4467 return err; 4468 4469 return idpf_send_get_set_rss_lut_msg(vport, false); 4470 } 4471 4472 /** 4473 * idpf_fill_dflt_rss_lut - Fill the indirection table with the default values 4474 * @vport: virtual port structure 4475 */ 4476 static void idpf_fill_dflt_rss_lut(struct idpf_vport *vport) 4477 { 4478 struct idpf_adapter *adapter = vport->adapter; 4479 u16 num_active_rxq = vport->num_rxq; 4480 struct idpf_rss_data *rss_data; 4481 int i; 4482 4483 rss_data = &adapter->vport_config[vport->idx]->user_config.rss_data; 4484 4485 for (i = 0; i < rss_data->rss_lut_size; i++) { 4486 rss_data->rss_lut[i] = i % num_active_rxq; 4487 rss_data->cached_lut[i] = rss_data->rss_lut[i]; 4488 } 4489 } 4490 4491 /** 4492 * idpf_init_rss - Allocate and initialize RSS resources 4493 * @vport: virtual port 4494 * 4495 * Return 0 on success, negative on failure 4496 */ 4497 int idpf_init_rss(struct idpf_vport *vport) 4498 { 4499 struct idpf_adapter *adapter = vport->adapter; 4500 struct idpf_rss_data *rss_data; 4501 u32 lut_size; 4502 4503 rss_data = &adapter->vport_config[vport->idx]->user_config.rss_data; 4504 4505 lut_size = rss_data->rss_lut_size * sizeof(u32); 4506 rss_data->rss_lut = kzalloc(lut_size, GFP_KERNEL); 4507 if (!rss_data->rss_lut) 4508 return -ENOMEM; 4509 4510 rss_data->cached_lut = kzalloc(lut_size, GFP_KERNEL); 4511 if (!rss_data->cached_lut) { 4512 kfree(rss_data->rss_lut); 4513 rss_data->rss_lut = NULL; 4514 4515 return -ENOMEM; 4516 } 4517 4518 /* Fill the default RSS lut values */ 4519 idpf_fill_dflt_rss_lut(vport); 4520 4521 return idpf_config_rss(vport); 4522 } 4523 4524 /** 4525 * idpf_deinit_rss - Release RSS resources 4526 * @vport: virtual port 4527 */ 4528 void idpf_deinit_rss(struct idpf_vport *vport) 4529 { 4530 struct idpf_adapter *adapter = vport->adapter; 4531 struct idpf_rss_data *rss_data; 4532 4533 rss_data = &adapter->vport_config[vport->idx]->user_config.rss_data; 4534 kfree(rss_data->cached_lut); 4535 rss_data->cached_lut = NULL; 4536 kfree(rss_data->rss_lut); 4537 rss_data->rss_lut = NULL; 4538 } 4539