xref: /linux/drivers/net/ethernet/intel/ice/ice_txrx.c (revision 675f176b4dcc2b75adbcea7ba0e9a649527f53bd)
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2018, Intel Corporation. */
3 
4 /* The driver transmit and receive code */
5 
6 #include <linux/mm.h>
7 #include <linux/netdevice.h>
8 #include <linux/prefetch.h>
9 #include <linux/bpf_trace.h>
10 #include <net/dsfield.h>
11 #include <net/mpls.h>
12 #include <net/xdp.h>
13 #include "ice_txrx_lib.h"
14 #include "ice_lib.h"
15 #include "ice.h"
16 #include "ice_trace.h"
17 #include "ice_dcb_lib.h"
18 #include "ice_xsk.h"
19 #include "ice_eswitch.h"
20 
21 #define ICE_RX_HDR_SIZE		256
22 
23 #define FDIR_DESC_RXDID 0x40
24 #define ICE_FDIR_CLEAN_DELAY 10
25 
26 /**
27  * ice_prgm_fdir_fltr - Program a Flow Director filter
28  * @vsi: VSI to send dummy packet
29  * @fdir_desc: flow director descriptor
30  * @raw_packet: allocated buffer for flow director
31  */
32 int
33 ice_prgm_fdir_fltr(struct ice_vsi *vsi, struct ice_fltr_desc *fdir_desc,
34 		   u8 *raw_packet)
35 {
36 	struct ice_tx_buf *tx_buf, *first;
37 	struct ice_fltr_desc *f_desc;
38 	struct ice_tx_desc *tx_desc;
39 	struct ice_tx_ring *tx_ring;
40 	struct device *dev;
41 	dma_addr_t dma;
42 	u32 td_cmd;
43 	u16 i;
44 
45 	/* VSI and Tx ring */
46 	if (!vsi)
47 		return -ENOENT;
48 	tx_ring = vsi->tx_rings[0];
49 	if (!tx_ring || !tx_ring->desc)
50 		return -ENOENT;
51 	dev = tx_ring->dev;
52 
53 	/* we are using two descriptors to add/del a filter and we can wait */
54 	for (i = ICE_FDIR_CLEAN_DELAY; ICE_DESC_UNUSED(tx_ring) < 2; i--) {
55 		if (!i)
56 			return -EAGAIN;
57 		msleep_interruptible(1);
58 	}
59 
60 	dma = dma_map_single(dev, raw_packet, ICE_FDIR_MAX_RAW_PKT_SIZE,
61 			     DMA_TO_DEVICE);
62 
63 	if (dma_mapping_error(dev, dma))
64 		return -EINVAL;
65 
66 	/* grab the next descriptor */
67 	i = tx_ring->next_to_use;
68 	first = &tx_ring->tx_buf[i];
69 	f_desc = ICE_TX_FDIRDESC(tx_ring, i);
70 	memcpy(f_desc, fdir_desc, sizeof(*f_desc));
71 
72 	i++;
73 	i = (i < tx_ring->count) ? i : 0;
74 	tx_desc = ICE_TX_DESC(tx_ring, i);
75 	tx_buf = &tx_ring->tx_buf[i];
76 
77 	i++;
78 	tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
79 
80 	memset(tx_buf, 0, sizeof(*tx_buf));
81 	dma_unmap_len_set(tx_buf, len, ICE_FDIR_MAX_RAW_PKT_SIZE);
82 	dma_unmap_addr_set(tx_buf, dma, dma);
83 
84 	tx_desc->buf_addr = cpu_to_le64(dma);
85 	td_cmd = ICE_TXD_LAST_DESC_CMD | ICE_TX_DESC_CMD_DUMMY |
86 		 ICE_TX_DESC_CMD_RE;
87 
88 	tx_buf->tx_flags = ICE_TX_FLAGS_DUMMY_PKT;
89 	tx_buf->raw_buf = raw_packet;
90 
91 	tx_desc->cmd_type_offset_bsz =
92 		ice_build_ctob(td_cmd, 0, ICE_FDIR_MAX_RAW_PKT_SIZE, 0);
93 
94 	/* Force memory write to complete before letting h/w know
95 	 * there are new descriptors to fetch.
96 	 */
97 	wmb();
98 
99 	/* mark the data descriptor to be watched */
100 	first->next_to_watch = tx_desc;
101 
102 	writel(tx_ring->next_to_use, tx_ring->tail);
103 
104 	return 0;
105 }
106 
107 /**
108  * ice_unmap_and_free_tx_buf - Release a Tx buffer
109  * @ring: the ring that owns the buffer
110  * @tx_buf: the buffer to free
111  */
112 static void
113 ice_unmap_and_free_tx_buf(struct ice_tx_ring *ring, struct ice_tx_buf *tx_buf)
114 {
115 	if (tx_buf->skb) {
116 		if (tx_buf->tx_flags & ICE_TX_FLAGS_DUMMY_PKT) {
117 			devm_kfree(ring->dev, tx_buf->raw_buf);
118 		} else if (ice_ring_is_xdp(ring)) {
119 			if (ring->xsk_pool)
120 				xsk_buff_free(tx_buf->xdp);
121 			else
122 				page_frag_free(tx_buf->raw_buf);
123 		} else {
124 			dev_kfree_skb_any(tx_buf->skb);
125 		}
126 		if (dma_unmap_len(tx_buf, len))
127 			dma_unmap_single(ring->dev,
128 					 dma_unmap_addr(tx_buf, dma),
129 					 dma_unmap_len(tx_buf, len),
130 					 DMA_TO_DEVICE);
131 	} else if (dma_unmap_len(tx_buf, len)) {
132 		dma_unmap_page(ring->dev,
133 			       dma_unmap_addr(tx_buf, dma),
134 			       dma_unmap_len(tx_buf, len),
135 			       DMA_TO_DEVICE);
136 	}
137 
138 	tx_buf->next_to_watch = NULL;
139 	tx_buf->skb = NULL;
140 	dma_unmap_len_set(tx_buf, len, 0);
141 	/* tx_buf must be completely set up in the transmit path */
142 }
143 
144 static struct netdev_queue *txring_txq(const struct ice_tx_ring *ring)
145 {
146 	return netdev_get_tx_queue(ring->netdev, ring->q_index);
147 }
148 
149 /**
150  * ice_clean_tx_ring - Free any empty Tx buffers
151  * @tx_ring: ring to be cleaned
152  */
153 void ice_clean_tx_ring(struct ice_tx_ring *tx_ring)
154 {
155 	u32 size;
156 	u16 i;
157 
158 	if (ice_ring_is_xdp(tx_ring) && tx_ring->xsk_pool) {
159 		ice_xsk_clean_xdp_ring(tx_ring);
160 		goto tx_skip_free;
161 	}
162 
163 	/* ring already cleared, nothing to do */
164 	if (!tx_ring->tx_buf)
165 		return;
166 
167 	/* Free all the Tx ring sk_buffs */
168 	for (i = 0; i < tx_ring->count; i++)
169 		ice_unmap_and_free_tx_buf(tx_ring, &tx_ring->tx_buf[i]);
170 
171 tx_skip_free:
172 	memset(tx_ring->tx_buf, 0, sizeof(*tx_ring->tx_buf) * tx_ring->count);
173 
174 	size = ALIGN(tx_ring->count * sizeof(struct ice_tx_desc),
175 		     PAGE_SIZE);
176 	/* Zero out the descriptor ring */
177 	memset(tx_ring->desc, 0, size);
178 
179 	tx_ring->next_to_use = 0;
180 	tx_ring->next_to_clean = 0;
181 
182 	if (!tx_ring->netdev)
183 		return;
184 
185 	/* cleanup Tx queue statistics */
186 	netdev_tx_reset_queue(txring_txq(tx_ring));
187 }
188 
189 /**
190  * ice_free_tx_ring - Free Tx resources per queue
191  * @tx_ring: Tx descriptor ring for a specific queue
192  *
193  * Free all transmit software resources
194  */
195 void ice_free_tx_ring(struct ice_tx_ring *tx_ring)
196 {
197 	u32 size;
198 
199 	ice_clean_tx_ring(tx_ring);
200 	devm_kfree(tx_ring->dev, tx_ring->tx_buf);
201 	tx_ring->tx_buf = NULL;
202 
203 	if (tx_ring->desc) {
204 		size = ALIGN(tx_ring->count * sizeof(struct ice_tx_desc),
205 			     PAGE_SIZE);
206 		dmam_free_coherent(tx_ring->dev, size,
207 				   tx_ring->desc, tx_ring->dma);
208 		tx_ring->desc = NULL;
209 	}
210 }
211 
212 /**
213  * ice_clean_tx_irq - Reclaim resources after transmit completes
214  * @tx_ring: Tx ring to clean
215  * @napi_budget: Used to determine if we are in netpoll
216  *
217  * Returns true if there's any budget left (e.g. the clean is finished)
218  */
219 static bool ice_clean_tx_irq(struct ice_tx_ring *tx_ring, int napi_budget)
220 {
221 	unsigned int total_bytes = 0, total_pkts = 0;
222 	unsigned int budget = ICE_DFLT_IRQ_WORK;
223 	struct ice_vsi *vsi = tx_ring->vsi;
224 	s16 i = tx_ring->next_to_clean;
225 	struct ice_tx_desc *tx_desc;
226 	struct ice_tx_buf *tx_buf;
227 
228 	/* get the bql data ready */
229 	netdev_txq_bql_complete_prefetchw(txring_txq(tx_ring));
230 
231 	tx_buf = &tx_ring->tx_buf[i];
232 	tx_desc = ICE_TX_DESC(tx_ring, i);
233 	i -= tx_ring->count;
234 
235 	prefetch(&vsi->state);
236 
237 	do {
238 		struct ice_tx_desc *eop_desc = tx_buf->next_to_watch;
239 
240 		/* if next_to_watch is not set then there is no work pending */
241 		if (!eop_desc)
242 			break;
243 
244 		/* follow the guidelines of other drivers */
245 		prefetchw(&tx_buf->skb->users);
246 
247 		smp_rmb();	/* prevent any other reads prior to eop_desc */
248 
249 		ice_trace(clean_tx_irq, tx_ring, tx_desc, tx_buf);
250 		/* if the descriptor isn't done, no work yet to do */
251 		if (!(eop_desc->cmd_type_offset_bsz &
252 		      cpu_to_le64(ICE_TX_DESC_DTYPE_DESC_DONE)))
253 			break;
254 
255 		/* clear next_to_watch to prevent false hangs */
256 		tx_buf->next_to_watch = NULL;
257 
258 		/* update the statistics for this packet */
259 		total_bytes += tx_buf->bytecount;
260 		total_pkts += tx_buf->gso_segs;
261 
262 		/* free the skb */
263 		napi_consume_skb(tx_buf->skb, napi_budget);
264 
265 		/* unmap skb header data */
266 		dma_unmap_single(tx_ring->dev,
267 				 dma_unmap_addr(tx_buf, dma),
268 				 dma_unmap_len(tx_buf, len),
269 				 DMA_TO_DEVICE);
270 
271 		/* clear tx_buf data */
272 		tx_buf->skb = NULL;
273 		dma_unmap_len_set(tx_buf, len, 0);
274 
275 		/* unmap remaining buffers */
276 		while (tx_desc != eop_desc) {
277 			ice_trace(clean_tx_irq_unmap, tx_ring, tx_desc, tx_buf);
278 			tx_buf++;
279 			tx_desc++;
280 			i++;
281 			if (unlikely(!i)) {
282 				i -= tx_ring->count;
283 				tx_buf = tx_ring->tx_buf;
284 				tx_desc = ICE_TX_DESC(tx_ring, 0);
285 			}
286 
287 			/* unmap any remaining paged data */
288 			if (dma_unmap_len(tx_buf, len)) {
289 				dma_unmap_page(tx_ring->dev,
290 					       dma_unmap_addr(tx_buf, dma),
291 					       dma_unmap_len(tx_buf, len),
292 					       DMA_TO_DEVICE);
293 				dma_unmap_len_set(tx_buf, len, 0);
294 			}
295 		}
296 		ice_trace(clean_tx_irq_unmap_eop, tx_ring, tx_desc, tx_buf);
297 
298 		/* move us one more past the eop_desc for start of next pkt */
299 		tx_buf++;
300 		tx_desc++;
301 		i++;
302 		if (unlikely(!i)) {
303 			i -= tx_ring->count;
304 			tx_buf = tx_ring->tx_buf;
305 			tx_desc = ICE_TX_DESC(tx_ring, 0);
306 		}
307 
308 		prefetch(tx_desc);
309 
310 		/* update budget accounting */
311 		budget--;
312 	} while (likely(budget));
313 
314 	i += tx_ring->count;
315 	tx_ring->next_to_clean = i;
316 
317 	ice_update_tx_ring_stats(tx_ring, total_pkts, total_bytes);
318 	netdev_tx_completed_queue(txring_txq(tx_ring), total_pkts, total_bytes);
319 
320 #define TX_WAKE_THRESHOLD ((s16)(DESC_NEEDED * 2))
321 	if (unlikely(total_pkts && netif_carrier_ok(tx_ring->netdev) &&
322 		     (ICE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
323 		/* Make sure that anybody stopping the queue after this
324 		 * sees the new next_to_clean.
325 		 */
326 		smp_mb();
327 		if (netif_tx_queue_stopped(txring_txq(tx_ring)) &&
328 		    !test_bit(ICE_VSI_DOWN, vsi->state)) {
329 			netif_tx_wake_queue(txring_txq(tx_ring));
330 			++tx_ring->ring_stats->tx_stats.restart_q;
331 		}
332 	}
333 
334 	return !!budget;
335 }
336 
337 /**
338  * ice_setup_tx_ring - Allocate the Tx descriptors
339  * @tx_ring: the Tx ring to set up
340  *
341  * Return 0 on success, negative on error
342  */
343 int ice_setup_tx_ring(struct ice_tx_ring *tx_ring)
344 {
345 	struct device *dev = tx_ring->dev;
346 	u32 size;
347 
348 	if (!dev)
349 		return -ENOMEM;
350 
351 	/* warn if we are about to overwrite the pointer */
352 	WARN_ON(tx_ring->tx_buf);
353 	tx_ring->tx_buf =
354 		devm_kcalloc(dev, sizeof(*tx_ring->tx_buf), tx_ring->count,
355 			     GFP_KERNEL);
356 	if (!tx_ring->tx_buf)
357 		return -ENOMEM;
358 
359 	/* round up to nearest page */
360 	size = ALIGN(tx_ring->count * sizeof(struct ice_tx_desc),
361 		     PAGE_SIZE);
362 	tx_ring->desc = dmam_alloc_coherent(dev, size, &tx_ring->dma,
363 					    GFP_KERNEL);
364 	if (!tx_ring->desc) {
365 		dev_err(dev, "Unable to allocate memory for the Tx descriptor ring, size=%d\n",
366 			size);
367 		goto err;
368 	}
369 
370 	tx_ring->next_to_use = 0;
371 	tx_ring->next_to_clean = 0;
372 	tx_ring->ring_stats->tx_stats.prev_pkt = -1;
373 	return 0;
374 
375 err:
376 	devm_kfree(dev, tx_ring->tx_buf);
377 	tx_ring->tx_buf = NULL;
378 	return -ENOMEM;
379 }
380 
381 /**
382  * ice_clean_rx_ring - Free Rx buffers
383  * @rx_ring: ring to be cleaned
384  */
385 void ice_clean_rx_ring(struct ice_rx_ring *rx_ring)
386 {
387 	struct xdp_buff *xdp = &rx_ring->xdp;
388 	struct device *dev = rx_ring->dev;
389 	u32 size;
390 	u16 i;
391 
392 	/* ring already cleared, nothing to do */
393 	if (!rx_ring->rx_buf)
394 		return;
395 
396 	if (rx_ring->xsk_pool) {
397 		ice_xsk_clean_rx_ring(rx_ring);
398 		goto rx_skip_free;
399 	}
400 
401 	if (xdp->data) {
402 		xdp_return_buff(xdp);
403 		xdp->data = NULL;
404 	}
405 
406 	/* Free all the Rx ring sk_buffs */
407 	for (i = 0; i < rx_ring->count; i++) {
408 		struct ice_rx_buf *rx_buf = &rx_ring->rx_buf[i];
409 
410 		if (!rx_buf->page)
411 			continue;
412 
413 		/* Invalidate cache lines that may have been written to by
414 		 * device so that we avoid corrupting memory.
415 		 */
416 		dma_sync_single_range_for_cpu(dev, rx_buf->dma,
417 					      rx_buf->page_offset,
418 					      rx_ring->rx_buf_len,
419 					      DMA_FROM_DEVICE);
420 
421 		/* free resources associated with mapping */
422 		dma_unmap_page_attrs(dev, rx_buf->dma, ice_rx_pg_size(rx_ring),
423 				     DMA_FROM_DEVICE, ICE_RX_DMA_ATTR);
424 		__page_frag_cache_drain(rx_buf->page, rx_buf->pagecnt_bias);
425 
426 		rx_buf->page = NULL;
427 		rx_buf->page_offset = 0;
428 	}
429 
430 rx_skip_free:
431 	if (rx_ring->xsk_pool)
432 		memset(rx_ring->xdp_buf, 0, array_size(rx_ring->count, sizeof(*rx_ring->xdp_buf)));
433 	else
434 		memset(rx_ring->rx_buf, 0, array_size(rx_ring->count, sizeof(*rx_ring->rx_buf)));
435 
436 	/* Zero out the descriptor ring */
437 	size = ALIGN(rx_ring->count * sizeof(union ice_32byte_rx_desc),
438 		     PAGE_SIZE);
439 	memset(rx_ring->desc, 0, size);
440 
441 	rx_ring->next_to_alloc = 0;
442 	rx_ring->next_to_clean = 0;
443 	rx_ring->first_desc = 0;
444 	rx_ring->next_to_use = 0;
445 }
446 
447 /**
448  * ice_free_rx_ring - Free Rx resources
449  * @rx_ring: ring to clean the resources from
450  *
451  * Free all receive software resources
452  */
453 void ice_free_rx_ring(struct ice_rx_ring *rx_ring)
454 {
455 	u32 size;
456 
457 	ice_clean_rx_ring(rx_ring);
458 	if (rx_ring->vsi->type == ICE_VSI_PF)
459 		if (xdp_rxq_info_is_reg(&rx_ring->xdp_rxq))
460 			xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
461 	rx_ring->xdp_prog = NULL;
462 	if (rx_ring->xsk_pool) {
463 		kfree(rx_ring->xdp_buf);
464 		rx_ring->xdp_buf = NULL;
465 	} else {
466 		kfree(rx_ring->rx_buf);
467 		rx_ring->rx_buf = NULL;
468 	}
469 
470 	if (rx_ring->desc) {
471 		size = ALIGN(rx_ring->count * sizeof(union ice_32byte_rx_desc),
472 			     PAGE_SIZE);
473 		dmam_free_coherent(rx_ring->dev, size,
474 				   rx_ring->desc, rx_ring->dma);
475 		rx_ring->desc = NULL;
476 	}
477 }
478 
479 /**
480  * ice_setup_rx_ring - Allocate the Rx descriptors
481  * @rx_ring: the Rx ring to set up
482  *
483  * Return 0 on success, negative on error
484  */
485 int ice_setup_rx_ring(struct ice_rx_ring *rx_ring)
486 {
487 	struct device *dev = rx_ring->dev;
488 	u32 size;
489 
490 	if (!dev)
491 		return -ENOMEM;
492 
493 	/* warn if we are about to overwrite the pointer */
494 	WARN_ON(rx_ring->rx_buf);
495 	rx_ring->rx_buf =
496 		kcalloc(rx_ring->count, sizeof(*rx_ring->rx_buf), GFP_KERNEL);
497 	if (!rx_ring->rx_buf)
498 		return -ENOMEM;
499 
500 	/* round up to nearest page */
501 	size = ALIGN(rx_ring->count * sizeof(union ice_32byte_rx_desc),
502 		     PAGE_SIZE);
503 	rx_ring->desc = dmam_alloc_coherent(dev, size, &rx_ring->dma,
504 					    GFP_KERNEL);
505 	if (!rx_ring->desc) {
506 		dev_err(dev, "Unable to allocate memory for the Rx descriptor ring, size=%d\n",
507 			size);
508 		goto err;
509 	}
510 
511 	rx_ring->next_to_use = 0;
512 	rx_ring->next_to_clean = 0;
513 	rx_ring->first_desc = 0;
514 
515 	if (ice_is_xdp_ena_vsi(rx_ring->vsi))
516 		WRITE_ONCE(rx_ring->xdp_prog, rx_ring->vsi->xdp_prog);
517 
518 	if (rx_ring->vsi->type == ICE_VSI_PF &&
519 	    !xdp_rxq_info_is_reg(&rx_ring->xdp_rxq))
520 		if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, rx_ring->netdev,
521 				     rx_ring->q_index, rx_ring->q_vector->napi.napi_id))
522 			goto err;
523 	return 0;
524 
525 err:
526 	kfree(rx_ring->rx_buf);
527 	rx_ring->rx_buf = NULL;
528 	return -ENOMEM;
529 }
530 
531 /**
532  * ice_rx_frame_truesize
533  * @rx_ring: ptr to Rx ring
534  * @size: size
535  *
536  * calculate the truesize with taking into the account PAGE_SIZE of
537  * underlying arch
538  */
539 static unsigned int
540 ice_rx_frame_truesize(struct ice_rx_ring *rx_ring, const unsigned int size)
541 {
542 	unsigned int truesize;
543 
544 #if (PAGE_SIZE < 8192)
545 	truesize = ice_rx_pg_size(rx_ring) / 2; /* Must be power-of-2 */
546 #else
547 	truesize = rx_ring->rx_offset ?
548 		SKB_DATA_ALIGN(rx_ring->rx_offset + size) +
549 		SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) :
550 		SKB_DATA_ALIGN(size);
551 #endif
552 	return truesize;
553 }
554 
555 /**
556  * ice_run_xdp - Executes an XDP program on initialized xdp_buff
557  * @rx_ring: Rx ring
558  * @xdp: xdp_buff used as input to the XDP program
559  * @xdp_prog: XDP program to run
560  * @xdp_ring: ring to be used for XDP_TX action
561  * @rx_buf: Rx buffer to store the XDP action
562  *
563  * Returns any of ICE_XDP_{PASS, CONSUMED, TX, REDIR}
564  */
565 static void
566 ice_run_xdp(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp,
567 	    struct bpf_prog *xdp_prog, struct ice_tx_ring *xdp_ring,
568 	    struct ice_rx_buf *rx_buf)
569 {
570 	unsigned int ret = ICE_XDP_PASS;
571 	u32 act;
572 
573 	if (!xdp_prog)
574 		goto exit;
575 
576 	act = bpf_prog_run_xdp(xdp_prog, xdp);
577 	switch (act) {
578 	case XDP_PASS:
579 		break;
580 	case XDP_TX:
581 		if (static_branch_unlikely(&ice_xdp_locking_key))
582 			spin_lock(&xdp_ring->tx_lock);
583 		ret = __ice_xmit_xdp_ring(xdp, xdp_ring);
584 		if (static_branch_unlikely(&ice_xdp_locking_key))
585 			spin_unlock(&xdp_ring->tx_lock);
586 		if (ret == ICE_XDP_CONSUMED)
587 			goto out_failure;
588 		break;
589 	case XDP_REDIRECT:
590 		if (xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog))
591 			goto out_failure;
592 		ret = ICE_XDP_REDIR;
593 		break;
594 	default:
595 		bpf_warn_invalid_xdp_action(rx_ring->netdev, xdp_prog, act);
596 		fallthrough;
597 	case XDP_ABORTED:
598 out_failure:
599 		trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
600 		fallthrough;
601 	case XDP_DROP:
602 		ret = ICE_XDP_CONSUMED;
603 	}
604 exit:
605 	rx_buf->act = ret;
606 	if (unlikely(xdp_buff_has_frags(xdp)))
607 		ice_set_rx_bufs_act(xdp, rx_ring, ret);
608 }
609 
610 /**
611  * ice_xdp_xmit - submit packets to XDP ring for transmission
612  * @dev: netdev
613  * @n: number of XDP frames to be transmitted
614  * @frames: XDP frames to be transmitted
615  * @flags: transmit flags
616  *
617  * Returns number of frames successfully sent. Failed frames
618  * will be free'ed by XDP core.
619  * For error cases, a negative errno code is returned and no-frames
620  * are transmitted (caller must handle freeing frames).
621  */
622 int
623 ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,
624 	     u32 flags)
625 {
626 	struct ice_netdev_priv *np = netdev_priv(dev);
627 	unsigned int queue_index = smp_processor_id();
628 	struct ice_vsi *vsi = np->vsi;
629 	struct ice_tx_ring *xdp_ring;
630 	struct ice_tx_buf *tx_buf;
631 	int nxmit = 0, i;
632 
633 	if (test_bit(ICE_VSI_DOWN, vsi->state))
634 		return -ENETDOWN;
635 
636 	if (!ice_is_xdp_ena_vsi(vsi))
637 		return -ENXIO;
638 
639 	if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
640 		return -EINVAL;
641 
642 	if (static_branch_unlikely(&ice_xdp_locking_key)) {
643 		queue_index %= vsi->num_xdp_txq;
644 		xdp_ring = vsi->xdp_rings[queue_index];
645 		spin_lock(&xdp_ring->tx_lock);
646 	} else {
647 		/* Generally, should not happen */
648 		if (unlikely(queue_index >= vsi->num_xdp_txq))
649 			return -ENXIO;
650 		xdp_ring = vsi->xdp_rings[queue_index];
651 	}
652 
653 	tx_buf = &xdp_ring->tx_buf[xdp_ring->next_to_use];
654 	for (i = 0; i < n; i++) {
655 		struct xdp_frame *xdpf = frames[i];
656 		int err;
657 
658 		err = ice_xmit_xdp_ring(xdpf, xdp_ring);
659 		if (err != ICE_XDP_TX)
660 			break;
661 		nxmit++;
662 	}
663 
664 	tx_buf->rs_idx = ice_set_rs_bit(xdp_ring);
665 	if (unlikely(flags & XDP_XMIT_FLUSH))
666 		ice_xdp_ring_update_tail(xdp_ring);
667 
668 	if (static_branch_unlikely(&ice_xdp_locking_key))
669 		spin_unlock(&xdp_ring->tx_lock);
670 
671 	return nxmit;
672 }
673 
674 /**
675  * ice_alloc_mapped_page - recycle or make a new page
676  * @rx_ring: ring to use
677  * @bi: rx_buf struct to modify
678  *
679  * Returns true if the page was successfully allocated or
680  * reused.
681  */
682 static bool
683 ice_alloc_mapped_page(struct ice_rx_ring *rx_ring, struct ice_rx_buf *bi)
684 {
685 	struct page *page = bi->page;
686 	dma_addr_t dma;
687 
688 	/* since we are recycling buffers we should seldom need to alloc */
689 	if (likely(page))
690 		return true;
691 
692 	/* alloc new page for storage */
693 	page = dev_alloc_pages(ice_rx_pg_order(rx_ring));
694 	if (unlikely(!page)) {
695 		rx_ring->ring_stats->rx_stats.alloc_page_failed++;
696 		return false;
697 	}
698 
699 	/* map page for use */
700 	dma = dma_map_page_attrs(rx_ring->dev, page, 0, ice_rx_pg_size(rx_ring),
701 				 DMA_FROM_DEVICE, ICE_RX_DMA_ATTR);
702 
703 	/* if mapping failed free memory back to system since
704 	 * there isn't much point in holding memory we can't use
705 	 */
706 	if (dma_mapping_error(rx_ring->dev, dma)) {
707 		__free_pages(page, ice_rx_pg_order(rx_ring));
708 		rx_ring->ring_stats->rx_stats.alloc_page_failed++;
709 		return false;
710 	}
711 
712 	bi->dma = dma;
713 	bi->page = page;
714 	bi->page_offset = rx_ring->rx_offset;
715 	page_ref_add(page, USHRT_MAX - 1);
716 	bi->pagecnt_bias = USHRT_MAX;
717 
718 	return true;
719 }
720 
721 /**
722  * ice_alloc_rx_bufs - Replace used receive buffers
723  * @rx_ring: ring to place buffers on
724  * @cleaned_count: number of buffers to replace
725  *
726  * Returns false if all allocations were successful, true if any fail. Returning
727  * true signals to the caller that we didn't replace cleaned_count buffers and
728  * there is more work to do.
729  *
730  * First, try to clean "cleaned_count" Rx buffers. Then refill the cleaned Rx
731  * buffers. Then bump tail at most one time. Grouping like this lets us avoid
732  * multiple tail writes per call.
733  */
734 bool ice_alloc_rx_bufs(struct ice_rx_ring *rx_ring, unsigned int cleaned_count)
735 {
736 	union ice_32b_rx_flex_desc *rx_desc;
737 	u16 ntu = rx_ring->next_to_use;
738 	struct ice_rx_buf *bi;
739 
740 	/* do nothing if no valid netdev defined */
741 	if ((!rx_ring->netdev && rx_ring->vsi->type != ICE_VSI_CTRL) ||
742 	    !cleaned_count)
743 		return false;
744 
745 	/* get the Rx descriptor and buffer based on next_to_use */
746 	rx_desc = ICE_RX_DESC(rx_ring, ntu);
747 	bi = &rx_ring->rx_buf[ntu];
748 
749 	do {
750 		/* if we fail here, we have work remaining */
751 		if (!ice_alloc_mapped_page(rx_ring, bi))
752 			break;
753 
754 		/* sync the buffer for use by the device */
755 		dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
756 						 bi->page_offset,
757 						 rx_ring->rx_buf_len,
758 						 DMA_FROM_DEVICE);
759 
760 		/* Refresh the desc even if buffer_addrs didn't change
761 		 * because each write-back erases this info.
762 		 */
763 		rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
764 
765 		rx_desc++;
766 		bi++;
767 		ntu++;
768 		if (unlikely(ntu == rx_ring->count)) {
769 			rx_desc = ICE_RX_DESC(rx_ring, 0);
770 			bi = rx_ring->rx_buf;
771 			ntu = 0;
772 		}
773 
774 		/* clear the status bits for the next_to_use descriptor */
775 		rx_desc->wb.status_error0 = 0;
776 
777 		cleaned_count--;
778 	} while (cleaned_count);
779 
780 	if (rx_ring->next_to_use != ntu)
781 		ice_release_rx_desc(rx_ring, ntu);
782 
783 	return !!cleaned_count;
784 }
785 
786 /**
787  * ice_rx_buf_adjust_pg_offset - Prepare Rx buffer for reuse
788  * @rx_buf: Rx buffer to adjust
789  * @size: Size of adjustment
790  *
791  * Update the offset within page so that Rx buf will be ready to be reused.
792  * For systems with PAGE_SIZE < 8192 this function will flip the page offset
793  * so the second half of page assigned to Rx buffer will be used, otherwise
794  * the offset is moved by "size" bytes
795  */
796 static void
797 ice_rx_buf_adjust_pg_offset(struct ice_rx_buf *rx_buf, unsigned int size)
798 {
799 #if (PAGE_SIZE < 8192)
800 	/* flip page offset to other buffer */
801 	rx_buf->page_offset ^= size;
802 #else
803 	/* move offset up to the next cache line */
804 	rx_buf->page_offset += size;
805 #endif
806 }
807 
808 /**
809  * ice_can_reuse_rx_page - Determine if page can be reused for another Rx
810  * @rx_buf: buffer containing the page
811  *
812  * If page is reusable, we have a green light for calling ice_reuse_rx_page,
813  * which will assign the current buffer to the buffer that next_to_alloc is
814  * pointing to; otherwise, the DMA mapping needs to be destroyed and
815  * page freed
816  */
817 static bool
818 ice_can_reuse_rx_page(struct ice_rx_buf *rx_buf)
819 {
820 	unsigned int pagecnt_bias = rx_buf->pagecnt_bias;
821 	struct page *page = rx_buf->page;
822 
823 	/* avoid re-using remote and pfmemalloc pages */
824 	if (!dev_page_is_reusable(page))
825 		return false;
826 
827 #if (PAGE_SIZE < 8192)
828 	/* if we are only owner of page we can reuse it */
829 	if (unlikely(rx_buf->pgcnt - pagecnt_bias > 1))
830 		return false;
831 #else
832 #define ICE_LAST_OFFSET \
833 	(SKB_WITH_OVERHEAD(PAGE_SIZE) - ICE_RXBUF_2048)
834 	if (rx_buf->page_offset > ICE_LAST_OFFSET)
835 		return false;
836 #endif /* PAGE_SIZE < 8192) */
837 
838 	/* If we have drained the page fragment pool we need to update
839 	 * the pagecnt_bias and page count so that we fully restock the
840 	 * number of references the driver holds.
841 	 */
842 	if (unlikely(pagecnt_bias == 1)) {
843 		page_ref_add(page, USHRT_MAX - 1);
844 		rx_buf->pagecnt_bias = USHRT_MAX;
845 	}
846 
847 	return true;
848 }
849 
850 /**
851  * ice_add_xdp_frag - Add contents of Rx buffer to xdp buf as a frag
852  * @rx_ring: Rx descriptor ring to transact packets on
853  * @xdp: xdp buff to place the data into
854  * @rx_buf: buffer containing page to add
855  * @size: packet length from rx_desc
856  *
857  * This function will add the data contained in rx_buf->page to the xdp buf.
858  * It will just attach the page as a frag.
859  */
860 static int
861 ice_add_xdp_frag(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp,
862 		 struct ice_rx_buf *rx_buf, const unsigned int size)
863 {
864 	struct skb_shared_info *sinfo = xdp_get_shared_info_from_buff(xdp);
865 
866 	if (!size)
867 		return 0;
868 
869 	if (!xdp_buff_has_frags(xdp)) {
870 		sinfo->nr_frags = 0;
871 		sinfo->xdp_frags_size = 0;
872 		xdp_buff_set_frags_flag(xdp);
873 	}
874 
875 	if (unlikely(sinfo->nr_frags == MAX_SKB_FRAGS)) {
876 		if (unlikely(xdp_buff_has_frags(xdp)))
877 			ice_set_rx_bufs_act(xdp, rx_ring, ICE_XDP_CONSUMED);
878 		return -ENOMEM;
879 	}
880 
881 	__skb_fill_page_desc_noacc(sinfo, sinfo->nr_frags++, rx_buf->page,
882 				   rx_buf->page_offset, size);
883 	sinfo->xdp_frags_size += size;
884 
885 	if (page_is_pfmemalloc(rx_buf->page))
886 		xdp_buff_set_frag_pfmemalloc(xdp);
887 
888 	return 0;
889 }
890 
891 /**
892  * ice_reuse_rx_page - page flip buffer and store it back on the ring
893  * @rx_ring: Rx descriptor ring to store buffers on
894  * @old_buf: donor buffer to have page reused
895  *
896  * Synchronizes page for reuse by the adapter
897  */
898 static void
899 ice_reuse_rx_page(struct ice_rx_ring *rx_ring, struct ice_rx_buf *old_buf)
900 {
901 	u16 nta = rx_ring->next_to_alloc;
902 	struct ice_rx_buf *new_buf;
903 
904 	new_buf = &rx_ring->rx_buf[nta];
905 
906 	/* update, and store next to alloc */
907 	nta++;
908 	rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
909 
910 	/* Transfer page from old buffer to new buffer.
911 	 * Move each member individually to avoid possible store
912 	 * forwarding stalls and unnecessary copy of skb.
913 	 */
914 	new_buf->dma = old_buf->dma;
915 	new_buf->page = old_buf->page;
916 	new_buf->page_offset = old_buf->page_offset;
917 	new_buf->pagecnt_bias = old_buf->pagecnt_bias;
918 }
919 
920 /**
921  * ice_get_rx_buf - Fetch Rx buffer and synchronize data for use
922  * @rx_ring: Rx descriptor ring to transact packets on
923  * @size: size of buffer to add to skb
924  *
925  * This function will pull an Rx buffer from the ring and synchronize it
926  * for use by the CPU.
927  */
928 static struct ice_rx_buf *
929 ice_get_rx_buf(struct ice_rx_ring *rx_ring, const unsigned int size,
930 	       const unsigned int ntc)
931 {
932 	struct ice_rx_buf *rx_buf;
933 
934 	rx_buf = &rx_ring->rx_buf[ntc];
935 	rx_buf->pgcnt =
936 #if (PAGE_SIZE < 8192)
937 		page_count(rx_buf->page);
938 #else
939 		0;
940 #endif
941 	prefetchw(rx_buf->page);
942 
943 	if (!size)
944 		return rx_buf;
945 	/* we are reusing so sync this buffer for CPU use */
946 	dma_sync_single_range_for_cpu(rx_ring->dev, rx_buf->dma,
947 				      rx_buf->page_offset, size,
948 				      DMA_FROM_DEVICE);
949 
950 	/* We have pulled a buffer for use, so decrement pagecnt_bias */
951 	rx_buf->pagecnt_bias--;
952 
953 	return rx_buf;
954 }
955 
956 /**
957  * ice_build_skb - Build skb around an existing buffer
958  * @rx_ring: Rx descriptor ring to transact packets on
959  * @xdp: xdp_buff pointing to the data
960  *
961  * This function builds an skb around an existing XDP buffer, taking care
962  * to set up the skb correctly and avoid any memcpy overhead. Driver has
963  * already combined frags (if any) to skb_shared_info.
964  */
965 static struct sk_buff *
966 ice_build_skb(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp)
967 {
968 	u8 metasize = xdp->data - xdp->data_meta;
969 	struct skb_shared_info *sinfo = NULL;
970 	unsigned int nr_frags;
971 	struct sk_buff *skb;
972 
973 	if (unlikely(xdp_buff_has_frags(xdp))) {
974 		sinfo = xdp_get_shared_info_from_buff(xdp);
975 		nr_frags = sinfo->nr_frags;
976 	}
977 
978 	/* Prefetch first cache line of first page. If xdp->data_meta
979 	 * is unused, this points exactly as xdp->data, otherwise we
980 	 * likely have a consumer accessing first few bytes of meta
981 	 * data, and then actual data.
982 	 */
983 	net_prefetch(xdp->data_meta);
984 	/* build an skb around the page buffer */
985 	skb = napi_build_skb(xdp->data_hard_start, xdp->frame_sz);
986 	if (unlikely(!skb))
987 		return NULL;
988 
989 	/* must to record Rx queue, otherwise OS features such as
990 	 * symmetric queue won't work
991 	 */
992 	skb_record_rx_queue(skb, rx_ring->q_index);
993 
994 	/* update pointers within the skb to store the data */
995 	skb_reserve(skb, xdp->data - xdp->data_hard_start);
996 	__skb_put(skb, xdp->data_end - xdp->data);
997 	if (metasize)
998 		skb_metadata_set(skb, metasize);
999 
1000 	if (unlikely(xdp_buff_has_frags(xdp)))
1001 		xdp_update_skb_shared_info(skb, nr_frags,
1002 					   sinfo->xdp_frags_size,
1003 					   nr_frags * xdp->frame_sz,
1004 					   xdp_buff_is_frag_pfmemalloc(xdp));
1005 
1006 	return skb;
1007 }
1008 
1009 /**
1010  * ice_construct_skb - Allocate skb and populate it
1011  * @rx_ring: Rx descriptor ring to transact packets on
1012  * @rx_buf: Rx buffer to pull data from
1013  * @xdp: xdp_buff pointing to the data
1014  *
1015  * This function allocates an skb. It then populates it with the page
1016  * data from the current receive descriptor, taking care to set up the
1017  * skb correctly.
1018  */
1019 static struct sk_buff *
1020 ice_construct_skb(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp)
1021 {
1022 	unsigned int size = xdp->data_end - xdp->data;
1023 	struct skb_shared_info *sinfo = NULL;
1024 	struct ice_rx_buf *rx_buf;
1025 	unsigned int nr_frags = 0;
1026 	unsigned int headlen;
1027 	struct sk_buff *skb;
1028 
1029 	/* prefetch first cache line of first page */
1030 	net_prefetch(xdp->data);
1031 
1032 	if (unlikely(xdp_buff_has_frags(xdp))) {
1033 		sinfo = xdp_get_shared_info_from_buff(xdp);
1034 		nr_frags = sinfo->nr_frags;
1035 	}
1036 
1037 	/* allocate a skb to store the frags */
1038 	skb = __napi_alloc_skb(&rx_ring->q_vector->napi, ICE_RX_HDR_SIZE,
1039 			       GFP_ATOMIC | __GFP_NOWARN);
1040 	if (unlikely(!skb))
1041 		return NULL;
1042 
1043 	rx_buf = &rx_ring->rx_buf[rx_ring->first_desc];
1044 	skb_record_rx_queue(skb, rx_ring->q_index);
1045 	/* Determine available headroom for copy */
1046 	headlen = size;
1047 	if (headlen > ICE_RX_HDR_SIZE)
1048 		headlen = eth_get_headlen(skb->dev, xdp->data, ICE_RX_HDR_SIZE);
1049 
1050 	/* align pull length to size of long to optimize memcpy performance */
1051 	memcpy(__skb_put(skb, headlen), xdp->data, ALIGN(headlen,
1052 							 sizeof(long)));
1053 
1054 	/* if we exhaust the linear part then add what is left as a frag */
1055 	size -= headlen;
1056 	if (size) {
1057 		/* besides adding here a partial frag, we are going to add
1058 		 * frags from xdp_buff, make sure there is enough space for
1059 		 * them
1060 		 */
1061 		if (unlikely(nr_frags >= MAX_SKB_FRAGS - 1)) {
1062 			dev_kfree_skb(skb);
1063 			return NULL;
1064 		}
1065 		skb_add_rx_frag(skb, 0, rx_buf->page,
1066 				rx_buf->page_offset + headlen, size,
1067 				xdp->frame_sz);
1068 	} else {
1069 		/* buffer is unused, change the act that should be taken later
1070 		 * on; data was copied onto skb's linear part so there's no
1071 		 * need for adjusting page offset and we can reuse this buffer
1072 		 * as-is
1073 		 */
1074 		rx_buf->act = ICE_SKB_CONSUMED;
1075 	}
1076 
1077 	if (unlikely(xdp_buff_has_frags(xdp))) {
1078 		struct skb_shared_info *skinfo = skb_shinfo(skb);
1079 
1080 		memcpy(&skinfo->frags[skinfo->nr_frags], &sinfo->frags[0],
1081 		       sizeof(skb_frag_t) * nr_frags);
1082 
1083 		xdp_update_skb_shared_info(skb, skinfo->nr_frags + nr_frags,
1084 					   sinfo->xdp_frags_size,
1085 					   nr_frags * xdp->frame_sz,
1086 					   xdp_buff_is_frag_pfmemalloc(xdp));
1087 	}
1088 
1089 	return skb;
1090 }
1091 
1092 /**
1093  * ice_put_rx_buf - Clean up used buffer and either recycle or free
1094  * @rx_ring: Rx descriptor ring to transact packets on
1095  * @rx_buf: Rx buffer to pull data from
1096  *
1097  * This function will clean up the contents of the rx_buf. It will either
1098  * recycle the buffer or unmap it and free the associated resources.
1099  */
1100 static void
1101 ice_put_rx_buf(struct ice_rx_ring *rx_ring, struct ice_rx_buf *rx_buf)
1102 {
1103 	if (!rx_buf)
1104 		return;
1105 
1106 	if (ice_can_reuse_rx_page(rx_buf)) {
1107 		/* hand second half of page back to the ring */
1108 		ice_reuse_rx_page(rx_ring, rx_buf);
1109 	} else {
1110 		/* we are not reusing the buffer so unmap it */
1111 		dma_unmap_page_attrs(rx_ring->dev, rx_buf->dma,
1112 				     ice_rx_pg_size(rx_ring), DMA_FROM_DEVICE,
1113 				     ICE_RX_DMA_ATTR);
1114 		__page_frag_cache_drain(rx_buf->page, rx_buf->pagecnt_bias);
1115 	}
1116 
1117 	/* clear contents of buffer_info */
1118 	rx_buf->page = NULL;
1119 }
1120 
1121 /**
1122  * ice_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
1123  * @rx_ring: Rx descriptor ring to transact packets on
1124  * @budget: Total limit on number of packets to process
1125  *
1126  * This function provides a "bounce buffer" approach to Rx interrupt
1127  * processing. The advantage to this is that on systems that have
1128  * expensive overhead for IOMMU access this provides a means of avoiding
1129  * it by maintaining the mapping of the page to the system.
1130  *
1131  * Returns amount of work completed
1132  */
1133 int ice_clean_rx_irq(struct ice_rx_ring *rx_ring, int budget)
1134 {
1135 	unsigned int total_rx_bytes = 0, total_rx_pkts = 0;
1136 	unsigned int offset = rx_ring->rx_offset;
1137 	struct xdp_buff *xdp = &rx_ring->xdp;
1138 	struct ice_tx_ring *xdp_ring = NULL;
1139 	struct bpf_prog *xdp_prog = NULL;
1140 	u32 ntc = rx_ring->next_to_clean;
1141 	u32 cnt = rx_ring->count;
1142 	u32 cached_ntc = ntc;
1143 	u32 xdp_xmit = 0;
1144 	u32 cached_ntu;
1145 	bool failure;
1146 	u32 first;
1147 
1148 	/* Frame size depend on rx_ring setup when PAGE_SIZE=4K */
1149 #if (PAGE_SIZE < 8192)
1150 	xdp->frame_sz = ice_rx_frame_truesize(rx_ring, 0);
1151 #endif
1152 
1153 	xdp_prog = READ_ONCE(rx_ring->xdp_prog);
1154 	if (xdp_prog) {
1155 		xdp_ring = rx_ring->xdp_ring;
1156 		cached_ntu = xdp_ring->next_to_use;
1157 	}
1158 
1159 	/* start the loop to process Rx packets bounded by 'budget' */
1160 	while (likely(total_rx_pkts < (unsigned int)budget)) {
1161 		union ice_32b_rx_flex_desc *rx_desc;
1162 		struct ice_rx_buf *rx_buf;
1163 		struct sk_buff *skb;
1164 		unsigned int size;
1165 		u16 stat_err_bits;
1166 		u16 vlan_tag = 0;
1167 		u16 rx_ptype;
1168 
1169 		/* get the Rx desc from Rx ring based on 'next_to_clean' */
1170 		rx_desc = ICE_RX_DESC(rx_ring, ntc);
1171 
1172 		/* status_error_len will always be zero for unused descriptors
1173 		 * because it's cleared in cleanup, and overlaps with hdr_addr
1174 		 * which is always zero because packet split isn't used, if the
1175 		 * hardware wrote DD then it will be non-zero
1176 		 */
1177 		stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_DD_S);
1178 		if (!ice_test_staterr(rx_desc->wb.status_error0, stat_err_bits))
1179 			break;
1180 
1181 		/* This memory barrier is needed to keep us from reading
1182 		 * any other fields out of the rx_desc until we know the
1183 		 * DD bit is set.
1184 		 */
1185 		dma_rmb();
1186 
1187 		ice_trace(clean_rx_irq, rx_ring, rx_desc);
1188 		if (rx_desc->wb.rxdid == FDIR_DESC_RXDID || !rx_ring->netdev) {
1189 			struct ice_vsi *ctrl_vsi = rx_ring->vsi;
1190 
1191 			if (rx_desc->wb.rxdid == FDIR_DESC_RXDID &&
1192 			    ctrl_vsi->vf)
1193 				ice_vc_fdir_irq_handler(ctrl_vsi, rx_desc);
1194 			if (++ntc == cnt)
1195 				ntc = 0;
1196 			continue;
1197 		}
1198 
1199 		size = le16_to_cpu(rx_desc->wb.pkt_len) &
1200 			ICE_RX_FLX_DESC_PKT_LEN_M;
1201 
1202 		/* retrieve a buffer from the ring */
1203 		rx_buf = ice_get_rx_buf(rx_ring, size, ntc);
1204 
1205 		if (!xdp->data) {
1206 			void *hard_start;
1207 
1208 			hard_start = page_address(rx_buf->page) + rx_buf->page_offset -
1209 				     offset;
1210 			xdp_prepare_buff(xdp, hard_start, offset, size, !!offset);
1211 #if (PAGE_SIZE > 4096)
1212 			/* At larger PAGE_SIZE, frame_sz depend on len size */
1213 			xdp->frame_sz = ice_rx_frame_truesize(rx_ring, size);
1214 #endif
1215 			xdp_buff_clear_frags_flag(xdp);
1216 		} else if (ice_add_xdp_frag(rx_ring, xdp, rx_buf, size)) {
1217 			break;
1218 		}
1219 		if (++ntc == cnt)
1220 			ntc = 0;
1221 
1222 		/* skip if it is NOP desc */
1223 		if (ice_is_non_eop(rx_ring, rx_desc))
1224 			continue;
1225 
1226 		ice_run_xdp(rx_ring, xdp, xdp_prog, xdp_ring, rx_buf);
1227 		if (rx_buf->act == ICE_XDP_PASS)
1228 			goto construct_skb;
1229 		total_rx_bytes += xdp_get_buff_len(xdp);
1230 		total_rx_pkts++;
1231 
1232 		xdp->data = NULL;
1233 		rx_ring->first_desc = ntc;
1234 		continue;
1235 construct_skb:
1236 		if (likely(ice_ring_uses_build_skb(rx_ring)))
1237 			skb = ice_build_skb(rx_ring, xdp);
1238 		else
1239 			skb = ice_construct_skb(rx_ring, xdp);
1240 		/* exit if we failed to retrieve a buffer */
1241 		if (!skb) {
1242 			rx_ring->ring_stats->rx_stats.alloc_page_failed++;
1243 			rx_buf->act = ICE_XDP_CONSUMED;
1244 			if (unlikely(xdp_buff_has_frags(xdp)))
1245 				ice_set_rx_bufs_act(xdp, rx_ring,
1246 						    ICE_XDP_CONSUMED);
1247 			xdp->data = NULL;
1248 			rx_ring->first_desc = ntc;
1249 			break;
1250 		}
1251 		xdp->data = NULL;
1252 		rx_ring->first_desc = ntc;
1253 
1254 		stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_RXE_S);
1255 		if (unlikely(ice_test_staterr(rx_desc->wb.status_error0,
1256 					      stat_err_bits))) {
1257 			dev_kfree_skb_any(skb);
1258 			continue;
1259 		}
1260 
1261 		vlan_tag = ice_get_vlan_tag_from_rx_desc(rx_desc);
1262 
1263 		/* pad the skb if needed, to make a valid ethernet frame */
1264 		if (eth_skb_pad(skb))
1265 			continue;
1266 
1267 		/* probably a little skewed due to removing CRC */
1268 		total_rx_bytes += skb->len;
1269 
1270 		/* populate checksum, VLAN, and protocol */
1271 		rx_ptype = le16_to_cpu(rx_desc->wb.ptype_flex_flags0) &
1272 			ICE_RX_FLEX_DESC_PTYPE_M;
1273 
1274 		ice_process_skb_fields(rx_ring, rx_desc, skb, rx_ptype);
1275 
1276 		ice_trace(clean_rx_irq_indicate, rx_ring, rx_desc, skb);
1277 		/* send completed skb up the stack */
1278 		ice_receive_skb(rx_ring, skb, vlan_tag);
1279 
1280 		/* update budget accounting */
1281 		total_rx_pkts++;
1282 	}
1283 
1284 	first = rx_ring->first_desc;
1285 	while (cached_ntc != first) {
1286 		struct ice_rx_buf *buf = &rx_ring->rx_buf[cached_ntc];
1287 
1288 		if (buf->act & (ICE_XDP_TX | ICE_XDP_REDIR)) {
1289 			ice_rx_buf_adjust_pg_offset(buf, xdp->frame_sz);
1290 			xdp_xmit |= buf->act;
1291 		} else if (buf->act & ICE_XDP_CONSUMED) {
1292 			buf->pagecnt_bias++;
1293 		} else if (buf->act == ICE_XDP_PASS) {
1294 			ice_rx_buf_adjust_pg_offset(buf, xdp->frame_sz);
1295 		}
1296 
1297 		ice_put_rx_buf(rx_ring, buf);
1298 		if (++cached_ntc >= cnt)
1299 			cached_ntc = 0;
1300 	}
1301 	rx_ring->next_to_clean = ntc;
1302 	/* return up to cleaned_count buffers to hardware */
1303 	failure = ice_alloc_rx_bufs(rx_ring, ICE_RX_DESC_UNUSED(rx_ring));
1304 
1305 	if (xdp_xmit)
1306 		ice_finalize_xdp_rx(xdp_ring, xdp_xmit, cached_ntu);
1307 
1308 	if (rx_ring->ring_stats)
1309 		ice_update_rx_ring_stats(rx_ring, total_rx_pkts,
1310 					 total_rx_bytes);
1311 
1312 	/* guarantee a trip back through this routine if there was a failure */
1313 	return failure ? budget : (int)total_rx_pkts;
1314 }
1315 
1316 static void __ice_update_sample(struct ice_q_vector *q_vector,
1317 				struct ice_ring_container *rc,
1318 				struct dim_sample *sample,
1319 				bool is_tx)
1320 {
1321 	u64 packets = 0, bytes = 0;
1322 
1323 	if (is_tx) {
1324 		struct ice_tx_ring *tx_ring;
1325 
1326 		ice_for_each_tx_ring(tx_ring, *rc) {
1327 			struct ice_ring_stats *ring_stats;
1328 
1329 			ring_stats = tx_ring->ring_stats;
1330 			if (!ring_stats)
1331 				continue;
1332 			packets += ring_stats->stats.pkts;
1333 			bytes += ring_stats->stats.bytes;
1334 		}
1335 	} else {
1336 		struct ice_rx_ring *rx_ring;
1337 
1338 		ice_for_each_rx_ring(rx_ring, *rc) {
1339 			struct ice_ring_stats *ring_stats;
1340 
1341 			ring_stats = rx_ring->ring_stats;
1342 			if (!ring_stats)
1343 				continue;
1344 			packets += ring_stats->stats.pkts;
1345 			bytes += ring_stats->stats.bytes;
1346 		}
1347 	}
1348 
1349 	dim_update_sample(q_vector->total_events, packets, bytes, sample);
1350 	sample->comp_ctr = 0;
1351 
1352 	/* if dim settings get stale, like when not updated for 1
1353 	 * second or longer, force it to start again. This addresses the
1354 	 * frequent case of an idle queue being switched to by the
1355 	 * scheduler. The 1,000 here means 1,000 milliseconds.
1356 	 */
1357 	if (ktime_ms_delta(sample->time, rc->dim.start_sample.time) >= 1000)
1358 		rc->dim.state = DIM_START_MEASURE;
1359 }
1360 
1361 /**
1362  * ice_net_dim - Update net DIM algorithm
1363  * @q_vector: the vector associated with the interrupt
1364  *
1365  * Create a DIM sample and notify net_dim() so that it can possibly decide
1366  * a new ITR value based on incoming packets, bytes, and interrupts.
1367  *
1368  * This function is a no-op if the ring is not configured to dynamic ITR.
1369  */
1370 static void ice_net_dim(struct ice_q_vector *q_vector)
1371 {
1372 	struct ice_ring_container *tx = &q_vector->tx;
1373 	struct ice_ring_container *rx = &q_vector->rx;
1374 
1375 	if (ITR_IS_DYNAMIC(tx)) {
1376 		struct dim_sample dim_sample;
1377 
1378 		__ice_update_sample(q_vector, tx, &dim_sample, true);
1379 		net_dim(&tx->dim, dim_sample);
1380 	}
1381 
1382 	if (ITR_IS_DYNAMIC(rx)) {
1383 		struct dim_sample dim_sample;
1384 
1385 		__ice_update_sample(q_vector, rx, &dim_sample, false);
1386 		net_dim(&rx->dim, dim_sample);
1387 	}
1388 }
1389 
1390 /**
1391  * ice_buildreg_itr - build value for writing to the GLINT_DYN_CTL register
1392  * @itr_idx: interrupt throttling index
1393  * @itr: interrupt throttling value in usecs
1394  */
1395 static u32 ice_buildreg_itr(u16 itr_idx, u16 itr)
1396 {
1397 	/* The ITR value is reported in microseconds, and the register value is
1398 	 * recorded in 2 microsecond units. For this reason we only need to
1399 	 * shift by the GLINT_DYN_CTL_INTERVAL_S - ICE_ITR_GRAN_S to apply this
1400 	 * granularity as a shift instead of division. The mask makes sure the
1401 	 * ITR value is never odd so we don't accidentally write into the field
1402 	 * prior to the ITR field.
1403 	 */
1404 	itr &= ICE_ITR_MASK;
1405 
1406 	return GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
1407 		(itr_idx << GLINT_DYN_CTL_ITR_INDX_S) |
1408 		(itr << (GLINT_DYN_CTL_INTERVAL_S - ICE_ITR_GRAN_S));
1409 }
1410 
1411 /**
1412  * ice_enable_interrupt - re-enable MSI-X interrupt
1413  * @q_vector: the vector associated with the interrupt to enable
1414  *
1415  * If the VSI is down, the interrupt will not be re-enabled. Also,
1416  * when enabling the interrupt always reset the wb_on_itr to false
1417  * and trigger a software interrupt to clean out internal state.
1418  */
1419 static void ice_enable_interrupt(struct ice_q_vector *q_vector)
1420 {
1421 	struct ice_vsi *vsi = q_vector->vsi;
1422 	bool wb_en = q_vector->wb_on_itr;
1423 	u32 itr_val;
1424 
1425 	if (test_bit(ICE_DOWN, vsi->state))
1426 		return;
1427 
1428 	/* trigger an ITR delayed software interrupt when exiting busy poll, to
1429 	 * make sure to catch any pending cleanups that might have been missed
1430 	 * due to interrupt state transition. If busy poll or poll isn't
1431 	 * enabled, then don't update ITR, and just enable the interrupt.
1432 	 */
1433 	if (!wb_en) {
1434 		itr_val = ice_buildreg_itr(ICE_ITR_NONE, 0);
1435 	} else {
1436 		q_vector->wb_on_itr = false;
1437 
1438 		/* do two things here with a single write. Set up the third ITR
1439 		 * index to be used for software interrupt moderation, and then
1440 		 * trigger a software interrupt with a rate limit of 20K on
1441 		 * software interrupts, this will help avoid high interrupt
1442 		 * loads due to frequently polling and exiting polling.
1443 		 */
1444 		itr_val = ice_buildreg_itr(ICE_IDX_ITR2, ICE_ITR_20K);
1445 		itr_val |= GLINT_DYN_CTL_SWINT_TRIG_M |
1446 			   ICE_IDX_ITR2 << GLINT_DYN_CTL_SW_ITR_INDX_S |
1447 			   GLINT_DYN_CTL_SW_ITR_INDX_ENA_M;
1448 	}
1449 	wr32(&vsi->back->hw, GLINT_DYN_CTL(q_vector->reg_idx), itr_val);
1450 }
1451 
1452 /**
1453  * ice_set_wb_on_itr - set WB_ON_ITR for this q_vector
1454  * @q_vector: q_vector to set WB_ON_ITR on
1455  *
1456  * We need to tell hardware to write-back completed descriptors even when
1457  * interrupts are disabled. Descriptors will be written back on cache line
1458  * boundaries without WB_ON_ITR enabled, but if we don't enable WB_ON_ITR
1459  * descriptors may not be written back if they don't fill a cache line until
1460  * the next interrupt.
1461  *
1462  * This sets the write-back frequency to whatever was set previously for the
1463  * ITR indices. Also, set the INTENA_MSK bit to make sure hardware knows we
1464  * aren't meddling with the INTENA_M bit.
1465  */
1466 static void ice_set_wb_on_itr(struct ice_q_vector *q_vector)
1467 {
1468 	struct ice_vsi *vsi = q_vector->vsi;
1469 
1470 	/* already in wb_on_itr mode no need to change it */
1471 	if (q_vector->wb_on_itr)
1472 		return;
1473 
1474 	/* use previously set ITR values for all of the ITR indices by
1475 	 * specifying ICE_ITR_NONE, which will vary in adaptive (AIM) mode and
1476 	 * be static in non-adaptive mode (user configured)
1477 	 */
1478 	wr32(&vsi->back->hw, GLINT_DYN_CTL(q_vector->reg_idx),
1479 	     ((ICE_ITR_NONE << GLINT_DYN_CTL_ITR_INDX_S) &
1480 	      GLINT_DYN_CTL_ITR_INDX_M) | GLINT_DYN_CTL_INTENA_MSK_M |
1481 	     GLINT_DYN_CTL_WB_ON_ITR_M);
1482 
1483 	q_vector->wb_on_itr = true;
1484 }
1485 
1486 /**
1487  * ice_napi_poll - NAPI polling Rx/Tx cleanup routine
1488  * @napi: napi struct with our devices info in it
1489  * @budget: amount of work driver is allowed to do this pass, in packets
1490  *
1491  * This function will clean all queues associated with a q_vector.
1492  *
1493  * Returns the amount of work done
1494  */
1495 int ice_napi_poll(struct napi_struct *napi, int budget)
1496 {
1497 	struct ice_q_vector *q_vector =
1498 				container_of(napi, struct ice_q_vector, napi);
1499 	struct ice_tx_ring *tx_ring;
1500 	struct ice_rx_ring *rx_ring;
1501 	bool clean_complete = true;
1502 	int budget_per_ring;
1503 	int work_done = 0;
1504 
1505 	/* Since the actual Tx work is minimal, we can give the Tx a larger
1506 	 * budget and be more aggressive about cleaning up the Tx descriptors.
1507 	 */
1508 	ice_for_each_tx_ring(tx_ring, q_vector->tx) {
1509 		bool wd;
1510 
1511 		if (tx_ring->xsk_pool)
1512 			wd = ice_xmit_zc(tx_ring);
1513 		else if (ice_ring_is_xdp(tx_ring))
1514 			wd = true;
1515 		else
1516 			wd = ice_clean_tx_irq(tx_ring, budget);
1517 
1518 		if (!wd)
1519 			clean_complete = false;
1520 	}
1521 
1522 	/* Handle case where we are called by netpoll with a budget of 0 */
1523 	if (unlikely(budget <= 0))
1524 		return budget;
1525 
1526 	/* normally we have 1 Rx ring per q_vector */
1527 	if (unlikely(q_vector->num_ring_rx > 1))
1528 		/* We attempt to distribute budget to each Rx queue fairly, but
1529 		 * don't allow the budget to go below 1 because that would exit
1530 		 * polling early.
1531 		 */
1532 		budget_per_ring = max_t(int, budget / q_vector->num_ring_rx, 1);
1533 	else
1534 		/* Max of 1 Rx ring in this q_vector so give it the budget */
1535 		budget_per_ring = budget;
1536 
1537 	ice_for_each_rx_ring(rx_ring, q_vector->rx) {
1538 		int cleaned;
1539 
1540 		/* A dedicated path for zero-copy allows making a single
1541 		 * comparison in the irq context instead of many inside the
1542 		 * ice_clean_rx_irq function and makes the codebase cleaner.
1543 		 */
1544 		cleaned = rx_ring->xsk_pool ?
1545 			  ice_clean_rx_irq_zc(rx_ring, budget_per_ring) :
1546 			  ice_clean_rx_irq(rx_ring, budget_per_ring);
1547 		work_done += cleaned;
1548 		/* if we clean as many as budgeted, we must not be done */
1549 		if (cleaned >= budget_per_ring)
1550 			clean_complete = false;
1551 	}
1552 
1553 	/* If work not completed, return budget and polling will return */
1554 	if (!clean_complete) {
1555 		/* Set the writeback on ITR so partial completions of
1556 		 * cache-lines will still continue even if we're polling.
1557 		 */
1558 		ice_set_wb_on_itr(q_vector);
1559 		return budget;
1560 	}
1561 
1562 	/* Exit the polling mode, but don't re-enable interrupts if stack might
1563 	 * poll us due to busy-polling
1564 	 */
1565 	if (napi_complete_done(napi, work_done)) {
1566 		ice_net_dim(q_vector);
1567 		ice_enable_interrupt(q_vector);
1568 	} else {
1569 		ice_set_wb_on_itr(q_vector);
1570 	}
1571 
1572 	return min_t(int, work_done, budget - 1);
1573 }
1574 
1575 /**
1576  * __ice_maybe_stop_tx - 2nd level check for Tx stop conditions
1577  * @tx_ring: the ring to be checked
1578  * @size: the size buffer we want to assure is available
1579  *
1580  * Returns -EBUSY if a stop is needed, else 0
1581  */
1582 static int __ice_maybe_stop_tx(struct ice_tx_ring *tx_ring, unsigned int size)
1583 {
1584 	netif_tx_stop_queue(txring_txq(tx_ring));
1585 	/* Memory barrier before checking head and tail */
1586 	smp_mb();
1587 
1588 	/* Check again in a case another CPU has just made room available. */
1589 	if (likely(ICE_DESC_UNUSED(tx_ring) < size))
1590 		return -EBUSY;
1591 
1592 	/* A reprieve! - use start_queue because it doesn't call schedule */
1593 	netif_tx_start_queue(txring_txq(tx_ring));
1594 	++tx_ring->ring_stats->tx_stats.restart_q;
1595 	return 0;
1596 }
1597 
1598 /**
1599  * ice_maybe_stop_tx - 1st level check for Tx stop conditions
1600  * @tx_ring: the ring to be checked
1601  * @size:    the size buffer we want to assure is available
1602  *
1603  * Returns 0 if stop is not needed
1604  */
1605 static int ice_maybe_stop_tx(struct ice_tx_ring *tx_ring, unsigned int size)
1606 {
1607 	if (likely(ICE_DESC_UNUSED(tx_ring) >= size))
1608 		return 0;
1609 
1610 	return __ice_maybe_stop_tx(tx_ring, size);
1611 }
1612 
1613 /**
1614  * ice_tx_map - Build the Tx descriptor
1615  * @tx_ring: ring to send buffer on
1616  * @first: first buffer info buffer to use
1617  * @off: pointer to struct that holds offload parameters
1618  *
1619  * This function loops over the skb data pointed to by *first
1620  * and gets a physical address for each memory location and programs
1621  * it and the length into the transmit descriptor.
1622  */
1623 static void
1624 ice_tx_map(struct ice_tx_ring *tx_ring, struct ice_tx_buf *first,
1625 	   struct ice_tx_offload_params *off)
1626 {
1627 	u64 td_offset, td_tag, td_cmd;
1628 	u16 i = tx_ring->next_to_use;
1629 	unsigned int data_len, size;
1630 	struct ice_tx_desc *tx_desc;
1631 	struct ice_tx_buf *tx_buf;
1632 	struct sk_buff *skb;
1633 	skb_frag_t *frag;
1634 	dma_addr_t dma;
1635 	bool kick;
1636 
1637 	td_tag = off->td_l2tag1;
1638 	td_cmd = off->td_cmd;
1639 	td_offset = off->td_offset;
1640 	skb = first->skb;
1641 
1642 	data_len = skb->data_len;
1643 	size = skb_headlen(skb);
1644 
1645 	tx_desc = ICE_TX_DESC(tx_ring, i);
1646 
1647 	if (first->tx_flags & ICE_TX_FLAGS_HW_VLAN) {
1648 		td_cmd |= (u64)ICE_TX_DESC_CMD_IL2TAG1;
1649 		td_tag = (first->tx_flags & ICE_TX_FLAGS_VLAN_M) >>
1650 			  ICE_TX_FLAGS_VLAN_S;
1651 	}
1652 
1653 	dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
1654 
1655 	tx_buf = first;
1656 
1657 	for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
1658 		unsigned int max_data = ICE_MAX_DATA_PER_TXD_ALIGNED;
1659 
1660 		if (dma_mapping_error(tx_ring->dev, dma))
1661 			goto dma_error;
1662 
1663 		/* record length, and DMA address */
1664 		dma_unmap_len_set(tx_buf, len, size);
1665 		dma_unmap_addr_set(tx_buf, dma, dma);
1666 
1667 		/* align size to end of page */
1668 		max_data += -dma & (ICE_MAX_READ_REQ_SIZE - 1);
1669 		tx_desc->buf_addr = cpu_to_le64(dma);
1670 
1671 		/* account for data chunks larger than the hardware
1672 		 * can handle
1673 		 */
1674 		while (unlikely(size > ICE_MAX_DATA_PER_TXD)) {
1675 			tx_desc->cmd_type_offset_bsz =
1676 				ice_build_ctob(td_cmd, td_offset, max_data,
1677 					       td_tag);
1678 
1679 			tx_desc++;
1680 			i++;
1681 
1682 			if (i == tx_ring->count) {
1683 				tx_desc = ICE_TX_DESC(tx_ring, 0);
1684 				i = 0;
1685 			}
1686 
1687 			dma += max_data;
1688 			size -= max_data;
1689 
1690 			max_data = ICE_MAX_DATA_PER_TXD_ALIGNED;
1691 			tx_desc->buf_addr = cpu_to_le64(dma);
1692 		}
1693 
1694 		if (likely(!data_len))
1695 			break;
1696 
1697 		tx_desc->cmd_type_offset_bsz = ice_build_ctob(td_cmd, td_offset,
1698 							      size, td_tag);
1699 
1700 		tx_desc++;
1701 		i++;
1702 
1703 		if (i == tx_ring->count) {
1704 			tx_desc = ICE_TX_DESC(tx_ring, 0);
1705 			i = 0;
1706 		}
1707 
1708 		size = skb_frag_size(frag);
1709 		data_len -= size;
1710 
1711 		dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
1712 				       DMA_TO_DEVICE);
1713 
1714 		tx_buf = &tx_ring->tx_buf[i];
1715 	}
1716 
1717 	/* record SW timestamp if HW timestamp is not available */
1718 	skb_tx_timestamp(first->skb);
1719 
1720 	i++;
1721 	if (i == tx_ring->count)
1722 		i = 0;
1723 
1724 	/* write last descriptor with RS and EOP bits */
1725 	td_cmd |= (u64)ICE_TXD_LAST_DESC_CMD;
1726 	tx_desc->cmd_type_offset_bsz =
1727 			ice_build_ctob(td_cmd, td_offset, size, td_tag);
1728 
1729 	/* Force memory writes to complete before letting h/w know there
1730 	 * are new descriptors to fetch.
1731 	 *
1732 	 * We also use this memory barrier to make certain all of the
1733 	 * status bits have been updated before next_to_watch is written.
1734 	 */
1735 	wmb();
1736 
1737 	/* set next_to_watch value indicating a packet is present */
1738 	first->next_to_watch = tx_desc;
1739 
1740 	tx_ring->next_to_use = i;
1741 
1742 	ice_maybe_stop_tx(tx_ring, DESC_NEEDED);
1743 
1744 	/* notify HW of packet */
1745 	kick = __netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount,
1746 				      netdev_xmit_more());
1747 	if (kick)
1748 		/* notify HW of packet */
1749 		writel(i, tx_ring->tail);
1750 
1751 	return;
1752 
1753 dma_error:
1754 	/* clear DMA mappings for failed tx_buf map */
1755 	for (;;) {
1756 		tx_buf = &tx_ring->tx_buf[i];
1757 		ice_unmap_and_free_tx_buf(tx_ring, tx_buf);
1758 		if (tx_buf == first)
1759 			break;
1760 		if (i == 0)
1761 			i = tx_ring->count;
1762 		i--;
1763 	}
1764 
1765 	tx_ring->next_to_use = i;
1766 }
1767 
1768 /**
1769  * ice_tx_csum - Enable Tx checksum offloads
1770  * @first: pointer to the first descriptor
1771  * @off: pointer to struct that holds offload parameters
1772  *
1773  * Returns 0 or error (negative) if checksum offload can't happen, 1 otherwise.
1774  */
1775 static
1776 int ice_tx_csum(struct ice_tx_buf *first, struct ice_tx_offload_params *off)
1777 {
1778 	u32 l4_len = 0, l3_len = 0, l2_len = 0;
1779 	struct sk_buff *skb = first->skb;
1780 	union {
1781 		struct iphdr *v4;
1782 		struct ipv6hdr *v6;
1783 		unsigned char *hdr;
1784 	} ip;
1785 	union {
1786 		struct tcphdr *tcp;
1787 		unsigned char *hdr;
1788 	} l4;
1789 	__be16 frag_off, protocol;
1790 	unsigned char *exthdr;
1791 	u32 offset, cmd = 0;
1792 	u8 l4_proto = 0;
1793 
1794 	if (skb->ip_summed != CHECKSUM_PARTIAL)
1795 		return 0;
1796 
1797 	protocol = vlan_get_protocol(skb);
1798 
1799 	if (eth_p_mpls(protocol)) {
1800 		ip.hdr = skb_inner_network_header(skb);
1801 		l4.hdr = skb_checksum_start(skb);
1802 	} else {
1803 		ip.hdr = skb_network_header(skb);
1804 		l4.hdr = skb_transport_header(skb);
1805 	}
1806 
1807 	/* compute outer L2 header size */
1808 	l2_len = ip.hdr - skb->data;
1809 	offset = (l2_len / 2) << ICE_TX_DESC_LEN_MACLEN_S;
1810 
1811 	/* set the tx_flags to indicate the IP protocol type. this is
1812 	 * required so that checksum header computation below is accurate.
1813 	 */
1814 	if (ip.v4->version == 4)
1815 		first->tx_flags |= ICE_TX_FLAGS_IPV4;
1816 	else if (ip.v6->version == 6)
1817 		first->tx_flags |= ICE_TX_FLAGS_IPV6;
1818 
1819 	if (skb->encapsulation) {
1820 		bool gso_ena = false;
1821 		u32 tunnel = 0;
1822 
1823 		/* define outer network header type */
1824 		if (first->tx_flags & ICE_TX_FLAGS_IPV4) {
1825 			tunnel |= (first->tx_flags & ICE_TX_FLAGS_TSO) ?
1826 				  ICE_TX_CTX_EIPT_IPV4 :
1827 				  ICE_TX_CTX_EIPT_IPV4_NO_CSUM;
1828 			l4_proto = ip.v4->protocol;
1829 		} else if (first->tx_flags & ICE_TX_FLAGS_IPV6) {
1830 			int ret;
1831 
1832 			tunnel |= ICE_TX_CTX_EIPT_IPV6;
1833 			exthdr = ip.hdr + sizeof(*ip.v6);
1834 			l4_proto = ip.v6->nexthdr;
1835 			ret = ipv6_skip_exthdr(skb, exthdr - skb->data,
1836 					       &l4_proto, &frag_off);
1837 			if (ret < 0)
1838 				return -1;
1839 		}
1840 
1841 		/* define outer transport */
1842 		switch (l4_proto) {
1843 		case IPPROTO_UDP:
1844 			tunnel |= ICE_TXD_CTX_UDP_TUNNELING;
1845 			first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1846 			break;
1847 		case IPPROTO_GRE:
1848 			tunnel |= ICE_TXD_CTX_GRE_TUNNELING;
1849 			first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1850 			break;
1851 		case IPPROTO_IPIP:
1852 		case IPPROTO_IPV6:
1853 			first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1854 			l4.hdr = skb_inner_network_header(skb);
1855 			break;
1856 		default:
1857 			if (first->tx_flags & ICE_TX_FLAGS_TSO)
1858 				return -1;
1859 
1860 			skb_checksum_help(skb);
1861 			return 0;
1862 		}
1863 
1864 		/* compute outer L3 header size */
1865 		tunnel |= ((l4.hdr - ip.hdr) / 4) <<
1866 			  ICE_TXD_CTX_QW0_EIPLEN_S;
1867 
1868 		/* switch IP header pointer from outer to inner header */
1869 		ip.hdr = skb_inner_network_header(skb);
1870 
1871 		/* compute tunnel header size */
1872 		tunnel |= ((ip.hdr - l4.hdr) / 2) <<
1873 			   ICE_TXD_CTX_QW0_NATLEN_S;
1874 
1875 		gso_ena = skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL;
1876 		/* indicate if we need to offload outer UDP header */
1877 		if ((first->tx_flags & ICE_TX_FLAGS_TSO) && !gso_ena &&
1878 		    (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_TUNNEL_CSUM))
1879 			tunnel |= ICE_TXD_CTX_QW0_L4T_CS_M;
1880 
1881 		/* record tunnel offload values */
1882 		off->cd_tunnel_params |= tunnel;
1883 
1884 		/* set DTYP=1 to indicate that it's an Tx context descriptor
1885 		 * in IPsec tunnel mode with Tx offloads in Quad word 1
1886 		 */
1887 		off->cd_qw1 |= (u64)ICE_TX_DESC_DTYPE_CTX;
1888 
1889 		/* switch L4 header pointer from outer to inner */
1890 		l4.hdr = skb_inner_transport_header(skb);
1891 		l4_proto = 0;
1892 
1893 		/* reset type as we transition from outer to inner headers */
1894 		first->tx_flags &= ~(ICE_TX_FLAGS_IPV4 | ICE_TX_FLAGS_IPV6);
1895 		if (ip.v4->version == 4)
1896 			first->tx_flags |= ICE_TX_FLAGS_IPV4;
1897 		if (ip.v6->version == 6)
1898 			first->tx_flags |= ICE_TX_FLAGS_IPV6;
1899 	}
1900 
1901 	/* Enable IP checksum offloads */
1902 	if (first->tx_flags & ICE_TX_FLAGS_IPV4) {
1903 		l4_proto = ip.v4->protocol;
1904 		/* the stack computes the IP header already, the only time we
1905 		 * need the hardware to recompute it is in the case of TSO.
1906 		 */
1907 		if (first->tx_flags & ICE_TX_FLAGS_TSO)
1908 			cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM;
1909 		else
1910 			cmd |= ICE_TX_DESC_CMD_IIPT_IPV4;
1911 
1912 	} else if (first->tx_flags & ICE_TX_FLAGS_IPV6) {
1913 		cmd |= ICE_TX_DESC_CMD_IIPT_IPV6;
1914 		exthdr = ip.hdr + sizeof(*ip.v6);
1915 		l4_proto = ip.v6->nexthdr;
1916 		if (l4.hdr != exthdr)
1917 			ipv6_skip_exthdr(skb, exthdr - skb->data, &l4_proto,
1918 					 &frag_off);
1919 	} else {
1920 		return -1;
1921 	}
1922 
1923 	/* compute inner L3 header size */
1924 	l3_len = l4.hdr - ip.hdr;
1925 	offset |= (l3_len / 4) << ICE_TX_DESC_LEN_IPLEN_S;
1926 
1927 	/* Enable L4 checksum offloads */
1928 	switch (l4_proto) {
1929 	case IPPROTO_TCP:
1930 		/* enable checksum offloads */
1931 		cmd |= ICE_TX_DESC_CMD_L4T_EOFT_TCP;
1932 		l4_len = l4.tcp->doff;
1933 		offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1934 		break;
1935 	case IPPROTO_UDP:
1936 		/* enable UDP checksum offload */
1937 		cmd |= ICE_TX_DESC_CMD_L4T_EOFT_UDP;
1938 		l4_len = (sizeof(struct udphdr) >> 2);
1939 		offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1940 		break;
1941 	case IPPROTO_SCTP:
1942 		/* enable SCTP checksum offload */
1943 		cmd |= ICE_TX_DESC_CMD_L4T_EOFT_SCTP;
1944 		l4_len = sizeof(struct sctphdr) >> 2;
1945 		offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1946 		break;
1947 
1948 	default:
1949 		if (first->tx_flags & ICE_TX_FLAGS_TSO)
1950 			return -1;
1951 		skb_checksum_help(skb);
1952 		return 0;
1953 	}
1954 
1955 	off->td_cmd |= cmd;
1956 	off->td_offset |= offset;
1957 	return 1;
1958 }
1959 
1960 /**
1961  * ice_tx_prepare_vlan_flags - prepare generic Tx VLAN tagging flags for HW
1962  * @tx_ring: ring to send buffer on
1963  * @first: pointer to struct ice_tx_buf
1964  *
1965  * Checks the skb and set up correspondingly several generic transmit flags
1966  * related to VLAN tagging for the HW, such as VLAN, DCB, etc.
1967  */
1968 static void
1969 ice_tx_prepare_vlan_flags(struct ice_tx_ring *tx_ring, struct ice_tx_buf *first)
1970 {
1971 	struct sk_buff *skb = first->skb;
1972 
1973 	/* nothing left to do, software offloaded VLAN */
1974 	if (!skb_vlan_tag_present(skb) && eth_type_vlan(skb->protocol))
1975 		return;
1976 
1977 	/* the VLAN ethertype/tpid is determined by VSI configuration and netdev
1978 	 * feature flags, which the driver only allows either 802.1Q or 802.1ad
1979 	 * VLAN offloads exclusively so we only care about the VLAN ID here
1980 	 */
1981 	if (skb_vlan_tag_present(skb)) {
1982 		first->tx_flags |= skb_vlan_tag_get(skb) << ICE_TX_FLAGS_VLAN_S;
1983 		if (tx_ring->flags & ICE_TX_FLAGS_RING_VLAN_L2TAG2)
1984 			first->tx_flags |= ICE_TX_FLAGS_HW_OUTER_SINGLE_VLAN;
1985 		else
1986 			first->tx_flags |= ICE_TX_FLAGS_HW_VLAN;
1987 	}
1988 
1989 	ice_tx_prepare_vlan_flags_dcb(tx_ring, first);
1990 }
1991 
1992 /**
1993  * ice_tso - computes mss and TSO length to prepare for TSO
1994  * @first: pointer to struct ice_tx_buf
1995  * @off: pointer to struct that holds offload parameters
1996  *
1997  * Returns 0 or error (negative) if TSO can't happen, 1 otherwise.
1998  */
1999 static
2000 int ice_tso(struct ice_tx_buf *first, struct ice_tx_offload_params *off)
2001 {
2002 	struct sk_buff *skb = first->skb;
2003 	union {
2004 		struct iphdr *v4;
2005 		struct ipv6hdr *v6;
2006 		unsigned char *hdr;
2007 	} ip;
2008 	union {
2009 		struct tcphdr *tcp;
2010 		struct udphdr *udp;
2011 		unsigned char *hdr;
2012 	} l4;
2013 	u64 cd_mss, cd_tso_len;
2014 	__be16 protocol;
2015 	u32 paylen;
2016 	u8 l4_start;
2017 	int err;
2018 
2019 	if (skb->ip_summed != CHECKSUM_PARTIAL)
2020 		return 0;
2021 
2022 	if (!skb_is_gso(skb))
2023 		return 0;
2024 
2025 	err = skb_cow_head(skb, 0);
2026 	if (err < 0)
2027 		return err;
2028 
2029 	protocol = vlan_get_protocol(skb);
2030 
2031 	if (eth_p_mpls(protocol))
2032 		ip.hdr = skb_inner_network_header(skb);
2033 	else
2034 		ip.hdr = skb_network_header(skb);
2035 	l4.hdr = skb_checksum_start(skb);
2036 
2037 	/* initialize outer IP header fields */
2038 	if (ip.v4->version == 4) {
2039 		ip.v4->tot_len = 0;
2040 		ip.v4->check = 0;
2041 	} else {
2042 		ip.v6->payload_len = 0;
2043 	}
2044 
2045 	if (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE |
2046 					 SKB_GSO_GRE_CSUM |
2047 					 SKB_GSO_IPXIP4 |
2048 					 SKB_GSO_IPXIP6 |
2049 					 SKB_GSO_UDP_TUNNEL |
2050 					 SKB_GSO_UDP_TUNNEL_CSUM)) {
2051 		if (!(skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL) &&
2052 		    (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_TUNNEL_CSUM)) {
2053 			l4.udp->len = 0;
2054 
2055 			/* determine offset of outer transport header */
2056 			l4_start = (u8)(l4.hdr - skb->data);
2057 
2058 			/* remove payload length from outer checksum */
2059 			paylen = skb->len - l4_start;
2060 			csum_replace_by_diff(&l4.udp->check,
2061 					     (__force __wsum)htonl(paylen));
2062 		}
2063 
2064 		/* reset pointers to inner headers */
2065 		ip.hdr = skb_inner_network_header(skb);
2066 		l4.hdr = skb_inner_transport_header(skb);
2067 
2068 		/* initialize inner IP header fields */
2069 		if (ip.v4->version == 4) {
2070 			ip.v4->tot_len = 0;
2071 			ip.v4->check = 0;
2072 		} else {
2073 			ip.v6->payload_len = 0;
2074 		}
2075 	}
2076 
2077 	/* determine offset of transport header */
2078 	l4_start = (u8)(l4.hdr - skb->data);
2079 
2080 	/* remove payload length from checksum */
2081 	paylen = skb->len - l4_start;
2082 
2083 	if (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4) {
2084 		csum_replace_by_diff(&l4.udp->check,
2085 				     (__force __wsum)htonl(paylen));
2086 		/* compute length of UDP segmentation header */
2087 		off->header_len = (u8)sizeof(l4.udp) + l4_start;
2088 	} else {
2089 		csum_replace_by_diff(&l4.tcp->check,
2090 				     (__force __wsum)htonl(paylen));
2091 		/* compute length of TCP segmentation header */
2092 		off->header_len = (u8)((l4.tcp->doff * 4) + l4_start);
2093 	}
2094 
2095 	/* update gso_segs and bytecount */
2096 	first->gso_segs = skb_shinfo(skb)->gso_segs;
2097 	first->bytecount += (first->gso_segs - 1) * off->header_len;
2098 
2099 	cd_tso_len = skb->len - off->header_len;
2100 	cd_mss = skb_shinfo(skb)->gso_size;
2101 
2102 	/* record cdesc_qw1 with TSO parameters */
2103 	off->cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2104 			     (ICE_TX_CTX_DESC_TSO << ICE_TXD_CTX_QW1_CMD_S) |
2105 			     (cd_tso_len << ICE_TXD_CTX_QW1_TSO_LEN_S) |
2106 			     (cd_mss << ICE_TXD_CTX_QW1_MSS_S));
2107 	first->tx_flags |= ICE_TX_FLAGS_TSO;
2108 	return 1;
2109 }
2110 
2111 /**
2112  * ice_txd_use_count  - estimate the number of descriptors needed for Tx
2113  * @size: transmit request size in bytes
2114  *
2115  * Due to hardware alignment restrictions (4K alignment), we need to
2116  * assume that we can have no more than 12K of data per descriptor, even
2117  * though each descriptor can take up to 16K - 1 bytes of aligned memory.
2118  * Thus, we need to divide by 12K. But division is slow! Instead,
2119  * we decompose the operation into shifts and one relatively cheap
2120  * multiply operation.
2121  *
2122  * To divide by 12K, we first divide by 4K, then divide by 3:
2123  *     To divide by 4K, shift right by 12 bits
2124  *     To divide by 3, multiply by 85, then divide by 256
2125  *     (Divide by 256 is done by shifting right by 8 bits)
2126  * Finally, we add one to round up. Because 256 isn't an exact multiple of
2127  * 3, we'll underestimate near each multiple of 12K. This is actually more
2128  * accurate as we have 4K - 1 of wiggle room that we can fit into the last
2129  * segment. For our purposes this is accurate out to 1M which is orders of
2130  * magnitude greater than our largest possible GSO size.
2131  *
2132  * This would then be implemented as:
2133  *     return (((size >> 12) * 85) >> 8) + ICE_DESCS_FOR_SKB_DATA_PTR;
2134  *
2135  * Since multiplication and division are commutative, we can reorder
2136  * operations into:
2137  *     return ((size * 85) >> 20) + ICE_DESCS_FOR_SKB_DATA_PTR;
2138  */
2139 static unsigned int ice_txd_use_count(unsigned int size)
2140 {
2141 	return ((size * 85) >> 20) + ICE_DESCS_FOR_SKB_DATA_PTR;
2142 }
2143 
2144 /**
2145  * ice_xmit_desc_count - calculate number of Tx descriptors needed
2146  * @skb: send buffer
2147  *
2148  * Returns number of data descriptors needed for this skb.
2149  */
2150 static unsigned int ice_xmit_desc_count(struct sk_buff *skb)
2151 {
2152 	const skb_frag_t *frag = &skb_shinfo(skb)->frags[0];
2153 	unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2154 	unsigned int count = 0, size = skb_headlen(skb);
2155 
2156 	for (;;) {
2157 		count += ice_txd_use_count(size);
2158 
2159 		if (!nr_frags--)
2160 			break;
2161 
2162 		size = skb_frag_size(frag++);
2163 	}
2164 
2165 	return count;
2166 }
2167 
2168 /**
2169  * __ice_chk_linearize - Check if there are more than 8 buffers per packet
2170  * @skb: send buffer
2171  *
2172  * Note: This HW can't DMA more than 8 buffers to build a packet on the wire
2173  * and so we need to figure out the cases where we need to linearize the skb.
2174  *
2175  * For TSO we need to count the TSO header and segment payload separately.
2176  * As such we need to check cases where we have 7 fragments or more as we
2177  * can potentially require 9 DMA transactions, 1 for the TSO header, 1 for
2178  * the segment payload in the first descriptor, and another 7 for the
2179  * fragments.
2180  */
2181 static bool __ice_chk_linearize(struct sk_buff *skb)
2182 {
2183 	const skb_frag_t *frag, *stale;
2184 	int nr_frags, sum;
2185 
2186 	/* no need to check if number of frags is less than 7 */
2187 	nr_frags = skb_shinfo(skb)->nr_frags;
2188 	if (nr_frags < (ICE_MAX_BUF_TXD - 1))
2189 		return false;
2190 
2191 	/* We need to walk through the list and validate that each group
2192 	 * of 6 fragments totals at least gso_size.
2193 	 */
2194 	nr_frags -= ICE_MAX_BUF_TXD - 2;
2195 	frag = &skb_shinfo(skb)->frags[0];
2196 
2197 	/* Initialize size to the negative value of gso_size minus 1. We
2198 	 * use this as the worst case scenario in which the frag ahead
2199 	 * of us only provides one byte which is why we are limited to 6
2200 	 * descriptors for a single transmit as the header and previous
2201 	 * fragment are already consuming 2 descriptors.
2202 	 */
2203 	sum = 1 - skb_shinfo(skb)->gso_size;
2204 
2205 	/* Add size of frags 0 through 4 to create our initial sum */
2206 	sum += skb_frag_size(frag++);
2207 	sum += skb_frag_size(frag++);
2208 	sum += skb_frag_size(frag++);
2209 	sum += skb_frag_size(frag++);
2210 	sum += skb_frag_size(frag++);
2211 
2212 	/* Walk through fragments adding latest fragment, testing it, and
2213 	 * then removing stale fragments from the sum.
2214 	 */
2215 	for (stale = &skb_shinfo(skb)->frags[0];; stale++) {
2216 		int stale_size = skb_frag_size(stale);
2217 
2218 		sum += skb_frag_size(frag++);
2219 
2220 		/* The stale fragment may present us with a smaller
2221 		 * descriptor than the actual fragment size. To account
2222 		 * for that we need to remove all the data on the front and
2223 		 * figure out what the remainder would be in the last
2224 		 * descriptor associated with the fragment.
2225 		 */
2226 		if (stale_size > ICE_MAX_DATA_PER_TXD) {
2227 			int align_pad = -(skb_frag_off(stale)) &
2228 					(ICE_MAX_READ_REQ_SIZE - 1);
2229 
2230 			sum -= align_pad;
2231 			stale_size -= align_pad;
2232 
2233 			do {
2234 				sum -= ICE_MAX_DATA_PER_TXD_ALIGNED;
2235 				stale_size -= ICE_MAX_DATA_PER_TXD_ALIGNED;
2236 			} while (stale_size > ICE_MAX_DATA_PER_TXD);
2237 		}
2238 
2239 		/* if sum is negative we failed to make sufficient progress */
2240 		if (sum < 0)
2241 			return true;
2242 
2243 		if (!nr_frags--)
2244 			break;
2245 
2246 		sum -= stale_size;
2247 	}
2248 
2249 	return false;
2250 }
2251 
2252 /**
2253  * ice_chk_linearize - Check if there are more than 8 fragments per packet
2254  * @skb:      send buffer
2255  * @count:    number of buffers used
2256  *
2257  * Note: Our HW can't scatter-gather more than 8 fragments to build
2258  * a packet on the wire and so we need to figure out the cases where we
2259  * need to linearize the skb.
2260  */
2261 static bool ice_chk_linearize(struct sk_buff *skb, unsigned int count)
2262 {
2263 	/* Both TSO and single send will work if count is less than 8 */
2264 	if (likely(count < ICE_MAX_BUF_TXD))
2265 		return false;
2266 
2267 	if (skb_is_gso(skb))
2268 		return __ice_chk_linearize(skb);
2269 
2270 	/* we can support up to 8 data buffers for a single send */
2271 	return count != ICE_MAX_BUF_TXD;
2272 }
2273 
2274 /**
2275  * ice_tstamp - set up context descriptor for hardware timestamp
2276  * @tx_ring: pointer to the Tx ring to send buffer on
2277  * @skb: pointer to the SKB we're sending
2278  * @first: Tx buffer
2279  * @off: Tx offload parameters
2280  */
2281 static void
2282 ice_tstamp(struct ice_tx_ring *tx_ring, struct sk_buff *skb,
2283 	   struct ice_tx_buf *first, struct ice_tx_offload_params *off)
2284 {
2285 	s8 idx;
2286 
2287 	/* only timestamp the outbound packet if the user has requested it */
2288 	if (likely(!(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)))
2289 		return;
2290 
2291 	if (!tx_ring->ptp_tx)
2292 		return;
2293 
2294 	/* Tx timestamps cannot be sampled when doing TSO */
2295 	if (first->tx_flags & ICE_TX_FLAGS_TSO)
2296 		return;
2297 
2298 	/* Grab an open timestamp slot */
2299 	idx = ice_ptp_request_ts(tx_ring->tx_tstamps, skb);
2300 	if (idx < 0) {
2301 		tx_ring->vsi->back->ptp.tx_hwtstamp_skipped++;
2302 		return;
2303 	}
2304 
2305 	off->cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2306 			     (ICE_TX_CTX_DESC_TSYN << ICE_TXD_CTX_QW1_CMD_S) |
2307 			     ((u64)idx << ICE_TXD_CTX_QW1_TSO_LEN_S));
2308 	first->tx_flags |= ICE_TX_FLAGS_TSYN;
2309 }
2310 
2311 /**
2312  * ice_xmit_frame_ring - Sends buffer on Tx ring
2313  * @skb: send buffer
2314  * @tx_ring: ring to send buffer on
2315  *
2316  * Returns NETDEV_TX_OK if sent, else an error code
2317  */
2318 static netdev_tx_t
2319 ice_xmit_frame_ring(struct sk_buff *skb, struct ice_tx_ring *tx_ring)
2320 {
2321 	struct ice_tx_offload_params offload = { 0 };
2322 	struct ice_vsi *vsi = tx_ring->vsi;
2323 	struct ice_tx_buf *first;
2324 	struct ethhdr *eth;
2325 	unsigned int count;
2326 	int tso, csum;
2327 
2328 	ice_trace(xmit_frame_ring, tx_ring, skb);
2329 
2330 	if (unlikely(ipv6_hopopt_jumbo_remove(skb)))
2331 		goto out_drop;
2332 
2333 	count = ice_xmit_desc_count(skb);
2334 	if (ice_chk_linearize(skb, count)) {
2335 		if (__skb_linearize(skb))
2336 			goto out_drop;
2337 		count = ice_txd_use_count(skb->len);
2338 		tx_ring->ring_stats->tx_stats.tx_linearize++;
2339 	}
2340 
2341 	/* need: 1 descriptor per page * PAGE_SIZE/ICE_MAX_DATA_PER_TXD,
2342 	 *       + 1 desc for skb_head_len/ICE_MAX_DATA_PER_TXD,
2343 	 *       + 4 desc gap to avoid the cache line where head is,
2344 	 *       + 1 desc for context descriptor,
2345 	 * otherwise try next time
2346 	 */
2347 	if (ice_maybe_stop_tx(tx_ring, count + ICE_DESCS_PER_CACHE_LINE +
2348 			      ICE_DESCS_FOR_CTX_DESC)) {
2349 		tx_ring->ring_stats->tx_stats.tx_busy++;
2350 		return NETDEV_TX_BUSY;
2351 	}
2352 
2353 	/* prefetch for bql data which is infrequently used */
2354 	netdev_txq_bql_enqueue_prefetchw(txring_txq(tx_ring));
2355 
2356 	offload.tx_ring = tx_ring;
2357 
2358 	/* record the location of the first descriptor for this packet */
2359 	first = &tx_ring->tx_buf[tx_ring->next_to_use];
2360 	first->skb = skb;
2361 	first->bytecount = max_t(unsigned int, skb->len, ETH_ZLEN);
2362 	first->gso_segs = 1;
2363 	first->tx_flags = 0;
2364 
2365 	/* prepare the VLAN tagging flags for Tx */
2366 	ice_tx_prepare_vlan_flags(tx_ring, first);
2367 	if (first->tx_flags & ICE_TX_FLAGS_HW_OUTER_SINGLE_VLAN) {
2368 		offload.cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2369 					(ICE_TX_CTX_DESC_IL2TAG2 <<
2370 					ICE_TXD_CTX_QW1_CMD_S));
2371 		offload.cd_l2tag2 = (first->tx_flags & ICE_TX_FLAGS_VLAN_M) >>
2372 			ICE_TX_FLAGS_VLAN_S;
2373 	}
2374 
2375 	/* set up TSO offload */
2376 	tso = ice_tso(first, &offload);
2377 	if (tso < 0)
2378 		goto out_drop;
2379 
2380 	/* always set up Tx checksum offload */
2381 	csum = ice_tx_csum(first, &offload);
2382 	if (csum < 0)
2383 		goto out_drop;
2384 
2385 	/* allow CONTROL frames egress from main VSI if FW LLDP disabled */
2386 	eth = (struct ethhdr *)skb_mac_header(skb);
2387 	if (unlikely((skb->priority == TC_PRIO_CONTROL ||
2388 		      eth->h_proto == htons(ETH_P_LLDP)) &&
2389 		     vsi->type == ICE_VSI_PF &&
2390 		     vsi->port_info->qos_cfg.is_sw_lldp))
2391 		offload.cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2392 					ICE_TX_CTX_DESC_SWTCH_UPLINK <<
2393 					ICE_TXD_CTX_QW1_CMD_S);
2394 
2395 	ice_tstamp(tx_ring, skb, first, &offload);
2396 	if (ice_is_switchdev_running(vsi->back))
2397 		ice_eswitch_set_target_vsi(skb, &offload);
2398 
2399 	if (offload.cd_qw1 & ICE_TX_DESC_DTYPE_CTX) {
2400 		struct ice_tx_ctx_desc *cdesc;
2401 		u16 i = tx_ring->next_to_use;
2402 
2403 		/* grab the next descriptor */
2404 		cdesc = ICE_TX_CTX_DESC(tx_ring, i);
2405 		i++;
2406 		tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
2407 
2408 		/* setup context descriptor */
2409 		cdesc->tunneling_params = cpu_to_le32(offload.cd_tunnel_params);
2410 		cdesc->l2tag2 = cpu_to_le16(offload.cd_l2tag2);
2411 		cdesc->rsvd = cpu_to_le16(0);
2412 		cdesc->qw1 = cpu_to_le64(offload.cd_qw1);
2413 	}
2414 
2415 	ice_tx_map(tx_ring, first, &offload);
2416 	return NETDEV_TX_OK;
2417 
2418 out_drop:
2419 	ice_trace(xmit_frame_ring_drop, tx_ring, skb);
2420 	dev_kfree_skb_any(skb);
2421 	return NETDEV_TX_OK;
2422 }
2423 
2424 /**
2425  * ice_start_xmit - Selects the correct VSI and Tx queue to send buffer
2426  * @skb: send buffer
2427  * @netdev: network interface device structure
2428  *
2429  * Returns NETDEV_TX_OK if sent, else an error code
2430  */
2431 netdev_tx_t ice_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2432 {
2433 	struct ice_netdev_priv *np = netdev_priv(netdev);
2434 	struct ice_vsi *vsi = np->vsi;
2435 	struct ice_tx_ring *tx_ring;
2436 
2437 	tx_ring = vsi->tx_rings[skb->queue_mapping];
2438 
2439 	/* hardware can't handle really short frames, hardware padding works
2440 	 * beyond this point
2441 	 */
2442 	if (skb_put_padto(skb, ICE_MIN_TX_LEN))
2443 		return NETDEV_TX_OK;
2444 
2445 	return ice_xmit_frame_ring(skb, tx_ring);
2446 }
2447 
2448 /**
2449  * ice_get_dscp_up - return the UP/TC value for a SKB
2450  * @dcbcfg: DCB config that contains DSCP to UP/TC mapping
2451  * @skb: SKB to query for info to determine UP/TC
2452  *
2453  * This function is to only be called when the PF is in L3 DSCP PFC mode
2454  */
2455 static u8 ice_get_dscp_up(struct ice_dcbx_cfg *dcbcfg, struct sk_buff *skb)
2456 {
2457 	u8 dscp = 0;
2458 
2459 	if (skb->protocol == htons(ETH_P_IP))
2460 		dscp = ipv4_get_dsfield(ip_hdr(skb)) >> 2;
2461 	else if (skb->protocol == htons(ETH_P_IPV6))
2462 		dscp = ipv6_get_dsfield(ipv6_hdr(skb)) >> 2;
2463 
2464 	return dcbcfg->dscp_map[dscp];
2465 }
2466 
2467 u16
2468 ice_select_queue(struct net_device *netdev, struct sk_buff *skb,
2469 		 struct net_device *sb_dev)
2470 {
2471 	struct ice_pf *pf = ice_netdev_to_pf(netdev);
2472 	struct ice_dcbx_cfg *dcbcfg;
2473 
2474 	dcbcfg = &pf->hw.port_info->qos_cfg.local_dcbx_cfg;
2475 	if (dcbcfg->pfc_mode == ICE_QOS_MODE_DSCP)
2476 		skb->priority = ice_get_dscp_up(dcbcfg, skb);
2477 
2478 	return netdev_pick_tx(netdev, skb, sb_dev);
2479 }
2480 
2481 /**
2482  * ice_clean_ctrl_tx_irq - interrupt handler for flow director Tx queue
2483  * @tx_ring: tx_ring to clean
2484  */
2485 void ice_clean_ctrl_tx_irq(struct ice_tx_ring *tx_ring)
2486 {
2487 	struct ice_vsi *vsi = tx_ring->vsi;
2488 	s16 i = tx_ring->next_to_clean;
2489 	int budget = ICE_DFLT_IRQ_WORK;
2490 	struct ice_tx_desc *tx_desc;
2491 	struct ice_tx_buf *tx_buf;
2492 
2493 	tx_buf = &tx_ring->tx_buf[i];
2494 	tx_desc = ICE_TX_DESC(tx_ring, i);
2495 	i -= tx_ring->count;
2496 
2497 	do {
2498 		struct ice_tx_desc *eop_desc = tx_buf->next_to_watch;
2499 
2500 		/* if next_to_watch is not set then there is no pending work */
2501 		if (!eop_desc)
2502 			break;
2503 
2504 		/* prevent any other reads prior to eop_desc */
2505 		smp_rmb();
2506 
2507 		/* if the descriptor isn't done, no work to do */
2508 		if (!(eop_desc->cmd_type_offset_bsz &
2509 		      cpu_to_le64(ICE_TX_DESC_DTYPE_DESC_DONE)))
2510 			break;
2511 
2512 		/* clear next_to_watch to prevent false hangs */
2513 		tx_buf->next_to_watch = NULL;
2514 		tx_desc->buf_addr = 0;
2515 		tx_desc->cmd_type_offset_bsz = 0;
2516 
2517 		/* move past filter desc */
2518 		tx_buf++;
2519 		tx_desc++;
2520 		i++;
2521 		if (unlikely(!i)) {
2522 			i -= tx_ring->count;
2523 			tx_buf = tx_ring->tx_buf;
2524 			tx_desc = ICE_TX_DESC(tx_ring, 0);
2525 		}
2526 
2527 		/* unmap the data header */
2528 		if (dma_unmap_len(tx_buf, len))
2529 			dma_unmap_single(tx_ring->dev,
2530 					 dma_unmap_addr(tx_buf, dma),
2531 					 dma_unmap_len(tx_buf, len),
2532 					 DMA_TO_DEVICE);
2533 		if (tx_buf->tx_flags & ICE_TX_FLAGS_DUMMY_PKT)
2534 			devm_kfree(tx_ring->dev, tx_buf->raw_buf);
2535 
2536 		/* clear next_to_watch to prevent false hangs */
2537 		tx_buf->raw_buf = NULL;
2538 		tx_buf->tx_flags = 0;
2539 		tx_buf->next_to_watch = NULL;
2540 		dma_unmap_len_set(tx_buf, len, 0);
2541 		tx_desc->buf_addr = 0;
2542 		tx_desc->cmd_type_offset_bsz = 0;
2543 
2544 		/* move past eop_desc for start of next FD desc */
2545 		tx_buf++;
2546 		tx_desc++;
2547 		i++;
2548 		if (unlikely(!i)) {
2549 			i -= tx_ring->count;
2550 			tx_buf = tx_ring->tx_buf;
2551 			tx_desc = ICE_TX_DESC(tx_ring, 0);
2552 		}
2553 
2554 		budget--;
2555 	} while (likely(budget));
2556 
2557 	i += tx_ring->count;
2558 	tx_ring->next_to_clean = i;
2559 
2560 	/* re-enable interrupt if needed */
2561 	ice_irq_dynamic_ena(&vsi->back->hw, vsi, vsi->q_vectors[0]);
2562 }
2563