1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright (c) 2018, Intel Corporation. */ 3 4 #include "ice_sched.h" 5 6 /** 7 * ice_sched_add_root_node - Insert the Tx scheduler root node in SW DB 8 * @pi: port information structure 9 * @info: Scheduler element information from firmware 10 * 11 * This function inserts the root node of the scheduling tree topology 12 * to the SW DB. 13 */ 14 static enum ice_status 15 ice_sched_add_root_node(struct ice_port_info *pi, 16 struct ice_aqc_txsched_elem_data *info) 17 { 18 struct ice_sched_node *root; 19 struct ice_hw *hw; 20 21 if (!pi) 22 return ICE_ERR_PARAM; 23 24 hw = pi->hw; 25 26 root = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*root), GFP_KERNEL); 27 if (!root) 28 return ICE_ERR_NO_MEMORY; 29 30 /* coverity[suspicious_sizeof] */ 31 root->children = devm_kcalloc(ice_hw_to_dev(hw), hw->max_children[0], 32 sizeof(*root), GFP_KERNEL); 33 if (!root->children) { 34 devm_kfree(ice_hw_to_dev(hw), root); 35 return ICE_ERR_NO_MEMORY; 36 } 37 38 memcpy(&root->info, info, sizeof(*info)); 39 pi->root = root; 40 return 0; 41 } 42 43 /** 44 * ice_sched_find_node_by_teid - Find the Tx scheduler node in SW DB 45 * @start_node: pointer to the starting ice_sched_node struct in a sub-tree 46 * @teid: node TEID to search 47 * 48 * This function searches for a node matching the TEID in the scheduling tree 49 * from the SW DB. The search is recursive and is restricted by the number of 50 * layers it has searched through; stopping at the max supported layer. 51 * 52 * This function needs to be called when holding the port_info->sched_lock 53 */ 54 struct ice_sched_node * 55 ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid) 56 { 57 u16 i; 58 59 /* The TEID is same as that of the start_node */ 60 if (ICE_TXSCHED_GET_NODE_TEID(start_node) == teid) 61 return start_node; 62 63 /* The node has no children or is at the max layer */ 64 if (!start_node->num_children || 65 start_node->tx_sched_layer >= ICE_AQC_TOPO_MAX_LEVEL_NUM || 66 start_node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF) 67 return NULL; 68 69 /* Check if TEID matches to any of the children nodes */ 70 for (i = 0; i < start_node->num_children; i++) 71 if (ICE_TXSCHED_GET_NODE_TEID(start_node->children[i]) == teid) 72 return start_node->children[i]; 73 74 /* Search within each child's sub-tree */ 75 for (i = 0; i < start_node->num_children; i++) { 76 struct ice_sched_node *tmp; 77 78 tmp = ice_sched_find_node_by_teid(start_node->children[i], 79 teid); 80 if (tmp) 81 return tmp; 82 } 83 84 return NULL; 85 } 86 87 /** 88 * ice_aqc_send_sched_elem_cmd - send scheduling elements cmd 89 * @hw: pointer to the HW struct 90 * @cmd_opc: cmd opcode 91 * @elems_req: number of elements to request 92 * @buf: pointer to buffer 93 * @buf_size: buffer size in bytes 94 * @elems_resp: returns total number of elements response 95 * @cd: pointer to command details structure or NULL 96 * 97 * This function sends a scheduling elements cmd (cmd_opc) 98 */ 99 static enum ice_status 100 ice_aqc_send_sched_elem_cmd(struct ice_hw *hw, enum ice_adminq_opc cmd_opc, 101 u16 elems_req, void *buf, u16 buf_size, 102 u16 *elems_resp, struct ice_sq_cd *cd) 103 { 104 struct ice_aqc_sched_elem_cmd *cmd; 105 struct ice_aq_desc desc; 106 enum ice_status status; 107 108 cmd = &desc.params.sched_elem_cmd; 109 ice_fill_dflt_direct_cmd_desc(&desc, cmd_opc); 110 cmd->num_elem_req = cpu_to_le16(elems_req); 111 desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD); 112 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd); 113 if (!status && elems_resp) 114 *elems_resp = le16_to_cpu(cmd->num_elem_resp); 115 116 return status; 117 } 118 119 /** 120 * ice_aq_query_sched_elems - query scheduler elements 121 * @hw: pointer to the HW struct 122 * @elems_req: number of elements to query 123 * @buf: pointer to buffer 124 * @buf_size: buffer size in bytes 125 * @elems_ret: returns total number of elements returned 126 * @cd: pointer to command details structure or NULL 127 * 128 * Query scheduling elements (0x0404) 129 */ 130 enum ice_status 131 ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req, 132 struct ice_aqc_txsched_elem_data *buf, u16 buf_size, 133 u16 *elems_ret, struct ice_sq_cd *cd) 134 { 135 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_get_sched_elems, 136 elems_req, (void *)buf, buf_size, 137 elems_ret, cd); 138 } 139 140 /** 141 * ice_sched_add_node - Insert the Tx scheduler node in SW DB 142 * @pi: port information structure 143 * @layer: Scheduler layer of the node 144 * @info: Scheduler element information from firmware 145 * 146 * This function inserts a scheduler node to the SW DB. 147 */ 148 enum ice_status 149 ice_sched_add_node(struct ice_port_info *pi, u8 layer, 150 struct ice_aqc_txsched_elem_data *info) 151 { 152 struct ice_aqc_txsched_elem_data elem; 153 struct ice_sched_node *parent; 154 struct ice_sched_node *node; 155 enum ice_status status; 156 struct ice_hw *hw; 157 158 if (!pi) 159 return ICE_ERR_PARAM; 160 161 hw = pi->hw; 162 163 /* A valid parent node should be there */ 164 parent = ice_sched_find_node_by_teid(pi->root, 165 le32_to_cpu(info->parent_teid)); 166 if (!parent) { 167 ice_debug(hw, ICE_DBG_SCHED, "Parent Node not found for parent_teid=0x%x\n", 168 le32_to_cpu(info->parent_teid)); 169 return ICE_ERR_PARAM; 170 } 171 172 /* query the current node information from FW before adding it 173 * to the SW DB 174 */ 175 status = ice_sched_query_elem(hw, le32_to_cpu(info->node_teid), &elem); 176 if (status) 177 return status; 178 179 node = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*node), GFP_KERNEL); 180 if (!node) 181 return ICE_ERR_NO_MEMORY; 182 if (hw->max_children[layer]) { 183 /* coverity[suspicious_sizeof] */ 184 node->children = devm_kcalloc(ice_hw_to_dev(hw), 185 hw->max_children[layer], 186 sizeof(*node), GFP_KERNEL); 187 if (!node->children) { 188 devm_kfree(ice_hw_to_dev(hw), node); 189 return ICE_ERR_NO_MEMORY; 190 } 191 } 192 193 node->in_use = true; 194 node->parent = parent; 195 node->tx_sched_layer = layer; 196 parent->children[parent->num_children++] = node; 197 node->info = elem; 198 return 0; 199 } 200 201 /** 202 * ice_aq_delete_sched_elems - delete scheduler elements 203 * @hw: pointer to the HW struct 204 * @grps_req: number of groups to delete 205 * @buf: pointer to buffer 206 * @buf_size: buffer size in bytes 207 * @grps_del: returns total number of elements deleted 208 * @cd: pointer to command details structure or NULL 209 * 210 * Delete scheduling elements (0x040F) 211 */ 212 static enum ice_status 213 ice_aq_delete_sched_elems(struct ice_hw *hw, u16 grps_req, 214 struct ice_aqc_delete_elem *buf, u16 buf_size, 215 u16 *grps_del, struct ice_sq_cd *cd) 216 { 217 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_delete_sched_elems, 218 grps_req, (void *)buf, buf_size, 219 grps_del, cd); 220 } 221 222 /** 223 * ice_sched_remove_elems - remove nodes from HW 224 * @hw: pointer to the HW struct 225 * @parent: pointer to the parent node 226 * @num_nodes: number of nodes 227 * @node_teids: array of node teids to be deleted 228 * 229 * This function remove nodes from HW 230 */ 231 static enum ice_status 232 ice_sched_remove_elems(struct ice_hw *hw, struct ice_sched_node *parent, 233 u16 num_nodes, u32 *node_teids) 234 { 235 struct ice_aqc_delete_elem *buf; 236 u16 i, num_groups_removed = 0; 237 enum ice_status status; 238 u16 buf_size; 239 240 buf_size = struct_size(buf, teid, num_nodes); 241 buf = devm_kzalloc(ice_hw_to_dev(hw), buf_size, GFP_KERNEL); 242 if (!buf) 243 return ICE_ERR_NO_MEMORY; 244 245 buf->hdr.parent_teid = parent->info.node_teid; 246 buf->hdr.num_elems = cpu_to_le16(num_nodes); 247 for (i = 0; i < num_nodes; i++) 248 buf->teid[i] = cpu_to_le32(node_teids[i]); 249 250 status = ice_aq_delete_sched_elems(hw, 1, buf, buf_size, 251 &num_groups_removed, NULL); 252 if (status || num_groups_removed != 1) 253 ice_debug(hw, ICE_DBG_SCHED, "remove node failed FW error %d\n", 254 hw->adminq.sq_last_status); 255 256 devm_kfree(ice_hw_to_dev(hw), buf); 257 return status; 258 } 259 260 /** 261 * ice_sched_get_first_node - get the first node of the given layer 262 * @pi: port information structure 263 * @parent: pointer the base node of the subtree 264 * @layer: layer number 265 * 266 * This function retrieves the first node of the given layer from the subtree 267 */ 268 static struct ice_sched_node * 269 ice_sched_get_first_node(struct ice_port_info *pi, 270 struct ice_sched_node *parent, u8 layer) 271 { 272 return pi->sib_head[parent->tc_num][layer]; 273 } 274 275 /** 276 * ice_sched_get_tc_node - get pointer to TC node 277 * @pi: port information structure 278 * @tc: TC number 279 * 280 * This function returns the TC node pointer 281 */ 282 struct ice_sched_node *ice_sched_get_tc_node(struct ice_port_info *pi, u8 tc) 283 { 284 u8 i; 285 286 if (!pi || !pi->root) 287 return NULL; 288 for (i = 0; i < pi->root->num_children; i++) 289 if (pi->root->children[i]->tc_num == tc) 290 return pi->root->children[i]; 291 return NULL; 292 } 293 294 /** 295 * ice_free_sched_node - Free a Tx scheduler node from SW DB 296 * @pi: port information structure 297 * @node: pointer to the ice_sched_node struct 298 * 299 * This function frees up a node from SW DB as well as from HW 300 * 301 * This function needs to be called with the port_info->sched_lock held 302 */ 303 void ice_free_sched_node(struct ice_port_info *pi, struct ice_sched_node *node) 304 { 305 struct ice_sched_node *parent; 306 struct ice_hw *hw = pi->hw; 307 u8 i, j; 308 309 /* Free the children before freeing up the parent node 310 * The parent array is updated below and that shifts the nodes 311 * in the array. So always pick the first child if num children > 0 312 */ 313 while (node->num_children) 314 ice_free_sched_node(pi, node->children[0]); 315 316 /* Leaf, TC and root nodes can't be deleted by SW */ 317 if (node->tx_sched_layer >= hw->sw_entry_point_layer && 318 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_TC && 319 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_ROOT_PORT && 320 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_LEAF) { 321 u32 teid = le32_to_cpu(node->info.node_teid); 322 323 ice_sched_remove_elems(hw, node->parent, 1, &teid); 324 } 325 parent = node->parent; 326 /* root has no parent */ 327 if (parent) { 328 struct ice_sched_node *p; 329 330 /* update the parent */ 331 for (i = 0; i < parent->num_children; i++) 332 if (parent->children[i] == node) { 333 for (j = i + 1; j < parent->num_children; j++) 334 parent->children[j - 1] = 335 parent->children[j]; 336 parent->num_children--; 337 break; 338 } 339 340 p = ice_sched_get_first_node(pi, node, node->tx_sched_layer); 341 while (p) { 342 if (p->sibling == node) { 343 p->sibling = node->sibling; 344 break; 345 } 346 p = p->sibling; 347 } 348 349 /* update the sibling head if head is getting removed */ 350 if (pi->sib_head[node->tc_num][node->tx_sched_layer] == node) 351 pi->sib_head[node->tc_num][node->tx_sched_layer] = 352 node->sibling; 353 } 354 355 /* leaf nodes have no children */ 356 if (node->children) 357 devm_kfree(ice_hw_to_dev(hw), node->children); 358 devm_kfree(ice_hw_to_dev(hw), node); 359 } 360 361 /** 362 * ice_aq_get_dflt_topo - gets default scheduler topology 363 * @hw: pointer to the HW struct 364 * @lport: logical port number 365 * @buf: pointer to buffer 366 * @buf_size: buffer size in bytes 367 * @num_branches: returns total number of queue to port branches 368 * @cd: pointer to command details structure or NULL 369 * 370 * Get default scheduler topology (0x400) 371 */ 372 static enum ice_status 373 ice_aq_get_dflt_topo(struct ice_hw *hw, u8 lport, 374 struct ice_aqc_get_topo_elem *buf, u16 buf_size, 375 u8 *num_branches, struct ice_sq_cd *cd) 376 { 377 struct ice_aqc_get_topo *cmd; 378 struct ice_aq_desc desc; 379 enum ice_status status; 380 381 cmd = &desc.params.get_topo; 382 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_dflt_topo); 383 cmd->port_num = lport; 384 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd); 385 if (!status && num_branches) 386 *num_branches = cmd->num_branches; 387 388 return status; 389 } 390 391 /** 392 * ice_aq_add_sched_elems - adds scheduling element 393 * @hw: pointer to the HW struct 394 * @grps_req: the number of groups that are requested to be added 395 * @buf: pointer to buffer 396 * @buf_size: buffer size in bytes 397 * @grps_added: returns total number of groups added 398 * @cd: pointer to command details structure or NULL 399 * 400 * Add scheduling elements (0x0401) 401 */ 402 static enum ice_status 403 ice_aq_add_sched_elems(struct ice_hw *hw, u16 grps_req, 404 struct ice_aqc_add_elem *buf, u16 buf_size, 405 u16 *grps_added, struct ice_sq_cd *cd) 406 { 407 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_add_sched_elems, 408 grps_req, (void *)buf, buf_size, 409 grps_added, cd); 410 } 411 412 /** 413 * ice_aq_cfg_sched_elems - configures scheduler elements 414 * @hw: pointer to the HW struct 415 * @elems_req: number of elements to configure 416 * @buf: pointer to buffer 417 * @buf_size: buffer size in bytes 418 * @elems_cfgd: returns total number of elements configured 419 * @cd: pointer to command details structure or NULL 420 * 421 * Configure scheduling elements (0x0403) 422 */ 423 static enum ice_status 424 ice_aq_cfg_sched_elems(struct ice_hw *hw, u16 elems_req, 425 struct ice_aqc_txsched_elem_data *buf, u16 buf_size, 426 u16 *elems_cfgd, struct ice_sq_cd *cd) 427 { 428 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_cfg_sched_elems, 429 elems_req, (void *)buf, buf_size, 430 elems_cfgd, cd); 431 } 432 433 /** 434 * ice_aq_suspend_sched_elems - suspend scheduler elements 435 * @hw: pointer to the HW struct 436 * @elems_req: number of elements to suspend 437 * @buf: pointer to buffer 438 * @buf_size: buffer size in bytes 439 * @elems_ret: returns total number of elements suspended 440 * @cd: pointer to command details structure or NULL 441 * 442 * Suspend scheduling elements (0x0409) 443 */ 444 static enum ice_status 445 ice_aq_suspend_sched_elems(struct ice_hw *hw, u16 elems_req, __le32 *buf, 446 u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd) 447 { 448 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_suspend_sched_elems, 449 elems_req, (void *)buf, buf_size, 450 elems_ret, cd); 451 } 452 453 /** 454 * ice_aq_resume_sched_elems - resume scheduler elements 455 * @hw: pointer to the HW struct 456 * @elems_req: number of elements to resume 457 * @buf: pointer to buffer 458 * @buf_size: buffer size in bytes 459 * @elems_ret: returns total number of elements resumed 460 * @cd: pointer to command details structure or NULL 461 * 462 * resume scheduling elements (0x040A) 463 */ 464 static enum ice_status 465 ice_aq_resume_sched_elems(struct ice_hw *hw, u16 elems_req, __le32 *buf, 466 u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd) 467 { 468 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_resume_sched_elems, 469 elems_req, (void *)buf, buf_size, 470 elems_ret, cd); 471 } 472 473 /** 474 * ice_aq_query_sched_res - query scheduler resource 475 * @hw: pointer to the HW struct 476 * @buf_size: buffer size in bytes 477 * @buf: pointer to buffer 478 * @cd: pointer to command details structure or NULL 479 * 480 * Query scheduler resource allocation (0x0412) 481 */ 482 static enum ice_status 483 ice_aq_query_sched_res(struct ice_hw *hw, u16 buf_size, 484 struct ice_aqc_query_txsched_res_resp *buf, 485 struct ice_sq_cd *cd) 486 { 487 struct ice_aq_desc desc; 488 489 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_query_sched_res); 490 return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd); 491 } 492 493 /** 494 * ice_sched_suspend_resume_elems - suspend or resume HW nodes 495 * @hw: pointer to the HW struct 496 * @num_nodes: number of nodes 497 * @node_teids: array of node teids to be suspended or resumed 498 * @suspend: true means suspend / false means resume 499 * 500 * This function suspends or resumes HW nodes 501 */ 502 static enum ice_status 503 ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids, 504 bool suspend) 505 { 506 u16 i, buf_size, num_elem_ret = 0; 507 enum ice_status status; 508 __le32 *buf; 509 510 buf_size = sizeof(*buf) * num_nodes; 511 buf = devm_kzalloc(ice_hw_to_dev(hw), buf_size, GFP_KERNEL); 512 if (!buf) 513 return ICE_ERR_NO_MEMORY; 514 515 for (i = 0; i < num_nodes; i++) 516 buf[i] = cpu_to_le32(node_teids[i]); 517 518 if (suspend) 519 status = ice_aq_suspend_sched_elems(hw, num_nodes, buf, 520 buf_size, &num_elem_ret, 521 NULL); 522 else 523 status = ice_aq_resume_sched_elems(hw, num_nodes, buf, 524 buf_size, &num_elem_ret, 525 NULL); 526 if (status || num_elem_ret != num_nodes) 527 ice_debug(hw, ICE_DBG_SCHED, "suspend/resume failed\n"); 528 529 devm_kfree(ice_hw_to_dev(hw), buf); 530 return status; 531 } 532 533 /** 534 * ice_alloc_lan_q_ctx - allocate LAN queue contexts for the given VSI and TC 535 * @hw: pointer to the HW struct 536 * @vsi_handle: VSI handle 537 * @tc: TC number 538 * @new_numqs: number of queues 539 */ 540 static enum ice_status 541 ice_alloc_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 new_numqs) 542 { 543 struct ice_vsi_ctx *vsi_ctx; 544 struct ice_q_ctx *q_ctx; 545 546 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle); 547 if (!vsi_ctx) 548 return ICE_ERR_PARAM; 549 /* allocate LAN queue contexts */ 550 if (!vsi_ctx->lan_q_ctx[tc]) { 551 vsi_ctx->lan_q_ctx[tc] = devm_kcalloc(ice_hw_to_dev(hw), 552 new_numqs, 553 sizeof(*q_ctx), 554 GFP_KERNEL); 555 if (!vsi_ctx->lan_q_ctx[tc]) 556 return ICE_ERR_NO_MEMORY; 557 vsi_ctx->num_lan_q_entries[tc] = new_numqs; 558 return 0; 559 } 560 /* num queues are increased, update the queue contexts */ 561 if (new_numqs > vsi_ctx->num_lan_q_entries[tc]) { 562 u16 prev_num = vsi_ctx->num_lan_q_entries[tc]; 563 564 q_ctx = devm_kcalloc(ice_hw_to_dev(hw), new_numqs, 565 sizeof(*q_ctx), GFP_KERNEL); 566 if (!q_ctx) 567 return ICE_ERR_NO_MEMORY; 568 memcpy(q_ctx, vsi_ctx->lan_q_ctx[tc], 569 prev_num * sizeof(*q_ctx)); 570 devm_kfree(ice_hw_to_dev(hw), vsi_ctx->lan_q_ctx[tc]); 571 vsi_ctx->lan_q_ctx[tc] = q_ctx; 572 vsi_ctx->num_lan_q_entries[tc] = new_numqs; 573 } 574 return 0; 575 } 576 577 /** 578 * ice_aq_rl_profile - performs a rate limiting task 579 * @hw: pointer to the HW struct 580 * @opcode: opcode for add, query, or remove profile(s) 581 * @num_profiles: the number of profiles 582 * @buf: pointer to buffer 583 * @buf_size: buffer size in bytes 584 * @num_processed: number of processed add or remove profile(s) to return 585 * @cd: pointer to command details structure 586 * 587 * RL profile function to add, query, or remove profile(s) 588 */ 589 static enum ice_status 590 ice_aq_rl_profile(struct ice_hw *hw, enum ice_adminq_opc opcode, 591 u16 num_profiles, struct ice_aqc_rl_profile_elem *buf, 592 u16 buf_size, u16 *num_processed, struct ice_sq_cd *cd) 593 { 594 struct ice_aqc_rl_profile *cmd; 595 struct ice_aq_desc desc; 596 enum ice_status status; 597 598 cmd = &desc.params.rl_profile; 599 600 ice_fill_dflt_direct_cmd_desc(&desc, opcode); 601 desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD); 602 cmd->num_profiles = cpu_to_le16(num_profiles); 603 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd); 604 if (!status && num_processed) 605 *num_processed = le16_to_cpu(cmd->num_processed); 606 return status; 607 } 608 609 /** 610 * ice_aq_add_rl_profile - adds rate limiting profile(s) 611 * @hw: pointer to the HW struct 612 * @num_profiles: the number of profile(s) to be add 613 * @buf: pointer to buffer 614 * @buf_size: buffer size in bytes 615 * @num_profiles_added: total number of profiles added to return 616 * @cd: pointer to command details structure 617 * 618 * Add RL profile (0x0410) 619 */ 620 static enum ice_status 621 ice_aq_add_rl_profile(struct ice_hw *hw, u16 num_profiles, 622 struct ice_aqc_rl_profile_elem *buf, u16 buf_size, 623 u16 *num_profiles_added, struct ice_sq_cd *cd) 624 { 625 return ice_aq_rl_profile(hw, ice_aqc_opc_add_rl_profiles, num_profiles, 626 buf, buf_size, num_profiles_added, cd); 627 } 628 629 /** 630 * ice_aq_remove_rl_profile - removes RL profile(s) 631 * @hw: pointer to the HW struct 632 * @num_profiles: the number of profile(s) to remove 633 * @buf: pointer to buffer 634 * @buf_size: buffer size in bytes 635 * @num_profiles_removed: total number of profiles removed to return 636 * @cd: pointer to command details structure or NULL 637 * 638 * Remove RL profile (0x0415) 639 */ 640 static enum ice_status 641 ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles, 642 struct ice_aqc_rl_profile_elem *buf, u16 buf_size, 643 u16 *num_profiles_removed, struct ice_sq_cd *cd) 644 { 645 return ice_aq_rl_profile(hw, ice_aqc_opc_remove_rl_profiles, 646 num_profiles, buf, buf_size, 647 num_profiles_removed, cd); 648 } 649 650 /** 651 * ice_sched_del_rl_profile - remove RL profile 652 * @hw: pointer to the HW struct 653 * @rl_info: rate limit profile information 654 * 655 * If the profile ID is not referenced anymore, it removes profile ID with 656 * its associated parameters from HW DB,and locally. The caller needs to 657 * hold scheduler lock. 658 */ 659 static enum ice_status 660 ice_sched_del_rl_profile(struct ice_hw *hw, 661 struct ice_aqc_rl_profile_info *rl_info) 662 { 663 struct ice_aqc_rl_profile_elem *buf; 664 u16 num_profiles_removed; 665 enum ice_status status; 666 u16 num_profiles = 1; 667 668 if (rl_info->prof_id_ref != 0) 669 return ICE_ERR_IN_USE; 670 671 /* Safe to remove profile ID */ 672 buf = &rl_info->profile; 673 status = ice_aq_remove_rl_profile(hw, num_profiles, buf, sizeof(*buf), 674 &num_profiles_removed, NULL); 675 if (status || num_profiles_removed != num_profiles) 676 return ICE_ERR_CFG; 677 678 /* Delete stale entry now */ 679 list_del(&rl_info->list_entry); 680 devm_kfree(ice_hw_to_dev(hw), rl_info); 681 return status; 682 } 683 684 /** 685 * ice_sched_clear_rl_prof - clears RL prof entries 686 * @pi: port information structure 687 * 688 * This function removes all RL profile from HW as well as from SW DB. 689 */ 690 static void ice_sched_clear_rl_prof(struct ice_port_info *pi) 691 { 692 u16 ln; 693 694 for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) { 695 struct ice_aqc_rl_profile_info *rl_prof_elem; 696 struct ice_aqc_rl_profile_info *rl_prof_tmp; 697 698 list_for_each_entry_safe(rl_prof_elem, rl_prof_tmp, 699 &pi->rl_prof_list[ln], list_entry) { 700 struct ice_hw *hw = pi->hw; 701 enum ice_status status; 702 703 rl_prof_elem->prof_id_ref = 0; 704 status = ice_sched_del_rl_profile(hw, rl_prof_elem); 705 if (status) { 706 ice_debug(hw, ICE_DBG_SCHED, "Remove rl profile failed\n"); 707 /* On error, free mem required */ 708 list_del(&rl_prof_elem->list_entry); 709 devm_kfree(ice_hw_to_dev(hw), rl_prof_elem); 710 } 711 } 712 } 713 } 714 715 /** 716 * ice_sched_clear_agg - clears the aggregator related information 717 * @hw: pointer to the hardware structure 718 * 719 * This function removes aggregator list and free up aggregator related memory 720 * previously allocated. 721 */ 722 void ice_sched_clear_agg(struct ice_hw *hw) 723 { 724 struct ice_sched_agg_info *agg_info; 725 struct ice_sched_agg_info *atmp; 726 727 list_for_each_entry_safe(agg_info, atmp, &hw->agg_list, list_entry) { 728 struct ice_sched_agg_vsi_info *agg_vsi_info; 729 struct ice_sched_agg_vsi_info *vtmp; 730 731 list_for_each_entry_safe(agg_vsi_info, vtmp, 732 &agg_info->agg_vsi_list, list_entry) { 733 list_del(&agg_vsi_info->list_entry); 734 devm_kfree(ice_hw_to_dev(hw), agg_vsi_info); 735 } 736 list_del(&agg_info->list_entry); 737 devm_kfree(ice_hw_to_dev(hw), agg_info); 738 } 739 } 740 741 /** 742 * ice_sched_clear_tx_topo - clears the scheduler tree nodes 743 * @pi: port information structure 744 * 745 * This function removes all the nodes from HW as well as from SW DB. 746 */ 747 static void ice_sched_clear_tx_topo(struct ice_port_info *pi) 748 { 749 if (!pi) 750 return; 751 /* remove RL profiles related lists */ 752 ice_sched_clear_rl_prof(pi); 753 if (pi->root) { 754 ice_free_sched_node(pi, pi->root); 755 pi->root = NULL; 756 } 757 } 758 759 /** 760 * ice_sched_clear_port - clear the scheduler elements from SW DB for a port 761 * @pi: port information structure 762 * 763 * Cleanup scheduling elements from SW DB 764 */ 765 void ice_sched_clear_port(struct ice_port_info *pi) 766 { 767 if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY) 768 return; 769 770 pi->port_state = ICE_SCHED_PORT_STATE_INIT; 771 mutex_lock(&pi->sched_lock); 772 ice_sched_clear_tx_topo(pi); 773 mutex_unlock(&pi->sched_lock); 774 mutex_destroy(&pi->sched_lock); 775 } 776 777 /** 778 * ice_sched_cleanup_all - cleanup scheduler elements from SW DB for all ports 779 * @hw: pointer to the HW struct 780 * 781 * Cleanup scheduling elements from SW DB for all the ports 782 */ 783 void ice_sched_cleanup_all(struct ice_hw *hw) 784 { 785 if (!hw) 786 return; 787 788 if (hw->layer_info) { 789 devm_kfree(ice_hw_to_dev(hw), hw->layer_info); 790 hw->layer_info = NULL; 791 } 792 793 ice_sched_clear_port(hw->port_info); 794 795 hw->num_tx_sched_layers = 0; 796 hw->num_tx_sched_phys_layers = 0; 797 hw->flattened_layers = 0; 798 hw->max_cgds = 0; 799 } 800 801 /** 802 * ice_sched_add_elems - add nodes to HW and SW DB 803 * @pi: port information structure 804 * @tc_node: pointer to the branch node 805 * @parent: pointer to the parent node 806 * @layer: layer number to add nodes 807 * @num_nodes: number of nodes 808 * @num_nodes_added: pointer to num nodes added 809 * @first_node_teid: if new nodes are added then return the TEID of first node 810 * 811 * This function add nodes to HW as well as to SW DB for a given layer 812 */ 813 static enum ice_status 814 ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node, 815 struct ice_sched_node *parent, u8 layer, u16 num_nodes, 816 u16 *num_nodes_added, u32 *first_node_teid) 817 { 818 struct ice_sched_node *prev, *new_node; 819 struct ice_aqc_add_elem *buf; 820 u16 i, num_groups_added = 0; 821 enum ice_status status = 0; 822 struct ice_hw *hw = pi->hw; 823 size_t buf_size; 824 u32 teid; 825 826 buf_size = struct_size(buf, generic, num_nodes); 827 buf = devm_kzalloc(ice_hw_to_dev(hw), buf_size, GFP_KERNEL); 828 if (!buf) 829 return ICE_ERR_NO_MEMORY; 830 831 buf->hdr.parent_teid = parent->info.node_teid; 832 buf->hdr.num_elems = cpu_to_le16(num_nodes); 833 for (i = 0; i < num_nodes; i++) { 834 buf->generic[i].parent_teid = parent->info.node_teid; 835 buf->generic[i].data.elem_type = ICE_AQC_ELEM_TYPE_SE_GENERIC; 836 buf->generic[i].data.valid_sections = 837 ICE_AQC_ELEM_VALID_GENERIC | ICE_AQC_ELEM_VALID_CIR | 838 ICE_AQC_ELEM_VALID_EIR; 839 buf->generic[i].data.generic = 0; 840 buf->generic[i].data.cir_bw.bw_profile_idx = 841 cpu_to_le16(ICE_SCHED_DFLT_RL_PROF_ID); 842 buf->generic[i].data.cir_bw.bw_alloc = 843 cpu_to_le16(ICE_SCHED_DFLT_BW_WT); 844 buf->generic[i].data.eir_bw.bw_profile_idx = 845 cpu_to_le16(ICE_SCHED_DFLT_RL_PROF_ID); 846 buf->generic[i].data.eir_bw.bw_alloc = 847 cpu_to_le16(ICE_SCHED_DFLT_BW_WT); 848 } 849 850 status = ice_aq_add_sched_elems(hw, 1, buf, buf_size, 851 &num_groups_added, NULL); 852 if (status || num_groups_added != 1) { 853 ice_debug(hw, ICE_DBG_SCHED, "add node failed FW Error %d\n", 854 hw->adminq.sq_last_status); 855 devm_kfree(ice_hw_to_dev(hw), buf); 856 return ICE_ERR_CFG; 857 } 858 859 *num_nodes_added = num_nodes; 860 /* add nodes to the SW DB */ 861 for (i = 0; i < num_nodes; i++) { 862 status = ice_sched_add_node(pi, layer, &buf->generic[i]); 863 if (status) { 864 ice_debug(hw, ICE_DBG_SCHED, "add nodes in SW DB failed status =%d\n", 865 status); 866 break; 867 } 868 869 teid = le32_to_cpu(buf->generic[i].node_teid); 870 new_node = ice_sched_find_node_by_teid(parent, teid); 871 if (!new_node) { 872 ice_debug(hw, ICE_DBG_SCHED, "Node is missing for teid =%d\n", teid); 873 break; 874 } 875 876 new_node->sibling = NULL; 877 new_node->tc_num = tc_node->tc_num; 878 879 /* add it to previous node sibling pointer */ 880 /* Note: siblings are not linked across branches */ 881 prev = ice_sched_get_first_node(pi, tc_node, layer); 882 if (prev && prev != new_node) { 883 while (prev->sibling) 884 prev = prev->sibling; 885 prev->sibling = new_node; 886 } 887 888 /* initialize the sibling head */ 889 if (!pi->sib_head[tc_node->tc_num][layer]) 890 pi->sib_head[tc_node->tc_num][layer] = new_node; 891 892 if (i == 0) 893 *first_node_teid = teid; 894 } 895 896 devm_kfree(ice_hw_to_dev(hw), buf); 897 return status; 898 } 899 900 /** 901 * ice_sched_add_nodes_to_layer - Add nodes to a given layer 902 * @pi: port information structure 903 * @tc_node: pointer to TC node 904 * @parent: pointer to parent node 905 * @layer: layer number to add nodes 906 * @num_nodes: number of nodes to be added 907 * @first_node_teid: pointer to the first node TEID 908 * @num_nodes_added: pointer to number of nodes added 909 * 910 * This function add nodes to a given layer. 911 */ 912 static enum ice_status 913 ice_sched_add_nodes_to_layer(struct ice_port_info *pi, 914 struct ice_sched_node *tc_node, 915 struct ice_sched_node *parent, u8 layer, 916 u16 num_nodes, u32 *first_node_teid, 917 u16 *num_nodes_added) 918 { 919 u32 *first_teid_ptr = first_node_teid; 920 u16 new_num_nodes, max_child_nodes; 921 enum ice_status status = 0; 922 struct ice_hw *hw = pi->hw; 923 u16 num_added = 0; 924 u32 temp; 925 926 *num_nodes_added = 0; 927 928 if (!num_nodes) 929 return status; 930 931 if (!parent || layer < hw->sw_entry_point_layer) 932 return ICE_ERR_PARAM; 933 934 /* max children per node per layer */ 935 max_child_nodes = hw->max_children[parent->tx_sched_layer]; 936 937 /* current number of children + required nodes exceed max children ? */ 938 if ((parent->num_children + num_nodes) > max_child_nodes) { 939 /* Fail if the parent is a TC node */ 940 if (parent == tc_node) 941 return ICE_ERR_CFG; 942 943 /* utilize all the spaces if the parent is not full */ 944 if (parent->num_children < max_child_nodes) { 945 new_num_nodes = max_child_nodes - parent->num_children; 946 /* this recursion is intentional, and wouldn't 947 * go more than 2 calls 948 */ 949 status = ice_sched_add_nodes_to_layer(pi, tc_node, 950 parent, layer, 951 new_num_nodes, 952 first_node_teid, 953 &num_added); 954 if (status) 955 return status; 956 957 *num_nodes_added += num_added; 958 } 959 /* Don't modify the first node TEID memory if the first node was 960 * added already in the above call. Instead send some temp 961 * memory for all other recursive calls. 962 */ 963 if (num_added) 964 first_teid_ptr = &temp; 965 966 new_num_nodes = num_nodes - num_added; 967 968 /* This parent is full, try the next sibling */ 969 parent = parent->sibling; 970 971 /* this recursion is intentional, for 1024 queues 972 * per VSI, it goes max of 16 iterations. 973 * 1024 / 8 = 128 layer 8 nodes 974 * 128 /8 = 16 (add 8 nodes per iteration) 975 */ 976 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, 977 layer, new_num_nodes, 978 first_teid_ptr, 979 &num_added); 980 *num_nodes_added += num_added; 981 return status; 982 } 983 984 status = ice_sched_add_elems(pi, tc_node, parent, layer, num_nodes, 985 num_nodes_added, first_node_teid); 986 return status; 987 } 988 989 /** 990 * ice_sched_get_qgrp_layer - get the current queue group layer number 991 * @hw: pointer to the HW struct 992 * 993 * This function returns the current queue group layer number 994 */ 995 static u8 ice_sched_get_qgrp_layer(struct ice_hw *hw) 996 { 997 /* It's always total layers - 1, the array is 0 relative so -2 */ 998 return hw->num_tx_sched_layers - ICE_QGRP_LAYER_OFFSET; 999 } 1000 1001 /** 1002 * ice_sched_get_vsi_layer - get the current VSI layer number 1003 * @hw: pointer to the HW struct 1004 * 1005 * This function returns the current VSI layer number 1006 */ 1007 static u8 ice_sched_get_vsi_layer(struct ice_hw *hw) 1008 { 1009 /* Num Layers VSI layer 1010 * 9 6 1011 * 7 4 1012 * 5 or less sw_entry_point_layer 1013 */ 1014 /* calculate the VSI layer based on number of layers. */ 1015 if (hw->num_tx_sched_layers > ICE_VSI_LAYER_OFFSET + 1) { 1016 u8 layer = hw->num_tx_sched_layers - ICE_VSI_LAYER_OFFSET; 1017 1018 if (layer > hw->sw_entry_point_layer) 1019 return layer; 1020 } 1021 return hw->sw_entry_point_layer; 1022 } 1023 1024 /** 1025 * ice_rm_dflt_leaf_node - remove the default leaf node in the tree 1026 * @pi: port information structure 1027 * 1028 * This function removes the leaf node that was created by the FW 1029 * during initialization 1030 */ 1031 static void ice_rm_dflt_leaf_node(struct ice_port_info *pi) 1032 { 1033 struct ice_sched_node *node; 1034 1035 node = pi->root; 1036 while (node) { 1037 if (!node->num_children) 1038 break; 1039 node = node->children[0]; 1040 } 1041 if (node && node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF) { 1042 u32 teid = le32_to_cpu(node->info.node_teid); 1043 enum ice_status status; 1044 1045 /* remove the default leaf node */ 1046 status = ice_sched_remove_elems(pi->hw, node->parent, 1, &teid); 1047 if (!status) 1048 ice_free_sched_node(pi, node); 1049 } 1050 } 1051 1052 /** 1053 * ice_sched_rm_dflt_nodes - free the default nodes in the tree 1054 * @pi: port information structure 1055 * 1056 * This function frees all the nodes except root and TC that were created by 1057 * the FW during initialization 1058 */ 1059 static void ice_sched_rm_dflt_nodes(struct ice_port_info *pi) 1060 { 1061 struct ice_sched_node *node; 1062 1063 ice_rm_dflt_leaf_node(pi); 1064 1065 /* remove the default nodes except TC and root nodes */ 1066 node = pi->root; 1067 while (node) { 1068 if (node->tx_sched_layer >= pi->hw->sw_entry_point_layer && 1069 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_TC && 1070 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_ROOT_PORT) { 1071 ice_free_sched_node(pi, node); 1072 break; 1073 } 1074 1075 if (!node->num_children) 1076 break; 1077 node = node->children[0]; 1078 } 1079 } 1080 1081 /** 1082 * ice_sched_init_port - Initialize scheduler by querying information from FW 1083 * @pi: port info structure for the tree to cleanup 1084 * 1085 * This function is the initial call to find the total number of Tx scheduler 1086 * resources, default topology created by firmware and storing the information 1087 * in SW DB. 1088 */ 1089 enum ice_status ice_sched_init_port(struct ice_port_info *pi) 1090 { 1091 struct ice_aqc_get_topo_elem *buf; 1092 enum ice_status status; 1093 struct ice_hw *hw; 1094 u8 num_branches; 1095 u16 num_elems; 1096 u8 i, j; 1097 1098 if (!pi) 1099 return ICE_ERR_PARAM; 1100 hw = pi->hw; 1101 1102 /* Query the Default Topology from FW */ 1103 buf = devm_kzalloc(ice_hw_to_dev(hw), ICE_AQ_MAX_BUF_LEN, GFP_KERNEL); 1104 if (!buf) 1105 return ICE_ERR_NO_MEMORY; 1106 1107 /* Query default scheduling tree topology */ 1108 status = ice_aq_get_dflt_topo(hw, pi->lport, buf, ICE_AQ_MAX_BUF_LEN, 1109 &num_branches, NULL); 1110 if (status) 1111 goto err_init_port; 1112 1113 /* num_branches should be between 1-8 */ 1114 if (num_branches < 1 || num_branches > ICE_TXSCHED_MAX_BRANCHES) { 1115 ice_debug(hw, ICE_DBG_SCHED, "num_branches unexpected %d\n", 1116 num_branches); 1117 status = ICE_ERR_PARAM; 1118 goto err_init_port; 1119 } 1120 1121 /* get the number of elements on the default/first branch */ 1122 num_elems = le16_to_cpu(buf[0].hdr.num_elems); 1123 1124 /* num_elems should always be between 1-9 */ 1125 if (num_elems < 1 || num_elems > ICE_AQC_TOPO_MAX_LEVEL_NUM) { 1126 ice_debug(hw, ICE_DBG_SCHED, "num_elems unexpected %d\n", 1127 num_elems); 1128 status = ICE_ERR_PARAM; 1129 goto err_init_port; 1130 } 1131 1132 /* If the last node is a leaf node then the index of the queue group 1133 * layer is two less than the number of elements. 1134 */ 1135 if (num_elems > 2 && buf[0].generic[num_elems - 1].data.elem_type == 1136 ICE_AQC_ELEM_TYPE_LEAF) 1137 pi->last_node_teid = 1138 le32_to_cpu(buf[0].generic[num_elems - 2].node_teid); 1139 else 1140 pi->last_node_teid = 1141 le32_to_cpu(buf[0].generic[num_elems - 1].node_teid); 1142 1143 /* Insert the Tx Sched root node */ 1144 status = ice_sched_add_root_node(pi, &buf[0].generic[0]); 1145 if (status) 1146 goto err_init_port; 1147 1148 /* Parse the default tree and cache the information */ 1149 for (i = 0; i < num_branches; i++) { 1150 num_elems = le16_to_cpu(buf[i].hdr.num_elems); 1151 1152 /* Skip root element as already inserted */ 1153 for (j = 1; j < num_elems; j++) { 1154 /* update the sw entry point */ 1155 if (buf[0].generic[j].data.elem_type == 1156 ICE_AQC_ELEM_TYPE_ENTRY_POINT) 1157 hw->sw_entry_point_layer = j; 1158 1159 status = ice_sched_add_node(pi, j, &buf[i].generic[j]); 1160 if (status) 1161 goto err_init_port; 1162 } 1163 } 1164 1165 /* Remove the default nodes. */ 1166 if (pi->root) 1167 ice_sched_rm_dflt_nodes(pi); 1168 1169 /* initialize the port for handling the scheduler tree */ 1170 pi->port_state = ICE_SCHED_PORT_STATE_READY; 1171 mutex_init(&pi->sched_lock); 1172 for (i = 0; i < ICE_AQC_TOPO_MAX_LEVEL_NUM; i++) 1173 INIT_LIST_HEAD(&pi->rl_prof_list[i]); 1174 1175 err_init_port: 1176 if (status && pi->root) { 1177 ice_free_sched_node(pi, pi->root); 1178 pi->root = NULL; 1179 } 1180 1181 devm_kfree(ice_hw_to_dev(hw), buf); 1182 return status; 1183 } 1184 1185 /** 1186 * ice_sched_query_res_alloc - query the FW for num of logical sched layers 1187 * @hw: pointer to the HW struct 1188 * 1189 * query FW for allocated scheduler resources and store in HW struct 1190 */ 1191 enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw) 1192 { 1193 struct ice_aqc_query_txsched_res_resp *buf; 1194 enum ice_status status = 0; 1195 __le16 max_sibl; 1196 u16 i; 1197 1198 if (hw->layer_info) 1199 return status; 1200 1201 buf = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*buf), GFP_KERNEL); 1202 if (!buf) 1203 return ICE_ERR_NO_MEMORY; 1204 1205 status = ice_aq_query_sched_res(hw, sizeof(*buf), buf, NULL); 1206 if (status) 1207 goto sched_query_out; 1208 1209 hw->num_tx_sched_layers = le16_to_cpu(buf->sched_props.logical_levels); 1210 hw->num_tx_sched_phys_layers = 1211 le16_to_cpu(buf->sched_props.phys_levels); 1212 hw->flattened_layers = buf->sched_props.flattening_bitmap; 1213 hw->max_cgds = buf->sched_props.max_pf_cgds; 1214 1215 /* max sibling group size of current layer refers to the max children 1216 * of the below layer node. 1217 * layer 1 node max children will be layer 2 max sibling group size 1218 * layer 2 node max children will be layer 3 max sibling group size 1219 * and so on. This array will be populated from root (index 0) to 1220 * qgroup layer 7. Leaf node has no children. 1221 */ 1222 for (i = 0; i < hw->num_tx_sched_layers - 1; i++) { 1223 max_sibl = buf->layer_props[i + 1].max_sibl_grp_sz; 1224 hw->max_children[i] = le16_to_cpu(max_sibl); 1225 } 1226 1227 hw->layer_info = devm_kmemdup(ice_hw_to_dev(hw), buf->layer_props, 1228 (hw->num_tx_sched_layers * 1229 sizeof(*hw->layer_info)), 1230 GFP_KERNEL); 1231 if (!hw->layer_info) { 1232 status = ICE_ERR_NO_MEMORY; 1233 goto sched_query_out; 1234 } 1235 1236 sched_query_out: 1237 devm_kfree(ice_hw_to_dev(hw), buf); 1238 return status; 1239 } 1240 1241 /** 1242 * ice_sched_find_node_in_subtree - Find node in part of base node subtree 1243 * @hw: pointer to the HW struct 1244 * @base: pointer to the base node 1245 * @node: pointer to the node to search 1246 * 1247 * This function checks whether a given node is part of the base node 1248 * subtree or not 1249 */ 1250 static bool 1251 ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base, 1252 struct ice_sched_node *node) 1253 { 1254 u8 i; 1255 1256 for (i = 0; i < base->num_children; i++) { 1257 struct ice_sched_node *child = base->children[i]; 1258 1259 if (node == child) 1260 return true; 1261 1262 if (child->tx_sched_layer > node->tx_sched_layer) 1263 return false; 1264 1265 /* this recursion is intentional, and wouldn't 1266 * go more than 8 calls 1267 */ 1268 if (ice_sched_find_node_in_subtree(hw, child, node)) 1269 return true; 1270 } 1271 return false; 1272 } 1273 1274 /** 1275 * ice_sched_get_free_qgrp - Scan all queue group siblings and find a free node 1276 * @pi: port information structure 1277 * @vsi_node: software VSI handle 1278 * @qgrp_node: first queue group node identified for scanning 1279 * @owner: LAN or RDMA 1280 * 1281 * This function retrieves a free LAN or RDMA queue group node by scanning 1282 * qgrp_node and its siblings for the queue group with the fewest number 1283 * of queues currently assigned. 1284 */ 1285 static struct ice_sched_node * 1286 ice_sched_get_free_qgrp(struct ice_port_info *pi, 1287 struct ice_sched_node *vsi_node, 1288 struct ice_sched_node *qgrp_node, u8 owner) 1289 { 1290 struct ice_sched_node *min_qgrp; 1291 u8 min_children; 1292 1293 if (!qgrp_node) 1294 return qgrp_node; 1295 min_children = qgrp_node->num_children; 1296 if (!min_children) 1297 return qgrp_node; 1298 min_qgrp = qgrp_node; 1299 /* scan all queue groups until find a node which has less than the 1300 * minimum number of children. This way all queue group nodes get 1301 * equal number of shares and active. The bandwidth will be equally 1302 * distributed across all queues. 1303 */ 1304 while (qgrp_node) { 1305 /* make sure the qgroup node is part of the VSI subtree */ 1306 if (ice_sched_find_node_in_subtree(pi->hw, vsi_node, qgrp_node)) 1307 if (qgrp_node->num_children < min_children && 1308 qgrp_node->owner == owner) { 1309 /* replace the new min queue group node */ 1310 min_qgrp = qgrp_node; 1311 min_children = min_qgrp->num_children; 1312 /* break if it has no children, */ 1313 if (!min_children) 1314 break; 1315 } 1316 qgrp_node = qgrp_node->sibling; 1317 } 1318 return min_qgrp; 1319 } 1320 1321 /** 1322 * ice_sched_get_free_qparent - Get a free LAN or RDMA queue group node 1323 * @pi: port information structure 1324 * @vsi_handle: software VSI handle 1325 * @tc: branch number 1326 * @owner: LAN or RDMA 1327 * 1328 * This function retrieves a free LAN or RDMA queue group node 1329 */ 1330 struct ice_sched_node * 1331 ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc, 1332 u8 owner) 1333 { 1334 struct ice_sched_node *vsi_node, *qgrp_node; 1335 struct ice_vsi_ctx *vsi_ctx; 1336 u16 max_children; 1337 u8 qgrp_layer; 1338 1339 qgrp_layer = ice_sched_get_qgrp_layer(pi->hw); 1340 max_children = pi->hw->max_children[qgrp_layer]; 1341 1342 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle); 1343 if (!vsi_ctx) 1344 return NULL; 1345 vsi_node = vsi_ctx->sched.vsi_node[tc]; 1346 /* validate invalid VSI ID */ 1347 if (!vsi_node) 1348 return NULL; 1349 1350 /* get the first queue group node from VSI sub-tree */ 1351 qgrp_node = ice_sched_get_first_node(pi, vsi_node, qgrp_layer); 1352 while (qgrp_node) { 1353 /* make sure the qgroup node is part of the VSI subtree */ 1354 if (ice_sched_find_node_in_subtree(pi->hw, vsi_node, qgrp_node)) 1355 if (qgrp_node->num_children < max_children && 1356 qgrp_node->owner == owner) 1357 break; 1358 qgrp_node = qgrp_node->sibling; 1359 } 1360 1361 /* Select the best queue group */ 1362 return ice_sched_get_free_qgrp(pi, vsi_node, qgrp_node, owner); 1363 } 1364 1365 /** 1366 * ice_sched_get_vsi_node - Get a VSI node based on VSI ID 1367 * @hw: pointer to the HW struct 1368 * @tc_node: pointer to the TC node 1369 * @vsi_handle: software VSI handle 1370 * 1371 * This function retrieves a VSI node for a given VSI ID from a given 1372 * TC branch 1373 */ 1374 static struct ice_sched_node * 1375 ice_sched_get_vsi_node(struct ice_hw *hw, struct ice_sched_node *tc_node, 1376 u16 vsi_handle) 1377 { 1378 struct ice_sched_node *node; 1379 u8 vsi_layer; 1380 1381 vsi_layer = ice_sched_get_vsi_layer(hw); 1382 node = ice_sched_get_first_node(hw->port_info, tc_node, vsi_layer); 1383 1384 /* Check whether it already exists */ 1385 while (node) { 1386 if (node->vsi_handle == vsi_handle) 1387 return node; 1388 node = node->sibling; 1389 } 1390 1391 return node; 1392 } 1393 1394 /** 1395 * ice_sched_calc_vsi_child_nodes - calculate number of VSI child nodes 1396 * @hw: pointer to the HW struct 1397 * @num_qs: number of queues 1398 * @num_nodes: num nodes array 1399 * 1400 * This function calculates the number of VSI child nodes based on the 1401 * number of queues. 1402 */ 1403 static void 1404 ice_sched_calc_vsi_child_nodes(struct ice_hw *hw, u16 num_qs, u16 *num_nodes) 1405 { 1406 u16 num = num_qs; 1407 u8 i, qgl, vsil; 1408 1409 qgl = ice_sched_get_qgrp_layer(hw); 1410 vsil = ice_sched_get_vsi_layer(hw); 1411 1412 /* calculate num nodes from queue group to VSI layer */ 1413 for (i = qgl; i > vsil; i--) { 1414 /* round to the next integer if there is a remainder */ 1415 num = DIV_ROUND_UP(num, hw->max_children[i]); 1416 1417 /* need at least one node */ 1418 num_nodes[i] = num ? num : 1; 1419 } 1420 } 1421 1422 /** 1423 * ice_sched_add_vsi_child_nodes - add VSI child nodes to tree 1424 * @pi: port information structure 1425 * @vsi_handle: software VSI handle 1426 * @tc_node: pointer to the TC node 1427 * @num_nodes: pointer to the num nodes that needs to be added per layer 1428 * @owner: node owner (LAN or RDMA) 1429 * 1430 * This function adds the VSI child nodes to tree. It gets called for 1431 * LAN and RDMA separately. 1432 */ 1433 static enum ice_status 1434 ice_sched_add_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle, 1435 struct ice_sched_node *tc_node, u16 *num_nodes, 1436 u8 owner) 1437 { 1438 struct ice_sched_node *parent, *node; 1439 struct ice_hw *hw = pi->hw; 1440 enum ice_status status; 1441 u32 first_node_teid; 1442 u16 num_added = 0; 1443 u8 i, qgl, vsil; 1444 1445 qgl = ice_sched_get_qgrp_layer(hw); 1446 vsil = ice_sched_get_vsi_layer(hw); 1447 parent = ice_sched_get_vsi_node(hw, tc_node, vsi_handle); 1448 for (i = vsil + 1; i <= qgl; i++) { 1449 if (!parent) 1450 return ICE_ERR_CFG; 1451 1452 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i, 1453 num_nodes[i], 1454 &first_node_teid, 1455 &num_added); 1456 if (status || num_nodes[i] != num_added) 1457 return ICE_ERR_CFG; 1458 1459 /* The newly added node can be a new parent for the next 1460 * layer nodes 1461 */ 1462 if (num_added) { 1463 parent = ice_sched_find_node_by_teid(tc_node, 1464 first_node_teid); 1465 node = parent; 1466 while (node) { 1467 node->owner = owner; 1468 node = node->sibling; 1469 } 1470 } else { 1471 parent = parent->children[0]; 1472 } 1473 } 1474 1475 return 0; 1476 } 1477 1478 /** 1479 * ice_sched_calc_vsi_support_nodes - calculate number of VSI support nodes 1480 * @hw: pointer to the HW struct 1481 * @tc_node: pointer to TC node 1482 * @num_nodes: pointer to num nodes array 1483 * 1484 * This function calculates the number of supported nodes needed to add this 1485 * VSI into Tx tree including the VSI, parent and intermediate nodes in below 1486 * layers 1487 */ 1488 static void 1489 ice_sched_calc_vsi_support_nodes(struct ice_hw *hw, 1490 struct ice_sched_node *tc_node, u16 *num_nodes) 1491 { 1492 struct ice_sched_node *node; 1493 u8 vsil; 1494 int i; 1495 1496 vsil = ice_sched_get_vsi_layer(hw); 1497 for (i = vsil; i >= hw->sw_entry_point_layer; i--) 1498 /* Add intermediate nodes if TC has no children and 1499 * need at least one node for VSI 1500 */ 1501 if (!tc_node->num_children || i == vsil) { 1502 num_nodes[i]++; 1503 } else { 1504 /* If intermediate nodes are reached max children 1505 * then add a new one. 1506 */ 1507 node = ice_sched_get_first_node(hw->port_info, tc_node, 1508 (u8)i); 1509 /* scan all the siblings */ 1510 while (node) { 1511 if (node->num_children < hw->max_children[i]) 1512 break; 1513 node = node->sibling; 1514 } 1515 1516 /* tree has one intermediate node to add this new VSI. 1517 * So no need to calculate supported nodes for below 1518 * layers. 1519 */ 1520 if (node) 1521 break; 1522 /* all the nodes are full, allocate a new one */ 1523 num_nodes[i]++; 1524 } 1525 } 1526 1527 /** 1528 * ice_sched_add_vsi_support_nodes - add VSI supported nodes into Tx tree 1529 * @pi: port information structure 1530 * @vsi_handle: software VSI handle 1531 * @tc_node: pointer to TC node 1532 * @num_nodes: pointer to num nodes array 1533 * 1534 * This function adds the VSI supported nodes into Tx tree including the 1535 * VSI, its parent and intermediate nodes in below layers 1536 */ 1537 static enum ice_status 1538 ice_sched_add_vsi_support_nodes(struct ice_port_info *pi, u16 vsi_handle, 1539 struct ice_sched_node *tc_node, u16 *num_nodes) 1540 { 1541 struct ice_sched_node *parent = tc_node; 1542 enum ice_status status; 1543 u32 first_node_teid; 1544 u16 num_added = 0; 1545 u8 i, vsil; 1546 1547 if (!pi) 1548 return ICE_ERR_PARAM; 1549 1550 vsil = ice_sched_get_vsi_layer(pi->hw); 1551 for (i = pi->hw->sw_entry_point_layer; i <= vsil; i++) { 1552 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, 1553 i, num_nodes[i], 1554 &first_node_teid, 1555 &num_added); 1556 if (status || num_nodes[i] != num_added) 1557 return ICE_ERR_CFG; 1558 1559 /* The newly added node can be a new parent for the next 1560 * layer nodes 1561 */ 1562 if (num_added) 1563 parent = ice_sched_find_node_by_teid(tc_node, 1564 first_node_teid); 1565 else 1566 parent = parent->children[0]; 1567 1568 if (!parent) 1569 return ICE_ERR_CFG; 1570 1571 if (i == vsil) 1572 parent->vsi_handle = vsi_handle; 1573 } 1574 1575 return 0; 1576 } 1577 1578 /** 1579 * ice_sched_add_vsi_to_topo - add a new VSI into tree 1580 * @pi: port information structure 1581 * @vsi_handle: software VSI handle 1582 * @tc: TC number 1583 * 1584 * This function adds a new VSI into scheduler tree 1585 */ 1586 static enum ice_status 1587 ice_sched_add_vsi_to_topo(struct ice_port_info *pi, u16 vsi_handle, u8 tc) 1588 { 1589 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 }; 1590 struct ice_sched_node *tc_node; 1591 struct ice_hw *hw = pi->hw; 1592 1593 tc_node = ice_sched_get_tc_node(pi, tc); 1594 if (!tc_node) 1595 return ICE_ERR_PARAM; 1596 1597 /* calculate number of supported nodes needed for this VSI */ 1598 ice_sched_calc_vsi_support_nodes(hw, tc_node, num_nodes); 1599 1600 /* add VSI supported nodes to TC subtree */ 1601 return ice_sched_add_vsi_support_nodes(pi, vsi_handle, tc_node, 1602 num_nodes); 1603 } 1604 1605 /** 1606 * ice_sched_update_vsi_child_nodes - update VSI child nodes 1607 * @pi: port information structure 1608 * @vsi_handle: software VSI handle 1609 * @tc: TC number 1610 * @new_numqs: new number of max queues 1611 * @owner: owner of this subtree 1612 * 1613 * This function updates the VSI child nodes based on the number of queues 1614 */ 1615 static enum ice_status 1616 ice_sched_update_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle, 1617 u8 tc, u16 new_numqs, u8 owner) 1618 { 1619 u16 new_num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 }; 1620 struct ice_sched_node *vsi_node; 1621 struct ice_sched_node *tc_node; 1622 struct ice_vsi_ctx *vsi_ctx; 1623 enum ice_status status = 0; 1624 struct ice_hw *hw = pi->hw; 1625 u16 prev_numqs; 1626 1627 tc_node = ice_sched_get_tc_node(pi, tc); 1628 if (!tc_node) 1629 return ICE_ERR_CFG; 1630 1631 vsi_node = ice_sched_get_vsi_node(hw, tc_node, vsi_handle); 1632 if (!vsi_node) 1633 return ICE_ERR_CFG; 1634 1635 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle); 1636 if (!vsi_ctx) 1637 return ICE_ERR_PARAM; 1638 1639 prev_numqs = vsi_ctx->sched.max_lanq[tc]; 1640 /* num queues are not changed or less than the previous number */ 1641 if (new_numqs <= prev_numqs) 1642 return status; 1643 status = ice_alloc_lan_q_ctx(hw, vsi_handle, tc, new_numqs); 1644 if (status) 1645 return status; 1646 1647 if (new_numqs) 1648 ice_sched_calc_vsi_child_nodes(hw, new_numqs, new_num_nodes); 1649 /* Keep the max number of queue configuration all the time. Update the 1650 * tree only if number of queues > previous number of queues. This may 1651 * leave some extra nodes in the tree if number of queues < previous 1652 * number but that wouldn't harm anything. Removing those extra nodes 1653 * may complicate the code if those nodes are part of SRL or 1654 * individually rate limited. 1655 */ 1656 status = ice_sched_add_vsi_child_nodes(pi, vsi_handle, tc_node, 1657 new_num_nodes, owner); 1658 if (status) 1659 return status; 1660 vsi_ctx->sched.max_lanq[tc] = new_numqs; 1661 1662 return 0; 1663 } 1664 1665 /** 1666 * ice_sched_cfg_vsi - configure the new/existing VSI 1667 * @pi: port information structure 1668 * @vsi_handle: software VSI handle 1669 * @tc: TC number 1670 * @maxqs: max number of queues 1671 * @owner: LAN or RDMA 1672 * @enable: TC enabled or disabled 1673 * 1674 * This function adds/updates VSI nodes based on the number of queues. If TC is 1675 * enabled and VSI is in suspended state then resume the VSI back. If TC is 1676 * disabled then suspend the VSI if it is not already. 1677 */ 1678 enum ice_status 1679 ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs, 1680 u8 owner, bool enable) 1681 { 1682 struct ice_sched_node *vsi_node, *tc_node; 1683 struct ice_vsi_ctx *vsi_ctx; 1684 enum ice_status status = 0; 1685 struct ice_hw *hw = pi->hw; 1686 1687 ice_debug(pi->hw, ICE_DBG_SCHED, "add/config VSI %d\n", vsi_handle); 1688 tc_node = ice_sched_get_tc_node(pi, tc); 1689 if (!tc_node) 1690 return ICE_ERR_PARAM; 1691 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle); 1692 if (!vsi_ctx) 1693 return ICE_ERR_PARAM; 1694 vsi_node = ice_sched_get_vsi_node(hw, tc_node, vsi_handle); 1695 1696 /* suspend the VSI if TC is not enabled */ 1697 if (!enable) { 1698 if (vsi_node && vsi_node->in_use) { 1699 u32 teid = le32_to_cpu(vsi_node->info.node_teid); 1700 1701 status = ice_sched_suspend_resume_elems(hw, 1, &teid, 1702 true); 1703 if (!status) 1704 vsi_node->in_use = false; 1705 } 1706 return status; 1707 } 1708 1709 /* TC is enabled, if it is a new VSI then add it to the tree */ 1710 if (!vsi_node) { 1711 status = ice_sched_add_vsi_to_topo(pi, vsi_handle, tc); 1712 if (status) 1713 return status; 1714 1715 vsi_node = ice_sched_get_vsi_node(hw, tc_node, vsi_handle); 1716 if (!vsi_node) 1717 return ICE_ERR_CFG; 1718 1719 vsi_ctx->sched.vsi_node[tc] = vsi_node; 1720 vsi_node->in_use = true; 1721 /* invalidate the max queues whenever VSI gets added first time 1722 * into the scheduler tree (boot or after reset). We need to 1723 * recreate the child nodes all the time in these cases. 1724 */ 1725 vsi_ctx->sched.max_lanq[tc] = 0; 1726 } 1727 1728 /* update the VSI child nodes */ 1729 status = ice_sched_update_vsi_child_nodes(pi, vsi_handle, tc, maxqs, 1730 owner); 1731 if (status) 1732 return status; 1733 1734 /* TC is enabled, resume the VSI if it is in the suspend state */ 1735 if (!vsi_node->in_use) { 1736 u32 teid = le32_to_cpu(vsi_node->info.node_teid); 1737 1738 status = ice_sched_suspend_resume_elems(hw, 1, &teid, false); 1739 if (!status) 1740 vsi_node->in_use = true; 1741 } 1742 1743 return status; 1744 } 1745 1746 /** 1747 * ice_sched_rm_agg_vsi_entry - remove aggregator related VSI info entry 1748 * @pi: port information structure 1749 * @vsi_handle: software VSI handle 1750 * 1751 * This function removes single aggregator VSI info entry from 1752 * aggregator list. 1753 */ 1754 static void ice_sched_rm_agg_vsi_info(struct ice_port_info *pi, u16 vsi_handle) 1755 { 1756 struct ice_sched_agg_info *agg_info; 1757 struct ice_sched_agg_info *atmp; 1758 1759 list_for_each_entry_safe(agg_info, atmp, &pi->hw->agg_list, 1760 list_entry) { 1761 struct ice_sched_agg_vsi_info *agg_vsi_info; 1762 struct ice_sched_agg_vsi_info *vtmp; 1763 1764 list_for_each_entry_safe(agg_vsi_info, vtmp, 1765 &agg_info->agg_vsi_list, list_entry) 1766 if (agg_vsi_info->vsi_handle == vsi_handle) { 1767 list_del(&agg_vsi_info->list_entry); 1768 devm_kfree(ice_hw_to_dev(pi->hw), 1769 agg_vsi_info); 1770 return; 1771 } 1772 } 1773 } 1774 1775 /** 1776 * ice_sched_is_leaf_node_present - check for a leaf node in the sub-tree 1777 * @node: pointer to the sub-tree node 1778 * 1779 * This function checks for a leaf node presence in a given sub-tree node. 1780 */ 1781 static bool ice_sched_is_leaf_node_present(struct ice_sched_node *node) 1782 { 1783 u8 i; 1784 1785 for (i = 0; i < node->num_children; i++) 1786 if (ice_sched_is_leaf_node_present(node->children[i])) 1787 return true; 1788 /* check for a leaf node */ 1789 return (node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF); 1790 } 1791 1792 /** 1793 * ice_sched_rm_vsi_cfg - remove the VSI and its children nodes 1794 * @pi: port information structure 1795 * @vsi_handle: software VSI handle 1796 * @owner: LAN or RDMA 1797 * 1798 * This function removes the VSI and its LAN or RDMA children nodes from the 1799 * scheduler tree. 1800 */ 1801 static enum ice_status 1802 ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner) 1803 { 1804 enum ice_status status = ICE_ERR_PARAM; 1805 struct ice_vsi_ctx *vsi_ctx; 1806 u8 i; 1807 1808 ice_debug(pi->hw, ICE_DBG_SCHED, "removing VSI %d\n", vsi_handle); 1809 if (!ice_is_vsi_valid(pi->hw, vsi_handle)) 1810 return status; 1811 mutex_lock(&pi->sched_lock); 1812 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle); 1813 if (!vsi_ctx) 1814 goto exit_sched_rm_vsi_cfg; 1815 1816 ice_for_each_traffic_class(i) { 1817 struct ice_sched_node *vsi_node, *tc_node; 1818 u8 j = 0; 1819 1820 tc_node = ice_sched_get_tc_node(pi, i); 1821 if (!tc_node) 1822 continue; 1823 1824 vsi_node = ice_sched_get_vsi_node(pi->hw, tc_node, vsi_handle); 1825 if (!vsi_node) 1826 continue; 1827 1828 if (ice_sched_is_leaf_node_present(vsi_node)) { 1829 ice_debug(pi->hw, ICE_DBG_SCHED, "VSI has leaf nodes in TC %d\n", i); 1830 status = ICE_ERR_IN_USE; 1831 goto exit_sched_rm_vsi_cfg; 1832 } 1833 while (j < vsi_node->num_children) { 1834 if (vsi_node->children[j]->owner == owner) { 1835 ice_free_sched_node(pi, vsi_node->children[j]); 1836 1837 /* reset the counter again since the num 1838 * children will be updated after node removal 1839 */ 1840 j = 0; 1841 } else { 1842 j++; 1843 } 1844 } 1845 /* remove the VSI if it has no children */ 1846 if (!vsi_node->num_children) { 1847 ice_free_sched_node(pi, vsi_node); 1848 vsi_ctx->sched.vsi_node[i] = NULL; 1849 1850 /* clean up aggregator related VSI info if any */ 1851 ice_sched_rm_agg_vsi_info(pi, vsi_handle); 1852 } 1853 if (owner == ICE_SCHED_NODE_OWNER_LAN) 1854 vsi_ctx->sched.max_lanq[i] = 0; 1855 } 1856 status = 0; 1857 1858 exit_sched_rm_vsi_cfg: 1859 mutex_unlock(&pi->sched_lock); 1860 return status; 1861 } 1862 1863 /** 1864 * ice_rm_vsi_lan_cfg - remove VSI and its LAN children nodes 1865 * @pi: port information structure 1866 * @vsi_handle: software VSI handle 1867 * 1868 * This function clears the VSI and its LAN children nodes from scheduler tree 1869 * for all TCs. 1870 */ 1871 enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle) 1872 { 1873 return ice_sched_rm_vsi_cfg(pi, vsi_handle, ICE_SCHED_NODE_OWNER_LAN); 1874 } 1875 1876 /** 1877 * ice_sched_rm_unused_rl_prof - remove unused RL profile 1878 * @pi: port information structure 1879 * 1880 * This function removes unused rate limit profiles from the HW and 1881 * SW DB. The caller needs to hold scheduler lock. 1882 */ 1883 static void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi) 1884 { 1885 u16 ln; 1886 1887 for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) { 1888 struct ice_aqc_rl_profile_info *rl_prof_elem; 1889 struct ice_aqc_rl_profile_info *rl_prof_tmp; 1890 1891 list_for_each_entry_safe(rl_prof_elem, rl_prof_tmp, 1892 &pi->rl_prof_list[ln], list_entry) { 1893 if (!ice_sched_del_rl_profile(pi->hw, rl_prof_elem)) 1894 ice_debug(pi->hw, ICE_DBG_SCHED, "Removed rl profile\n"); 1895 } 1896 } 1897 } 1898 1899 /** 1900 * ice_sched_update_elem - update element 1901 * @hw: pointer to the HW struct 1902 * @node: pointer to node 1903 * @info: node info to update 1904 * 1905 * Update the HW DB, and local SW DB of node. Update the scheduling 1906 * parameters of node from argument info data buffer (Info->data buf) and 1907 * returns success or error on config sched element failure. The caller 1908 * needs to hold scheduler lock. 1909 */ 1910 static enum ice_status 1911 ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node, 1912 struct ice_aqc_txsched_elem_data *info) 1913 { 1914 struct ice_aqc_txsched_elem_data buf; 1915 enum ice_status status; 1916 u16 elem_cfgd = 0; 1917 u16 num_elems = 1; 1918 1919 buf = *info; 1920 /* Parent TEID is reserved field in this aq call */ 1921 buf.parent_teid = 0; 1922 /* Element type is reserved field in this aq call */ 1923 buf.data.elem_type = 0; 1924 /* Flags is reserved field in this aq call */ 1925 buf.data.flags = 0; 1926 1927 /* Update HW DB */ 1928 /* Configure element node */ 1929 status = ice_aq_cfg_sched_elems(hw, num_elems, &buf, sizeof(buf), 1930 &elem_cfgd, NULL); 1931 if (status || elem_cfgd != num_elems) { 1932 ice_debug(hw, ICE_DBG_SCHED, "Config sched elem error\n"); 1933 return ICE_ERR_CFG; 1934 } 1935 1936 /* Config success case */ 1937 /* Now update local SW DB */ 1938 /* Only copy the data portion of info buffer */ 1939 node->info.data = info->data; 1940 return status; 1941 } 1942 1943 /** 1944 * ice_sched_cfg_node_bw_alloc - configure node BW weight/alloc params 1945 * @hw: pointer to the HW struct 1946 * @node: sched node to configure 1947 * @rl_type: rate limit type CIR, EIR, or shared 1948 * @bw_alloc: BW weight/allocation 1949 * 1950 * This function configures node element's BW allocation. 1951 */ 1952 static enum ice_status 1953 ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node *node, 1954 enum ice_rl_type rl_type, u16 bw_alloc) 1955 { 1956 struct ice_aqc_txsched_elem_data buf; 1957 struct ice_aqc_txsched_elem *data; 1958 enum ice_status status; 1959 1960 buf = node->info; 1961 data = &buf.data; 1962 if (rl_type == ICE_MIN_BW) { 1963 data->valid_sections |= ICE_AQC_ELEM_VALID_CIR; 1964 data->cir_bw.bw_alloc = cpu_to_le16(bw_alloc); 1965 } else if (rl_type == ICE_MAX_BW) { 1966 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR; 1967 data->eir_bw.bw_alloc = cpu_to_le16(bw_alloc); 1968 } else { 1969 return ICE_ERR_PARAM; 1970 } 1971 1972 /* Configure element */ 1973 status = ice_sched_update_elem(hw, node, &buf); 1974 return status; 1975 } 1976 1977 /** 1978 * ice_set_clear_cir_bw - set or clear CIR BW 1979 * @bw_t_info: bandwidth type information structure 1980 * @bw: bandwidth in Kbps - Kilo bits per sec 1981 * 1982 * Save or clear CIR bandwidth (BW) in the passed param bw_t_info. 1983 */ 1984 static void ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw) 1985 { 1986 if (bw == ICE_SCHED_DFLT_BW) { 1987 clear_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap); 1988 bw_t_info->cir_bw.bw = 0; 1989 } else { 1990 /* Save type of BW information */ 1991 set_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap); 1992 bw_t_info->cir_bw.bw = bw; 1993 } 1994 } 1995 1996 /** 1997 * ice_set_clear_eir_bw - set or clear EIR BW 1998 * @bw_t_info: bandwidth type information structure 1999 * @bw: bandwidth in Kbps - Kilo bits per sec 2000 * 2001 * Save or clear EIR bandwidth (BW) in the passed param bw_t_info. 2002 */ 2003 static void ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw) 2004 { 2005 if (bw == ICE_SCHED_DFLT_BW) { 2006 clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap); 2007 bw_t_info->eir_bw.bw = 0; 2008 } else { 2009 /* EIR BW and Shared BW profiles are mutually exclusive and 2010 * hence only one of them may be set for any given element. 2011 * First clear earlier saved shared BW information. 2012 */ 2013 clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap); 2014 bw_t_info->shared_bw = 0; 2015 /* save EIR BW information */ 2016 set_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap); 2017 bw_t_info->eir_bw.bw = bw; 2018 } 2019 } 2020 2021 /** 2022 * ice_set_clear_shared_bw - set or clear shared BW 2023 * @bw_t_info: bandwidth type information structure 2024 * @bw: bandwidth in Kbps - Kilo bits per sec 2025 * 2026 * Save or clear shared bandwidth (BW) in the passed param bw_t_info. 2027 */ 2028 static void ice_set_clear_shared_bw(struct ice_bw_type_info *bw_t_info, u32 bw) 2029 { 2030 if (bw == ICE_SCHED_DFLT_BW) { 2031 clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap); 2032 bw_t_info->shared_bw = 0; 2033 } else { 2034 /* EIR BW and Shared BW profiles are mutually exclusive and 2035 * hence only one of them may be set for any given element. 2036 * First clear earlier saved EIR BW information. 2037 */ 2038 clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap); 2039 bw_t_info->eir_bw.bw = 0; 2040 /* save shared BW information */ 2041 set_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap); 2042 bw_t_info->shared_bw = bw; 2043 } 2044 } 2045 2046 /** 2047 * ice_sched_calc_wakeup - calculate RL profile wakeup parameter 2048 * @bw: bandwidth in Kbps 2049 * 2050 * This function calculates the wakeup parameter of RL profile. 2051 */ 2052 static u16 ice_sched_calc_wakeup(s32 bw) 2053 { 2054 s64 bytes_per_sec, wakeup_int, wakeup_a, wakeup_b, wakeup_f; 2055 s32 wakeup_f_int; 2056 u16 wakeup = 0; 2057 2058 /* Get the wakeup integer value */ 2059 bytes_per_sec = div64_long(((s64)bw * 1000), BITS_PER_BYTE); 2060 wakeup_int = div64_long(ICE_RL_PROF_FREQUENCY, bytes_per_sec); 2061 if (wakeup_int > 63) { 2062 wakeup = (u16)((1 << 15) | wakeup_int); 2063 } else { 2064 /* Calculate fraction value up to 4 decimals 2065 * Convert Integer value to a constant multiplier 2066 */ 2067 wakeup_b = (s64)ICE_RL_PROF_MULTIPLIER * wakeup_int; 2068 wakeup_a = div64_long((s64)ICE_RL_PROF_MULTIPLIER * 2069 ICE_RL_PROF_FREQUENCY, 2070 bytes_per_sec); 2071 2072 /* Get Fraction value */ 2073 wakeup_f = wakeup_a - wakeup_b; 2074 2075 /* Round up the Fractional value via Ceil(Fractional value) */ 2076 if (wakeup_f > div64_long(ICE_RL_PROF_MULTIPLIER, 2)) 2077 wakeup_f += 1; 2078 2079 wakeup_f_int = (s32)div64_long(wakeup_f * ICE_RL_PROF_FRACTION, 2080 ICE_RL_PROF_MULTIPLIER); 2081 wakeup |= (u16)(wakeup_int << 9); 2082 wakeup |= (u16)(0x1ff & wakeup_f_int); 2083 } 2084 2085 return wakeup; 2086 } 2087 2088 /** 2089 * ice_sched_bw_to_rl_profile - convert BW to profile parameters 2090 * @bw: bandwidth in Kbps 2091 * @profile: profile parameters to return 2092 * 2093 * This function converts the BW to profile structure format. 2094 */ 2095 static enum ice_status 2096 ice_sched_bw_to_rl_profile(u32 bw, struct ice_aqc_rl_profile_elem *profile) 2097 { 2098 enum ice_status status = ICE_ERR_PARAM; 2099 s64 bytes_per_sec, ts_rate, mv_tmp; 2100 bool found = false; 2101 s32 encode = 0; 2102 s64 mv = 0; 2103 s32 i; 2104 2105 /* Bw settings range is from 0.5Mb/sec to 100Gb/sec */ 2106 if (bw < ICE_SCHED_MIN_BW || bw > ICE_SCHED_MAX_BW) 2107 return status; 2108 2109 /* Bytes per second from Kbps */ 2110 bytes_per_sec = div64_long(((s64)bw * 1000), BITS_PER_BYTE); 2111 2112 /* encode is 6 bits but really useful are 5 bits */ 2113 for (i = 0; i < 64; i++) { 2114 u64 pow_result = BIT_ULL(i); 2115 2116 ts_rate = div64_long((s64)ICE_RL_PROF_FREQUENCY, 2117 pow_result * ICE_RL_PROF_TS_MULTIPLIER); 2118 if (ts_rate <= 0) 2119 continue; 2120 2121 /* Multiplier value */ 2122 mv_tmp = div64_long(bytes_per_sec * ICE_RL_PROF_MULTIPLIER, 2123 ts_rate); 2124 2125 /* Round to the nearest ICE_RL_PROF_MULTIPLIER */ 2126 mv = round_up_64bit(mv_tmp, ICE_RL_PROF_MULTIPLIER); 2127 2128 /* First multiplier value greater than the given 2129 * accuracy bytes 2130 */ 2131 if (mv > ICE_RL_PROF_ACCURACY_BYTES) { 2132 encode = i; 2133 found = true; 2134 break; 2135 } 2136 } 2137 if (found) { 2138 u16 wm; 2139 2140 wm = ice_sched_calc_wakeup(bw); 2141 profile->rl_multiply = cpu_to_le16(mv); 2142 profile->wake_up_calc = cpu_to_le16(wm); 2143 profile->rl_encode = cpu_to_le16(encode); 2144 status = 0; 2145 } else { 2146 status = ICE_ERR_DOES_NOT_EXIST; 2147 } 2148 2149 return status; 2150 } 2151 2152 /** 2153 * ice_sched_add_rl_profile - add RL profile 2154 * @pi: port information structure 2155 * @rl_type: type of rate limit BW - min, max, or shared 2156 * @bw: bandwidth in Kbps - Kilo bits per sec 2157 * @layer_num: specifies in which layer to create profile 2158 * 2159 * This function first checks the existing list for corresponding BW 2160 * parameter. If it exists, it returns the associated profile otherwise 2161 * it creates a new rate limit profile for requested BW, and adds it to 2162 * the HW DB and local list. It returns the new profile or null on error. 2163 * The caller needs to hold the scheduler lock. 2164 */ 2165 static struct ice_aqc_rl_profile_info * 2166 ice_sched_add_rl_profile(struct ice_port_info *pi, 2167 enum ice_rl_type rl_type, u32 bw, u8 layer_num) 2168 { 2169 struct ice_aqc_rl_profile_info *rl_prof_elem; 2170 u16 profiles_added = 0, num_profiles = 1; 2171 struct ice_aqc_rl_profile_elem *buf; 2172 enum ice_status status; 2173 struct ice_hw *hw; 2174 u8 profile_type; 2175 2176 if (layer_num >= ICE_AQC_TOPO_MAX_LEVEL_NUM) 2177 return NULL; 2178 switch (rl_type) { 2179 case ICE_MIN_BW: 2180 profile_type = ICE_AQC_RL_PROFILE_TYPE_CIR; 2181 break; 2182 case ICE_MAX_BW: 2183 profile_type = ICE_AQC_RL_PROFILE_TYPE_EIR; 2184 break; 2185 case ICE_SHARED_BW: 2186 profile_type = ICE_AQC_RL_PROFILE_TYPE_SRL; 2187 break; 2188 default: 2189 return NULL; 2190 } 2191 2192 if (!pi) 2193 return NULL; 2194 hw = pi->hw; 2195 list_for_each_entry(rl_prof_elem, &pi->rl_prof_list[layer_num], 2196 list_entry) 2197 if ((rl_prof_elem->profile.flags & ICE_AQC_RL_PROFILE_TYPE_M) == 2198 profile_type && rl_prof_elem->bw == bw) 2199 /* Return existing profile ID info */ 2200 return rl_prof_elem; 2201 2202 /* Create new profile ID */ 2203 rl_prof_elem = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*rl_prof_elem), 2204 GFP_KERNEL); 2205 2206 if (!rl_prof_elem) 2207 return NULL; 2208 2209 status = ice_sched_bw_to_rl_profile(bw, &rl_prof_elem->profile); 2210 if (status) 2211 goto exit_add_rl_prof; 2212 2213 rl_prof_elem->bw = bw; 2214 /* layer_num is zero relative, and fw expects level from 1 to 9 */ 2215 rl_prof_elem->profile.level = layer_num + 1; 2216 rl_prof_elem->profile.flags = profile_type; 2217 rl_prof_elem->profile.max_burst_size = cpu_to_le16(hw->max_burst_size); 2218 2219 /* Create new entry in HW DB */ 2220 buf = &rl_prof_elem->profile; 2221 status = ice_aq_add_rl_profile(hw, num_profiles, buf, sizeof(*buf), 2222 &profiles_added, NULL); 2223 if (status || profiles_added != num_profiles) 2224 goto exit_add_rl_prof; 2225 2226 /* Good entry - add in the list */ 2227 rl_prof_elem->prof_id_ref = 0; 2228 list_add(&rl_prof_elem->list_entry, &pi->rl_prof_list[layer_num]); 2229 return rl_prof_elem; 2230 2231 exit_add_rl_prof: 2232 devm_kfree(ice_hw_to_dev(hw), rl_prof_elem); 2233 return NULL; 2234 } 2235 2236 /** 2237 * ice_sched_cfg_node_bw_lmt - configure node sched params 2238 * @hw: pointer to the HW struct 2239 * @node: sched node to configure 2240 * @rl_type: rate limit type CIR, EIR, or shared 2241 * @rl_prof_id: rate limit profile ID 2242 * 2243 * This function configures node element's BW limit. 2244 */ 2245 static enum ice_status 2246 ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node, 2247 enum ice_rl_type rl_type, u16 rl_prof_id) 2248 { 2249 struct ice_aqc_txsched_elem_data buf; 2250 struct ice_aqc_txsched_elem *data; 2251 2252 buf = node->info; 2253 data = &buf.data; 2254 switch (rl_type) { 2255 case ICE_MIN_BW: 2256 data->valid_sections |= ICE_AQC_ELEM_VALID_CIR; 2257 data->cir_bw.bw_profile_idx = cpu_to_le16(rl_prof_id); 2258 break; 2259 case ICE_MAX_BW: 2260 /* EIR BW and Shared BW profiles are mutually exclusive and 2261 * hence only one of them may be set for any given element 2262 */ 2263 if (data->valid_sections & ICE_AQC_ELEM_VALID_SHARED) 2264 return ICE_ERR_CFG; 2265 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR; 2266 data->eir_bw.bw_profile_idx = cpu_to_le16(rl_prof_id); 2267 break; 2268 case ICE_SHARED_BW: 2269 /* Check for removing shared BW */ 2270 if (rl_prof_id == ICE_SCHED_NO_SHARED_RL_PROF_ID) { 2271 /* remove shared profile */ 2272 data->valid_sections &= ~ICE_AQC_ELEM_VALID_SHARED; 2273 data->srl_id = 0; /* clear SRL field */ 2274 2275 /* enable back EIR to default profile */ 2276 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR; 2277 data->eir_bw.bw_profile_idx = 2278 cpu_to_le16(ICE_SCHED_DFLT_RL_PROF_ID); 2279 break; 2280 } 2281 /* EIR BW and Shared BW profiles are mutually exclusive and 2282 * hence only one of them may be set for any given element 2283 */ 2284 if ((data->valid_sections & ICE_AQC_ELEM_VALID_EIR) && 2285 (le16_to_cpu(data->eir_bw.bw_profile_idx) != 2286 ICE_SCHED_DFLT_RL_PROF_ID)) 2287 return ICE_ERR_CFG; 2288 /* EIR BW is set to default, disable it */ 2289 data->valid_sections &= ~ICE_AQC_ELEM_VALID_EIR; 2290 /* Okay to enable shared BW now */ 2291 data->valid_sections |= ICE_AQC_ELEM_VALID_SHARED; 2292 data->srl_id = cpu_to_le16(rl_prof_id); 2293 break; 2294 default: 2295 /* Unknown rate limit type */ 2296 return ICE_ERR_PARAM; 2297 } 2298 2299 /* Configure element */ 2300 return ice_sched_update_elem(hw, node, &buf); 2301 } 2302 2303 /** 2304 * ice_sched_get_node_rl_prof_id - get node's rate limit profile ID 2305 * @node: sched node 2306 * @rl_type: rate limit type 2307 * 2308 * If existing profile matches, it returns the corresponding rate 2309 * limit profile ID, otherwise it returns an invalid ID as error. 2310 */ 2311 static u16 2312 ice_sched_get_node_rl_prof_id(struct ice_sched_node *node, 2313 enum ice_rl_type rl_type) 2314 { 2315 u16 rl_prof_id = ICE_SCHED_INVAL_PROF_ID; 2316 struct ice_aqc_txsched_elem *data; 2317 2318 data = &node->info.data; 2319 switch (rl_type) { 2320 case ICE_MIN_BW: 2321 if (data->valid_sections & ICE_AQC_ELEM_VALID_CIR) 2322 rl_prof_id = le16_to_cpu(data->cir_bw.bw_profile_idx); 2323 break; 2324 case ICE_MAX_BW: 2325 if (data->valid_sections & ICE_AQC_ELEM_VALID_EIR) 2326 rl_prof_id = le16_to_cpu(data->eir_bw.bw_profile_idx); 2327 break; 2328 case ICE_SHARED_BW: 2329 if (data->valid_sections & ICE_AQC_ELEM_VALID_SHARED) 2330 rl_prof_id = le16_to_cpu(data->srl_id); 2331 break; 2332 default: 2333 break; 2334 } 2335 2336 return rl_prof_id; 2337 } 2338 2339 /** 2340 * ice_sched_get_rl_prof_layer - selects rate limit profile creation layer 2341 * @pi: port information structure 2342 * @rl_type: type of rate limit BW - min, max, or shared 2343 * @layer_index: layer index 2344 * 2345 * This function returns requested profile creation layer. 2346 */ 2347 static u8 2348 ice_sched_get_rl_prof_layer(struct ice_port_info *pi, enum ice_rl_type rl_type, 2349 u8 layer_index) 2350 { 2351 struct ice_hw *hw = pi->hw; 2352 2353 if (layer_index >= hw->num_tx_sched_layers) 2354 return ICE_SCHED_INVAL_LAYER_NUM; 2355 switch (rl_type) { 2356 case ICE_MIN_BW: 2357 if (hw->layer_info[layer_index].max_cir_rl_profiles) 2358 return layer_index; 2359 break; 2360 case ICE_MAX_BW: 2361 if (hw->layer_info[layer_index].max_eir_rl_profiles) 2362 return layer_index; 2363 break; 2364 case ICE_SHARED_BW: 2365 /* if current layer doesn't support SRL profile creation 2366 * then try a layer up or down. 2367 */ 2368 if (hw->layer_info[layer_index].max_srl_profiles) 2369 return layer_index; 2370 else if (layer_index < hw->num_tx_sched_layers - 1 && 2371 hw->layer_info[layer_index + 1].max_srl_profiles) 2372 return layer_index + 1; 2373 else if (layer_index > 0 && 2374 hw->layer_info[layer_index - 1].max_srl_profiles) 2375 return layer_index - 1; 2376 break; 2377 default: 2378 break; 2379 } 2380 return ICE_SCHED_INVAL_LAYER_NUM; 2381 } 2382 2383 /** 2384 * ice_sched_get_srl_node - get shared rate limit node 2385 * @node: tree node 2386 * @srl_layer: shared rate limit layer 2387 * 2388 * This function returns SRL node to be used for shared rate limit purpose. 2389 * The caller needs to hold scheduler lock. 2390 */ 2391 static struct ice_sched_node * 2392 ice_sched_get_srl_node(struct ice_sched_node *node, u8 srl_layer) 2393 { 2394 if (srl_layer > node->tx_sched_layer) 2395 return node->children[0]; 2396 else if (srl_layer < node->tx_sched_layer) 2397 /* Node can't be created without a parent. It will always 2398 * have a valid parent except root node. 2399 */ 2400 return node->parent; 2401 else 2402 return node; 2403 } 2404 2405 /** 2406 * ice_sched_rm_rl_profile - remove RL profile ID 2407 * @pi: port information structure 2408 * @layer_num: layer number where profiles are saved 2409 * @profile_type: profile type like EIR, CIR, or SRL 2410 * @profile_id: profile ID to remove 2411 * 2412 * This function removes rate limit profile from layer 'layer_num' of type 2413 * 'profile_type' and profile ID as 'profile_id'. The caller needs to hold 2414 * scheduler lock. 2415 */ 2416 static enum ice_status 2417 ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type, 2418 u16 profile_id) 2419 { 2420 struct ice_aqc_rl_profile_info *rl_prof_elem; 2421 enum ice_status status = 0; 2422 2423 if (layer_num >= ICE_AQC_TOPO_MAX_LEVEL_NUM) 2424 return ICE_ERR_PARAM; 2425 /* Check the existing list for RL profile */ 2426 list_for_each_entry(rl_prof_elem, &pi->rl_prof_list[layer_num], 2427 list_entry) 2428 if ((rl_prof_elem->profile.flags & ICE_AQC_RL_PROFILE_TYPE_M) == 2429 profile_type && 2430 le16_to_cpu(rl_prof_elem->profile.profile_id) == 2431 profile_id) { 2432 if (rl_prof_elem->prof_id_ref) 2433 rl_prof_elem->prof_id_ref--; 2434 2435 /* Remove old profile ID from database */ 2436 status = ice_sched_del_rl_profile(pi->hw, rl_prof_elem); 2437 if (status && status != ICE_ERR_IN_USE) 2438 ice_debug(pi->hw, ICE_DBG_SCHED, "Remove rl profile failed\n"); 2439 break; 2440 } 2441 if (status == ICE_ERR_IN_USE) 2442 status = 0; 2443 return status; 2444 } 2445 2446 /** 2447 * ice_sched_set_node_bw_dflt - set node's bandwidth limit to default 2448 * @pi: port information structure 2449 * @node: pointer to node structure 2450 * @rl_type: rate limit type min, max, or shared 2451 * @layer_num: layer number where RL profiles are saved 2452 * 2453 * This function configures node element's BW rate limit profile ID of 2454 * type CIR, EIR, or SRL to default. This function needs to be called 2455 * with the scheduler lock held. 2456 */ 2457 static enum ice_status 2458 ice_sched_set_node_bw_dflt(struct ice_port_info *pi, 2459 struct ice_sched_node *node, 2460 enum ice_rl_type rl_type, u8 layer_num) 2461 { 2462 enum ice_status status; 2463 struct ice_hw *hw; 2464 u8 profile_type; 2465 u16 rl_prof_id; 2466 u16 old_id; 2467 2468 hw = pi->hw; 2469 switch (rl_type) { 2470 case ICE_MIN_BW: 2471 profile_type = ICE_AQC_RL_PROFILE_TYPE_CIR; 2472 rl_prof_id = ICE_SCHED_DFLT_RL_PROF_ID; 2473 break; 2474 case ICE_MAX_BW: 2475 profile_type = ICE_AQC_RL_PROFILE_TYPE_EIR; 2476 rl_prof_id = ICE_SCHED_DFLT_RL_PROF_ID; 2477 break; 2478 case ICE_SHARED_BW: 2479 profile_type = ICE_AQC_RL_PROFILE_TYPE_SRL; 2480 /* No SRL is configured for default case */ 2481 rl_prof_id = ICE_SCHED_NO_SHARED_RL_PROF_ID; 2482 break; 2483 default: 2484 return ICE_ERR_PARAM; 2485 } 2486 /* Save existing RL prof ID for later clean up */ 2487 old_id = ice_sched_get_node_rl_prof_id(node, rl_type); 2488 /* Configure BW scheduling parameters */ 2489 status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id); 2490 if (status) 2491 return status; 2492 2493 /* Remove stale RL profile ID */ 2494 if (old_id == ICE_SCHED_DFLT_RL_PROF_ID || 2495 old_id == ICE_SCHED_INVAL_PROF_ID) 2496 return 0; 2497 2498 return ice_sched_rm_rl_profile(pi, layer_num, profile_type, old_id); 2499 } 2500 2501 /** 2502 * ice_sched_set_eir_srl_excl - set EIR/SRL exclusiveness 2503 * @pi: port information structure 2504 * @node: pointer to node structure 2505 * @layer_num: layer number where rate limit profiles are saved 2506 * @rl_type: rate limit type min, max, or shared 2507 * @bw: bandwidth value 2508 * 2509 * This function prepares node element's bandwidth to SRL or EIR exclusively. 2510 * EIR BW and Shared BW profiles are mutually exclusive and hence only one of 2511 * them may be set for any given element. This function needs to be called 2512 * with the scheduler lock held. 2513 */ 2514 static enum ice_status 2515 ice_sched_set_eir_srl_excl(struct ice_port_info *pi, 2516 struct ice_sched_node *node, 2517 u8 layer_num, enum ice_rl_type rl_type, u32 bw) 2518 { 2519 if (rl_type == ICE_SHARED_BW) { 2520 /* SRL node passed in this case, it may be different node */ 2521 if (bw == ICE_SCHED_DFLT_BW) 2522 /* SRL being removed, ice_sched_cfg_node_bw_lmt() 2523 * enables EIR to default. EIR is not set in this 2524 * case, so no additional action is required. 2525 */ 2526 return 0; 2527 2528 /* SRL being configured, set EIR to default here. 2529 * ice_sched_cfg_node_bw_lmt() disables EIR when it 2530 * configures SRL 2531 */ 2532 return ice_sched_set_node_bw_dflt(pi, node, ICE_MAX_BW, 2533 layer_num); 2534 } else if (rl_type == ICE_MAX_BW && 2535 node->info.data.valid_sections & ICE_AQC_ELEM_VALID_SHARED) { 2536 /* Remove Shared profile. Set default shared BW call 2537 * removes shared profile for a node. 2538 */ 2539 return ice_sched_set_node_bw_dflt(pi, node, 2540 ICE_SHARED_BW, 2541 layer_num); 2542 } 2543 return 0; 2544 } 2545 2546 /** 2547 * ice_sched_set_node_bw - set node's bandwidth 2548 * @pi: port information structure 2549 * @node: tree node 2550 * @rl_type: rate limit type min, max, or shared 2551 * @bw: bandwidth in Kbps - Kilo bits per sec 2552 * @layer_num: layer number 2553 * 2554 * This function adds new profile corresponding to requested BW, configures 2555 * node's RL profile ID of type CIR, EIR, or SRL, and removes old profile 2556 * ID from local database. The caller needs to hold scheduler lock. 2557 */ 2558 static enum ice_status 2559 ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node, 2560 enum ice_rl_type rl_type, u32 bw, u8 layer_num) 2561 { 2562 struct ice_aqc_rl_profile_info *rl_prof_info; 2563 enum ice_status status = ICE_ERR_PARAM; 2564 struct ice_hw *hw = pi->hw; 2565 u16 old_id, rl_prof_id; 2566 2567 rl_prof_info = ice_sched_add_rl_profile(pi, rl_type, bw, layer_num); 2568 if (!rl_prof_info) 2569 return status; 2570 2571 rl_prof_id = le16_to_cpu(rl_prof_info->profile.profile_id); 2572 2573 /* Save existing RL prof ID for later clean up */ 2574 old_id = ice_sched_get_node_rl_prof_id(node, rl_type); 2575 /* Configure BW scheduling parameters */ 2576 status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id); 2577 if (status) 2578 return status; 2579 2580 /* New changes has been applied */ 2581 /* Increment the profile ID reference count */ 2582 rl_prof_info->prof_id_ref++; 2583 2584 /* Check for old ID removal */ 2585 if ((old_id == ICE_SCHED_DFLT_RL_PROF_ID && rl_type != ICE_SHARED_BW) || 2586 old_id == ICE_SCHED_INVAL_PROF_ID || old_id == rl_prof_id) 2587 return 0; 2588 2589 return ice_sched_rm_rl_profile(pi, layer_num, 2590 rl_prof_info->profile.flags & 2591 ICE_AQC_RL_PROFILE_TYPE_M, old_id); 2592 } 2593 2594 /** 2595 * ice_sched_set_node_bw_lmt - set node's BW limit 2596 * @pi: port information structure 2597 * @node: tree node 2598 * @rl_type: rate limit type min, max, or shared 2599 * @bw: bandwidth in Kbps - Kilo bits per sec 2600 * 2601 * It updates node's BW limit parameters like BW RL profile ID of type CIR, 2602 * EIR, or SRL. The caller needs to hold scheduler lock. 2603 */ 2604 static enum ice_status 2605 ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node, 2606 enum ice_rl_type rl_type, u32 bw) 2607 { 2608 struct ice_sched_node *cfg_node = node; 2609 enum ice_status status; 2610 2611 struct ice_hw *hw; 2612 u8 layer_num; 2613 2614 if (!pi) 2615 return ICE_ERR_PARAM; 2616 hw = pi->hw; 2617 /* Remove unused RL profile IDs from HW and SW DB */ 2618 ice_sched_rm_unused_rl_prof(pi); 2619 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type, 2620 node->tx_sched_layer); 2621 if (layer_num >= hw->num_tx_sched_layers) 2622 return ICE_ERR_PARAM; 2623 2624 if (rl_type == ICE_SHARED_BW) { 2625 /* SRL node may be different */ 2626 cfg_node = ice_sched_get_srl_node(node, layer_num); 2627 if (!cfg_node) 2628 return ICE_ERR_CFG; 2629 } 2630 /* EIR BW and Shared BW profiles are mutually exclusive and 2631 * hence only one of them may be set for any given element 2632 */ 2633 status = ice_sched_set_eir_srl_excl(pi, cfg_node, layer_num, rl_type, 2634 bw); 2635 if (status) 2636 return status; 2637 if (bw == ICE_SCHED_DFLT_BW) 2638 return ice_sched_set_node_bw_dflt(pi, cfg_node, rl_type, 2639 layer_num); 2640 return ice_sched_set_node_bw(pi, cfg_node, rl_type, bw, layer_num); 2641 } 2642 2643 /** 2644 * ice_sched_set_node_bw_dflt_lmt - set node's BW limit to default 2645 * @pi: port information structure 2646 * @node: pointer to node structure 2647 * @rl_type: rate limit type min, max, or shared 2648 * 2649 * This function configures node element's BW rate limit profile ID of 2650 * type CIR, EIR, or SRL to default. This function needs to be called 2651 * with the scheduler lock held. 2652 */ 2653 static enum ice_status 2654 ice_sched_set_node_bw_dflt_lmt(struct ice_port_info *pi, 2655 struct ice_sched_node *node, 2656 enum ice_rl_type rl_type) 2657 { 2658 return ice_sched_set_node_bw_lmt(pi, node, rl_type, 2659 ICE_SCHED_DFLT_BW); 2660 } 2661 2662 /** 2663 * ice_sched_validate_srl_node - Check node for SRL applicability 2664 * @node: sched node to configure 2665 * @sel_layer: selected SRL layer 2666 * 2667 * This function checks if the SRL can be applied to a selected layer node on 2668 * behalf of the requested node (first argument). This function needs to be 2669 * called with scheduler lock held. 2670 */ 2671 static enum ice_status 2672 ice_sched_validate_srl_node(struct ice_sched_node *node, u8 sel_layer) 2673 { 2674 /* SRL profiles are not available on all layers. Check if the 2675 * SRL profile can be applied to a node above or below the 2676 * requested node. SRL configuration is possible only if the 2677 * selected layer's node has single child. 2678 */ 2679 if (sel_layer == node->tx_sched_layer || 2680 ((sel_layer == node->tx_sched_layer + 1) && 2681 node->num_children == 1) || 2682 ((sel_layer == node->tx_sched_layer - 1) && 2683 (node->parent && node->parent->num_children == 1))) 2684 return 0; 2685 2686 return ICE_ERR_CFG; 2687 } 2688 2689 /** 2690 * ice_sched_save_q_bw - save queue node's BW information 2691 * @q_ctx: queue context structure 2692 * @rl_type: rate limit type min, max, or shared 2693 * @bw: bandwidth in Kbps - Kilo bits per sec 2694 * 2695 * Save BW information of queue type node for post replay use. 2696 */ 2697 static enum ice_status 2698 ice_sched_save_q_bw(struct ice_q_ctx *q_ctx, enum ice_rl_type rl_type, u32 bw) 2699 { 2700 switch (rl_type) { 2701 case ICE_MIN_BW: 2702 ice_set_clear_cir_bw(&q_ctx->bw_t_info, bw); 2703 break; 2704 case ICE_MAX_BW: 2705 ice_set_clear_eir_bw(&q_ctx->bw_t_info, bw); 2706 break; 2707 case ICE_SHARED_BW: 2708 ice_set_clear_shared_bw(&q_ctx->bw_t_info, bw); 2709 break; 2710 default: 2711 return ICE_ERR_PARAM; 2712 } 2713 return 0; 2714 } 2715 2716 /** 2717 * ice_sched_set_q_bw_lmt - sets queue BW limit 2718 * @pi: port information structure 2719 * @vsi_handle: sw VSI handle 2720 * @tc: traffic class 2721 * @q_handle: software queue handle 2722 * @rl_type: min, max, or shared 2723 * @bw: bandwidth in Kbps 2724 * 2725 * This function sets BW limit of queue scheduling node. 2726 */ 2727 static enum ice_status 2728 ice_sched_set_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc, 2729 u16 q_handle, enum ice_rl_type rl_type, u32 bw) 2730 { 2731 enum ice_status status = ICE_ERR_PARAM; 2732 struct ice_sched_node *node; 2733 struct ice_q_ctx *q_ctx; 2734 2735 if (!ice_is_vsi_valid(pi->hw, vsi_handle)) 2736 return ICE_ERR_PARAM; 2737 mutex_lock(&pi->sched_lock); 2738 q_ctx = ice_get_lan_q_ctx(pi->hw, vsi_handle, tc, q_handle); 2739 if (!q_ctx) 2740 goto exit_q_bw_lmt; 2741 node = ice_sched_find_node_by_teid(pi->root, q_ctx->q_teid); 2742 if (!node) { 2743 ice_debug(pi->hw, ICE_DBG_SCHED, "Wrong q_teid\n"); 2744 goto exit_q_bw_lmt; 2745 } 2746 2747 /* Return error if it is not a leaf node */ 2748 if (node->info.data.elem_type != ICE_AQC_ELEM_TYPE_LEAF) 2749 goto exit_q_bw_lmt; 2750 2751 /* SRL bandwidth layer selection */ 2752 if (rl_type == ICE_SHARED_BW) { 2753 u8 sel_layer; /* selected layer */ 2754 2755 sel_layer = ice_sched_get_rl_prof_layer(pi, rl_type, 2756 node->tx_sched_layer); 2757 if (sel_layer >= pi->hw->num_tx_sched_layers) { 2758 status = ICE_ERR_PARAM; 2759 goto exit_q_bw_lmt; 2760 } 2761 status = ice_sched_validate_srl_node(node, sel_layer); 2762 if (status) 2763 goto exit_q_bw_lmt; 2764 } 2765 2766 if (bw == ICE_SCHED_DFLT_BW) 2767 status = ice_sched_set_node_bw_dflt_lmt(pi, node, rl_type); 2768 else 2769 status = ice_sched_set_node_bw_lmt(pi, node, rl_type, bw); 2770 2771 if (!status) 2772 status = ice_sched_save_q_bw(q_ctx, rl_type, bw); 2773 2774 exit_q_bw_lmt: 2775 mutex_unlock(&pi->sched_lock); 2776 return status; 2777 } 2778 2779 /** 2780 * ice_cfg_q_bw_lmt - configure queue BW limit 2781 * @pi: port information structure 2782 * @vsi_handle: sw VSI handle 2783 * @tc: traffic class 2784 * @q_handle: software queue handle 2785 * @rl_type: min, max, or shared 2786 * @bw: bandwidth in Kbps 2787 * 2788 * This function configures BW limit of queue scheduling node. 2789 */ 2790 enum ice_status 2791 ice_cfg_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc, 2792 u16 q_handle, enum ice_rl_type rl_type, u32 bw) 2793 { 2794 return ice_sched_set_q_bw_lmt(pi, vsi_handle, tc, q_handle, rl_type, 2795 bw); 2796 } 2797 2798 /** 2799 * ice_cfg_q_bw_dflt_lmt - configure queue BW default limit 2800 * @pi: port information structure 2801 * @vsi_handle: sw VSI handle 2802 * @tc: traffic class 2803 * @q_handle: software queue handle 2804 * @rl_type: min, max, or shared 2805 * 2806 * This function configures BW default limit of queue scheduling node. 2807 */ 2808 enum ice_status 2809 ice_cfg_q_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc, 2810 u16 q_handle, enum ice_rl_type rl_type) 2811 { 2812 return ice_sched_set_q_bw_lmt(pi, vsi_handle, tc, q_handle, rl_type, 2813 ICE_SCHED_DFLT_BW); 2814 } 2815 2816 /** 2817 * ice_cfg_rl_burst_size - Set burst size value 2818 * @hw: pointer to the HW struct 2819 * @bytes: burst size in bytes 2820 * 2821 * This function configures/set the burst size to requested new value. The new 2822 * burst size value is used for future rate limit calls. It doesn't change the 2823 * existing or previously created RL profiles. 2824 */ 2825 enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes) 2826 { 2827 u16 burst_size_to_prog; 2828 2829 if (bytes < ICE_MIN_BURST_SIZE_ALLOWED || 2830 bytes > ICE_MAX_BURST_SIZE_ALLOWED) 2831 return ICE_ERR_PARAM; 2832 if (ice_round_to_num(bytes, 64) <= 2833 ICE_MAX_BURST_SIZE_64_BYTE_GRANULARITY) { 2834 /* 64 byte granularity case */ 2835 /* Disable MSB granularity bit */ 2836 burst_size_to_prog = ICE_64_BYTE_GRANULARITY; 2837 /* round number to nearest 64 byte granularity */ 2838 bytes = ice_round_to_num(bytes, 64); 2839 /* The value is in 64 byte chunks */ 2840 burst_size_to_prog |= (u16)(bytes / 64); 2841 } else { 2842 /* k bytes granularity case */ 2843 /* Enable MSB granularity bit */ 2844 burst_size_to_prog = ICE_KBYTE_GRANULARITY; 2845 /* round number to nearest 1024 granularity */ 2846 bytes = ice_round_to_num(bytes, 1024); 2847 /* check rounding doesn't go beyond allowed */ 2848 if (bytes > ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY) 2849 bytes = ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY; 2850 /* The value is in k bytes */ 2851 burst_size_to_prog |= (u16)(bytes / 1024); 2852 } 2853 hw->max_burst_size = burst_size_to_prog; 2854 return 0; 2855 } 2856 2857 /** 2858 * ice_sched_replay_node_prio - re-configure node priority 2859 * @hw: pointer to the HW struct 2860 * @node: sched node to configure 2861 * @priority: priority value 2862 * 2863 * This function configures node element's priority value. It 2864 * needs to be called with scheduler lock held. 2865 */ 2866 static enum ice_status 2867 ice_sched_replay_node_prio(struct ice_hw *hw, struct ice_sched_node *node, 2868 u8 priority) 2869 { 2870 struct ice_aqc_txsched_elem_data buf; 2871 struct ice_aqc_txsched_elem *data; 2872 enum ice_status status; 2873 2874 buf = node->info; 2875 data = &buf.data; 2876 data->valid_sections |= ICE_AQC_ELEM_VALID_GENERIC; 2877 data->generic = priority; 2878 2879 /* Configure element */ 2880 status = ice_sched_update_elem(hw, node, &buf); 2881 return status; 2882 } 2883 2884 /** 2885 * ice_sched_replay_node_bw - replay node(s) BW 2886 * @hw: pointer to the HW struct 2887 * @node: sched node to configure 2888 * @bw_t_info: BW type information 2889 * 2890 * This function restores node's BW from bw_t_info. The caller needs 2891 * to hold the scheduler lock. 2892 */ 2893 static enum ice_status 2894 ice_sched_replay_node_bw(struct ice_hw *hw, struct ice_sched_node *node, 2895 struct ice_bw_type_info *bw_t_info) 2896 { 2897 struct ice_port_info *pi = hw->port_info; 2898 enum ice_status status = ICE_ERR_PARAM; 2899 u16 bw_alloc; 2900 2901 if (!node) 2902 return status; 2903 if (bitmap_empty(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_CNT)) 2904 return 0; 2905 if (test_bit(ICE_BW_TYPE_PRIO, bw_t_info->bw_t_bitmap)) { 2906 status = ice_sched_replay_node_prio(hw, node, 2907 bw_t_info->generic); 2908 if (status) 2909 return status; 2910 } 2911 if (test_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap)) { 2912 status = ice_sched_set_node_bw_lmt(pi, node, ICE_MIN_BW, 2913 bw_t_info->cir_bw.bw); 2914 if (status) 2915 return status; 2916 } 2917 if (test_bit(ICE_BW_TYPE_CIR_WT, bw_t_info->bw_t_bitmap)) { 2918 bw_alloc = bw_t_info->cir_bw.bw_alloc; 2919 status = ice_sched_cfg_node_bw_alloc(hw, node, ICE_MIN_BW, 2920 bw_alloc); 2921 if (status) 2922 return status; 2923 } 2924 if (test_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap)) { 2925 status = ice_sched_set_node_bw_lmt(pi, node, ICE_MAX_BW, 2926 bw_t_info->eir_bw.bw); 2927 if (status) 2928 return status; 2929 } 2930 if (test_bit(ICE_BW_TYPE_EIR_WT, bw_t_info->bw_t_bitmap)) { 2931 bw_alloc = bw_t_info->eir_bw.bw_alloc; 2932 status = ice_sched_cfg_node_bw_alloc(hw, node, ICE_MAX_BW, 2933 bw_alloc); 2934 if (status) 2935 return status; 2936 } 2937 if (test_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap)) 2938 status = ice_sched_set_node_bw_lmt(pi, node, ICE_SHARED_BW, 2939 bw_t_info->shared_bw); 2940 return status; 2941 } 2942 2943 /** 2944 * ice_sched_replay_q_bw - replay queue type node BW 2945 * @pi: port information structure 2946 * @q_ctx: queue context structure 2947 * 2948 * This function replays queue type node bandwidth. This function needs to be 2949 * called with scheduler lock held. 2950 */ 2951 enum ice_status 2952 ice_sched_replay_q_bw(struct ice_port_info *pi, struct ice_q_ctx *q_ctx) 2953 { 2954 struct ice_sched_node *q_node; 2955 2956 /* Following also checks the presence of node in tree */ 2957 q_node = ice_sched_find_node_by_teid(pi->root, q_ctx->q_teid); 2958 if (!q_node) 2959 return ICE_ERR_PARAM; 2960 return ice_sched_replay_node_bw(pi->hw, q_node, &q_ctx->bw_t_info); 2961 } 2962