1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (C) 2021, Intel Corporation. */ 3 4 #ifndef _ICE_PTP_H_ 5 #define _ICE_PTP_H_ 6 7 #include <linux/ptp_clock_kernel.h> 8 #include <linux/kthread.h> 9 10 #include "ice_ptp_hw.h" 11 12 /* The ice hardware captures Tx hardware timestamps in the PHY. The timestamp 13 * is stored in a buffer of registers. Depending on the specific hardware, 14 * this buffer might be shared across multiple PHY ports. 15 * 16 * On transmit of a packet to be timestamped, software is responsible for 17 * selecting an open index. Hardware makes no attempt to lock or prevent 18 * re-use of an index for multiple packets. 19 * 20 * To handle this, timestamp indexes must be tracked by software to ensure 21 * that an index is not re-used for multiple transmitted packets. The 22 * structures and functions declared in this file track the available Tx 23 * register indexes, as well as provide storage for the SKB pointers. 24 * 25 * To allow multiple ports to access the shared register block independently, 26 * the blocks are split up so that indexes are assigned to each port based on 27 * hardware logical port number. 28 * 29 * The timestamp blocks are handled differently for E810- and E822-based 30 * devices. In E810 devices, each port has its own block of timestamps, while in 31 * E822 there is a need to logically break the block of registers into smaller 32 * chunks based on the port number to avoid collisions. 33 * 34 * Example for port 5 in E810: 35 * +--------+--------+--------+--------+--------+--------+--------+--------+ 36 * |register|register|register|register|register|register|register|register| 37 * | block | block | block | block | block | block | block | block | 38 * | for | for | for | for | for | for | for | for | 39 * | port 0 | port 1 | port 2 | port 3 | port 4 | port 5 | port 6 | port 7 | 40 * +--------+--------+--------+--------+--------+--------+--------+--------+ 41 * ^^ 42 * || 43 * |--- quad offset is always 0 44 * ---- quad number 45 * 46 * Example for port 5 in E822: 47 * +-----------------------------+-----------------------------+ 48 * | register block for quad 0 | register block for quad 1 | 49 * |+------+------+------+------+|+------+------+------+------+| 50 * ||port 0|port 1|port 2|port 3|||port 0|port 1|port 2|port 3|| 51 * |+------+------+------+------+|+------+------+------+------+| 52 * +-----------------------------+-------^---------------------+ 53 * ^ | 54 * | --- quad offset* 55 * ---- quad number 56 * 57 * * PHY port 5 is port 1 in quad 1 58 * 59 */ 60 61 /** 62 * struct ice_tx_tstamp - Tracking for a single Tx timestamp 63 * @skb: pointer to the SKB for this timestamp request 64 * @start: jiffies when the timestamp was first requested 65 * @cached_tstamp: last read timestamp 66 * 67 * This structure tracks a single timestamp request. The SKB pointer is 68 * provided when initiating a request. The start time is used to ensure that 69 * we discard old requests that were not fulfilled within a 2 second time 70 * window. 71 * Timestamp values in the PHY are read only and do not get cleared except at 72 * hardware reset or when a new timestamp value is captured. 73 * 74 * Some PHY types do not provide a "ready" bitmap indicating which timestamp 75 * indexes are valid. In these cases, we use a cached_tstamp to keep track of 76 * the last timestamp we read for a given index. If the current timestamp 77 * value is the same as the cached value, we assume a new timestamp hasn't 78 * been captured. This avoids reporting stale timestamps to the stack. This is 79 * only done if the has_ready_bitmap flag is not set in ice_ptp_tx structure. 80 */ 81 struct ice_tx_tstamp { 82 struct sk_buff *skb; 83 unsigned long start; 84 u64 cached_tstamp; 85 }; 86 87 /** 88 * enum ice_tx_tstamp_work - Status of Tx timestamp work function 89 * @ICE_TX_TSTAMP_WORK_DONE: Tx timestamp processing is complete 90 * @ICE_TX_TSTAMP_WORK_PENDING: More Tx timestamps are pending 91 */ 92 enum ice_tx_tstamp_work { 93 ICE_TX_TSTAMP_WORK_DONE = 0, 94 ICE_TX_TSTAMP_WORK_PENDING, 95 }; 96 97 /** 98 * struct ice_ptp_tx - Tracking structure for all Tx timestamp requests on a port 99 * @lock: lock to prevent concurrent access to fields of this struct 100 * @tstamps: array of len to store outstanding requests 101 * @in_use: bitmap of len to indicate which slots are in use 102 * @stale: bitmap of len to indicate slots which have stale timestamps 103 * @block: which memory block (quad or port) the timestamps are captured in 104 * @offset: offset into timestamp block to get the real index 105 * @len: length of the tstamps and in_use fields. 106 * @init: if true, the tracker is initialized; 107 * @calibrating: if true, the PHY is calibrating the Tx offset. During this 108 * window, timestamps are temporarily disabled. 109 * @has_ready_bitmap: if true, the hardware has a valid Tx timestamp ready 110 * bitmap register. If false, fall back to verifying new 111 * timestamp values against previously cached copy. 112 * @last_ll_ts_idx_read: index of the last LL TS read by the FW 113 */ 114 struct ice_ptp_tx { 115 spinlock_t lock; /* lock protecting in_use bitmap */ 116 struct ice_tx_tstamp *tstamps; 117 unsigned long *in_use; 118 unsigned long *stale; 119 u8 block; 120 u8 offset; 121 u8 len; 122 u8 init : 1; 123 u8 calibrating : 1; 124 u8 has_ready_bitmap : 1; 125 s8 last_ll_ts_idx_read; 126 }; 127 128 /* Quad and port information for initializing timestamp blocks */ 129 #define INDEX_PER_QUAD 64 130 #define INDEX_PER_PORT_E82X 16 131 #define INDEX_PER_PORT_E810 64 132 #define INDEX_PER_PORT_ETH56G 64 133 134 /** 135 * struct ice_ptp_port - data used to initialize an external port for PTP 136 * 137 * This structure contains data indicating whether a single external port is 138 * ready for PTP functionality. It is used to track the port initialization 139 * and determine when the port's PHY offset is valid. 140 * 141 * @list_node: list member structure 142 * @tx: Tx timestamp tracking for this port 143 * @ov_work: delayed work task for tracking when PHY offset is valid 144 * @ps_lock: mutex used to protect the overall PTP PHY start procedure 145 * @link_up: indicates whether the link is up 146 * @tx_fifo_busy_cnt: number of times the Tx FIFO was busy 147 * @port_num: the port number this structure represents 148 */ 149 struct ice_ptp_port { 150 struct list_head list_node; 151 struct ice_ptp_tx tx; 152 struct kthread_delayed_work ov_work; 153 struct mutex ps_lock; /* protects overall PTP PHY start procedure */ 154 bool link_up; 155 u8 tx_fifo_busy_cnt; 156 u8 port_num; 157 }; 158 159 enum ice_ptp_tx_interrupt { 160 ICE_PTP_TX_INTERRUPT_NONE = 0, 161 ICE_PTP_TX_INTERRUPT_SELF, 162 ICE_PTP_TX_INTERRUPT_ALL, 163 }; 164 165 #define GLTSYN_TGT_H_IDX_MAX 4 166 167 enum ice_ptp_state { 168 ICE_PTP_UNINIT = 0, 169 ICE_PTP_INITIALIZING, 170 ICE_PTP_READY, 171 ICE_PTP_RESETTING, 172 ICE_PTP_ERROR, 173 }; 174 175 enum ice_ptp_pin { 176 SDP0 = 0, 177 SDP1, 178 SDP2, 179 SDP3, 180 TIME_SYNC, 181 ONE_PPS 182 }; 183 184 enum ice_ptp_pin_nvm { 185 GNSS = 0, 186 SMA1, 187 UFL1, 188 SMA2, 189 UFL2, 190 NUM_PTP_PINS_NVM, 191 GPIO_NA = 9 192 }; 193 194 /* Per-channel register definitions */ 195 #define GLTSYN_AUX_OUT(_chan, _idx) (GLTSYN_AUX_OUT_0(_idx) + ((_chan) * 8)) 196 #define GLTSYN_AUX_IN(_chan, _idx) (GLTSYN_AUX_IN_0(_idx) + ((_chan) * 8)) 197 #define GLTSYN_CLKO(_chan, _idx) (GLTSYN_CLKO_0(_idx) + ((_chan) * 8)) 198 #define GLTSYN_TGT_L(_chan, _idx) (GLTSYN_TGT_L_0(_idx) + ((_chan) * 16)) 199 #define GLTSYN_TGT_H(_chan, _idx) (GLTSYN_TGT_H_0(_idx) + ((_chan) * 16)) 200 #define GLTSYN_EVNT_L(_chan, _idx) (GLTSYN_EVNT_L_0(_idx) + ((_chan) * 16)) 201 #define GLTSYN_EVNT_H(_chan, _idx) (GLTSYN_EVNT_H_0(_idx) + ((_chan) * 16)) 202 #define GLTSYN_EVNT_H_IDX_MAX 3 203 204 /* Pin definitions for PTP */ 205 #define ICE_N_PINS_MAX 6 206 #define ICE_SMA_PINS_NUM 4 207 #define ICE_PIN_DESC_ARR_LEN(_arr) (sizeof(_arr) / \ 208 sizeof(struct ice_ptp_pin_desc)) 209 210 /** 211 * struct ice_ptp_pin_desc - hardware pin description data 212 * @name_idx: index of the name of pin in ice_pin_names 213 * @gpio: the associated GPIO input and output pins 214 * 215 * Structure describing a PTP-capable GPIO pin that extends ptp_pin_desc array 216 * for the device. Device families have separate sets of available pins with 217 * varying restrictions. 218 */ 219 struct ice_ptp_pin_desc { 220 int name_idx; 221 int gpio[2]; 222 }; 223 224 /** 225 * struct ice_ptp - data used for integrating with CONFIG_PTP_1588_CLOCK 226 * @state: current state of PTP state machine 227 * @tx_interrupt_mode: the TX interrupt mode for the PTP clock 228 * @port: data for the PHY port initialization procedure 229 * @work: delayed work function for periodic tasks 230 * @cached_phc_time: a cached copy of the PHC time for timestamp extension 231 * @cached_phc_jiffies: jiffies when cached_phc_time was last updated 232 * @kworker: kwork thread for handling periodic work 233 * @ext_ts_irq: the external timestamp IRQ in use 234 * @pin_desc: structure defining pins 235 * @ice_pin_desc: internal structure describing pin relations 236 * @perout_rqs: cached periodic output requests 237 * @extts_rqs: cached external timestamp requests 238 * @info: structure defining PTP hardware capabilities 239 * @clock: pointer to registered PTP clock device 240 * @tstamp_config: hardware timestamping configuration 241 * @reset_time: kernel time after clock stop on reset 242 * @tx_hwtstamp_skipped: number of Tx time stamp requests skipped 243 * @tx_hwtstamp_timeouts: number of Tx skbs discarded with no time stamp 244 * @tx_hwtstamp_flushed: number of Tx skbs flushed due to interface closed 245 * @tx_hwtstamp_discarded: number of Tx skbs discarded due to cached PHC time 246 * being too old to correctly extend timestamp 247 * @late_cached_phc_updates: number of times cached PHC update is late 248 */ 249 struct ice_ptp { 250 enum ice_ptp_state state; 251 enum ice_ptp_tx_interrupt tx_interrupt_mode; 252 struct ice_ptp_port port; 253 struct kthread_delayed_work work; 254 u64 cached_phc_time; 255 unsigned long cached_phc_jiffies; 256 struct kthread_worker *kworker; 257 u8 ext_ts_irq; 258 struct ptp_pin_desc pin_desc[ICE_N_PINS_MAX]; 259 const struct ice_ptp_pin_desc *ice_pin_desc; 260 struct ptp_perout_request perout_rqs[GLTSYN_TGT_H_IDX_MAX]; 261 struct ptp_extts_request extts_rqs[GLTSYN_EVNT_H_IDX_MAX]; 262 struct ptp_clock_info info; 263 struct ptp_clock *clock; 264 struct hwtstamp_config tstamp_config; 265 u64 reset_time; 266 u32 tx_hwtstamp_skipped; 267 u32 tx_hwtstamp_timeouts; 268 u32 tx_hwtstamp_flushed; 269 u32 tx_hwtstamp_discarded; 270 u32 late_cached_phc_updates; 271 }; 272 273 #define __ptp_port_to_ptp(p) \ 274 container_of((p), struct ice_ptp, port) 275 #define ptp_port_to_pf(p) \ 276 container_of(__ptp_port_to_ptp((p)), struct ice_pf, ptp) 277 278 #define __ptp_info_to_ptp(i) \ 279 container_of((i), struct ice_ptp, info) 280 #define ptp_info_to_pf(i) \ 281 container_of(__ptp_info_to_ptp((i)), struct ice_pf, ptp) 282 283 #define PFTSYN_SEM_BYTES 4 284 #define PTP_SHARED_CLK_IDX_VALID BIT(31) 285 #define TS_CMD_MASK 0xF 286 #define SYNC_EXEC_CMD 0x3 287 #define ICE_PTP_TS_VALID BIT(0) 288 289 #define FIFO_EMPTY BIT(2) 290 #define FIFO_OK 0xFF 291 #define ICE_PTP_FIFO_NUM_CHECKS 5 292 293 #if IS_ENABLED(CONFIG_PTP_1588_CLOCK) 294 int ice_ptp_clock_index(struct ice_pf *pf); 295 struct ice_pf; 296 int ice_ptp_set_ts_config(struct ice_pf *pf, struct ifreq *ifr); 297 int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr); 298 void ice_ptp_restore_timestamp_mode(struct ice_pf *pf); 299 300 void ice_ptp_extts_event(struct ice_pf *pf); 301 s8 ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb); 302 void ice_ptp_req_tx_single_tstamp(struct ice_ptp_tx *tx, u8 idx); 303 void ice_ptp_complete_tx_single_tstamp(struct ice_ptp_tx *tx); 304 enum ice_tx_tstamp_work ice_ptp_process_ts(struct ice_pf *pf); 305 306 u64 ice_ptp_get_rx_hwts(const union ice_32b_rx_flex_desc *rx_desc, 307 const struct ice_pkt_ctx *pkt_ctx); 308 void ice_ptp_rebuild(struct ice_pf *pf, enum ice_reset_req reset_type); 309 void ice_ptp_prepare_for_reset(struct ice_pf *pf, 310 enum ice_reset_req reset_type); 311 void ice_ptp_init(struct ice_pf *pf); 312 void ice_ptp_release(struct ice_pf *pf); 313 void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup); 314 #else /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */ 315 static inline int ice_ptp_set_ts_config(struct ice_pf *pf, struct ifreq *ifr) 316 { 317 return -EOPNOTSUPP; 318 } 319 320 static inline int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr) 321 { 322 return -EOPNOTSUPP; 323 } 324 325 static inline void ice_ptp_restore_timestamp_mode(struct ice_pf *pf) { } 326 static inline void ice_ptp_extts_event(struct ice_pf *pf) { } 327 static inline s8 328 ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb) 329 { 330 return -1; 331 } 332 333 static inline void ice_ptp_req_tx_single_tstamp(struct ice_ptp_tx *tx, u8 idx) 334 { } 335 336 static inline void ice_ptp_complete_tx_single_tstamp(struct ice_ptp_tx *tx) { } 337 338 static inline bool ice_ptp_process_ts(struct ice_pf *pf) 339 { 340 return true; 341 } 342 343 static inline u64 344 ice_ptp_get_rx_hwts(const union ice_32b_rx_flex_desc *rx_desc, 345 const struct ice_pkt_ctx *pkt_ctx) 346 { 347 return 0; 348 } 349 350 static inline void ice_ptp_rebuild(struct ice_pf *pf, 351 enum ice_reset_req reset_type) 352 { 353 } 354 355 static inline void ice_ptp_prepare_for_reset(struct ice_pf *pf, 356 enum ice_reset_req reset_type) 357 { 358 } 359 static inline void ice_ptp_init(struct ice_pf *pf) { } 360 static inline void ice_ptp_release(struct ice_pf *pf) { } 361 static inline void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup) 362 { 363 } 364 365 static inline int ice_ptp_clock_index(struct ice_pf *pf) 366 { 367 return -1; 368 } 369 #endif /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */ 370 #endif /* _ICE_PTP_H_ */ 371