1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (C) 2021, Intel Corporation. */ 3 4 #ifndef _ICE_PTP_H_ 5 #define _ICE_PTP_H_ 6 7 #include <linux/ptp_clock_kernel.h> 8 #include <linux/kthread.h> 9 10 #include "ice_ptp_hw.h" 11 12 enum ice_ptp_pin_e810 { 13 GPIO_20 = 0, 14 GPIO_21, 15 GPIO_22, 16 GPIO_23, 17 NUM_PTP_PIN_E810 18 }; 19 20 enum ice_ptp_pin_e810t { 21 GNSS = 0, 22 SMA1, 23 UFL1, 24 SMA2, 25 UFL2, 26 NUM_PTP_PINS_E810T 27 }; 28 29 struct ice_perout_channel { 30 bool ena; 31 u32 gpio_pin; 32 u32 flags; 33 u64 period; 34 u64 start_time; 35 }; 36 37 struct ice_extts_channel { 38 bool ena; 39 u32 gpio_pin; 40 u32 flags; 41 }; 42 43 /* The ice hardware captures Tx hardware timestamps in the PHY. The timestamp 44 * is stored in a buffer of registers. Depending on the specific hardware, 45 * this buffer might be shared across multiple PHY ports. 46 * 47 * On transmit of a packet to be timestamped, software is responsible for 48 * selecting an open index. Hardware makes no attempt to lock or prevent 49 * re-use of an index for multiple packets. 50 * 51 * To handle this, timestamp indexes must be tracked by software to ensure 52 * that an index is not re-used for multiple transmitted packets. The 53 * structures and functions declared in this file track the available Tx 54 * register indexes, as well as provide storage for the SKB pointers. 55 * 56 * To allow multiple ports to access the shared register block independently, 57 * the blocks are split up so that indexes are assigned to each port based on 58 * hardware logical port number. 59 * 60 * The timestamp blocks are handled differently for E810- and E822-based 61 * devices. In E810 devices, each port has its own block of timestamps, while in 62 * E822 there is a need to logically break the block of registers into smaller 63 * chunks based on the port number to avoid collisions. 64 * 65 * Example for port 5 in E810: 66 * +--------+--------+--------+--------+--------+--------+--------+--------+ 67 * |register|register|register|register|register|register|register|register| 68 * | block | block | block | block | block | block | block | block | 69 * | for | for | for | for | for | for | for | for | 70 * | port 0 | port 1 | port 2 | port 3 | port 4 | port 5 | port 6 | port 7 | 71 * +--------+--------+--------+--------+--------+--------+--------+--------+ 72 * ^^ 73 * || 74 * |--- quad offset is always 0 75 * ---- quad number 76 * 77 * Example for port 5 in E822: 78 * +-----------------------------+-----------------------------+ 79 * | register block for quad 0 | register block for quad 1 | 80 * |+------+------+------+------+|+------+------+------+------+| 81 * ||port 0|port 1|port 2|port 3|||port 0|port 1|port 2|port 3|| 82 * |+------+------+------+------+|+------+------+------+------+| 83 * +-----------------------------+-------^---------------------+ 84 * ^ | 85 * | --- quad offset* 86 * ---- quad number 87 * 88 * * PHY port 5 is port 1 in quad 1 89 * 90 */ 91 92 /** 93 * struct ice_tx_tstamp - Tracking for a single Tx timestamp 94 * @skb: pointer to the SKB for this timestamp request 95 * @start: jiffies when the timestamp was first requested 96 * @cached_tstamp: last read timestamp 97 * 98 * This structure tracks a single timestamp request. The SKB pointer is 99 * provided when initiating a request. The start time is used to ensure that 100 * we discard old requests that were not fulfilled within a 2 second time 101 * window. 102 * Timestamp values in the PHY are read only and do not get cleared except at 103 * hardware reset or when a new timestamp value is captured. 104 * 105 * Some PHY types do not provide a "ready" bitmap indicating which timestamp 106 * indexes are valid. In these cases, we use a cached_tstamp to keep track of 107 * the last timestamp we read for a given index. If the current timestamp 108 * value is the same as the cached value, we assume a new timestamp hasn't 109 * been captured. This avoids reporting stale timestamps to the stack. This is 110 * only done if the has_ready_bitmap flag is not set in ice_ptp_tx structure. 111 */ 112 struct ice_tx_tstamp { 113 struct sk_buff *skb; 114 unsigned long start; 115 u64 cached_tstamp; 116 }; 117 118 /** 119 * enum ice_tx_tstamp_work - Status of Tx timestamp work function 120 * @ICE_TX_TSTAMP_WORK_DONE: Tx timestamp processing is complete 121 * @ICE_TX_TSTAMP_WORK_PENDING: More Tx timestamps are pending 122 */ 123 enum ice_tx_tstamp_work { 124 ICE_TX_TSTAMP_WORK_DONE = 0, 125 ICE_TX_TSTAMP_WORK_PENDING, 126 }; 127 128 /** 129 * struct ice_ptp_tx - Tracking structure for all Tx timestamp requests on a port 130 * @lock: lock to prevent concurrent access to fields of this struct 131 * @tstamps: array of len to store outstanding requests 132 * @in_use: bitmap of len to indicate which slots are in use 133 * @stale: bitmap of len to indicate slots which have stale timestamps 134 * @block: which memory block (quad or port) the timestamps are captured in 135 * @offset: offset into timestamp block to get the real index 136 * @len: length of the tstamps and in_use fields. 137 * @init: if true, the tracker is initialized; 138 * @calibrating: if true, the PHY is calibrating the Tx offset. During this 139 * window, timestamps are temporarily disabled. 140 * @has_ready_bitmap: if true, the hardware has a valid Tx timestamp ready 141 * bitmap register. If false, fall back to verifying new 142 * timestamp values against previously cached copy. 143 * @last_ll_ts_idx_read: index of the last LL TS read by the FW 144 */ 145 struct ice_ptp_tx { 146 spinlock_t lock; /* lock protecting in_use bitmap */ 147 struct ice_tx_tstamp *tstamps; 148 unsigned long *in_use; 149 unsigned long *stale; 150 u8 block; 151 u8 offset; 152 u8 len; 153 u8 init : 1; 154 u8 calibrating : 1; 155 u8 has_ready_bitmap : 1; 156 s8 last_ll_ts_idx_read; 157 }; 158 159 /* Quad and port information for initializing timestamp blocks */ 160 #define INDEX_PER_QUAD 64 161 #define INDEX_PER_PORT_E82X 16 162 #define INDEX_PER_PORT_E810 64 163 #define INDEX_PER_PORT_ETH56G 64 164 165 /** 166 * struct ice_ptp_port - data used to initialize an external port for PTP 167 * 168 * This structure contains data indicating whether a single external port is 169 * ready for PTP functionality. It is used to track the port initialization 170 * and determine when the port's PHY offset is valid. 171 * 172 * @list_member: list member structure of auxiliary device 173 * @tx: Tx timestamp tracking for this port 174 * @aux_dev: auxiliary device associated with this port 175 * @ov_work: delayed work task for tracking when PHY offset is valid 176 * @ps_lock: mutex used to protect the overall PTP PHY start procedure 177 * @link_up: indicates whether the link is up 178 * @tx_fifo_busy_cnt: number of times the Tx FIFO was busy 179 * @port_num: the port number this structure represents 180 */ 181 struct ice_ptp_port { 182 struct list_head list_member; 183 struct ice_ptp_tx tx; 184 struct auxiliary_device aux_dev; 185 struct kthread_delayed_work ov_work; 186 struct mutex ps_lock; /* protects overall PTP PHY start procedure */ 187 bool link_up; 188 u8 tx_fifo_busy_cnt; 189 u8 port_num; 190 }; 191 192 enum ice_ptp_tx_interrupt { 193 ICE_PTP_TX_INTERRUPT_NONE = 0, 194 ICE_PTP_TX_INTERRUPT_SELF, 195 ICE_PTP_TX_INTERRUPT_ALL, 196 }; 197 198 /** 199 * struct ice_ptp_port_owner - data used to handle the PTP clock owner info 200 * 201 * This structure contains data necessary for the PTP clock owner to correctly 202 * handle the timestamping feature for all attached ports. 203 * 204 * @aux_driver: the structure carring the auxiliary driver information 205 * @ports: list of porst handled by this port owner 206 * @lock: protect access to ports list 207 */ 208 struct ice_ptp_port_owner { 209 struct auxiliary_driver aux_driver; 210 struct list_head ports; 211 struct mutex lock; 212 }; 213 214 #define GLTSYN_TGT_H_IDX_MAX 4 215 216 enum ice_ptp_state { 217 ICE_PTP_UNINIT = 0, 218 ICE_PTP_INITIALIZING, 219 ICE_PTP_READY, 220 ICE_PTP_RESETTING, 221 ICE_PTP_ERROR, 222 }; 223 224 /** 225 * struct ice_ptp - data used for integrating with CONFIG_PTP_1588_CLOCK 226 * @state: current state of PTP state machine 227 * @tx_interrupt_mode: the TX interrupt mode for the PTP clock 228 * @port: data for the PHY port initialization procedure 229 * @ports_owner: data for the auxiliary driver owner 230 * @work: delayed work function for periodic tasks 231 * @cached_phc_time: a cached copy of the PHC time for timestamp extension 232 * @cached_phc_jiffies: jiffies when cached_phc_time was last updated 233 * @ext_ts_chan: the external timestamp channel in use 234 * @ext_ts_irq: the external timestamp IRQ in use 235 * @kworker: kwork thread for handling periodic work 236 * @perout_channels: periodic output data 237 * @extts_channels: channels for external timestamps 238 * @info: structure defining PTP hardware capabilities 239 * @clock: pointer to registered PTP clock device 240 * @tstamp_config: hardware timestamping configuration 241 * @reset_time: kernel time after clock stop on reset 242 * @tx_hwtstamp_skipped: number of Tx time stamp requests skipped 243 * @tx_hwtstamp_timeouts: number of Tx skbs discarded with no time stamp 244 * @tx_hwtstamp_flushed: number of Tx skbs flushed due to interface closed 245 * @tx_hwtstamp_discarded: number of Tx skbs discarded due to cached PHC time 246 * being too old to correctly extend timestamp 247 * @late_cached_phc_updates: number of times cached PHC update is late 248 */ 249 struct ice_ptp { 250 enum ice_ptp_state state; 251 enum ice_ptp_tx_interrupt tx_interrupt_mode; 252 struct ice_ptp_port port; 253 struct ice_ptp_port_owner ports_owner; 254 struct kthread_delayed_work work; 255 u64 cached_phc_time; 256 unsigned long cached_phc_jiffies; 257 u8 ext_ts_chan; 258 u8 ext_ts_irq; 259 struct kthread_worker *kworker; 260 struct ice_perout_channel perout_channels[GLTSYN_TGT_H_IDX_MAX]; 261 struct ice_extts_channel extts_channels[GLTSYN_TGT_H_IDX_MAX]; 262 struct ptp_clock_info info; 263 struct ptp_clock *clock; 264 struct hwtstamp_config tstamp_config; 265 u64 reset_time; 266 u32 tx_hwtstamp_skipped; 267 u32 tx_hwtstamp_timeouts; 268 u32 tx_hwtstamp_flushed; 269 u32 tx_hwtstamp_discarded; 270 u32 late_cached_phc_updates; 271 }; 272 273 #define __ptp_port_to_ptp(p) \ 274 container_of((p), struct ice_ptp, port) 275 #define ptp_port_to_pf(p) \ 276 container_of(__ptp_port_to_ptp((p)), struct ice_pf, ptp) 277 278 #define __ptp_info_to_ptp(i) \ 279 container_of((i), struct ice_ptp, info) 280 #define ptp_info_to_pf(i) \ 281 container_of(__ptp_info_to_ptp((i)), struct ice_pf, ptp) 282 283 #define PFTSYN_SEM_BYTES 4 284 #define PTP_SHARED_CLK_IDX_VALID BIT(31) 285 #define TS_CMD_MASK 0xF 286 #define SYNC_EXEC_CMD 0x3 287 #define ICE_PTP_TS_VALID BIT(0) 288 289 #define FIFO_EMPTY BIT(2) 290 #define FIFO_OK 0xFF 291 #define ICE_PTP_FIFO_NUM_CHECKS 5 292 /* Per-channel register definitions */ 293 #define GLTSYN_AUX_OUT(_chan, _idx) (GLTSYN_AUX_OUT_0(_idx) + ((_chan) * 8)) 294 #define GLTSYN_AUX_IN(_chan, _idx) (GLTSYN_AUX_IN_0(_idx) + ((_chan) * 8)) 295 #define GLTSYN_CLKO(_chan, _idx) (GLTSYN_CLKO_0(_idx) + ((_chan) * 8)) 296 #define GLTSYN_TGT_L(_chan, _idx) (GLTSYN_TGT_L_0(_idx) + ((_chan) * 16)) 297 #define GLTSYN_TGT_H(_chan, _idx) (GLTSYN_TGT_H_0(_idx) + ((_chan) * 16)) 298 #define GLTSYN_EVNT_L(_chan, _idx) (GLTSYN_EVNT_L_0(_idx) + ((_chan) * 16)) 299 #define GLTSYN_EVNT_H(_chan, _idx) (GLTSYN_EVNT_H_0(_idx) + ((_chan) * 16)) 300 #define GLTSYN_EVNT_H_IDX_MAX 3 301 302 /* Pin definitions for PTP PPS out */ 303 #define PPS_CLK_GEN_CHAN 3 304 #define PPS_CLK_SRC_CHAN 2 305 #define PPS_PIN_INDEX 5 306 #define TIME_SYNC_PIN_INDEX 4 307 #define N_EXT_TS_E810 3 308 #define N_PER_OUT_E810 4 309 #define N_PER_OUT_E810T 3 310 #define N_PER_OUT_NO_SMA_E810T 2 311 #define N_EXT_TS_NO_SMA_E810T 2 312 #define ETH_GLTSYN_ENA(_i) (0x03000348 + ((_i) * 4)) 313 314 #if IS_ENABLED(CONFIG_PTP_1588_CLOCK) 315 int ice_ptp_clock_index(struct ice_pf *pf); 316 struct ice_pf; 317 int ice_ptp_set_ts_config(struct ice_pf *pf, struct ifreq *ifr); 318 int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr); 319 void ice_ptp_restore_timestamp_mode(struct ice_pf *pf); 320 321 void ice_ptp_extts_event(struct ice_pf *pf); 322 s8 ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb); 323 void ice_ptp_req_tx_single_tstamp(struct ice_ptp_tx *tx, u8 idx); 324 void ice_ptp_complete_tx_single_tstamp(struct ice_ptp_tx *tx); 325 enum ice_tx_tstamp_work ice_ptp_process_ts(struct ice_pf *pf); 326 327 u64 ice_ptp_get_rx_hwts(const union ice_32b_rx_flex_desc *rx_desc, 328 const struct ice_pkt_ctx *pkt_ctx); 329 void ice_ptp_rebuild(struct ice_pf *pf, enum ice_reset_req reset_type); 330 void ice_ptp_prepare_for_reset(struct ice_pf *pf, 331 enum ice_reset_req reset_type); 332 void ice_ptp_init(struct ice_pf *pf); 333 void ice_ptp_release(struct ice_pf *pf); 334 void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup); 335 #else /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */ 336 static inline int ice_ptp_set_ts_config(struct ice_pf *pf, struct ifreq *ifr) 337 { 338 return -EOPNOTSUPP; 339 } 340 341 static inline int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr) 342 { 343 return -EOPNOTSUPP; 344 } 345 346 static inline void ice_ptp_restore_timestamp_mode(struct ice_pf *pf) { } 347 static inline void ice_ptp_extts_event(struct ice_pf *pf) { } 348 static inline s8 349 ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb) 350 { 351 return -1; 352 } 353 354 static inline void ice_ptp_req_tx_single_tstamp(struct ice_ptp_tx *tx, u8 idx) 355 { } 356 357 static inline void ice_ptp_complete_tx_single_tstamp(struct ice_ptp_tx *tx) { } 358 359 static inline bool ice_ptp_process_ts(struct ice_pf *pf) 360 { 361 return true; 362 } 363 364 static inline u64 365 ice_ptp_get_rx_hwts(const union ice_32b_rx_flex_desc *rx_desc, 366 const struct ice_pkt_ctx *pkt_ctx) 367 { 368 return 0; 369 } 370 371 static inline void ice_ptp_rebuild(struct ice_pf *pf, 372 enum ice_reset_req reset_type) 373 { 374 } 375 376 static inline void ice_ptp_prepare_for_reset(struct ice_pf *pf, 377 enum ice_reset_req reset_type) 378 { 379 } 380 static inline void ice_ptp_init(struct ice_pf *pf) { } 381 static inline void ice_ptp_release(struct ice_pf *pf) { } 382 static inline void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup) 383 { 384 } 385 386 static inline int ice_ptp_clock_index(struct ice_pf *pf) 387 { 388 return -1; 389 } 390 #endif /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */ 391 #endif /* _ICE_PTP_H_ */ 392