1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright (c) 2018, Intel Corporation. */ 3 4 #include "ice.h" 5 #include "ice_base.h" 6 #include "ice_flow.h" 7 #include "ice_lib.h" 8 #include "ice_fltr.h" 9 #include "ice_dcb_lib.h" 10 #include "ice_type.h" 11 #include "ice_vsi_vlan_ops.h" 12 13 /** 14 * ice_vsi_type_str - maps VSI type enum to string equivalents 15 * @vsi_type: VSI type enum 16 */ 17 const char *ice_vsi_type_str(enum ice_vsi_type vsi_type) 18 { 19 switch (vsi_type) { 20 case ICE_VSI_PF: 21 return "ICE_VSI_PF"; 22 case ICE_VSI_VF: 23 return "ICE_VSI_VF"; 24 case ICE_VSI_SF: 25 return "ICE_VSI_SF"; 26 case ICE_VSI_CTRL: 27 return "ICE_VSI_CTRL"; 28 case ICE_VSI_CHNL: 29 return "ICE_VSI_CHNL"; 30 case ICE_VSI_LB: 31 return "ICE_VSI_LB"; 32 default: 33 return "unknown"; 34 } 35 } 36 37 /** 38 * ice_vsi_ctrl_all_rx_rings - Start or stop a VSI's Rx rings 39 * @vsi: the VSI being configured 40 * @ena: start or stop the Rx rings 41 * 42 * First enable/disable all of the Rx rings, flush any remaining writes, and 43 * then verify that they have all been enabled/disabled successfully. This will 44 * let all of the register writes complete when enabling/disabling the Rx rings 45 * before waiting for the change in hardware to complete. 46 */ 47 static int ice_vsi_ctrl_all_rx_rings(struct ice_vsi *vsi, bool ena) 48 { 49 int ret = 0; 50 u16 i; 51 52 ice_for_each_rxq(vsi, i) 53 ice_vsi_ctrl_one_rx_ring(vsi, ena, i, false); 54 55 ice_flush(&vsi->back->hw); 56 57 ice_for_each_rxq(vsi, i) { 58 ret = ice_vsi_wait_one_rx_ring(vsi, ena, i); 59 if (ret) 60 break; 61 } 62 63 return ret; 64 } 65 66 /** 67 * ice_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the VSI 68 * @vsi: VSI pointer 69 * 70 * On error: returns error code (negative) 71 * On success: returns 0 72 */ 73 static int ice_vsi_alloc_arrays(struct ice_vsi *vsi) 74 { 75 struct ice_pf *pf = vsi->back; 76 struct device *dev; 77 78 dev = ice_pf_to_dev(pf); 79 if (vsi->type == ICE_VSI_CHNL) 80 return 0; 81 82 /* allocate memory for both Tx and Rx ring pointers */ 83 vsi->tx_rings = devm_kcalloc(dev, vsi->alloc_txq, 84 sizeof(*vsi->tx_rings), GFP_KERNEL); 85 if (!vsi->tx_rings) 86 return -ENOMEM; 87 88 vsi->rx_rings = devm_kcalloc(dev, vsi->alloc_rxq, 89 sizeof(*vsi->rx_rings), GFP_KERNEL); 90 if (!vsi->rx_rings) 91 goto err_rings; 92 93 /* txq_map needs to have enough space to track both Tx (stack) rings 94 * and XDP rings; at this point vsi->num_xdp_txq might not be set, 95 * so use num_possible_cpus() as we want to always provide XDP ring 96 * per CPU, regardless of queue count settings from user that might 97 * have come from ethtool's set_channels() callback; 98 */ 99 vsi->txq_map = devm_kcalloc(dev, (vsi->alloc_txq + num_possible_cpus()), 100 sizeof(*vsi->txq_map), GFP_KERNEL); 101 102 if (!vsi->txq_map) 103 goto err_txq_map; 104 105 vsi->rxq_map = devm_kcalloc(dev, vsi->alloc_rxq, 106 sizeof(*vsi->rxq_map), GFP_KERNEL); 107 if (!vsi->rxq_map) 108 goto err_rxq_map; 109 110 /* There is no need to allocate q_vectors for a loopback VSI. */ 111 if (vsi->type == ICE_VSI_LB) 112 return 0; 113 114 /* allocate memory for q_vector pointers */ 115 vsi->q_vectors = devm_kcalloc(dev, vsi->num_q_vectors, 116 sizeof(*vsi->q_vectors), GFP_KERNEL); 117 if (!vsi->q_vectors) 118 goto err_vectors; 119 120 return 0; 121 122 err_vectors: 123 devm_kfree(dev, vsi->rxq_map); 124 err_rxq_map: 125 devm_kfree(dev, vsi->txq_map); 126 err_txq_map: 127 devm_kfree(dev, vsi->rx_rings); 128 err_rings: 129 devm_kfree(dev, vsi->tx_rings); 130 return -ENOMEM; 131 } 132 133 /** 134 * ice_vsi_set_num_desc - Set number of descriptors for queues on this VSI 135 * @vsi: the VSI being configured 136 */ 137 static void ice_vsi_set_num_desc(struct ice_vsi *vsi) 138 { 139 switch (vsi->type) { 140 case ICE_VSI_PF: 141 case ICE_VSI_SF: 142 case ICE_VSI_CTRL: 143 case ICE_VSI_LB: 144 /* a user could change the values of num_[tr]x_desc using 145 * ethtool -G so we should keep those values instead of 146 * overwriting them with the defaults. 147 */ 148 if (!vsi->num_rx_desc) 149 vsi->num_rx_desc = ICE_DFLT_NUM_RX_DESC; 150 if (!vsi->num_tx_desc) 151 vsi->num_tx_desc = ICE_DFLT_NUM_TX_DESC; 152 break; 153 default: 154 dev_dbg(ice_pf_to_dev(vsi->back), "Not setting number of Tx/Rx descriptors for VSI type %d\n", 155 vsi->type); 156 break; 157 } 158 } 159 160 static u16 ice_get_rxq_count(struct ice_pf *pf) 161 { 162 return min(ice_get_avail_rxq_count(pf), 163 netif_get_num_default_rss_queues()); 164 } 165 166 static u16 ice_get_txq_count(struct ice_pf *pf) 167 { 168 return min(ice_get_avail_txq_count(pf), 169 netif_get_num_default_rss_queues()); 170 } 171 172 /** 173 * ice_vsi_set_num_qs - Set number of queues, descriptors and vectors for a VSI 174 * @vsi: the VSI being configured 175 * 176 * Return 0 on success and a negative value on error 177 */ 178 static void ice_vsi_set_num_qs(struct ice_vsi *vsi) 179 { 180 enum ice_vsi_type vsi_type = vsi->type; 181 struct ice_pf *pf = vsi->back; 182 struct ice_vf *vf = vsi->vf; 183 184 if (WARN_ON(vsi_type == ICE_VSI_VF && !vf)) 185 return; 186 187 switch (vsi_type) { 188 case ICE_VSI_PF: 189 if (vsi->req_txq) { 190 vsi->alloc_txq = vsi->req_txq; 191 vsi->num_txq = vsi->req_txq; 192 } else { 193 vsi->alloc_txq = ice_get_txq_count(pf); 194 } 195 196 pf->num_lan_tx = vsi->alloc_txq; 197 198 /* only 1 Rx queue unless RSS is enabled */ 199 if (!test_bit(ICE_FLAG_RSS_ENA, pf->flags)) { 200 vsi->alloc_rxq = 1; 201 } else { 202 if (vsi->req_rxq) { 203 vsi->alloc_rxq = vsi->req_rxq; 204 vsi->num_rxq = vsi->req_rxq; 205 } else { 206 vsi->alloc_rxq = ice_get_rxq_count(pf); 207 } 208 } 209 210 pf->num_lan_rx = vsi->alloc_rxq; 211 212 vsi->num_q_vectors = max(vsi->alloc_rxq, vsi->alloc_txq); 213 break; 214 case ICE_VSI_SF: 215 vsi->alloc_txq = 1; 216 vsi->alloc_rxq = 1; 217 vsi->num_q_vectors = 1; 218 vsi->irq_dyn_alloc = true; 219 break; 220 case ICE_VSI_VF: 221 if (vf->num_req_qs) 222 vf->num_vf_qs = vf->num_req_qs; 223 vsi->alloc_txq = vf->num_vf_qs; 224 vsi->alloc_rxq = vf->num_vf_qs; 225 /* pf->vfs.num_msix_per includes (VF miscellaneous vector + 226 * data queue interrupts). Since vsi->num_q_vectors is number 227 * of queues vectors, subtract 1 (ICE_NONQ_VECS_VF) from the 228 * original vector count 229 */ 230 vsi->num_q_vectors = vf->num_msix - ICE_NONQ_VECS_VF; 231 break; 232 case ICE_VSI_CTRL: 233 vsi->alloc_txq = 1; 234 vsi->alloc_rxq = 1; 235 vsi->num_q_vectors = 1; 236 break; 237 case ICE_VSI_CHNL: 238 vsi->alloc_txq = 0; 239 vsi->alloc_rxq = 0; 240 break; 241 case ICE_VSI_LB: 242 vsi->alloc_txq = 1; 243 vsi->alloc_rxq = 1; 244 break; 245 default: 246 dev_warn(ice_pf_to_dev(pf), "Unknown VSI type %d\n", vsi_type); 247 break; 248 } 249 250 ice_vsi_set_num_desc(vsi); 251 } 252 253 /** 254 * ice_get_free_slot - get the next non-NULL location index in array 255 * @array: array to search 256 * @size: size of the array 257 * @curr: last known occupied index to be used as a search hint 258 * 259 * void * is being used to keep the functionality generic. This lets us use this 260 * function on any array of pointers. 261 */ 262 static int ice_get_free_slot(void *array, int size, int curr) 263 { 264 int **tmp_array = (int **)array; 265 int next; 266 267 if (curr < (size - 1) && !tmp_array[curr + 1]) { 268 next = curr + 1; 269 } else { 270 int i = 0; 271 272 while ((i < size) && (tmp_array[i])) 273 i++; 274 if (i == size) 275 next = ICE_NO_VSI; 276 else 277 next = i; 278 } 279 return next; 280 } 281 282 /** 283 * ice_vsi_delete_from_hw - delete a VSI from the switch 284 * @vsi: pointer to VSI being removed 285 */ 286 static void ice_vsi_delete_from_hw(struct ice_vsi *vsi) 287 { 288 struct ice_pf *pf = vsi->back; 289 struct ice_vsi_ctx *ctxt; 290 int status; 291 292 ice_fltr_remove_all(vsi); 293 ctxt = kzalloc(sizeof(*ctxt), GFP_KERNEL); 294 if (!ctxt) 295 return; 296 297 if (vsi->type == ICE_VSI_VF) 298 ctxt->vf_num = vsi->vf->vf_id; 299 ctxt->vsi_num = vsi->vsi_num; 300 301 memcpy(&ctxt->info, &vsi->info, sizeof(ctxt->info)); 302 303 status = ice_free_vsi(&pf->hw, vsi->idx, ctxt, false, NULL); 304 if (status) 305 dev_err(ice_pf_to_dev(pf), "Failed to delete VSI %i in FW - error: %d\n", 306 vsi->vsi_num, status); 307 308 kfree(ctxt); 309 } 310 311 /** 312 * ice_vsi_free_arrays - De-allocate queue and vector pointer arrays for the VSI 313 * @vsi: pointer to VSI being cleared 314 */ 315 static void ice_vsi_free_arrays(struct ice_vsi *vsi) 316 { 317 struct ice_pf *pf = vsi->back; 318 struct device *dev; 319 320 dev = ice_pf_to_dev(pf); 321 322 /* free the ring and vector containers */ 323 devm_kfree(dev, vsi->q_vectors); 324 vsi->q_vectors = NULL; 325 devm_kfree(dev, vsi->tx_rings); 326 vsi->tx_rings = NULL; 327 devm_kfree(dev, vsi->rx_rings); 328 vsi->rx_rings = NULL; 329 devm_kfree(dev, vsi->txq_map); 330 vsi->txq_map = NULL; 331 devm_kfree(dev, vsi->rxq_map); 332 vsi->rxq_map = NULL; 333 } 334 335 /** 336 * ice_vsi_free_stats - Free the ring statistics structures 337 * @vsi: VSI pointer 338 */ 339 static void ice_vsi_free_stats(struct ice_vsi *vsi) 340 { 341 struct ice_vsi_stats *vsi_stat; 342 struct ice_pf *pf = vsi->back; 343 int i; 344 345 if (vsi->type == ICE_VSI_CHNL) 346 return; 347 if (!pf->vsi_stats) 348 return; 349 350 vsi_stat = pf->vsi_stats[vsi->idx]; 351 if (!vsi_stat) 352 return; 353 354 ice_for_each_alloc_txq(vsi, i) { 355 if (vsi_stat->tx_ring_stats[i]) { 356 kfree_rcu(vsi_stat->tx_ring_stats[i], rcu); 357 WRITE_ONCE(vsi_stat->tx_ring_stats[i], NULL); 358 } 359 } 360 361 ice_for_each_alloc_rxq(vsi, i) { 362 if (vsi_stat->rx_ring_stats[i]) { 363 kfree_rcu(vsi_stat->rx_ring_stats[i], rcu); 364 WRITE_ONCE(vsi_stat->rx_ring_stats[i], NULL); 365 } 366 } 367 368 kfree(vsi_stat->tx_ring_stats); 369 kfree(vsi_stat->rx_ring_stats); 370 kfree(vsi_stat); 371 pf->vsi_stats[vsi->idx] = NULL; 372 } 373 374 /** 375 * ice_vsi_alloc_ring_stats - Allocates Tx and Rx ring stats for the VSI 376 * @vsi: VSI which is having stats allocated 377 */ 378 static int ice_vsi_alloc_ring_stats(struct ice_vsi *vsi) 379 { 380 struct ice_ring_stats **tx_ring_stats; 381 struct ice_ring_stats **rx_ring_stats; 382 struct ice_vsi_stats *vsi_stats; 383 struct ice_pf *pf = vsi->back; 384 u16 i; 385 386 vsi_stats = pf->vsi_stats[vsi->idx]; 387 tx_ring_stats = vsi_stats->tx_ring_stats; 388 rx_ring_stats = vsi_stats->rx_ring_stats; 389 390 /* Allocate Tx ring stats */ 391 ice_for_each_alloc_txq(vsi, i) { 392 struct ice_ring_stats *ring_stats; 393 struct ice_tx_ring *ring; 394 395 ring = vsi->tx_rings[i]; 396 ring_stats = tx_ring_stats[i]; 397 398 if (!ring_stats) { 399 ring_stats = kzalloc(sizeof(*ring_stats), GFP_KERNEL); 400 if (!ring_stats) 401 goto err_out; 402 403 WRITE_ONCE(tx_ring_stats[i], ring_stats); 404 } 405 406 ring->ring_stats = ring_stats; 407 } 408 409 /* Allocate Rx ring stats */ 410 ice_for_each_alloc_rxq(vsi, i) { 411 struct ice_ring_stats *ring_stats; 412 struct ice_rx_ring *ring; 413 414 ring = vsi->rx_rings[i]; 415 ring_stats = rx_ring_stats[i]; 416 417 if (!ring_stats) { 418 ring_stats = kzalloc(sizeof(*ring_stats), GFP_KERNEL); 419 if (!ring_stats) 420 goto err_out; 421 422 WRITE_ONCE(rx_ring_stats[i], ring_stats); 423 } 424 425 ring->ring_stats = ring_stats; 426 } 427 428 return 0; 429 430 err_out: 431 ice_vsi_free_stats(vsi); 432 return -ENOMEM; 433 } 434 435 /** 436 * ice_vsi_free - clean up and deallocate the provided VSI 437 * @vsi: pointer to VSI being cleared 438 * 439 * This deallocates the VSI's queue resources, removes it from the PF's 440 * VSI array if necessary, and deallocates the VSI 441 */ 442 void ice_vsi_free(struct ice_vsi *vsi) 443 { 444 struct ice_pf *pf = NULL; 445 struct device *dev; 446 447 if (!vsi || !vsi->back) 448 return; 449 450 pf = vsi->back; 451 dev = ice_pf_to_dev(pf); 452 453 if (!pf->vsi[vsi->idx] || pf->vsi[vsi->idx] != vsi) { 454 dev_dbg(dev, "vsi does not exist at pf->vsi[%d]\n", vsi->idx); 455 return; 456 } 457 458 mutex_lock(&pf->sw_mutex); 459 /* updates the PF for this cleared VSI */ 460 461 pf->vsi[vsi->idx] = NULL; 462 pf->next_vsi = vsi->idx; 463 464 ice_vsi_free_stats(vsi); 465 ice_vsi_free_arrays(vsi); 466 mutex_destroy(&vsi->xdp_state_lock); 467 mutex_unlock(&pf->sw_mutex); 468 devm_kfree(dev, vsi); 469 } 470 471 void ice_vsi_delete(struct ice_vsi *vsi) 472 { 473 ice_vsi_delete_from_hw(vsi); 474 ice_vsi_free(vsi); 475 } 476 477 /** 478 * ice_msix_clean_ctrl_vsi - MSIX mode interrupt handler for ctrl VSI 479 * @irq: interrupt number 480 * @data: pointer to a q_vector 481 */ 482 static irqreturn_t ice_msix_clean_ctrl_vsi(int __always_unused irq, void *data) 483 { 484 struct ice_q_vector *q_vector = (struct ice_q_vector *)data; 485 486 if (!q_vector->tx.tx_ring) 487 return IRQ_HANDLED; 488 489 ice_clean_ctrl_rx_irq(q_vector->rx.rx_ring); 490 ice_clean_ctrl_tx_irq(q_vector->tx.tx_ring); 491 492 return IRQ_HANDLED; 493 } 494 495 /** 496 * ice_msix_clean_rings - MSIX mode Interrupt Handler 497 * @irq: interrupt number 498 * @data: pointer to a q_vector 499 */ 500 static irqreturn_t ice_msix_clean_rings(int __always_unused irq, void *data) 501 { 502 struct ice_q_vector *q_vector = (struct ice_q_vector *)data; 503 504 if (!q_vector->tx.tx_ring && !q_vector->rx.rx_ring) 505 return IRQ_HANDLED; 506 507 q_vector->total_events++; 508 509 napi_schedule(&q_vector->napi); 510 511 return IRQ_HANDLED; 512 } 513 514 /** 515 * ice_vsi_alloc_stat_arrays - Allocate statistics arrays 516 * @vsi: VSI pointer 517 */ 518 static int ice_vsi_alloc_stat_arrays(struct ice_vsi *vsi) 519 { 520 struct ice_vsi_stats *vsi_stat; 521 struct ice_pf *pf = vsi->back; 522 523 if (vsi->type == ICE_VSI_CHNL) 524 return 0; 525 if (!pf->vsi_stats) 526 return -ENOENT; 527 528 if (pf->vsi_stats[vsi->idx]) 529 /* realloc will happen in rebuild path */ 530 return 0; 531 532 vsi_stat = kzalloc(sizeof(*vsi_stat), GFP_KERNEL); 533 if (!vsi_stat) 534 return -ENOMEM; 535 536 vsi_stat->tx_ring_stats = 537 kcalloc(vsi->alloc_txq, sizeof(*vsi_stat->tx_ring_stats), 538 GFP_KERNEL); 539 if (!vsi_stat->tx_ring_stats) 540 goto err_alloc_tx; 541 542 vsi_stat->rx_ring_stats = 543 kcalloc(vsi->alloc_rxq, sizeof(*vsi_stat->rx_ring_stats), 544 GFP_KERNEL); 545 if (!vsi_stat->rx_ring_stats) 546 goto err_alloc_rx; 547 548 pf->vsi_stats[vsi->idx] = vsi_stat; 549 550 return 0; 551 552 err_alloc_rx: 553 kfree(vsi_stat->rx_ring_stats); 554 err_alloc_tx: 555 kfree(vsi_stat->tx_ring_stats); 556 kfree(vsi_stat); 557 pf->vsi_stats[vsi->idx] = NULL; 558 return -ENOMEM; 559 } 560 561 /** 562 * ice_vsi_alloc_def - set default values for already allocated VSI 563 * @vsi: ptr to VSI 564 * @ch: ptr to channel 565 */ 566 static int 567 ice_vsi_alloc_def(struct ice_vsi *vsi, struct ice_channel *ch) 568 { 569 if (vsi->type != ICE_VSI_CHNL) { 570 ice_vsi_set_num_qs(vsi); 571 if (ice_vsi_alloc_arrays(vsi)) 572 return -ENOMEM; 573 } 574 575 vsi->irq_dyn_alloc = pci_msix_can_alloc_dyn(vsi->back->pdev); 576 577 switch (vsi->type) { 578 case ICE_VSI_PF: 579 case ICE_VSI_SF: 580 /* Setup default MSIX irq handler for VSI */ 581 vsi->irq_handler = ice_msix_clean_rings; 582 break; 583 case ICE_VSI_CTRL: 584 /* Setup ctrl VSI MSIX irq handler */ 585 vsi->irq_handler = ice_msix_clean_ctrl_vsi; 586 break; 587 case ICE_VSI_CHNL: 588 if (!ch) 589 return -EINVAL; 590 591 vsi->num_rxq = ch->num_rxq; 592 vsi->num_txq = ch->num_txq; 593 vsi->next_base_q = ch->base_q; 594 break; 595 case ICE_VSI_VF: 596 case ICE_VSI_LB: 597 break; 598 default: 599 ice_vsi_free_arrays(vsi); 600 return -EINVAL; 601 } 602 603 return 0; 604 } 605 606 /** 607 * ice_vsi_alloc - Allocates the next available struct VSI in the PF 608 * @pf: board private structure 609 * 610 * Reserves a VSI index from the PF and allocates an empty VSI structure 611 * without a type. The VSI structure must later be initialized by calling 612 * ice_vsi_cfg(). 613 * 614 * returns a pointer to a VSI on success, NULL on failure. 615 */ 616 struct ice_vsi *ice_vsi_alloc(struct ice_pf *pf) 617 { 618 struct device *dev = ice_pf_to_dev(pf); 619 struct ice_vsi *vsi = NULL; 620 621 /* Need to protect the allocation of the VSIs at the PF level */ 622 mutex_lock(&pf->sw_mutex); 623 624 /* If we have already allocated our maximum number of VSIs, 625 * pf->next_vsi will be ICE_NO_VSI. If not, pf->next_vsi index 626 * is available to be populated 627 */ 628 if (pf->next_vsi == ICE_NO_VSI) { 629 dev_dbg(dev, "out of VSI slots!\n"); 630 goto unlock_pf; 631 } 632 633 vsi = devm_kzalloc(dev, sizeof(*vsi), GFP_KERNEL); 634 if (!vsi) 635 goto unlock_pf; 636 637 vsi->back = pf; 638 set_bit(ICE_VSI_DOWN, vsi->state); 639 640 /* fill slot and make note of the index */ 641 vsi->idx = pf->next_vsi; 642 pf->vsi[pf->next_vsi] = vsi; 643 644 /* prepare pf->next_vsi for next use */ 645 pf->next_vsi = ice_get_free_slot(pf->vsi, pf->num_alloc_vsi, 646 pf->next_vsi); 647 648 mutex_init(&vsi->xdp_state_lock); 649 650 unlock_pf: 651 mutex_unlock(&pf->sw_mutex); 652 return vsi; 653 } 654 655 /** 656 * ice_alloc_fd_res - Allocate FD resource for a VSI 657 * @vsi: pointer to the ice_vsi 658 * 659 * This allocates the FD resources 660 * 661 * Returns 0 on success, -EPERM on no-op or -EIO on failure 662 */ 663 static int ice_alloc_fd_res(struct ice_vsi *vsi) 664 { 665 struct ice_pf *pf = vsi->back; 666 u32 g_val, b_val; 667 668 /* Flow Director filters are only allocated/assigned to the PF VSI or 669 * CHNL VSI which passes the traffic. The CTRL VSI is only used to 670 * add/delete filters so resources are not allocated to it 671 */ 672 if (!test_bit(ICE_FLAG_FD_ENA, pf->flags)) 673 return -EPERM; 674 675 if (!(vsi->type == ICE_VSI_PF || vsi->type == ICE_VSI_VF || 676 vsi->type == ICE_VSI_CHNL)) 677 return -EPERM; 678 679 /* FD filters from guaranteed pool per VSI */ 680 g_val = pf->hw.func_caps.fd_fltr_guar; 681 if (!g_val) 682 return -EPERM; 683 684 /* FD filters from best effort pool */ 685 b_val = pf->hw.func_caps.fd_fltr_best_effort; 686 if (!b_val) 687 return -EPERM; 688 689 /* PF main VSI gets only 64 FD resources from guaranteed pool 690 * when ADQ is configured. 691 */ 692 #define ICE_PF_VSI_GFLTR 64 693 694 /* determine FD filter resources per VSI from shared(best effort) and 695 * dedicated pool 696 */ 697 if (vsi->type == ICE_VSI_PF) { 698 vsi->num_gfltr = g_val; 699 /* if MQPRIO is configured, main VSI doesn't get all FD 700 * resources from guaranteed pool. PF VSI gets 64 FD resources 701 */ 702 if (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) { 703 if (g_val < ICE_PF_VSI_GFLTR) 704 return -EPERM; 705 /* allow bare minimum entries for PF VSI */ 706 vsi->num_gfltr = ICE_PF_VSI_GFLTR; 707 } 708 709 /* each VSI gets same "best_effort" quota */ 710 vsi->num_bfltr = b_val; 711 } else if (vsi->type == ICE_VSI_VF) { 712 vsi->num_gfltr = 0; 713 714 /* each VSI gets same "best_effort" quota */ 715 vsi->num_bfltr = b_val; 716 } else { 717 struct ice_vsi *main_vsi; 718 int numtc; 719 720 main_vsi = ice_get_main_vsi(pf); 721 if (!main_vsi) 722 return -EPERM; 723 724 if (!main_vsi->all_numtc) 725 return -EINVAL; 726 727 /* figure out ADQ numtc */ 728 numtc = main_vsi->all_numtc - ICE_CHNL_START_TC; 729 730 /* only one TC but still asking resources for channels, 731 * invalid config 732 */ 733 if (numtc < ICE_CHNL_START_TC) 734 return -EPERM; 735 736 g_val -= ICE_PF_VSI_GFLTR; 737 /* channel VSIs gets equal share from guaranteed pool */ 738 vsi->num_gfltr = g_val / numtc; 739 740 /* each VSI gets same "best_effort" quota */ 741 vsi->num_bfltr = b_val; 742 } 743 744 return 0; 745 } 746 747 /** 748 * ice_vsi_get_qs - Assign queues from PF to VSI 749 * @vsi: the VSI to assign queues to 750 * 751 * Returns 0 on success and a negative value on error 752 */ 753 static int ice_vsi_get_qs(struct ice_vsi *vsi) 754 { 755 struct ice_pf *pf = vsi->back; 756 struct ice_qs_cfg tx_qs_cfg = { 757 .qs_mutex = &pf->avail_q_mutex, 758 .pf_map = pf->avail_txqs, 759 .pf_map_size = pf->max_pf_txqs, 760 .q_count = vsi->alloc_txq, 761 .scatter_count = ICE_MAX_SCATTER_TXQS, 762 .vsi_map = vsi->txq_map, 763 .vsi_map_offset = 0, 764 .mapping_mode = ICE_VSI_MAP_CONTIG 765 }; 766 struct ice_qs_cfg rx_qs_cfg = { 767 .qs_mutex = &pf->avail_q_mutex, 768 .pf_map = pf->avail_rxqs, 769 .pf_map_size = pf->max_pf_rxqs, 770 .q_count = vsi->alloc_rxq, 771 .scatter_count = ICE_MAX_SCATTER_RXQS, 772 .vsi_map = vsi->rxq_map, 773 .vsi_map_offset = 0, 774 .mapping_mode = ICE_VSI_MAP_CONTIG 775 }; 776 int ret; 777 778 if (vsi->type == ICE_VSI_CHNL) 779 return 0; 780 781 ret = __ice_vsi_get_qs(&tx_qs_cfg); 782 if (ret) 783 return ret; 784 vsi->tx_mapping_mode = tx_qs_cfg.mapping_mode; 785 786 ret = __ice_vsi_get_qs(&rx_qs_cfg); 787 if (ret) 788 return ret; 789 vsi->rx_mapping_mode = rx_qs_cfg.mapping_mode; 790 791 return 0; 792 } 793 794 /** 795 * ice_vsi_put_qs - Release queues from VSI to PF 796 * @vsi: the VSI that is going to release queues 797 */ 798 static void ice_vsi_put_qs(struct ice_vsi *vsi) 799 { 800 struct ice_pf *pf = vsi->back; 801 int i; 802 803 mutex_lock(&pf->avail_q_mutex); 804 805 ice_for_each_alloc_txq(vsi, i) { 806 clear_bit(vsi->txq_map[i], pf->avail_txqs); 807 vsi->txq_map[i] = ICE_INVAL_Q_INDEX; 808 } 809 810 ice_for_each_alloc_rxq(vsi, i) { 811 clear_bit(vsi->rxq_map[i], pf->avail_rxqs); 812 vsi->rxq_map[i] = ICE_INVAL_Q_INDEX; 813 } 814 815 mutex_unlock(&pf->avail_q_mutex); 816 } 817 818 /** 819 * ice_is_safe_mode 820 * @pf: pointer to the PF struct 821 * 822 * returns true if driver is in safe mode, false otherwise 823 */ 824 bool ice_is_safe_mode(struct ice_pf *pf) 825 { 826 return !test_bit(ICE_FLAG_ADV_FEATURES, pf->flags); 827 } 828 829 /** 830 * ice_is_rdma_ena 831 * @pf: pointer to the PF struct 832 * 833 * returns true if RDMA is currently supported, false otherwise 834 */ 835 bool ice_is_rdma_ena(struct ice_pf *pf) 836 { 837 union devlink_param_value value; 838 int err; 839 840 err = devl_param_driverinit_value_get(priv_to_devlink(pf), 841 DEVLINK_PARAM_GENERIC_ID_ENABLE_RDMA, 842 &value); 843 return err ? test_bit(ICE_FLAG_RDMA_ENA, pf->flags) : value.vbool; 844 } 845 846 /** 847 * ice_vsi_clean_rss_flow_fld - Delete RSS configuration 848 * @vsi: the VSI being cleaned up 849 * 850 * This function deletes RSS input set for all flows that were configured 851 * for this VSI 852 */ 853 static void ice_vsi_clean_rss_flow_fld(struct ice_vsi *vsi) 854 { 855 struct ice_pf *pf = vsi->back; 856 int status; 857 858 if (ice_is_safe_mode(pf)) 859 return; 860 861 status = ice_rem_vsi_rss_cfg(&pf->hw, vsi->idx); 862 if (status) 863 dev_dbg(ice_pf_to_dev(pf), "ice_rem_vsi_rss_cfg failed for vsi = %d, error = %d\n", 864 vsi->vsi_num, status); 865 } 866 867 /** 868 * ice_rss_clean - Delete RSS related VSI structures and configuration 869 * @vsi: the VSI being removed 870 */ 871 static void ice_rss_clean(struct ice_vsi *vsi) 872 { 873 struct ice_pf *pf = vsi->back; 874 struct device *dev; 875 876 dev = ice_pf_to_dev(pf); 877 878 devm_kfree(dev, vsi->rss_hkey_user); 879 devm_kfree(dev, vsi->rss_lut_user); 880 881 ice_vsi_clean_rss_flow_fld(vsi); 882 /* remove RSS replay list */ 883 if (!ice_is_safe_mode(pf)) 884 ice_rem_vsi_rss_list(&pf->hw, vsi->idx); 885 } 886 887 /** 888 * ice_vsi_set_rss_params - Setup RSS capabilities per VSI type 889 * @vsi: the VSI being configured 890 */ 891 static void ice_vsi_set_rss_params(struct ice_vsi *vsi) 892 { 893 struct ice_hw_common_caps *cap; 894 struct ice_pf *pf = vsi->back; 895 u16 max_rss_size; 896 897 if (!test_bit(ICE_FLAG_RSS_ENA, pf->flags)) { 898 vsi->rss_size = 1; 899 return; 900 } 901 902 cap = &pf->hw.func_caps.common_cap; 903 max_rss_size = BIT(cap->rss_table_entry_width); 904 switch (vsi->type) { 905 case ICE_VSI_CHNL: 906 case ICE_VSI_PF: 907 /* PF VSI will inherit RSS instance of PF */ 908 vsi->rss_table_size = (u16)cap->rss_table_size; 909 if (vsi->type == ICE_VSI_CHNL) 910 vsi->rss_size = min_t(u16, vsi->num_rxq, max_rss_size); 911 else 912 vsi->rss_size = min_t(u16, 913 netif_get_num_default_rss_queues(), 914 max_rss_size); 915 vsi->rss_lut_type = ICE_LUT_PF; 916 break; 917 case ICE_VSI_SF: 918 vsi->rss_table_size = ICE_LUT_VSI_SIZE; 919 vsi->rss_size = min_t(u16, netif_get_num_default_rss_queues(), 920 max_rss_size); 921 vsi->rss_lut_type = ICE_LUT_VSI; 922 break; 923 case ICE_VSI_VF: 924 /* VF VSI will get a small RSS table. 925 * For VSI_LUT, LUT size should be set to 64 bytes. 926 */ 927 vsi->rss_table_size = ICE_LUT_VSI_SIZE; 928 vsi->rss_size = ICE_MAX_RSS_QS_PER_VF; 929 vsi->rss_lut_type = ICE_LUT_VSI; 930 break; 931 case ICE_VSI_LB: 932 break; 933 default: 934 dev_dbg(ice_pf_to_dev(pf), "Unsupported VSI type %s\n", 935 ice_vsi_type_str(vsi->type)); 936 break; 937 } 938 } 939 940 /** 941 * ice_set_dflt_vsi_ctx - Set default VSI context before adding a VSI 942 * @hw: HW structure used to determine the VLAN mode of the device 943 * @ctxt: the VSI context being set 944 * 945 * This initializes a default VSI context for all sections except the Queues. 946 */ 947 static void ice_set_dflt_vsi_ctx(struct ice_hw *hw, struct ice_vsi_ctx *ctxt) 948 { 949 u32 table = 0; 950 951 memset(&ctxt->info, 0, sizeof(ctxt->info)); 952 /* VSI's should be allocated from shared pool */ 953 ctxt->alloc_from_pool = true; 954 /* Src pruning enabled by default */ 955 ctxt->info.sw_flags = ICE_AQ_VSI_SW_FLAG_SRC_PRUNE; 956 /* Traffic from VSI can be sent to LAN */ 957 ctxt->info.sw_flags2 = ICE_AQ_VSI_SW_FLAG_LAN_ENA; 958 /* allow all untagged/tagged packets by default on Tx */ 959 ctxt->info.inner_vlan_flags = FIELD_PREP(ICE_AQ_VSI_INNER_VLAN_TX_MODE_M, 960 ICE_AQ_VSI_INNER_VLAN_TX_MODE_ALL); 961 /* SVM - by default bits 3 and 4 in inner_vlan_flags are 0's which 962 * results in legacy behavior (show VLAN, DEI, and UP) in descriptor. 963 * 964 * DVM - leave inner VLAN in packet by default 965 */ 966 if (ice_is_dvm_ena(hw)) { 967 ctxt->info.inner_vlan_flags |= 968 FIELD_PREP(ICE_AQ_VSI_INNER_VLAN_EMODE_M, 969 ICE_AQ_VSI_INNER_VLAN_EMODE_NOTHING); 970 ctxt->info.outer_vlan_flags = 971 FIELD_PREP(ICE_AQ_VSI_OUTER_VLAN_TX_MODE_M, 972 ICE_AQ_VSI_OUTER_VLAN_TX_MODE_ALL); 973 ctxt->info.outer_vlan_flags |= 974 FIELD_PREP(ICE_AQ_VSI_OUTER_TAG_TYPE_M, 975 ICE_AQ_VSI_OUTER_TAG_VLAN_8100); 976 ctxt->info.outer_vlan_flags |= 977 FIELD_PREP(ICE_AQ_VSI_OUTER_VLAN_EMODE_M, 978 ICE_AQ_VSI_OUTER_VLAN_EMODE_NOTHING); 979 } 980 /* Have 1:1 UP mapping for both ingress/egress tables */ 981 table |= ICE_UP_TABLE_TRANSLATE(0, 0); 982 table |= ICE_UP_TABLE_TRANSLATE(1, 1); 983 table |= ICE_UP_TABLE_TRANSLATE(2, 2); 984 table |= ICE_UP_TABLE_TRANSLATE(3, 3); 985 table |= ICE_UP_TABLE_TRANSLATE(4, 4); 986 table |= ICE_UP_TABLE_TRANSLATE(5, 5); 987 table |= ICE_UP_TABLE_TRANSLATE(6, 6); 988 table |= ICE_UP_TABLE_TRANSLATE(7, 7); 989 ctxt->info.ingress_table = cpu_to_le32(table); 990 ctxt->info.egress_table = cpu_to_le32(table); 991 /* Have 1:1 UP mapping for outer to inner UP table */ 992 ctxt->info.outer_up_table = cpu_to_le32(table); 993 /* No Outer tag support outer_tag_flags remains to zero */ 994 } 995 996 /** 997 * ice_vsi_setup_q_map - Setup a VSI queue map 998 * @vsi: the VSI being configured 999 * @ctxt: VSI context structure 1000 */ 1001 static int ice_vsi_setup_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt) 1002 { 1003 u16 offset = 0, qmap = 0, tx_count = 0, rx_count = 0, pow = 0; 1004 u16 num_txq_per_tc, num_rxq_per_tc; 1005 u16 qcount_tx = vsi->alloc_txq; 1006 u16 qcount_rx = vsi->alloc_rxq; 1007 u8 netdev_tc = 0; 1008 int i; 1009 1010 if (!vsi->tc_cfg.numtc) { 1011 /* at least TC0 should be enabled by default */ 1012 vsi->tc_cfg.numtc = 1; 1013 vsi->tc_cfg.ena_tc = 1; 1014 } 1015 1016 num_rxq_per_tc = min_t(u16, qcount_rx / vsi->tc_cfg.numtc, ICE_MAX_RXQS_PER_TC); 1017 if (!num_rxq_per_tc) 1018 num_rxq_per_tc = 1; 1019 num_txq_per_tc = qcount_tx / vsi->tc_cfg.numtc; 1020 if (!num_txq_per_tc) 1021 num_txq_per_tc = 1; 1022 1023 /* find the (rounded up) power-of-2 of qcount */ 1024 pow = (u16)order_base_2(num_rxq_per_tc); 1025 1026 /* TC mapping is a function of the number of Rx queues assigned to the 1027 * VSI for each traffic class and the offset of these queues. 1028 * The first 10 bits are for queue offset for TC0, next 4 bits for no:of 1029 * queues allocated to TC0. No:of queues is a power-of-2. 1030 * 1031 * If TC is not enabled, the queue offset is set to 0, and allocate one 1032 * queue, this way, traffic for the given TC will be sent to the default 1033 * queue. 1034 * 1035 * Setup number and offset of Rx queues for all TCs for the VSI 1036 */ 1037 ice_for_each_traffic_class(i) { 1038 if (!(vsi->tc_cfg.ena_tc & BIT(i))) { 1039 /* TC is not enabled */ 1040 vsi->tc_cfg.tc_info[i].qoffset = 0; 1041 vsi->tc_cfg.tc_info[i].qcount_rx = 1; 1042 vsi->tc_cfg.tc_info[i].qcount_tx = 1; 1043 vsi->tc_cfg.tc_info[i].netdev_tc = 0; 1044 ctxt->info.tc_mapping[i] = 0; 1045 continue; 1046 } 1047 1048 /* TC is enabled */ 1049 vsi->tc_cfg.tc_info[i].qoffset = offset; 1050 vsi->tc_cfg.tc_info[i].qcount_rx = num_rxq_per_tc; 1051 vsi->tc_cfg.tc_info[i].qcount_tx = num_txq_per_tc; 1052 vsi->tc_cfg.tc_info[i].netdev_tc = netdev_tc++; 1053 1054 qmap = FIELD_PREP(ICE_AQ_VSI_TC_Q_OFFSET_M, offset); 1055 qmap |= FIELD_PREP(ICE_AQ_VSI_TC_Q_NUM_M, pow); 1056 offset += num_rxq_per_tc; 1057 tx_count += num_txq_per_tc; 1058 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap); 1059 } 1060 1061 /* if offset is non-zero, means it is calculated correctly based on 1062 * enabled TCs for a given VSI otherwise qcount_rx will always 1063 * be correct and non-zero because it is based off - VSI's 1064 * allocated Rx queues which is at least 1 (hence qcount_tx will be 1065 * at least 1) 1066 */ 1067 if (offset) 1068 rx_count = offset; 1069 else 1070 rx_count = num_rxq_per_tc; 1071 1072 if (rx_count > vsi->alloc_rxq) { 1073 dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Rx queues (%u), than were allocated (%u)!\n", 1074 rx_count, vsi->alloc_rxq); 1075 return -EINVAL; 1076 } 1077 1078 if (tx_count > vsi->alloc_txq) { 1079 dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Tx queues (%u), than were allocated (%u)!\n", 1080 tx_count, vsi->alloc_txq); 1081 return -EINVAL; 1082 } 1083 1084 vsi->num_txq = tx_count; 1085 vsi->num_rxq = rx_count; 1086 1087 if (vsi->type == ICE_VSI_VF && vsi->num_txq != vsi->num_rxq) { 1088 dev_dbg(ice_pf_to_dev(vsi->back), "VF VSI should have same number of Tx and Rx queues. Hence making them equal\n"); 1089 /* since there is a chance that num_rxq could have been changed 1090 * in the above for loop, make num_txq equal to num_rxq. 1091 */ 1092 vsi->num_txq = vsi->num_rxq; 1093 } 1094 1095 /* Rx queue mapping */ 1096 ctxt->info.mapping_flags |= cpu_to_le16(ICE_AQ_VSI_Q_MAP_CONTIG); 1097 /* q_mapping buffer holds the info for the first queue allocated for 1098 * this VSI in the PF space and also the number of queues associated 1099 * with this VSI. 1100 */ 1101 ctxt->info.q_mapping[0] = cpu_to_le16(vsi->rxq_map[0]); 1102 ctxt->info.q_mapping[1] = cpu_to_le16(vsi->num_rxq); 1103 1104 return 0; 1105 } 1106 1107 /** 1108 * ice_set_fd_vsi_ctx - Set FD VSI context before adding a VSI 1109 * @ctxt: the VSI context being set 1110 * @vsi: the VSI being configured 1111 */ 1112 static void ice_set_fd_vsi_ctx(struct ice_vsi_ctx *ctxt, struct ice_vsi *vsi) 1113 { 1114 u8 dflt_q_group, dflt_q_prio; 1115 u16 dflt_q, report_q, val; 1116 1117 if (vsi->type != ICE_VSI_PF && vsi->type != ICE_VSI_CTRL && 1118 vsi->type != ICE_VSI_VF && vsi->type != ICE_VSI_CHNL) 1119 return; 1120 1121 val = ICE_AQ_VSI_PROP_FLOW_DIR_VALID; 1122 ctxt->info.valid_sections |= cpu_to_le16(val); 1123 dflt_q = 0; 1124 dflt_q_group = 0; 1125 report_q = 0; 1126 dflt_q_prio = 0; 1127 1128 /* enable flow director filtering/programming */ 1129 val = ICE_AQ_VSI_FD_ENABLE | ICE_AQ_VSI_FD_PROG_ENABLE; 1130 ctxt->info.fd_options = cpu_to_le16(val); 1131 /* max of allocated flow director filters */ 1132 ctxt->info.max_fd_fltr_dedicated = 1133 cpu_to_le16(vsi->num_gfltr); 1134 /* max of shared flow director filters any VSI may program */ 1135 ctxt->info.max_fd_fltr_shared = 1136 cpu_to_le16(vsi->num_bfltr); 1137 /* default queue index within the VSI of the default FD */ 1138 val = FIELD_PREP(ICE_AQ_VSI_FD_DEF_Q_M, dflt_q); 1139 /* target queue or queue group to the FD filter */ 1140 val |= FIELD_PREP(ICE_AQ_VSI_FD_DEF_GRP_M, dflt_q_group); 1141 ctxt->info.fd_def_q = cpu_to_le16(val); 1142 /* queue index on which FD filter completion is reported */ 1143 val = FIELD_PREP(ICE_AQ_VSI_FD_REPORT_Q_M, report_q); 1144 /* priority of the default qindex action */ 1145 val |= FIELD_PREP(ICE_AQ_VSI_FD_DEF_PRIORITY_M, dflt_q_prio); 1146 ctxt->info.fd_report_opt = cpu_to_le16(val); 1147 } 1148 1149 /** 1150 * ice_set_rss_vsi_ctx - Set RSS VSI context before adding a VSI 1151 * @ctxt: the VSI context being set 1152 * @vsi: the VSI being configured 1153 */ 1154 static void ice_set_rss_vsi_ctx(struct ice_vsi_ctx *ctxt, struct ice_vsi *vsi) 1155 { 1156 u8 lut_type, hash_type; 1157 struct device *dev; 1158 struct ice_pf *pf; 1159 1160 pf = vsi->back; 1161 dev = ice_pf_to_dev(pf); 1162 1163 switch (vsi->type) { 1164 case ICE_VSI_CHNL: 1165 case ICE_VSI_PF: 1166 /* PF VSI will inherit RSS instance of PF */ 1167 lut_type = ICE_AQ_VSI_Q_OPT_RSS_LUT_PF; 1168 break; 1169 case ICE_VSI_VF: 1170 case ICE_VSI_SF: 1171 /* VF VSI will gets a small RSS table which is a VSI LUT type */ 1172 lut_type = ICE_AQ_VSI_Q_OPT_RSS_LUT_VSI; 1173 break; 1174 default: 1175 dev_dbg(dev, "Unsupported VSI type %s\n", 1176 ice_vsi_type_str(vsi->type)); 1177 return; 1178 } 1179 1180 hash_type = ICE_AQ_VSI_Q_OPT_RSS_HASH_TPLZ; 1181 vsi->rss_hfunc = hash_type; 1182 1183 ctxt->info.q_opt_rss = 1184 FIELD_PREP(ICE_AQ_VSI_Q_OPT_RSS_LUT_M, lut_type) | 1185 FIELD_PREP(ICE_AQ_VSI_Q_OPT_RSS_HASH_M, hash_type); 1186 } 1187 1188 static void 1189 ice_chnl_vsi_setup_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt) 1190 { 1191 u16 qcount, qmap; 1192 u8 offset = 0; 1193 int pow; 1194 1195 qcount = vsi->num_rxq; 1196 1197 pow = order_base_2(qcount); 1198 qmap = FIELD_PREP(ICE_AQ_VSI_TC_Q_OFFSET_M, offset); 1199 qmap |= FIELD_PREP(ICE_AQ_VSI_TC_Q_NUM_M, pow); 1200 1201 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap); 1202 ctxt->info.mapping_flags |= cpu_to_le16(ICE_AQ_VSI_Q_MAP_CONTIG); 1203 ctxt->info.q_mapping[0] = cpu_to_le16(vsi->next_base_q); 1204 ctxt->info.q_mapping[1] = cpu_to_le16(qcount); 1205 } 1206 1207 /** 1208 * ice_vsi_is_vlan_pruning_ena - check if VLAN pruning is enabled or not 1209 * @vsi: VSI to check whether or not VLAN pruning is enabled. 1210 * 1211 * returns true if Rx VLAN pruning is enabled and false otherwise. 1212 */ 1213 static bool ice_vsi_is_vlan_pruning_ena(struct ice_vsi *vsi) 1214 { 1215 return vsi->info.sw_flags2 & ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA; 1216 } 1217 1218 /** 1219 * ice_vsi_init - Create and initialize a VSI 1220 * @vsi: the VSI being configured 1221 * @vsi_flags: VSI configuration flags 1222 * 1223 * Set ICE_FLAG_VSI_INIT to initialize a new VSI context, clear it to 1224 * reconfigure an existing context. 1225 * 1226 * This initializes a VSI context depending on the VSI type to be added and 1227 * passes it down to the add_vsi aq command to create a new VSI. 1228 */ 1229 static int ice_vsi_init(struct ice_vsi *vsi, u32 vsi_flags) 1230 { 1231 struct ice_pf *pf = vsi->back; 1232 struct ice_hw *hw = &pf->hw; 1233 struct ice_vsi_ctx *ctxt; 1234 struct device *dev; 1235 int ret = 0; 1236 1237 dev = ice_pf_to_dev(pf); 1238 ctxt = kzalloc(sizeof(*ctxt), GFP_KERNEL); 1239 if (!ctxt) 1240 return -ENOMEM; 1241 1242 switch (vsi->type) { 1243 case ICE_VSI_CTRL: 1244 case ICE_VSI_LB: 1245 case ICE_VSI_PF: 1246 ctxt->flags = ICE_AQ_VSI_TYPE_PF; 1247 break; 1248 case ICE_VSI_SF: 1249 case ICE_VSI_CHNL: 1250 ctxt->flags = ICE_AQ_VSI_TYPE_VMDQ2; 1251 break; 1252 case ICE_VSI_VF: 1253 ctxt->flags = ICE_AQ_VSI_TYPE_VF; 1254 /* VF number here is the absolute VF number (0-255) */ 1255 ctxt->vf_num = vsi->vf->vf_id + hw->func_caps.vf_base_id; 1256 break; 1257 default: 1258 ret = -ENODEV; 1259 goto out; 1260 } 1261 1262 /* Handle VLAN pruning for channel VSI if main VSI has VLAN 1263 * prune enabled 1264 */ 1265 if (vsi->type == ICE_VSI_CHNL) { 1266 struct ice_vsi *main_vsi; 1267 1268 main_vsi = ice_get_main_vsi(pf); 1269 if (main_vsi && ice_vsi_is_vlan_pruning_ena(main_vsi)) 1270 ctxt->info.sw_flags2 |= 1271 ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA; 1272 else 1273 ctxt->info.sw_flags2 &= 1274 ~ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA; 1275 } 1276 1277 ice_set_dflt_vsi_ctx(hw, ctxt); 1278 if (test_bit(ICE_FLAG_FD_ENA, pf->flags)) 1279 ice_set_fd_vsi_ctx(ctxt, vsi); 1280 /* if the switch is in VEB mode, allow VSI loopback */ 1281 if (vsi->vsw->bridge_mode == BRIDGE_MODE_VEB) 1282 ctxt->info.sw_flags |= ICE_AQ_VSI_SW_FLAG_ALLOW_LB; 1283 1284 /* Set LUT type and HASH type if RSS is enabled */ 1285 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags) && 1286 vsi->type != ICE_VSI_CTRL) { 1287 ice_set_rss_vsi_ctx(ctxt, vsi); 1288 /* if updating VSI context, make sure to set valid_section: 1289 * to indicate which section of VSI context being updated 1290 */ 1291 if (!(vsi_flags & ICE_VSI_FLAG_INIT)) 1292 ctxt->info.valid_sections |= 1293 cpu_to_le16(ICE_AQ_VSI_PROP_Q_OPT_VALID); 1294 } 1295 1296 ctxt->info.sw_id = vsi->port_info->sw_id; 1297 if (vsi->type == ICE_VSI_CHNL) { 1298 ice_chnl_vsi_setup_q_map(vsi, ctxt); 1299 } else { 1300 ret = ice_vsi_setup_q_map(vsi, ctxt); 1301 if (ret) 1302 goto out; 1303 1304 if (!(vsi_flags & ICE_VSI_FLAG_INIT)) 1305 /* means VSI being updated */ 1306 /* must to indicate which section of VSI context are 1307 * being modified 1308 */ 1309 ctxt->info.valid_sections |= 1310 cpu_to_le16(ICE_AQ_VSI_PROP_RXQ_MAP_VALID); 1311 } 1312 1313 /* Allow control frames out of main VSI */ 1314 if (vsi->type == ICE_VSI_PF) { 1315 ctxt->info.sec_flags |= ICE_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD; 1316 ctxt->info.valid_sections |= 1317 cpu_to_le16(ICE_AQ_VSI_PROP_SECURITY_VALID); 1318 } 1319 1320 if (vsi_flags & ICE_VSI_FLAG_INIT) { 1321 ret = ice_add_vsi(hw, vsi->idx, ctxt, NULL); 1322 if (ret) { 1323 dev_err(dev, "Add VSI failed, err %d\n", ret); 1324 ret = -EIO; 1325 goto out; 1326 } 1327 } else { 1328 ret = ice_update_vsi(hw, vsi->idx, ctxt, NULL); 1329 if (ret) { 1330 dev_err(dev, "Update VSI failed, err %d\n", ret); 1331 ret = -EIO; 1332 goto out; 1333 } 1334 } 1335 1336 /* keep context for update VSI operations */ 1337 vsi->info = ctxt->info; 1338 1339 /* record VSI number returned */ 1340 vsi->vsi_num = ctxt->vsi_num; 1341 1342 out: 1343 kfree(ctxt); 1344 return ret; 1345 } 1346 1347 /** 1348 * ice_vsi_clear_rings - Deallocates the Tx and Rx rings for VSI 1349 * @vsi: the VSI having rings deallocated 1350 */ 1351 static void ice_vsi_clear_rings(struct ice_vsi *vsi) 1352 { 1353 int i; 1354 1355 /* Avoid stale references by clearing map from vector to ring */ 1356 if (vsi->q_vectors) { 1357 ice_for_each_q_vector(vsi, i) { 1358 struct ice_q_vector *q_vector = vsi->q_vectors[i]; 1359 1360 if (q_vector) { 1361 q_vector->tx.tx_ring = NULL; 1362 q_vector->rx.rx_ring = NULL; 1363 } 1364 } 1365 } 1366 1367 if (vsi->tx_rings) { 1368 ice_for_each_alloc_txq(vsi, i) { 1369 if (vsi->tx_rings[i]) { 1370 kfree_rcu(vsi->tx_rings[i], rcu); 1371 WRITE_ONCE(vsi->tx_rings[i], NULL); 1372 } 1373 } 1374 } 1375 if (vsi->rx_rings) { 1376 ice_for_each_alloc_rxq(vsi, i) { 1377 if (vsi->rx_rings[i]) { 1378 kfree_rcu(vsi->rx_rings[i], rcu); 1379 WRITE_ONCE(vsi->rx_rings[i], NULL); 1380 } 1381 } 1382 } 1383 } 1384 1385 /** 1386 * ice_vsi_alloc_rings - Allocates Tx and Rx rings for the VSI 1387 * @vsi: VSI which is having rings allocated 1388 */ 1389 static int ice_vsi_alloc_rings(struct ice_vsi *vsi) 1390 { 1391 bool dvm_ena = ice_is_dvm_ena(&vsi->back->hw); 1392 struct ice_pf *pf = vsi->back; 1393 struct device *dev; 1394 u16 i; 1395 1396 dev = ice_pf_to_dev(pf); 1397 /* Allocate Tx rings */ 1398 ice_for_each_alloc_txq(vsi, i) { 1399 struct ice_tx_ring *ring; 1400 1401 /* allocate with kzalloc(), free with kfree_rcu() */ 1402 ring = kzalloc(sizeof(*ring), GFP_KERNEL); 1403 1404 if (!ring) 1405 goto err_out; 1406 1407 ring->q_index = i; 1408 ring->reg_idx = vsi->txq_map[i]; 1409 ring->vsi = vsi; 1410 ring->tx_tstamps = &pf->ptp.port.tx; 1411 ring->dev = dev; 1412 ring->count = vsi->num_tx_desc; 1413 ring->txq_teid = ICE_INVAL_TEID; 1414 if (dvm_ena) 1415 ring->flags |= ICE_TX_FLAGS_RING_VLAN_L2TAG2; 1416 else 1417 ring->flags |= ICE_TX_FLAGS_RING_VLAN_L2TAG1; 1418 WRITE_ONCE(vsi->tx_rings[i], ring); 1419 } 1420 1421 /* Allocate Rx rings */ 1422 ice_for_each_alloc_rxq(vsi, i) { 1423 struct ice_rx_ring *ring; 1424 1425 /* allocate with kzalloc(), free with kfree_rcu() */ 1426 ring = kzalloc(sizeof(*ring), GFP_KERNEL); 1427 if (!ring) 1428 goto err_out; 1429 1430 ring->q_index = i; 1431 ring->reg_idx = vsi->rxq_map[i]; 1432 ring->vsi = vsi; 1433 ring->netdev = vsi->netdev; 1434 ring->count = vsi->num_rx_desc; 1435 ring->cached_phctime = pf->ptp.cached_phc_time; 1436 1437 if (ice_is_feature_supported(pf, ICE_F_GCS)) 1438 ring->flags |= ICE_RX_FLAGS_RING_GCS; 1439 1440 WRITE_ONCE(vsi->rx_rings[i], ring); 1441 } 1442 1443 return 0; 1444 1445 err_out: 1446 ice_vsi_clear_rings(vsi); 1447 return -ENOMEM; 1448 } 1449 1450 /** 1451 * ice_vsi_manage_rss_lut - disable/enable RSS 1452 * @vsi: the VSI being changed 1453 * @ena: boolean value indicating if this is an enable or disable request 1454 * 1455 * In the event of disable request for RSS, this function will zero out RSS 1456 * LUT, while in the event of enable request for RSS, it will reconfigure RSS 1457 * LUT. 1458 */ 1459 void ice_vsi_manage_rss_lut(struct ice_vsi *vsi, bool ena) 1460 { 1461 u8 *lut; 1462 1463 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL); 1464 if (!lut) 1465 return; 1466 1467 if (ena) { 1468 if (vsi->rss_lut_user) 1469 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size); 1470 else 1471 ice_fill_rss_lut(lut, vsi->rss_table_size, 1472 vsi->rss_size); 1473 } 1474 1475 ice_set_rss_lut(vsi, lut, vsi->rss_table_size); 1476 kfree(lut); 1477 } 1478 1479 /** 1480 * ice_vsi_cfg_crc_strip - Configure CRC stripping for a VSI 1481 * @vsi: VSI to be configured 1482 * @disable: set to true to have FCS / CRC in the frame data 1483 */ 1484 void ice_vsi_cfg_crc_strip(struct ice_vsi *vsi, bool disable) 1485 { 1486 int i; 1487 1488 ice_for_each_rxq(vsi, i) 1489 if (disable) 1490 vsi->rx_rings[i]->flags |= ICE_RX_FLAGS_CRC_STRIP_DIS; 1491 else 1492 vsi->rx_rings[i]->flags &= ~ICE_RX_FLAGS_CRC_STRIP_DIS; 1493 } 1494 1495 /** 1496 * ice_vsi_cfg_rss_lut_key - Configure RSS params for a VSI 1497 * @vsi: VSI to be configured 1498 */ 1499 int ice_vsi_cfg_rss_lut_key(struct ice_vsi *vsi) 1500 { 1501 struct ice_pf *pf = vsi->back; 1502 struct device *dev; 1503 u8 *lut, *key; 1504 int err; 1505 1506 dev = ice_pf_to_dev(pf); 1507 if (vsi->type == ICE_VSI_PF && vsi->ch_rss_size && 1508 (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))) { 1509 vsi->rss_size = min_t(u16, vsi->rss_size, vsi->ch_rss_size); 1510 } else { 1511 vsi->rss_size = min_t(u16, vsi->rss_size, vsi->num_rxq); 1512 1513 /* If orig_rss_size is valid and it is less than determined 1514 * main VSI's rss_size, update main VSI's rss_size to be 1515 * orig_rss_size so that when tc-qdisc is deleted, main VSI 1516 * RSS table gets programmed to be correct (whatever it was 1517 * to begin with (prior to setup-tc for ADQ config) 1518 */ 1519 if (vsi->orig_rss_size && vsi->rss_size < vsi->orig_rss_size && 1520 vsi->orig_rss_size <= vsi->num_rxq) { 1521 vsi->rss_size = vsi->orig_rss_size; 1522 /* now orig_rss_size is used, reset it to zero */ 1523 vsi->orig_rss_size = 0; 1524 } 1525 } 1526 1527 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL); 1528 if (!lut) 1529 return -ENOMEM; 1530 1531 if (vsi->rss_lut_user) 1532 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size); 1533 else 1534 ice_fill_rss_lut(lut, vsi->rss_table_size, vsi->rss_size); 1535 1536 err = ice_set_rss_lut(vsi, lut, vsi->rss_table_size); 1537 if (err) { 1538 dev_err(dev, "set_rss_lut failed, error %d\n", err); 1539 goto ice_vsi_cfg_rss_exit; 1540 } 1541 1542 key = kzalloc(ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE, GFP_KERNEL); 1543 if (!key) { 1544 err = -ENOMEM; 1545 goto ice_vsi_cfg_rss_exit; 1546 } 1547 1548 if (vsi->rss_hkey_user) 1549 memcpy(key, vsi->rss_hkey_user, ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE); 1550 else 1551 netdev_rss_key_fill((void *)key, ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE); 1552 1553 err = ice_set_rss_key(vsi, key); 1554 if (err) 1555 dev_err(dev, "set_rss_key failed, error %d\n", err); 1556 1557 kfree(key); 1558 ice_vsi_cfg_rss_exit: 1559 kfree(lut); 1560 return err; 1561 } 1562 1563 /** 1564 * ice_vsi_set_vf_rss_flow_fld - Sets VF VSI RSS input set for different flows 1565 * @vsi: VSI to be configured 1566 * 1567 * This function will only be called during the VF VSI setup. Upon successful 1568 * completion of package download, this function will configure default RSS 1569 * input sets for VF VSI. 1570 */ 1571 static void ice_vsi_set_vf_rss_flow_fld(struct ice_vsi *vsi) 1572 { 1573 struct ice_pf *pf = vsi->back; 1574 struct device *dev; 1575 int status; 1576 1577 dev = ice_pf_to_dev(pf); 1578 if (ice_is_safe_mode(pf)) { 1579 dev_dbg(dev, "Advanced RSS disabled. Package download failed, vsi num = %d\n", 1580 vsi->vsi_num); 1581 return; 1582 } 1583 1584 status = ice_add_avf_rss_cfg(&pf->hw, vsi, ICE_DEFAULT_RSS_HASHCFG); 1585 if (status) 1586 dev_dbg(dev, "ice_add_avf_rss_cfg failed for vsi = %d, error = %d\n", 1587 vsi->vsi_num, status); 1588 } 1589 1590 static const struct ice_rss_hash_cfg default_rss_cfgs[] = { 1591 /* configure RSS for IPv4 with input set IP src/dst */ 1592 {ICE_FLOW_SEG_HDR_IPV4, ICE_FLOW_HASH_IPV4, ICE_RSS_ANY_HEADERS, false}, 1593 /* configure RSS for IPv6 with input set IPv6 src/dst */ 1594 {ICE_FLOW_SEG_HDR_IPV6, ICE_FLOW_HASH_IPV6, ICE_RSS_ANY_HEADERS, false}, 1595 /* configure RSS for tcp4 with input set IP src/dst, TCP src/dst */ 1596 {ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV4, 1597 ICE_HASH_TCP_IPV4, ICE_RSS_ANY_HEADERS, false}, 1598 /* configure RSS for udp4 with input set IP src/dst, UDP src/dst */ 1599 {ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV4, 1600 ICE_HASH_UDP_IPV4, ICE_RSS_ANY_HEADERS, false}, 1601 /* configure RSS for sctp4 with input set IP src/dst - only support 1602 * RSS on SCTPv4 on outer headers (non-tunneled) 1603 */ 1604 {ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV4, 1605 ICE_HASH_SCTP_IPV4, ICE_RSS_OUTER_HEADERS, false}, 1606 /* configure RSS for gtpc4 with input set IPv4 src/dst */ 1607 {ICE_FLOW_SEG_HDR_GTPC | ICE_FLOW_SEG_HDR_IPV4, 1608 ICE_FLOW_HASH_IPV4, ICE_RSS_OUTER_HEADERS, false}, 1609 /* configure RSS for gtpc4t with input set IPv4 src/dst */ 1610 {ICE_FLOW_SEG_HDR_GTPC_TEID | ICE_FLOW_SEG_HDR_IPV4, 1611 ICE_FLOW_HASH_GTP_C_IPV4_TEID, ICE_RSS_OUTER_HEADERS, false}, 1612 /* configure RSS for gtpu4 with input set IPv4 src/dst */ 1613 {ICE_FLOW_SEG_HDR_GTPU_IP | ICE_FLOW_SEG_HDR_IPV4, 1614 ICE_FLOW_HASH_GTP_U_IPV4_TEID, ICE_RSS_OUTER_HEADERS, false}, 1615 /* configure RSS for gtpu4e with input set IPv4 src/dst */ 1616 {ICE_FLOW_SEG_HDR_GTPU_EH | ICE_FLOW_SEG_HDR_IPV4, 1617 ICE_FLOW_HASH_GTP_U_IPV4_EH, ICE_RSS_OUTER_HEADERS, false}, 1618 /* configure RSS for gtpu4u with input set IPv4 src/dst */ 1619 { ICE_FLOW_SEG_HDR_GTPU_UP | ICE_FLOW_SEG_HDR_IPV4, 1620 ICE_FLOW_HASH_GTP_U_IPV4_UP, ICE_RSS_OUTER_HEADERS, false}, 1621 /* configure RSS for gtpu4d with input set IPv4 src/dst */ 1622 {ICE_FLOW_SEG_HDR_GTPU_DWN | ICE_FLOW_SEG_HDR_IPV4, 1623 ICE_FLOW_HASH_GTP_U_IPV4_DWN, ICE_RSS_OUTER_HEADERS, false}, 1624 1625 /* configure RSS for tcp6 with input set IPv6 src/dst, TCP src/dst */ 1626 {ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV6, 1627 ICE_HASH_TCP_IPV6, ICE_RSS_ANY_HEADERS, false}, 1628 /* configure RSS for udp6 with input set IPv6 src/dst, UDP src/dst */ 1629 {ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV6, 1630 ICE_HASH_UDP_IPV6, ICE_RSS_ANY_HEADERS, false}, 1631 /* configure RSS for sctp6 with input set IPv6 src/dst - only support 1632 * RSS on SCTPv6 on outer headers (non-tunneled) 1633 */ 1634 {ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV6, 1635 ICE_HASH_SCTP_IPV6, ICE_RSS_OUTER_HEADERS, false}, 1636 /* configure RSS for IPSEC ESP SPI with input set MAC_IPV4_SPI */ 1637 {ICE_FLOW_SEG_HDR_ESP, 1638 ICE_FLOW_HASH_ESP_SPI, ICE_RSS_OUTER_HEADERS, false}, 1639 /* configure RSS for gtpc6 with input set IPv6 src/dst */ 1640 {ICE_FLOW_SEG_HDR_GTPC | ICE_FLOW_SEG_HDR_IPV6, 1641 ICE_FLOW_HASH_IPV6, ICE_RSS_OUTER_HEADERS, false}, 1642 /* configure RSS for gtpc6t with input set IPv6 src/dst */ 1643 {ICE_FLOW_SEG_HDR_GTPC_TEID | ICE_FLOW_SEG_HDR_IPV6, 1644 ICE_FLOW_HASH_GTP_C_IPV6_TEID, ICE_RSS_OUTER_HEADERS, false}, 1645 /* configure RSS for gtpu6 with input set IPv6 src/dst */ 1646 {ICE_FLOW_SEG_HDR_GTPU_IP | ICE_FLOW_SEG_HDR_IPV6, 1647 ICE_FLOW_HASH_GTP_U_IPV6_TEID, ICE_RSS_OUTER_HEADERS, false}, 1648 /* configure RSS for gtpu6e with input set IPv6 src/dst */ 1649 {ICE_FLOW_SEG_HDR_GTPU_EH | ICE_FLOW_SEG_HDR_IPV6, 1650 ICE_FLOW_HASH_GTP_U_IPV6_EH, ICE_RSS_OUTER_HEADERS, false}, 1651 /* configure RSS for gtpu6u with input set IPv6 src/dst */ 1652 { ICE_FLOW_SEG_HDR_GTPU_UP | ICE_FLOW_SEG_HDR_IPV6, 1653 ICE_FLOW_HASH_GTP_U_IPV6_UP, ICE_RSS_OUTER_HEADERS, false}, 1654 /* configure RSS for gtpu6d with input set IPv6 src/dst */ 1655 {ICE_FLOW_SEG_HDR_GTPU_DWN | ICE_FLOW_SEG_HDR_IPV6, 1656 ICE_FLOW_HASH_GTP_U_IPV6_DWN, ICE_RSS_OUTER_HEADERS, false}, 1657 }; 1658 1659 /** 1660 * ice_vsi_set_rss_flow_fld - Sets RSS input set for different flows 1661 * @vsi: VSI to be configured 1662 * 1663 * This function will only be called after successful download package call 1664 * during initialization of PF. Since the downloaded package will erase the 1665 * RSS section, this function will configure RSS input sets for different 1666 * flow types. The last profile added has the highest priority, therefore 2 1667 * tuple profiles (i.e. IPv4 src/dst) are added before 4 tuple profiles 1668 * (i.e. IPv4 src/dst TCP src/dst port). 1669 */ 1670 static void ice_vsi_set_rss_flow_fld(struct ice_vsi *vsi) 1671 { 1672 u16 vsi_num = vsi->vsi_num; 1673 struct ice_pf *pf = vsi->back; 1674 struct ice_hw *hw = &pf->hw; 1675 struct device *dev; 1676 int status; 1677 u32 i; 1678 1679 dev = ice_pf_to_dev(pf); 1680 if (ice_is_safe_mode(pf)) { 1681 dev_dbg(dev, "Advanced RSS disabled. Package download failed, vsi num = %d\n", 1682 vsi_num); 1683 return; 1684 } 1685 for (i = 0; i < ARRAY_SIZE(default_rss_cfgs); i++) { 1686 const struct ice_rss_hash_cfg *cfg = &default_rss_cfgs[i]; 1687 1688 status = ice_add_rss_cfg(hw, vsi, cfg); 1689 if (status) 1690 dev_dbg(dev, "ice_add_rss_cfg failed, addl_hdrs = %x, hash_flds = %llx, hdr_type = %d, symm = %d\n", 1691 cfg->addl_hdrs, cfg->hash_flds, 1692 cfg->hdr_type, cfg->symm); 1693 } 1694 } 1695 1696 /** 1697 * ice_pf_state_is_nominal - checks the PF for nominal state 1698 * @pf: pointer to PF to check 1699 * 1700 * Check the PF's state for a collection of bits that would indicate 1701 * the PF is in a state that would inhibit normal operation for 1702 * driver functionality. 1703 * 1704 * Returns true if PF is in a nominal state, false otherwise 1705 */ 1706 bool ice_pf_state_is_nominal(struct ice_pf *pf) 1707 { 1708 DECLARE_BITMAP(check_bits, ICE_STATE_NBITS) = { 0 }; 1709 1710 if (!pf) 1711 return false; 1712 1713 bitmap_set(check_bits, 0, ICE_STATE_NOMINAL_CHECK_BITS); 1714 if (bitmap_intersects(pf->state, check_bits, ICE_STATE_NBITS)) 1715 return false; 1716 1717 return true; 1718 } 1719 1720 #define ICE_FW_MODE_REC_M BIT(1) 1721 bool ice_is_recovery_mode(struct ice_hw *hw) 1722 { 1723 return rd32(hw, GL_MNG_FWSM) & ICE_FW_MODE_REC_M; 1724 } 1725 1726 /** 1727 * ice_update_eth_stats - Update VSI-specific ethernet statistics counters 1728 * @vsi: the VSI to be updated 1729 */ 1730 void ice_update_eth_stats(struct ice_vsi *vsi) 1731 { 1732 struct ice_eth_stats *prev_es, *cur_es; 1733 struct ice_hw *hw = &vsi->back->hw; 1734 struct ice_pf *pf = vsi->back; 1735 u16 vsi_num = vsi->vsi_num; /* HW absolute index of a VSI */ 1736 1737 prev_es = &vsi->eth_stats_prev; 1738 cur_es = &vsi->eth_stats; 1739 1740 if (ice_is_reset_in_progress(pf->state)) 1741 vsi->stat_offsets_loaded = false; 1742 1743 ice_stat_update40(hw, GLV_GORCL(vsi_num), vsi->stat_offsets_loaded, 1744 &prev_es->rx_bytes, &cur_es->rx_bytes); 1745 1746 ice_stat_update40(hw, GLV_UPRCL(vsi_num), vsi->stat_offsets_loaded, 1747 &prev_es->rx_unicast, &cur_es->rx_unicast); 1748 1749 ice_stat_update40(hw, GLV_MPRCL(vsi_num), vsi->stat_offsets_loaded, 1750 &prev_es->rx_multicast, &cur_es->rx_multicast); 1751 1752 ice_stat_update40(hw, GLV_BPRCL(vsi_num), vsi->stat_offsets_loaded, 1753 &prev_es->rx_broadcast, &cur_es->rx_broadcast); 1754 1755 ice_stat_update32(hw, GLV_RDPC(vsi_num), vsi->stat_offsets_loaded, 1756 &prev_es->rx_discards, &cur_es->rx_discards); 1757 1758 ice_stat_update40(hw, GLV_GOTCL(vsi_num), vsi->stat_offsets_loaded, 1759 &prev_es->tx_bytes, &cur_es->tx_bytes); 1760 1761 ice_stat_update40(hw, GLV_UPTCL(vsi_num), vsi->stat_offsets_loaded, 1762 &prev_es->tx_unicast, &cur_es->tx_unicast); 1763 1764 ice_stat_update40(hw, GLV_MPTCL(vsi_num), vsi->stat_offsets_loaded, 1765 &prev_es->tx_multicast, &cur_es->tx_multicast); 1766 1767 ice_stat_update40(hw, GLV_BPTCL(vsi_num), vsi->stat_offsets_loaded, 1768 &prev_es->tx_broadcast, &cur_es->tx_broadcast); 1769 1770 ice_stat_update32(hw, GLV_TEPC(vsi_num), vsi->stat_offsets_loaded, 1771 &prev_es->tx_errors, &cur_es->tx_errors); 1772 1773 vsi->stat_offsets_loaded = true; 1774 } 1775 1776 /** 1777 * ice_write_qrxflxp_cntxt - write/configure QRXFLXP_CNTXT register 1778 * @hw: HW pointer 1779 * @pf_q: index of the Rx queue in the PF's queue space 1780 * @rxdid: flexible descriptor RXDID 1781 * @prio: priority for the RXDID for this queue 1782 * @ena_ts: true to enable timestamp and false to disable timestamp 1783 */ 1784 void ice_write_qrxflxp_cntxt(struct ice_hw *hw, u16 pf_q, u32 rxdid, u32 prio, 1785 bool ena_ts) 1786 { 1787 int regval = rd32(hw, QRXFLXP_CNTXT(pf_q)); 1788 1789 /* clear any previous values */ 1790 regval &= ~(QRXFLXP_CNTXT_RXDID_IDX_M | 1791 QRXFLXP_CNTXT_RXDID_PRIO_M | 1792 QRXFLXP_CNTXT_TS_M); 1793 1794 regval |= FIELD_PREP(QRXFLXP_CNTXT_RXDID_IDX_M, rxdid); 1795 regval |= FIELD_PREP(QRXFLXP_CNTXT_RXDID_PRIO_M, prio); 1796 1797 if (ena_ts) 1798 /* Enable TimeSync on this queue */ 1799 regval |= QRXFLXP_CNTXT_TS_M; 1800 1801 wr32(hw, QRXFLXP_CNTXT(pf_q), regval); 1802 } 1803 1804 /** 1805 * ice_intrl_usec_to_reg - convert interrupt rate limit to register value 1806 * @intrl: interrupt rate limit in usecs 1807 * @gran: interrupt rate limit granularity in usecs 1808 * 1809 * This function converts a decimal interrupt rate limit in usecs to the format 1810 * expected by firmware. 1811 */ 1812 static u32 ice_intrl_usec_to_reg(u8 intrl, u8 gran) 1813 { 1814 u32 val = intrl / gran; 1815 1816 if (val) 1817 return val | GLINT_RATE_INTRL_ENA_M; 1818 return 0; 1819 } 1820 1821 /** 1822 * ice_write_intrl - write throttle rate limit to interrupt specific register 1823 * @q_vector: pointer to interrupt specific structure 1824 * @intrl: throttle rate limit in microseconds to write 1825 */ 1826 void ice_write_intrl(struct ice_q_vector *q_vector, u8 intrl) 1827 { 1828 struct ice_hw *hw = &q_vector->vsi->back->hw; 1829 1830 wr32(hw, GLINT_RATE(q_vector->reg_idx), 1831 ice_intrl_usec_to_reg(intrl, ICE_INTRL_GRAN_ABOVE_25)); 1832 } 1833 1834 static struct ice_q_vector *ice_pull_qvec_from_rc(struct ice_ring_container *rc) 1835 { 1836 switch (rc->type) { 1837 case ICE_RX_CONTAINER: 1838 if (rc->rx_ring) 1839 return rc->rx_ring->q_vector; 1840 break; 1841 case ICE_TX_CONTAINER: 1842 if (rc->tx_ring) 1843 return rc->tx_ring->q_vector; 1844 break; 1845 default: 1846 break; 1847 } 1848 1849 return NULL; 1850 } 1851 1852 /** 1853 * __ice_write_itr - write throttle rate to register 1854 * @q_vector: pointer to interrupt data structure 1855 * @rc: pointer to ring container 1856 * @itr: throttle rate in microseconds to write 1857 */ 1858 static void __ice_write_itr(struct ice_q_vector *q_vector, 1859 struct ice_ring_container *rc, u16 itr) 1860 { 1861 struct ice_hw *hw = &q_vector->vsi->back->hw; 1862 1863 wr32(hw, GLINT_ITR(rc->itr_idx, q_vector->reg_idx), 1864 ITR_REG_ALIGN(itr) >> ICE_ITR_GRAN_S); 1865 } 1866 1867 /** 1868 * ice_write_itr - write throttle rate to queue specific register 1869 * @rc: pointer to ring container 1870 * @itr: throttle rate in microseconds to write 1871 */ 1872 void ice_write_itr(struct ice_ring_container *rc, u16 itr) 1873 { 1874 struct ice_q_vector *q_vector; 1875 1876 q_vector = ice_pull_qvec_from_rc(rc); 1877 if (!q_vector) 1878 return; 1879 1880 __ice_write_itr(q_vector, rc, itr); 1881 } 1882 1883 /** 1884 * ice_set_q_vector_intrl - set up interrupt rate limiting 1885 * @q_vector: the vector to be configured 1886 * 1887 * Interrupt rate limiting is local to the vector, not per-queue so we must 1888 * detect if either ring container has dynamic moderation enabled to decide 1889 * what to set the interrupt rate limit to via INTRL settings. In the case that 1890 * dynamic moderation is disabled on both, write the value with the cached 1891 * setting to make sure INTRL register matches the user visible value. 1892 */ 1893 void ice_set_q_vector_intrl(struct ice_q_vector *q_vector) 1894 { 1895 if (ITR_IS_DYNAMIC(&q_vector->tx) || ITR_IS_DYNAMIC(&q_vector->rx)) { 1896 /* in the case of dynamic enabled, cap each vector to no more 1897 * than (4 us) 250,000 ints/sec, which allows low latency 1898 * but still less than 500,000 interrupts per second, which 1899 * reduces CPU a bit in the case of the lowest latency 1900 * setting. The 4 here is a value in microseconds. 1901 */ 1902 ice_write_intrl(q_vector, 4); 1903 } else { 1904 ice_write_intrl(q_vector, q_vector->intrl); 1905 } 1906 } 1907 1908 /** 1909 * ice_vsi_cfg_msix - MSIX mode Interrupt Config in the HW 1910 * @vsi: the VSI being configured 1911 * 1912 * This configures MSIX mode interrupts for the PF VSI, and should not be used 1913 * for the VF VSI. 1914 */ 1915 void ice_vsi_cfg_msix(struct ice_vsi *vsi) 1916 { 1917 struct ice_pf *pf = vsi->back; 1918 struct ice_hw *hw = &pf->hw; 1919 u16 txq = 0, rxq = 0; 1920 int i, q; 1921 1922 ice_for_each_q_vector(vsi, i) { 1923 struct ice_q_vector *q_vector = vsi->q_vectors[i]; 1924 u16 reg_idx = q_vector->reg_idx; 1925 1926 ice_cfg_itr(hw, q_vector); 1927 1928 /* Both Transmit Queue Interrupt Cause Control register 1929 * and Receive Queue Interrupt Cause control register 1930 * expects MSIX_INDX field to be the vector index 1931 * within the function space and not the absolute 1932 * vector index across PF or across device. 1933 * For SR-IOV VF VSIs queue vector index always starts 1934 * with 1 since first vector index(0) is used for OICR 1935 * in VF space. Since VMDq and other PF VSIs are within 1936 * the PF function space, use the vector index that is 1937 * tracked for this PF. 1938 */ 1939 for (q = 0; q < q_vector->num_ring_tx; q++) { 1940 ice_cfg_txq_interrupt(vsi, txq, reg_idx, 1941 q_vector->tx.itr_idx); 1942 txq++; 1943 } 1944 1945 for (q = 0; q < q_vector->num_ring_rx; q++) { 1946 ice_cfg_rxq_interrupt(vsi, rxq, reg_idx, 1947 q_vector->rx.itr_idx); 1948 rxq++; 1949 } 1950 } 1951 } 1952 1953 /** 1954 * ice_vsi_start_all_rx_rings - start/enable all of a VSI's Rx rings 1955 * @vsi: the VSI whose rings are to be enabled 1956 * 1957 * Returns 0 on success and a negative value on error 1958 */ 1959 int ice_vsi_start_all_rx_rings(struct ice_vsi *vsi) 1960 { 1961 return ice_vsi_ctrl_all_rx_rings(vsi, true); 1962 } 1963 1964 /** 1965 * ice_vsi_stop_all_rx_rings - stop/disable all of a VSI's Rx rings 1966 * @vsi: the VSI whose rings are to be disabled 1967 * 1968 * Returns 0 on success and a negative value on error 1969 */ 1970 int ice_vsi_stop_all_rx_rings(struct ice_vsi *vsi) 1971 { 1972 return ice_vsi_ctrl_all_rx_rings(vsi, false); 1973 } 1974 1975 /** 1976 * ice_vsi_stop_tx_rings - Disable Tx rings 1977 * @vsi: the VSI being configured 1978 * @rst_src: reset source 1979 * @rel_vmvf_num: Relative ID of VF/VM 1980 * @rings: Tx ring array to be stopped 1981 * @count: number of Tx ring array elements 1982 */ 1983 static int 1984 ice_vsi_stop_tx_rings(struct ice_vsi *vsi, enum ice_disq_rst_src rst_src, 1985 u16 rel_vmvf_num, struct ice_tx_ring **rings, u16 count) 1986 { 1987 u16 q_idx; 1988 1989 if (vsi->num_txq > ICE_LAN_TXQ_MAX_QDIS) 1990 return -EINVAL; 1991 1992 for (q_idx = 0; q_idx < count; q_idx++) { 1993 struct ice_txq_meta txq_meta = { }; 1994 int status; 1995 1996 if (!rings || !rings[q_idx]) 1997 return -EINVAL; 1998 1999 ice_fill_txq_meta(vsi, rings[q_idx], &txq_meta); 2000 status = ice_vsi_stop_tx_ring(vsi, rst_src, rel_vmvf_num, 2001 rings[q_idx], &txq_meta); 2002 2003 if (status) 2004 return status; 2005 } 2006 2007 return 0; 2008 } 2009 2010 /** 2011 * ice_vsi_stop_lan_tx_rings - Disable LAN Tx rings 2012 * @vsi: the VSI being configured 2013 * @rst_src: reset source 2014 * @rel_vmvf_num: Relative ID of VF/VM 2015 */ 2016 int 2017 ice_vsi_stop_lan_tx_rings(struct ice_vsi *vsi, enum ice_disq_rst_src rst_src, 2018 u16 rel_vmvf_num) 2019 { 2020 return ice_vsi_stop_tx_rings(vsi, rst_src, rel_vmvf_num, vsi->tx_rings, vsi->num_txq); 2021 } 2022 2023 /** 2024 * ice_vsi_stop_xdp_tx_rings - Disable XDP Tx rings 2025 * @vsi: the VSI being configured 2026 */ 2027 int ice_vsi_stop_xdp_tx_rings(struct ice_vsi *vsi) 2028 { 2029 return ice_vsi_stop_tx_rings(vsi, ICE_NO_RESET, 0, vsi->xdp_rings, vsi->num_xdp_txq); 2030 } 2031 2032 /** 2033 * ice_vsi_is_rx_queue_active 2034 * @vsi: the VSI being configured 2035 * 2036 * Return true if at least one queue is active. 2037 */ 2038 bool ice_vsi_is_rx_queue_active(struct ice_vsi *vsi) 2039 { 2040 struct ice_pf *pf = vsi->back; 2041 struct ice_hw *hw = &pf->hw; 2042 int i; 2043 2044 ice_for_each_rxq(vsi, i) { 2045 u32 rx_reg; 2046 int pf_q; 2047 2048 pf_q = vsi->rxq_map[i]; 2049 rx_reg = rd32(hw, QRX_CTRL(pf_q)); 2050 if (rx_reg & QRX_CTRL_QENA_STAT_M) 2051 return true; 2052 } 2053 2054 return false; 2055 } 2056 2057 static void ice_vsi_set_tc_cfg(struct ice_vsi *vsi) 2058 { 2059 if (!test_bit(ICE_FLAG_DCB_ENA, vsi->back->flags)) { 2060 vsi->tc_cfg.ena_tc = ICE_DFLT_TRAFFIC_CLASS; 2061 vsi->tc_cfg.numtc = 1; 2062 return; 2063 } 2064 2065 /* set VSI TC information based on DCB config */ 2066 ice_vsi_set_dcb_tc_cfg(vsi); 2067 } 2068 2069 /** 2070 * ice_vsi_cfg_sw_lldp - Config switch rules for LLDP packet handling 2071 * @vsi: the VSI being configured 2072 * @tx: bool to determine Tx or Rx rule 2073 * @create: bool to determine create or remove Rule 2074 * 2075 * Adding an ethtype Tx rule to the uplink VSI results in it being applied 2076 * to the whole port, so LLDP transmission for VFs will be blocked too. 2077 */ 2078 void ice_vsi_cfg_sw_lldp(struct ice_vsi *vsi, bool tx, bool create) 2079 { 2080 int (*eth_fltr)(struct ice_vsi *v, u16 type, u16 flag, 2081 enum ice_sw_fwd_act_type act); 2082 struct ice_pf *pf = vsi->back; 2083 struct device *dev; 2084 int status; 2085 2086 dev = ice_pf_to_dev(pf); 2087 eth_fltr = create ? ice_fltr_add_eth : ice_fltr_remove_eth; 2088 2089 if (tx) { 2090 status = eth_fltr(vsi, ETH_P_LLDP, ICE_FLTR_TX, 2091 ICE_DROP_PACKET); 2092 } else { 2093 if (!test_bit(ICE_FLAG_LLDP_AQ_FLTR, pf->flags)) { 2094 status = eth_fltr(vsi, ETH_P_LLDP, ICE_FLTR_RX, 2095 ICE_FWD_TO_VSI); 2096 if (!status || !create) 2097 goto report; 2098 2099 dev_info(dev, 2100 "Failed to add generic LLDP Rx filter on VSI %i error: %d, falling back to specialized AQ control\n", 2101 vsi->vsi_num, status); 2102 } 2103 2104 status = ice_lldp_fltr_add_remove(&pf->hw, vsi, create); 2105 if (!status) 2106 set_bit(ICE_FLAG_LLDP_AQ_FLTR, pf->flags); 2107 2108 } 2109 2110 report: 2111 if (status) 2112 dev_warn(dev, "Failed to %s %s LLDP rule on VSI %i error: %d\n", 2113 create ? "add" : "remove", tx ? "Tx" : "Rx", 2114 vsi->vsi_num, status); 2115 } 2116 2117 /** 2118 * ice_cfg_sw_rx_lldp - Enable/disable software handling of LLDP 2119 * @pf: the PF being configured 2120 * @enable: enable or disable 2121 * 2122 * Configure switch rules to enable/disable LLDP handling by software 2123 * across PF. 2124 */ 2125 void ice_cfg_sw_rx_lldp(struct ice_pf *pf, bool enable) 2126 { 2127 struct ice_vsi *vsi; 2128 struct ice_vf *vf; 2129 unsigned int bkt; 2130 2131 vsi = ice_get_main_vsi(pf); 2132 ice_vsi_cfg_sw_lldp(vsi, false, enable); 2133 2134 if (!test_bit(ICE_FLAG_SRIOV_ENA, pf->flags)) 2135 return; 2136 2137 ice_for_each_vf(pf, bkt, vf) { 2138 vsi = ice_get_vf_vsi(vf); 2139 2140 if (WARN_ON(!vsi)) 2141 continue; 2142 2143 if (ice_vf_is_lldp_ena(vf)) 2144 ice_vsi_cfg_sw_lldp(vsi, false, enable); 2145 } 2146 } 2147 2148 /** 2149 * ice_set_agg_vsi - sets up scheduler aggregator node and move VSI into it 2150 * @vsi: pointer to the VSI 2151 * 2152 * This function will allocate new scheduler aggregator now if needed and will 2153 * move specified VSI into it. 2154 */ 2155 static void ice_set_agg_vsi(struct ice_vsi *vsi) 2156 { 2157 struct device *dev = ice_pf_to_dev(vsi->back); 2158 struct ice_agg_node *agg_node_iter = NULL; 2159 u32 agg_id = ICE_INVALID_AGG_NODE_ID; 2160 struct ice_agg_node *agg_node = NULL; 2161 int node_offset, max_agg_nodes = 0; 2162 struct ice_port_info *port_info; 2163 struct ice_pf *pf = vsi->back; 2164 u32 agg_node_id_start = 0; 2165 int status; 2166 2167 /* create (as needed) scheduler aggregator node and move VSI into 2168 * corresponding aggregator node 2169 * - PF aggregator node to contains VSIs of type _PF and _CTRL 2170 * - VF aggregator nodes will contain VF VSI 2171 */ 2172 port_info = pf->hw.port_info; 2173 if (!port_info) 2174 return; 2175 2176 switch (vsi->type) { 2177 case ICE_VSI_CTRL: 2178 case ICE_VSI_CHNL: 2179 case ICE_VSI_LB: 2180 case ICE_VSI_PF: 2181 case ICE_VSI_SF: 2182 max_agg_nodes = ICE_MAX_PF_AGG_NODES; 2183 agg_node_id_start = ICE_PF_AGG_NODE_ID_START; 2184 agg_node_iter = &pf->pf_agg_node[0]; 2185 break; 2186 case ICE_VSI_VF: 2187 /* user can create 'n' VFs on a given PF, but since max children 2188 * per aggregator node can be only 64. Following code handles 2189 * aggregator(s) for VF VSIs, either selects a agg_node which 2190 * was already created provided num_vsis < 64, otherwise 2191 * select next available node, which will be created 2192 */ 2193 max_agg_nodes = ICE_MAX_VF_AGG_NODES; 2194 agg_node_id_start = ICE_VF_AGG_NODE_ID_START; 2195 agg_node_iter = &pf->vf_agg_node[0]; 2196 break; 2197 default: 2198 /* other VSI type, handle later if needed */ 2199 dev_dbg(dev, "unexpected VSI type %s\n", 2200 ice_vsi_type_str(vsi->type)); 2201 return; 2202 } 2203 2204 /* find the appropriate aggregator node */ 2205 for (node_offset = 0; node_offset < max_agg_nodes; node_offset++) { 2206 /* see if we can find space in previously created 2207 * node if num_vsis < 64, otherwise skip 2208 */ 2209 if (agg_node_iter->num_vsis && 2210 agg_node_iter->num_vsis == ICE_MAX_VSIS_IN_AGG_NODE) { 2211 agg_node_iter++; 2212 continue; 2213 } 2214 2215 if (agg_node_iter->valid && 2216 agg_node_iter->agg_id != ICE_INVALID_AGG_NODE_ID) { 2217 agg_id = agg_node_iter->agg_id; 2218 agg_node = agg_node_iter; 2219 break; 2220 } 2221 2222 /* find unclaimed agg_id */ 2223 if (agg_node_iter->agg_id == ICE_INVALID_AGG_NODE_ID) { 2224 agg_id = node_offset + agg_node_id_start; 2225 agg_node = agg_node_iter; 2226 break; 2227 } 2228 /* move to next agg_node */ 2229 agg_node_iter++; 2230 } 2231 2232 if (!agg_node) 2233 return; 2234 2235 /* if selected aggregator node was not created, create it */ 2236 if (!agg_node->valid) { 2237 status = ice_cfg_agg(port_info, agg_id, ICE_AGG_TYPE_AGG, 2238 (u8)vsi->tc_cfg.ena_tc); 2239 if (status) { 2240 dev_err(dev, "unable to create aggregator node with agg_id %u\n", 2241 agg_id); 2242 return; 2243 } 2244 /* aggregator node is created, store the needed info */ 2245 agg_node->valid = true; 2246 agg_node->agg_id = agg_id; 2247 } 2248 2249 /* move VSI to corresponding aggregator node */ 2250 status = ice_move_vsi_to_agg(port_info, agg_id, vsi->idx, 2251 (u8)vsi->tc_cfg.ena_tc); 2252 if (status) { 2253 dev_err(dev, "unable to move VSI idx %u into aggregator %u node", 2254 vsi->idx, agg_id); 2255 return; 2256 } 2257 2258 /* keep active children count for aggregator node */ 2259 agg_node->num_vsis++; 2260 2261 /* cache the 'agg_id' in VSI, so that after reset - VSI will be moved 2262 * to aggregator node 2263 */ 2264 vsi->agg_node = agg_node; 2265 dev_dbg(dev, "successfully moved VSI idx %u tc_bitmap 0x%x) into aggregator node %d which has num_vsis %u\n", 2266 vsi->idx, vsi->tc_cfg.ena_tc, vsi->agg_node->agg_id, 2267 vsi->agg_node->num_vsis); 2268 } 2269 2270 static int ice_vsi_cfg_tc_lan(struct ice_pf *pf, struct ice_vsi *vsi) 2271 { 2272 u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 }; 2273 struct device *dev = ice_pf_to_dev(pf); 2274 int ret, i; 2275 2276 /* configure VSI nodes based on number of queues and TC's */ 2277 ice_for_each_traffic_class(i) { 2278 if (!(vsi->tc_cfg.ena_tc & BIT(i))) 2279 continue; 2280 2281 if (vsi->type == ICE_VSI_CHNL) { 2282 if (!vsi->alloc_txq && vsi->num_txq) 2283 max_txqs[i] = vsi->num_txq; 2284 else 2285 max_txqs[i] = pf->num_lan_tx; 2286 } else { 2287 max_txqs[i] = vsi->alloc_txq; 2288 } 2289 2290 if (vsi->type == ICE_VSI_PF) 2291 max_txqs[i] += vsi->num_xdp_txq; 2292 } 2293 2294 dev_dbg(dev, "vsi->tc_cfg.ena_tc = %d\n", vsi->tc_cfg.ena_tc); 2295 ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, vsi->tc_cfg.ena_tc, 2296 max_txqs); 2297 if (ret) { 2298 dev_err(dev, "VSI %d failed lan queue config, error %d\n", 2299 vsi->vsi_num, ret); 2300 return ret; 2301 } 2302 2303 return 0; 2304 } 2305 2306 /** 2307 * ice_vsi_cfg_def - configure default VSI based on the type 2308 * @vsi: pointer to VSI 2309 */ 2310 static int ice_vsi_cfg_def(struct ice_vsi *vsi) 2311 { 2312 struct device *dev = ice_pf_to_dev(vsi->back); 2313 struct ice_pf *pf = vsi->back; 2314 int ret; 2315 2316 vsi->vsw = pf->first_sw; 2317 2318 ret = ice_vsi_alloc_def(vsi, vsi->ch); 2319 if (ret) 2320 return ret; 2321 2322 /* allocate memory for Tx/Rx ring stat pointers */ 2323 ret = ice_vsi_alloc_stat_arrays(vsi); 2324 if (ret) 2325 goto unroll_vsi_alloc; 2326 2327 ice_alloc_fd_res(vsi); 2328 2329 ret = ice_vsi_get_qs(vsi); 2330 if (ret) { 2331 dev_err(dev, "Failed to allocate queues. vsi->idx = %d\n", 2332 vsi->idx); 2333 goto unroll_vsi_alloc_stat; 2334 } 2335 2336 /* set RSS capabilities */ 2337 ice_vsi_set_rss_params(vsi); 2338 2339 /* set TC configuration */ 2340 ice_vsi_set_tc_cfg(vsi); 2341 2342 /* create the VSI */ 2343 ret = ice_vsi_init(vsi, vsi->flags); 2344 if (ret) 2345 goto unroll_get_qs; 2346 2347 ice_vsi_init_vlan_ops(vsi); 2348 2349 switch (vsi->type) { 2350 case ICE_VSI_CTRL: 2351 case ICE_VSI_SF: 2352 case ICE_VSI_PF: 2353 ret = ice_vsi_alloc_q_vectors(vsi); 2354 if (ret) 2355 goto unroll_vsi_init; 2356 2357 ret = ice_vsi_alloc_rings(vsi); 2358 if (ret) 2359 goto unroll_vector_base; 2360 2361 ret = ice_vsi_alloc_ring_stats(vsi); 2362 if (ret) 2363 goto unroll_vector_base; 2364 2365 if (ice_is_xdp_ena_vsi(vsi)) { 2366 ret = ice_vsi_determine_xdp_res(vsi); 2367 if (ret) 2368 goto unroll_vector_base; 2369 ret = ice_prepare_xdp_rings(vsi, vsi->xdp_prog, 2370 ICE_XDP_CFG_PART); 2371 if (ret) 2372 goto unroll_vector_base; 2373 } 2374 2375 ice_vsi_map_rings_to_vectors(vsi); 2376 2377 vsi->stat_offsets_loaded = false; 2378 2379 /* ICE_VSI_CTRL does not need RSS so skip RSS processing */ 2380 if (vsi->type != ICE_VSI_CTRL) 2381 /* Do not exit if configuring RSS had an issue, at 2382 * least receive traffic on first queue. Hence no 2383 * need to capture return value 2384 */ 2385 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) { 2386 ice_vsi_cfg_rss_lut_key(vsi); 2387 ice_vsi_set_rss_flow_fld(vsi); 2388 } 2389 ice_init_arfs(vsi); 2390 break; 2391 case ICE_VSI_CHNL: 2392 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) { 2393 ice_vsi_cfg_rss_lut_key(vsi); 2394 ice_vsi_set_rss_flow_fld(vsi); 2395 } 2396 break; 2397 case ICE_VSI_VF: 2398 /* VF driver will take care of creating netdev for this type and 2399 * map queues to vectors through Virtchnl, PF driver only 2400 * creates a VSI and corresponding structures for bookkeeping 2401 * purpose 2402 */ 2403 ret = ice_vsi_alloc_q_vectors(vsi); 2404 if (ret) 2405 goto unroll_vsi_init; 2406 2407 ret = ice_vsi_alloc_rings(vsi); 2408 if (ret) 2409 goto unroll_alloc_q_vector; 2410 2411 ret = ice_vsi_alloc_ring_stats(vsi); 2412 if (ret) 2413 goto unroll_vector_base; 2414 2415 vsi->stat_offsets_loaded = false; 2416 2417 /* Do not exit if configuring RSS had an issue, at least 2418 * receive traffic on first queue. Hence no need to capture 2419 * return value 2420 */ 2421 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) { 2422 ice_vsi_cfg_rss_lut_key(vsi); 2423 ice_vsi_set_vf_rss_flow_fld(vsi); 2424 } 2425 break; 2426 case ICE_VSI_LB: 2427 ret = ice_vsi_alloc_rings(vsi); 2428 if (ret) 2429 goto unroll_vsi_init; 2430 2431 ret = ice_vsi_alloc_ring_stats(vsi); 2432 if (ret) 2433 goto unroll_vector_base; 2434 2435 break; 2436 default: 2437 /* clean up the resources and exit */ 2438 ret = -EINVAL; 2439 goto unroll_vsi_init; 2440 } 2441 2442 return 0; 2443 2444 unroll_vector_base: 2445 /* reclaim SW interrupts back to the common pool */ 2446 unroll_alloc_q_vector: 2447 ice_vsi_free_q_vectors(vsi); 2448 unroll_vsi_init: 2449 ice_vsi_delete_from_hw(vsi); 2450 unroll_get_qs: 2451 ice_vsi_put_qs(vsi); 2452 unroll_vsi_alloc_stat: 2453 ice_vsi_free_stats(vsi); 2454 unroll_vsi_alloc: 2455 ice_vsi_free_arrays(vsi); 2456 return ret; 2457 } 2458 2459 /** 2460 * ice_vsi_cfg - configure a previously allocated VSI 2461 * @vsi: pointer to VSI 2462 */ 2463 int ice_vsi_cfg(struct ice_vsi *vsi) 2464 { 2465 struct ice_pf *pf = vsi->back; 2466 int ret; 2467 2468 if (WARN_ON(vsi->type == ICE_VSI_VF && !vsi->vf)) 2469 return -EINVAL; 2470 2471 ret = ice_vsi_cfg_def(vsi); 2472 if (ret) 2473 return ret; 2474 2475 ret = ice_vsi_cfg_tc_lan(vsi->back, vsi); 2476 if (ret) 2477 ice_vsi_decfg(vsi); 2478 2479 if (vsi->type == ICE_VSI_CTRL) { 2480 if (vsi->vf) { 2481 WARN_ON(vsi->vf->ctrl_vsi_idx != ICE_NO_VSI); 2482 vsi->vf->ctrl_vsi_idx = vsi->idx; 2483 } else { 2484 WARN_ON(pf->ctrl_vsi_idx != ICE_NO_VSI); 2485 pf->ctrl_vsi_idx = vsi->idx; 2486 } 2487 } 2488 2489 return ret; 2490 } 2491 2492 /** 2493 * ice_vsi_decfg - remove all VSI configuration 2494 * @vsi: pointer to VSI 2495 */ 2496 void ice_vsi_decfg(struct ice_vsi *vsi) 2497 { 2498 struct ice_pf *pf = vsi->back; 2499 int err; 2500 2501 ice_rm_vsi_lan_cfg(vsi->port_info, vsi->idx); 2502 err = ice_rm_vsi_rdma_cfg(vsi->port_info, vsi->idx); 2503 if (err) 2504 dev_err(ice_pf_to_dev(pf), "Failed to remove RDMA scheduler config for VSI %u, err %d\n", 2505 vsi->vsi_num, err); 2506 2507 if (vsi->xdp_rings) 2508 /* return value check can be skipped here, it always returns 2509 * 0 if reset is in progress 2510 */ 2511 ice_destroy_xdp_rings(vsi, ICE_XDP_CFG_PART); 2512 2513 ice_vsi_clear_rings(vsi); 2514 ice_vsi_free_q_vectors(vsi); 2515 ice_vsi_put_qs(vsi); 2516 ice_vsi_free_arrays(vsi); 2517 2518 /* SR-IOV determines needed MSIX resources all at once instead of per 2519 * VSI since when VFs are spawned we know how many VFs there are and how 2520 * many interrupts each VF needs. SR-IOV MSIX resources are also 2521 * cleared in the same manner. 2522 */ 2523 2524 if (vsi->type == ICE_VSI_VF && 2525 vsi->agg_node && vsi->agg_node->valid) 2526 vsi->agg_node->num_vsis--; 2527 } 2528 2529 /** 2530 * ice_vsi_setup - Set up a VSI by a given type 2531 * @pf: board private structure 2532 * @params: parameters to use when creating the VSI 2533 * 2534 * This allocates the sw VSI structure and its queue resources. 2535 * 2536 * Returns pointer to the successfully allocated and configured VSI sw struct on 2537 * success, NULL on failure. 2538 */ 2539 struct ice_vsi * 2540 ice_vsi_setup(struct ice_pf *pf, struct ice_vsi_cfg_params *params) 2541 { 2542 struct device *dev = ice_pf_to_dev(pf); 2543 struct ice_vsi *vsi; 2544 int ret; 2545 2546 /* ice_vsi_setup can only initialize a new VSI, and we must have 2547 * a port_info structure for it. 2548 */ 2549 if (WARN_ON(!(params->flags & ICE_VSI_FLAG_INIT)) || 2550 WARN_ON(!params->port_info)) 2551 return NULL; 2552 2553 vsi = ice_vsi_alloc(pf); 2554 if (!vsi) { 2555 dev_err(dev, "could not allocate VSI\n"); 2556 return NULL; 2557 } 2558 2559 vsi->params = *params; 2560 ret = ice_vsi_cfg(vsi); 2561 if (ret) 2562 goto err_vsi_cfg; 2563 2564 /* Add switch rule to drop all Tx Flow Control Frames, of look up 2565 * type ETHERTYPE from VSIs, and restrict malicious VF from sending 2566 * out PAUSE or PFC frames. If enabled, FW can still send FC frames. 2567 * The rule is added once for PF VSI in order to create appropriate 2568 * recipe, since VSI/VSI list is ignored with drop action... 2569 * Also add rules to handle LLDP Tx packets. Tx LLDP packets need to 2570 * be dropped so that VFs cannot send LLDP packets to reconfig DCB 2571 * settings in the HW. 2572 */ 2573 if (!ice_is_safe_mode(pf) && vsi->type == ICE_VSI_PF) { 2574 ice_fltr_add_eth(vsi, ETH_P_PAUSE, ICE_FLTR_TX, 2575 ICE_DROP_PACKET); 2576 ice_vsi_cfg_sw_lldp(vsi, true, true); 2577 } 2578 2579 if (!vsi->agg_node) 2580 ice_set_agg_vsi(vsi); 2581 2582 return vsi; 2583 2584 err_vsi_cfg: 2585 ice_vsi_free(vsi); 2586 2587 return NULL; 2588 } 2589 2590 /** 2591 * ice_vsi_release_msix - Clear the queue to Interrupt mapping in HW 2592 * @vsi: the VSI being cleaned up 2593 */ 2594 static void ice_vsi_release_msix(struct ice_vsi *vsi) 2595 { 2596 struct ice_pf *pf = vsi->back; 2597 struct ice_hw *hw = &pf->hw; 2598 u32 txq = 0; 2599 u32 rxq = 0; 2600 int i, q; 2601 2602 ice_for_each_q_vector(vsi, i) { 2603 struct ice_q_vector *q_vector = vsi->q_vectors[i]; 2604 2605 ice_write_intrl(q_vector, 0); 2606 for (q = 0; q < q_vector->num_ring_tx; q++) { 2607 ice_write_itr(&q_vector->tx, 0); 2608 wr32(hw, QINT_TQCTL(vsi->txq_map[txq]), 0); 2609 if (vsi->xdp_rings) { 2610 u32 xdp_txq = txq + vsi->num_xdp_txq; 2611 2612 wr32(hw, QINT_TQCTL(vsi->txq_map[xdp_txq]), 0); 2613 } 2614 txq++; 2615 } 2616 2617 for (q = 0; q < q_vector->num_ring_rx; q++) { 2618 ice_write_itr(&q_vector->rx, 0); 2619 wr32(hw, QINT_RQCTL(vsi->rxq_map[rxq]), 0); 2620 rxq++; 2621 } 2622 } 2623 2624 ice_flush(hw); 2625 } 2626 2627 /** 2628 * ice_vsi_free_irq - Free the IRQ association with the OS 2629 * @vsi: the VSI being configured 2630 */ 2631 void ice_vsi_free_irq(struct ice_vsi *vsi) 2632 { 2633 struct ice_pf *pf = vsi->back; 2634 int i; 2635 2636 if (!vsi->q_vectors || !vsi->irqs_ready) 2637 return; 2638 2639 ice_vsi_release_msix(vsi); 2640 if (vsi->type == ICE_VSI_VF) 2641 return; 2642 2643 vsi->irqs_ready = false; 2644 2645 ice_for_each_q_vector(vsi, i) { 2646 int irq_num; 2647 2648 irq_num = vsi->q_vectors[i]->irq.virq; 2649 2650 /* free only the irqs that were actually requested */ 2651 if (!vsi->q_vectors[i] || 2652 !(vsi->q_vectors[i]->num_ring_tx || 2653 vsi->q_vectors[i]->num_ring_rx)) 2654 continue; 2655 2656 synchronize_irq(irq_num); 2657 devm_free_irq(ice_pf_to_dev(pf), irq_num, vsi->q_vectors[i]); 2658 } 2659 } 2660 2661 /** 2662 * ice_vsi_free_tx_rings - Free Tx resources for VSI queues 2663 * @vsi: the VSI having resources freed 2664 */ 2665 void ice_vsi_free_tx_rings(struct ice_vsi *vsi) 2666 { 2667 int i; 2668 2669 if (!vsi->tx_rings) 2670 return; 2671 2672 ice_for_each_txq(vsi, i) 2673 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) 2674 ice_free_tx_ring(vsi->tx_rings[i]); 2675 } 2676 2677 /** 2678 * ice_vsi_free_rx_rings - Free Rx resources for VSI queues 2679 * @vsi: the VSI having resources freed 2680 */ 2681 void ice_vsi_free_rx_rings(struct ice_vsi *vsi) 2682 { 2683 int i; 2684 2685 if (!vsi->rx_rings) 2686 return; 2687 2688 ice_for_each_rxq(vsi, i) 2689 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc) 2690 ice_free_rx_ring(vsi->rx_rings[i]); 2691 } 2692 2693 /** 2694 * ice_vsi_close - Shut down a VSI 2695 * @vsi: the VSI being shut down 2696 */ 2697 void ice_vsi_close(struct ice_vsi *vsi) 2698 { 2699 if (!test_and_set_bit(ICE_VSI_DOWN, vsi->state)) 2700 ice_down(vsi); 2701 2702 ice_vsi_clear_napi_queues(vsi); 2703 ice_vsi_free_irq(vsi); 2704 ice_vsi_free_tx_rings(vsi); 2705 ice_vsi_free_rx_rings(vsi); 2706 } 2707 2708 /** 2709 * ice_ena_vsi - resume a VSI 2710 * @vsi: the VSI being resume 2711 * @locked: is the rtnl_lock already held 2712 */ 2713 int ice_ena_vsi(struct ice_vsi *vsi, bool locked) 2714 { 2715 int err = 0; 2716 2717 if (!test_bit(ICE_VSI_NEEDS_RESTART, vsi->state)) 2718 return 0; 2719 2720 clear_bit(ICE_VSI_NEEDS_RESTART, vsi->state); 2721 2722 if (vsi->netdev && (vsi->type == ICE_VSI_PF || 2723 vsi->type == ICE_VSI_SF)) { 2724 if (netif_running(vsi->netdev)) { 2725 if (!locked) 2726 rtnl_lock(); 2727 2728 err = ice_open_internal(vsi->netdev); 2729 2730 if (!locked) 2731 rtnl_unlock(); 2732 } 2733 } else if (vsi->type == ICE_VSI_CTRL) { 2734 err = ice_vsi_open_ctrl(vsi); 2735 } 2736 2737 return err; 2738 } 2739 2740 /** 2741 * ice_dis_vsi - pause a VSI 2742 * @vsi: the VSI being paused 2743 * @locked: is the rtnl_lock already held 2744 */ 2745 void ice_dis_vsi(struct ice_vsi *vsi, bool locked) 2746 { 2747 bool already_down = test_bit(ICE_VSI_DOWN, vsi->state); 2748 2749 set_bit(ICE_VSI_NEEDS_RESTART, vsi->state); 2750 2751 if (vsi->netdev && (vsi->type == ICE_VSI_PF || 2752 vsi->type == ICE_VSI_SF)) { 2753 if (netif_running(vsi->netdev)) { 2754 if (!locked) 2755 rtnl_lock(); 2756 already_down = test_bit(ICE_VSI_DOWN, vsi->state); 2757 if (!already_down) 2758 ice_vsi_close(vsi); 2759 2760 if (!locked) 2761 rtnl_unlock(); 2762 } else if (!already_down) { 2763 ice_vsi_close(vsi); 2764 } 2765 } else if (vsi->type == ICE_VSI_CTRL && !already_down) { 2766 ice_vsi_close(vsi); 2767 } 2768 } 2769 2770 /** 2771 * ice_vsi_set_napi_queues - associate netdev queues with napi 2772 * @vsi: VSI pointer 2773 * 2774 * Associate queue[s] with napi for all vectors. 2775 */ 2776 void ice_vsi_set_napi_queues(struct ice_vsi *vsi) 2777 { 2778 struct net_device *netdev = vsi->netdev; 2779 int q_idx, v_idx; 2780 2781 if (!netdev) 2782 return; 2783 2784 ASSERT_RTNL(); 2785 ice_for_each_rxq(vsi, q_idx) 2786 netif_queue_set_napi(netdev, q_idx, NETDEV_QUEUE_TYPE_RX, 2787 &vsi->rx_rings[q_idx]->q_vector->napi); 2788 2789 ice_for_each_txq(vsi, q_idx) 2790 netif_queue_set_napi(netdev, q_idx, NETDEV_QUEUE_TYPE_TX, 2791 &vsi->tx_rings[q_idx]->q_vector->napi); 2792 /* Also set the interrupt number for the NAPI */ 2793 ice_for_each_q_vector(vsi, v_idx) { 2794 struct ice_q_vector *q_vector = vsi->q_vectors[v_idx]; 2795 2796 netif_napi_set_irq(&q_vector->napi, q_vector->irq.virq); 2797 } 2798 } 2799 2800 /** 2801 * ice_vsi_clear_napi_queues - dissociate netdev queues from napi 2802 * @vsi: VSI pointer 2803 * 2804 * Clear the association between all VSI queues queue[s] and napi. 2805 */ 2806 void ice_vsi_clear_napi_queues(struct ice_vsi *vsi) 2807 { 2808 struct net_device *netdev = vsi->netdev; 2809 int q_idx, v_idx; 2810 2811 if (!netdev) 2812 return; 2813 2814 ASSERT_RTNL(); 2815 /* Clear the NAPI's interrupt number */ 2816 ice_for_each_q_vector(vsi, v_idx) { 2817 struct ice_q_vector *q_vector = vsi->q_vectors[v_idx]; 2818 2819 netif_napi_set_irq(&q_vector->napi, -1); 2820 } 2821 2822 ice_for_each_txq(vsi, q_idx) 2823 netif_queue_set_napi(netdev, q_idx, NETDEV_QUEUE_TYPE_TX, NULL); 2824 2825 ice_for_each_rxq(vsi, q_idx) 2826 netif_queue_set_napi(netdev, q_idx, NETDEV_QUEUE_TYPE_RX, NULL); 2827 } 2828 2829 /** 2830 * ice_napi_add - register NAPI handler for the VSI 2831 * @vsi: VSI for which NAPI handler is to be registered 2832 * 2833 * This function is only called in the driver's load path. Registering the NAPI 2834 * handler is done in ice_vsi_alloc_q_vector() for all other cases (i.e. resume, 2835 * reset/rebuild, etc.) 2836 */ 2837 void ice_napi_add(struct ice_vsi *vsi) 2838 { 2839 int v_idx; 2840 2841 if (!vsi->netdev) 2842 return; 2843 2844 ice_for_each_q_vector(vsi, v_idx) 2845 netif_napi_add_config(vsi->netdev, 2846 &vsi->q_vectors[v_idx]->napi, 2847 ice_napi_poll, 2848 v_idx); 2849 } 2850 2851 /** 2852 * ice_vsi_release - Delete a VSI and free its resources 2853 * @vsi: the VSI being removed 2854 * 2855 * Returns 0 on success or < 0 on error 2856 */ 2857 int ice_vsi_release(struct ice_vsi *vsi) 2858 { 2859 struct ice_pf *pf; 2860 2861 if (!vsi->back) 2862 return -ENODEV; 2863 pf = vsi->back; 2864 2865 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) 2866 ice_rss_clean(vsi); 2867 2868 ice_vsi_close(vsi); 2869 2870 /* The Rx rule will only exist to remove if the LLDP FW 2871 * engine is currently stopped 2872 */ 2873 if (!ice_is_safe_mode(pf) && 2874 !test_bit(ICE_FLAG_FW_LLDP_AGENT, pf->flags) && 2875 (vsi->type == ICE_VSI_PF || (vsi->type == ICE_VSI_VF && 2876 ice_vf_is_lldp_ena(vsi->vf)))) 2877 ice_vsi_cfg_sw_lldp(vsi, false, false); 2878 2879 ice_vsi_decfg(vsi); 2880 2881 /* retain SW VSI data structure since it is needed to unregister and 2882 * free VSI netdev when PF is not in reset recovery pending state,\ 2883 * for ex: during rmmod. 2884 */ 2885 if (!ice_is_reset_in_progress(pf->state)) 2886 ice_vsi_delete(vsi); 2887 2888 return 0; 2889 } 2890 2891 /** 2892 * ice_vsi_rebuild_get_coalesce - get coalesce from all q_vectors 2893 * @vsi: VSI connected with q_vectors 2894 * @coalesce: array of struct with stored coalesce 2895 * 2896 * Returns array size. 2897 */ 2898 static int 2899 ice_vsi_rebuild_get_coalesce(struct ice_vsi *vsi, 2900 struct ice_coalesce_stored *coalesce) 2901 { 2902 int i; 2903 2904 ice_for_each_q_vector(vsi, i) { 2905 struct ice_q_vector *q_vector = vsi->q_vectors[i]; 2906 2907 coalesce[i].itr_tx = q_vector->tx.itr_settings; 2908 coalesce[i].itr_rx = q_vector->rx.itr_settings; 2909 coalesce[i].intrl = q_vector->intrl; 2910 2911 if (i < vsi->num_txq) 2912 coalesce[i].tx_valid = true; 2913 if (i < vsi->num_rxq) 2914 coalesce[i].rx_valid = true; 2915 } 2916 2917 return vsi->num_q_vectors; 2918 } 2919 2920 /** 2921 * ice_vsi_rebuild_set_coalesce - set coalesce from earlier saved arrays 2922 * @vsi: VSI connected with q_vectors 2923 * @coalesce: pointer to array of struct with stored coalesce 2924 * @size: size of coalesce array 2925 * 2926 * Before this function, ice_vsi_rebuild_get_coalesce should be called to save 2927 * ITR params in arrays. If size is 0 or coalesce wasn't stored set coalesce 2928 * to default value. 2929 */ 2930 static void 2931 ice_vsi_rebuild_set_coalesce(struct ice_vsi *vsi, 2932 struct ice_coalesce_stored *coalesce, int size) 2933 { 2934 struct ice_ring_container *rc; 2935 int i; 2936 2937 if ((size && !coalesce) || !vsi) 2938 return; 2939 2940 /* There are a couple of cases that have to be handled here: 2941 * 1. The case where the number of queue vectors stays the same, but 2942 * the number of Tx or Rx rings changes (the first for loop) 2943 * 2. The case where the number of queue vectors increased (the 2944 * second for loop) 2945 */ 2946 for (i = 0; i < size && i < vsi->num_q_vectors; i++) { 2947 /* There are 2 cases to handle here and they are the same for 2948 * both Tx and Rx: 2949 * if the entry was valid previously (coalesce[i].[tr]x_valid 2950 * and the loop variable is less than the number of rings 2951 * allocated, then write the previous values 2952 * 2953 * if the entry was not valid previously, but the number of 2954 * rings is less than are allocated (this means the number of 2955 * rings increased from previously), then write out the 2956 * values in the first element 2957 * 2958 * Also, always write the ITR, even if in ITR_IS_DYNAMIC 2959 * as there is no harm because the dynamic algorithm 2960 * will just overwrite. 2961 */ 2962 if (i < vsi->alloc_rxq && coalesce[i].rx_valid) { 2963 rc = &vsi->q_vectors[i]->rx; 2964 rc->itr_settings = coalesce[i].itr_rx; 2965 ice_write_itr(rc, rc->itr_setting); 2966 } else if (i < vsi->alloc_rxq) { 2967 rc = &vsi->q_vectors[i]->rx; 2968 rc->itr_settings = coalesce[0].itr_rx; 2969 ice_write_itr(rc, rc->itr_setting); 2970 } 2971 2972 if (i < vsi->alloc_txq && coalesce[i].tx_valid) { 2973 rc = &vsi->q_vectors[i]->tx; 2974 rc->itr_settings = coalesce[i].itr_tx; 2975 ice_write_itr(rc, rc->itr_setting); 2976 } else if (i < vsi->alloc_txq) { 2977 rc = &vsi->q_vectors[i]->tx; 2978 rc->itr_settings = coalesce[0].itr_tx; 2979 ice_write_itr(rc, rc->itr_setting); 2980 } 2981 2982 vsi->q_vectors[i]->intrl = coalesce[i].intrl; 2983 ice_set_q_vector_intrl(vsi->q_vectors[i]); 2984 } 2985 2986 /* the number of queue vectors increased so write whatever is in 2987 * the first element 2988 */ 2989 for (; i < vsi->num_q_vectors; i++) { 2990 /* transmit */ 2991 rc = &vsi->q_vectors[i]->tx; 2992 rc->itr_settings = coalesce[0].itr_tx; 2993 ice_write_itr(rc, rc->itr_setting); 2994 2995 /* receive */ 2996 rc = &vsi->q_vectors[i]->rx; 2997 rc->itr_settings = coalesce[0].itr_rx; 2998 ice_write_itr(rc, rc->itr_setting); 2999 3000 vsi->q_vectors[i]->intrl = coalesce[0].intrl; 3001 ice_set_q_vector_intrl(vsi->q_vectors[i]); 3002 } 3003 } 3004 3005 /** 3006 * ice_vsi_realloc_stat_arrays - Frees unused stat structures or alloc new ones 3007 * @vsi: VSI pointer 3008 */ 3009 static int 3010 ice_vsi_realloc_stat_arrays(struct ice_vsi *vsi) 3011 { 3012 u16 req_txq = vsi->req_txq ? vsi->req_txq : vsi->alloc_txq; 3013 u16 req_rxq = vsi->req_rxq ? vsi->req_rxq : vsi->alloc_rxq; 3014 struct ice_ring_stats **tx_ring_stats; 3015 struct ice_ring_stats **rx_ring_stats; 3016 struct ice_vsi_stats *vsi_stat; 3017 struct ice_pf *pf = vsi->back; 3018 u16 prev_txq = vsi->alloc_txq; 3019 u16 prev_rxq = vsi->alloc_rxq; 3020 int i; 3021 3022 vsi_stat = pf->vsi_stats[vsi->idx]; 3023 3024 if (req_txq < prev_txq) { 3025 for (i = req_txq; i < prev_txq; i++) { 3026 if (vsi_stat->tx_ring_stats[i]) { 3027 kfree_rcu(vsi_stat->tx_ring_stats[i], rcu); 3028 WRITE_ONCE(vsi_stat->tx_ring_stats[i], NULL); 3029 } 3030 } 3031 } 3032 3033 tx_ring_stats = vsi_stat->tx_ring_stats; 3034 vsi_stat->tx_ring_stats = 3035 krealloc_array(vsi_stat->tx_ring_stats, req_txq, 3036 sizeof(*vsi_stat->tx_ring_stats), 3037 GFP_KERNEL | __GFP_ZERO); 3038 if (!vsi_stat->tx_ring_stats) { 3039 vsi_stat->tx_ring_stats = tx_ring_stats; 3040 return -ENOMEM; 3041 } 3042 3043 if (req_rxq < prev_rxq) { 3044 for (i = req_rxq; i < prev_rxq; i++) { 3045 if (vsi_stat->rx_ring_stats[i]) { 3046 kfree_rcu(vsi_stat->rx_ring_stats[i], rcu); 3047 WRITE_ONCE(vsi_stat->rx_ring_stats[i], NULL); 3048 } 3049 } 3050 } 3051 3052 rx_ring_stats = vsi_stat->rx_ring_stats; 3053 vsi_stat->rx_ring_stats = 3054 krealloc_array(vsi_stat->rx_ring_stats, req_rxq, 3055 sizeof(*vsi_stat->rx_ring_stats), 3056 GFP_KERNEL | __GFP_ZERO); 3057 if (!vsi_stat->rx_ring_stats) { 3058 vsi_stat->rx_ring_stats = rx_ring_stats; 3059 return -ENOMEM; 3060 } 3061 3062 return 0; 3063 } 3064 3065 /** 3066 * ice_vsi_rebuild - Rebuild VSI after reset 3067 * @vsi: VSI to be rebuild 3068 * @vsi_flags: flags used for VSI rebuild flow 3069 * 3070 * Set vsi_flags to ICE_VSI_FLAG_INIT to initialize a new VSI, or 3071 * ICE_VSI_FLAG_NO_INIT to rebuild an existing VSI in hardware. 3072 * 3073 * Returns 0 on success and negative value on failure 3074 */ 3075 int ice_vsi_rebuild(struct ice_vsi *vsi, u32 vsi_flags) 3076 { 3077 struct ice_coalesce_stored *coalesce; 3078 int prev_num_q_vectors; 3079 struct ice_pf *pf; 3080 int ret; 3081 3082 if (!vsi) 3083 return -EINVAL; 3084 3085 vsi->flags = vsi_flags; 3086 pf = vsi->back; 3087 if (WARN_ON(vsi->type == ICE_VSI_VF && !vsi->vf)) 3088 return -EINVAL; 3089 3090 mutex_lock(&vsi->xdp_state_lock); 3091 3092 ret = ice_vsi_realloc_stat_arrays(vsi); 3093 if (ret) 3094 goto unlock; 3095 3096 ice_vsi_decfg(vsi); 3097 ret = ice_vsi_cfg_def(vsi); 3098 if (ret) 3099 goto unlock; 3100 3101 coalesce = kcalloc(vsi->num_q_vectors, 3102 sizeof(struct ice_coalesce_stored), GFP_KERNEL); 3103 if (!coalesce) { 3104 ret = -ENOMEM; 3105 goto decfg; 3106 } 3107 3108 prev_num_q_vectors = ice_vsi_rebuild_get_coalesce(vsi, coalesce); 3109 3110 ret = ice_vsi_cfg_tc_lan(pf, vsi); 3111 if (ret) { 3112 if (vsi_flags & ICE_VSI_FLAG_INIT) { 3113 ret = -EIO; 3114 goto free_coalesce; 3115 } 3116 3117 ret = ice_schedule_reset(pf, ICE_RESET_PFR); 3118 goto free_coalesce; 3119 } 3120 3121 ice_vsi_rebuild_set_coalesce(vsi, coalesce, prev_num_q_vectors); 3122 clear_bit(ICE_VSI_REBUILD_PENDING, vsi->state); 3123 3124 free_coalesce: 3125 kfree(coalesce); 3126 decfg: 3127 if (ret) 3128 ice_vsi_decfg(vsi); 3129 unlock: 3130 mutex_unlock(&vsi->xdp_state_lock); 3131 return ret; 3132 } 3133 3134 /** 3135 * ice_is_reset_in_progress - check for a reset in progress 3136 * @state: PF state field 3137 */ 3138 bool ice_is_reset_in_progress(unsigned long *state) 3139 { 3140 return test_bit(ICE_RESET_OICR_RECV, state) || 3141 test_bit(ICE_PFR_REQ, state) || 3142 test_bit(ICE_CORER_REQ, state) || 3143 test_bit(ICE_GLOBR_REQ, state); 3144 } 3145 3146 /** 3147 * ice_wait_for_reset - Wait for driver to finish reset and rebuild 3148 * @pf: pointer to the PF structure 3149 * @timeout: length of time to wait, in jiffies 3150 * 3151 * Wait (sleep) for a short time until the driver finishes cleaning up from 3152 * a device reset. The caller must be able to sleep. Use this to delay 3153 * operations that could fail while the driver is cleaning up after a device 3154 * reset. 3155 * 3156 * Returns 0 on success, -EBUSY if the reset is not finished within the 3157 * timeout, and -ERESTARTSYS if the thread was interrupted. 3158 */ 3159 int ice_wait_for_reset(struct ice_pf *pf, unsigned long timeout) 3160 { 3161 long ret; 3162 3163 ret = wait_event_interruptible_timeout(pf->reset_wait_queue, 3164 !ice_is_reset_in_progress(pf->state), 3165 timeout); 3166 if (ret < 0) 3167 return ret; 3168 else if (!ret) 3169 return -EBUSY; 3170 else 3171 return 0; 3172 } 3173 3174 /** 3175 * ice_vsi_update_q_map - update our copy of the VSI info with new queue map 3176 * @vsi: VSI being configured 3177 * @ctx: the context buffer returned from AQ VSI update command 3178 */ 3179 static void ice_vsi_update_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctx) 3180 { 3181 vsi->info.mapping_flags = ctx->info.mapping_flags; 3182 memcpy(&vsi->info.q_mapping, &ctx->info.q_mapping, 3183 sizeof(vsi->info.q_mapping)); 3184 memcpy(&vsi->info.tc_mapping, ctx->info.tc_mapping, 3185 sizeof(vsi->info.tc_mapping)); 3186 } 3187 3188 /** 3189 * ice_vsi_cfg_netdev_tc - Setup the netdev TC configuration 3190 * @vsi: the VSI being configured 3191 * @ena_tc: TC map to be enabled 3192 */ 3193 void ice_vsi_cfg_netdev_tc(struct ice_vsi *vsi, u8 ena_tc) 3194 { 3195 struct net_device *netdev = vsi->netdev; 3196 struct ice_pf *pf = vsi->back; 3197 int numtc = vsi->tc_cfg.numtc; 3198 struct ice_dcbx_cfg *dcbcfg; 3199 u8 netdev_tc; 3200 int i; 3201 3202 if (!netdev) 3203 return; 3204 3205 /* CHNL VSI doesn't have its own netdev, hence, no netdev_tc */ 3206 if (vsi->type == ICE_VSI_CHNL) 3207 return; 3208 3209 if (!ena_tc) { 3210 netdev_reset_tc(netdev); 3211 return; 3212 } 3213 3214 if (vsi->type == ICE_VSI_PF && ice_is_adq_active(pf)) 3215 numtc = vsi->all_numtc; 3216 3217 if (netdev_set_num_tc(netdev, numtc)) 3218 return; 3219 3220 dcbcfg = &pf->hw.port_info->qos_cfg.local_dcbx_cfg; 3221 3222 ice_for_each_traffic_class(i) 3223 if (vsi->tc_cfg.ena_tc & BIT(i)) 3224 netdev_set_tc_queue(netdev, 3225 vsi->tc_cfg.tc_info[i].netdev_tc, 3226 vsi->tc_cfg.tc_info[i].qcount_tx, 3227 vsi->tc_cfg.tc_info[i].qoffset); 3228 /* setup TC queue map for CHNL TCs */ 3229 ice_for_each_chnl_tc(i) { 3230 if (!(vsi->all_enatc & BIT(i))) 3231 break; 3232 if (!vsi->mqprio_qopt.qopt.count[i]) 3233 break; 3234 netdev_set_tc_queue(netdev, i, 3235 vsi->mqprio_qopt.qopt.count[i], 3236 vsi->mqprio_qopt.qopt.offset[i]); 3237 } 3238 3239 if (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) 3240 return; 3241 3242 for (i = 0; i < ICE_MAX_USER_PRIORITY; i++) { 3243 u8 ets_tc = dcbcfg->etscfg.prio_table[i]; 3244 3245 /* Get the mapped netdev TC# for the UP */ 3246 netdev_tc = vsi->tc_cfg.tc_info[ets_tc].netdev_tc; 3247 netdev_set_prio_tc_map(netdev, i, netdev_tc); 3248 } 3249 } 3250 3251 /** 3252 * ice_vsi_setup_q_map_mqprio - Prepares mqprio based tc_config 3253 * @vsi: the VSI being configured, 3254 * @ctxt: VSI context structure 3255 * @ena_tc: number of traffic classes to enable 3256 * 3257 * Prepares VSI tc_config to have queue configurations based on MQPRIO options. 3258 */ 3259 static int 3260 ice_vsi_setup_q_map_mqprio(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt, 3261 u8 ena_tc) 3262 { 3263 u16 pow, offset = 0, qcount_tx = 0, qcount_rx = 0, qmap; 3264 u16 tc0_offset = vsi->mqprio_qopt.qopt.offset[0]; 3265 int tc0_qcount = vsi->mqprio_qopt.qopt.count[0]; 3266 u16 new_txq, new_rxq; 3267 u8 netdev_tc = 0; 3268 int i; 3269 3270 vsi->tc_cfg.ena_tc = ena_tc ? ena_tc : 1; 3271 3272 pow = order_base_2(tc0_qcount); 3273 qmap = FIELD_PREP(ICE_AQ_VSI_TC_Q_OFFSET_M, tc0_offset); 3274 qmap |= FIELD_PREP(ICE_AQ_VSI_TC_Q_NUM_M, pow); 3275 3276 ice_for_each_traffic_class(i) { 3277 if (!(vsi->tc_cfg.ena_tc & BIT(i))) { 3278 /* TC is not enabled */ 3279 vsi->tc_cfg.tc_info[i].qoffset = 0; 3280 vsi->tc_cfg.tc_info[i].qcount_rx = 1; 3281 vsi->tc_cfg.tc_info[i].qcount_tx = 1; 3282 vsi->tc_cfg.tc_info[i].netdev_tc = 0; 3283 ctxt->info.tc_mapping[i] = 0; 3284 continue; 3285 } 3286 3287 offset = vsi->mqprio_qopt.qopt.offset[i]; 3288 qcount_rx = vsi->mqprio_qopt.qopt.count[i]; 3289 qcount_tx = vsi->mqprio_qopt.qopt.count[i]; 3290 vsi->tc_cfg.tc_info[i].qoffset = offset; 3291 vsi->tc_cfg.tc_info[i].qcount_rx = qcount_rx; 3292 vsi->tc_cfg.tc_info[i].qcount_tx = qcount_tx; 3293 vsi->tc_cfg.tc_info[i].netdev_tc = netdev_tc++; 3294 } 3295 3296 if (vsi->all_numtc && vsi->all_numtc != vsi->tc_cfg.numtc) { 3297 ice_for_each_chnl_tc(i) { 3298 if (!(vsi->all_enatc & BIT(i))) 3299 continue; 3300 offset = vsi->mqprio_qopt.qopt.offset[i]; 3301 qcount_rx = vsi->mqprio_qopt.qopt.count[i]; 3302 qcount_tx = vsi->mqprio_qopt.qopt.count[i]; 3303 } 3304 } 3305 3306 new_txq = offset + qcount_tx; 3307 if (new_txq > vsi->alloc_txq) { 3308 dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Tx queues (%u), than were allocated (%u)!\n", 3309 new_txq, vsi->alloc_txq); 3310 return -EINVAL; 3311 } 3312 3313 new_rxq = offset + qcount_rx; 3314 if (new_rxq > vsi->alloc_rxq) { 3315 dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Rx queues (%u), than were allocated (%u)!\n", 3316 new_rxq, vsi->alloc_rxq); 3317 return -EINVAL; 3318 } 3319 3320 /* Set actual Tx/Rx queue pairs */ 3321 vsi->num_txq = new_txq; 3322 vsi->num_rxq = new_rxq; 3323 3324 /* Setup queue TC[0].qmap for given VSI context */ 3325 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap); 3326 ctxt->info.q_mapping[0] = cpu_to_le16(vsi->rxq_map[0]); 3327 ctxt->info.q_mapping[1] = cpu_to_le16(tc0_qcount); 3328 3329 /* Find queue count available for channel VSIs and starting offset 3330 * for channel VSIs 3331 */ 3332 if (tc0_qcount && tc0_qcount < vsi->num_rxq) { 3333 vsi->cnt_q_avail = vsi->num_rxq - tc0_qcount; 3334 vsi->next_base_q = tc0_qcount; 3335 } 3336 dev_dbg(ice_pf_to_dev(vsi->back), "vsi->num_txq = %d\n", vsi->num_txq); 3337 dev_dbg(ice_pf_to_dev(vsi->back), "vsi->num_rxq = %d\n", vsi->num_rxq); 3338 dev_dbg(ice_pf_to_dev(vsi->back), "all_numtc %u, all_enatc: 0x%04x, tc_cfg.numtc %u\n", 3339 vsi->all_numtc, vsi->all_enatc, vsi->tc_cfg.numtc); 3340 3341 return 0; 3342 } 3343 3344 /** 3345 * ice_vsi_cfg_tc - Configure VSI Tx Sched for given TC map 3346 * @vsi: VSI to be configured 3347 * @ena_tc: TC bitmap 3348 * 3349 * VSI queues expected to be quiesced before calling this function 3350 */ 3351 int ice_vsi_cfg_tc(struct ice_vsi *vsi, u8 ena_tc) 3352 { 3353 u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 }; 3354 struct ice_pf *pf = vsi->back; 3355 struct ice_tc_cfg old_tc_cfg; 3356 struct ice_vsi_ctx *ctx; 3357 struct device *dev; 3358 int i, ret = 0; 3359 u8 num_tc = 0; 3360 3361 dev = ice_pf_to_dev(pf); 3362 if (vsi->tc_cfg.ena_tc == ena_tc && 3363 vsi->mqprio_qopt.mode != TC_MQPRIO_MODE_CHANNEL) 3364 return 0; 3365 3366 ice_for_each_traffic_class(i) { 3367 /* build bitmap of enabled TCs */ 3368 if (ena_tc & BIT(i)) 3369 num_tc++; 3370 /* populate max_txqs per TC */ 3371 max_txqs[i] = vsi->alloc_txq; 3372 /* Update max_txqs if it is CHNL VSI, because alloc_t[r]xq are 3373 * zero for CHNL VSI, hence use num_txq instead as max_txqs 3374 */ 3375 if (vsi->type == ICE_VSI_CHNL && 3376 test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) 3377 max_txqs[i] = vsi->num_txq; 3378 } 3379 3380 memcpy(&old_tc_cfg, &vsi->tc_cfg, sizeof(old_tc_cfg)); 3381 vsi->tc_cfg.ena_tc = ena_tc; 3382 vsi->tc_cfg.numtc = num_tc; 3383 3384 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); 3385 if (!ctx) 3386 return -ENOMEM; 3387 3388 ctx->vf_num = 0; 3389 ctx->info = vsi->info; 3390 3391 if (vsi->type == ICE_VSI_PF && 3392 test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) 3393 ret = ice_vsi_setup_q_map_mqprio(vsi, ctx, ena_tc); 3394 else 3395 ret = ice_vsi_setup_q_map(vsi, ctx); 3396 3397 if (ret) { 3398 memcpy(&vsi->tc_cfg, &old_tc_cfg, sizeof(vsi->tc_cfg)); 3399 goto out; 3400 } 3401 3402 /* must to indicate which section of VSI context are being modified */ 3403 ctx->info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_RXQ_MAP_VALID); 3404 ret = ice_update_vsi(&pf->hw, vsi->idx, ctx, NULL); 3405 if (ret) { 3406 dev_info(dev, "Failed VSI Update\n"); 3407 goto out; 3408 } 3409 3410 if (vsi->type == ICE_VSI_PF && 3411 test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) 3412 ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, 1, max_txqs); 3413 else 3414 ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, 3415 vsi->tc_cfg.ena_tc, max_txqs); 3416 3417 if (ret) { 3418 dev_err(dev, "VSI %d failed TC config, error %d\n", 3419 vsi->vsi_num, ret); 3420 goto out; 3421 } 3422 ice_vsi_update_q_map(vsi, ctx); 3423 vsi->info.valid_sections = 0; 3424 3425 ice_vsi_cfg_netdev_tc(vsi, ena_tc); 3426 out: 3427 kfree(ctx); 3428 return ret; 3429 } 3430 3431 /** 3432 * ice_update_ring_stats - Update ring statistics 3433 * @stats: stats to be updated 3434 * @pkts: number of processed packets 3435 * @bytes: number of processed bytes 3436 * 3437 * This function assumes that caller has acquired a u64_stats_sync lock. 3438 */ 3439 static void ice_update_ring_stats(struct ice_q_stats *stats, u64 pkts, u64 bytes) 3440 { 3441 stats->bytes += bytes; 3442 stats->pkts += pkts; 3443 } 3444 3445 /** 3446 * ice_update_tx_ring_stats - Update Tx ring specific counters 3447 * @tx_ring: ring to update 3448 * @pkts: number of processed packets 3449 * @bytes: number of processed bytes 3450 */ 3451 void ice_update_tx_ring_stats(struct ice_tx_ring *tx_ring, u64 pkts, u64 bytes) 3452 { 3453 u64_stats_update_begin(&tx_ring->ring_stats->syncp); 3454 ice_update_ring_stats(&tx_ring->ring_stats->stats, pkts, bytes); 3455 u64_stats_update_end(&tx_ring->ring_stats->syncp); 3456 } 3457 3458 /** 3459 * ice_update_rx_ring_stats - Update Rx ring specific counters 3460 * @rx_ring: ring to update 3461 * @pkts: number of processed packets 3462 * @bytes: number of processed bytes 3463 */ 3464 void ice_update_rx_ring_stats(struct ice_rx_ring *rx_ring, u64 pkts, u64 bytes) 3465 { 3466 u64_stats_update_begin(&rx_ring->ring_stats->syncp); 3467 ice_update_ring_stats(&rx_ring->ring_stats->stats, pkts, bytes); 3468 u64_stats_update_end(&rx_ring->ring_stats->syncp); 3469 } 3470 3471 /** 3472 * ice_is_dflt_vsi_in_use - check if the default forwarding VSI is being used 3473 * @pi: port info of the switch with default VSI 3474 * 3475 * Return true if the there is a single VSI in default forwarding VSI list 3476 */ 3477 bool ice_is_dflt_vsi_in_use(struct ice_port_info *pi) 3478 { 3479 bool exists = false; 3480 3481 ice_check_if_dflt_vsi(pi, 0, &exists); 3482 return exists; 3483 } 3484 3485 /** 3486 * ice_is_vsi_dflt_vsi - check if the VSI passed in is the default VSI 3487 * @vsi: VSI to compare against default forwarding VSI 3488 * 3489 * If this VSI passed in is the default forwarding VSI then return true, else 3490 * return false 3491 */ 3492 bool ice_is_vsi_dflt_vsi(struct ice_vsi *vsi) 3493 { 3494 return ice_check_if_dflt_vsi(vsi->port_info, vsi->idx, NULL); 3495 } 3496 3497 /** 3498 * ice_set_dflt_vsi - set the default forwarding VSI 3499 * @vsi: VSI getting set as the default forwarding VSI on the switch 3500 * 3501 * If the VSI passed in is already the default VSI and it's enabled just return 3502 * success. 3503 * 3504 * Otherwise try to set the VSI passed in as the switch's default VSI and 3505 * return the result. 3506 */ 3507 int ice_set_dflt_vsi(struct ice_vsi *vsi) 3508 { 3509 struct device *dev; 3510 int status; 3511 3512 if (!vsi) 3513 return -EINVAL; 3514 3515 dev = ice_pf_to_dev(vsi->back); 3516 3517 if (ice_lag_is_switchdev_running(vsi->back)) { 3518 dev_dbg(dev, "VSI %d passed is a part of LAG containing interfaces in switchdev mode, nothing to do\n", 3519 vsi->vsi_num); 3520 return 0; 3521 } 3522 3523 /* the VSI passed in is already the default VSI */ 3524 if (ice_is_vsi_dflt_vsi(vsi)) { 3525 dev_dbg(dev, "VSI %d passed in is already the default forwarding VSI, nothing to do\n", 3526 vsi->vsi_num); 3527 return 0; 3528 } 3529 3530 status = ice_cfg_dflt_vsi(vsi->port_info, vsi->idx, true, ICE_FLTR_RX); 3531 if (status) { 3532 dev_err(dev, "Failed to set VSI %d as the default forwarding VSI, error %d\n", 3533 vsi->vsi_num, status); 3534 return status; 3535 } 3536 3537 return 0; 3538 } 3539 3540 /** 3541 * ice_clear_dflt_vsi - clear the default forwarding VSI 3542 * @vsi: VSI to remove from filter list 3543 * 3544 * If the switch has no default VSI or it's not enabled then return error. 3545 * 3546 * Otherwise try to clear the default VSI and return the result. 3547 */ 3548 int ice_clear_dflt_vsi(struct ice_vsi *vsi) 3549 { 3550 struct device *dev; 3551 int status; 3552 3553 if (!vsi) 3554 return -EINVAL; 3555 3556 dev = ice_pf_to_dev(vsi->back); 3557 3558 /* there is no default VSI configured */ 3559 if (!ice_is_dflt_vsi_in_use(vsi->port_info)) 3560 return -ENODEV; 3561 3562 status = ice_cfg_dflt_vsi(vsi->port_info, vsi->idx, false, 3563 ICE_FLTR_RX); 3564 if (status) { 3565 dev_err(dev, "Failed to clear the default forwarding VSI %d, error %d\n", 3566 vsi->vsi_num, status); 3567 return -EIO; 3568 } 3569 3570 return 0; 3571 } 3572 3573 /** 3574 * ice_get_link_speed_mbps - get link speed in Mbps 3575 * @vsi: the VSI whose link speed is being queried 3576 * 3577 * Return current VSI link speed and 0 if the speed is unknown. 3578 */ 3579 int ice_get_link_speed_mbps(struct ice_vsi *vsi) 3580 { 3581 unsigned int link_speed; 3582 3583 link_speed = vsi->port_info->phy.link_info.link_speed; 3584 3585 return (int)ice_get_link_speed(fls(link_speed) - 1); 3586 } 3587 3588 /** 3589 * ice_get_link_speed_kbps - get link speed in Kbps 3590 * @vsi: the VSI whose link speed is being queried 3591 * 3592 * Return current VSI link speed and 0 if the speed is unknown. 3593 */ 3594 int ice_get_link_speed_kbps(struct ice_vsi *vsi) 3595 { 3596 int speed_mbps; 3597 3598 speed_mbps = ice_get_link_speed_mbps(vsi); 3599 3600 return speed_mbps * 1000; 3601 } 3602 3603 /** 3604 * ice_set_min_bw_limit - setup minimum BW limit for Tx based on min_tx_rate 3605 * @vsi: VSI to be configured 3606 * @min_tx_rate: min Tx rate in Kbps to be configured as BW limit 3607 * 3608 * If the min_tx_rate is specified as 0 that means to clear the minimum BW limit 3609 * profile, otherwise a non-zero value will force a minimum BW limit for the VSI 3610 * on TC 0. 3611 */ 3612 int ice_set_min_bw_limit(struct ice_vsi *vsi, u64 min_tx_rate) 3613 { 3614 struct ice_pf *pf = vsi->back; 3615 struct device *dev; 3616 int status; 3617 int speed; 3618 3619 dev = ice_pf_to_dev(pf); 3620 if (!vsi->port_info) { 3621 dev_dbg(dev, "VSI %d, type %u specified doesn't have valid port_info\n", 3622 vsi->idx, vsi->type); 3623 return -EINVAL; 3624 } 3625 3626 speed = ice_get_link_speed_kbps(vsi); 3627 if (min_tx_rate > (u64)speed) { 3628 dev_err(dev, "invalid min Tx rate %llu Kbps specified for %s %d is greater than current link speed %u Kbps\n", 3629 min_tx_rate, ice_vsi_type_str(vsi->type), vsi->idx, 3630 speed); 3631 return -EINVAL; 3632 } 3633 3634 /* Configure min BW for VSI limit */ 3635 if (min_tx_rate) { 3636 status = ice_cfg_vsi_bw_lmt_per_tc(vsi->port_info, vsi->idx, 0, 3637 ICE_MIN_BW, min_tx_rate); 3638 if (status) { 3639 dev_err(dev, "failed to set min Tx rate(%llu Kbps) for %s %d\n", 3640 min_tx_rate, ice_vsi_type_str(vsi->type), 3641 vsi->idx); 3642 return status; 3643 } 3644 3645 dev_dbg(dev, "set min Tx rate(%llu Kbps) for %s\n", 3646 min_tx_rate, ice_vsi_type_str(vsi->type)); 3647 } else { 3648 status = ice_cfg_vsi_bw_dflt_lmt_per_tc(vsi->port_info, 3649 vsi->idx, 0, 3650 ICE_MIN_BW); 3651 if (status) { 3652 dev_err(dev, "failed to clear min Tx rate configuration for %s %d\n", 3653 ice_vsi_type_str(vsi->type), vsi->idx); 3654 return status; 3655 } 3656 3657 dev_dbg(dev, "cleared min Tx rate configuration for %s %d\n", 3658 ice_vsi_type_str(vsi->type), vsi->idx); 3659 } 3660 3661 return 0; 3662 } 3663 3664 /** 3665 * ice_set_max_bw_limit - setup maximum BW limit for Tx based on max_tx_rate 3666 * @vsi: VSI to be configured 3667 * @max_tx_rate: max Tx rate in Kbps to be configured as BW limit 3668 * 3669 * If the max_tx_rate is specified as 0 that means to clear the maximum BW limit 3670 * profile, otherwise a non-zero value will force a maximum BW limit for the VSI 3671 * on TC 0. 3672 */ 3673 int ice_set_max_bw_limit(struct ice_vsi *vsi, u64 max_tx_rate) 3674 { 3675 struct ice_pf *pf = vsi->back; 3676 struct device *dev; 3677 int status; 3678 int speed; 3679 3680 dev = ice_pf_to_dev(pf); 3681 if (!vsi->port_info) { 3682 dev_dbg(dev, "VSI %d, type %u specified doesn't have valid port_info\n", 3683 vsi->idx, vsi->type); 3684 return -EINVAL; 3685 } 3686 3687 speed = ice_get_link_speed_kbps(vsi); 3688 if (max_tx_rate > (u64)speed) { 3689 dev_err(dev, "invalid max Tx rate %llu Kbps specified for %s %d is greater than current link speed %u Kbps\n", 3690 max_tx_rate, ice_vsi_type_str(vsi->type), vsi->idx, 3691 speed); 3692 return -EINVAL; 3693 } 3694 3695 /* Configure max BW for VSI limit */ 3696 if (max_tx_rate) { 3697 status = ice_cfg_vsi_bw_lmt_per_tc(vsi->port_info, vsi->idx, 0, 3698 ICE_MAX_BW, max_tx_rate); 3699 if (status) { 3700 dev_err(dev, "failed setting max Tx rate(%llu Kbps) for %s %d\n", 3701 max_tx_rate, ice_vsi_type_str(vsi->type), 3702 vsi->idx); 3703 return status; 3704 } 3705 3706 dev_dbg(dev, "set max Tx rate(%llu Kbps) for %s %d\n", 3707 max_tx_rate, ice_vsi_type_str(vsi->type), vsi->idx); 3708 } else { 3709 status = ice_cfg_vsi_bw_dflt_lmt_per_tc(vsi->port_info, 3710 vsi->idx, 0, 3711 ICE_MAX_BW); 3712 if (status) { 3713 dev_err(dev, "failed clearing max Tx rate configuration for %s %d\n", 3714 ice_vsi_type_str(vsi->type), vsi->idx); 3715 return status; 3716 } 3717 3718 dev_dbg(dev, "cleared max Tx rate configuration for %s %d\n", 3719 ice_vsi_type_str(vsi->type), vsi->idx); 3720 } 3721 3722 return 0; 3723 } 3724 3725 /** 3726 * ice_set_link - turn on/off physical link 3727 * @vsi: VSI to modify physical link on 3728 * @ena: turn on/off physical link 3729 */ 3730 int ice_set_link(struct ice_vsi *vsi, bool ena) 3731 { 3732 struct device *dev = ice_pf_to_dev(vsi->back); 3733 struct ice_port_info *pi = vsi->port_info; 3734 struct ice_hw *hw = pi->hw; 3735 int status; 3736 3737 if (vsi->type != ICE_VSI_PF) 3738 return -EINVAL; 3739 3740 status = ice_aq_set_link_restart_an(pi, ena, NULL); 3741 3742 /* if link is owned by manageability, FW will return LIBIE_AQ_RC_EMODE. 3743 * this is not a fatal error, so print a warning message and return 3744 * a success code. Return an error if FW returns an error code other 3745 * than LIBIE_AQ_RC_EMODE 3746 */ 3747 if (status == -EIO) { 3748 if (hw->adminq.sq_last_status == LIBIE_AQ_RC_EMODE) 3749 dev_dbg(dev, "can't set link to %s, err %d aq_err %s. not fatal, continuing\n", 3750 (ena ? "ON" : "OFF"), status, 3751 libie_aq_str(hw->adminq.sq_last_status)); 3752 } else if (status) { 3753 dev_err(dev, "can't set link to %s, err %d aq_err %s\n", 3754 (ena ? "ON" : "OFF"), status, 3755 libie_aq_str(hw->adminq.sq_last_status)); 3756 return status; 3757 } 3758 3759 return 0; 3760 } 3761 3762 /** 3763 * ice_vsi_add_vlan_zero - add VLAN 0 filter(s) for this VSI 3764 * @vsi: VSI used to add VLAN filters 3765 * 3766 * In Single VLAN Mode (SVM), single VLAN filters via ICE_SW_LKUP_VLAN are based 3767 * on the inner VLAN ID, so the VLAN TPID (i.e. 0x8100 or 0x888a8) doesn't 3768 * matter. In Double VLAN Mode (DVM), outer/single VLAN filters via 3769 * ICE_SW_LKUP_VLAN are based on the outer/single VLAN ID + VLAN TPID. 3770 * 3771 * For both modes add a VLAN 0 + no VLAN TPID filter to handle untagged traffic 3772 * when VLAN pruning is enabled. Also, this handles VLAN 0 priority tagged 3773 * traffic in SVM, since the VLAN TPID isn't part of filtering. 3774 * 3775 * If DVM is enabled then an explicit VLAN 0 + VLAN TPID filter needs to be 3776 * added to allow VLAN 0 priority tagged traffic in DVM, since the VLAN TPID is 3777 * part of filtering. 3778 */ 3779 int ice_vsi_add_vlan_zero(struct ice_vsi *vsi) 3780 { 3781 struct ice_vsi_vlan_ops *vlan_ops = ice_get_compat_vsi_vlan_ops(vsi); 3782 struct ice_vlan vlan; 3783 int err; 3784 3785 vlan = ICE_VLAN(0, 0, 0); 3786 err = vlan_ops->add_vlan(vsi, &vlan); 3787 if (err && err != -EEXIST) 3788 return err; 3789 3790 /* in SVM both VLAN 0 filters are identical */ 3791 if (!ice_is_dvm_ena(&vsi->back->hw)) 3792 return 0; 3793 3794 vlan = ICE_VLAN(ETH_P_8021Q, 0, 0); 3795 err = vlan_ops->add_vlan(vsi, &vlan); 3796 if (err && err != -EEXIST) 3797 return err; 3798 3799 return 0; 3800 } 3801 3802 /** 3803 * ice_vsi_del_vlan_zero - delete VLAN 0 filter(s) for this VSI 3804 * @vsi: VSI used to add VLAN filters 3805 * 3806 * Delete the VLAN 0 filters in the same manner that they were added in 3807 * ice_vsi_add_vlan_zero. 3808 */ 3809 int ice_vsi_del_vlan_zero(struct ice_vsi *vsi) 3810 { 3811 struct ice_vsi_vlan_ops *vlan_ops = ice_get_compat_vsi_vlan_ops(vsi); 3812 struct ice_vlan vlan; 3813 int err; 3814 3815 vlan = ICE_VLAN(0, 0, 0); 3816 err = vlan_ops->del_vlan(vsi, &vlan); 3817 if (err && err != -EEXIST) 3818 return err; 3819 3820 /* in SVM both VLAN 0 filters are identical */ 3821 if (!ice_is_dvm_ena(&vsi->back->hw)) 3822 return 0; 3823 3824 vlan = ICE_VLAN(ETH_P_8021Q, 0, 0); 3825 err = vlan_ops->del_vlan(vsi, &vlan); 3826 if (err && err != -EEXIST) 3827 return err; 3828 3829 /* when deleting the last VLAN filter, make sure to disable the VLAN 3830 * promisc mode so the filter isn't left by accident 3831 */ 3832 return ice_clear_vsi_promisc(&vsi->back->hw, vsi->idx, 3833 ICE_MCAST_VLAN_PROMISC_BITS, 0); 3834 } 3835 3836 /** 3837 * ice_vsi_num_zero_vlans - get number of VLAN 0 filters based on VLAN mode 3838 * @vsi: VSI used to get the VLAN mode 3839 * 3840 * If DVM is enabled then 2 VLAN 0 filters are added, else if SVM is enabled 3841 * then 1 VLAN 0 filter is added. See ice_vsi_add_vlan_zero for more details. 3842 */ 3843 static u16 ice_vsi_num_zero_vlans(struct ice_vsi *vsi) 3844 { 3845 #define ICE_DVM_NUM_ZERO_VLAN_FLTRS 2 3846 #define ICE_SVM_NUM_ZERO_VLAN_FLTRS 1 3847 /* no VLAN 0 filter is created when a port VLAN is active */ 3848 if (vsi->type == ICE_VSI_VF) { 3849 if (WARN_ON(!vsi->vf)) 3850 return 0; 3851 3852 if (ice_vf_is_port_vlan_ena(vsi->vf)) 3853 return 0; 3854 } 3855 3856 if (ice_is_dvm_ena(&vsi->back->hw)) 3857 return ICE_DVM_NUM_ZERO_VLAN_FLTRS; 3858 else 3859 return ICE_SVM_NUM_ZERO_VLAN_FLTRS; 3860 } 3861 3862 /** 3863 * ice_vsi_has_non_zero_vlans - check if VSI has any non-zero VLANs 3864 * @vsi: VSI used to determine if any non-zero VLANs have been added 3865 */ 3866 bool ice_vsi_has_non_zero_vlans(struct ice_vsi *vsi) 3867 { 3868 return (vsi->num_vlan > ice_vsi_num_zero_vlans(vsi)); 3869 } 3870 3871 /** 3872 * ice_vsi_num_non_zero_vlans - get the number of non-zero VLANs for this VSI 3873 * @vsi: VSI used to get the number of non-zero VLANs added 3874 */ 3875 u16 ice_vsi_num_non_zero_vlans(struct ice_vsi *vsi) 3876 { 3877 return (vsi->num_vlan - ice_vsi_num_zero_vlans(vsi)); 3878 } 3879 3880 /** 3881 * ice_is_feature_supported 3882 * @pf: pointer to the struct ice_pf instance 3883 * @f: feature enum to be checked 3884 * 3885 * returns true if feature is supported, false otherwise 3886 */ 3887 bool ice_is_feature_supported(struct ice_pf *pf, enum ice_feature f) 3888 { 3889 if (f < 0 || f >= ICE_F_MAX) 3890 return false; 3891 3892 return test_bit(f, pf->features); 3893 } 3894 3895 /** 3896 * ice_set_feature_support 3897 * @pf: pointer to the struct ice_pf instance 3898 * @f: feature enum to set 3899 */ 3900 void ice_set_feature_support(struct ice_pf *pf, enum ice_feature f) 3901 { 3902 if (f < 0 || f >= ICE_F_MAX) 3903 return; 3904 3905 set_bit(f, pf->features); 3906 } 3907 3908 /** 3909 * ice_clear_feature_support 3910 * @pf: pointer to the struct ice_pf instance 3911 * @f: feature enum to clear 3912 */ 3913 void ice_clear_feature_support(struct ice_pf *pf, enum ice_feature f) 3914 { 3915 if (f < 0 || f >= ICE_F_MAX) 3916 return; 3917 3918 clear_bit(f, pf->features); 3919 } 3920 3921 /** 3922 * ice_init_feature_support 3923 * @pf: pointer to the struct ice_pf instance 3924 * 3925 * called during init to setup supported feature 3926 */ 3927 void ice_init_feature_support(struct ice_pf *pf) 3928 { 3929 switch (pf->hw.device_id) { 3930 case ICE_DEV_ID_E810C_BACKPLANE: 3931 case ICE_DEV_ID_E810C_QSFP: 3932 case ICE_DEV_ID_E810C_SFP: 3933 case ICE_DEV_ID_E810_XXV_BACKPLANE: 3934 case ICE_DEV_ID_E810_XXV_QSFP: 3935 case ICE_DEV_ID_E810_XXV_SFP: 3936 ice_set_feature_support(pf, ICE_F_DSCP); 3937 if (ice_is_phy_rclk_in_netlist(&pf->hw)) 3938 ice_set_feature_support(pf, ICE_F_PHY_RCLK); 3939 /* If we don't own the timer - don't enable other caps */ 3940 if (!ice_pf_src_tmr_owned(pf)) 3941 break; 3942 if (ice_is_cgu_in_netlist(&pf->hw)) 3943 ice_set_feature_support(pf, ICE_F_CGU); 3944 if (ice_is_clock_mux_in_netlist(&pf->hw)) 3945 ice_set_feature_support(pf, ICE_F_SMA_CTRL); 3946 if (ice_gnss_is_module_present(&pf->hw)) 3947 ice_set_feature_support(pf, ICE_F_GNSS); 3948 break; 3949 default: 3950 break; 3951 } 3952 3953 if (pf->hw.mac_type == ICE_MAC_E830) { 3954 ice_set_feature_support(pf, ICE_F_MBX_LIMIT); 3955 ice_set_feature_support(pf, ICE_F_GCS); 3956 ice_set_feature_support(pf, ICE_F_TXTIME); 3957 } 3958 } 3959 3960 /** 3961 * ice_vsi_update_security - update security block in VSI 3962 * @vsi: pointer to VSI structure 3963 * @fill: function pointer to fill ctx 3964 */ 3965 int 3966 ice_vsi_update_security(struct ice_vsi *vsi, void (*fill)(struct ice_vsi_ctx *)) 3967 { 3968 struct ice_vsi_ctx ctx = { 0 }; 3969 3970 ctx.info = vsi->info; 3971 ctx.info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_SECURITY_VALID); 3972 fill(&ctx); 3973 3974 if (ice_update_vsi(&vsi->back->hw, vsi->idx, &ctx, NULL)) 3975 return -ENODEV; 3976 3977 vsi->info = ctx.info; 3978 return 0; 3979 } 3980 3981 /** 3982 * ice_vsi_ctx_set_antispoof - set antispoof function in VSI ctx 3983 * @ctx: pointer to VSI ctx structure 3984 */ 3985 void ice_vsi_ctx_set_antispoof(struct ice_vsi_ctx *ctx) 3986 { 3987 ctx->info.sec_flags |= ICE_AQ_VSI_SEC_FLAG_ENA_MAC_ANTI_SPOOF | 3988 (ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA << 3989 ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S); 3990 } 3991 3992 /** 3993 * ice_vsi_ctx_clear_antispoof - clear antispoof function in VSI ctx 3994 * @ctx: pointer to VSI ctx structure 3995 */ 3996 void ice_vsi_ctx_clear_antispoof(struct ice_vsi_ctx *ctx) 3997 { 3998 ctx->info.sec_flags &= ~ICE_AQ_VSI_SEC_FLAG_ENA_MAC_ANTI_SPOOF & 3999 ~(ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA << 4000 ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S); 4001 } 4002 4003 /** 4004 * ice_vsi_update_local_lb - update sw block in VSI with local loopback bit 4005 * @vsi: pointer to VSI structure 4006 * @set: set or unset the bit 4007 */ 4008 int 4009 ice_vsi_update_local_lb(struct ice_vsi *vsi, bool set) 4010 { 4011 struct ice_vsi_ctx ctx = { 4012 .info = vsi->info, 4013 }; 4014 4015 ctx.info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_SW_VALID); 4016 if (set) 4017 ctx.info.sw_flags |= ICE_AQ_VSI_SW_FLAG_LOCAL_LB; 4018 else 4019 ctx.info.sw_flags &= ~ICE_AQ_VSI_SW_FLAG_LOCAL_LB; 4020 4021 if (ice_update_vsi(&vsi->back->hw, vsi->idx, &ctx, NULL)) 4022 return -ENODEV; 4023 4024 vsi->info = ctx.info; 4025 return 0; 4026 } 4027 4028 /** 4029 * ice_vsi_update_l2tsel - update l2tsel field for all Rx rings on this VSI 4030 * @vsi: VSI used to update l2tsel on 4031 * @l2tsel: l2tsel setting requested 4032 * 4033 * Use the l2tsel setting to update all of the Rx queue context bits for l2tsel. 4034 * This will modify which descriptor field the first offloaded VLAN will be 4035 * stripped into. 4036 */ 4037 void ice_vsi_update_l2tsel(struct ice_vsi *vsi, enum ice_l2tsel l2tsel) 4038 { 4039 struct ice_hw *hw = &vsi->back->hw; 4040 u32 l2tsel_bit; 4041 int i; 4042 4043 if (l2tsel == ICE_L2TSEL_EXTRACT_FIRST_TAG_L2TAG2_2ND) 4044 l2tsel_bit = 0; 4045 else 4046 l2tsel_bit = BIT(ICE_L2TSEL_BIT_OFFSET); 4047 4048 for (i = 0; i < vsi->alloc_rxq; i++) { 4049 u16 pfq = vsi->rxq_map[i]; 4050 u32 qrx_context_offset; 4051 u32 regval; 4052 4053 qrx_context_offset = 4054 QRX_CONTEXT(ICE_L2TSEL_QRX_CONTEXT_REG_IDX, pfq); 4055 4056 regval = rd32(hw, qrx_context_offset); 4057 regval &= ~BIT(ICE_L2TSEL_BIT_OFFSET); 4058 regval |= l2tsel_bit; 4059 wr32(hw, qrx_context_offset, regval); 4060 } 4061 } 4062