1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright (c) 2018, Intel Corporation. */ 3 4 #include "ice.h" 5 #include "ice_base.h" 6 #include "ice_flow.h" 7 #include "ice_lib.h" 8 #include "ice_fltr.h" 9 #include "ice_dcb_lib.h" 10 #include "ice_type.h" 11 #include "ice_vsi_vlan_ops.h" 12 13 /** 14 * ice_vsi_type_str - maps VSI type enum to string equivalents 15 * @vsi_type: VSI type enum 16 */ 17 const char *ice_vsi_type_str(enum ice_vsi_type vsi_type) 18 { 19 switch (vsi_type) { 20 case ICE_VSI_PF: 21 return "ICE_VSI_PF"; 22 case ICE_VSI_VF: 23 return "ICE_VSI_VF"; 24 case ICE_VSI_SF: 25 return "ICE_VSI_SF"; 26 case ICE_VSI_CTRL: 27 return "ICE_VSI_CTRL"; 28 case ICE_VSI_CHNL: 29 return "ICE_VSI_CHNL"; 30 case ICE_VSI_LB: 31 return "ICE_VSI_LB"; 32 default: 33 return "unknown"; 34 } 35 } 36 37 /** 38 * ice_vsi_ctrl_all_rx_rings - Start or stop a VSI's Rx rings 39 * @vsi: the VSI being configured 40 * @ena: start or stop the Rx rings 41 * 42 * First enable/disable all of the Rx rings, flush any remaining writes, and 43 * then verify that they have all been enabled/disabled successfully. This will 44 * let all of the register writes complete when enabling/disabling the Rx rings 45 * before waiting for the change in hardware to complete. 46 */ 47 static int ice_vsi_ctrl_all_rx_rings(struct ice_vsi *vsi, bool ena) 48 { 49 int ret = 0; 50 u16 i; 51 52 ice_for_each_rxq(vsi, i) 53 ice_vsi_ctrl_one_rx_ring(vsi, ena, i, false); 54 55 ice_flush(&vsi->back->hw); 56 57 ice_for_each_rxq(vsi, i) { 58 ret = ice_vsi_wait_one_rx_ring(vsi, ena, i); 59 if (ret) 60 break; 61 } 62 63 return ret; 64 } 65 66 /** 67 * ice_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the VSI 68 * @vsi: VSI pointer 69 * 70 * On error: returns error code (negative) 71 * On success: returns 0 72 */ 73 static int ice_vsi_alloc_arrays(struct ice_vsi *vsi) 74 { 75 struct ice_pf *pf = vsi->back; 76 struct device *dev; 77 78 dev = ice_pf_to_dev(pf); 79 if (vsi->type == ICE_VSI_CHNL) 80 return 0; 81 82 /* allocate memory for both Tx and Rx ring pointers */ 83 vsi->tx_rings = devm_kcalloc(dev, vsi->alloc_txq, 84 sizeof(*vsi->tx_rings), GFP_KERNEL); 85 if (!vsi->tx_rings) 86 return -ENOMEM; 87 88 vsi->rx_rings = devm_kcalloc(dev, vsi->alloc_rxq, 89 sizeof(*vsi->rx_rings), GFP_KERNEL); 90 if (!vsi->rx_rings) 91 goto err_rings; 92 93 /* txq_map needs to have enough space to track both Tx (stack) rings 94 * and XDP rings; at this point vsi->num_xdp_txq might not be set, 95 * so use num_possible_cpus() as we want to always provide XDP ring 96 * per CPU, regardless of queue count settings from user that might 97 * have come from ethtool's set_channels() callback; 98 */ 99 vsi->txq_map = devm_kcalloc(dev, (vsi->alloc_txq + num_possible_cpus()), 100 sizeof(*vsi->txq_map), GFP_KERNEL); 101 102 if (!vsi->txq_map) 103 goto err_txq_map; 104 105 vsi->rxq_map = devm_kcalloc(dev, vsi->alloc_rxq, 106 sizeof(*vsi->rxq_map), GFP_KERNEL); 107 if (!vsi->rxq_map) 108 goto err_rxq_map; 109 110 /* There is no need to allocate q_vectors for a loopback VSI. */ 111 if (vsi->type == ICE_VSI_LB) 112 return 0; 113 114 /* allocate memory for q_vector pointers */ 115 vsi->q_vectors = devm_kcalloc(dev, vsi->num_q_vectors, 116 sizeof(*vsi->q_vectors), GFP_KERNEL); 117 if (!vsi->q_vectors) 118 goto err_vectors; 119 120 return 0; 121 122 err_vectors: 123 devm_kfree(dev, vsi->rxq_map); 124 err_rxq_map: 125 devm_kfree(dev, vsi->txq_map); 126 err_txq_map: 127 devm_kfree(dev, vsi->rx_rings); 128 err_rings: 129 devm_kfree(dev, vsi->tx_rings); 130 return -ENOMEM; 131 } 132 133 /** 134 * ice_vsi_set_num_desc - Set number of descriptors for queues on this VSI 135 * @vsi: the VSI being configured 136 */ 137 static void ice_vsi_set_num_desc(struct ice_vsi *vsi) 138 { 139 switch (vsi->type) { 140 case ICE_VSI_PF: 141 case ICE_VSI_SF: 142 case ICE_VSI_CTRL: 143 case ICE_VSI_LB: 144 /* a user could change the values of num_[tr]x_desc using 145 * ethtool -G so we should keep those values instead of 146 * overwriting them with the defaults. 147 */ 148 if (!vsi->num_rx_desc) 149 vsi->num_rx_desc = ICE_DFLT_NUM_RX_DESC; 150 if (!vsi->num_tx_desc) 151 vsi->num_tx_desc = ICE_DFLT_NUM_TX_DESC; 152 break; 153 default: 154 dev_dbg(ice_pf_to_dev(vsi->back), "Not setting number of Tx/Rx descriptors for VSI type %d\n", 155 vsi->type); 156 break; 157 } 158 } 159 160 static u16 ice_get_rxq_count(struct ice_pf *pf) 161 { 162 return min(ice_get_avail_rxq_count(pf), num_online_cpus()); 163 } 164 165 static u16 ice_get_txq_count(struct ice_pf *pf) 166 { 167 return min(ice_get_avail_txq_count(pf), num_online_cpus()); 168 } 169 170 /** 171 * ice_vsi_set_num_qs - Set number of queues, descriptors and vectors for a VSI 172 * @vsi: the VSI being configured 173 * 174 * Return 0 on success and a negative value on error 175 */ 176 static void ice_vsi_set_num_qs(struct ice_vsi *vsi) 177 { 178 enum ice_vsi_type vsi_type = vsi->type; 179 struct ice_pf *pf = vsi->back; 180 struct ice_vf *vf = vsi->vf; 181 182 if (WARN_ON(vsi_type == ICE_VSI_VF && !vf)) 183 return; 184 185 switch (vsi_type) { 186 case ICE_VSI_PF: 187 if (vsi->req_txq) { 188 vsi->alloc_txq = vsi->req_txq; 189 vsi->num_txq = vsi->req_txq; 190 } else { 191 vsi->alloc_txq = ice_get_txq_count(pf); 192 } 193 194 pf->num_lan_tx = vsi->alloc_txq; 195 196 /* only 1 Rx queue unless RSS is enabled */ 197 if (!test_bit(ICE_FLAG_RSS_ENA, pf->flags)) { 198 vsi->alloc_rxq = 1; 199 } else { 200 if (vsi->req_rxq) { 201 vsi->alloc_rxq = vsi->req_rxq; 202 vsi->num_rxq = vsi->req_rxq; 203 } else { 204 vsi->alloc_rxq = ice_get_rxq_count(pf); 205 } 206 } 207 208 pf->num_lan_rx = vsi->alloc_rxq; 209 210 vsi->num_q_vectors = max(vsi->alloc_rxq, vsi->alloc_txq); 211 break; 212 case ICE_VSI_SF: 213 vsi->alloc_txq = 1; 214 vsi->alloc_rxq = 1; 215 vsi->num_q_vectors = 1; 216 vsi->irq_dyn_alloc = true; 217 break; 218 case ICE_VSI_VF: 219 if (vf->num_req_qs) 220 vf->num_vf_qs = vf->num_req_qs; 221 vsi->alloc_txq = vf->num_vf_qs; 222 vsi->alloc_rxq = vf->num_vf_qs; 223 /* pf->vfs.num_msix_per includes (VF miscellaneous vector + 224 * data queue interrupts). Since vsi->num_q_vectors is number 225 * of queues vectors, subtract 1 (ICE_NONQ_VECS_VF) from the 226 * original vector count 227 */ 228 vsi->num_q_vectors = vf->num_msix - ICE_NONQ_VECS_VF; 229 break; 230 case ICE_VSI_CTRL: 231 vsi->alloc_txq = 1; 232 vsi->alloc_rxq = 1; 233 vsi->num_q_vectors = 1; 234 break; 235 case ICE_VSI_CHNL: 236 vsi->alloc_txq = 0; 237 vsi->alloc_rxq = 0; 238 break; 239 case ICE_VSI_LB: 240 vsi->alloc_txq = 1; 241 vsi->alloc_rxq = 1; 242 break; 243 default: 244 dev_warn(ice_pf_to_dev(pf), "Unknown VSI type %d\n", vsi_type); 245 break; 246 } 247 248 ice_vsi_set_num_desc(vsi); 249 } 250 251 /** 252 * ice_get_free_slot - get the next non-NULL location index in array 253 * @array: array to search 254 * @size: size of the array 255 * @curr: last known occupied index to be used as a search hint 256 * 257 * void * is being used to keep the functionality generic. This lets us use this 258 * function on any array of pointers. 259 */ 260 static int ice_get_free_slot(void *array, int size, int curr) 261 { 262 int **tmp_array = (int **)array; 263 int next; 264 265 if (curr < (size - 1) && !tmp_array[curr + 1]) { 266 next = curr + 1; 267 } else { 268 int i = 0; 269 270 while ((i < size) && (tmp_array[i])) 271 i++; 272 if (i == size) 273 next = ICE_NO_VSI; 274 else 275 next = i; 276 } 277 return next; 278 } 279 280 /** 281 * ice_vsi_delete_from_hw - delete a VSI from the switch 282 * @vsi: pointer to VSI being removed 283 */ 284 static void ice_vsi_delete_from_hw(struct ice_vsi *vsi) 285 { 286 struct ice_pf *pf = vsi->back; 287 struct ice_vsi_ctx *ctxt; 288 int status; 289 290 ice_fltr_remove_all(vsi); 291 ctxt = kzalloc(sizeof(*ctxt), GFP_KERNEL); 292 if (!ctxt) 293 return; 294 295 if (vsi->type == ICE_VSI_VF) 296 ctxt->vf_num = vsi->vf->vf_id; 297 ctxt->vsi_num = vsi->vsi_num; 298 299 memcpy(&ctxt->info, &vsi->info, sizeof(ctxt->info)); 300 301 status = ice_free_vsi(&pf->hw, vsi->idx, ctxt, false, NULL); 302 if (status) 303 dev_err(ice_pf_to_dev(pf), "Failed to delete VSI %i in FW - error: %d\n", 304 vsi->vsi_num, status); 305 306 kfree(ctxt); 307 } 308 309 /** 310 * ice_vsi_free_arrays - De-allocate queue and vector pointer arrays for the VSI 311 * @vsi: pointer to VSI being cleared 312 */ 313 static void ice_vsi_free_arrays(struct ice_vsi *vsi) 314 { 315 struct ice_pf *pf = vsi->back; 316 struct device *dev; 317 318 dev = ice_pf_to_dev(pf); 319 320 /* free the ring and vector containers */ 321 devm_kfree(dev, vsi->q_vectors); 322 vsi->q_vectors = NULL; 323 devm_kfree(dev, vsi->tx_rings); 324 vsi->tx_rings = NULL; 325 devm_kfree(dev, vsi->rx_rings); 326 vsi->rx_rings = NULL; 327 devm_kfree(dev, vsi->txq_map); 328 vsi->txq_map = NULL; 329 devm_kfree(dev, vsi->rxq_map); 330 vsi->rxq_map = NULL; 331 } 332 333 /** 334 * ice_vsi_free_stats - Free the ring statistics structures 335 * @vsi: VSI pointer 336 */ 337 static void ice_vsi_free_stats(struct ice_vsi *vsi) 338 { 339 struct ice_vsi_stats *vsi_stat; 340 struct ice_pf *pf = vsi->back; 341 int i; 342 343 if (vsi->type == ICE_VSI_CHNL) 344 return; 345 if (!pf->vsi_stats) 346 return; 347 348 vsi_stat = pf->vsi_stats[vsi->idx]; 349 if (!vsi_stat) 350 return; 351 352 ice_for_each_alloc_txq(vsi, i) { 353 if (vsi_stat->tx_ring_stats[i]) { 354 kfree_rcu(vsi_stat->tx_ring_stats[i], rcu); 355 WRITE_ONCE(vsi_stat->tx_ring_stats[i], NULL); 356 } 357 } 358 359 ice_for_each_alloc_rxq(vsi, i) { 360 if (vsi_stat->rx_ring_stats[i]) { 361 kfree_rcu(vsi_stat->rx_ring_stats[i], rcu); 362 WRITE_ONCE(vsi_stat->rx_ring_stats[i], NULL); 363 } 364 } 365 366 kfree(vsi_stat->tx_ring_stats); 367 kfree(vsi_stat->rx_ring_stats); 368 kfree(vsi_stat); 369 pf->vsi_stats[vsi->idx] = NULL; 370 } 371 372 /** 373 * ice_vsi_alloc_ring_stats - Allocates Tx and Rx ring stats for the VSI 374 * @vsi: VSI which is having stats allocated 375 */ 376 static int ice_vsi_alloc_ring_stats(struct ice_vsi *vsi) 377 { 378 struct ice_ring_stats **tx_ring_stats; 379 struct ice_ring_stats **rx_ring_stats; 380 struct ice_vsi_stats *vsi_stats; 381 struct ice_pf *pf = vsi->back; 382 u16 i; 383 384 vsi_stats = pf->vsi_stats[vsi->idx]; 385 tx_ring_stats = vsi_stats->tx_ring_stats; 386 rx_ring_stats = vsi_stats->rx_ring_stats; 387 388 /* Allocate Tx ring stats */ 389 ice_for_each_alloc_txq(vsi, i) { 390 struct ice_ring_stats *ring_stats; 391 struct ice_tx_ring *ring; 392 393 ring = vsi->tx_rings[i]; 394 ring_stats = tx_ring_stats[i]; 395 396 if (!ring_stats) { 397 ring_stats = kzalloc(sizeof(*ring_stats), GFP_KERNEL); 398 if (!ring_stats) 399 goto err_out; 400 401 WRITE_ONCE(tx_ring_stats[i], ring_stats); 402 } 403 404 ring->ring_stats = ring_stats; 405 } 406 407 /* Allocate Rx ring stats */ 408 ice_for_each_alloc_rxq(vsi, i) { 409 struct ice_ring_stats *ring_stats; 410 struct ice_rx_ring *ring; 411 412 ring = vsi->rx_rings[i]; 413 ring_stats = rx_ring_stats[i]; 414 415 if (!ring_stats) { 416 ring_stats = kzalloc(sizeof(*ring_stats), GFP_KERNEL); 417 if (!ring_stats) 418 goto err_out; 419 420 WRITE_ONCE(rx_ring_stats[i], ring_stats); 421 } 422 423 ring->ring_stats = ring_stats; 424 } 425 426 return 0; 427 428 err_out: 429 ice_vsi_free_stats(vsi); 430 return -ENOMEM; 431 } 432 433 /** 434 * ice_vsi_free - clean up and deallocate the provided VSI 435 * @vsi: pointer to VSI being cleared 436 * 437 * This deallocates the VSI's queue resources, removes it from the PF's 438 * VSI array if necessary, and deallocates the VSI 439 */ 440 void ice_vsi_free(struct ice_vsi *vsi) 441 { 442 struct ice_pf *pf = NULL; 443 struct device *dev; 444 445 if (!vsi || !vsi->back) 446 return; 447 448 pf = vsi->back; 449 dev = ice_pf_to_dev(pf); 450 451 if (!pf->vsi[vsi->idx] || pf->vsi[vsi->idx] != vsi) { 452 dev_dbg(dev, "vsi does not exist at pf->vsi[%d]\n", vsi->idx); 453 return; 454 } 455 456 mutex_lock(&pf->sw_mutex); 457 /* updates the PF for this cleared VSI */ 458 459 pf->vsi[vsi->idx] = NULL; 460 pf->next_vsi = vsi->idx; 461 462 ice_vsi_free_stats(vsi); 463 ice_vsi_free_arrays(vsi); 464 mutex_destroy(&vsi->xdp_state_lock); 465 mutex_unlock(&pf->sw_mutex); 466 devm_kfree(dev, vsi); 467 } 468 469 void ice_vsi_delete(struct ice_vsi *vsi) 470 { 471 ice_vsi_delete_from_hw(vsi); 472 ice_vsi_free(vsi); 473 } 474 475 /** 476 * ice_msix_clean_ctrl_vsi - MSIX mode interrupt handler for ctrl VSI 477 * @irq: interrupt number 478 * @data: pointer to a q_vector 479 */ 480 static irqreturn_t ice_msix_clean_ctrl_vsi(int __always_unused irq, void *data) 481 { 482 struct ice_q_vector *q_vector = (struct ice_q_vector *)data; 483 484 if (!q_vector->tx.tx_ring) 485 return IRQ_HANDLED; 486 487 #define FDIR_RX_DESC_CLEAN_BUDGET 64 488 ice_clean_rx_irq(q_vector->rx.rx_ring, FDIR_RX_DESC_CLEAN_BUDGET); 489 ice_clean_ctrl_tx_irq(q_vector->tx.tx_ring); 490 491 return IRQ_HANDLED; 492 } 493 494 /** 495 * ice_msix_clean_rings - MSIX mode Interrupt Handler 496 * @irq: interrupt number 497 * @data: pointer to a q_vector 498 */ 499 static irqreturn_t ice_msix_clean_rings(int __always_unused irq, void *data) 500 { 501 struct ice_q_vector *q_vector = (struct ice_q_vector *)data; 502 503 if (!q_vector->tx.tx_ring && !q_vector->rx.rx_ring) 504 return IRQ_HANDLED; 505 506 q_vector->total_events++; 507 508 napi_schedule(&q_vector->napi); 509 510 return IRQ_HANDLED; 511 } 512 513 /** 514 * ice_vsi_alloc_stat_arrays - Allocate statistics arrays 515 * @vsi: VSI pointer 516 */ 517 static int ice_vsi_alloc_stat_arrays(struct ice_vsi *vsi) 518 { 519 struct ice_vsi_stats *vsi_stat; 520 struct ice_pf *pf = vsi->back; 521 522 if (vsi->type == ICE_VSI_CHNL) 523 return 0; 524 if (!pf->vsi_stats) 525 return -ENOENT; 526 527 if (pf->vsi_stats[vsi->idx]) 528 /* realloc will happen in rebuild path */ 529 return 0; 530 531 vsi_stat = kzalloc(sizeof(*vsi_stat), GFP_KERNEL); 532 if (!vsi_stat) 533 return -ENOMEM; 534 535 vsi_stat->tx_ring_stats = 536 kcalloc(vsi->alloc_txq, sizeof(*vsi_stat->tx_ring_stats), 537 GFP_KERNEL); 538 if (!vsi_stat->tx_ring_stats) 539 goto err_alloc_tx; 540 541 vsi_stat->rx_ring_stats = 542 kcalloc(vsi->alloc_rxq, sizeof(*vsi_stat->rx_ring_stats), 543 GFP_KERNEL); 544 if (!vsi_stat->rx_ring_stats) 545 goto err_alloc_rx; 546 547 pf->vsi_stats[vsi->idx] = vsi_stat; 548 549 return 0; 550 551 err_alloc_rx: 552 kfree(vsi_stat->rx_ring_stats); 553 err_alloc_tx: 554 kfree(vsi_stat->tx_ring_stats); 555 kfree(vsi_stat); 556 pf->vsi_stats[vsi->idx] = NULL; 557 return -ENOMEM; 558 } 559 560 /** 561 * ice_vsi_alloc_def - set default values for already allocated VSI 562 * @vsi: ptr to VSI 563 * @ch: ptr to channel 564 */ 565 static int 566 ice_vsi_alloc_def(struct ice_vsi *vsi, struct ice_channel *ch) 567 { 568 if (vsi->type != ICE_VSI_CHNL) { 569 ice_vsi_set_num_qs(vsi); 570 if (ice_vsi_alloc_arrays(vsi)) 571 return -ENOMEM; 572 } 573 574 vsi->irq_dyn_alloc = pci_msix_can_alloc_dyn(vsi->back->pdev); 575 576 switch (vsi->type) { 577 case ICE_VSI_PF: 578 case ICE_VSI_SF: 579 /* Setup default MSIX irq handler for VSI */ 580 vsi->irq_handler = ice_msix_clean_rings; 581 break; 582 case ICE_VSI_CTRL: 583 /* Setup ctrl VSI MSIX irq handler */ 584 vsi->irq_handler = ice_msix_clean_ctrl_vsi; 585 break; 586 case ICE_VSI_CHNL: 587 if (!ch) 588 return -EINVAL; 589 590 vsi->num_rxq = ch->num_rxq; 591 vsi->num_txq = ch->num_txq; 592 vsi->next_base_q = ch->base_q; 593 break; 594 case ICE_VSI_VF: 595 case ICE_VSI_LB: 596 break; 597 default: 598 ice_vsi_free_arrays(vsi); 599 return -EINVAL; 600 } 601 602 return 0; 603 } 604 605 /** 606 * ice_vsi_alloc - Allocates the next available struct VSI in the PF 607 * @pf: board private structure 608 * 609 * Reserves a VSI index from the PF and allocates an empty VSI structure 610 * without a type. The VSI structure must later be initialized by calling 611 * ice_vsi_cfg(). 612 * 613 * returns a pointer to a VSI on success, NULL on failure. 614 */ 615 struct ice_vsi *ice_vsi_alloc(struct ice_pf *pf) 616 { 617 struct device *dev = ice_pf_to_dev(pf); 618 struct ice_vsi *vsi = NULL; 619 620 /* Need to protect the allocation of the VSIs at the PF level */ 621 mutex_lock(&pf->sw_mutex); 622 623 /* If we have already allocated our maximum number of VSIs, 624 * pf->next_vsi will be ICE_NO_VSI. If not, pf->next_vsi index 625 * is available to be populated 626 */ 627 if (pf->next_vsi == ICE_NO_VSI) { 628 dev_dbg(dev, "out of VSI slots!\n"); 629 goto unlock_pf; 630 } 631 632 vsi = devm_kzalloc(dev, sizeof(*vsi), GFP_KERNEL); 633 if (!vsi) 634 goto unlock_pf; 635 636 vsi->back = pf; 637 set_bit(ICE_VSI_DOWN, vsi->state); 638 639 /* fill slot and make note of the index */ 640 vsi->idx = pf->next_vsi; 641 pf->vsi[pf->next_vsi] = vsi; 642 643 /* prepare pf->next_vsi for next use */ 644 pf->next_vsi = ice_get_free_slot(pf->vsi, pf->num_alloc_vsi, 645 pf->next_vsi); 646 647 mutex_init(&vsi->xdp_state_lock); 648 649 unlock_pf: 650 mutex_unlock(&pf->sw_mutex); 651 return vsi; 652 } 653 654 /** 655 * ice_alloc_fd_res - Allocate FD resource for a VSI 656 * @vsi: pointer to the ice_vsi 657 * 658 * This allocates the FD resources 659 * 660 * Returns 0 on success, -EPERM on no-op or -EIO on failure 661 */ 662 static int ice_alloc_fd_res(struct ice_vsi *vsi) 663 { 664 struct ice_pf *pf = vsi->back; 665 u32 g_val, b_val; 666 667 /* Flow Director filters are only allocated/assigned to the PF VSI or 668 * CHNL VSI which passes the traffic. The CTRL VSI is only used to 669 * add/delete filters so resources are not allocated to it 670 */ 671 if (!test_bit(ICE_FLAG_FD_ENA, pf->flags)) 672 return -EPERM; 673 674 if (!(vsi->type == ICE_VSI_PF || vsi->type == ICE_VSI_VF || 675 vsi->type == ICE_VSI_CHNL)) 676 return -EPERM; 677 678 /* FD filters from guaranteed pool per VSI */ 679 g_val = pf->hw.func_caps.fd_fltr_guar; 680 if (!g_val) 681 return -EPERM; 682 683 /* FD filters from best effort pool */ 684 b_val = pf->hw.func_caps.fd_fltr_best_effort; 685 if (!b_val) 686 return -EPERM; 687 688 /* PF main VSI gets only 64 FD resources from guaranteed pool 689 * when ADQ is configured. 690 */ 691 #define ICE_PF_VSI_GFLTR 64 692 693 /* determine FD filter resources per VSI from shared(best effort) and 694 * dedicated pool 695 */ 696 if (vsi->type == ICE_VSI_PF) { 697 vsi->num_gfltr = g_val; 698 /* if MQPRIO is configured, main VSI doesn't get all FD 699 * resources from guaranteed pool. PF VSI gets 64 FD resources 700 */ 701 if (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) { 702 if (g_val < ICE_PF_VSI_GFLTR) 703 return -EPERM; 704 /* allow bare minimum entries for PF VSI */ 705 vsi->num_gfltr = ICE_PF_VSI_GFLTR; 706 } 707 708 /* each VSI gets same "best_effort" quota */ 709 vsi->num_bfltr = b_val; 710 } else if (vsi->type == ICE_VSI_VF) { 711 vsi->num_gfltr = 0; 712 713 /* each VSI gets same "best_effort" quota */ 714 vsi->num_bfltr = b_val; 715 } else { 716 struct ice_vsi *main_vsi; 717 int numtc; 718 719 main_vsi = ice_get_main_vsi(pf); 720 if (!main_vsi) 721 return -EPERM; 722 723 if (!main_vsi->all_numtc) 724 return -EINVAL; 725 726 /* figure out ADQ numtc */ 727 numtc = main_vsi->all_numtc - ICE_CHNL_START_TC; 728 729 /* only one TC but still asking resources for channels, 730 * invalid config 731 */ 732 if (numtc < ICE_CHNL_START_TC) 733 return -EPERM; 734 735 g_val -= ICE_PF_VSI_GFLTR; 736 /* channel VSIs gets equal share from guaranteed pool */ 737 vsi->num_gfltr = g_val / numtc; 738 739 /* each VSI gets same "best_effort" quota */ 740 vsi->num_bfltr = b_val; 741 } 742 743 return 0; 744 } 745 746 /** 747 * ice_vsi_get_qs - Assign queues from PF to VSI 748 * @vsi: the VSI to assign queues to 749 * 750 * Returns 0 on success and a negative value on error 751 */ 752 static int ice_vsi_get_qs(struct ice_vsi *vsi) 753 { 754 struct ice_pf *pf = vsi->back; 755 struct ice_qs_cfg tx_qs_cfg = { 756 .qs_mutex = &pf->avail_q_mutex, 757 .pf_map = pf->avail_txqs, 758 .pf_map_size = pf->max_pf_txqs, 759 .q_count = vsi->alloc_txq, 760 .scatter_count = ICE_MAX_SCATTER_TXQS, 761 .vsi_map = vsi->txq_map, 762 .vsi_map_offset = 0, 763 .mapping_mode = ICE_VSI_MAP_CONTIG 764 }; 765 struct ice_qs_cfg rx_qs_cfg = { 766 .qs_mutex = &pf->avail_q_mutex, 767 .pf_map = pf->avail_rxqs, 768 .pf_map_size = pf->max_pf_rxqs, 769 .q_count = vsi->alloc_rxq, 770 .scatter_count = ICE_MAX_SCATTER_RXQS, 771 .vsi_map = vsi->rxq_map, 772 .vsi_map_offset = 0, 773 .mapping_mode = ICE_VSI_MAP_CONTIG 774 }; 775 int ret; 776 777 if (vsi->type == ICE_VSI_CHNL) 778 return 0; 779 780 ret = __ice_vsi_get_qs(&tx_qs_cfg); 781 if (ret) 782 return ret; 783 vsi->tx_mapping_mode = tx_qs_cfg.mapping_mode; 784 785 ret = __ice_vsi_get_qs(&rx_qs_cfg); 786 if (ret) 787 return ret; 788 vsi->rx_mapping_mode = rx_qs_cfg.mapping_mode; 789 790 return 0; 791 } 792 793 /** 794 * ice_vsi_put_qs - Release queues from VSI to PF 795 * @vsi: the VSI that is going to release queues 796 */ 797 static void ice_vsi_put_qs(struct ice_vsi *vsi) 798 { 799 struct ice_pf *pf = vsi->back; 800 int i; 801 802 mutex_lock(&pf->avail_q_mutex); 803 804 ice_for_each_alloc_txq(vsi, i) { 805 clear_bit(vsi->txq_map[i], pf->avail_txqs); 806 vsi->txq_map[i] = ICE_INVAL_Q_INDEX; 807 } 808 809 ice_for_each_alloc_rxq(vsi, i) { 810 clear_bit(vsi->rxq_map[i], pf->avail_rxqs); 811 vsi->rxq_map[i] = ICE_INVAL_Q_INDEX; 812 } 813 814 mutex_unlock(&pf->avail_q_mutex); 815 } 816 817 /** 818 * ice_is_safe_mode 819 * @pf: pointer to the PF struct 820 * 821 * returns true if driver is in safe mode, false otherwise 822 */ 823 bool ice_is_safe_mode(struct ice_pf *pf) 824 { 825 return !test_bit(ICE_FLAG_ADV_FEATURES, pf->flags); 826 } 827 828 /** 829 * ice_is_rdma_ena 830 * @pf: pointer to the PF struct 831 * 832 * returns true if RDMA is currently supported, false otherwise 833 */ 834 bool ice_is_rdma_ena(struct ice_pf *pf) 835 { 836 union devlink_param_value value; 837 int err; 838 839 err = devl_param_driverinit_value_get(priv_to_devlink(pf), 840 DEVLINK_PARAM_GENERIC_ID_ENABLE_RDMA, 841 &value); 842 return err ? test_bit(ICE_FLAG_RDMA_ENA, pf->flags) : value.vbool; 843 } 844 845 /** 846 * ice_vsi_clean_rss_flow_fld - Delete RSS configuration 847 * @vsi: the VSI being cleaned up 848 * 849 * This function deletes RSS input set for all flows that were configured 850 * for this VSI 851 */ 852 static void ice_vsi_clean_rss_flow_fld(struct ice_vsi *vsi) 853 { 854 struct ice_pf *pf = vsi->back; 855 int status; 856 857 if (ice_is_safe_mode(pf)) 858 return; 859 860 status = ice_rem_vsi_rss_cfg(&pf->hw, vsi->idx); 861 if (status) 862 dev_dbg(ice_pf_to_dev(pf), "ice_rem_vsi_rss_cfg failed for vsi = %d, error = %d\n", 863 vsi->vsi_num, status); 864 } 865 866 /** 867 * ice_rss_clean - Delete RSS related VSI structures and configuration 868 * @vsi: the VSI being removed 869 */ 870 static void ice_rss_clean(struct ice_vsi *vsi) 871 { 872 struct ice_pf *pf = vsi->back; 873 struct device *dev; 874 875 dev = ice_pf_to_dev(pf); 876 877 devm_kfree(dev, vsi->rss_hkey_user); 878 devm_kfree(dev, vsi->rss_lut_user); 879 880 ice_vsi_clean_rss_flow_fld(vsi); 881 /* remove RSS replay list */ 882 if (!ice_is_safe_mode(pf)) 883 ice_rem_vsi_rss_list(&pf->hw, vsi->idx); 884 } 885 886 /** 887 * ice_vsi_set_rss_params - Setup RSS capabilities per VSI type 888 * @vsi: the VSI being configured 889 */ 890 static void ice_vsi_set_rss_params(struct ice_vsi *vsi) 891 { 892 struct ice_hw_common_caps *cap; 893 struct ice_pf *pf = vsi->back; 894 u16 max_rss_size; 895 896 if (!test_bit(ICE_FLAG_RSS_ENA, pf->flags)) { 897 vsi->rss_size = 1; 898 return; 899 } 900 901 cap = &pf->hw.func_caps.common_cap; 902 max_rss_size = BIT(cap->rss_table_entry_width); 903 switch (vsi->type) { 904 case ICE_VSI_CHNL: 905 case ICE_VSI_PF: 906 /* PF VSI will inherit RSS instance of PF */ 907 vsi->rss_table_size = (u16)cap->rss_table_size; 908 if (vsi->type == ICE_VSI_CHNL) 909 vsi->rss_size = min_t(u16, vsi->num_rxq, max_rss_size); 910 else 911 vsi->rss_size = min_t(u16, num_online_cpus(), 912 max_rss_size); 913 vsi->rss_lut_type = ICE_LUT_PF; 914 break; 915 case ICE_VSI_SF: 916 vsi->rss_table_size = ICE_LUT_VSI_SIZE; 917 vsi->rss_size = min_t(u16, num_online_cpus(), max_rss_size); 918 vsi->rss_lut_type = ICE_LUT_VSI; 919 break; 920 case ICE_VSI_VF: 921 /* VF VSI will get a small RSS table. 922 * For VSI_LUT, LUT size should be set to 64 bytes. 923 */ 924 vsi->rss_table_size = ICE_LUT_VSI_SIZE; 925 vsi->rss_size = ICE_MAX_RSS_QS_PER_VF; 926 vsi->rss_lut_type = ICE_LUT_VSI; 927 break; 928 case ICE_VSI_LB: 929 break; 930 default: 931 dev_dbg(ice_pf_to_dev(pf), "Unsupported VSI type %s\n", 932 ice_vsi_type_str(vsi->type)); 933 break; 934 } 935 } 936 937 /** 938 * ice_set_dflt_vsi_ctx - Set default VSI context before adding a VSI 939 * @hw: HW structure used to determine the VLAN mode of the device 940 * @ctxt: the VSI context being set 941 * 942 * This initializes a default VSI context for all sections except the Queues. 943 */ 944 static void ice_set_dflt_vsi_ctx(struct ice_hw *hw, struct ice_vsi_ctx *ctxt) 945 { 946 u32 table = 0; 947 948 memset(&ctxt->info, 0, sizeof(ctxt->info)); 949 /* VSI's should be allocated from shared pool */ 950 ctxt->alloc_from_pool = true; 951 /* Src pruning enabled by default */ 952 ctxt->info.sw_flags = ICE_AQ_VSI_SW_FLAG_SRC_PRUNE; 953 /* Traffic from VSI can be sent to LAN */ 954 ctxt->info.sw_flags2 = ICE_AQ_VSI_SW_FLAG_LAN_ENA; 955 /* allow all untagged/tagged packets by default on Tx */ 956 ctxt->info.inner_vlan_flags = FIELD_PREP(ICE_AQ_VSI_INNER_VLAN_TX_MODE_M, 957 ICE_AQ_VSI_INNER_VLAN_TX_MODE_ALL); 958 /* SVM - by default bits 3 and 4 in inner_vlan_flags are 0's which 959 * results in legacy behavior (show VLAN, DEI, and UP) in descriptor. 960 * 961 * DVM - leave inner VLAN in packet by default 962 */ 963 if (ice_is_dvm_ena(hw)) { 964 ctxt->info.inner_vlan_flags |= 965 FIELD_PREP(ICE_AQ_VSI_INNER_VLAN_EMODE_M, 966 ICE_AQ_VSI_INNER_VLAN_EMODE_NOTHING); 967 ctxt->info.outer_vlan_flags = 968 FIELD_PREP(ICE_AQ_VSI_OUTER_VLAN_TX_MODE_M, 969 ICE_AQ_VSI_OUTER_VLAN_TX_MODE_ALL); 970 ctxt->info.outer_vlan_flags |= 971 FIELD_PREP(ICE_AQ_VSI_OUTER_TAG_TYPE_M, 972 ICE_AQ_VSI_OUTER_TAG_VLAN_8100); 973 ctxt->info.outer_vlan_flags |= 974 FIELD_PREP(ICE_AQ_VSI_OUTER_VLAN_EMODE_M, 975 ICE_AQ_VSI_OUTER_VLAN_EMODE_NOTHING); 976 } 977 /* Have 1:1 UP mapping for both ingress/egress tables */ 978 table |= ICE_UP_TABLE_TRANSLATE(0, 0); 979 table |= ICE_UP_TABLE_TRANSLATE(1, 1); 980 table |= ICE_UP_TABLE_TRANSLATE(2, 2); 981 table |= ICE_UP_TABLE_TRANSLATE(3, 3); 982 table |= ICE_UP_TABLE_TRANSLATE(4, 4); 983 table |= ICE_UP_TABLE_TRANSLATE(5, 5); 984 table |= ICE_UP_TABLE_TRANSLATE(6, 6); 985 table |= ICE_UP_TABLE_TRANSLATE(7, 7); 986 ctxt->info.ingress_table = cpu_to_le32(table); 987 ctxt->info.egress_table = cpu_to_le32(table); 988 /* Have 1:1 UP mapping for outer to inner UP table */ 989 ctxt->info.outer_up_table = cpu_to_le32(table); 990 /* No Outer tag support outer_tag_flags remains to zero */ 991 } 992 993 /** 994 * ice_vsi_setup_q_map - Setup a VSI queue map 995 * @vsi: the VSI being configured 996 * @ctxt: VSI context structure 997 */ 998 static int ice_vsi_setup_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt) 999 { 1000 u16 offset = 0, qmap = 0, tx_count = 0, rx_count = 0, pow = 0; 1001 u16 num_txq_per_tc, num_rxq_per_tc; 1002 u16 qcount_tx = vsi->alloc_txq; 1003 u16 qcount_rx = vsi->alloc_rxq; 1004 u8 netdev_tc = 0; 1005 int i; 1006 1007 if (!vsi->tc_cfg.numtc) { 1008 /* at least TC0 should be enabled by default */ 1009 vsi->tc_cfg.numtc = 1; 1010 vsi->tc_cfg.ena_tc = 1; 1011 } 1012 1013 num_rxq_per_tc = min_t(u16, qcount_rx / vsi->tc_cfg.numtc, ICE_MAX_RXQS_PER_TC); 1014 if (!num_rxq_per_tc) 1015 num_rxq_per_tc = 1; 1016 num_txq_per_tc = qcount_tx / vsi->tc_cfg.numtc; 1017 if (!num_txq_per_tc) 1018 num_txq_per_tc = 1; 1019 1020 /* find the (rounded up) power-of-2 of qcount */ 1021 pow = (u16)order_base_2(num_rxq_per_tc); 1022 1023 /* TC mapping is a function of the number of Rx queues assigned to the 1024 * VSI for each traffic class and the offset of these queues. 1025 * The first 10 bits are for queue offset for TC0, next 4 bits for no:of 1026 * queues allocated to TC0. No:of queues is a power-of-2. 1027 * 1028 * If TC is not enabled, the queue offset is set to 0, and allocate one 1029 * queue, this way, traffic for the given TC will be sent to the default 1030 * queue. 1031 * 1032 * Setup number and offset of Rx queues for all TCs for the VSI 1033 */ 1034 ice_for_each_traffic_class(i) { 1035 if (!(vsi->tc_cfg.ena_tc & BIT(i))) { 1036 /* TC is not enabled */ 1037 vsi->tc_cfg.tc_info[i].qoffset = 0; 1038 vsi->tc_cfg.tc_info[i].qcount_rx = 1; 1039 vsi->tc_cfg.tc_info[i].qcount_tx = 1; 1040 vsi->tc_cfg.tc_info[i].netdev_tc = 0; 1041 ctxt->info.tc_mapping[i] = 0; 1042 continue; 1043 } 1044 1045 /* TC is enabled */ 1046 vsi->tc_cfg.tc_info[i].qoffset = offset; 1047 vsi->tc_cfg.tc_info[i].qcount_rx = num_rxq_per_tc; 1048 vsi->tc_cfg.tc_info[i].qcount_tx = num_txq_per_tc; 1049 vsi->tc_cfg.tc_info[i].netdev_tc = netdev_tc++; 1050 1051 qmap = FIELD_PREP(ICE_AQ_VSI_TC_Q_OFFSET_M, offset); 1052 qmap |= FIELD_PREP(ICE_AQ_VSI_TC_Q_NUM_M, pow); 1053 offset += num_rxq_per_tc; 1054 tx_count += num_txq_per_tc; 1055 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap); 1056 } 1057 1058 /* if offset is non-zero, means it is calculated correctly based on 1059 * enabled TCs for a given VSI otherwise qcount_rx will always 1060 * be correct and non-zero because it is based off - VSI's 1061 * allocated Rx queues which is at least 1 (hence qcount_tx will be 1062 * at least 1) 1063 */ 1064 if (offset) 1065 rx_count = offset; 1066 else 1067 rx_count = num_rxq_per_tc; 1068 1069 if (rx_count > vsi->alloc_rxq) { 1070 dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Rx queues (%u), than were allocated (%u)!\n", 1071 rx_count, vsi->alloc_rxq); 1072 return -EINVAL; 1073 } 1074 1075 if (tx_count > vsi->alloc_txq) { 1076 dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Tx queues (%u), than were allocated (%u)!\n", 1077 tx_count, vsi->alloc_txq); 1078 return -EINVAL; 1079 } 1080 1081 vsi->num_txq = tx_count; 1082 vsi->num_rxq = rx_count; 1083 1084 if (vsi->type == ICE_VSI_VF && vsi->num_txq != vsi->num_rxq) { 1085 dev_dbg(ice_pf_to_dev(vsi->back), "VF VSI should have same number of Tx and Rx queues. Hence making them equal\n"); 1086 /* since there is a chance that num_rxq could have been changed 1087 * in the above for loop, make num_txq equal to num_rxq. 1088 */ 1089 vsi->num_txq = vsi->num_rxq; 1090 } 1091 1092 /* Rx queue mapping */ 1093 ctxt->info.mapping_flags |= cpu_to_le16(ICE_AQ_VSI_Q_MAP_CONTIG); 1094 /* q_mapping buffer holds the info for the first queue allocated for 1095 * this VSI in the PF space and also the number of queues associated 1096 * with this VSI. 1097 */ 1098 ctxt->info.q_mapping[0] = cpu_to_le16(vsi->rxq_map[0]); 1099 ctxt->info.q_mapping[1] = cpu_to_le16(vsi->num_rxq); 1100 1101 return 0; 1102 } 1103 1104 /** 1105 * ice_set_fd_vsi_ctx - Set FD VSI context before adding a VSI 1106 * @ctxt: the VSI context being set 1107 * @vsi: the VSI being configured 1108 */ 1109 static void ice_set_fd_vsi_ctx(struct ice_vsi_ctx *ctxt, struct ice_vsi *vsi) 1110 { 1111 u8 dflt_q_group, dflt_q_prio; 1112 u16 dflt_q, report_q, val; 1113 1114 if (vsi->type != ICE_VSI_PF && vsi->type != ICE_VSI_CTRL && 1115 vsi->type != ICE_VSI_VF && vsi->type != ICE_VSI_CHNL) 1116 return; 1117 1118 val = ICE_AQ_VSI_PROP_FLOW_DIR_VALID; 1119 ctxt->info.valid_sections |= cpu_to_le16(val); 1120 dflt_q = 0; 1121 dflt_q_group = 0; 1122 report_q = 0; 1123 dflt_q_prio = 0; 1124 1125 /* enable flow director filtering/programming */ 1126 val = ICE_AQ_VSI_FD_ENABLE | ICE_AQ_VSI_FD_PROG_ENABLE; 1127 ctxt->info.fd_options = cpu_to_le16(val); 1128 /* max of allocated flow director filters */ 1129 ctxt->info.max_fd_fltr_dedicated = 1130 cpu_to_le16(vsi->num_gfltr); 1131 /* max of shared flow director filters any VSI may program */ 1132 ctxt->info.max_fd_fltr_shared = 1133 cpu_to_le16(vsi->num_bfltr); 1134 /* default queue index within the VSI of the default FD */ 1135 val = FIELD_PREP(ICE_AQ_VSI_FD_DEF_Q_M, dflt_q); 1136 /* target queue or queue group to the FD filter */ 1137 val |= FIELD_PREP(ICE_AQ_VSI_FD_DEF_GRP_M, dflt_q_group); 1138 ctxt->info.fd_def_q = cpu_to_le16(val); 1139 /* queue index on which FD filter completion is reported */ 1140 val = FIELD_PREP(ICE_AQ_VSI_FD_REPORT_Q_M, report_q); 1141 /* priority of the default qindex action */ 1142 val |= FIELD_PREP(ICE_AQ_VSI_FD_DEF_PRIORITY_M, dflt_q_prio); 1143 ctxt->info.fd_report_opt = cpu_to_le16(val); 1144 } 1145 1146 /** 1147 * ice_set_rss_vsi_ctx - Set RSS VSI context before adding a VSI 1148 * @ctxt: the VSI context being set 1149 * @vsi: the VSI being configured 1150 */ 1151 static void ice_set_rss_vsi_ctx(struct ice_vsi_ctx *ctxt, struct ice_vsi *vsi) 1152 { 1153 u8 lut_type, hash_type; 1154 struct device *dev; 1155 struct ice_pf *pf; 1156 1157 pf = vsi->back; 1158 dev = ice_pf_to_dev(pf); 1159 1160 switch (vsi->type) { 1161 case ICE_VSI_CHNL: 1162 case ICE_VSI_PF: 1163 /* PF VSI will inherit RSS instance of PF */ 1164 lut_type = ICE_AQ_VSI_Q_OPT_RSS_LUT_PF; 1165 break; 1166 case ICE_VSI_VF: 1167 case ICE_VSI_SF: 1168 /* VF VSI will gets a small RSS table which is a VSI LUT type */ 1169 lut_type = ICE_AQ_VSI_Q_OPT_RSS_LUT_VSI; 1170 break; 1171 default: 1172 dev_dbg(dev, "Unsupported VSI type %s\n", 1173 ice_vsi_type_str(vsi->type)); 1174 return; 1175 } 1176 1177 hash_type = ICE_AQ_VSI_Q_OPT_RSS_HASH_TPLZ; 1178 vsi->rss_hfunc = hash_type; 1179 1180 ctxt->info.q_opt_rss = 1181 FIELD_PREP(ICE_AQ_VSI_Q_OPT_RSS_LUT_M, lut_type) | 1182 FIELD_PREP(ICE_AQ_VSI_Q_OPT_RSS_HASH_M, hash_type); 1183 } 1184 1185 static void 1186 ice_chnl_vsi_setup_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt) 1187 { 1188 u16 qcount, qmap; 1189 u8 offset = 0; 1190 int pow; 1191 1192 qcount = vsi->num_rxq; 1193 1194 pow = order_base_2(qcount); 1195 qmap = FIELD_PREP(ICE_AQ_VSI_TC_Q_OFFSET_M, offset); 1196 qmap |= FIELD_PREP(ICE_AQ_VSI_TC_Q_NUM_M, pow); 1197 1198 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap); 1199 ctxt->info.mapping_flags |= cpu_to_le16(ICE_AQ_VSI_Q_MAP_CONTIG); 1200 ctxt->info.q_mapping[0] = cpu_to_le16(vsi->next_base_q); 1201 ctxt->info.q_mapping[1] = cpu_to_le16(qcount); 1202 } 1203 1204 /** 1205 * ice_vsi_is_vlan_pruning_ena - check if VLAN pruning is enabled or not 1206 * @vsi: VSI to check whether or not VLAN pruning is enabled. 1207 * 1208 * returns true if Rx VLAN pruning is enabled and false otherwise. 1209 */ 1210 static bool ice_vsi_is_vlan_pruning_ena(struct ice_vsi *vsi) 1211 { 1212 return vsi->info.sw_flags2 & ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA; 1213 } 1214 1215 /** 1216 * ice_vsi_init - Create and initialize a VSI 1217 * @vsi: the VSI being configured 1218 * @vsi_flags: VSI configuration flags 1219 * 1220 * Set ICE_FLAG_VSI_INIT to initialize a new VSI context, clear it to 1221 * reconfigure an existing context. 1222 * 1223 * This initializes a VSI context depending on the VSI type to be added and 1224 * passes it down to the add_vsi aq command to create a new VSI. 1225 */ 1226 static int ice_vsi_init(struct ice_vsi *vsi, u32 vsi_flags) 1227 { 1228 struct ice_pf *pf = vsi->back; 1229 struct ice_hw *hw = &pf->hw; 1230 struct ice_vsi_ctx *ctxt; 1231 struct device *dev; 1232 int ret = 0; 1233 1234 dev = ice_pf_to_dev(pf); 1235 ctxt = kzalloc(sizeof(*ctxt), GFP_KERNEL); 1236 if (!ctxt) 1237 return -ENOMEM; 1238 1239 switch (vsi->type) { 1240 case ICE_VSI_CTRL: 1241 case ICE_VSI_LB: 1242 case ICE_VSI_PF: 1243 ctxt->flags = ICE_AQ_VSI_TYPE_PF; 1244 break; 1245 case ICE_VSI_SF: 1246 case ICE_VSI_CHNL: 1247 ctxt->flags = ICE_AQ_VSI_TYPE_VMDQ2; 1248 break; 1249 case ICE_VSI_VF: 1250 ctxt->flags = ICE_AQ_VSI_TYPE_VF; 1251 /* VF number here is the absolute VF number (0-255) */ 1252 ctxt->vf_num = vsi->vf->vf_id + hw->func_caps.vf_base_id; 1253 break; 1254 default: 1255 ret = -ENODEV; 1256 goto out; 1257 } 1258 1259 /* Handle VLAN pruning for channel VSI if main VSI has VLAN 1260 * prune enabled 1261 */ 1262 if (vsi->type == ICE_VSI_CHNL) { 1263 struct ice_vsi *main_vsi; 1264 1265 main_vsi = ice_get_main_vsi(pf); 1266 if (main_vsi && ice_vsi_is_vlan_pruning_ena(main_vsi)) 1267 ctxt->info.sw_flags2 |= 1268 ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA; 1269 else 1270 ctxt->info.sw_flags2 &= 1271 ~ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA; 1272 } 1273 1274 ice_set_dflt_vsi_ctx(hw, ctxt); 1275 if (test_bit(ICE_FLAG_FD_ENA, pf->flags)) 1276 ice_set_fd_vsi_ctx(ctxt, vsi); 1277 /* if the switch is in VEB mode, allow VSI loopback */ 1278 if (vsi->vsw->bridge_mode == BRIDGE_MODE_VEB) 1279 ctxt->info.sw_flags |= ICE_AQ_VSI_SW_FLAG_ALLOW_LB; 1280 1281 /* Set LUT type and HASH type if RSS is enabled */ 1282 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags) && 1283 vsi->type != ICE_VSI_CTRL) { 1284 ice_set_rss_vsi_ctx(ctxt, vsi); 1285 /* if updating VSI context, make sure to set valid_section: 1286 * to indicate which section of VSI context being updated 1287 */ 1288 if (!(vsi_flags & ICE_VSI_FLAG_INIT)) 1289 ctxt->info.valid_sections |= 1290 cpu_to_le16(ICE_AQ_VSI_PROP_Q_OPT_VALID); 1291 } 1292 1293 ctxt->info.sw_id = vsi->port_info->sw_id; 1294 if (vsi->type == ICE_VSI_CHNL) { 1295 ice_chnl_vsi_setup_q_map(vsi, ctxt); 1296 } else { 1297 ret = ice_vsi_setup_q_map(vsi, ctxt); 1298 if (ret) 1299 goto out; 1300 1301 if (!(vsi_flags & ICE_VSI_FLAG_INIT)) 1302 /* means VSI being updated */ 1303 /* must to indicate which section of VSI context are 1304 * being modified 1305 */ 1306 ctxt->info.valid_sections |= 1307 cpu_to_le16(ICE_AQ_VSI_PROP_RXQ_MAP_VALID); 1308 } 1309 1310 /* Allow control frames out of main VSI */ 1311 if (vsi->type == ICE_VSI_PF) { 1312 ctxt->info.sec_flags |= ICE_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD; 1313 ctxt->info.valid_sections |= 1314 cpu_to_le16(ICE_AQ_VSI_PROP_SECURITY_VALID); 1315 } 1316 1317 if (vsi_flags & ICE_VSI_FLAG_INIT) { 1318 ret = ice_add_vsi(hw, vsi->idx, ctxt, NULL); 1319 if (ret) { 1320 dev_err(dev, "Add VSI failed, err %d\n", ret); 1321 ret = -EIO; 1322 goto out; 1323 } 1324 } else { 1325 ret = ice_update_vsi(hw, vsi->idx, ctxt, NULL); 1326 if (ret) { 1327 dev_err(dev, "Update VSI failed, err %d\n", ret); 1328 ret = -EIO; 1329 goto out; 1330 } 1331 } 1332 1333 /* keep context for update VSI operations */ 1334 vsi->info = ctxt->info; 1335 1336 /* record VSI number returned */ 1337 vsi->vsi_num = ctxt->vsi_num; 1338 1339 out: 1340 kfree(ctxt); 1341 return ret; 1342 } 1343 1344 /** 1345 * ice_vsi_clear_rings - Deallocates the Tx and Rx rings for VSI 1346 * @vsi: the VSI having rings deallocated 1347 */ 1348 static void ice_vsi_clear_rings(struct ice_vsi *vsi) 1349 { 1350 int i; 1351 1352 /* Avoid stale references by clearing map from vector to ring */ 1353 if (vsi->q_vectors) { 1354 ice_for_each_q_vector(vsi, i) { 1355 struct ice_q_vector *q_vector = vsi->q_vectors[i]; 1356 1357 if (q_vector) { 1358 q_vector->tx.tx_ring = NULL; 1359 q_vector->rx.rx_ring = NULL; 1360 } 1361 } 1362 } 1363 1364 if (vsi->tx_rings) { 1365 ice_for_each_alloc_txq(vsi, i) { 1366 if (vsi->tx_rings[i]) { 1367 kfree_rcu(vsi->tx_rings[i], rcu); 1368 WRITE_ONCE(vsi->tx_rings[i], NULL); 1369 } 1370 } 1371 } 1372 if (vsi->rx_rings) { 1373 ice_for_each_alloc_rxq(vsi, i) { 1374 if (vsi->rx_rings[i]) { 1375 kfree_rcu(vsi->rx_rings[i], rcu); 1376 WRITE_ONCE(vsi->rx_rings[i], NULL); 1377 } 1378 } 1379 } 1380 } 1381 1382 /** 1383 * ice_vsi_alloc_rings - Allocates Tx and Rx rings for the VSI 1384 * @vsi: VSI which is having rings allocated 1385 */ 1386 static int ice_vsi_alloc_rings(struct ice_vsi *vsi) 1387 { 1388 bool dvm_ena = ice_is_dvm_ena(&vsi->back->hw); 1389 struct ice_pf *pf = vsi->back; 1390 struct device *dev; 1391 u16 i; 1392 1393 dev = ice_pf_to_dev(pf); 1394 /* Allocate Tx rings */ 1395 ice_for_each_alloc_txq(vsi, i) { 1396 struct ice_tx_ring *ring; 1397 1398 /* allocate with kzalloc(), free with kfree_rcu() */ 1399 ring = kzalloc(sizeof(*ring), GFP_KERNEL); 1400 1401 if (!ring) 1402 goto err_out; 1403 1404 ring->q_index = i; 1405 ring->reg_idx = vsi->txq_map[i]; 1406 ring->vsi = vsi; 1407 ring->tx_tstamps = &pf->ptp.port.tx; 1408 ring->dev = dev; 1409 ring->count = vsi->num_tx_desc; 1410 ring->txq_teid = ICE_INVAL_TEID; 1411 if (dvm_ena) 1412 ring->flags |= ICE_TX_FLAGS_RING_VLAN_L2TAG2; 1413 else 1414 ring->flags |= ICE_TX_FLAGS_RING_VLAN_L2TAG1; 1415 WRITE_ONCE(vsi->tx_rings[i], ring); 1416 } 1417 1418 /* Allocate Rx rings */ 1419 ice_for_each_alloc_rxq(vsi, i) { 1420 struct ice_rx_ring *ring; 1421 1422 /* allocate with kzalloc(), free with kfree_rcu() */ 1423 ring = kzalloc(sizeof(*ring), GFP_KERNEL); 1424 if (!ring) 1425 goto err_out; 1426 1427 ring->q_index = i; 1428 ring->reg_idx = vsi->rxq_map[i]; 1429 ring->vsi = vsi; 1430 ring->netdev = vsi->netdev; 1431 ring->dev = dev; 1432 ring->count = vsi->num_rx_desc; 1433 ring->cached_phctime = pf->ptp.cached_phc_time; 1434 1435 if (ice_is_feature_supported(pf, ICE_F_GCS)) 1436 ring->flags |= ICE_RX_FLAGS_RING_GCS; 1437 1438 WRITE_ONCE(vsi->rx_rings[i], ring); 1439 } 1440 1441 return 0; 1442 1443 err_out: 1444 ice_vsi_clear_rings(vsi); 1445 return -ENOMEM; 1446 } 1447 1448 /** 1449 * ice_vsi_manage_rss_lut - disable/enable RSS 1450 * @vsi: the VSI being changed 1451 * @ena: boolean value indicating if this is an enable or disable request 1452 * 1453 * In the event of disable request for RSS, this function will zero out RSS 1454 * LUT, while in the event of enable request for RSS, it will reconfigure RSS 1455 * LUT. 1456 */ 1457 void ice_vsi_manage_rss_lut(struct ice_vsi *vsi, bool ena) 1458 { 1459 u8 *lut; 1460 1461 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL); 1462 if (!lut) 1463 return; 1464 1465 if (ena) { 1466 if (vsi->rss_lut_user) 1467 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size); 1468 else 1469 ice_fill_rss_lut(lut, vsi->rss_table_size, 1470 vsi->rss_size); 1471 } 1472 1473 ice_set_rss_lut(vsi, lut, vsi->rss_table_size); 1474 kfree(lut); 1475 } 1476 1477 /** 1478 * ice_vsi_cfg_crc_strip - Configure CRC stripping for a VSI 1479 * @vsi: VSI to be configured 1480 * @disable: set to true to have FCS / CRC in the frame data 1481 */ 1482 void ice_vsi_cfg_crc_strip(struct ice_vsi *vsi, bool disable) 1483 { 1484 int i; 1485 1486 ice_for_each_rxq(vsi, i) 1487 if (disable) 1488 vsi->rx_rings[i]->flags |= ICE_RX_FLAGS_CRC_STRIP_DIS; 1489 else 1490 vsi->rx_rings[i]->flags &= ~ICE_RX_FLAGS_CRC_STRIP_DIS; 1491 } 1492 1493 /** 1494 * ice_vsi_cfg_rss_lut_key - Configure RSS params for a VSI 1495 * @vsi: VSI to be configured 1496 */ 1497 int ice_vsi_cfg_rss_lut_key(struct ice_vsi *vsi) 1498 { 1499 struct ice_pf *pf = vsi->back; 1500 struct device *dev; 1501 u8 *lut, *key; 1502 int err; 1503 1504 dev = ice_pf_to_dev(pf); 1505 if (vsi->type == ICE_VSI_PF && vsi->ch_rss_size && 1506 (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))) { 1507 vsi->rss_size = min_t(u16, vsi->rss_size, vsi->ch_rss_size); 1508 } else { 1509 vsi->rss_size = min_t(u16, vsi->rss_size, vsi->num_rxq); 1510 1511 /* If orig_rss_size is valid and it is less than determined 1512 * main VSI's rss_size, update main VSI's rss_size to be 1513 * orig_rss_size so that when tc-qdisc is deleted, main VSI 1514 * RSS table gets programmed to be correct (whatever it was 1515 * to begin with (prior to setup-tc for ADQ config) 1516 */ 1517 if (vsi->orig_rss_size && vsi->rss_size < vsi->orig_rss_size && 1518 vsi->orig_rss_size <= vsi->num_rxq) { 1519 vsi->rss_size = vsi->orig_rss_size; 1520 /* now orig_rss_size is used, reset it to zero */ 1521 vsi->orig_rss_size = 0; 1522 } 1523 } 1524 1525 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL); 1526 if (!lut) 1527 return -ENOMEM; 1528 1529 if (vsi->rss_lut_user) 1530 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size); 1531 else 1532 ice_fill_rss_lut(lut, vsi->rss_table_size, vsi->rss_size); 1533 1534 err = ice_set_rss_lut(vsi, lut, vsi->rss_table_size); 1535 if (err) { 1536 dev_err(dev, "set_rss_lut failed, error %d\n", err); 1537 goto ice_vsi_cfg_rss_exit; 1538 } 1539 1540 key = kzalloc(ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE, GFP_KERNEL); 1541 if (!key) { 1542 err = -ENOMEM; 1543 goto ice_vsi_cfg_rss_exit; 1544 } 1545 1546 if (vsi->rss_hkey_user) 1547 memcpy(key, vsi->rss_hkey_user, ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE); 1548 else 1549 netdev_rss_key_fill((void *)key, ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE); 1550 1551 err = ice_set_rss_key(vsi, key); 1552 if (err) 1553 dev_err(dev, "set_rss_key failed, error %d\n", err); 1554 1555 kfree(key); 1556 ice_vsi_cfg_rss_exit: 1557 kfree(lut); 1558 return err; 1559 } 1560 1561 /** 1562 * ice_vsi_set_vf_rss_flow_fld - Sets VF VSI RSS input set for different flows 1563 * @vsi: VSI to be configured 1564 * 1565 * This function will only be called during the VF VSI setup. Upon successful 1566 * completion of package download, this function will configure default RSS 1567 * input sets for VF VSI. 1568 */ 1569 static void ice_vsi_set_vf_rss_flow_fld(struct ice_vsi *vsi) 1570 { 1571 struct ice_pf *pf = vsi->back; 1572 struct device *dev; 1573 int status; 1574 1575 dev = ice_pf_to_dev(pf); 1576 if (ice_is_safe_mode(pf)) { 1577 dev_dbg(dev, "Advanced RSS disabled. Package download failed, vsi num = %d\n", 1578 vsi->vsi_num); 1579 return; 1580 } 1581 1582 status = ice_add_avf_rss_cfg(&pf->hw, vsi, ICE_DEFAULT_RSS_HENA); 1583 if (status) 1584 dev_dbg(dev, "ice_add_avf_rss_cfg failed for vsi = %d, error = %d\n", 1585 vsi->vsi_num, status); 1586 } 1587 1588 static const struct ice_rss_hash_cfg default_rss_cfgs[] = { 1589 /* configure RSS for IPv4 with input set IP src/dst */ 1590 {ICE_FLOW_SEG_HDR_IPV4, ICE_FLOW_HASH_IPV4, ICE_RSS_ANY_HEADERS, false}, 1591 /* configure RSS for IPv6 with input set IPv6 src/dst */ 1592 {ICE_FLOW_SEG_HDR_IPV6, ICE_FLOW_HASH_IPV6, ICE_RSS_ANY_HEADERS, false}, 1593 /* configure RSS for tcp4 with input set IP src/dst, TCP src/dst */ 1594 {ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV4, 1595 ICE_HASH_TCP_IPV4, ICE_RSS_ANY_HEADERS, false}, 1596 /* configure RSS for udp4 with input set IP src/dst, UDP src/dst */ 1597 {ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV4, 1598 ICE_HASH_UDP_IPV4, ICE_RSS_ANY_HEADERS, false}, 1599 /* configure RSS for sctp4 with input set IP src/dst - only support 1600 * RSS on SCTPv4 on outer headers (non-tunneled) 1601 */ 1602 {ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV4, 1603 ICE_HASH_SCTP_IPV4, ICE_RSS_OUTER_HEADERS, false}, 1604 /* configure RSS for gtpc4 with input set IPv4 src/dst */ 1605 {ICE_FLOW_SEG_HDR_GTPC | ICE_FLOW_SEG_HDR_IPV4, 1606 ICE_FLOW_HASH_IPV4, ICE_RSS_OUTER_HEADERS, false}, 1607 /* configure RSS for gtpc4t with input set IPv4 src/dst */ 1608 {ICE_FLOW_SEG_HDR_GTPC_TEID | ICE_FLOW_SEG_HDR_IPV4, 1609 ICE_FLOW_HASH_GTP_C_IPV4_TEID, ICE_RSS_OUTER_HEADERS, false}, 1610 /* configure RSS for gtpu4 with input set IPv4 src/dst */ 1611 {ICE_FLOW_SEG_HDR_GTPU_IP | ICE_FLOW_SEG_HDR_IPV4, 1612 ICE_FLOW_HASH_GTP_U_IPV4_TEID, ICE_RSS_OUTER_HEADERS, false}, 1613 /* configure RSS for gtpu4e with input set IPv4 src/dst */ 1614 {ICE_FLOW_SEG_HDR_GTPU_EH | ICE_FLOW_SEG_HDR_IPV4, 1615 ICE_FLOW_HASH_GTP_U_IPV4_EH, ICE_RSS_OUTER_HEADERS, false}, 1616 /* configure RSS for gtpu4u with input set IPv4 src/dst */ 1617 { ICE_FLOW_SEG_HDR_GTPU_UP | ICE_FLOW_SEG_HDR_IPV4, 1618 ICE_FLOW_HASH_GTP_U_IPV4_UP, ICE_RSS_OUTER_HEADERS, false}, 1619 /* configure RSS for gtpu4d with input set IPv4 src/dst */ 1620 {ICE_FLOW_SEG_HDR_GTPU_DWN | ICE_FLOW_SEG_HDR_IPV4, 1621 ICE_FLOW_HASH_GTP_U_IPV4_DWN, ICE_RSS_OUTER_HEADERS, false}, 1622 1623 /* configure RSS for tcp6 with input set IPv6 src/dst, TCP src/dst */ 1624 {ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV6, 1625 ICE_HASH_TCP_IPV6, ICE_RSS_ANY_HEADERS, false}, 1626 /* configure RSS for udp6 with input set IPv6 src/dst, UDP src/dst */ 1627 {ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV6, 1628 ICE_HASH_UDP_IPV6, ICE_RSS_ANY_HEADERS, false}, 1629 /* configure RSS for sctp6 with input set IPv6 src/dst - only support 1630 * RSS on SCTPv6 on outer headers (non-tunneled) 1631 */ 1632 {ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV6, 1633 ICE_HASH_SCTP_IPV6, ICE_RSS_OUTER_HEADERS, false}, 1634 /* configure RSS for IPSEC ESP SPI with input set MAC_IPV4_SPI */ 1635 {ICE_FLOW_SEG_HDR_ESP, 1636 ICE_FLOW_HASH_ESP_SPI, ICE_RSS_OUTER_HEADERS, false}, 1637 /* configure RSS for gtpc6 with input set IPv6 src/dst */ 1638 {ICE_FLOW_SEG_HDR_GTPC | ICE_FLOW_SEG_HDR_IPV6, 1639 ICE_FLOW_HASH_IPV6, ICE_RSS_OUTER_HEADERS, false}, 1640 /* configure RSS for gtpc6t with input set IPv6 src/dst */ 1641 {ICE_FLOW_SEG_HDR_GTPC_TEID | ICE_FLOW_SEG_HDR_IPV6, 1642 ICE_FLOW_HASH_GTP_C_IPV6_TEID, ICE_RSS_OUTER_HEADERS, false}, 1643 /* configure RSS for gtpu6 with input set IPv6 src/dst */ 1644 {ICE_FLOW_SEG_HDR_GTPU_IP | ICE_FLOW_SEG_HDR_IPV6, 1645 ICE_FLOW_HASH_GTP_U_IPV6_TEID, ICE_RSS_OUTER_HEADERS, false}, 1646 /* configure RSS for gtpu6e with input set IPv6 src/dst */ 1647 {ICE_FLOW_SEG_HDR_GTPU_EH | ICE_FLOW_SEG_HDR_IPV6, 1648 ICE_FLOW_HASH_GTP_U_IPV6_EH, ICE_RSS_OUTER_HEADERS, false}, 1649 /* configure RSS for gtpu6u with input set IPv6 src/dst */ 1650 { ICE_FLOW_SEG_HDR_GTPU_UP | ICE_FLOW_SEG_HDR_IPV6, 1651 ICE_FLOW_HASH_GTP_U_IPV6_UP, ICE_RSS_OUTER_HEADERS, false}, 1652 /* configure RSS for gtpu6d with input set IPv6 src/dst */ 1653 {ICE_FLOW_SEG_HDR_GTPU_DWN | ICE_FLOW_SEG_HDR_IPV6, 1654 ICE_FLOW_HASH_GTP_U_IPV6_DWN, ICE_RSS_OUTER_HEADERS, false}, 1655 }; 1656 1657 /** 1658 * ice_vsi_set_rss_flow_fld - Sets RSS input set for different flows 1659 * @vsi: VSI to be configured 1660 * 1661 * This function will only be called after successful download package call 1662 * during initialization of PF. Since the downloaded package will erase the 1663 * RSS section, this function will configure RSS input sets for different 1664 * flow types. The last profile added has the highest priority, therefore 2 1665 * tuple profiles (i.e. IPv4 src/dst) are added before 4 tuple profiles 1666 * (i.e. IPv4 src/dst TCP src/dst port). 1667 */ 1668 static void ice_vsi_set_rss_flow_fld(struct ice_vsi *vsi) 1669 { 1670 u16 vsi_num = vsi->vsi_num; 1671 struct ice_pf *pf = vsi->back; 1672 struct ice_hw *hw = &pf->hw; 1673 struct device *dev; 1674 int status; 1675 u32 i; 1676 1677 dev = ice_pf_to_dev(pf); 1678 if (ice_is_safe_mode(pf)) { 1679 dev_dbg(dev, "Advanced RSS disabled. Package download failed, vsi num = %d\n", 1680 vsi_num); 1681 return; 1682 } 1683 for (i = 0; i < ARRAY_SIZE(default_rss_cfgs); i++) { 1684 const struct ice_rss_hash_cfg *cfg = &default_rss_cfgs[i]; 1685 1686 status = ice_add_rss_cfg(hw, vsi, cfg); 1687 if (status) 1688 dev_dbg(dev, "ice_add_rss_cfg failed, addl_hdrs = %x, hash_flds = %llx, hdr_type = %d, symm = %d\n", 1689 cfg->addl_hdrs, cfg->hash_flds, 1690 cfg->hdr_type, cfg->symm); 1691 } 1692 } 1693 1694 /** 1695 * ice_pf_state_is_nominal - checks the PF for nominal state 1696 * @pf: pointer to PF to check 1697 * 1698 * Check the PF's state for a collection of bits that would indicate 1699 * the PF is in a state that would inhibit normal operation for 1700 * driver functionality. 1701 * 1702 * Returns true if PF is in a nominal state, false otherwise 1703 */ 1704 bool ice_pf_state_is_nominal(struct ice_pf *pf) 1705 { 1706 DECLARE_BITMAP(check_bits, ICE_STATE_NBITS) = { 0 }; 1707 1708 if (!pf) 1709 return false; 1710 1711 bitmap_set(check_bits, 0, ICE_STATE_NOMINAL_CHECK_BITS); 1712 if (bitmap_intersects(pf->state, check_bits, ICE_STATE_NBITS)) 1713 return false; 1714 1715 return true; 1716 } 1717 1718 #define ICE_FW_MODE_REC_M BIT(1) 1719 bool ice_is_recovery_mode(struct ice_hw *hw) 1720 { 1721 return rd32(hw, GL_MNG_FWSM) & ICE_FW_MODE_REC_M; 1722 } 1723 1724 /** 1725 * ice_update_eth_stats - Update VSI-specific ethernet statistics counters 1726 * @vsi: the VSI to be updated 1727 */ 1728 void ice_update_eth_stats(struct ice_vsi *vsi) 1729 { 1730 struct ice_eth_stats *prev_es, *cur_es; 1731 struct ice_hw *hw = &vsi->back->hw; 1732 struct ice_pf *pf = vsi->back; 1733 u16 vsi_num = vsi->vsi_num; /* HW absolute index of a VSI */ 1734 1735 prev_es = &vsi->eth_stats_prev; 1736 cur_es = &vsi->eth_stats; 1737 1738 if (ice_is_reset_in_progress(pf->state)) 1739 vsi->stat_offsets_loaded = false; 1740 1741 ice_stat_update40(hw, GLV_GORCL(vsi_num), vsi->stat_offsets_loaded, 1742 &prev_es->rx_bytes, &cur_es->rx_bytes); 1743 1744 ice_stat_update40(hw, GLV_UPRCL(vsi_num), vsi->stat_offsets_loaded, 1745 &prev_es->rx_unicast, &cur_es->rx_unicast); 1746 1747 ice_stat_update40(hw, GLV_MPRCL(vsi_num), vsi->stat_offsets_loaded, 1748 &prev_es->rx_multicast, &cur_es->rx_multicast); 1749 1750 ice_stat_update40(hw, GLV_BPRCL(vsi_num), vsi->stat_offsets_loaded, 1751 &prev_es->rx_broadcast, &cur_es->rx_broadcast); 1752 1753 ice_stat_update32(hw, GLV_RDPC(vsi_num), vsi->stat_offsets_loaded, 1754 &prev_es->rx_discards, &cur_es->rx_discards); 1755 1756 ice_stat_update40(hw, GLV_GOTCL(vsi_num), vsi->stat_offsets_loaded, 1757 &prev_es->tx_bytes, &cur_es->tx_bytes); 1758 1759 ice_stat_update40(hw, GLV_UPTCL(vsi_num), vsi->stat_offsets_loaded, 1760 &prev_es->tx_unicast, &cur_es->tx_unicast); 1761 1762 ice_stat_update40(hw, GLV_MPTCL(vsi_num), vsi->stat_offsets_loaded, 1763 &prev_es->tx_multicast, &cur_es->tx_multicast); 1764 1765 ice_stat_update40(hw, GLV_BPTCL(vsi_num), vsi->stat_offsets_loaded, 1766 &prev_es->tx_broadcast, &cur_es->tx_broadcast); 1767 1768 ice_stat_update32(hw, GLV_TEPC(vsi_num), vsi->stat_offsets_loaded, 1769 &prev_es->tx_errors, &cur_es->tx_errors); 1770 1771 vsi->stat_offsets_loaded = true; 1772 } 1773 1774 /** 1775 * ice_write_qrxflxp_cntxt - write/configure QRXFLXP_CNTXT register 1776 * @hw: HW pointer 1777 * @pf_q: index of the Rx queue in the PF's queue space 1778 * @rxdid: flexible descriptor RXDID 1779 * @prio: priority for the RXDID for this queue 1780 * @ena_ts: true to enable timestamp and false to disable timestamp 1781 */ 1782 void ice_write_qrxflxp_cntxt(struct ice_hw *hw, u16 pf_q, u32 rxdid, u32 prio, 1783 bool ena_ts) 1784 { 1785 int regval = rd32(hw, QRXFLXP_CNTXT(pf_q)); 1786 1787 /* clear any previous values */ 1788 regval &= ~(QRXFLXP_CNTXT_RXDID_IDX_M | 1789 QRXFLXP_CNTXT_RXDID_PRIO_M | 1790 QRXFLXP_CNTXT_TS_M); 1791 1792 regval |= FIELD_PREP(QRXFLXP_CNTXT_RXDID_IDX_M, rxdid); 1793 regval |= FIELD_PREP(QRXFLXP_CNTXT_RXDID_PRIO_M, prio); 1794 1795 if (ena_ts) 1796 /* Enable TimeSync on this queue */ 1797 regval |= QRXFLXP_CNTXT_TS_M; 1798 1799 wr32(hw, QRXFLXP_CNTXT(pf_q), regval); 1800 } 1801 1802 /** 1803 * ice_intrl_usec_to_reg - convert interrupt rate limit to register value 1804 * @intrl: interrupt rate limit in usecs 1805 * @gran: interrupt rate limit granularity in usecs 1806 * 1807 * This function converts a decimal interrupt rate limit in usecs to the format 1808 * expected by firmware. 1809 */ 1810 static u32 ice_intrl_usec_to_reg(u8 intrl, u8 gran) 1811 { 1812 u32 val = intrl / gran; 1813 1814 if (val) 1815 return val | GLINT_RATE_INTRL_ENA_M; 1816 return 0; 1817 } 1818 1819 /** 1820 * ice_write_intrl - write throttle rate limit to interrupt specific register 1821 * @q_vector: pointer to interrupt specific structure 1822 * @intrl: throttle rate limit in microseconds to write 1823 */ 1824 void ice_write_intrl(struct ice_q_vector *q_vector, u8 intrl) 1825 { 1826 struct ice_hw *hw = &q_vector->vsi->back->hw; 1827 1828 wr32(hw, GLINT_RATE(q_vector->reg_idx), 1829 ice_intrl_usec_to_reg(intrl, ICE_INTRL_GRAN_ABOVE_25)); 1830 } 1831 1832 static struct ice_q_vector *ice_pull_qvec_from_rc(struct ice_ring_container *rc) 1833 { 1834 switch (rc->type) { 1835 case ICE_RX_CONTAINER: 1836 if (rc->rx_ring) 1837 return rc->rx_ring->q_vector; 1838 break; 1839 case ICE_TX_CONTAINER: 1840 if (rc->tx_ring) 1841 return rc->tx_ring->q_vector; 1842 break; 1843 default: 1844 break; 1845 } 1846 1847 return NULL; 1848 } 1849 1850 /** 1851 * __ice_write_itr - write throttle rate to register 1852 * @q_vector: pointer to interrupt data structure 1853 * @rc: pointer to ring container 1854 * @itr: throttle rate in microseconds to write 1855 */ 1856 static void __ice_write_itr(struct ice_q_vector *q_vector, 1857 struct ice_ring_container *rc, u16 itr) 1858 { 1859 struct ice_hw *hw = &q_vector->vsi->back->hw; 1860 1861 wr32(hw, GLINT_ITR(rc->itr_idx, q_vector->reg_idx), 1862 ITR_REG_ALIGN(itr) >> ICE_ITR_GRAN_S); 1863 } 1864 1865 /** 1866 * ice_write_itr - write throttle rate to queue specific register 1867 * @rc: pointer to ring container 1868 * @itr: throttle rate in microseconds to write 1869 */ 1870 void ice_write_itr(struct ice_ring_container *rc, u16 itr) 1871 { 1872 struct ice_q_vector *q_vector; 1873 1874 q_vector = ice_pull_qvec_from_rc(rc); 1875 if (!q_vector) 1876 return; 1877 1878 __ice_write_itr(q_vector, rc, itr); 1879 } 1880 1881 /** 1882 * ice_set_q_vector_intrl - set up interrupt rate limiting 1883 * @q_vector: the vector to be configured 1884 * 1885 * Interrupt rate limiting is local to the vector, not per-queue so we must 1886 * detect if either ring container has dynamic moderation enabled to decide 1887 * what to set the interrupt rate limit to via INTRL settings. In the case that 1888 * dynamic moderation is disabled on both, write the value with the cached 1889 * setting to make sure INTRL register matches the user visible value. 1890 */ 1891 void ice_set_q_vector_intrl(struct ice_q_vector *q_vector) 1892 { 1893 if (ITR_IS_DYNAMIC(&q_vector->tx) || ITR_IS_DYNAMIC(&q_vector->rx)) { 1894 /* in the case of dynamic enabled, cap each vector to no more 1895 * than (4 us) 250,000 ints/sec, which allows low latency 1896 * but still less than 500,000 interrupts per second, which 1897 * reduces CPU a bit in the case of the lowest latency 1898 * setting. The 4 here is a value in microseconds. 1899 */ 1900 ice_write_intrl(q_vector, 4); 1901 } else { 1902 ice_write_intrl(q_vector, q_vector->intrl); 1903 } 1904 } 1905 1906 /** 1907 * ice_vsi_cfg_msix - MSIX mode Interrupt Config in the HW 1908 * @vsi: the VSI being configured 1909 * 1910 * This configures MSIX mode interrupts for the PF VSI, and should not be used 1911 * for the VF VSI. 1912 */ 1913 void ice_vsi_cfg_msix(struct ice_vsi *vsi) 1914 { 1915 struct ice_pf *pf = vsi->back; 1916 struct ice_hw *hw = &pf->hw; 1917 u16 txq = 0, rxq = 0; 1918 int i, q; 1919 1920 ice_for_each_q_vector(vsi, i) { 1921 struct ice_q_vector *q_vector = vsi->q_vectors[i]; 1922 u16 reg_idx = q_vector->reg_idx; 1923 1924 ice_cfg_itr(hw, q_vector); 1925 1926 /* Both Transmit Queue Interrupt Cause Control register 1927 * and Receive Queue Interrupt Cause control register 1928 * expects MSIX_INDX field to be the vector index 1929 * within the function space and not the absolute 1930 * vector index across PF or across device. 1931 * For SR-IOV VF VSIs queue vector index always starts 1932 * with 1 since first vector index(0) is used for OICR 1933 * in VF space. Since VMDq and other PF VSIs are within 1934 * the PF function space, use the vector index that is 1935 * tracked for this PF. 1936 */ 1937 for (q = 0; q < q_vector->num_ring_tx; q++) { 1938 ice_cfg_txq_interrupt(vsi, txq, reg_idx, 1939 q_vector->tx.itr_idx); 1940 txq++; 1941 } 1942 1943 for (q = 0; q < q_vector->num_ring_rx; q++) { 1944 ice_cfg_rxq_interrupt(vsi, rxq, reg_idx, 1945 q_vector->rx.itr_idx); 1946 rxq++; 1947 } 1948 } 1949 } 1950 1951 /** 1952 * ice_vsi_start_all_rx_rings - start/enable all of a VSI's Rx rings 1953 * @vsi: the VSI whose rings are to be enabled 1954 * 1955 * Returns 0 on success and a negative value on error 1956 */ 1957 int ice_vsi_start_all_rx_rings(struct ice_vsi *vsi) 1958 { 1959 return ice_vsi_ctrl_all_rx_rings(vsi, true); 1960 } 1961 1962 /** 1963 * ice_vsi_stop_all_rx_rings - stop/disable all of a VSI's Rx rings 1964 * @vsi: the VSI whose rings are to be disabled 1965 * 1966 * Returns 0 on success and a negative value on error 1967 */ 1968 int ice_vsi_stop_all_rx_rings(struct ice_vsi *vsi) 1969 { 1970 return ice_vsi_ctrl_all_rx_rings(vsi, false); 1971 } 1972 1973 /** 1974 * ice_vsi_stop_tx_rings - Disable Tx rings 1975 * @vsi: the VSI being configured 1976 * @rst_src: reset source 1977 * @rel_vmvf_num: Relative ID of VF/VM 1978 * @rings: Tx ring array to be stopped 1979 * @count: number of Tx ring array elements 1980 */ 1981 static int 1982 ice_vsi_stop_tx_rings(struct ice_vsi *vsi, enum ice_disq_rst_src rst_src, 1983 u16 rel_vmvf_num, struct ice_tx_ring **rings, u16 count) 1984 { 1985 u16 q_idx; 1986 1987 if (vsi->num_txq > ICE_LAN_TXQ_MAX_QDIS) 1988 return -EINVAL; 1989 1990 for (q_idx = 0; q_idx < count; q_idx++) { 1991 struct ice_txq_meta txq_meta = { }; 1992 int status; 1993 1994 if (!rings || !rings[q_idx]) 1995 return -EINVAL; 1996 1997 ice_fill_txq_meta(vsi, rings[q_idx], &txq_meta); 1998 status = ice_vsi_stop_tx_ring(vsi, rst_src, rel_vmvf_num, 1999 rings[q_idx], &txq_meta); 2000 2001 if (status) 2002 return status; 2003 } 2004 2005 return 0; 2006 } 2007 2008 /** 2009 * ice_vsi_stop_lan_tx_rings - Disable LAN Tx rings 2010 * @vsi: the VSI being configured 2011 * @rst_src: reset source 2012 * @rel_vmvf_num: Relative ID of VF/VM 2013 */ 2014 int 2015 ice_vsi_stop_lan_tx_rings(struct ice_vsi *vsi, enum ice_disq_rst_src rst_src, 2016 u16 rel_vmvf_num) 2017 { 2018 return ice_vsi_stop_tx_rings(vsi, rst_src, rel_vmvf_num, vsi->tx_rings, vsi->num_txq); 2019 } 2020 2021 /** 2022 * ice_vsi_stop_xdp_tx_rings - Disable XDP Tx rings 2023 * @vsi: the VSI being configured 2024 */ 2025 int ice_vsi_stop_xdp_tx_rings(struct ice_vsi *vsi) 2026 { 2027 return ice_vsi_stop_tx_rings(vsi, ICE_NO_RESET, 0, vsi->xdp_rings, vsi->num_xdp_txq); 2028 } 2029 2030 /** 2031 * ice_vsi_is_rx_queue_active 2032 * @vsi: the VSI being configured 2033 * 2034 * Return true if at least one queue is active. 2035 */ 2036 bool ice_vsi_is_rx_queue_active(struct ice_vsi *vsi) 2037 { 2038 struct ice_pf *pf = vsi->back; 2039 struct ice_hw *hw = &pf->hw; 2040 int i; 2041 2042 ice_for_each_rxq(vsi, i) { 2043 u32 rx_reg; 2044 int pf_q; 2045 2046 pf_q = vsi->rxq_map[i]; 2047 rx_reg = rd32(hw, QRX_CTRL(pf_q)); 2048 if (rx_reg & QRX_CTRL_QENA_STAT_M) 2049 return true; 2050 } 2051 2052 return false; 2053 } 2054 2055 static void ice_vsi_set_tc_cfg(struct ice_vsi *vsi) 2056 { 2057 if (!test_bit(ICE_FLAG_DCB_ENA, vsi->back->flags)) { 2058 vsi->tc_cfg.ena_tc = ICE_DFLT_TRAFFIC_CLASS; 2059 vsi->tc_cfg.numtc = 1; 2060 return; 2061 } 2062 2063 /* set VSI TC information based on DCB config */ 2064 ice_vsi_set_dcb_tc_cfg(vsi); 2065 } 2066 2067 /** 2068 * ice_cfg_sw_lldp - Config switch rules for LLDP packet handling 2069 * @vsi: the VSI being configured 2070 * @tx: bool to determine Tx or Rx rule 2071 * @create: bool to determine create or remove Rule 2072 */ 2073 void ice_cfg_sw_lldp(struct ice_vsi *vsi, bool tx, bool create) 2074 { 2075 int (*eth_fltr)(struct ice_vsi *v, u16 type, u16 flag, 2076 enum ice_sw_fwd_act_type act); 2077 struct ice_pf *pf = vsi->back; 2078 struct device *dev; 2079 int status; 2080 2081 dev = ice_pf_to_dev(pf); 2082 eth_fltr = create ? ice_fltr_add_eth : ice_fltr_remove_eth; 2083 2084 if (tx) { 2085 status = eth_fltr(vsi, ETH_P_LLDP, ICE_FLTR_TX, 2086 ICE_DROP_PACKET); 2087 } else { 2088 if (ice_fw_supports_lldp_fltr_ctrl(&pf->hw)) { 2089 status = ice_lldp_fltr_add_remove(&pf->hw, vsi->vsi_num, 2090 create); 2091 } else { 2092 status = eth_fltr(vsi, ETH_P_LLDP, ICE_FLTR_RX, 2093 ICE_FWD_TO_VSI); 2094 } 2095 } 2096 2097 if (status) 2098 dev_dbg(dev, "Fail %s %s LLDP rule on VSI %i error: %d\n", 2099 create ? "adding" : "removing", tx ? "TX" : "RX", 2100 vsi->vsi_num, status); 2101 } 2102 2103 /** 2104 * ice_set_agg_vsi - sets up scheduler aggregator node and move VSI into it 2105 * @vsi: pointer to the VSI 2106 * 2107 * This function will allocate new scheduler aggregator now if needed and will 2108 * move specified VSI into it. 2109 */ 2110 static void ice_set_agg_vsi(struct ice_vsi *vsi) 2111 { 2112 struct device *dev = ice_pf_to_dev(vsi->back); 2113 struct ice_agg_node *agg_node_iter = NULL; 2114 u32 agg_id = ICE_INVALID_AGG_NODE_ID; 2115 struct ice_agg_node *agg_node = NULL; 2116 int node_offset, max_agg_nodes = 0; 2117 struct ice_port_info *port_info; 2118 struct ice_pf *pf = vsi->back; 2119 u32 agg_node_id_start = 0; 2120 int status; 2121 2122 /* create (as needed) scheduler aggregator node and move VSI into 2123 * corresponding aggregator node 2124 * - PF aggregator node to contains VSIs of type _PF and _CTRL 2125 * - VF aggregator nodes will contain VF VSI 2126 */ 2127 port_info = pf->hw.port_info; 2128 if (!port_info) 2129 return; 2130 2131 switch (vsi->type) { 2132 case ICE_VSI_CTRL: 2133 case ICE_VSI_CHNL: 2134 case ICE_VSI_LB: 2135 case ICE_VSI_PF: 2136 case ICE_VSI_SF: 2137 max_agg_nodes = ICE_MAX_PF_AGG_NODES; 2138 agg_node_id_start = ICE_PF_AGG_NODE_ID_START; 2139 agg_node_iter = &pf->pf_agg_node[0]; 2140 break; 2141 case ICE_VSI_VF: 2142 /* user can create 'n' VFs on a given PF, but since max children 2143 * per aggregator node can be only 64. Following code handles 2144 * aggregator(s) for VF VSIs, either selects a agg_node which 2145 * was already created provided num_vsis < 64, otherwise 2146 * select next available node, which will be created 2147 */ 2148 max_agg_nodes = ICE_MAX_VF_AGG_NODES; 2149 agg_node_id_start = ICE_VF_AGG_NODE_ID_START; 2150 agg_node_iter = &pf->vf_agg_node[0]; 2151 break; 2152 default: 2153 /* other VSI type, handle later if needed */ 2154 dev_dbg(dev, "unexpected VSI type %s\n", 2155 ice_vsi_type_str(vsi->type)); 2156 return; 2157 } 2158 2159 /* find the appropriate aggregator node */ 2160 for (node_offset = 0; node_offset < max_agg_nodes; node_offset++) { 2161 /* see if we can find space in previously created 2162 * node if num_vsis < 64, otherwise skip 2163 */ 2164 if (agg_node_iter->num_vsis && 2165 agg_node_iter->num_vsis == ICE_MAX_VSIS_IN_AGG_NODE) { 2166 agg_node_iter++; 2167 continue; 2168 } 2169 2170 if (agg_node_iter->valid && 2171 agg_node_iter->agg_id != ICE_INVALID_AGG_NODE_ID) { 2172 agg_id = agg_node_iter->agg_id; 2173 agg_node = agg_node_iter; 2174 break; 2175 } 2176 2177 /* find unclaimed agg_id */ 2178 if (agg_node_iter->agg_id == ICE_INVALID_AGG_NODE_ID) { 2179 agg_id = node_offset + agg_node_id_start; 2180 agg_node = agg_node_iter; 2181 break; 2182 } 2183 /* move to next agg_node */ 2184 agg_node_iter++; 2185 } 2186 2187 if (!agg_node) 2188 return; 2189 2190 /* if selected aggregator node was not created, create it */ 2191 if (!agg_node->valid) { 2192 status = ice_cfg_agg(port_info, agg_id, ICE_AGG_TYPE_AGG, 2193 (u8)vsi->tc_cfg.ena_tc); 2194 if (status) { 2195 dev_err(dev, "unable to create aggregator node with agg_id %u\n", 2196 agg_id); 2197 return; 2198 } 2199 /* aggregator node is created, store the needed info */ 2200 agg_node->valid = true; 2201 agg_node->agg_id = agg_id; 2202 } 2203 2204 /* move VSI to corresponding aggregator node */ 2205 status = ice_move_vsi_to_agg(port_info, agg_id, vsi->idx, 2206 (u8)vsi->tc_cfg.ena_tc); 2207 if (status) { 2208 dev_err(dev, "unable to move VSI idx %u into aggregator %u node", 2209 vsi->idx, agg_id); 2210 return; 2211 } 2212 2213 /* keep active children count for aggregator node */ 2214 agg_node->num_vsis++; 2215 2216 /* cache the 'agg_id' in VSI, so that after reset - VSI will be moved 2217 * to aggregator node 2218 */ 2219 vsi->agg_node = agg_node; 2220 dev_dbg(dev, "successfully moved VSI idx %u tc_bitmap 0x%x) into aggregator node %d which has num_vsis %u\n", 2221 vsi->idx, vsi->tc_cfg.ena_tc, vsi->agg_node->agg_id, 2222 vsi->agg_node->num_vsis); 2223 } 2224 2225 static int ice_vsi_cfg_tc_lan(struct ice_pf *pf, struct ice_vsi *vsi) 2226 { 2227 u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 }; 2228 struct device *dev = ice_pf_to_dev(pf); 2229 int ret, i; 2230 2231 /* configure VSI nodes based on number of queues and TC's */ 2232 ice_for_each_traffic_class(i) { 2233 if (!(vsi->tc_cfg.ena_tc & BIT(i))) 2234 continue; 2235 2236 if (vsi->type == ICE_VSI_CHNL) { 2237 if (!vsi->alloc_txq && vsi->num_txq) 2238 max_txqs[i] = vsi->num_txq; 2239 else 2240 max_txqs[i] = pf->num_lan_tx; 2241 } else { 2242 max_txqs[i] = vsi->alloc_txq; 2243 } 2244 2245 if (vsi->type == ICE_VSI_PF) 2246 max_txqs[i] += vsi->num_xdp_txq; 2247 } 2248 2249 dev_dbg(dev, "vsi->tc_cfg.ena_tc = %d\n", vsi->tc_cfg.ena_tc); 2250 ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, vsi->tc_cfg.ena_tc, 2251 max_txqs); 2252 if (ret) { 2253 dev_err(dev, "VSI %d failed lan queue config, error %d\n", 2254 vsi->vsi_num, ret); 2255 return ret; 2256 } 2257 2258 return 0; 2259 } 2260 2261 /** 2262 * ice_vsi_cfg_def - configure default VSI based on the type 2263 * @vsi: pointer to VSI 2264 */ 2265 static int ice_vsi_cfg_def(struct ice_vsi *vsi) 2266 { 2267 struct device *dev = ice_pf_to_dev(vsi->back); 2268 struct ice_pf *pf = vsi->back; 2269 int ret; 2270 2271 vsi->vsw = pf->first_sw; 2272 2273 ret = ice_vsi_alloc_def(vsi, vsi->ch); 2274 if (ret) 2275 return ret; 2276 2277 /* allocate memory for Tx/Rx ring stat pointers */ 2278 ret = ice_vsi_alloc_stat_arrays(vsi); 2279 if (ret) 2280 goto unroll_vsi_alloc; 2281 2282 ice_alloc_fd_res(vsi); 2283 2284 ret = ice_vsi_get_qs(vsi); 2285 if (ret) { 2286 dev_err(dev, "Failed to allocate queues. vsi->idx = %d\n", 2287 vsi->idx); 2288 goto unroll_vsi_alloc_stat; 2289 } 2290 2291 /* set RSS capabilities */ 2292 ice_vsi_set_rss_params(vsi); 2293 2294 /* set TC configuration */ 2295 ice_vsi_set_tc_cfg(vsi); 2296 2297 /* create the VSI */ 2298 ret = ice_vsi_init(vsi, vsi->flags); 2299 if (ret) 2300 goto unroll_get_qs; 2301 2302 ice_vsi_init_vlan_ops(vsi); 2303 2304 switch (vsi->type) { 2305 case ICE_VSI_CTRL: 2306 case ICE_VSI_SF: 2307 case ICE_VSI_PF: 2308 ret = ice_vsi_alloc_q_vectors(vsi); 2309 if (ret) 2310 goto unroll_vsi_init; 2311 2312 ret = ice_vsi_alloc_rings(vsi); 2313 if (ret) 2314 goto unroll_vector_base; 2315 2316 ret = ice_vsi_alloc_ring_stats(vsi); 2317 if (ret) 2318 goto unroll_vector_base; 2319 2320 if (ice_is_xdp_ena_vsi(vsi)) { 2321 ret = ice_vsi_determine_xdp_res(vsi); 2322 if (ret) 2323 goto unroll_vector_base; 2324 ret = ice_prepare_xdp_rings(vsi, vsi->xdp_prog, 2325 ICE_XDP_CFG_PART); 2326 if (ret) 2327 goto unroll_vector_base; 2328 } 2329 2330 ice_vsi_map_rings_to_vectors(vsi); 2331 2332 vsi->stat_offsets_loaded = false; 2333 2334 /* ICE_VSI_CTRL does not need RSS so skip RSS processing */ 2335 if (vsi->type != ICE_VSI_CTRL) 2336 /* Do not exit if configuring RSS had an issue, at 2337 * least receive traffic on first queue. Hence no 2338 * need to capture return value 2339 */ 2340 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) { 2341 ice_vsi_cfg_rss_lut_key(vsi); 2342 ice_vsi_set_rss_flow_fld(vsi); 2343 } 2344 ice_init_arfs(vsi); 2345 break; 2346 case ICE_VSI_CHNL: 2347 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) { 2348 ice_vsi_cfg_rss_lut_key(vsi); 2349 ice_vsi_set_rss_flow_fld(vsi); 2350 } 2351 break; 2352 case ICE_VSI_VF: 2353 /* VF driver will take care of creating netdev for this type and 2354 * map queues to vectors through Virtchnl, PF driver only 2355 * creates a VSI and corresponding structures for bookkeeping 2356 * purpose 2357 */ 2358 ret = ice_vsi_alloc_q_vectors(vsi); 2359 if (ret) 2360 goto unroll_vsi_init; 2361 2362 ret = ice_vsi_alloc_rings(vsi); 2363 if (ret) 2364 goto unroll_alloc_q_vector; 2365 2366 ret = ice_vsi_alloc_ring_stats(vsi); 2367 if (ret) 2368 goto unroll_vector_base; 2369 2370 vsi->stat_offsets_loaded = false; 2371 2372 /* Do not exit if configuring RSS had an issue, at least 2373 * receive traffic on first queue. Hence no need to capture 2374 * return value 2375 */ 2376 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) { 2377 ice_vsi_cfg_rss_lut_key(vsi); 2378 ice_vsi_set_vf_rss_flow_fld(vsi); 2379 } 2380 break; 2381 case ICE_VSI_LB: 2382 ret = ice_vsi_alloc_rings(vsi); 2383 if (ret) 2384 goto unroll_vsi_init; 2385 2386 ret = ice_vsi_alloc_ring_stats(vsi); 2387 if (ret) 2388 goto unroll_vector_base; 2389 2390 break; 2391 default: 2392 /* clean up the resources and exit */ 2393 ret = -EINVAL; 2394 goto unroll_vsi_init; 2395 } 2396 2397 return 0; 2398 2399 unroll_vector_base: 2400 /* reclaim SW interrupts back to the common pool */ 2401 unroll_alloc_q_vector: 2402 ice_vsi_free_q_vectors(vsi); 2403 unroll_vsi_init: 2404 ice_vsi_delete_from_hw(vsi); 2405 unroll_get_qs: 2406 ice_vsi_put_qs(vsi); 2407 unroll_vsi_alloc_stat: 2408 ice_vsi_free_stats(vsi); 2409 unroll_vsi_alloc: 2410 ice_vsi_free_arrays(vsi); 2411 return ret; 2412 } 2413 2414 /** 2415 * ice_vsi_cfg - configure a previously allocated VSI 2416 * @vsi: pointer to VSI 2417 */ 2418 int ice_vsi_cfg(struct ice_vsi *vsi) 2419 { 2420 struct ice_pf *pf = vsi->back; 2421 int ret; 2422 2423 if (WARN_ON(vsi->type == ICE_VSI_VF && !vsi->vf)) 2424 return -EINVAL; 2425 2426 ret = ice_vsi_cfg_def(vsi); 2427 if (ret) 2428 return ret; 2429 2430 ret = ice_vsi_cfg_tc_lan(vsi->back, vsi); 2431 if (ret) 2432 ice_vsi_decfg(vsi); 2433 2434 if (vsi->type == ICE_VSI_CTRL) { 2435 if (vsi->vf) { 2436 WARN_ON(vsi->vf->ctrl_vsi_idx != ICE_NO_VSI); 2437 vsi->vf->ctrl_vsi_idx = vsi->idx; 2438 } else { 2439 WARN_ON(pf->ctrl_vsi_idx != ICE_NO_VSI); 2440 pf->ctrl_vsi_idx = vsi->idx; 2441 } 2442 } 2443 2444 return ret; 2445 } 2446 2447 /** 2448 * ice_vsi_decfg - remove all VSI configuration 2449 * @vsi: pointer to VSI 2450 */ 2451 void ice_vsi_decfg(struct ice_vsi *vsi) 2452 { 2453 struct ice_pf *pf = vsi->back; 2454 int err; 2455 2456 ice_rm_vsi_lan_cfg(vsi->port_info, vsi->idx); 2457 err = ice_rm_vsi_rdma_cfg(vsi->port_info, vsi->idx); 2458 if (err) 2459 dev_err(ice_pf_to_dev(pf), "Failed to remove RDMA scheduler config for VSI %u, err %d\n", 2460 vsi->vsi_num, err); 2461 2462 if (vsi->xdp_rings) 2463 /* return value check can be skipped here, it always returns 2464 * 0 if reset is in progress 2465 */ 2466 ice_destroy_xdp_rings(vsi, ICE_XDP_CFG_PART); 2467 2468 ice_vsi_clear_rings(vsi); 2469 ice_vsi_free_q_vectors(vsi); 2470 ice_vsi_put_qs(vsi); 2471 ice_vsi_free_arrays(vsi); 2472 2473 /* SR-IOV determines needed MSIX resources all at once instead of per 2474 * VSI since when VFs are spawned we know how many VFs there are and how 2475 * many interrupts each VF needs. SR-IOV MSIX resources are also 2476 * cleared in the same manner. 2477 */ 2478 2479 if (vsi->type == ICE_VSI_VF && 2480 vsi->agg_node && vsi->agg_node->valid) 2481 vsi->agg_node->num_vsis--; 2482 } 2483 2484 /** 2485 * ice_vsi_setup - Set up a VSI by a given type 2486 * @pf: board private structure 2487 * @params: parameters to use when creating the VSI 2488 * 2489 * This allocates the sw VSI structure and its queue resources. 2490 * 2491 * Returns pointer to the successfully allocated and configured VSI sw struct on 2492 * success, NULL on failure. 2493 */ 2494 struct ice_vsi * 2495 ice_vsi_setup(struct ice_pf *pf, struct ice_vsi_cfg_params *params) 2496 { 2497 struct device *dev = ice_pf_to_dev(pf); 2498 struct ice_vsi *vsi; 2499 int ret; 2500 2501 /* ice_vsi_setup can only initialize a new VSI, and we must have 2502 * a port_info structure for it. 2503 */ 2504 if (WARN_ON(!(params->flags & ICE_VSI_FLAG_INIT)) || 2505 WARN_ON(!params->port_info)) 2506 return NULL; 2507 2508 vsi = ice_vsi_alloc(pf); 2509 if (!vsi) { 2510 dev_err(dev, "could not allocate VSI\n"); 2511 return NULL; 2512 } 2513 2514 vsi->params = *params; 2515 ret = ice_vsi_cfg(vsi); 2516 if (ret) 2517 goto err_vsi_cfg; 2518 2519 /* Add switch rule to drop all Tx Flow Control Frames, of look up 2520 * type ETHERTYPE from VSIs, and restrict malicious VF from sending 2521 * out PAUSE or PFC frames. If enabled, FW can still send FC frames. 2522 * The rule is added once for PF VSI in order to create appropriate 2523 * recipe, since VSI/VSI list is ignored with drop action... 2524 * Also add rules to handle LLDP Tx packets. Tx LLDP packets need to 2525 * be dropped so that VFs cannot send LLDP packets to reconfig DCB 2526 * settings in the HW. 2527 */ 2528 if (!ice_is_safe_mode(pf) && vsi->type == ICE_VSI_PF) { 2529 ice_fltr_add_eth(vsi, ETH_P_PAUSE, ICE_FLTR_TX, 2530 ICE_DROP_PACKET); 2531 ice_cfg_sw_lldp(vsi, true, true); 2532 } 2533 2534 if (!vsi->agg_node) 2535 ice_set_agg_vsi(vsi); 2536 2537 return vsi; 2538 2539 err_vsi_cfg: 2540 ice_vsi_free(vsi); 2541 2542 return NULL; 2543 } 2544 2545 /** 2546 * ice_vsi_release_msix - Clear the queue to Interrupt mapping in HW 2547 * @vsi: the VSI being cleaned up 2548 */ 2549 static void ice_vsi_release_msix(struct ice_vsi *vsi) 2550 { 2551 struct ice_pf *pf = vsi->back; 2552 struct ice_hw *hw = &pf->hw; 2553 u32 txq = 0; 2554 u32 rxq = 0; 2555 int i, q; 2556 2557 ice_for_each_q_vector(vsi, i) { 2558 struct ice_q_vector *q_vector = vsi->q_vectors[i]; 2559 2560 ice_write_intrl(q_vector, 0); 2561 for (q = 0; q < q_vector->num_ring_tx; q++) { 2562 ice_write_itr(&q_vector->tx, 0); 2563 wr32(hw, QINT_TQCTL(vsi->txq_map[txq]), 0); 2564 if (vsi->xdp_rings) { 2565 u32 xdp_txq = txq + vsi->num_xdp_txq; 2566 2567 wr32(hw, QINT_TQCTL(vsi->txq_map[xdp_txq]), 0); 2568 } 2569 txq++; 2570 } 2571 2572 for (q = 0; q < q_vector->num_ring_rx; q++) { 2573 ice_write_itr(&q_vector->rx, 0); 2574 wr32(hw, QINT_RQCTL(vsi->rxq_map[rxq]), 0); 2575 rxq++; 2576 } 2577 } 2578 2579 ice_flush(hw); 2580 } 2581 2582 /** 2583 * ice_vsi_free_irq - Free the IRQ association with the OS 2584 * @vsi: the VSI being configured 2585 */ 2586 void ice_vsi_free_irq(struct ice_vsi *vsi) 2587 { 2588 struct ice_pf *pf = vsi->back; 2589 int i; 2590 2591 if (!vsi->q_vectors || !vsi->irqs_ready) 2592 return; 2593 2594 ice_vsi_release_msix(vsi); 2595 if (vsi->type == ICE_VSI_VF) 2596 return; 2597 2598 vsi->irqs_ready = false; 2599 2600 ice_for_each_q_vector(vsi, i) { 2601 int irq_num; 2602 2603 irq_num = vsi->q_vectors[i]->irq.virq; 2604 2605 /* free only the irqs that were actually requested */ 2606 if (!vsi->q_vectors[i] || 2607 !(vsi->q_vectors[i]->num_ring_tx || 2608 vsi->q_vectors[i]->num_ring_rx)) 2609 continue; 2610 2611 synchronize_irq(irq_num); 2612 devm_free_irq(ice_pf_to_dev(pf), irq_num, vsi->q_vectors[i]); 2613 } 2614 } 2615 2616 /** 2617 * ice_vsi_free_tx_rings - Free Tx resources for VSI queues 2618 * @vsi: the VSI having resources freed 2619 */ 2620 void ice_vsi_free_tx_rings(struct ice_vsi *vsi) 2621 { 2622 int i; 2623 2624 if (!vsi->tx_rings) 2625 return; 2626 2627 ice_for_each_txq(vsi, i) 2628 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) 2629 ice_free_tx_ring(vsi->tx_rings[i]); 2630 } 2631 2632 /** 2633 * ice_vsi_free_rx_rings - Free Rx resources for VSI queues 2634 * @vsi: the VSI having resources freed 2635 */ 2636 void ice_vsi_free_rx_rings(struct ice_vsi *vsi) 2637 { 2638 int i; 2639 2640 if (!vsi->rx_rings) 2641 return; 2642 2643 ice_for_each_rxq(vsi, i) 2644 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc) 2645 ice_free_rx_ring(vsi->rx_rings[i]); 2646 } 2647 2648 /** 2649 * ice_vsi_close - Shut down a VSI 2650 * @vsi: the VSI being shut down 2651 */ 2652 void ice_vsi_close(struct ice_vsi *vsi) 2653 { 2654 if (!test_and_set_bit(ICE_VSI_DOWN, vsi->state)) 2655 ice_down(vsi); 2656 2657 ice_vsi_clear_napi_queues(vsi); 2658 ice_vsi_free_irq(vsi); 2659 ice_vsi_free_tx_rings(vsi); 2660 ice_vsi_free_rx_rings(vsi); 2661 } 2662 2663 /** 2664 * ice_ena_vsi - resume a VSI 2665 * @vsi: the VSI being resume 2666 * @locked: is the rtnl_lock already held 2667 */ 2668 int ice_ena_vsi(struct ice_vsi *vsi, bool locked) 2669 { 2670 int err = 0; 2671 2672 if (!test_bit(ICE_VSI_NEEDS_RESTART, vsi->state)) 2673 return 0; 2674 2675 clear_bit(ICE_VSI_NEEDS_RESTART, vsi->state); 2676 2677 if (vsi->netdev && (vsi->type == ICE_VSI_PF || 2678 vsi->type == ICE_VSI_SF)) { 2679 if (netif_running(vsi->netdev)) { 2680 if (!locked) 2681 rtnl_lock(); 2682 2683 err = ice_open_internal(vsi->netdev); 2684 2685 if (!locked) 2686 rtnl_unlock(); 2687 } 2688 } else if (vsi->type == ICE_VSI_CTRL) { 2689 err = ice_vsi_open_ctrl(vsi); 2690 } 2691 2692 return err; 2693 } 2694 2695 /** 2696 * ice_dis_vsi - pause a VSI 2697 * @vsi: the VSI being paused 2698 * @locked: is the rtnl_lock already held 2699 */ 2700 void ice_dis_vsi(struct ice_vsi *vsi, bool locked) 2701 { 2702 bool already_down = test_bit(ICE_VSI_DOWN, vsi->state); 2703 2704 set_bit(ICE_VSI_NEEDS_RESTART, vsi->state); 2705 2706 if (vsi->netdev && (vsi->type == ICE_VSI_PF || 2707 vsi->type == ICE_VSI_SF)) { 2708 if (netif_running(vsi->netdev)) { 2709 if (!locked) 2710 rtnl_lock(); 2711 already_down = test_bit(ICE_VSI_DOWN, vsi->state); 2712 if (!already_down) 2713 ice_vsi_close(vsi); 2714 2715 if (!locked) 2716 rtnl_unlock(); 2717 } else if (!already_down) { 2718 ice_vsi_close(vsi); 2719 } 2720 } else if (vsi->type == ICE_VSI_CTRL && !already_down) { 2721 ice_vsi_close(vsi); 2722 } 2723 } 2724 2725 /** 2726 * ice_vsi_set_napi_queues - associate netdev queues with napi 2727 * @vsi: VSI pointer 2728 * 2729 * Associate queue[s] with napi for all vectors. 2730 * The caller must hold rtnl_lock. 2731 */ 2732 void ice_vsi_set_napi_queues(struct ice_vsi *vsi) 2733 { 2734 struct net_device *netdev = vsi->netdev; 2735 int q_idx, v_idx; 2736 2737 if (!netdev) 2738 return; 2739 2740 ice_for_each_rxq(vsi, q_idx) 2741 netif_queue_set_napi(netdev, q_idx, NETDEV_QUEUE_TYPE_RX, 2742 &vsi->rx_rings[q_idx]->q_vector->napi); 2743 2744 ice_for_each_txq(vsi, q_idx) 2745 netif_queue_set_napi(netdev, q_idx, NETDEV_QUEUE_TYPE_TX, 2746 &vsi->tx_rings[q_idx]->q_vector->napi); 2747 /* Also set the interrupt number for the NAPI */ 2748 ice_for_each_q_vector(vsi, v_idx) { 2749 struct ice_q_vector *q_vector = vsi->q_vectors[v_idx]; 2750 2751 netif_napi_set_irq(&q_vector->napi, q_vector->irq.virq); 2752 } 2753 } 2754 2755 /** 2756 * ice_vsi_clear_napi_queues - dissociate netdev queues from napi 2757 * @vsi: VSI pointer 2758 * 2759 * Clear the association between all VSI queues queue[s] and napi. 2760 * The caller must hold rtnl_lock. 2761 */ 2762 void ice_vsi_clear_napi_queues(struct ice_vsi *vsi) 2763 { 2764 struct net_device *netdev = vsi->netdev; 2765 int q_idx, v_idx; 2766 2767 if (!netdev) 2768 return; 2769 2770 /* Clear the NAPI's interrupt number */ 2771 ice_for_each_q_vector(vsi, v_idx) { 2772 struct ice_q_vector *q_vector = vsi->q_vectors[v_idx]; 2773 2774 netif_napi_set_irq(&q_vector->napi, -1); 2775 } 2776 2777 ice_for_each_txq(vsi, q_idx) 2778 netif_queue_set_napi(netdev, q_idx, NETDEV_QUEUE_TYPE_TX, NULL); 2779 2780 ice_for_each_rxq(vsi, q_idx) 2781 netif_queue_set_napi(netdev, q_idx, NETDEV_QUEUE_TYPE_RX, NULL); 2782 } 2783 2784 /** 2785 * ice_napi_add - register NAPI handler for the VSI 2786 * @vsi: VSI for which NAPI handler is to be registered 2787 * 2788 * This function is only called in the driver's load path. Registering the NAPI 2789 * handler is done in ice_vsi_alloc_q_vector() for all other cases (i.e. resume, 2790 * reset/rebuild, etc.) 2791 */ 2792 void ice_napi_add(struct ice_vsi *vsi) 2793 { 2794 int v_idx; 2795 2796 if (!vsi->netdev) 2797 return; 2798 2799 ice_for_each_q_vector(vsi, v_idx) 2800 netif_napi_add_config(vsi->netdev, 2801 &vsi->q_vectors[v_idx]->napi, 2802 ice_napi_poll, 2803 v_idx); 2804 } 2805 2806 /** 2807 * ice_vsi_release - Delete a VSI and free its resources 2808 * @vsi: the VSI being removed 2809 * 2810 * Returns 0 on success or < 0 on error 2811 */ 2812 int ice_vsi_release(struct ice_vsi *vsi) 2813 { 2814 struct ice_pf *pf; 2815 2816 if (!vsi->back) 2817 return -ENODEV; 2818 pf = vsi->back; 2819 2820 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) 2821 ice_rss_clean(vsi); 2822 2823 ice_vsi_close(vsi); 2824 2825 /* The Rx rule will only exist to remove if the LLDP FW 2826 * engine is currently stopped 2827 */ 2828 if (!ice_is_safe_mode(pf) && vsi->type == ICE_VSI_PF && 2829 !test_bit(ICE_FLAG_FW_LLDP_AGENT, pf->flags)) 2830 ice_cfg_sw_lldp(vsi, false, false); 2831 2832 ice_vsi_decfg(vsi); 2833 2834 /* retain SW VSI data structure since it is needed to unregister and 2835 * free VSI netdev when PF is not in reset recovery pending state,\ 2836 * for ex: during rmmod. 2837 */ 2838 if (!ice_is_reset_in_progress(pf->state)) 2839 ice_vsi_delete(vsi); 2840 2841 return 0; 2842 } 2843 2844 /** 2845 * ice_vsi_rebuild_get_coalesce - get coalesce from all q_vectors 2846 * @vsi: VSI connected with q_vectors 2847 * @coalesce: array of struct with stored coalesce 2848 * 2849 * Returns array size. 2850 */ 2851 static int 2852 ice_vsi_rebuild_get_coalesce(struct ice_vsi *vsi, 2853 struct ice_coalesce_stored *coalesce) 2854 { 2855 int i; 2856 2857 ice_for_each_q_vector(vsi, i) { 2858 struct ice_q_vector *q_vector = vsi->q_vectors[i]; 2859 2860 coalesce[i].itr_tx = q_vector->tx.itr_settings; 2861 coalesce[i].itr_rx = q_vector->rx.itr_settings; 2862 coalesce[i].intrl = q_vector->intrl; 2863 2864 if (i < vsi->num_txq) 2865 coalesce[i].tx_valid = true; 2866 if (i < vsi->num_rxq) 2867 coalesce[i].rx_valid = true; 2868 } 2869 2870 return vsi->num_q_vectors; 2871 } 2872 2873 /** 2874 * ice_vsi_rebuild_set_coalesce - set coalesce from earlier saved arrays 2875 * @vsi: VSI connected with q_vectors 2876 * @coalesce: pointer to array of struct with stored coalesce 2877 * @size: size of coalesce array 2878 * 2879 * Before this function, ice_vsi_rebuild_get_coalesce should be called to save 2880 * ITR params in arrays. If size is 0 or coalesce wasn't stored set coalesce 2881 * to default value. 2882 */ 2883 static void 2884 ice_vsi_rebuild_set_coalesce(struct ice_vsi *vsi, 2885 struct ice_coalesce_stored *coalesce, int size) 2886 { 2887 struct ice_ring_container *rc; 2888 int i; 2889 2890 if ((size && !coalesce) || !vsi) 2891 return; 2892 2893 /* There are a couple of cases that have to be handled here: 2894 * 1. The case where the number of queue vectors stays the same, but 2895 * the number of Tx or Rx rings changes (the first for loop) 2896 * 2. The case where the number of queue vectors increased (the 2897 * second for loop) 2898 */ 2899 for (i = 0; i < size && i < vsi->num_q_vectors; i++) { 2900 /* There are 2 cases to handle here and they are the same for 2901 * both Tx and Rx: 2902 * if the entry was valid previously (coalesce[i].[tr]x_valid 2903 * and the loop variable is less than the number of rings 2904 * allocated, then write the previous values 2905 * 2906 * if the entry was not valid previously, but the number of 2907 * rings is less than are allocated (this means the number of 2908 * rings increased from previously), then write out the 2909 * values in the first element 2910 * 2911 * Also, always write the ITR, even if in ITR_IS_DYNAMIC 2912 * as there is no harm because the dynamic algorithm 2913 * will just overwrite. 2914 */ 2915 if (i < vsi->alloc_rxq && coalesce[i].rx_valid) { 2916 rc = &vsi->q_vectors[i]->rx; 2917 rc->itr_settings = coalesce[i].itr_rx; 2918 ice_write_itr(rc, rc->itr_setting); 2919 } else if (i < vsi->alloc_rxq) { 2920 rc = &vsi->q_vectors[i]->rx; 2921 rc->itr_settings = coalesce[0].itr_rx; 2922 ice_write_itr(rc, rc->itr_setting); 2923 } 2924 2925 if (i < vsi->alloc_txq && coalesce[i].tx_valid) { 2926 rc = &vsi->q_vectors[i]->tx; 2927 rc->itr_settings = coalesce[i].itr_tx; 2928 ice_write_itr(rc, rc->itr_setting); 2929 } else if (i < vsi->alloc_txq) { 2930 rc = &vsi->q_vectors[i]->tx; 2931 rc->itr_settings = coalesce[0].itr_tx; 2932 ice_write_itr(rc, rc->itr_setting); 2933 } 2934 2935 vsi->q_vectors[i]->intrl = coalesce[i].intrl; 2936 ice_set_q_vector_intrl(vsi->q_vectors[i]); 2937 } 2938 2939 /* the number of queue vectors increased so write whatever is in 2940 * the first element 2941 */ 2942 for (; i < vsi->num_q_vectors; i++) { 2943 /* transmit */ 2944 rc = &vsi->q_vectors[i]->tx; 2945 rc->itr_settings = coalesce[0].itr_tx; 2946 ice_write_itr(rc, rc->itr_setting); 2947 2948 /* receive */ 2949 rc = &vsi->q_vectors[i]->rx; 2950 rc->itr_settings = coalesce[0].itr_rx; 2951 ice_write_itr(rc, rc->itr_setting); 2952 2953 vsi->q_vectors[i]->intrl = coalesce[0].intrl; 2954 ice_set_q_vector_intrl(vsi->q_vectors[i]); 2955 } 2956 } 2957 2958 /** 2959 * ice_vsi_realloc_stat_arrays - Frees unused stat structures or alloc new ones 2960 * @vsi: VSI pointer 2961 */ 2962 static int 2963 ice_vsi_realloc_stat_arrays(struct ice_vsi *vsi) 2964 { 2965 u16 req_txq = vsi->req_txq ? vsi->req_txq : vsi->alloc_txq; 2966 u16 req_rxq = vsi->req_rxq ? vsi->req_rxq : vsi->alloc_rxq; 2967 struct ice_ring_stats **tx_ring_stats; 2968 struct ice_ring_stats **rx_ring_stats; 2969 struct ice_vsi_stats *vsi_stat; 2970 struct ice_pf *pf = vsi->back; 2971 u16 prev_txq = vsi->alloc_txq; 2972 u16 prev_rxq = vsi->alloc_rxq; 2973 int i; 2974 2975 vsi_stat = pf->vsi_stats[vsi->idx]; 2976 2977 if (req_txq < prev_txq) { 2978 for (i = req_txq; i < prev_txq; i++) { 2979 if (vsi_stat->tx_ring_stats[i]) { 2980 kfree_rcu(vsi_stat->tx_ring_stats[i], rcu); 2981 WRITE_ONCE(vsi_stat->tx_ring_stats[i], NULL); 2982 } 2983 } 2984 } 2985 2986 tx_ring_stats = vsi_stat->tx_ring_stats; 2987 vsi_stat->tx_ring_stats = 2988 krealloc_array(vsi_stat->tx_ring_stats, req_txq, 2989 sizeof(*vsi_stat->tx_ring_stats), 2990 GFP_KERNEL | __GFP_ZERO); 2991 if (!vsi_stat->tx_ring_stats) { 2992 vsi_stat->tx_ring_stats = tx_ring_stats; 2993 return -ENOMEM; 2994 } 2995 2996 if (req_rxq < prev_rxq) { 2997 for (i = req_rxq; i < prev_rxq; i++) { 2998 if (vsi_stat->rx_ring_stats[i]) { 2999 kfree_rcu(vsi_stat->rx_ring_stats[i], rcu); 3000 WRITE_ONCE(vsi_stat->rx_ring_stats[i], NULL); 3001 } 3002 } 3003 } 3004 3005 rx_ring_stats = vsi_stat->rx_ring_stats; 3006 vsi_stat->rx_ring_stats = 3007 krealloc_array(vsi_stat->rx_ring_stats, req_rxq, 3008 sizeof(*vsi_stat->rx_ring_stats), 3009 GFP_KERNEL | __GFP_ZERO); 3010 if (!vsi_stat->rx_ring_stats) { 3011 vsi_stat->rx_ring_stats = rx_ring_stats; 3012 return -ENOMEM; 3013 } 3014 3015 return 0; 3016 } 3017 3018 /** 3019 * ice_vsi_rebuild - Rebuild VSI after reset 3020 * @vsi: VSI to be rebuild 3021 * @vsi_flags: flags used for VSI rebuild flow 3022 * 3023 * Set vsi_flags to ICE_VSI_FLAG_INIT to initialize a new VSI, or 3024 * ICE_VSI_FLAG_NO_INIT to rebuild an existing VSI in hardware. 3025 * 3026 * Returns 0 on success and negative value on failure 3027 */ 3028 int ice_vsi_rebuild(struct ice_vsi *vsi, u32 vsi_flags) 3029 { 3030 struct ice_coalesce_stored *coalesce; 3031 int prev_num_q_vectors; 3032 struct ice_pf *pf; 3033 int ret; 3034 3035 if (!vsi) 3036 return -EINVAL; 3037 3038 vsi->flags = vsi_flags; 3039 pf = vsi->back; 3040 if (WARN_ON(vsi->type == ICE_VSI_VF && !vsi->vf)) 3041 return -EINVAL; 3042 3043 mutex_lock(&vsi->xdp_state_lock); 3044 3045 ret = ice_vsi_realloc_stat_arrays(vsi); 3046 if (ret) 3047 goto unlock; 3048 3049 ice_vsi_decfg(vsi); 3050 ret = ice_vsi_cfg_def(vsi); 3051 if (ret) 3052 goto unlock; 3053 3054 coalesce = kcalloc(vsi->num_q_vectors, 3055 sizeof(struct ice_coalesce_stored), GFP_KERNEL); 3056 if (!coalesce) { 3057 ret = -ENOMEM; 3058 goto decfg; 3059 } 3060 3061 prev_num_q_vectors = ice_vsi_rebuild_get_coalesce(vsi, coalesce); 3062 3063 ret = ice_vsi_cfg_tc_lan(pf, vsi); 3064 if (ret) { 3065 if (vsi_flags & ICE_VSI_FLAG_INIT) { 3066 ret = -EIO; 3067 goto free_coalesce; 3068 } 3069 3070 ret = ice_schedule_reset(pf, ICE_RESET_PFR); 3071 goto free_coalesce; 3072 } 3073 3074 ice_vsi_rebuild_set_coalesce(vsi, coalesce, prev_num_q_vectors); 3075 clear_bit(ICE_VSI_REBUILD_PENDING, vsi->state); 3076 3077 free_coalesce: 3078 kfree(coalesce); 3079 decfg: 3080 if (ret) 3081 ice_vsi_decfg(vsi); 3082 unlock: 3083 mutex_unlock(&vsi->xdp_state_lock); 3084 return ret; 3085 } 3086 3087 /** 3088 * ice_is_reset_in_progress - check for a reset in progress 3089 * @state: PF state field 3090 */ 3091 bool ice_is_reset_in_progress(unsigned long *state) 3092 { 3093 return test_bit(ICE_RESET_OICR_RECV, state) || 3094 test_bit(ICE_PFR_REQ, state) || 3095 test_bit(ICE_CORER_REQ, state) || 3096 test_bit(ICE_GLOBR_REQ, state); 3097 } 3098 3099 /** 3100 * ice_wait_for_reset - Wait for driver to finish reset and rebuild 3101 * @pf: pointer to the PF structure 3102 * @timeout: length of time to wait, in jiffies 3103 * 3104 * Wait (sleep) for a short time until the driver finishes cleaning up from 3105 * a device reset. The caller must be able to sleep. Use this to delay 3106 * operations that could fail while the driver is cleaning up after a device 3107 * reset. 3108 * 3109 * Returns 0 on success, -EBUSY if the reset is not finished within the 3110 * timeout, and -ERESTARTSYS if the thread was interrupted. 3111 */ 3112 int ice_wait_for_reset(struct ice_pf *pf, unsigned long timeout) 3113 { 3114 long ret; 3115 3116 ret = wait_event_interruptible_timeout(pf->reset_wait_queue, 3117 !ice_is_reset_in_progress(pf->state), 3118 timeout); 3119 if (ret < 0) 3120 return ret; 3121 else if (!ret) 3122 return -EBUSY; 3123 else 3124 return 0; 3125 } 3126 3127 /** 3128 * ice_vsi_update_q_map - update our copy of the VSI info with new queue map 3129 * @vsi: VSI being configured 3130 * @ctx: the context buffer returned from AQ VSI update command 3131 */ 3132 static void ice_vsi_update_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctx) 3133 { 3134 vsi->info.mapping_flags = ctx->info.mapping_flags; 3135 memcpy(&vsi->info.q_mapping, &ctx->info.q_mapping, 3136 sizeof(vsi->info.q_mapping)); 3137 memcpy(&vsi->info.tc_mapping, ctx->info.tc_mapping, 3138 sizeof(vsi->info.tc_mapping)); 3139 } 3140 3141 /** 3142 * ice_vsi_cfg_netdev_tc - Setup the netdev TC configuration 3143 * @vsi: the VSI being configured 3144 * @ena_tc: TC map to be enabled 3145 */ 3146 void ice_vsi_cfg_netdev_tc(struct ice_vsi *vsi, u8 ena_tc) 3147 { 3148 struct net_device *netdev = vsi->netdev; 3149 struct ice_pf *pf = vsi->back; 3150 int numtc = vsi->tc_cfg.numtc; 3151 struct ice_dcbx_cfg *dcbcfg; 3152 u8 netdev_tc; 3153 int i; 3154 3155 if (!netdev) 3156 return; 3157 3158 /* CHNL VSI doesn't have it's own netdev, hence, no netdev_tc */ 3159 if (vsi->type == ICE_VSI_CHNL) 3160 return; 3161 3162 if (!ena_tc) { 3163 netdev_reset_tc(netdev); 3164 return; 3165 } 3166 3167 if (vsi->type == ICE_VSI_PF && ice_is_adq_active(pf)) 3168 numtc = vsi->all_numtc; 3169 3170 if (netdev_set_num_tc(netdev, numtc)) 3171 return; 3172 3173 dcbcfg = &pf->hw.port_info->qos_cfg.local_dcbx_cfg; 3174 3175 ice_for_each_traffic_class(i) 3176 if (vsi->tc_cfg.ena_tc & BIT(i)) 3177 netdev_set_tc_queue(netdev, 3178 vsi->tc_cfg.tc_info[i].netdev_tc, 3179 vsi->tc_cfg.tc_info[i].qcount_tx, 3180 vsi->tc_cfg.tc_info[i].qoffset); 3181 /* setup TC queue map for CHNL TCs */ 3182 ice_for_each_chnl_tc(i) { 3183 if (!(vsi->all_enatc & BIT(i))) 3184 break; 3185 if (!vsi->mqprio_qopt.qopt.count[i]) 3186 break; 3187 netdev_set_tc_queue(netdev, i, 3188 vsi->mqprio_qopt.qopt.count[i], 3189 vsi->mqprio_qopt.qopt.offset[i]); 3190 } 3191 3192 if (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) 3193 return; 3194 3195 for (i = 0; i < ICE_MAX_USER_PRIORITY; i++) { 3196 u8 ets_tc = dcbcfg->etscfg.prio_table[i]; 3197 3198 /* Get the mapped netdev TC# for the UP */ 3199 netdev_tc = vsi->tc_cfg.tc_info[ets_tc].netdev_tc; 3200 netdev_set_prio_tc_map(netdev, i, netdev_tc); 3201 } 3202 } 3203 3204 /** 3205 * ice_vsi_setup_q_map_mqprio - Prepares mqprio based tc_config 3206 * @vsi: the VSI being configured, 3207 * @ctxt: VSI context structure 3208 * @ena_tc: number of traffic classes to enable 3209 * 3210 * Prepares VSI tc_config to have queue configurations based on MQPRIO options. 3211 */ 3212 static int 3213 ice_vsi_setup_q_map_mqprio(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt, 3214 u8 ena_tc) 3215 { 3216 u16 pow, offset = 0, qcount_tx = 0, qcount_rx = 0, qmap; 3217 u16 tc0_offset = vsi->mqprio_qopt.qopt.offset[0]; 3218 int tc0_qcount = vsi->mqprio_qopt.qopt.count[0]; 3219 u16 new_txq, new_rxq; 3220 u8 netdev_tc = 0; 3221 int i; 3222 3223 vsi->tc_cfg.ena_tc = ena_tc ? ena_tc : 1; 3224 3225 pow = order_base_2(tc0_qcount); 3226 qmap = FIELD_PREP(ICE_AQ_VSI_TC_Q_OFFSET_M, tc0_offset); 3227 qmap |= FIELD_PREP(ICE_AQ_VSI_TC_Q_NUM_M, pow); 3228 3229 ice_for_each_traffic_class(i) { 3230 if (!(vsi->tc_cfg.ena_tc & BIT(i))) { 3231 /* TC is not enabled */ 3232 vsi->tc_cfg.tc_info[i].qoffset = 0; 3233 vsi->tc_cfg.tc_info[i].qcount_rx = 1; 3234 vsi->tc_cfg.tc_info[i].qcount_tx = 1; 3235 vsi->tc_cfg.tc_info[i].netdev_tc = 0; 3236 ctxt->info.tc_mapping[i] = 0; 3237 continue; 3238 } 3239 3240 offset = vsi->mqprio_qopt.qopt.offset[i]; 3241 qcount_rx = vsi->mqprio_qopt.qopt.count[i]; 3242 qcount_tx = vsi->mqprio_qopt.qopt.count[i]; 3243 vsi->tc_cfg.tc_info[i].qoffset = offset; 3244 vsi->tc_cfg.tc_info[i].qcount_rx = qcount_rx; 3245 vsi->tc_cfg.tc_info[i].qcount_tx = qcount_tx; 3246 vsi->tc_cfg.tc_info[i].netdev_tc = netdev_tc++; 3247 } 3248 3249 if (vsi->all_numtc && vsi->all_numtc != vsi->tc_cfg.numtc) { 3250 ice_for_each_chnl_tc(i) { 3251 if (!(vsi->all_enatc & BIT(i))) 3252 continue; 3253 offset = vsi->mqprio_qopt.qopt.offset[i]; 3254 qcount_rx = vsi->mqprio_qopt.qopt.count[i]; 3255 qcount_tx = vsi->mqprio_qopt.qopt.count[i]; 3256 } 3257 } 3258 3259 new_txq = offset + qcount_tx; 3260 if (new_txq > vsi->alloc_txq) { 3261 dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Tx queues (%u), than were allocated (%u)!\n", 3262 new_txq, vsi->alloc_txq); 3263 return -EINVAL; 3264 } 3265 3266 new_rxq = offset + qcount_rx; 3267 if (new_rxq > vsi->alloc_rxq) { 3268 dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Rx queues (%u), than were allocated (%u)!\n", 3269 new_rxq, vsi->alloc_rxq); 3270 return -EINVAL; 3271 } 3272 3273 /* Set actual Tx/Rx queue pairs */ 3274 vsi->num_txq = new_txq; 3275 vsi->num_rxq = new_rxq; 3276 3277 /* Setup queue TC[0].qmap for given VSI context */ 3278 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap); 3279 ctxt->info.q_mapping[0] = cpu_to_le16(vsi->rxq_map[0]); 3280 ctxt->info.q_mapping[1] = cpu_to_le16(tc0_qcount); 3281 3282 /* Find queue count available for channel VSIs and starting offset 3283 * for channel VSIs 3284 */ 3285 if (tc0_qcount && tc0_qcount < vsi->num_rxq) { 3286 vsi->cnt_q_avail = vsi->num_rxq - tc0_qcount; 3287 vsi->next_base_q = tc0_qcount; 3288 } 3289 dev_dbg(ice_pf_to_dev(vsi->back), "vsi->num_txq = %d\n", vsi->num_txq); 3290 dev_dbg(ice_pf_to_dev(vsi->back), "vsi->num_rxq = %d\n", vsi->num_rxq); 3291 dev_dbg(ice_pf_to_dev(vsi->back), "all_numtc %u, all_enatc: 0x%04x, tc_cfg.numtc %u\n", 3292 vsi->all_numtc, vsi->all_enatc, vsi->tc_cfg.numtc); 3293 3294 return 0; 3295 } 3296 3297 /** 3298 * ice_vsi_cfg_tc - Configure VSI Tx Sched for given TC map 3299 * @vsi: VSI to be configured 3300 * @ena_tc: TC bitmap 3301 * 3302 * VSI queues expected to be quiesced before calling this function 3303 */ 3304 int ice_vsi_cfg_tc(struct ice_vsi *vsi, u8 ena_tc) 3305 { 3306 u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 }; 3307 struct ice_pf *pf = vsi->back; 3308 struct ice_tc_cfg old_tc_cfg; 3309 struct ice_vsi_ctx *ctx; 3310 struct device *dev; 3311 int i, ret = 0; 3312 u8 num_tc = 0; 3313 3314 dev = ice_pf_to_dev(pf); 3315 if (vsi->tc_cfg.ena_tc == ena_tc && 3316 vsi->mqprio_qopt.mode != TC_MQPRIO_MODE_CHANNEL) 3317 return 0; 3318 3319 ice_for_each_traffic_class(i) { 3320 /* build bitmap of enabled TCs */ 3321 if (ena_tc & BIT(i)) 3322 num_tc++; 3323 /* populate max_txqs per TC */ 3324 max_txqs[i] = vsi->alloc_txq; 3325 /* Update max_txqs if it is CHNL VSI, because alloc_t[r]xq are 3326 * zero for CHNL VSI, hence use num_txq instead as max_txqs 3327 */ 3328 if (vsi->type == ICE_VSI_CHNL && 3329 test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) 3330 max_txqs[i] = vsi->num_txq; 3331 } 3332 3333 memcpy(&old_tc_cfg, &vsi->tc_cfg, sizeof(old_tc_cfg)); 3334 vsi->tc_cfg.ena_tc = ena_tc; 3335 vsi->tc_cfg.numtc = num_tc; 3336 3337 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); 3338 if (!ctx) 3339 return -ENOMEM; 3340 3341 ctx->vf_num = 0; 3342 ctx->info = vsi->info; 3343 3344 if (vsi->type == ICE_VSI_PF && 3345 test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) 3346 ret = ice_vsi_setup_q_map_mqprio(vsi, ctx, ena_tc); 3347 else 3348 ret = ice_vsi_setup_q_map(vsi, ctx); 3349 3350 if (ret) { 3351 memcpy(&vsi->tc_cfg, &old_tc_cfg, sizeof(vsi->tc_cfg)); 3352 goto out; 3353 } 3354 3355 /* must to indicate which section of VSI context are being modified */ 3356 ctx->info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_RXQ_MAP_VALID); 3357 ret = ice_update_vsi(&pf->hw, vsi->idx, ctx, NULL); 3358 if (ret) { 3359 dev_info(dev, "Failed VSI Update\n"); 3360 goto out; 3361 } 3362 3363 if (vsi->type == ICE_VSI_PF && 3364 test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) 3365 ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, 1, max_txqs); 3366 else 3367 ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, 3368 vsi->tc_cfg.ena_tc, max_txqs); 3369 3370 if (ret) { 3371 dev_err(dev, "VSI %d failed TC config, error %d\n", 3372 vsi->vsi_num, ret); 3373 goto out; 3374 } 3375 ice_vsi_update_q_map(vsi, ctx); 3376 vsi->info.valid_sections = 0; 3377 3378 ice_vsi_cfg_netdev_tc(vsi, ena_tc); 3379 out: 3380 kfree(ctx); 3381 return ret; 3382 } 3383 3384 /** 3385 * ice_update_ring_stats - Update ring statistics 3386 * @stats: stats to be updated 3387 * @pkts: number of processed packets 3388 * @bytes: number of processed bytes 3389 * 3390 * This function assumes that caller has acquired a u64_stats_sync lock. 3391 */ 3392 static void ice_update_ring_stats(struct ice_q_stats *stats, u64 pkts, u64 bytes) 3393 { 3394 stats->bytes += bytes; 3395 stats->pkts += pkts; 3396 } 3397 3398 /** 3399 * ice_update_tx_ring_stats - Update Tx ring specific counters 3400 * @tx_ring: ring to update 3401 * @pkts: number of processed packets 3402 * @bytes: number of processed bytes 3403 */ 3404 void ice_update_tx_ring_stats(struct ice_tx_ring *tx_ring, u64 pkts, u64 bytes) 3405 { 3406 u64_stats_update_begin(&tx_ring->ring_stats->syncp); 3407 ice_update_ring_stats(&tx_ring->ring_stats->stats, pkts, bytes); 3408 u64_stats_update_end(&tx_ring->ring_stats->syncp); 3409 } 3410 3411 /** 3412 * ice_update_rx_ring_stats - Update Rx ring specific counters 3413 * @rx_ring: ring to update 3414 * @pkts: number of processed packets 3415 * @bytes: number of processed bytes 3416 */ 3417 void ice_update_rx_ring_stats(struct ice_rx_ring *rx_ring, u64 pkts, u64 bytes) 3418 { 3419 u64_stats_update_begin(&rx_ring->ring_stats->syncp); 3420 ice_update_ring_stats(&rx_ring->ring_stats->stats, pkts, bytes); 3421 u64_stats_update_end(&rx_ring->ring_stats->syncp); 3422 } 3423 3424 /** 3425 * ice_is_dflt_vsi_in_use - check if the default forwarding VSI is being used 3426 * @pi: port info of the switch with default VSI 3427 * 3428 * Return true if the there is a single VSI in default forwarding VSI list 3429 */ 3430 bool ice_is_dflt_vsi_in_use(struct ice_port_info *pi) 3431 { 3432 bool exists = false; 3433 3434 ice_check_if_dflt_vsi(pi, 0, &exists); 3435 return exists; 3436 } 3437 3438 /** 3439 * ice_is_vsi_dflt_vsi - check if the VSI passed in is the default VSI 3440 * @vsi: VSI to compare against default forwarding VSI 3441 * 3442 * If this VSI passed in is the default forwarding VSI then return true, else 3443 * return false 3444 */ 3445 bool ice_is_vsi_dflt_vsi(struct ice_vsi *vsi) 3446 { 3447 return ice_check_if_dflt_vsi(vsi->port_info, vsi->idx, NULL); 3448 } 3449 3450 /** 3451 * ice_set_dflt_vsi - set the default forwarding VSI 3452 * @vsi: VSI getting set as the default forwarding VSI on the switch 3453 * 3454 * If the VSI passed in is already the default VSI and it's enabled just return 3455 * success. 3456 * 3457 * Otherwise try to set the VSI passed in as the switch's default VSI and 3458 * return the result. 3459 */ 3460 int ice_set_dflt_vsi(struct ice_vsi *vsi) 3461 { 3462 struct device *dev; 3463 int status; 3464 3465 if (!vsi) 3466 return -EINVAL; 3467 3468 dev = ice_pf_to_dev(vsi->back); 3469 3470 if (ice_lag_is_switchdev_running(vsi->back)) { 3471 dev_dbg(dev, "VSI %d passed is a part of LAG containing interfaces in switchdev mode, nothing to do\n", 3472 vsi->vsi_num); 3473 return 0; 3474 } 3475 3476 /* the VSI passed in is already the default VSI */ 3477 if (ice_is_vsi_dflt_vsi(vsi)) { 3478 dev_dbg(dev, "VSI %d passed in is already the default forwarding VSI, nothing to do\n", 3479 vsi->vsi_num); 3480 return 0; 3481 } 3482 3483 status = ice_cfg_dflt_vsi(vsi->port_info, vsi->idx, true, ICE_FLTR_RX); 3484 if (status) { 3485 dev_err(dev, "Failed to set VSI %d as the default forwarding VSI, error %d\n", 3486 vsi->vsi_num, status); 3487 return status; 3488 } 3489 3490 return 0; 3491 } 3492 3493 /** 3494 * ice_clear_dflt_vsi - clear the default forwarding VSI 3495 * @vsi: VSI to remove from filter list 3496 * 3497 * If the switch has no default VSI or it's not enabled then return error. 3498 * 3499 * Otherwise try to clear the default VSI and return the result. 3500 */ 3501 int ice_clear_dflt_vsi(struct ice_vsi *vsi) 3502 { 3503 struct device *dev; 3504 int status; 3505 3506 if (!vsi) 3507 return -EINVAL; 3508 3509 dev = ice_pf_to_dev(vsi->back); 3510 3511 /* there is no default VSI configured */ 3512 if (!ice_is_dflt_vsi_in_use(vsi->port_info)) 3513 return -ENODEV; 3514 3515 status = ice_cfg_dflt_vsi(vsi->port_info, vsi->idx, false, 3516 ICE_FLTR_RX); 3517 if (status) { 3518 dev_err(dev, "Failed to clear the default forwarding VSI %d, error %d\n", 3519 vsi->vsi_num, status); 3520 return -EIO; 3521 } 3522 3523 return 0; 3524 } 3525 3526 /** 3527 * ice_get_link_speed_mbps - get link speed in Mbps 3528 * @vsi: the VSI whose link speed is being queried 3529 * 3530 * Return current VSI link speed and 0 if the speed is unknown. 3531 */ 3532 int ice_get_link_speed_mbps(struct ice_vsi *vsi) 3533 { 3534 unsigned int link_speed; 3535 3536 link_speed = vsi->port_info->phy.link_info.link_speed; 3537 3538 return (int)ice_get_link_speed(fls(link_speed) - 1); 3539 } 3540 3541 /** 3542 * ice_get_link_speed_kbps - get link speed in Kbps 3543 * @vsi: the VSI whose link speed is being queried 3544 * 3545 * Return current VSI link speed and 0 if the speed is unknown. 3546 */ 3547 int ice_get_link_speed_kbps(struct ice_vsi *vsi) 3548 { 3549 int speed_mbps; 3550 3551 speed_mbps = ice_get_link_speed_mbps(vsi); 3552 3553 return speed_mbps * 1000; 3554 } 3555 3556 /** 3557 * ice_set_min_bw_limit - setup minimum BW limit for Tx based on min_tx_rate 3558 * @vsi: VSI to be configured 3559 * @min_tx_rate: min Tx rate in Kbps to be configured as BW limit 3560 * 3561 * If the min_tx_rate is specified as 0 that means to clear the minimum BW limit 3562 * profile, otherwise a non-zero value will force a minimum BW limit for the VSI 3563 * on TC 0. 3564 */ 3565 int ice_set_min_bw_limit(struct ice_vsi *vsi, u64 min_tx_rate) 3566 { 3567 struct ice_pf *pf = vsi->back; 3568 struct device *dev; 3569 int status; 3570 int speed; 3571 3572 dev = ice_pf_to_dev(pf); 3573 if (!vsi->port_info) { 3574 dev_dbg(dev, "VSI %d, type %u specified doesn't have valid port_info\n", 3575 vsi->idx, vsi->type); 3576 return -EINVAL; 3577 } 3578 3579 speed = ice_get_link_speed_kbps(vsi); 3580 if (min_tx_rate > (u64)speed) { 3581 dev_err(dev, "invalid min Tx rate %llu Kbps specified for %s %d is greater than current link speed %u Kbps\n", 3582 min_tx_rate, ice_vsi_type_str(vsi->type), vsi->idx, 3583 speed); 3584 return -EINVAL; 3585 } 3586 3587 /* Configure min BW for VSI limit */ 3588 if (min_tx_rate) { 3589 status = ice_cfg_vsi_bw_lmt_per_tc(vsi->port_info, vsi->idx, 0, 3590 ICE_MIN_BW, min_tx_rate); 3591 if (status) { 3592 dev_err(dev, "failed to set min Tx rate(%llu Kbps) for %s %d\n", 3593 min_tx_rate, ice_vsi_type_str(vsi->type), 3594 vsi->idx); 3595 return status; 3596 } 3597 3598 dev_dbg(dev, "set min Tx rate(%llu Kbps) for %s\n", 3599 min_tx_rate, ice_vsi_type_str(vsi->type)); 3600 } else { 3601 status = ice_cfg_vsi_bw_dflt_lmt_per_tc(vsi->port_info, 3602 vsi->idx, 0, 3603 ICE_MIN_BW); 3604 if (status) { 3605 dev_err(dev, "failed to clear min Tx rate configuration for %s %d\n", 3606 ice_vsi_type_str(vsi->type), vsi->idx); 3607 return status; 3608 } 3609 3610 dev_dbg(dev, "cleared min Tx rate configuration for %s %d\n", 3611 ice_vsi_type_str(vsi->type), vsi->idx); 3612 } 3613 3614 return 0; 3615 } 3616 3617 /** 3618 * ice_set_max_bw_limit - setup maximum BW limit for Tx based on max_tx_rate 3619 * @vsi: VSI to be configured 3620 * @max_tx_rate: max Tx rate in Kbps to be configured as BW limit 3621 * 3622 * If the max_tx_rate is specified as 0 that means to clear the maximum BW limit 3623 * profile, otherwise a non-zero value will force a maximum BW limit for the VSI 3624 * on TC 0. 3625 */ 3626 int ice_set_max_bw_limit(struct ice_vsi *vsi, u64 max_tx_rate) 3627 { 3628 struct ice_pf *pf = vsi->back; 3629 struct device *dev; 3630 int status; 3631 int speed; 3632 3633 dev = ice_pf_to_dev(pf); 3634 if (!vsi->port_info) { 3635 dev_dbg(dev, "VSI %d, type %u specified doesn't have valid port_info\n", 3636 vsi->idx, vsi->type); 3637 return -EINVAL; 3638 } 3639 3640 speed = ice_get_link_speed_kbps(vsi); 3641 if (max_tx_rate > (u64)speed) { 3642 dev_err(dev, "invalid max Tx rate %llu Kbps specified for %s %d is greater than current link speed %u Kbps\n", 3643 max_tx_rate, ice_vsi_type_str(vsi->type), vsi->idx, 3644 speed); 3645 return -EINVAL; 3646 } 3647 3648 /* Configure max BW for VSI limit */ 3649 if (max_tx_rate) { 3650 status = ice_cfg_vsi_bw_lmt_per_tc(vsi->port_info, vsi->idx, 0, 3651 ICE_MAX_BW, max_tx_rate); 3652 if (status) { 3653 dev_err(dev, "failed setting max Tx rate(%llu Kbps) for %s %d\n", 3654 max_tx_rate, ice_vsi_type_str(vsi->type), 3655 vsi->idx); 3656 return status; 3657 } 3658 3659 dev_dbg(dev, "set max Tx rate(%llu Kbps) for %s %d\n", 3660 max_tx_rate, ice_vsi_type_str(vsi->type), vsi->idx); 3661 } else { 3662 status = ice_cfg_vsi_bw_dflt_lmt_per_tc(vsi->port_info, 3663 vsi->idx, 0, 3664 ICE_MAX_BW); 3665 if (status) { 3666 dev_err(dev, "failed clearing max Tx rate configuration for %s %d\n", 3667 ice_vsi_type_str(vsi->type), vsi->idx); 3668 return status; 3669 } 3670 3671 dev_dbg(dev, "cleared max Tx rate configuration for %s %d\n", 3672 ice_vsi_type_str(vsi->type), vsi->idx); 3673 } 3674 3675 return 0; 3676 } 3677 3678 /** 3679 * ice_set_link - turn on/off physical link 3680 * @vsi: VSI to modify physical link on 3681 * @ena: turn on/off physical link 3682 */ 3683 int ice_set_link(struct ice_vsi *vsi, bool ena) 3684 { 3685 struct device *dev = ice_pf_to_dev(vsi->back); 3686 struct ice_port_info *pi = vsi->port_info; 3687 struct ice_hw *hw = pi->hw; 3688 int status; 3689 3690 if (vsi->type != ICE_VSI_PF) 3691 return -EINVAL; 3692 3693 status = ice_aq_set_link_restart_an(pi, ena, NULL); 3694 3695 /* if link is owned by manageability, FW will return ICE_AQ_RC_EMODE. 3696 * this is not a fatal error, so print a warning message and return 3697 * a success code. Return an error if FW returns an error code other 3698 * than ICE_AQ_RC_EMODE 3699 */ 3700 if (status == -EIO) { 3701 if (hw->adminq.sq_last_status == ICE_AQ_RC_EMODE) 3702 dev_dbg(dev, "can't set link to %s, err %d aq_err %s. not fatal, continuing\n", 3703 (ena ? "ON" : "OFF"), status, 3704 ice_aq_str(hw->adminq.sq_last_status)); 3705 } else if (status) { 3706 dev_err(dev, "can't set link to %s, err %d aq_err %s\n", 3707 (ena ? "ON" : "OFF"), status, 3708 ice_aq_str(hw->adminq.sq_last_status)); 3709 return status; 3710 } 3711 3712 return 0; 3713 } 3714 3715 /** 3716 * ice_vsi_add_vlan_zero - add VLAN 0 filter(s) for this VSI 3717 * @vsi: VSI used to add VLAN filters 3718 * 3719 * In Single VLAN Mode (SVM), single VLAN filters via ICE_SW_LKUP_VLAN are based 3720 * on the inner VLAN ID, so the VLAN TPID (i.e. 0x8100 or 0x888a8) doesn't 3721 * matter. In Double VLAN Mode (DVM), outer/single VLAN filters via 3722 * ICE_SW_LKUP_VLAN are based on the outer/single VLAN ID + VLAN TPID. 3723 * 3724 * For both modes add a VLAN 0 + no VLAN TPID filter to handle untagged traffic 3725 * when VLAN pruning is enabled. Also, this handles VLAN 0 priority tagged 3726 * traffic in SVM, since the VLAN TPID isn't part of filtering. 3727 * 3728 * If DVM is enabled then an explicit VLAN 0 + VLAN TPID filter needs to be 3729 * added to allow VLAN 0 priority tagged traffic in DVM, since the VLAN TPID is 3730 * part of filtering. 3731 */ 3732 int ice_vsi_add_vlan_zero(struct ice_vsi *vsi) 3733 { 3734 struct ice_vsi_vlan_ops *vlan_ops = ice_get_compat_vsi_vlan_ops(vsi); 3735 struct ice_vlan vlan; 3736 int err; 3737 3738 vlan = ICE_VLAN(0, 0, 0); 3739 err = vlan_ops->add_vlan(vsi, &vlan); 3740 if (err && err != -EEXIST) 3741 return err; 3742 3743 /* in SVM both VLAN 0 filters are identical */ 3744 if (!ice_is_dvm_ena(&vsi->back->hw)) 3745 return 0; 3746 3747 vlan = ICE_VLAN(ETH_P_8021Q, 0, 0); 3748 err = vlan_ops->add_vlan(vsi, &vlan); 3749 if (err && err != -EEXIST) 3750 return err; 3751 3752 return 0; 3753 } 3754 3755 /** 3756 * ice_vsi_del_vlan_zero - delete VLAN 0 filter(s) for this VSI 3757 * @vsi: VSI used to add VLAN filters 3758 * 3759 * Delete the VLAN 0 filters in the same manner that they were added in 3760 * ice_vsi_add_vlan_zero. 3761 */ 3762 int ice_vsi_del_vlan_zero(struct ice_vsi *vsi) 3763 { 3764 struct ice_vsi_vlan_ops *vlan_ops = ice_get_compat_vsi_vlan_ops(vsi); 3765 struct ice_vlan vlan; 3766 int err; 3767 3768 vlan = ICE_VLAN(0, 0, 0); 3769 err = vlan_ops->del_vlan(vsi, &vlan); 3770 if (err && err != -EEXIST) 3771 return err; 3772 3773 /* in SVM both VLAN 0 filters are identical */ 3774 if (!ice_is_dvm_ena(&vsi->back->hw)) 3775 return 0; 3776 3777 vlan = ICE_VLAN(ETH_P_8021Q, 0, 0); 3778 err = vlan_ops->del_vlan(vsi, &vlan); 3779 if (err && err != -EEXIST) 3780 return err; 3781 3782 /* when deleting the last VLAN filter, make sure to disable the VLAN 3783 * promisc mode so the filter isn't left by accident 3784 */ 3785 return ice_clear_vsi_promisc(&vsi->back->hw, vsi->idx, 3786 ICE_MCAST_VLAN_PROMISC_BITS, 0); 3787 } 3788 3789 /** 3790 * ice_vsi_num_zero_vlans - get number of VLAN 0 filters based on VLAN mode 3791 * @vsi: VSI used to get the VLAN mode 3792 * 3793 * If DVM is enabled then 2 VLAN 0 filters are added, else if SVM is enabled 3794 * then 1 VLAN 0 filter is added. See ice_vsi_add_vlan_zero for more details. 3795 */ 3796 static u16 ice_vsi_num_zero_vlans(struct ice_vsi *vsi) 3797 { 3798 #define ICE_DVM_NUM_ZERO_VLAN_FLTRS 2 3799 #define ICE_SVM_NUM_ZERO_VLAN_FLTRS 1 3800 /* no VLAN 0 filter is created when a port VLAN is active */ 3801 if (vsi->type == ICE_VSI_VF) { 3802 if (WARN_ON(!vsi->vf)) 3803 return 0; 3804 3805 if (ice_vf_is_port_vlan_ena(vsi->vf)) 3806 return 0; 3807 } 3808 3809 if (ice_is_dvm_ena(&vsi->back->hw)) 3810 return ICE_DVM_NUM_ZERO_VLAN_FLTRS; 3811 else 3812 return ICE_SVM_NUM_ZERO_VLAN_FLTRS; 3813 } 3814 3815 /** 3816 * ice_vsi_has_non_zero_vlans - check if VSI has any non-zero VLANs 3817 * @vsi: VSI used to determine if any non-zero VLANs have been added 3818 */ 3819 bool ice_vsi_has_non_zero_vlans(struct ice_vsi *vsi) 3820 { 3821 return (vsi->num_vlan > ice_vsi_num_zero_vlans(vsi)); 3822 } 3823 3824 /** 3825 * ice_vsi_num_non_zero_vlans - get the number of non-zero VLANs for this VSI 3826 * @vsi: VSI used to get the number of non-zero VLANs added 3827 */ 3828 u16 ice_vsi_num_non_zero_vlans(struct ice_vsi *vsi) 3829 { 3830 return (vsi->num_vlan - ice_vsi_num_zero_vlans(vsi)); 3831 } 3832 3833 /** 3834 * ice_is_feature_supported 3835 * @pf: pointer to the struct ice_pf instance 3836 * @f: feature enum to be checked 3837 * 3838 * returns true if feature is supported, false otherwise 3839 */ 3840 bool ice_is_feature_supported(struct ice_pf *pf, enum ice_feature f) 3841 { 3842 if (f < 0 || f >= ICE_F_MAX) 3843 return false; 3844 3845 return test_bit(f, pf->features); 3846 } 3847 3848 /** 3849 * ice_set_feature_support 3850 * @pf: pointer to the struct ice_pf instance 3851 * @f: feature enum to set 3852 */ 3853 void ice_set_feature_support(struct ice_pf *pf, enum ice_feature f) 3854 { 3855 if (f < 0 || f >= ICE_F_MAX) 3856 return; 3857 3858 set_bit(f, pf->features); 3859 } 3860 3861 /** 3862 * ice_clear_feature_support 3863 * @pf: pointer to the struct ice_pf instance 3864 * @f: feature enum to clear 3865 */ 3866 void ice_clear_feature_support(struct ice_pf *pf, enum ice_feature f) 3867 { 3868 if (f < 0 || f >= ICE_F_MAX) 3869 return; 3870 3871 clear_bit(f, pf->features); 3872 } 3873 3874 /** 3875 * ice_init_feature_support 3876 * @pf: pointer to the struct ice_pf instance 3877 * 3878 * called during init to setup supported feature 3879 */ 3880 void ice_init_feature_support(struct ice_pf *pf) 3881 { 3882 switch (pf->hw.device_id) { 3883 case ICE_DEV_ID_E810C_BACKPLANE: 3884 case ICE_DEV_ID_E810C_QSFP: 3885 case ICE_DEV_ID_E810C_SFP: 3886 case ICE_DEV_ID_E810_XXV_BACKPLANE: 3887 case ICE_DEV_ID_E810_XXV_QSFP: 3888 case ICE_DEV_ID_E810_XXV_SFP: 3889 ice_set_feature_support(pf, ICE_F_DSCP); 3890 if (ice_is_phy_rclk_in_netlist(&pf->hw)) 3891 ice_set_feature_support(pf, ICE_F_PHY_RCLK); 3892 /* If we don't own the timer - don't enable other caps */ 3893 if (!ice_pf_src_tmr_owned(pf)) 3894 break; 3895 if (ice_is_cgu_in_netlist(&pf->hw)) 3896 ice_set_feature_support(pf, ICE_F_CGU); 3897 if (ice_is_clock_mux_in_netlist(&pf->hw)) 3898 ice_set_feature_support(pf, ICE_F_SMA_CTRL); 3899 if (ice_gnss_is_module_present(&pf->hw)) 3900 ice_set_feature_support(pf, ICE_F_GNSS); 3901 break; 3902 default: 3903 break; 3904 } 3905 3906 if (pf->hw.mac_type == ICE_MAC_E830) { 3907 ice_set_feature_support(pf, ICE_F_MBX_LIMIT); 3908 ice_set_feature_support(pf, ICE_F_GCS); 3909 } 3910 } 3911 3912 /** 3913 * ice_vsi_update_security - update security block in VSI 3914 * @vsi: pointer to VSI structure 3915 * @fill: function pointer to fill ctx 3916 */ 3917 int 3918 ice_vsi_update_security(struct ice_vsi *vsi, void (*fill)(struct ice_vsi_ctx *)) 3919 { 3920 struct ice_vsi_ctx ctx = { 0 }; 3921 3922 ctx.info = vsi->info; 3923 ctx.info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_SECURITY_VALID); 3924 fill(&ctx); 3925 3926 if (ice_update_vsi(&vsi->back->hw, vsi->idx, &ctx, NULL)) 3927 return -ENODEV; 3928 3929 vsi->info = ctx.info; 3930 return 0; 3931 } 3932 3933 /** 3934 * ice_vsi_ctx_set_antispoof - set antispoof function in VSI ctx 3935 * @ctx: pointer to VSI ctx structure 3936 */ 3937 void ice_vsi_ctx_set_antispoof(struct ice_vsi_ctx *ctx) 3938 { 3939 ctx->info.sec_flags |= ICE_AQ_VSI_SEC_FLAG_ENA_MAC_ANTI_SPOOF | 3940 (ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA << 3941 ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S); 3942 } 3943 3944 /** 3945 * ice_vsi_ctx_clear_antispoof - clear antispoof function in VSI ctx 3946 * @ctx: pointer to VSI ctx structure 3947 */ 3948 void ice_vsi_ctx_clear_antispoof(struct ice_vsi_ctx *ctx) 3949 { 3950 ctx->info.sec_flags &= ~ICE_AQ_VSI_SEC_FLAG_ENA_MAC_ANTI_SPOOF & 3951 ~(ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA << 3952 ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S); 3953 } 3954 3955 /** 3956 * ice_vsi_update_local_lb - update sw block in VSI with local loopback bit 3957 * @vsi: pointer to VSI structure 3958 * @set: set or unset the bit 3959 */ 3960 int 3961 ice_vsi_update_local_lb(struct ice_vsi *vsi, bool set) 3962 { 3963 struct ice_vsi_ctx ctx = { 3964 .info = vsi->info, 3965 }; 3966 3967 ctx.info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_SW_VALID); 3968 if (set) 3969 ctx.info.sw_flags |= ICE_AQ_VSI_SW_FLAG_LOCAL_LB; 3970 else 3971 ctx.info.sw_flags &= ~ICE_AQ_VSI_SW_FLAG_LOCAL_LB; 3972 3973 if (ice_update_vsi(&vsi->back->hw, vsi->idx, &ctx, NULL)) 3974 return -ENODEV; 3975 3976 vsi->info = ctx.info; 3977 return 0; 3978 } 3979