xref: /linux/drivers/net/ethernet/intel/ice/ice_lib.c (revision 3c4fc7bf4c9e66fe71abcbf93f62f4ddb89b7f15)
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2018, Intel Corporation. */
3 
4 #include "ice.h"
5 #include "ice_base.h"
6 #include "ice_flow.h"
7 #include "ice_lib.h"
8 #include "ice_fltr.h"
9 #include "ice_dcb_lib.h"
10 #include "ice_devlink.h"
11 #include "ice_vsi_vlan_ops.h"
12 
13 /**
14  * ice_vsi_type_str - maps VSI type enum to string equivalents
15  * @vsi_type: VSI type enum
16  */
17 const char *ice_vsi_type_str(enum ice_vsi_type vsi_type)
18 {
19 	switch (vsi_type) {
20 	case ICE_VSI_PF:
21 		return "ICE_VSI_PF";
22 	case ICE_VSI_VF:
23 		return "ICE_VSI_VF";
24 	case ICE_VSI_CTRL:
25 		return "ICE_VSI_CTRL";
26 	case ICE_VSI_CHNL:
27 		return "ICE_VSI_CHNL";
28 	case ICE_VSI_LB:
29 		return "ICE_VSI_LB";
30 	case ICE_VSI_SWITCHDEV_CTRL:
31 		return "ICE_VSI_SWITCHDEV_CTRL";
32 	default:
33 		return "unknown";
34 	}
35 }
36 
37 /**
38  * ice_vsi_ctrl_all_rx_rings - Start or stop a VSI's Rx rings
39  * @vsi: the VSI being configured
40  * @ena: start or stop the Rx rings
41  *
42  * First enable/disable all of the Rx rings, flush any remaining writes, and
43  * then verify that they have all been enabled/disabled successfully. This will
44  * let all of the register writes complete when enabling/disabling the Rx rings
45  * before waiting for the change in hardware to complete.
46  */
47 static int ice_vsi_ctrl_all_rx_rings(struct ice_vsi *vsi, bool ena)
48 {
49 	int ret = 0;
50 	u16 i;
51 
52 	ice_for_each_rxq(vsi, i)
53 		ice_vsi_ctrl_one_rx_ring(vsi, ena, i, false);
54 
55 	ice_flush(&vsi->back->hw);
56 
57 	ice_for_each_rxq(vsi, i) {
58 		ret = ice_vsi_wait_one_rx_ring(vsi, ena, i);
59 		if (ret)
60 			break;
61 	}
62 
63 	return ret;
64 }
65 
66 /**
67  * ice_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the VSI
68  * @vsi: VSI pointer
69  *
70  * On error: returns error code (negative)
71  * On success: returns 0
72  */
73 static int ice_vsi_alloc_arrays(struct ice_vsi *vsi)
74 {
75 	struct ice_pf *pf = vsi->back;
76 	struct device *dev;
77 
78 	dev = ice_pf_to_dev(pf);
79 	if (vsi->type == ICE_VSI_CHNL)
80 		return 0;
81 
82 	/* allocate memory for both Tx and Rx ring pointers */
83 	vsi->tx_rings = devm_kcalloc(dev, vsi->alloc_txq,
84 				     sizeof(*vsi->tx_rings), GFP_KERNEL);
85 	if (!vsi->tx_rings)
86 		return -ENOMEM;
87 
88 	vsi->rx_rings = devm_kcalloc(dev, vsi->alloc_rxq,
89 				     sizeof(*vsi->rx_rings), GFP_KERNEL);
90 	if (!vsi->rx_rings)
91 		goto err_rings;
92 
93 	/* txq_map needs to have enough space to track both Tx (stack) rings
94 	 * and XDP rings; at this point vsi->num_xdp_txq might not be set,
95 	 * so use num_possible_cpus() as we want to always provide XDP ring
96 	 * per CPU, regardless of queue count settings from user that might
97 	 * have come from ethtool's set_channels() callback;
98 	 */
99 	vsi->txq_map = devm_kcalloc(dev, (vsi->alloc_txq + num_possible_cpus()),
100 				    sizeof(*vsi->txq_map), GFP_KERNEL);
101 
102 	if (!vsi->txq_map)
103 		goto err_txq_map;
104 
105 	vsi->rxq_map = devm_kcalloc(dev, vsi->alloc_rxq,
106 				    sizeof(*vsi->rxq_map), GFP_KERNEL);
107 	if (!vsi->rxq_map)
108 		goto err_rxq_map;
109 
110 	/* There is no need to allocate q_vectors for a loopback VSI. */
111 	if (vsi->type == ICE_VSI_LB)
112 		return 0;
113 
114 	/* allocate memory for q_vector pointers */
115 	vsi->q_vectors = devm_kcalloc(dev, vsi->num_q_vectors,
116 				      sizeof(*vsi->q_vectors), GFP_KERNEL);
117 	if (!vsi->q_vectors)
118 		goto err_vectors;
119 
120 	vsi->af_xdp_zc_qps = bitmap_zalloc(max_t(int, vsi->alloc_txq, vsi->alloc_rxq), GFP_KERNEL);
121 	if (!vsi->af_xdp_zc_qps)
122 		goto err_zc_qps;
123 
124 	return 0;
125 
126 err_zc_qps:
127 	devm_kfree(dev, vsi->q_vectors);
128 err_vectors:
129 	devm_kfree(dev, vsi->rxq_map);
130 err_rxq_map:
131 	devm_kfree(dev, vsi->txq_map);
132 err_txq_map:
133 	devm_kfree(dev, vsi->rx_rings);
134 err_rings:
135 	devm_kfree(dev, vsi->tx_rings);
136 	return -ENOMEM;
137 }
138 
139 /**
140  * ice_vsi_set_num_desc - Set number of descriptors for queues on this VSI
141  * @vsi: the VSI being configured
142  */
143 static void ice_vsi_set_num_desc(struct ice_vsi *vsi)
144 {
145 	switch (vsi->type) {
146 	case ICE_VSI_PF:
147 	case ICE_VSI_SWITCHDEV_CTRL:
148 	case ICE_VSI_CTRL:
149 	case ICE_VSI_LB:
150 		/* a user could change the values of num_[tr]x_desc using
151 		 * ethtool -G so we should keep those values instead of
152 		 * overwriting them with the defaults.
153 		 */
154 		if (!vsi->num_rx_desc)
155 			vsi->num_rx_desc = ICE_DFLT_NUM_RX_DESC;
156 		if (!vsi->num_tx_desc)
157 			vsi->num_tx_desc = ICE_DFLT_NUM_TX_DESC;
158 		break;
159 	default:
160 		dev_dbg(ice_pf_to_dev(vsi->back), "Not setting number of Tx/Rx descriptors for VSI type %d\n",
161 			vsi->type);
162 		break;
163 	}
164 }
165 
166 /**
167  * ice_vsi_set_num_qs - Set number of queues, descriptors and vectors for a VSI
168  * @vsi: the VSI being configured
169  * @vf: the VF associated with this VSI, if any
170  *
171  * Return 0 on success and a negative value on error
172  */
173 static void ice_vsi_set_num_qs(struct ice_vsi *vsi, struct ice_vf *vf)
174 {
175 	enum ice_vsi_type vsi_type = vsi->type;
176 	struct ice_pf *pf = vsi->back;
177 
178 	if (WARN_ON(vsi_type == ICE_VSI_VF && !vf))
179 		return;
180 
181 	switch (vsi_type) {
182 	case ICE_VSI_PF:
183 		if (vsi->req_txq) {
184 			vsi->alloc_txq = vsi->req_txq;
185 			vsi->num_txq = vsi->req_txq;
186 		} else {
187 			vsi->alloc_txq = min3(pf->num_lan_msix,
188 					      ice_get_avail_txq_count(pf),
189 					      (u16)num_online_cpus());
190 		}
191 
192 		pf->num_lan_tx = vsi->alloc_txq;
193 
194 		/* only 1 Rx queue unless RSS is enabled */
195 		if (!test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
196 			vsi->alloc_rxq = 1;
197 		} else {
198 			if (vsi->req_rxq) {
199 				vsi->alloc_rxq = vsi->req_rxq;
200 				vsi->num_rxq = vsi->req_rxq;
201 			} else {
202 				vsi->alloc_rxq = min3(pf->num_lan_msix,
203 						      ice_get_avail_rxq_count(pf),
204 						      (u16)num_online_cpus());
205 			}
206 		}
207 
208 		pf->num_lan_rx = vsi->alloc_rxq;
209 
210 		vsi->num_q_vectors = min_t(int, pf->num_lan_msix,
211 					   max_t(int, vsi->alloc_rxq,
212 						 vsi->alloc_txq));
213 		break;
214 	case ICE_VSI_SWITCHDEV_CTRL:
215 		/* The number of queues for ctrl VSI is equal to number of VFs.
216 		 * Each ring is associated to the corresponding VF_PR netdev.
217 		 */
218 		vsi->alloc_txq = ice_get_num_vfs(pf);
219 		vsi->alloc_rxq = vsi->alloc_txq;
220 		vsi->num_q_vectors = 1;
221 		break;
222 	case ICE_VSI_VF:
223 		if (vf->num_req_qs)
224 			vf->num_vf_qs = vf->num_req_qs;
225 		vsi->alloc_txq = vf->num_vf_qs;
226 		vsi->alloc_rxq = vf->num_vf_qs;
227 		/* pf->vfs.num_msix_per includes (VF miscellaneous vector +
228 		 * data queue interrupts). Since vsi->num_q_vectors is number
229 		 * of queues vectors, subtract 1 (ICE_NONQ_VECS_VF) from the
230 		 * original vector count
231 		 */
232 		vsi->num_q_vectors = pf->vfs.num_msix_per - ICE_NONQ_VECS_VF;
233 		break;
234 	case ICE_VSI_CTRL:
235 		vsi->alloc_txq = 1;
236 		vsi->alloc_rxq = 1;
237 		vsi->num_q_vectors = 1;
238 		break;
239 	case ICE_VSI_CHNL:
240 		vsi->alloc_txq = 0;
241 		vsi->alloc_rxq = 0;
242 		break;
243 	case ICE_VSI_LB:
244 		vsi->alloc_txq = 1;
245 		vsi->alloc_rxq = 1;
246 		break;
247 	default:
248 		dev_warn(ice_pf_to_dev(pf), "Unknown VSI type %d\n", vsi_type);
249 		break;
250 	}
251 
252 	ice_vsi_set_num_desc(vsi);
253 }
254 
255 /**
256  * ice_get_free_slot - get the next non-NULL location index in array
257  * @array: array to search
258  * @size: size of the array
259  * @curr: last known occupied index to be used as a search hint
260  *
261  * void * is being used to keep the functionality generic. This lets us use this
262  * function on any array of pointers.
263  */
264 static int ice_get_free_slot(void *array, int size, int curr)
265 {
266 	int **tmp_array = (int **)array;
267 	int next;
268 
269 	if (curr < (size - 1) && !tmp_array[curr + 1]) {
270 		next = curr + 1;
271 	} else {
272 		int i = 0;
273 
274 		while ((i < size) && (tmp_array[i]))
275 			i++;
276 		if (i == size)
277 			next = ICE_NO_VSI;
278 		else
279 			next = i;
280 	}
281 	return next;
282 }
283 
284 /**
285  * ice_vsi_delete - delete a VSI from the switch
286  * @vsi: pointer to VSI being removed
287  */
288 void ice_vsi_delete(struct ice_vsi *vsi)
289 {
290 	struct ice_pf *pf = vsi->back;
291 	struct ice_vsi_ctx *ctxt;
292 	int status;
293 
294 	ctxt = kzalloc(sizeof(*ctxt), GFP_KERNEL);
295 	if (!ctxt)
296 		return;
297 
298 	if (vsi->type == ICE_VSI_VF)
299 		ctxt->vf_num = vsi->vf->vf_id;
300 	ctxt->vsi_num = vsi->vsi_num;
301 
302 	memcpy(&ctxt->info, &vsi->info, sizeof(ctxt->info));
303 
304 	status = ice_free_vsi(&pf->hw, vsi->idx, ctxt, false, NULL);
305 	if (status)
306 		dev_err(ice_pf_to_dev(pf), "Failed to delete VSI %i in FW - error: %d\n",
307 			vsi->vsi_num, status);
308 
309 	kfree(ctxt);
310 }
311 
312 /**
313  * ice_vsi_free_arrays - De-allocate queue and vector pointer arrays for the VSI
314  * @vsi: pointer to VSI being cleared
315  */
316 static void ice_vsi_free_arrays(struct ice_vsi *vsi)
317 {
318 	struct ice_pf *pf = vsi->back;
319 	struct device *dev;
320 
321 	dev = ice_pf_to_dev(pf);
322 
323 	if (vsi->af_xdp_zc_qps) {
324 		bitmap_free(vsi->af_xdp_zc_qps);
325 		vsi->af_xdp_zc_qps = NULL;
326 	}
327 	/* free the ring and vector containers */
328 	if (vsi->q_vectors) {
329 		devm_kfree(dev, vsi->q_vectors);
330 		vsi->q_vectors = NULL;
331 	}
332 	if (vsi->tx_rings) {
333 		devm_kfree(dev, vsi->tx_rings);
334 		vsi->tx_rings = NULL;
335 	}
336 	if (vsi->rx_rings) {
337 		devm_kfree(dev, vsi->rx_rings);
338 		vsi->rx_rings = NULL;
339 	}
340 	if (vsi->txq_map) {
341 		devm_kfree(dev, vsi->txq_map);
342 		vsi->txq_map = NULL;
343 	}
344 	if (vsi->rxq_map) {
345 		devm_kfree(dev, vsi->rxq_map);
346 		vsi->rxq_map = NULL;
347 	}
348 }
349 
350 /**
351  * ice_vsi_clear - clean up and deallocate the provided VSI
352  * @vsi: pointer to VSI being cleared
353  *
354  * This deallocates the VSI's queue resources, removes it from the PF's
355  * VSI array if necessary, and deallocates the VSI
356  *
357  * Returns 0 on success, negative on failure
358  */
359 int ice_vsi_clear(struct ice_vsi *vsi)
360 {
361 	struct ice_pf *pf = NULL;
362 	struct device *dev;
363 
364 	if (!vsi)
365 		return 0;
366 
367 	if (!vsi->back)
368 		return -EINVAL;
369 
370 	pf = vsi->back;
371 	dev = ice_pf_to_dev(pf);
372 
373 	if (!pf->vsi[vsi->idx] || pf->vsi[vsi->idx] != vsi) {
374 		dev_dbg(dev, "vsi does not exist at pf->vsi[%d]\n", vsi->idx);
375 		return -EINVAL;
376 	}
377 
378 	mutex_lock(&pf->sw_mutex);
379 	/* updates the PF for this cleared VSI */
380 
381 	pf->vsi[vsi->idx] = NULL;
382 	if (vsi->idx < pf->next_vsi && vsi->type != ICE_VSI_CTRL)
383 		pf->next_vsi = vsi->idx;
384 	if (vsi->idx < pf->next_vsi && vsi->type == ICE_VSI_CTRL && vsi->vf)
385 		pf->next_vsi = vsi->idx;
386 
387 	ice_vsi_free_arrays(vsi);
388 	mutex_unlock(&pf->sw_mutex);
389 	devm_kfree(dev, vsi);
390 
391 	return 0;
392 }
393 
394 /**
395  * ice_msix_clean_ctrl_vsi - MSIX mode interrupt handler for ctrl VSI
396  * @irq: interrupt number
397  * @data: pointer to a q_vector
398  */
399 static irqreturn_t ice_msix_clean_ctrl_vsi(int __always_unused irq, void *data)
400 {
401 	struct ice_q_vector *q_vector = (struct ice_q_vector *)data;
402 
403 	if (!q_vector->tx.tx_ring)
404 		return IRQ_HANDLED;
405 
406 #define FDIR_RX_DESC_CLEAN_BUDGET 64
407 	ice_clean_rx_irq(q_vector->rx.rx_ring, FDIR_RX_DESC_CLEAN_BUDGET);
408 	ice_clean_ctrl_tx_irq(q_vector->tx.tx_ring);
409 
410 	return IRQ_HANDLED;
411 }
412 
413 /**
414  * ice_msix_clean_rings - MSIX mode Interrupt Handler
415  * @irq: interrupt number
416  * @data: pointer to a q_vector
417  */
418 static irqreturn_t ice_msix_clean_rings(int __always_unused irq, void *data)
419 {
420 	struct ice_q_vector *q_vector = (struct ice_q_vector *)data;
421 
422 	if (!q_vector->tx.tx_ring && !q_vector->rx.rx_ring)
423 		return IRQ_HANDLED;
424 
425 	q_vector->total_events++;
426 
427 	napi_schedule(&q_vector->napi);
428 
429 	return IRQ_HANDLED;
430 }
431 
432 static irqreturn_t ice_eswitch_msix_clean_rings(int __always_unused irq, void *data)
433 {
434 	struct ice_q_vector *q_vector = (struct ice_q_vector *)data;
435 	struct ice_pf *pf = q_vector->vsi->back;
436 	struct ice_vf *vf;
437 	unsigned int bkt;
438 
439 	if (!q_vector->tx.tx_ring && !q_vector->rx.rx_ring)
440 		return IRQ_HANDLED;
441 
442 	rcu_read_lock();
443 	ice_for_each_vf_rcu(pf, bkt, vf)
444 		napi_schedule(&vf->repr->q_vector->napi);
445 	rcu_read_unlock();
446 
447 	return IRQ_HANDLED;
448 }
449 
450 /**
451  * ice_vsi_alloc - Allocates the next available struct VSI in the PF
452  * @pf: board private structure
453  * @vsi_type: type of VSI
454  * @ch: ptr to channel
455  * @vf: VF for ICE_VSI_VF and ICE_VSI_CTRL
456  *
457  * The VF pointer is used for ICE_VSI_VF and ICE_VSI_CTRL. For ICE_VSI_CTRL,
458  * it may be NULL in the case there is no association with a VF. For
459  * ICE_VSI_VF the VF pointer *must not* be NULL.
460  *
461  * returns a pointer to a VSI on success, NULL on failure.
462  */
463 static struct ice_vsi *
464 ice_vsi_alloc(struct ice_pf *pf, enum ice_vsi_type vsi_type,
465 	      struct ice_channel *ch, struct ice_vf *vf)
466 {
467 	struct device *dev = ice_pf_to_dev(pf);
468 	struct ice_vsi *vsi = NULL;
469 
470 	if (WARN_ON(vsi_type == ICE_VSI_VF && !vf))
471 		return NULL;
472 
473 	/* Need to protect the allocation of the VSIs at the PF level */
474 	mutex_lock(&pf->sw_mutex);
475 
476 	/* If we have already allocated our maximum number of VSIs,
477 	 * pf->next_vsi will be ICE_NO_VSI. If not, pf->next_vsi index
478 	 * is available to be populated
479 	 */
480 	if (pf->next_vsi == ICE_NO_VSI) {
481 		dev_dbg(dev, "out of VSI slots!\n");
482 		goto unlock_pf;
483 	}
484 
485 	vsi = devm_kzalloc(dev, sizeof(*vsi), GFP_KERNEL);
486 	if (!vsi)
487 		goto unlock_pf;
488 
489 	vsi->type = vsi_type;
490 	vsi->back = pf;
491 	set_bit(ICE_VSI_DOWN, vsi->state);
492 
493 	if (vsi_type == ICE_VSI_VF)
494 		ice_vsi_set_num_qs(vsi, vf);
495 	else if (vsi_type != ICE_VSI_CHNL)
496 		ice_vsi_set_num_qs(vsi, NULL);
497 
498 	switch (vsi->type) {
499 	case ICE_VSI_SWITCHDEV_CTRL:
500 		if (ice_vsi_alloc_arrays(vsi))
501 			goto err_rings;
502 
503 		/* Setup eswitch MSIX irq handler for VSI */
504 		vsi->irq_handler = ice_eswitch_msix_clean_rings;
505 		break;
506 	case ICE_VSI_PF:
507 		if (ice_vsi_alloc_arrays(vsi))
508 			goto err_rings;
509 
510 		/* Setup default MSIX irq handler for VSI */
511 		vsi->irq_handler = ice_msix_clean_rings;
512 		break;
513 	case ICE_VSI_CTRL:
514 		if (ice_vsi_alloc_arrays(vsi))
515 			goto err_rings;
516 
517 		/* Setup ctrl VSI MSIX irq handler */
518 		vsi->irq_handler = ice_msix_clean_ctrl_vsi;
519 
520 		/* For the PF control VSI this is NULL, for the VF control VSI
521 		 * this will be the first VF to allocate it.
522 		 */
523 		vsi->vf = vf;
524 		break;
525 	case ICE_VSI_VF:
526 		if (ice_vsi_alloc_arrays(vsi))
527 			goto err_rings;
528 		vsi->vf = vf;
529 		break;
530 	case ICE_VSI_CHNL:
531 		if (!ch)
532 			goto err_rings;
533 		vsi->num_rxq = ch->num_rxq;
534 		vsi->num_txq = ch->num_txq;
535 		vsi->next_base_q = ch->base_q;
536 		break;
537 	case ICE_VSI_LB:
538 		if (ice_vsi_alloc_arrays(vsi))
539 			goto err_rings;
540 		break;
541 	default:
542 		dev_warn(dev, "Unknown VSI type %d\n", vsi->type);
543 		goto unlock_pf;
544 	}
545 
546 	if (vsi->type == ICE_VSI_CTRL && !vf) {
547 		/* Use the last VSI slot as the index for PF control VSI */
548 		vsi->idx = pf->num_alloc_vsi - 1;
549 		pf->ctrl_vsi_idx = vsi->idx;
550 		pf->vsi[vsi->idx] = vsi;
551 	} else {
552 		/* fill slot and make note of the index */
553 		vsi->idx = pf->next_vsi;
554 		pf->vsi[pf->next_vsi] = vsi;
555 
556 		/* prepare pf->next_vsi for next use */
557 		pf->next_vsi = ice_get_free_slot(pf->vsi, pf->num_alloc_vsi,
558 						 pf->next_vsi);
559 	}
560 
561 	if (vsi->type == ICE_VSI_CTRL && vf)
562 		vf->ctrl_vsi_idx = vsi->idx;
563 	goto unlock_pf;
564 
565 err_rings:
566 	devm_kfree(dev, vsi);
567 	vsi = NULL;
568 unlock_pf:
569 	mutex_unlock(&pf->sw_mutex);
570 	return vsi;
571 }
572 
573 /**
574  * ice_alloc_fd_res - Allocate FD resource for a VSI
575  * @vsi: pointer to the ice_vsi
576  *
577  * This allocates the FD resources
578  *
579  * Returns 0 on success, -EPERM on no-op or -EIO on failure
580  */
581 static int ice_alloc_fd_res(struct ice_vsi *vsi)
582 {
583 	struct ice_pf *pf = vsi->back;
584 	u32 g_val, b_val;
585 
586 	/* Flow Director filters are only allocated/assigned to the PF VSI or
587 	 * CHNL VSI which passes the traffic. The CTRL VSI is only used to
588 	 * add/delete filters so resources are not allocated to it
589 	 */
590 	if (!test_bit(ICE_FLAG_FD_ENA, pf->flags))
591 		return -EPERM;
592 
593 	if (!(vsi->type == ICE_VSI_PF || vsi->type == ICE_VSI_VF ||
594 	      vsi->type == ICE_VSI_CHNL))
595 		return -EPERM;
596 
597 	/* FD filters from guaranteed pool per VSI */
598 	g_val = pf->hw.func_caps.fd_fltr_guar;
599 	if (!g_val)
600 		return -EPERM;
601 
602 	/* FD filters from best effort pool */
603 	b_val = pf->hw.func_caps.fd_fltr_best_effort;
604 	if (!b_val)
605 		return -EPERM;
606 
607 	/* PF main VSI gets only 64 FD resources from guaranteed pool
608 	 * when ADQ is configured.
609 	 */
610 #define ICE_PF_VSI_GFLTR	64
611 
612 	/* determine FD filter resources per VSI from shared(best effort) and
613 	 * dedicated pool
614 	 */
615 	if (vsi->type == ICE_VSI_PF) {
616 		vsi->num_gfltr = g_val;
617 		/* if MQPRIO is configured, main VSI doesn't get all FD
618 		 * resources from guaranteed pool. PF VSI gets 64 FD resources
619 		 */
620 		if (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) {
621 			if (g_val < ICE_PF_VSI_GFLTR)
622 				return -EPERM;
623 			/* allow bare minimum entries for PF VSI */
624 			vsi->num_gfltr = ICE_PF_VSI_GFLTR;
625 		}
626 
627 		/* each VSI gets same "best_effort" quota */
628 		vsi->num_bfltr = b_val;
629 	} else if (vsi->type == ICE_VSI_VF) {
630 		vsi->num_gfltr = 0;
631 
632 		/* each VSI gets same "best_effort" quota */
633 		vsi->num_bfltr = b_val;
634 	} else {
635 		struct ice_vsi *main_vsi;
636 		int numtc;
637 
638 		main_vsi = ice_get_main_vsi(pf);
639 		if (!main_vsi)
640 			return -EPERM;
641 
642 		if (!main_vsi->all_numtc)
643 			return -EINVAL;
644 
645 		/* figure out ADQ numtc */
646 		numtc = main_vsi->all_numtc - ICE_CHNL_START_TC;
647 
648 		/* only one TC but still asking resources for channels,
649 		 * invalid config
650 		 */
651 		if (numtc < ICE_CHNL_START_TC)
652 			return -EPERM;
653 
654 		g_val -= ICE_PF_VSI_GFLTR;
655 		/* channel VSIs gets equal share from guaranteed pool */
656 		vsi->num_gfltr = g_val / numtc;
657 
658 		/* each VSI gets same "best_effort" quota */
659 		vsi->num_bfltr = b_val;
660 	}
661 
662 	return 0;
663 }
664 
665 /**
666  * ice_vsi_get_qs - Assign queues from PF to VSI
667  * @vsi: the VSI to assign queues to
668  *
669  * Returns 0 on success and a negative value on error
670  */
671 static int ice_vsi_get_qs(struct ice_vsi *vsi)
672 {
673 	struct ice_pf *pf = vsi->back;
674 	struct ice_qs_cfg tx_qs_cfg = {
675 		.qs_mutex = &pf->avail_q_mutex,
676 		.pf_map = pf->avail_txqs,
677 		.pf_map_size = pf->max_pf_txqs,
678 		.q_count = vsi->alloc_txq,
679 		.scatter_count = ICE_MAX_SCATTER_TXQS,
680 		.vsi_map = vsi->txq_map,
681 		.vsi_map_offset = 0,
682 		.mapping_mode = ICE_VSI_MAP_CONTIG
683 	};
684 	struct ice_qs_cfg rx_qs_cfg = {
685 		.qs_mutex = &pf->avail_q_mutex,
686 		.pf_map = pf->avail_rxqs,
687 		.pf_map_size = pf->max_pf_rxqs,
688 		.q_count = vsi->alloc_rxq,
689 		.scatter_count = ICE_MAX_SCATTER_RXQS,
690 		.vsi_map = vsi->rxq_map,
691 		.vsi_map_offset = 0,
692 		.mapping_mode = ICE_VSI_MAP_CONTIG
693 	};
694 	int ret;
695 
696 	if (vsi->type == ICE_VSI_CHNL)
697 		return 0;
698 
699 	ret = __ice_vsi_get_qs(&tx_qs_cfg);
700 	if (ret)
701 		return ret;
702 	vsi->tx_mapping_mode = tx_qs_cfg.mapping_mode;
703 
704 	ret = __ice_vsi_get_qs(&rx_qs_cfg);
705 	if (ret)
706 		return ret;
707 	vsi->rx_mapping_mode = rx_qs_cfg.mapping_mode;
708 
709 	return 0;
710 }
711 
712 /**
713  * ice_vsi_put_qs - Release queues from VSI to PF
714  * @vsi: the VSI that is going to release queues
715  */
716 static void ice_vsi_put_qs(struct ice_vsi *vsi)
717 {
718 	struct ice_pf *pf = vsi->back;
719 	int i;
720 
721 	mutex_lock(&pf->avail_q_mutex);
722 
723 	ice_for_each_alloc_txq(vsi, i) {
724 		clear_bit(vsi->txq_map[i], pf->avail_txqs);
725 		vsi->txq_map[i] = ICE_INVAL_Q_INDEX;
726 	}
727 
728 	ice_for_each_alloc_rxq(vsi, i) {
729 		clear_bit(vsi->rxq_map[i], pf->avail_rxqs);
730 		vsi->rxq_map[i] = ICE_INVAL_Q_INDEX;
731 	}
732 
733 	mutex_unlock(&pf->avail_q_mutex);
734 }
735 
736 /**
737  * ice_is_safe_mode
738  * @pf: pointer to the PF struct
739  *
740  * returns true if driver is in safe mode, false otherwise
741  */
742 bool ice_is_safe_mode(struct ice_pf *pf)
743 {
744 	return !test_bit(ICE_FLAG_ADV_FEATURES, pf->flags);
745 }
746 
747 /**
748  * ice_is_rdma_ena
749  * @pf: pointer to the PF struct
750  *
751  * returns true if RDMA is currently supported, false otherwise
752  */
753 bool ice_is_rdma_ena(struct ice_pf *pf)
754 {
755 	return test_bit(ICE_FLAG_RDMA_ENA, pf->flags);
756 }
757 
758 /**
759  * ice_vsi_clean_rss_flow_fld - Delete RSS configuration
760  * @vsi: the VSI being cleaned up
761  *
762  * This function deletes RSS input set for all flows that were configured
763  * for this VSI
764  */
765 static void ice_vsi_clean_rss_flow_fld(struct ice_vsi *vsi)
766 {
767 	struct ice_pf *pf = vsi->back;
768 	int status;
769 
770 	if (ice_is_safe_mode(pf))
771 		return;
772 
773 	status = ice_rem_vsi_rss_cfg(&pf->hw, vsi->idx);
774 	if (status)
775 		dev_dbg(ice_pf_to_dev(pf), "ice_rem_vsi_rss_cfg failed for vsi = %d, error = %d\n",
776 			vsi->vsi_num, status);
777 }
778 
779 /**
780  * ice_rss_clean - Delete RSS related VSI structures and configuration
781  * @vsi: the VSI being removed
782  */
783 static void ice_rss_clean(struct ice_vsi *vsi)
784 {
785 	struct ice_pf *pf = vsi->back;
786 	struct device *dev;
787 
788 	dev = ice_pf_to_dev(pf);
789 
790 	if (vsi->rss_hkey_user)
791 		devm_kfree(dev, vsi->rss_hkey_user);
792 	if (vsi->rss_lut_user)
793 		devm_kfree(dev, vsi->rss_lut_user);
794 
795 	ice_vsi_clean_rss_flow_fld(vsi);
796 	/* remove RSS replay list */
797 	if (!ice_is_safe_mode(pf))
798 		ice_rem_vsi_rss_list(&pf->hw, vsi->idx);
799 }
800 
801 /**
802  * ice_vsi_set_rss_params - Setup RSS capabilities per VSI type
803  * @vsi: the VSI being configured
804  */
805 static void ice_vsi_set_rss_params(struct ice_vsi *vsi)
806 {
807 	struct ice_hw_common_caps *cap;
808 	struct ice_pf *pf = vsi->back;
809 
810 	if (!test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
811 		vsi->rss_size = 1;
812 		return;
813 	}
814 
815 	cap = &pf->hw.func_caps.common_cap;
816 	switch (vsi->type) {
817 	case ICE_VSI_CHNL:
818 	case ICE_VSI_PF:
819 		/* PF VSI will inherit RSS instance of PF */
820 		vsi->rss_table_size = (u16)cap->rss_table_size;
821 		if (vsi->type == ICE_VSI_CHNL)
822 			vsi->rss_size = min_t(u16, vsi->num_rxq,
823 					      BIT(cap->rss_table_entry_width));
824 		else
825 			vsi->rss_size = min_t(u16, num_online_cpus(),
826 					      BIT(cap->rss_table_entry_width));
827 		vsi->rss_lut_type = ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_PF;
828 		break;
829 	case ICE_VSI_SWITCHDEV_CTRL:
830 		vsi->rss_table_size = ICE_VSIQF_HLUT_ARRAY_SIZE;
831 		vsi->rss_size = min_t(u16, num_online_cpus(),
832 				      BIT(cap->rss_table_entry_width));
833 		vsi->rss_lut_type = ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_VSI;
834 		break;
835 	case ICE_VSI_VF:
836 		/* VF VSI will get a small RSS table.
837 		 * For VSI_LUT, LUT size should be set to 64 bytes.
838 		 */
839 		vsi->rss_table_size = ICE_VSIQF_HLUT_ARRAY_SIZE;
840 		vsi->rss_size = ICE_MAX_RSS_QS_PER_VF;
841 		vsi->rss_lut_type = ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_VSI;
842 		break;
843 	case ICE_VSI_LB:
844 		break;
845 	default:
846 		dev_dbg(ice_pf_to_dev(pf), "Unsupported VSI type %s\n",
847 			ice_vsi_type_str(vsi->type));
848 		break;
849 	}
850 }
851 
852 /**
853  * ice_set_dflt_vsi_ctx - Set default VSI context before adding a VSI
854  * @hw: HW structure used to determine the VLAN mode of the device
855  * @ctxt: the VSI context being set
856  *
857  * This initializes a default VSI context for all sections except the Queues.
858  */
859 static void ice_set_dflt_vsi_ctx(struct ice_hw *hw, struct ice_vsi_ctx *ctxt)
860 {
861 	u32 table = 0;
862 
863 	memset(&ctxt->info, 0, sizeof(ctxt->info));
864 	/* VSI's should be allocated from shared pool */
865 	ctxt->alloc_from_pool = true;
866 	/* Src pruning enabled by default */
867 	ctxt->info.sw_flags = ICE_AQ_VSI_SW_FLAG_SRC_PRUNE;
868 	/* Traffic from VSI can be sent to LAN */
869 	ctxt->info.sw_flags2 = ICE_AQ_VSI_SW_FLAG_LAN_ENA;
870 	/* allow all untagged/tagged packets by default on Tx */
871 	ctxt->info.inner_vlan_flags = ((ICE_AQ_VSI_INNER_VLAN_TX_MODE_ALL &
872 				  ICE_AQ_VSI_INNER_VLAN_TX_MODE_M) >>
873 				 ICE_AQ_VSI_INNER_VLAN_TX_MODE_S);
874 	/* SVM - by default bits 3 and 4 in inner_vlan_flags are 0's which
875 	 * results in legacy behavior (show VLAN, DEI, and UP) in descriptor.
876 	 *
877 	 * DVM - leave inner VLAN in packet by default
878 	 */
879 	if (ice_is_dvm_ena(hw)) {
880 		ctxt->info.inner_vlan_flags |=
881 			ICE_AQ_VSI_INNER_VLAN_EMODE_NOTHING;
882 		ctxt->info.outer_vlan_flags =
883 			(ICE_AQ_VSI_OUTER_VLAN_TX_MODE_ALL <<
884 			 ICE_AQ_VSI_OUTER_VLAN_TX_MODE_S) &
885 			ICE_AQ_VSI_OUTER_VLAN_TX_MODE_M;
886 		ctxt->info.outer_vlan_flags |=
887 			(ICE_AQ_VSI_OUTER_TAG_VLAN_8100 <<
888 			 ICE_AQ_VSI_OUTER_TAG_TYPE_S) &
889 			ICE_AQ_VSI_OUTER_TAG_TYPE_M;
890 		ctxt->info.outer_vlan_flags |=
891 			FIELD_PREP(ICE_AQ_VSI_OUTER_VLAN_EMODE_M,
892 				   ICE_AQ_VSI_OUTER_VLAN_EMODE_NOTHING);
893 	}
894 	/* Have 1:1 UP mapping for both ingress/egress tables */
895 	table |= ICE_UP_TABLE_TRANSLATE(0, 0);
896 	table |= ICE_UP_TABLE_TRANSLATE(1, 1);
897 	table |= ICE_UP_TABLE_TRANSLATE(2, 2);
898 	table |= ICE_UP_TABLE_TRANSLATE(3, 3);
899 	table |= ICE_UP_TABLE_TRANSLATE(4, 4);
900 	table |= ICE_UP_TABLE_TRANSLATE(5, 5);
901 	table |= ICE_UP_TABLE_TRANSLATE(6, 6);
902 	table |= ICE_UP_TABLE_TRANSLATE(7, 7);
903 	ctxt->info.ingress_table = cpu_to_le32(table);
904 	ctxt->info.egress_table = cpu_to_le32(table);
905 	/* Have 1:1 UP mapping for outer to inner UP table */
906 	ctxt->info.outer_up_table = cpu_to_le32(table);
907 	/* No Outer tag support outer_tag_flags remains to zero */
908 }
909 
910 /**
911  * ice_vsi_setup_q_map - Setup a VSI queue map
912  * @vsi: the VSI being configured
913  * @ctxt: VSI context structure
914  */
915 static int ice_vsi_setup_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt)
916 {
917 	u16 offset = 0, qmap = 0, tx_count = 0, rx_count = 0, pow = 0;
918 	u16 num_txq_per_tc, num_rxq_per_tc;
919 	u16 qcount_tx = vsi->alloc_txq;
920 	u16 qcount_rx = vsi->alloc_rxq;
921 	u8 netdev_tc = 0;
922 	int i;
923 
924 	if (!vsi->tc_cfg.numtc) {
925 		/* at least TC0 should be enabled by default */
926 		vsi->tc_cfg.numtc = 1;
927 		vsi->tc_cfg.ena_tc = 1;
928 	}
929 
930 	num_rxq_per_tc = min_t(u16, qcount_rx / vsi->tc_cfg.numtc, ICE_MAX_RXQS_PER_TC);
931 	if (!num_rxq_per_tc)
932 		num_rxq_per_tc = 1;
933 	num_txq_per_tc = qcount_tx / vsi->tc_cfg.numtc;
934 	if (!num_txq_per_tc)
935 		num_txq_per_tc = 1;
936 
937 	/* find the (rounded up) power-of-2 of qcount */
938 	pow = (u16)order_base_2(num_rxq_per_tc);
939 
940 	/* TC mapping is a function of the number of Rx queues assigned to the
941 	 * VSI for each traffic class and the offset of these queues.
942 	 * The first 10 bits are for queue offset for TC0, next 4 bits for no:of
943 	 * queues allocated to TC0. No:of queues is a power-of-2.
944 	 *
945 	 * If TC is not enabled, the queue offset is set to 0, and allocate one
946 	 * queue, this way, traffic for the given TC will be sent to the default
947 	 * queue.
948 	 *
949 	 * Setup number and offset of Rx queues for all TCs for the VSI
950 	 */
951 	ice_for_each_traffic_class(i) {
952 		if (!(vsi->tc_cfg.ena_tc & BIT(i))) {
953 			/* TC is not enabled */
954 			vsi->tc_cfg.tc_info[i].qoffset = 0;
955 			vsi->tc_cfg.tc_info[i].qcount_rx = 1;
956 			vsi->tc_cfg.tc_info[i].qcount_tx = 1;
957 			vsi->tc_cfg.tc_info[i].netdev_tc = 0;
958 			ctxt->info.tc_mapping[i] = 0;
959 			continue;
960 		}
961 
962 		/* TC is enabled */
963 		vsi->tc_cfg.tc_info[i].qoffset = offset;
964 		vsi->tc_cfg.tc_info[i].qcount_rx = num_rxq_per_tc;
965 		vsi->tc_cfg.tc_info[i].qcount_tx = num_txq_per_tc;
966 		vsi->tc_cfg.tc_info[i].netdev_tc = netdev_tc++;
967 
968 		qmap = ((offset << ICE_AQ_VSI_TC_Q_OFFSET_S) &
969 			ICE_AQ_VSI_TC_Q_OFFSET_M) |
970 			((pow << ICE_AQ_VSI_TC_Q_NUM_S) &
971 			 ICE_AQ_VSI_TC_Q_NUM_M);
972 		offset += num_rxq_per_tc;
973 		tx_count += num_txq_per_tc;
974 		ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
975 	}
976 
977 	/* if offset is non-zero, means it is calculated correctly based on
978 	 * enabled TCs for a given VSI otherwise qcount_rx will always
979 	 * be correct and non-zero because it is based off - VSI's
980 	 * allocated Rx queues which is at least 1 (hence qcount_tx will be
981 	 * at least 1)
982 	 */
983 	if (offset)
984 		rx_count = offset;
985 	else
986 		rx_count = num_rxq_per_tc;
987 
988 	if (rx_count > vsi->alloc_rxq) {
989 		dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Rx queues (%u), than were allocated (%u)!\n",
990 			rx_count, vsi->alloc_rxq);
991 		return -EINVAL;
992 	}
993 
994 	if (tx_count > vsi->alloc_txq) {
995 		dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Tx queues (%u), than were allocated (%u)!\n",
996 			tx_count, vsi->alloc_txq);
997 		return -EINVAL;
998 	}
999 
1000 	vsi->num_txq = tx_count;
1001 	vsi->num_rxq = rx_count;
1002 
1003 	if (vsi->type == ICE_VSI_VF && vsi->num_txq != vsi->num_rxq) {
1004 		dev_dbg(ice_pf_to_dev(vsi->back), "VF VSI should have same number of Tx and Rx queues. Hence making them equal\n");
1005 		/* since there is a chance that num_rxq could have been changed
1006 		 * in the above for loop, make num_txq equal to num_rxq.
1007 		 */
1008 		vsi->num_txq = vsi->num_rxq;
1009 	}
1010 
1011 	/* Rx queue mapping */
1012 	ctxt->info.mapping_flags |= cpu_to_le16(ICE_AQ_VSI_Q_MAP_CONTIG);
1013 	/* q_mapping buffer holds the info for the first queue allocated for
1014 	 * this VSI in the PF space and also the number of queues associated
1015 	 * with this VSI.
1016 	 */
1017 	ctxt->info.q_mapping[0] = cpu_to_le16(vsi->rxq_map[0]);
1018 	ctxt->info.q_mapping[1] = cpu_to_le16(vsi->num_rxq);
1019 
1020 	return 0;
1021 }
1022 
1023 /**
1024  * ice_set_fd_vsi_ctx - Set FD VSI context before adding a VSI
1025  * @ctxt: the VSI context being set
1026  * @vsi: the VSI being configured
1027  */
1028 static void ice_set_fd_vsi_ctx(struct ice_vsi_ctx *ctxt, struct ice_vsi *vsi)
1029 {
1030 	u8 dflt_q_group, dflt_q_prio;
1031 	u16 dflt_q, report_q, val;
1032 
1033 	if (vsi->type != ICE_VSI_PF && vsi->type != ICE_VSI_CTRL &&
1034 	    vsi->type != ICE_VSI_VF && vsi->type != ICE_VSI_CHNL)
1035 		return;
1036 
1037 	val = ICE_AQ_VSI_PROP_FLOW_DIR_VALID;
1038 	ctxt->info.valid_sections |= cpu_to_le16(val);
1039 	dflt_q = 0;
1040 	dflt_q_group = 0;
1041 	report_q = 0;
1042 	dflt_q_prio = 0;
1043 
1044 	/* enable flow director filtering/programming */
1045 	val = ICE_AQ_VSI_FD_ENABLE | ICE_AQ_VSI_FD_PROG_ENABLE;
1046 	ctxt->info.fd_options = cpu_to_le16(val);
1047 	/* max of allocated flow director filters */
1048 	ctxt->info.max_fd_fltr_dedicated =
1049 			cpu_to_le16(vsi->num_gfltr);
1050 	/* max of shared flow director filters any VSI may program */
1051 	ctxt->info.max_fd_fltr_shared =
1052 			cpu_to_le16(vsi->num_bfltr);
1053 	/* default queue index within the VSI of the default FD */
1054 	val = ((dflt_q << ICE_AQ_VSI_FD_DEF_Q_S) &
1055 	       ICE_AQ_VSI_FD_DEF_Q_M);
1056 	/* target queue or queue group to the FD filter */
1057 	val |= ((dflt_q_group << ICE_AQ_VSI_FD_DEF_GRP_S) &
1058 		ICE_AQ_VSI_FD_DEF_GRP_M);
1059 	ctxt->info.fd_def_q = cpu_to_le16(val);
1060 	/* queue index on which FD filter completion is reported */
1061 	val = ((report_q << ICE_AQ_VSI_FD_REPORT_Q_S) &
1062 	       ICE_AQ_VSI_FD_REPORT_Q_M);
1063 	/* priority of the default qindex action */
1064 	val |= ((dflt_q_prio << ICE_AQ_VSI_FD_DEF_PRIORITY_S) &
1065 		ICE_AQ_VSI_FD_DEF_PRIORITY_M);
1066 	ctxt->info.fd_report_opt = cpu_to_le16(val);
1067 }
1068 
1069 /**
1070  * ice_set_rss_vsi_ctx - Set RSS VSI context before adding a VSI
1071  * @ctxt: the VSI context being set
1072  * @vsi: the VSI being configured
1073  */
1074 static void ice_set_rss_vsi_ctx(struct ice_vsi_ctx *ctxt, struct ice_vsi *vsi)
1075 {
1076 	u8 lut_type, hash_type;
1077 	struct device *dev;
1078 	struct ice_pf *pf;
1079 
1080 	pf = vsi->back;
1081 	dev = ice_pf_to_dev(pf);
1082 
1083 	switch (vsi->type) {
1084 	case ICE_VSI_CHNL:
1085 	case ICE_VSI_PF:
1086 		/* PF VSI will inherit RSS instance of PF */
1087 		lut_type = ICE_AQ_VSI_Q_OPT_RSS_LUT_PF;
1088 		hash_type = ICE_AQ_VSI_Q_OPT_RSS_TPLZ;
1089 		break;
1090 	case ICE_VSI_VF:
1091 		/* VF VSI will gets a small RSS table which is a VSI LUT type */
1092 		lut_type = ICE_AQ_VSI_Q_OPT_RSS_LUT_VSI;
1093 		hash_type = ICE_AQ_VSI_Q_OPT_RSS_TPLZ;
1094 		break;
1095 	default:
1096 		dev_dbg(dev, "Unsupported VSI type %s\n",
1097 			ice_vsi_type_str(vsi->type));
1098 		return;
1099 	}
1100 
1101 	ctxt->info.q_opt_rss = ((lut_type << ICE_AQ_VSI_Q_OPT_RSS_LUT_S) &
1102 				ICE_AQ_VSI_Q_OPT_RSS_LUT_M) |
1103 				((hash_type << ICE_AQ_VSI_Q_OPT_RSS_HASH_S) &
1104 				 ICE_AQ_VSI_Q_OPT_RSS_HASH_M);
1105 }
1106 
1107 static void
1108 ice_chnl_vsi_setup_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt)
1109 {
1110 	struct ice_pf *pf = vsi->back;
1111 	u16 qcount, qmap;
1112 	u8 offset = 0;
1113 	int pow;
1114 
1115 	qcount = min_t(int, vsi->num_rxq, pf->num_lan_msix);
1116 
1117 	pow = order_base_2(qcount);
1118 	qmap = ((offset << ICE_AQ_VSI_TC_Q_OFFSET_S) &
1119 		 ICE_AQ_VSI_TC_Q_OFFSET_M) |
1120 		 ((pow << ICE_AQ_VSI_TC_Q_NUM_S) &
1121 		   ICE_AQ_VSI_TC_Q_NUM_M);
1122 
1123 	ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
1124 	ctxt->info.mapping_flags |= cpu_to_le16(ICE_AQ_VSI_Q_MAP_CONTIG);
1125 	ctxt->info.q_mapping[0] = cpu_to_le16(vsi->next_base_q);
1126 	ctxt->info.q_mapping[1] = cpu_to_le16(qcount);
1127 }
1128 
1129 /**
1130  * ice_vsi_init - Create and initialize a VSI
1131  * @vsi: the VSI being configured
1132  * @init_vsi: is this call creating a VSI
1133  *
1134  * This initializes a VSI context depending on the VSI type to be added and
1135  * passes it down to the add_vsi aq command to create a new VSI.
1136  */
1137 static int ice_vsi_init(struct ice_vsi *vsi, bool init_vsi)
1138 {
1139 	struct ice_pf *pf = vsi->back;
1140 	struct ice_hw *hw = &pf->hw;
1141 	struct ice_vsi_ctx *ctxt;
1142 	struct device *dev;
1143 	int ret = 0;
1144 
1145 	dev = ice_pf_to_dev(pf);
1146 	ctxt = kzalloc(sizeof(*ctxt), GFP_KERNEL);
1147 	if (!ctxt)
1148 		return -ENOMEM;
1149 
1150 	switch (vsi->type) {
1151 	case ICE_VSI_CTRL:
1152 	case ICE_VSI_LB:
1153 	case ICE_VSI_PF:
1154 		ctxt->flags = ICE_AQ_VSI_TYPE_PF;
1155 		break;
1156 	case ICE_VSI_SWITCHDEV_CTRL:
1157 	case ICE_VSI_CHNL:
1158 		ctxt->flags = ICE_AQ_VSI_TYPE_VMDQ2;
1159 		break;
1160 	case ICE_VSI_VF:
1161 		ctxt->flags = ICE_AQ_VSI_TYPE_VF;
1162 		/* VF number here is the absolute VF number (0-255) */
1163 		ctxt->vf_num = vsi->vf->vf_id + hw->func_caps.vf_base_id;
1164 		break;
1165 	default:
1166 		ret = -ENODEV;
1167 		goto out;
1168 	}
1169 
1170 	/* Handle VLAN pruning for channel VSI if main VSI has VLAN
1171 	 * prune enabled
1172 	 */
1173 	if (vsi->type == ICE_VSI_CHNL) {
1174 		struct ice_vsi *main_vsi;
1175 
1176 		main_vsi = ice_get_main_vsi(pf);
1177 		if (main_vsi && ice_vsi_is_vlan_pruning_ena(main_vsi))
1178 			ctxt->info.sw_flags2 |=
1179 				ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA;
1180 		else
1181 			ctxt->info.sw_flags2 &=
1182 				~ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA;
1183 	}
1184 
1185 	ice_set_dflt_vsi_ctx(hw, ctxt);
1186 	if (test_bit(ICE_FLAG_FD_ENA, pf->flags))
1187 		ice_set_fd_vsi_ctx(ctxt, vsi);
1188 	/* if the switch is in VEB mode, allow VSI loopback */
1189 	if (vsi->vsw->bridge_mode == BRIDGE_MODE_VEB)
1190 		ctxt->info.sw_flags |= ICE_AQ_VSI_SW_FLAG_ALLOW_LB;
1191 
1192 	/* Set LUT type and HASH type if RSS is enabled */
1193 	if (test_bit(ICE_FLAG_RSS_ENA, pf->flags) &&
1194 	    vsi->type != ICE_VSI_CTRL) {
1195 		ice_set_rss_vsi_ctx(ctxt, vsi);
1196 		/* if updating VSI context, make sure to set valid_section:
1197 		 * to indicate which section of VSI context being updated
1198 		 */
1199 		if (!init_vsi)
1200 			ctxt->info.valid_sections |=
1201 				cpu_to_le16(ICE_AQ_VSI_PROP_Q_OPT_VALID);
1202 	}
1203 
1204 	ctxt->info.sw_id = vsi->port_info->sw_id;
1205 	if (vsi->type == ICE_VSI_CHNL) {
1206 		ice_chnl_vsi_setup_q_map(vsi, ctxt);
1207 	} else {
1208 		ret = ice_vsi_setup_q_map(vsi, ctxt);
1209 		if (ret)
1210 			goto out;
1211 
1212 		if (!init_vsi) /* means VSI being updated */
1213 			/* must to indicate which section of VSI context are
1214 			 * being modified
1215 			 */
1216 			ctxt->info.valid_sections |=
1217 				cpu_to_le16(ICE_AQ_VSI_PROP_RXQ_MAP_VALID);
1218 	}
1219 
1220 	/* Allow control frames out of main VSI */
1221 	if (vsi->type == ICE_VSI_PF) {
1222 		ctxt->info.sec_flags |= ICE_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD;
1223 		ctxt->info.valid_sections |=
1224 			cpu_to_le16(ICE_AQ_VSI_PROP_SECURITY_VALID);
1225 	}
1226 
1227 	if (init_vsi) {
1228 		ret = ice_add_vsi(hw, vsi->idx, ctxt, NULL);
1229 		if (ret) {
1230 			dev_err(dev, "Add VSI failed, err %d\n", ret);
1231 			ret = -EIO;
1232 			goto out;
1233 		}
1234 	} else {
1235 		ret = ice_update_vsi(hw, vsi->idx, ctxt, NULL);
1236 		if (ret) {
1237 			dev_err(dev, "Update VSI failed, err %d\n", ret);
1238 			ret = -EIO;
1239 			goto out;
1240 		}
1241 	}
1242 
1243 	/* keep context for update VSI operations */
1244 	vsi->info = ctxt->info;
1245 
1246 	/* record VSI number returned */
1247 	vsi->vsi_num = ctxt->vsi_num;
1248 
1249 out:
1250 	kfree(ctxt);
1251 	return ret;
1252 }
1253 
1254 /**
1255  * ice_free_res - free a block of resources
1256  * @res: pointer to the resource
1257  * @index: starting index previously returned by ice_get_res
1258  * @id: identifier to track owner
1259  *
1260  * Returns number of resources freed
1261  */
1262 int ice_free_res(struct ice_res_tracker *res, u16 index, u16 id)
1263 {
1264 	int count = 0;
1265 	int i;
1266 
1267 	if (!res || index >= res->end)
1268 		return -EINVAL;
1269 
1270 	id |= ICE_RES_VALID_BIT;
1271 	for (i = index; i < res->end && res->list[i] == id; i++) {
1272 		res->list[i] = 0;
1273 		count++;
1274 	}
1275 
1276 	return count;
1277 }
1278 
1279 /**
1280  * ice_search_res - Search the tracker for a block of resources
1281  * @res: pointer to the resource
1282  * @needed: size of the block needed
1283  * @id: identifier to track owner
1284  *
1285  * Returns the base item index of the block, or -ENOMEM for error
1286  */
1287 static int ice_search_res(struct ice_res_tracker *res, u16 needed, u16 id)
1288 {
1289 	u16 start = 0, end = 0;
1290 
1291 	if (needed > res->end)
1292 		return -ENOMEM;
1293 
1294 	id |= ICE_RES_VALID_BIT;
1295 
1296 	do {
1297 		/* skip already allocated entries */
1298 		if (res->list[end++] & ICE_RES_VALID_BIT) {
1299 			start = end;
1300 			if ((start + needed) > res->end)
1301 				break;
1302 		}
1303 
1304 		if (end == (start + needed)) {
1305 			int i = start;
1306 
1307 			/* there was enough, so assign it to the requestor */
1308 			while (i != end)
1309 				res->list[i++] = id;
1310 
1311 			return start;
1312 		}
1313 	} while (end < res->end);
1314 
1315 	return -ENOMEM;
1316 }
1317 
1318 /**
1319  * ice_get_free_res_count - Get free count from a resource tracker
1320  * @res: Resource tracker instance
1321  */
1322 static u16 ice_get_free_res_count(struct ice_res_tracker *res)
1323 {
1324 	u16 i, count = 0;
1325 
1326 	for (i = 0; i < res->end; i++)
1327 		if (!(res->list[i] & ICE_RES_VALID_BIT))
1328 			count++;
1329 
1330 	return count;
1331 }
1332 
1333 /**
1334  * ice_get_res - get a block of resources
1335  * @pf: board private structure
1336  * @res: pointer to the resource
1337  * @needed: size of the block needed
1338  * @id: identifier to track owner
1339  *
1340  * Returns the base item index of the block, or negative for error
1341  */
1342 int
1343 ice_get_res(struct ice_pf *pf, struct ice_res_tracker *res, u16 needed, u16 id)
1344 {
1345 	if (!res || !pf)
1346 		return -EINVAL;
1347 
1348 	if (!needed || needed > res->num_entries || id >= ICE_RES_VALID_BIT) {
1349 		dev_err(ice_pf_to_dev(pf), "param err: needed=%d, num_entries = %d id=0x%04x\n",
1350 			needed, res->num_entries, id);
1351 		return -EINVAL;
1352 	}
1353 
1354 	return ice_search_res(res, needed, id);
1355 }
1356 
1357 /**
1358  * ice_get_vf_ctrl_res - Get VF control VSI resource
1359  * @pf: pointer to the PF structure
1360  * @vsi: the VSI to allocate a resource for
1361  *
1362  * Look up whether another VF has already allocated the control VSI resource.
1363  * If so, re-use this resource so that we share it among all VFs.
1364  *
1365  * Otherwise, allocate the resource and return it.
1366  */
1367 static int ice_get_vf_ctrl_res(struct ice_pf *pf, struct ice_vsi *vsi)
1368 {
1369 	struct ice_vf *vf;
1370 	unsigned int bkt;
1371 	int base;
1372 
1373 	rcu_read_lock();
1374 	ice_for_each_vf_rcu(pf, bkt, vf) {
1375 		if (vf != vsi->vf && vf->ctrl_vsi_idx != ICE_NO_VSI) {
1376 			base = pf->vsi[vf->ctrl_vsi_idx]->base_vector;
1377 			rcu_read_unlock();
1378 			return base;
1379 		}
1380 	}
1381 	rcu_read_unlock();
1382 
1383 	return ice_get_res(pf, pf->irq_tracker, vsi->num_q_vectors,
1384 			   ICE_RES_VF_CTRL_VEC_ID);
1385 }
1386 
1387 /**
1388  * ice_vsi_setup_vector_base - Set up the base vector for the given VSI
1389  * @vsi: ptr to the VSI
1390  *
1391  * This should only be called after ice_vsi_alloc() which allocates the
1392  * corresponding SW VSI structure and initializes num_queue_pairs for the
1393  * newly allocated VSI.
1394  *
1395  * Returns 0 on success or negative on failure
1396  */
1397 static int ice_vsi_setup_vector_base(struct ice_vsi *vsi)
1398 {
1399 	struct ice_pf *pf = vsi->back;
1400 	struct device *dev;
1401 	u16 num_q_vectors;
1402 	int base;
1403 
1404 	dev = ice_pf_to_dev(pf);
1405 	/* SRIOV doesn't grab irq_tracker entries for each VSI */
1406 	if (vsi->type == ICE_VSI_VF)
1407 		return 0;
1408 	if (vsi->type == ICE_VSI_CHNL)
1409 		return 0;
1410 
1411 	if (vsi->base_vector) {
1412 		dev_dbg(dev, "VSI %d has non-zero base vector %d\n",
1413 			vsi->vsi_num, vsi->base_vector);
1414 		return -EEXIST;
1415 	}
1416 
1417 	num_q_vectors = vsi->num_q_vectors;
1418 	/* reserve slots from OS requested IRQs */
1419 	if (vsi->type == ICE_VSI_CTRL && vsi->vf) {
1420 		base = ice_get_vf_ctrl_res(pf, vsi);
1421 	} else {
1422 		base = ice_get_res(pf, pf->irq_tracker, num_q_vectors,
1423 				   vsi->idx);
1424 	}
1425 
1426 	if (base < 0) {
1427 		dev_err(dev, "%d MSI-X interrupts available. %s %d failed to get %d MSI-X vectors\n",
1428 			ice_get_free_res_count(pf->irq_tracker),
1429 			ice_vsi_type_str(vsi->type), vsi->idx, num_q_vectors);
1430 		return -ENOENT;
1431 	}
1432 	vsi->base_vector = (u16)base;
1433 	pf->num_avail_sw_msix -= num_q_vectors;
1434 
1435 	return 0;
1436 }
1437 
1438 /**
1439  * ice_vsi_clear_rings - Deallocates the Tx and Rx rings for VSI
1440  * @vsi: the VSI having rings deallocated
1441  */
1442 static void ice_vsi_clear_rings(struct ice_vsi *vsi)
1443 {
1444 	int i;
1445 
1446 	/* Avoid stale references by clearing map from vector to ring */
1447 	if (vsi->q_vectors) {
1448 		ice_for_each_q_vector(vsi, i) {
1449 			struct ice_q_vector *q_vector = vsi->q_vectors[i];
1450 
1451 			if (q_vector) {
1452 				q_vector->tx.tx_ring = NULL;
1453 				q_vector->rx.rx_ring = NULL;
1454 			}
1455 		}
1456 	}
1457 
1458 	if (vsi->tx_rings) {
1459 		ice_for_each_alloc_txq(vsi, i) {
1460 			if (vsi->tx_rings[i]) {
1461 				kfree_rcu(vsi->tx_rings[i], rcu);
1462 				WRITE_ONCE(vsi->tx_rings[i], NULL);
1463 			}
1464 		}
1465 	}
1466 	if (vsi->rx_rings) {
1467 		ice_for_each_alloc_rxq(vsi, i) {
1468 			if (vsi->rx_rings[i]) {
1469 				kfree_rcu(vsi->rx_rings[i], rcu);
1470 				WRITE_ONCE(vsi->rx_rings[i], NULL);
1471 			}
1472 		}
1473 	}
1474 }
1475 
1476 /**
1477  * ice_vsi_alloc_rings - Allocates Tx and Rx rings for the VSI
1478  * @vsi: VSI which is having rings allocated
1479  */
1480 static int ice_vsi_alloc_rings(struct ice_vsi *vsi)
1481 {
1482 	bool dvm_ena = ice_is_dvm_ena(&vsi->back->hw);
1483 	struct ice_pf *pf = vsi->back;
1484 	struct device *dev;
1485 	u16 i;
1486 
1487 	dev = ice_pf_to_dev(pf);
1488 	/* Allocate Tx rings */
1489 	ice_for_each_alloc_txq(vsi, i) {
1490 		struct ice_tx_ring *ring;
1491 
1492 		/* allocate with kzalloc(), free with kfree_rcu() */
1493 		ring = kzalloc(sizeof(*ring), GFP_KERNEL);
1494 
1495 		if (!ring)
1496 			goto err_out;
1497 
1498 		ring->q_index = i;
1499 		ring->reg_idx = vsi->txq_map[i];
1500 		ring->vsi = vsi;
1501 		ring->tx_tstamps = &pf->ptp.port.tx;
1502 		ring->dev = dev;
1503 		ring->count = vsi->num_tx_desc;
1504 		ring->txq_teid = ICE_INVAL_TEID;
1505 		if (dvm_ena)
1506 			ring->flags |= ICE_TX_FLAGS_RING_VLAN_L2TAG2;
1507 		else
1508 			ring->flags |= ICE_TX_FLAGS_RING_VLAN_L2TAG1;
1509 		WRITE_ONCE(vsi->tx_rings[i], ring);
1510 	}
1511 
1512 	/* Allocate Rx rings */
1513 	ice_for_each_alloc_rxq(vsi, i) {
1514 		struct ice_rx_ring *ring;
1515 
1516 		/* allocate with kzalloc(), free with kfree_rcu() */
1517 		ring = kzalloc(sizeof(*ring), GFP_KERNEL);
1518 		if (!ring)
1519 			goto err_out;
1520 
1521 		ring->q_index = i;
1522 		ring->reg_idx = vsi->rxq_map[i];
1523 		ring->vsi = vsi;
1524 		ring->netdev = vsi->netdev;
1525 		ring->dev = dev;
1526 		ring->count = vsi->num_rx_desc;
1527 		WRITE_ONCE(vsi->rx_rings[i], ring);
1528 	}
1529 
1530 	return 0;
1531 
1532 err_out:
1533 	ice_vsi_clear_rings(vsi);
1534 	return -ENOMEM;
1535 }
1536 
1537 /**
1538  * ice_vsi_manage_rss_lut - disable/enable RSS
1539  * @vsi: the VSI being changed
1540  * @ena: boolean value indicating if this is an enable or disable request
1541  *
1542  * In the event of disable request for RSS, this function will zero out RSS
1543  * LUT, while in the event of enable request for RSS, it will reconfigure RSS
1544  * LUT.
1545  */
1546 void ice_vsi_manage_rss_lut(struct ice_vsi *vsi, bool ena)
1547 {
1548 	u8 *lut;
1549 
1550 	lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
1551 	if (!lut)
1552 		return;
1553 
1554 	if (ena) {
1555 		if (vsi->rss_lut_user)
1556 			memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
1557 		else
1558 			ice_fill_rss_lut(lut, vsi->rss_table_size,
1559 					 vsi->rss_size);
1560 	}
1561 
1562 	ice_set_rss_lut(vsi, lut, vsi->rss_table_size);
1563 	kfree(lut);
1564 }
1565 
1566 /**
1567  * ice_vsi_cfg_rss_lut_key - Configure RSS params for a VSI
1568  * @vsi: VSI to be configured
1569  */
1570 int ice_vsi_cfg_rss_lut_key(struct ice_vsi *vsi)
1571 {
1572 	struct ice_pf *pf = vsi->back;
1573 	struct device *dev;
1574 	u8 *lut, *key;
1575 	int err;
1576 
1577 	dev = ice_pf_to_dev(pf);
1578 	if (vsi->type == ICE_VSI_PF && vsi->ch_rss_size &&
1579 	    (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))) {
1580 		vsi->rss_size = min_t(u16, vsi->rss_size, vsi->ch_rss_size);
1581 	} else {
1582 		vsi->rss_size = min_t(u16, vsi->rss_size, vsi->num_rxq);
1583 
1584 		/* If orig_rss_size is valid and it is less than determined
1585 		 * main VSI's rss_size, update main VSI's rss_size to be
1586 		 * orig_rss_size so that when tc-qdisc is deleted, main VSI
1587 		 * RSS table gets programmed to be correct (whatever it was
1588 		 * to begin with (prior to setup-tc for ADQ config)
1589 		 */
1590 		if (vsi->orig_rss_size && vsi->rss_size < vsi->orig_rss_size &&
1591 		    vsi->orig_rss_size <= vsi->num_rxq) {
1592 			vsi->rss_size = vsi->orig_rss_size;
1593 			/* now orig_rss_size is used, reset it to zero */
1594 			vsi->orig_rss_size = 0;
1595 		}
1596 	}
1597 
1598 	lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
1599 	if (!lut)
1600 		return -ENOMEM;
1601 
1602 	if (vsi->rss_lut_user)
1603 		memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
1604 	else
1605 		ice_fill_rss_lut(lut, vsi->rss_table_size, vsi->rss_size);
1606 
1607 	err = ice_set_rss_lut(vsi, lut, vsi->rss_table_size);
1608 	if (err) {
1609 		dev_err(dev, "set_rss_lut failed, error %d\n", err);
1610 		goto ice_vsi_cfg_rss_exit;
1611 	}
1612 
1613 	key = kzalloc(ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE, GFP_KERNEL);
1614 	if (!key) {
1615 		err = -ENOMEM;
1616 		goto ice_vsi_cfg_rss_exit;
1617 	}
1618 
1619 	if (vsi->rss_hkey_user)
1620 		memcpy(key, vsi->rss_hkey_user, ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE);
1621 	else
1622 		netdev_rss_key_fill((void *)key, ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE);
1623 
1624 	err = ice_set_rss_key(vsi, key);
1625 	if (err)
1626 		dev_err(dev, "set_rss_key failed, error %d\n", err);
1627 
1628 	kfree(key);
1629 ice_vsi_cfg_rss_exit:
1630 	kfree(lut);
1631 	return err;
1632 }
1633 
1634 /**
1635  * ice_vsi_set_vf_rss_flow_fld - Sets VF VSI RSS input set for different flows
1636  * @vsi: VSI to be configured
1637  *
1638  * This function will only be called during the VF VSI setup. Upon successful
1639  * completion of package download, this function will configure default RSS
1640  * input sets for VF VSI.
1641  */
1642 static void ice_vsi_set_vf_rss_flow_fld(struct ice_vsi *vsi)
1643 {
1644 	struct ice_pf *pf = vsi->back;
1645 	struct device *dev;
1646 	int status;
1647 
1648 	dev = ice_pf_to_dev(pf);
1649 	if (ice_is_safe_mode(pf)) {
1650 		dev_dbg(dev, "Advanced RSS disabled. Package download failed, vsi num = %d\n",
1651 			vsi->vsi_num);
1652 		return;
1653 	}
1654 
1655 	status = ice_add_avf_rss_cfg(&pf->hw, vsi->idx, ICE_DEFAULT_RSS_HENA);
1656 	if (status)
1657 		dev_dbg(dev, "ice_add_avf_rss_cfg failed for vsi = %d, error = %d\n",
1658 			vsi->vsi_num, status);
1659 }
1660 
1661 /**
1662  * ice_vsi_set_rss_flow_fld - Sets RSS input set for different flows
1663  * @vsi: VSI to be configured
1664  *
1665  * This function will only be called after successful download package call
1666  * during initialization of PF. Since the downloaded package will erase the
1667  * RSS section, this function will configure RSS input sets for different
1668  * flow types. The last profile added has the highest priority, therefore 2
1669  * tuple profiles (i.e. IPv4 src/dst) are added before 4 tuple profiles
1670  * (i.e. IPv4 src/dst TCP src/dst port).
1671  */
1672 static void ice_vsi_set_rss_flow_fld(struct ice_vsi *vsi)
1673 {
1674 	u16 vsi_handle = vsi->idx, vsi_num = vsi->vsi_num;
1675 	struct ice_pf *pf = vsi->back;
1676 	struct ice_hw *hw = &pf->hw;
1677 	struct device *dev;
1678 	int status;
1679 
1680 	dev = ice_pf_to_dev(pf);
1681 	if (ice_is_safe_mode(pf)) {
1682 		dev_dbg(dev, "Advanced RSS disabled. Package download failed, vsi num = %d\n",
1683 			vsi_num);
1684 		return;
1685 	}
1686 	/* configure RSS for IPv4 with input set IP src/dst */
1687 	status = ice_add_rss_cfg(hw, vsi_handle, ICE_FLOW_HASH_IPV4,
1688 				 ICE_FLOW_SEG_HDR_IPV4);
1689 	if (status)
1690 		dev_dbg(dev, "ice_add_rss_cfg failed for ipv4 flow, vsi = %d, error = %d\n",
1691 			vsi_num, status);
1692 
1693 	/* configure RSS for IPv6 with input set IPv6 src/dst */
1694 	status = ice_add_rss_cfg(hw, vsi_handle, ICE_FLOW_HASH_IPV6,
1695 				 ICE_FLOW_SEG_HDR_IPV6);
1696 	if (status)
1697 		dev_dbg(dev, "ice_add_rss_cfg failed for ipv6 flow, vsi = %d, error = %d\n",
1698 			vsi_num, status);
1699 
1700 	/* configure RSS for tcp4 with input set IP src/dst, TCP src/dst */
1701 	status = ice_add_rss_cfg(hw, vsi_handle, ICE_HASH_TCP_IPV4,
1702 				 ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV4);
1703 	if (status)
1704 		dev_dbg(dev, "ice_add_rss_cfg failed for tcp4 flow, vsi = %d, error = %d\n",
1705 			vsi_num, status);
1706 
1707 	/* configure RSS for udp4 with input set IP src/dst, UDP src/dst */
1708 	status = ice_add_rss_cfg(hw, vsi_handle, ICE_HASH_UDP_IPV4,
1709 				 ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV4);
1710 	if (status)
1711 		dev_dbg(dev, "ice_add_rss_cfg failed for udp4 flow, vsi = %d, error = %d\n",
1712 			vsi_num, status);
1713 
1714 	/* configure RSS for sctp4 with input set IP src/dst */
1715 	status = ice_add_rss_cfg(hw, vsi_handle, ICE_FLOW_HASH_IPV4,
1716 				 ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV4);
1717 	if (status)
1718 		dev_dbg(dev, "ice_add_rss_cfg failed for sctp4 flow, vsi = %d, error = %d\n",
1719 			vsi_num, status);
1720 
1721 	/* configure RSS for tcp6 with input set IPv6 src/dst, TCP src/dst */
1722 	status = ice_add_rss_cfg(hw, vsi_handle, ICE_HASH_TCP_IPV6,
1723 				 ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV6);
1724 	if (status)
1725 		dev_dbg(dev, "ice_add_rss_cfg failed for tcp6 flow, vsi = %d, error = %d\n",
1726 			vsi_num, status);
1727 
1728 	/* configure RSS for udp6 with input set IPv6 src/dst, UDP src/dst */
1729 	status = ice_add_rss_cfg(hw, vsi_handle, ICE_HASH_UDP_IPV6,
1730 				 ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV6);
1731 	if (status)
1732 		dev_dbg(dev, "ice_add_rss_cfg failed for udp6 flow, vsi = %d, error = %d\n",
1733 			vsi_num, status);
1734 
1735 	/* configure RSS for sctp6 with input set IPv6 src/dst */
1736 	status = ice_add_rss_cfg(hw, vsi_handle, ICE_FLOW_HASH_IPV6,
1737 				 ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV6);
1738 	if (status)
1739 		dev_dbg(dev, "ice_add_rss_cfg failed for sctp6 flow, vsi = %d, error = %d\n",
1740 			vsi_num, status);
1741 
1742 	status = ice_add_rss_cfg(hw, vsi_handle, ICE_FLOW_HASH_ESP_SPI,
1743 				 ICE_FLOW_SEG_HDR_ESP);
1744 	if (status)
1745 		dev_dbg(dev, "ice_add_rss_cfg failed for esp/spi flow, vsi = %d, error = %d\n",
1746 			vsi_num, status);
1747 }
1748 
1749 /**
1750  * ice_pf_state_is_nominal - checks the PF for nominal state
1751  * @pf: pointer to PF to check
1752  *
1753  * Check the PF's state for a collection of bits that would indicate
1754  * the PF is in a state that would inhibit normal operation for
1755  * driver functionality.
1756  *
1757  * Returns true if PF is in a nominal state, false otherwise
1758  */
1759 bool ice_pf_state_is_nominal(struct ice_pf *pf)
1760 {
1761 	DECLARE_BITMAP(check_bits, ICE_STATE_NBITS) = { 0 };
1762 
1763 	if (!pf)
1764 		return false;
1765 
1766 	bitmap_set(check_bits, 0, ICE_STATE_NOMINAL_CHECK_BITS);
1767 	if (bitmap_intersects(pf->state, check_bits, ICE_STATE_NBITS))
1768 		return false;
1769 
1770 	return true;
1771 }
1772 
1773 /**
1774  * ice_update_eth_stats - Update VSI-specific ethernet statistics counters
1775  * @vsi: the VSI to be updated
1776  */
1777 void ice_update_eth_stats(struct ice_vsi *vsi)
1778 {
1779 	struct ice_eth_stats *prev_es, *cur_es;
1780 	struct ice_hw *hw = &vsi->back->hw;
1781 	u16 vsi_num = vsi->vsi_num;    /* HW absolute index of a VSI */
1782 
1783 	prev_es = &vsi->eth_stats_prev;
1784 	cur_es = &vsi->eth_stats;
1785 
1786 	ice_stat_update40(hw, GLV_GORCL(vsi_num), vsi->stat_offsets_loaded,
1787 			  &prev_es->rx_bytes, &cur_es->rx_bytes);
1788 
1789 	ice_stat_update40(hw, GLV_UPRCL(vsi_num), vsi->stat_offsets_loaded,
1790 			  &prev_es->rx_unicast, &cur_es->rx_unicast);
1791 
1792 	ice_stat_update40(hw, GLV_MPRCL(vsi_num), vsi->stat_offsets_loaded,
1793 			  &prev_es->rx_multicast, &cur_es->rx_multicast);
1794 
1795 	ice_stat_update40(hw, GLV_BPRCL(vsi_num), vsi->stat_offsets_loaded,
1796 			  &prev_es->rx_broadcast, &cur_es->rx_broadcast);
1797 
1798 	ice_stat_update32(hw, GLV_RDPC(vsi_num), vsi->stat_offsets_loaded,
1799 			  &prev_es->rx_discards, &cur_es->rx_discards);
1800 
1801 	ice_stat_update40(hw, GLV_GOTCL(vsi_num), vsi->stat_offsets_loaded,
1802 			  &prev_es->tx_bytes, &cur_es->tx_bytes);
1803 
1804 	ice_stat_update40(hw, GLV_UPTCL(vsi_num), vsi->stat_offsets_loaded,
1805 			  &prev_es->tx_unicast, &cur_es->tx_unicast);
1806 
1807 	ice_stat_update40(hw, GLV_MPTCL(vsi_num), vsi->stat_offsets_loaded,
1808 			  &prev_es->tx_multicast, &cur_es->tx_multicast);
1809 
1810 	ice_stat_update40(hw, GLV_BPTCL(vsi_num), vsi->stat_offsets_loaded,
1811 			  &prev_es->tx_broadcast, &cur_es->tx_broadcast);
1812 
1813 	ice_stat_update32(hw, GLV_TEPC(vsi_num), vsi->stat_offsets_loaded,
1814 			  &prev_es->tx_errors, &cur_es->tx_errors);
1815 
1816 	vsi->stat_offsets_loaded = true;
1817 }
1818 
1819 /**
1820  * ice_vsi_cfg_frame_size - setup max frame size and Rx buffer length
1821  * @vsi: VSI
1822  */
1823 void ice_vsi_cfg_frame_size(struct ice_vsi *vsi)
1824 {
1825 	if (!vsi->netdev || test_bit(ICE_FLAG_LEGACY_RX, vsi->back->flags)) {
1826 		vsi->max_frame = ICE_AQ_SET_MAC_FRAME_SIZE_MAX;
1827 		vsi->rx_buf_len = ICE_RXBUF_2048;
1828 #if (PAGE_SIZE < 8192)
1829 	} else if (!ICE_2K_TOO_SMALL_WITH_PADDING &&
1830 		   (vsi->netdev->mtu <= ETH_DATA_LEN)) {
1831 		vsi->max_frame = ICE_RXBUF_1536 - NET_IP_ALIGN;
1832 		vsi->rx_buf_len = ICE_RXBUF_1536 - NET_IP_ALIGN;
1833 #endif
1834 	} else {
1835 		vsi->max_frame = ICE_AQ_SET_MAC_FRAME_SIZE_MAX;
1836 #if (PAGE_SIZE < 8192)
1837 		vsi->rx_buf_len = ICE_RXBUF_3072;
1838 #else
1839 		vsi->rx_buf_len = ICE_RXBUF_2048;
1840 #endif
1841 	}
1842 }
1843 
1844 /**
1845  * ice_write_qrxflxp_cntxt - write/configure QRXFLXP_CNTXT register
1846  * @hw: HW pointer
1847  * @pf_q: index of the Rx queue in the PF's queue space
1848  * @rxdid: flexible descriptor RXDID
1849  * @prio: priority for the RXDID for this queue
1850  * @ena_ts: true to enable timestamp and false to disable timestamp
1851  */
1852 void
1853 ice_write_qrxflxp_cntxt(struct ice_hw *hw, u16 pf_q, u32 rxdid, u32 prio,
1854 			bool ena_ts)
1855 {
1856 	int regval = rd32(hw, QRXFLXP_CNTXT(pf_q));
1857 
1858 	/* clear any previous values */
1859 	regval &= ~(QRXFLXP_CNTXT_RXDID_IDX_M |
1860 		    QRXFLXP_CNTXT_RXDID_PRIO_M |
1861 		    QRXFLXP_CNTXT_TS_M);
1862 
1863 	regval |= (rxdid << QRXFLXP_CNTXT_RXDID_IDX_S) &
1864 		QRXFLXP_CNTXT_RXDID_IDX_M;
1865 
1866 	regval |= (prio << QRXFLXP_CNTXT_RXDID_PRIO_S) &
1867 		QRXFLXP_CNTXT_RXDID_PRIO_M;
1868 
1869 	if (ena_ts)
1870 		/* Enable TimeSync on this queue */
1871 		regval |= QRXFLXP_CNTXT_TS_M;
1872 
1873 	wr32(hw, QRXFLXP_CNTXT(pf_q), regval);
1874 }
1875 
1876 int ice_vsi_cfg_single_rxq(struct ice_vsi *vsi, u16 q_idx)
1877 {
1878 	if (q_idx >= vsi->num_rxq)
1879 		return -EINVAL;
1880 
1881 	return ice_vsi_cfg_rxq(vsi->rx_rings[q_idx]);
1882 }
1883 
1884 int ice_vsi_cfg_single_txq(struct ice_vsi *vsi, struct ice_tx_ring **tx_rings, u16 q_idx)
1885 {
1886 	struct ice_aqc_add_tx_qgrp *qg_buf;
1887 	int err;
1888 
1889 	if (q_idx >= vsi->alloc_txq || !tx_rings || !tx_rings[q_idx])
1890 		return -EINVAL;
1891 
1892 	qg_buf = kzalloc(struct_size(qg_buf, txqs, 1), GFP_KERNEL);
1893 	if (!qg_buf)
1894 		return -ENOMEM;
1895 
1896 	qg_buf->num_txqs = 1;
1897 
1898 	err = ice_vsi_cfg_txq(vsi, tx_rings[q_idx], qg_buf);
1899 	kfree(qg_buf);
1900 	return err;
1901 }
1902 
1903 /**
1904  * ice_vsi_cfg_rxqs - Configure the VSI for Rx
1905  * @vsi: the VSI being configured
1906  *
1907  * Return 0 on success and a negative value on error
1908  * Configure the Rx VSI for operation.
1909  */
1910 int ice_vsi_cfg_rxqs(struct ice_vsi *vsi)
1911 {
1912 	u16 i;
1913 
1914 	if (vsi->type == ICE_VSI_VF)
1915 		goto setup_rings;
1916 
1917 	ice_vsi_cfg_frame_size(vsi);
1918 setup_rings:
1919 	/* set up individual rings */
1920 	ice_for_each_rxq(vsi, i) {
1921 		int err = ice_vsi_cfg_rxq(vsi->rx_rings[i]);
1922 
1923 		if (err)
1924 			return err;
1925 	}
1926 
1927 	return 0;
1928 }
1929 
1930 /**
1931  * ice_vsi_cfg_txqs - Configure the VSI for Tx
1932  * @vsi: the VSI being configured
1933  * @rings: Tx ring array to be configured
1934  * @count: number of Tx ring array elements
1935  *
1936  * Return 0 on success and a negative value on error
1937  * Configure the Tx VSI for operation.
1938  */
1939 static int
1940 ice_vsi_cfg_txqs(struct ice_vsi *vsi, struct ice_tx_ring **rings, u16 count)
1941 {
1942 	struct ice_aqc_add_tx_qgrp *qg_buf;
1943 	u16 q_idx = 0;
1944 	int err = 0;
1945 
1946 	qg_buf = kzalloc(struct_size(qg_buf, txqs, 1), GFP_KERNEL);
1947 	if (!qg_buf)
1948 		return -ENOMEM;
1949 
1950 	qg_buf->num_txqs = 1;
1951 
1952 	for (q_idx = 0; q_idx < count; q_idx++) {
1953 		err = ice_vsi_cfg_txq(vsi, rings[q_idx], qg_buf);
1954 		if (err)
1955 			goto err_cfg_txqs;
1956 	}
1957 
1958 err_cfg_txqs:
1959 	kfree(qg_buf);
1960 	return err;
1961 }
1962 
1963 /**
1964  * ice_vsi_cfg_lan_txqs - Configure the VSI for Tx
1965  * @vsi: the VSI being configured
1966  *
1967  * Return 0 on success and a negative value on error
1968  * Configure the Tx VSI for operation.
1969  */
1970 int ice_vsi_cfg_lan_txqs(struct ice_vsi *vsi)
1971 {
1972 	return ice_vsi_cfg_txqs(vsi, vsi->tx_rings, vsi->num_txq);
1973 }
1974 
1975 /**
1976  * ice_vsi_cfg_xdp_txqs - Configure Tx queues dedicated for XDP in given VSI
1977  * @vsi: the VSI being configured
1978  *
1979  * Return 0 on success and a negative value on error
1980  * Configure the Tx queues dedicated for XDP in given VSI for operation.
1981  */
1982 int ice_vsi_cfg_xdp_txqs(struct ice_vsi *vsi)
1983 {
1984 	int ret;
1985 	int i;
1986 
1987 	ret = ice_vsi_cfg_txqs(vsi, vsi->xdp_rings, vsi->num_xdp_txq);
1988 	if (ret)
1989 		return ret;
1990 
1991 	ice_for_each_rxq(vsi, i)
1992 		ice_tx_xsk_pool(vsi, i);
1993 
1994 	return ret;
1995 }
1996 
1997 /**
1998  * ice_intrl_usec_to_reg - convert interrupt rate limit to register value
1999  * @intrl: interrupt rate limit in usecs
2000  * @gran: interrupt rate limit granularity in usecs
2001  *
2002  * This function converts a decimal interrupt rate limit in usecs to the format
2003  * expected by firmware.
2004  */
2005 static u32 ice_intrl_usec_to_reg(u8 intrl, u8 gran)
2006 {
2007 	u32 val = intrl / gran;
2008 
2009 	if (val)
2010 		return val | GLINT_RATE_INTRL_ENA_M;
2011 	return 0;
2012 }
2013 
2014 /**
2015  * ice_write_intrl - write throttle rate limit to interrupt specific register
2016  * @q_vector: pointer to interrupt specific structure
2017  * @intrl: throttle rate limit in microseconds to write
2018  */
2019 void ice_write_intrl(struct ice_q_vector *q_vector, u8 intrl)
2020 {
2021 	struct ice_hw *hw = &q_vector->vsi->back->hw;
2022 
2023 	wr32(hw, GLINT_RATE(q_vector->reg_idx),
2024 	     ice_intrl_usec_to_reg(intrl, ICE_INTRL_GRAN_ABOVE_25));
2025 }
2026 
2027 static struct ice_q_vector *ice_pull_qvec_from_rc(struct ice_ring_container *rc)
2028 {
2029 	switch (rc->type) {
2030 	case ICE_RX_CONTAINER:
2031 		if (rc->rx_ring)
2032 			return rc->rx_ring->q_vector;
2033 		break;
2034 	case ICE_TX_CONTAINER:
2035 		if (rc->tx_ring)
2036 			return rc->tx_ring->q_vector;
2037 		break;
2038 	default:
2039 		break;
2040 	}
2041 
2042 	return NULL;
2043 }
2044 
2045 /**
2046  * __ice_write_itr - write throttle rate to register
2047  * @q_vector: pointer to interrupt data structure
2048  * @rc: pointer to ring container
2049  * @itr: throttle rate in microseconds to write
2050  */
2051 static void __ice_write_itr(struct ice_q_vector *q_vector,
2052 			    struct ice_ring_container *rc, u16 itr)
2053 {
2054 	struct ice_hw *hw = &q_vector->vsi->back->hw;
2055 
2056 	wr32(hw, GLINT_ITR(rc->itr_idx, q_vector->reg_idx),
2057 	     ITR_REG_ALIGN(itr) >> ICE_ITR_GRAN_S);
2058 }
2059 
2060 /**
2061  * ice_write_itr - write throttle rate to queue specific register
2062  * @rc: pointer to ring container
2063  * @itr: throttle rate in microseconds to write
2064  */
2065 void ice_write_itr(struct ice_ring_container *rc, u16 itr)
2066 {
2067 	struct ice_q_vector *q_vector;
2068 
2069 	q_vector = ice_pull_qvec_from_rc(rc);
2070 	if (!q_vector)
2071 		return;
2072 
2073 	__ice_write_itr(q_vector, rc, itr);
2074 }
2075 
2076 /**
2077  * ice_set_q_vector_intrl - set up interrupt rate limiting
2078  * @q_vector: the vector to be configured
2079  *
2080  * Interrupt rate limiting is local to the vector, not per-queue so we must
2081  * detect if either ring container has dynamic moderation enabled to decide
2082  * what to set the interrupt rate limit to via INTRL settings. In the case that
2083  * dynamic moderation is disabled on both, write the value with the cached
2084  * setting to make sure INTRL register matches the user visible value.
2085  */
2086 void ice_set_q_vector_intrl(struct ice_q_vector *q_vector)
2087 {
2088 	if (ITR_IS_DYNAMIC(&q_vector->tx) || ITR_IS_DYNAMIC(&q_vector->rx)) {
2089 		/* in the case of dynamic enabled, cap each vector to no more
2090 		 * than (4 us) 250,000 ints/sec, which allows low latency
2091 		 * but still less than 500,000 interrupts per second, which
2092 		 * reduces CPU a bit in the case of the lowest latency
2093 		 * setting. The 4 here is a value in microseconds.
2094 		 */
2095 		ice_write_intrl(q_vector, 4);
2096 	} else {
2097 		ice_write_intrl(q_vector, q_vector->intrl);
2098 	}
2099 }
2100 
2101 /**
2102  * ice_vsi_cfg_msix - MSIX mode Interrupt Config in the HW
2103  * @vsi: the VSI being configured
2104  *
2105  * This configures MSIX mode interrupts for the PF VSI, and should not be used
2106  * for the VF VSI.
2107  */
2108 void ice_vsi_cfg_msix(struct ice_vsi *vsi)
2109 {
2110 	struct ice_pf *pf = vsi->back;
2111 	struct ice_hw *hw = &pf->hw;
2112 	u16 txq = 0, rxq = 0;
2113 	int i, q;
2114 
2115 	ice_for_each_q_vector(vsi, i) {
2116 		struct ice_q_vector *q_vector = vsi->q_vectors[i];
2117 		u16 reg_idx = q_vector->reg_idx;
2118 
2119 		ice_cfg_itr(hw, q_vector);
2120 
2121 		/* Both Transmit Queue Interrupt Cause Control register
2122 		 * and Receive Queue Interrupt Cause control register
2123 		 * expects MSIX_INDX field to be the vector index
2124 		 * within the function space and not the absolute
2125 		 * vector index across PF or across device.
2126 		 * For SR-IOV VF VSIs queue vector index always starts
2127 		 * with 1 since first vector index(0) is used for OICR
2128 		 * in VF space. Since VMDq and other PF VSIs are within
2129 		 * the PF function space, use the vector index that is
2130 		 * tracked for this PF.
2131 		 */
2132 		for (q = 0; q < q_vector->num_ring_tx; q++) {
2133 			ice_cfg_txq_interrupt(vsi, txq, reg_idx,
2134 					      q_vector->tx.itr_idx);
2135 			txq++;
2136 		}
2137 
2138 		for (q = 0; q < q_vector->num_ring_rx; q++) {
2139 			ice_cfg_rxq_interrupt(vsi, rxq, reg_idx,
2140 					      q_vector->rx.itr_idx);
2141 			rxq++;
2142 		}
2143 	}
2144 }
2145 
2146 /**
2147  * ice_vsi_start_all_rx_rings - start/enable all of a VSI's Rx rings
2148  * @vsi: the VSI whose rings are to be enabled
2149  *
2150  * Returns 0 on success and a negative value on error
2151  */
2152 int ice_vsi_start_all_rx_rings(struct ice_vsi *vsi)
2153 {
2154 	return ice_vsi_ctrl_all_rx_rings(vsi, true);
2155 }
2156 
2157 /**
2158  * ice_vsi_stop_all_rx_rings - stop/disable all of a VSI's Rx rings
2159  * @vsi: the VSI whose rings are to be disabled
2160  *
2161  * Returns 0 on success and a negative value on error
2162  */
2163 int ice_vsi_stop_all_rx_rings(struct ice_vsi *vsi)
2164 {
2165 	return ice_vsi_ctrl_all_rx_rings(vsi, false);
2166 }
2167 
2168 /**
2169  * ice_vsi_stop_tx_rings - Disable Tx rings
2170  * @vsi: the VSI being configured
2171  * @rst_src: reset source
2172  * @rel_vmvf_num: Relative ID of VF/VM
2173  * @rings: Tx ring array to be stopped
2174  * @count: number of Tx ring array elements
2175  */
2176 static int
2177 ice_vsi_stop_tx_rings(struct ice_vsi *vsi, enum ice_disq_rst_src rst_src,
2178 		      u16 rel_vmvf_num, struct ice_tx_ring **rings, u16 count)
2179 {
2180 	u16 q_idx;
2181 
2182 	if (vsi->num_txq > ICE_LAN_TXQ_MAX_QDIS)
2183 		return -EINVAL;
2184 
2185 	for (q_idx = 0; q_idx < count; q_idx++) {
2186 		struct ice_txq_meta txq_meta = { };
2187 		int status;
2188 
2189 		if (!rings || !rings[q_idx])
2190 			return -EINVAL;
2191 
2192 		ice_fill_txq_meta(vsi, rings[q_idx], &txq_meta);
2193 		status = ice_vsi_stop_tx_ring(vsi, rst_src, rel_vmvf_num,
2194 					      rings[q_idx], &txq_meta);
2195 
2196 		if (status)
2197 			return status;
2198 	}
2199 
2200 	return 0;
2201 }
2202 
2203 /**
2204  * ice_vsi_stop_lan_tx_rings - Disable LAN Tx rings
2205  * @vsi: the VSI being configured
2206  * @rst_src: reset source
2207  * @rel_vmvf_num: Relative ID of VF/VM
2208  */
2209 int
2210 ice_vsi_stop_lan_tx_rings(struct ice_vsi *vsi, enum ice_disq_rst_src rst_src,
2211 			  u16 rel_vmvf_num)
2212 {
2213 	return ice_vsi_stop_tx_rings(vsi, rst_src, rel_vmvf_num, vsi->tx_rings, vsi->num_txq);
2214 }
2215 
2216 /**
2217  * ice_vsi_stop_xdp_tx_rings - Disable XDP Tx rings
2218  * @vsi: the VSI being configured
2219  */
2220 int ice_vsi_stop_xdp_tx_rings(struct ice_vsi *vsi)
2221 {
2222 	return ice_vsi_stop_tx_rings(vsi, ICE_NO_RESET, 0, vsi->xdp_rings, vsi->num_xdp_txq);
2223 }
2224 
2225 /**
2226  * ice_vsi_is_vlan_pruning_ena - check if VLAN pruning is enabled or not
2227  * @vsi: VSI to check whether or not VLAN pruning is enabled.
2228  *
2229  * returns true if Rx VLAN pruning is enabled and false otherwise.
2230  */
2231 bool ice_vsi_is_vlan_pruning_ena(struct ice_vsi *vsi)
2232 {
2233 	if (!vsi)
2234 		return false;
2235 
2236 	return (vsi->info.sw_flags2 & ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA);
2237 }
2238 
2239 static void ice_vsi_set_tc_cfg(struct ice_vsi *vsi)
2240 {
2241 	if (!test_bit(ICE_FLAG_DCB_ENA, vsi->back->flags)) {
2242 		vsi->tc_cfg.ena_tc = ICE_DFLT_TRAFFIC_CLASS;
2243 		vsi->tc_cfg.numtc = 1;
2244 		return;
2245 	}
2246 
2247 	/* set VSI TC information based on DCB config */
2248 	ice_vsi_set_dcb_tc_cfg(vsi);
2249 }
2250 
2251 /**
2252  * ice_vsi_set_q_vectors_reg_idx - set the HW register index for all q_vectors
2253  * @vsi: VSI to set the q_vectors register index on
2254  */
2255 static int
2256 ice_vsi_set_q_vectors_reg_idx(struct ice_vsi *vsi)
2257 {
2258 	u16 i;
2259 
2260 	if (!vsi || !vsi->q_vectors)
2261 		return -EINVAL;
2262 
2263 	ice_for_each_q_vector(vsi, i) {
2264 		struct ice_q_vector *q_vector = vsi->q_vectors[i];
2265 
2266 		if (!q_vector) {
2267 			dev_err(ice_pf_to_dev(vsi->back), "Failed to set reg_idx on q_vector %d VSI %d\n",
2268 				i, vsi->vsi_num);
2269 			goto clear_reg_idx;
2270 		}
2271 
2272 		if (vsi->type == ICE_VSI_VF) {
2273 			struct ice_vf *vf = vsi->vf;
2274 
2275 			q_vector->reg_idx = ice_calc_vf_reg_idx(vf, q_vector);
2276 		} else {
2277 			q_vector->reg_idx =
2278 				q_vector->v_idx + vsi->base_vector;
2279 		}
2280 	}
2281 
2282 	return 0;
2283 
2284 clear_reg_idx:
2285 	ice_for_each_q_vector(vsi, i) {
2286 		struct ice_q_vector *q_vector = vsi->q_vectors[i];
2287 
2288 		if (q_vector)
2289 			q_vector->reg_idx = 0;
2290 	}
2291 
2292 	return -EINVAL;
2293 }
2294 
2295 /**
2296  * ice_cfg_sw_lldp - Config switch rules for LLDP packet handling
2297  * @vsi: the VSI being configured
2298  * @tx: bool to determine Tx or Rx rule
2299  * @create: bool to determine create or remove Rule
2300  */
2301 void ice_cfg_sw_lldp(struct ice_vsi *vsi, bool tx, bool create)
2302 {
2303 	int (*eth_fltr)(struct ice_vsi *v, u16 type, u16 flag,
2304 			enum ice_sw_fwd_act_type act);
2305 	struct ice_pf *pf = vsi->back;
2306 	struct device *dev;
2307 	int status;
2308 
2309 	dev = ice_pf_to_dev(pf);
2310 	eth_fltr = create ? ice_fltr_add_eth : ice_fltr_remove_eth;
2311 
2312 	if (tx) {
2313 		status = eth_fltr(vsi, ETH_P_LLDP, ICE_FLTR_TX,
2314 				  ICE_DROP_PACKET);
2315 	} else {
2316 		if (ice_fw_supports_lldp_fltr_ctrl(&pf->hw)) {
2317 			status = ice_lldp_fltr_add_remove(&pf->hw, vsi->vsi_num,
2318 							  create);
2319 		} else {
2320 			status = eth_fltr(vsi, ETH_P_LLDP, ICE_FLTR_RX,
2321 					  ICE_FWD_TO_VSI);
2322 		}
2323 	}
2324 
2325 	if (status)
2326 		dev_dbg(dev, "Fail %s %s LLDP rule on VSI %i error: %d\n",
2327 			create ? "adding" : "removing", tx ? "TX" : "RX",
2328 			vsi->vsi_num, status);
2329 }
2330 
2331 /**
2332  * ice_set_agg_vsi - sets up scheduler aggregator node and move VSI into it
2333  * @vsi: pointer to the VSI
2334  *
2335  * This function will allocate new scheduler aggregator now if needed and will
2336  * move specified VSI into it.
2337  */
2338 static void ice_set_agg_vsi(struct ice_vsi *vsi)
2339 {
2340 	struct device *dev = ice_pf_to_dev(vsi->back);
2341 	struct ice_agg_node *agg_node_iter = NULL;
2342 	u32 agg_id = ICE_INVALID_AGG_NODE_ID;
2343 	struct ice_agg_node *agg_node = NULL;
2344 	int node_offset, max_agg_nodes = 0;
2345 	struct ice_port_info *port_info;
2346 	struct ice_pf *pf = vsi->back;
2347 	u32 agg_node_id_start = 0;
2348 	int status;
2349 
2350 	/* create (as needed) scheduler aggregator node and move VSI into
2351 	 * corresponding aggregator node
2352 	 * - PF aggregator node to contains VSIs of type _PF and _CTRL
2353 	 * - VF aggregator nodes will contain VF VSI
2354 	 */
2355 	port_info = pf->hw.port_info;
2356 	if (!port_info)
2357 		return;
2358 
2359 	switch (vsi->type) {
2360 	case ICE_VSI_CTRL:
2361 	case ICE_VSI_CHNL:
2362 	case ICE_VSI_LB:
2363 	case ICE_VSI_PF:
2364 	case ICE_VSI_SWITCHDEV_CTRL:
2365 		max_agg_nodes = ICE_MAX_PF_AGG_NODES;
2366 		agg_node_id_start = ICE_PF_AGG_NODE_ID_START;
2367 		agg_node_iter = &pf->pf_agg_node[0];
2368 		break;
2369 	case ICE_VSI_VF:
2370 		/* user can create 'n' VFs on a given PF, but since max children
2371 		 * per aggregator node can be only 64. Following code handles
2372 		 * aggregator(s) for VF VSIs, either selects a agg_node which
2373 		 * was already created provided num_vsis < 64, otherwise
2374 		 * select next available node, which will be created
2375 		 */
2376 		max_agg_nodes = ICE_MAX_VF_AGG_NODES;
2377 		agg_node_id_start = ICE_VF_AGG_NODE_ID_START;
2378 		agg_node_iter = &pf->vf_agg_node[0];
2379 		break;
2380 	default:
2381 		/* other VSI type, handle later if needed */
2382 		dev_dbg(dev, "unexpected VSI type %s\n",
2383 			ice_vsi_type_str(vsi->type));
2384 		return;
2385 	}
2386 
2387 	/* find the appropriate aggregator node */
2388 	for (node_offset = 0; node_offset < max_agg_nodes; node_offset++) {
2389 		/* see if we can find space in previously created
2390 		 * node if num_vsis < 64, otherwise skip
2391 		 */
2392 		if (agg_node_iter->num_vsis &&
2393 		    agg_node_iter->num_vsis == ICE_MAX_VSIS_IN_AGG_NODE) {
2394 			agg_node_iter++;
2395 			continue;
2396 		}
2397 
2398 		if (agg_node_iter->valid &&
2399 		    agg_node_iter->agg_id != ICE_INVALID_AGG_NODE_ID) {
2400 			agg_id = agg_node_iter->agg_id;
2401 			agg_node = agg_node_iter;
2402 			break;
2403 		}
2404 
2405 		/* find unclaimed agg_id */
2406 		if (agg_node_iter->agg_id == ICE_INVALID_AGG_NODE_ID) {
2407 			agg_id = node_offset + agg_node_id_start;
2408 			agg_node = agg_node_iter;
2409 			break;
2410 		}
2411 		/* move to next agg_node */
2412 		agg_node_iter++;
2413 	}
2414 
2415 	if (!agg_node)
2416 		return;
2417 
2418 	/* if selected aggregator node was not created, create it */
2419 	if (!agg_node->valid) {
2420 		status = ice_cfg_agg(port_info, agg_id, ICE_AGG_TYPE_AGG,
2421 				     (u8)vsi->tc_cfg.ena_tc);
2422 		if (status) {
2423 			dev_err(dev, "unable to create aggregator node with agg_id %u\n",
2424 				agg_id);
2425 			return;
2426 		}
2427 		/* aggregator node is created, store the needed info */
2428 		agg_node->valid = true;
2429 		agg_node->agg_id = agg_id;
2430 	}
2431 
2432 	/* move VSI to corresponding aggregator node */
2433 	status = ice_move_vsi_to_agg(port_info, agg_id, vsi->idx,
2434 				     (u8)vsi->tc_cfg.ena_tc);
2435 	if (status) {
2436 		dev_err(dev, "unable to move VSI idx %u into aggregator %u node",
2437 			vsi->idx, agg_id);
2438 		return;
2439 	}
2440 
2441 	/* keep active children count for aggregator node */
2442 	agg_node->num_vsis++;
2443 
2444 	/* cache the 'agg_id' in VSI, so that after reset - VSI will be moved
2445 	 * to aggregator node
2446 	 */
2447 	vsi->agg_node = agg_node;
2448 	dev_dbg(dev, "successfully moved VSI idx %u tc_bitmap 0x%x) into aggregator node %d which has num_vsis %u\n",
2449 		vsi->idx, vsi->tc_cfg.ena_tc, vsi->agg_node->agg_id,
2450 		vsi->agg_node->num_vsis);
2451 }
2452 
2453 /**
2454  * ice_vsi_setup - Set up a VSI by a given type
2455  * @pf: board private structure
2456  * @pi: pointer to the port_info instance
2457  * @vsi_type: VSI type
2458  * @vf: pointer to VF to which this VSI connects. This field is used primarily
2459  *      for the ICE_VSI_VF type. Other VSI types should pass NULL.
2460  * @ch: ptr to channel
2461  *
2462  * This allocates the sw VSI structure and its queue resources.
2463  *
2464  * Returns pointer to the successfully allocated and configured VSI sw struct on
2465  * success, NULL on failure.
2466  */
2467 struct ice_vsi *
2468 ice_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi,
2469 	      enum ice_vsi_type vsi_type, struct ice_vf *vf,
2470 	      struct ice_channel *ch)
2471 {
2472 	u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };
2473 	struct device *dev = ice_pf_to_dev(pf);
2474 	struct ice_vsi *vsi;
2475 	int ret, i;
2476 
2477 	if (vsi_type == ICE_VSI_CHNL)
2478 		vsi = ice_vsi_alloc(pf, vsi_type, ch, NULL);
2479 	else if (vsi_type == ICE_VSI_VF || vsi_type == ICE_VSI_CTRL)
2480 		vsi = ice_vsi_alloc(pf, vsi_type, NULL, vf);
2481 	else
2482 		vsi = ice_vsi_alloc(pf, vsi_type, NULL, NULL);
2483 
2484 	if (!vsi) {
2485 		dev_err(dev, "could not allocate VSI\n");
2486 		return NULL;
2487 	}
2488 
2489 	vsi->port_info = pi;
2490 	vsi->vsw = pf->first_sw;
2491 	if (vsi->type == ICE_VSI_PF)
2492 		vsi->ethtype = ETH_P_PAUSE;
2493 
2494 	ice_alloc_fd_res(vsi);
2495 
2496 	if (vsi_type != ICE_VSI_CHNL) {
2497 		if (ice_vsi_get_qs(vsi)) {
2498 			dev_err(dev, "Failed to allocate queues. vsi->idx = %d\n",
2499 				vsi->idx);
2500 			goto unroll_vsi_alloc;
2501 		}
2502 	}
2503 
2504 	/* set RSS capabilities */
2505 	ice_vsi_set_rss_params(vsi);
2506 
2507 	/* set TC configuration */
2508 	ice_vsi_set_tc_cfg(vsi);
2509 
2510 	/* create the VSI */
2511 	ret = ice_vsi_init(vsi, true);
2512 	if (ret)
2513 		goto unroll_get_qs;
2514 
2515 	ice_vsi_init_vlan_ops(vsi);
2516 
2517 	switch (vsi->type) {
2518 	case ICE_VSI_CTRL:
2519 	case ICE_VSI_SWITCHDEV_CTRL:
2520 	case ICE_VSI_PF:
2521 		ret = ice_vsi_alloc_q_vectors(vsi);
2522 		if (ret)
2523 			goto unroll_vsi_init;
2524 
2525 		ret = ice_vsi_setup_vector_base(vsi);
2526 		if (ret)
2527 			goto unroll_alloc_q_vector;
2528 
2529 		ret = ice_vsi_set_q_vectors_reg_idx(vsi);
2530 		if (ret)
2531 			goto unroll_vector_base;
2532 
2533 		ret = ice_vsi_alloc_rings(vsi);
2534 		if (ret)
2535 			goto unroll_vector_base;
2536 
2537 		ice_vsi_map_rings_to_vectors(vsi);
2538 
2539 		/* ICE_VSI_CTRL does not need RSS so skip RSS processing */
2540 		if (vsi->type != ICE_VSI_CTRL)
2541 			/* Do not exit if configuring RSS had an issue, at
2542 			 * least receive traffic on first queue. Hence no
2543 			 * need to capture return value
2544 			 */
2545 			if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
2546 				ice_vsi_cfg_rss_lut_key(vsi);
2547 				ice_vsi_set_rss_flow_fld(vsi);
2548 			}
2549 		ice_init_arfs(vsi);
2550 		break;
2551 	case ICE_VSI_CHNL:
2552 		if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
2553 			ice_vsi_cfg_rss_lut_key(vsi);
2554 			ice_vsi_set_rss_flow_fld(vsi);
2555 		}
2556 		break;
2557 	case ICE_VSI_VF:
2558 		/* VF driver will take care of creating netdev for this type and
2559 		 * map queues to vectors through Virtchnl, PF driver only
2560 		 * creates a VSI and corresponding structures for bookkeeping
2561 		 * purpose
2562 		 */
2563 		ret = ice_vsi_alloc_q_vectors(vsi);
2564 		if (ret)
2565 			goto unroll_vsi_init;
2566 
2567 		ret = ice_vsi_alloc_rings(vsi);
2568 		if (ret)
2569 			goto unroll_alloc_q_vector;
2570 
2571 		ret = ice_vsi_set_q_vectors_reg_idx(vsi);
2572 		if (ret)
2573 			goto unroll_vector_base;
2574 
2575 		/* Do not exit if configuring RSS had an issue, at least
2576 		 * receive traffic on first queue. Hence no need to capture
2577 		 * return value
2578 		 */
2579 		if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
2580 			ice_vsi_cfg_rss_lut_key(vsi);
2581 			ice_vsi_set_vf_rss_flow_fld(vsi);
2582 		}
2583 		break;
2584 	case ICE_VSI_LB:
2585 		ret = ice_vsi_alloc_rings(vsi);
2586 		if (ret)
2587 			goto unroll_vsi_init;
2588 		break;
2589 	default:
2590 		/* clean up the resources and exit */
2591 		goto unroll_vsi_init;
2592 	}
2593 
2594 	/* configure VSI nodes based on number of queues and TC's */
2595 	ice_for_each_traffic_class(i) {
2596 		if (!(vsi->tc_cfg.ena_tc & BIT(i)))
2597 			continue;
2598 
2599 		if (vsi->type == ICE_VSI_CHNL) {
2600 			if (!vsi->alloc_txq && vsi->num_txq)
2601 				max_txqs[i] = vsi->num_txq;
2602 			else
2603 				max_txqs[i] = pf->num_lan_tx;
2604 		} else {
2605 			max_txqs[i] = vsi->alloc_txq;
2606 		}
2607 	}
2608 
2609 	dev_dbg(dev, "vsi->tc_cfg.ena_tc = %d\n", vsi->tc_cfg.ena_tc);
2610 	ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, vsi->tc_cfg.ena_tc,
2611 			      max_txqs);
2612 	if (ret) {
2613 		dev_err(dev, "VSI %d failed lan queue config, error %d\n",
2614 			vsi->vsi_num, ret);
2615 		goto unroll_clear_rings;
2616 	}
2617 
2618 	/* Add switch rule to drop all Tx Flow Control Frames, of look up
2619 	 * type ETHERTYPE from VSIs, and restrict malicious VF from sending
2620 	 * out PAUSE or PFC frames. If enabled, FW can still send FC frames.
2621 	 * The rule is added once for PF VSI in order to create appropriate
2622 	 * recipe, since VSI/VSI list is ignored with drop action...
2623 	 * Also add rules to handle LLDP Tx packets.  Tx LLDP packets need to
2624 	 * be dropped so that VFs cannot send LLDP packets to reconfig DCB
2625 	 * settings in the HW.
2626 	 */
2627 	if (!ice_is_safe_mode(pf))
2628 		if (vsi->type == ICE_VSI_PF) {
2629 			ice_fltr_add_eth(vsi, ETH_P_PAUSE, ICE_FLTR_TX,
2630 					 ICE_DROP_PACKET);
2631 			ice_cfg_sw_lldp(vsi, true, true);
2632 		}
2633 
2634 	if (!vsi->agg_node)
2635 		ice_set_agg_vsi(vsi);
2636 	return vsi;
2637 
2638 unroll_clear_rings:
2639 	ice_vsi_clear_rings(vsi);
2640 unroll_vector_base:
2641 	/* reclaim SW interrupts back to the common pool */
2642 	ice_free_res(pf->irq_tracker, vsi->base_vector, vsi->idx);
2643 	pf->num_avail_sw_msix += vsi->num_q_vectors;
2644 unroll_alloc_q_vector:
2645 	ice_vsi_free_q_vectors(vsi);
2646 unroll_vsi_init:
2647 	ice_vsi_delete(vsi);
2648 unroll_get_qs:
2649 	ice_vsi_put_qs(vsi);
2650 unroll_vsi_alloc:
2651 	if (vsi_type == ICE_VSI_VF)
2652 		ice_enable_lag(pf->lag);
2653 	ice_vsi_clear(vsi);
2654 
2655 	return NULL;
2656 }
2657 
2658 /**
2659  * ice_vsi_release_msix - Clear the queue to Interrupt mapping in HW
2660  * @vsi: the VSI being cleaned up
2661  */
2662 static void ice_vsi_release_msix(struct ice_vsi *vsi)
2663 {
2664 	struct ice_pf *pf = vsi->back;
2665 	struct ice_hw *hw = &pf->hw;
2666 	u32 txq = 0;
2667 	u32 rxq = 0;
2668 	int i, q;
2669 
2670 	ice_for_each_q_vector(vsi, i) {
2671 		struct ice_q_vector *q_vector = vsi->q_vectors[i];
2672 
2673 		ice_write_intrl(q_vector, 0);
2674 		for (q = 0; q < q_vector->num_ring_tx; q++) {
2675 			ice_write_itr(&q_vector->tx, 0);
2676 			wr32(hw, QINT_TQCTL(vsi->txq_map[txq]), 0);
2677 			if (ice_is_xdp_ena_vsi(vsi)) {
2678 				u32 xdp_txq = txq + vsi->num_xdp_txq;
2679 
2680 				wr32(hw, QINT_TQCTL(vsi->txq_map[xdp_txq]), 0);
2681 			}
2682 			txq++;
2683 		}
2684 
2685 		for (q = 0; q < q_vector->num_ring_rx; q++) {
2686 			ice_write_itr(&q_vector->rx, 0);
2687 			wr32(hw, QINT_RQCTL(vsi->rxq_map[rxq]), 0);
2688 			rxq++;
2689 		}
2690 	}
2691 
2692 	ice_flush(hw);
2693 }
2694 
2695 /**
2696  * ice_vsi_free_irq - Free the IRQ association with the OS
2697  * @vsi: the VSI being configured
2698  */
2699 void ice_vsi_free_irq(struct ice_vsi *vsi)
2700 {
2701 	struct ice_pf *pf = vsi->back;
2702 	int base = vsi->base_vector;
2703 	int i;
2704 
2705 	if (!vsi->q_vectors || !vsi->irqs_ready)
2706 		return;
2707 
2708 	ice_vsi_release_msix(vsi);
2709 	if (vsi->type == ICE_VSI_VF)
2710 		return;
2711 
2712 	vsi->irqs_ready = false;
2713 	ice_free_cpu_rx_rmap(vsi);
2714 
2715 	ice_for_each_q_vector(vsi, i) {
2716 		u16 vector = i + base;
2717 		int irq_num;
2718 
2719 		irq_num = pf->msix_entries[vector].vector;
2720 
2721 		/* free only the irqs that were actually requested */
2722 		if (!vsi->q_vectors[i] ||
2723 		    !(vsi->q_vectors[i]->num_ring_tx ||
2724 		      vsi->q_vectors[i]->num_ring_rx))
2725 			continue;
2726 
2727 		/* clear the affinity notifier in the IRQ descriptor */
2728 		if (!IS_ENABLED(CONFIG_RFS_ACCEL))
2729 			irq_set_affinity_notifier(irq_num, NULL);
2730 
2731 		/* clear the affinity_mask in the IRQ descriptor */
2732 		irq_set_affinity_hint(irq_num, NULL);
2733 		synchronize_irq(irq_num);
2734 		devm_free_irq(ice_pf_to_dev(pf), irq_num, vsi->q_vectors[i]);
2735 	}
2736 }
2737 
2738 /**
2739  * ice_vsi_free_tx_rings - Free Tx resources for VSI queues
2740  * @vsi: the VSI having resources freed
2741  */
2742 void ice_vsi_free_tx_rings(struct ice_vsi *vsi)
2743 {
2744 	int i;
2745 
2746 	if (!vsi->tx_rings)
2747 		return;
2748 
2749 	ice_for_each_txq(vsi, i)
2750 		if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2751 			ice_free_tx_ring(vsi->tx_rings[i]);
2752 }
2753 
2754 /**
2755  * ice_vsi_free_rx_rings - Free Rx resources for VSI queues
2756  * @vsi: the VSI having resources freed
2757  */
2758 void ice_vsi_free_rx_rings(struct ice_vsi *vsi)
2759 {
2760 	int i;
2761 
2762 	if (!vsi->rx_rings)
2763 		return;
2764 
2765 	ice_for_each_rxq(vsi, i)
2766 		if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2767 			ice_free_rx_ring(vsi->rx_rings[i]);
2768 }
2769 
2770 /**
2771  * ice_vsi_close - Shut down a VSI
2772  * @vsi: the VSI being shut down
2773  */
2774 void ice_vsi_close(struct ice_vsi *vsi)
2775 {
2776 	if (!test_and_set_bit(ICE_VSI_DOWN, vsi->state))
2777 		ice_down(vsi);
2778 
2779 	ice_vsi_free_irq(vsi);
2780 	ice_vsi_free_tx_rings(vsi);
2781 	ice_vsi_free_rx_rings(vsi);
2782 }
2783 
2784 /**
2785  * ice_ena_vsi - resume a VSI
2786  * @vsi: the VSI being resume
2787  * @locked: is the rtnl_lock already held
2788  */
2789 int ice_ena_vsi(struct ice_vsi *vsi, bool locked)
2790 {
2791 	int err = 0;
2792 
2793 	if (!test_bit(ICE_VSI_NEEDS_RESTART, vsi->state))
2794 		return 0;
2795 
2796 	clear_bit(ICE_VSI_NEEDS_RESTART, vsi->state);
2797 
2798 	if (vsi->netdev && vsi->type == ICE_VSI_PF) {
2799 		if (netif_running(vsi->netdev)) {
2800 			if (!locked)
2801 				rtnl_lock();
2802 
2803 			err = ice_open_internal(vsi->netdev);
2804 
2805 			if (!locked)
2806 				rtnl_unlock();
2807 		}
2808 	} else if (vsi->type == ICE_VSI_CTRL) {
2809 		err = ice_vsi_open_ctrl(vsi);
2810 	}
2811 
2812 	return err;
2813 }
2814 
2815 /**
2816  * ice_dis_vsi - pause a VSI
2817  * @vsi: the VSI being paused
2818  * @locked: is the rtnl_lock already held
2819  */
2820 void ice_dis_vsi(struct ice_vsi *vsi, bool locked)
2821 {
2822 	if (test_bit(ICE_VSI_DOWN, vsi->state))
2823 		return;
2824 
2825 	set_bit(ICE_VSI_NEEDS_RESTART, vsi->state);
2826 
2827 	if (vsi->type == ICE_VSI_PF && vsi->netdev) {
2828 		if (netif_running(vsi->netdev)) {
2829 			if (!locked)
2830 				rtnl_lock();
2831 
2832 			ice_vsi_close(vsi);
2833 
2834 			if (!locked)
2835 				rtnl_unlock();
2836 		} else {
2837 			ice_vsi_close(vsi);
2838 		}
2839 	} else if (vsi->type == ICE_VSI_CTRL ||
2840 		   vsi->type == ICE_VSI_SWITCHDEV_CTRL) {
2841 		ice_vsi_close(vsi);
2842 	}
2843 }
2844 
2845 /**
2846  * ice_vsi_dis_irq - Mask off queue interrupt generation on the VSI
2847  * @vsi: the VSI being un-configured
2848  */
2849 void ice_vsi_dis_irq(struct ice_vsi *vsi)
2850 {
2851 	int base = vsi->base_vector;
2852 	struct ice_pf *pf = vsi->back;
2853 	struct ice_hw *hw = &pf->hw;
2854 	u32 val;
2855 	int i;
2856 
2857 	/* disable interrupt causation from each queue */
2858 	if (vsi->tx_rings) {
2859 		ice_for_each_txq(vsi, i) {
2860 			if (vsi->tx_rings[i]) {
2861 				u16 reg;
2862 
2863 				reg = vsi->tx_rings[i]->reg_idx;
2864 				val = rd32(hw, QINT_TQCTL(reg));
2865 				val &= ~QINT_TQCTL_CAUSE_ENA_M;
2866 				wr32(hw, QINT_TQCTL(reg), val);
2867 			}
2868 		}
2869 	}
2870 
2871 	if (vsi->rx_rings) {
2872 		ice_for_each_rxq(vsi, i) {
2873 			if (vsi->rx_rings[i]) {
2874 				u16 reg;
2875 
2876 				reg = vsi->rx_rings[i]->reg_idx;
2877 				val = rd32(hw, QINT_RQCTL(reg));
2878 				val &= ~QINT_RQCTL_CAUSE_ENA_M;
2879 				wr32(hw, QINT_RQCTL(reg), val);
2880 			}
2881 		}
2882 	}
2883 
2884 	/* disable each interrupt */
2885 	ice_for_each_q_vector(vsi, i) {
2886 		if (!vsi->q_vectors[i])
2887 			continue;
2888 		wr32(hw, GLINT_DYN_CTL(vsi->q_vectors[i]->reg_idx), 0);
2889 	}
2890 
2891 	ice_flush(hw);
2892 
2893 	/* don't call synchronize_irq() for VF's from the host */
2894 	if (vsi->type == ICE_VSI_VF)
2895 		return;
2896 
2897 	ice_for_each_q_vector(vsi, i)
2898 		synchronize_irq(pf->msix_entries[i + base].vector);
2899 }
2900 
2901 /**
2902  * ice_napi_del - Remove NAPI handler for the VSI
2903  * @vsi: VSI for which NAPI handler is to be removed
2904  */
2905 void ice_napi_del(struct ice_vsi *vsi)
2906 {
2907 	int v_idx;
2908 
2909 	if (!vsi->netdev)
2910 		return;
2911 
2912 	ice_for_each_q_vector(vsi, v_idx)
2913 		netif_napi_del(&vsi->q_vectors[v_idx]->napi);
2914 }
2915 
2916 /**
2917  * ice_free_vf_ctrl_res - Free the VF control VSI resource
2918  * @pf: pointer to PF structure
2919  * @vsi: the VSI to free resources for
2920  *
2921  * Check if the VF control VSI resource is still in use. If no VF is using it
2922  * any more, release the VSI resource. Otherwise, leave it to be cleaned up
2923  * once no other VF uses it.
2924  */
2925 static void ice_free_vf_ctrl_res(struct ice_pf *pf,  struct ice_vsi *vsi)
2926 {
2927 	struct ice_vf *vf;
2928 	unsigned int bkt;
2929 
2930 	rcu_read_lock();
2931 	ice_for_each_vf_rcu(pf, bkt, vf) {
2932 		if (vf != vsi->vf && vf->ctrl_vsi_idx != ICE_NO_VSI) {
2933 			rcu_read_unlock();
2934 			return;
2935 		}
2936 	}
2937 	rcu_read_unlock();
2938 
2939 	/* No other VFs left that have control VSI. It is now safe to reclaim
2940 	 * SW interrupts back to the common pool.
2941 	 */
2942 	ice_free_res(pf->irq_tracker, vsi->base_vector,
2943 		     ICE_RES_VF_CTRL_VEC_ID);
2944 	pf->num_avail_sw_msix += vsi->num_q_vectors;
2945 }
2946 
2947 /**
2948  * ice_vsi_release - Delete a VSI and free its resources
2949  * @vsi: the VSI being removed
2950  *
2951  * Returns 0 on success or < 0 on error
2952  */
2953 int ice_vsi_release(struct ice_vsi *vsi)
2954 {
2955 	struct ice_pf *pf;
2956 	int err;
2957 
2958 	if (!vsi->back)
2959 		return -ENODEV;
2960 	pf = vsi->back;
2961 
2962 	/* do not unregister while driver is in the reset recovery pending
2963 	 * state. Since reset/rebuild happens through PF service task workqueue,
2964 	 * it's not a good idea to unregister netdev that is associated to the
2965 	 * PF that is running the work queue items currently. This is done to
2966 	 * avoid check_flush_dependency() warning on this wq
2967 	 */
2968 	if (vsi->netdev && !ice_is_reset_in_progress(pf->state) &&
2969 	    (test_bit(ICE_VSI_NETDEV_REGISTERED, vsi->state))) {
2970 		unregister_netdev(vsi->netdev);
2971 		clear_bit(ICE_VSI_NETDEV_REGISTERED, vsi->state);
2972 	}
2973 
2974 	if (vsi->type == ICE_VSI_PF)
2975 		ice_devlink_destroy_pf_port(pf);
2976 
2977 	if (test_bit(ICE_FLAG_RSS_ENA, pf->flags))
2978 		ice_rss_clean(vsi);
2979 
2980 	/* Disable VSI and free resources */
2981 	if (vsi->type != ICE_VSI_LB)
2982 		ice_vsi_dis_irq(vsi);
2983 	ice_vsi_close(vsi);
2984 
2985 	/* SR-IOV determines needed MSIX resources all at once instead of per
2986 	 * VSI since when VFs are spawned we know how many VFs there are and how
2987 	 * many interrupts each VF needs. SR-IOV MSIX resources are also
2988 	 * cleared in the same manner.
2989 	 */
2990 	if (vsi->type == ICE_VSI_CTRL && vsi->vf) {
2991 		ice_free_vf_ctrl_res(pf, vsi);
2992 	} else if (vsi->type != ICE_VSI_VF) {
2993 		/* reclaim SW interrupts back to the common pool */
2994 		ice_free_res(pf->irq_tracker, vsi->base_vector, vsi->idx);
2995 		pf->num_avail_sw_msix += vsi->num_q_vectors;
2996 	}
2997 
2998 	if (!ice_is_safe_mode(pf)) {
2999 		if (vsi->type == ICE_VSI_PF) {
3000 			ice_fltr_remove_eth(vsi, ETH_P_PAUSE, ICE_FLTR_TX,
3001 					    ICE_DROP_PACKET);
3002 			ice_cfg_sw_lldp(vsi, true, false);
3003 			/* The Rx rule will only exist to remove if the LLDP FW
3004 			 * engine is currently stopped
3005 			 */
3006 			if (!test_bit(ICE_FLAG_FW_LLDP_AGENT, pf->flags))
3007 				ice_cfg_sw_lldp(vsi, false, false);
3008 		}
3009 	}
3010 
3011 	if (ice_is_vsi_dflt_vsi(vsi))
3012 		ice_clear_dflt_vsi(vsi);
3013 	ice_fltr_remove_all(vsi);
3014 	ice_rm_vsi_lan_cfg(vsi->port_info, vsi->idx);
3015 	err = ice_rm_vsi_rdma_cfg(vsi->port_info, vsi->idx);
3016 	if (err)
3017 		dev_err(ice_pf_to_dev(vsi->back), "Failed to remove RDMA scheduler config for VSI %u, err %d\n",
3018 			vsi->vsi_num, err);
3019 	ice_vsi_delete(vsi);
3020 	ice_vsi_free_q_vectors(vsi);
3021 
3022 	if (vsi->netdev) {
3023 		if (test_bit(ICE_VSI_NETDEV_REGISTERED, vsi->state)) {
3024 			unregister_netdev(vsi->netdev);
3025 			clear_bit(ICE_VSI_NETDEV_REGISTERED, vsi->state);
3026 		}
3027 		if (test_bit(ICE_VSI_NETDEV_ALLOCD, vsi->state)) {
3028 			free_netdev(vsi->netdev);
3029 			vsi->netdev = NULL;
3030 			clear_bit(ICE_VSI_NETDEV_ALLOCD, vsi->state);
3031 		}
3032 	}
3033 
3034 	if (vsi->type == ICE_VSI_VF &&
3035 	    vsi->agg_node && vsi->agg_node->valid)
3036 		vsi->agg_node->num_vsis--;
3037 	ice_vsi_clear_rings(vsi);
3038 
3039 	ice_vsi_put_qs(vsi);
3040 
3041 	/* retain SW VSI data structure since it is needed to unregister and
3042 	 * free VSI netdev when PF is not in reset recovery pending state,\
3043 	 * for ex: during rmmod.
3044 	 */
3045 	if (!ice_is_reset_in_progress(pf->state))
3046 		ice_vsi_clear(vsi);
3047 
3048 	return 0;
3049 }
3050 
3051 /**
3052  * ice_vsi_rebuild_get_coalesce - get coalesce from all q_vectors
3053  * @vsi: VSI connected with q_vectors
3054  * @coalesce: array of struct with stored coalesce
3055  *
3056  * Returns array size.
3057  */
3058 static int
3059 ice_vsi_rebuild_get_coalesce(struct ice_vsi *vsi,
3060 			     struct ice_coalesce_stored *coalesce)
3061 {
3062 	int i;
3063 
3064 	ice_for_each_q_vector(vsi, i) {
3065 		struct ice_q_vector *q_vector = vsi->q_vectors[i];
3066 
3067 		coalesce[i].itr_tx = q_vector->tx.itr_settings;
3068 		coalesce[i].itr_rx = q_vector->rx.itr_settings;
3069 		coalesce[i].intrl = q_vector->intrl;
3070 
3071 		if (i < vsi->num_txq)
3072 			coalesce[i].tx_valid = true;
3073 		if (i < vsi->num_rxq)
3074 			coalesce[i].rx_valid = true;
3075 	}
3076 
3077 	return vsi->num_q_vectors;
3078 }
3079 
3080 /**
3081  * ice_vsi_rebuild_set_coalesce - set coalesce from earlier saved arrays
3082  * @vsi: VSI connected with q_vectors
3083  * @coalesce: pointer to array of struct with stored coalesce
3084  * @size: size of coalesce array
3085  *
3086  * Before this function, ice_vsi_rebuild_get_coalesce should be called to save
3087  * ITR params in arrays. If size is 0 or coalesce wasn't stored set coalesce
3088  * to default value.
3089  */
3090 static void
3091 ice_vsi_rebuild_set_coalesce(struct ice_vsi *vsi,
3092 			     struct ice_coalesce_stored *coalesce, int size)
3093 {
3094 	struct ice_ring_container *rc;
3095 	int i;
3096 
3097 	if ((size && !coalesce) || !vsi)
3098 		return;
3099 
3100 	/* There are a couple of cases that have to be handled here:
3101 	 *   1. The case where the number of queue vectors stays the same, but
3102 	 *      the number of Tx or Rx rings changes (the first for loop)
3103 	 *   2. The case where the number of queue vectors increased (the
3104 	 *      second for loop)
3105 	 */
3106 	for (i = 0; i < size && i < vsi->num_q_vectors; i++) {
3107 		/* There are 2 cases to handle here and they are the same for
3108 		 * both Tx and Rx:
3109 		 *   if the entry was valid previously (coalesce[i].[tr]x_valid
3110 		 *   and the loop variable is less than the number of rings
3111 		 *   allocated, then write the previous values
3112 		 *
3113 		 *   if the entry was not valid previously, but the number of
3114 		 *   rings is less than are allocated (this means the number of
3115 		 *   rings increased from previously), then write out the
3116 		 *   values in the first element
3117 		 *
3118 		 *   Also, always write the ITR, even if in ITR_IS_DYNAMIC
3119 		 *   as there is no harm because the dynamic algorithm
3120 		 *   will just overwrite.
3121 		 */
3122 		if (i < vsi->alloc_rxq && coalesce[i].rx_valid) {
3123 			rc = &vsi->q_vectors[i]->rx;
3124 			rc->itr_settings = coalesce[i].itr_rx;
3125 			ice_write_itr(rc, rc->itr_setting);
3126 		} else if (i < vsi->alloc_rxq) {
3127 			rc = &vsi->q_vectors[i]->rx;
3128 			rc->itr_settings = coalesce[0].itr_rx;
3129 			ice_write_itr(rc, rc->itr_setting);
3130 		}
3131 
3132 		if (i < vsi->alloc_txq && coalesce[i].tx_valid) {
3133 			rc = &vsi->q_vectors[i]->tx;
3134 			rc->itr_settings = coalesce[i].itr_tx;
3135 			ice_write_itr(rc, rc->itr_setting);
3136 		} else if (i < vsi->alloc_txq) {
3137 			rc = &vsi->q_vectors[i]->tx;
3138 			rc->itr_settings = coalesce[0].itr_tx;
3139 			ice_write_itr(rc, rc->itr_setting);
3140 		}
3141 
3142 		vsi->q_vectors[i]->intrl = coalesce[i].intrl;
3143 		ice_set_q_vector_intrl(vsi->q_vectors[i]);
3144 	}
3145 
3146 	/* the number of queue vectors increased so write whatever is in
3147 	 * the first element
3148 	 */
3149 	for (; i < vsi->num_q_vectors; i++) {
3150 		/* transmit */
3151 		rc = &vsi->q_vectors[i]->tx;
3152 		rc->itr_settings = coalesce[0].itr_tx;
3153 		ice_write_itr(rc, rc->itr_setting);
3154 
3155 		/* receive */
3156 		rc = &vsi->q_vectors[i]->rx;
3157 		rc->itr_settings = coalesce[0].itr_rx;
3158 		ice_write_itr(rc, rc->itr_setting);
3159 
3160 		vsi->q_vectors[i]->intrl = coalesce[0].intrl;
3161 		ice_set_q_vector_intrl(vsi->q_vectors[i]);
3162 	}
3163 }
3164 
3165 /**
3166  * ice_vsi_rebuild - Rebuild VSI after reset
3167  * @vsi: VSI to be rebuild
3168  * @init_vsi: is this an initialization or a reconfigure of the VSI
3169  *
3170  * Returns 0 on success and negative value on failure
3171  */
3172 int ice_vsi_rebuild(struct ice_vsi *vsi, bool init_vsi)
3173 {
3174 	u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };
3175 	struct ice_coalesce_stored *coalesce;
3176 	int prev_num_q_vectors = 0;
3177 	enum ice_vsi_type vtype;
3178 	struct ice_pf *pf;
3179 	int ret, i;
3180 
3181 	if (!vsi)
3182 		return -EINVAL;
3183 
3184 	pf = vsi->back;
3185 	vtype = vsi->type;
3186 	if (WARN_ON(vtype == ICE_VSI_VF && !vsi->vf))
3187 		return -EINVAL;
3188 
3189 	ice_vsi_init_vlan_ops(vsi);
3190 
3191 	coalesce = kcalloc(vsi->num_q_vectors,
3192 			   sizeof(struct ice_coalesce_stored), GFP_KERNEL);
3193 	if (!coalesce)
3194 		return -ENOMEM;
3195 
3196 	prev_num_q_vectors = ice_vsi_rebuild_get_coalesce(vsi, coalesce);
3197 
3198 	ice_rm_vsi_lan_cfg(vsi->port_info, vsi->idx);
3199 	ret = ice_rm_vsi_rdma_cfg(vsi->port_info, vsi->idx);
3200 	if (ret)
3201 		dev_err(ice_pf_to_dev(vsi->back), "Failed to remove RDMA scheduler config for VSI %u, err %d\n",
3202 			vsi->vsi_num, ret);
3203 	ice_vsi_free_q_vectors(vsi);
3204 
3205 	/* SR-IOV determines needed MSIX resources all at once instead of per
3206 	 * VSI since when VFs are spawned we know how many VFs there are and how
3207 	 * many interrupts each VF needs. SR-IOV MSIX resources are also
3208 	 * cleared in the same manner.
3209 	 */
3210 	if (vtype != ICE_VSI_VF) {
3211 		/* reclaim SW interrupts back to the common pool */
3212 		ice_free_res(pf->irq_tracker, vsi->base_vector, vsi->idx);
3213 		pf->num_avail_sw_msix += vsi->num_q_vectors;
3214 		vsi->base_vector = 0;
3215 	}
3216 
3217 	if (ice_is_xdp_ena_vsi(vsi))
3218 		/* return value check can be skipped here, it always returns
3219 		 * 0 if reset is in progress
3220 		 */
3221 		ice_destroy_xdp_rings(vsi);
3222 	ice_vsi_put_qs(vsi);
3223 	ice_vsi_clear_rings(vsi);
3224 	ice_vsi_free_arrays(vsi);
3225 	if (vtype == ICE_VSI_VF)
3226 		ice_vsi_set_num_qs(vsi, vsi->vf);
3227 	else
3228 		ice_vsi_set_num_qs(vsi, NULL);
3229 
3230 	ret = ice_vsi_alloc_arrays(vsi);
3231 	if (ret < 0)
3232 		goto err_vsi;
3233 
3234 	ice_vsi_get_qs(vsi);
3235 
3236 	ice_alloc_fd_res(vsi);
3237 	ice_vsi_set_tc_cfg(vsi);
3238 
3239 	/* Initialize VSI struct elements and create VSI in FW */
3240 	ret = ice_vsi_init(vsi, init_vsi);
3241 	if (ret < 0)
3242 		goto err_vsi;
3243 
3244 	switch (vtype) {
3245 	case ICE_VSI_CTRL:
3246 	case ICE_VSI_SWITCHDEV_CTRL:
3247 	case ICE_VSI_PF:
3248 		ret = ice_vsi_alloc_q_vectors(vsi);
3249 		if (ret)
3250 			goto err_rings;
3251 
3252 		ret = ice_vsi_setup_vector_base(vsi);
3253 		if (ret)
3254 			goto err_vectors;
3255 
3256 		ret = ice_vsi_set_q_vectors_reg_idx(vsi);
3257 		if (ret)
3258 			goto err_vectors;
3259 
3260 		ret = ice_vsi_alloc_rings(vsi);
3261 		if (ret)
3262 			goto err_vectors;
3263 
3264 		ice_vsi_map_rings_to_vectors(vsi);
3265 		if (ice_is_xdp_ena_vsi(vsi)) {
3266 			ret = ice_vsi_determine_xdp_res(vsi);
3267 			if (ret)
3268 				goto err_vectors;
3269 			ret = ice_prepare_xdp_rings(vsi, vsi->xdp_prog);
3270 			if (ret)
3271 				goto err_vectors;
3272 		}
3273 		/* ICE_VSI_CTRL does not need RSS so skip RSS processing */
3274 		if (vtype != ICE_VSI_CTRL)
3275 			/* Do not exit if configuring RSS had an issue, at
3276 			 * least receive traffic on first queue. Hence no
3277 			 * need to capture return value
3278 			 */
3279 			if (test_bit(ICE_FLAG_RSS_ENA, pf->flags))
3280 				ice_vsi_cfg_rss_lut_key(vsi);
3281 		break;
3282 	case ICE_VSI_VF:
3283 		ret = ice_vsi_alloc_q_vectors(vsi);
3284 		if (ret)
3285 			goto err_rings;
3286 
3287 		ret = ice_vsi_set_q_vectors_reg_idx(vsi);
3288 		if (ret)
3289 			goto err_vectors;
3290 
3291 		ret = ice_vsi_alloc_rings(vsi);
3292 		if (ret)
3293 			goto err_vectors;
3294 
3295 		break;
3296 	case ICE_VSI_CHNL:
3297 		if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
3298 			ice_vsi_cfg_rss_lut_key(vsi);
3299 			ice_vsi_set_rss_flow_fld(vsi);
3300 		}
3301 		break;
3302 	default:
3303 		break;
3304 	}
3305 
3306 	/* configure VSI nodes based on number of queues and TC's */
3307 	for (i = 0; i < vsi->tc_cfg.numtc; i++) {
3308 		/* configure VSI nodes based on number of queues and TC's.
3309 		 * ADQ creates VSIs for each TC/Channel but doesn't
3310 		 * allocate queues instead it reconfigures the PF queues
3311 		 * as per the TC command. So max_txqs should point to the
3312 		 * PF Tx queues.
3313 		 */
3314 		if (vtype == ICE_VSI_CHNL)
3315 			max_txqs[i] = pf->num_lan_tx;
3316 		else
3317 			max_txqs[i] = vsi->alloc_txq;
3318 
3319 		if (ice_is_xdp_ena_vsi(vsi))
3320 			max_txqs[i] += vsi->num_xdp_txq;
3321 	}
3322 
3323 	if (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
3324 		/* If MQPRIO is set, means channel code path, hence for main
3325 		 * VSI's, use TC as 1
3326 		 */
3327 		ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, 1, max_txqs);
3328 	else
3329 		ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx,
3330 				      vsi->tc_cfg.ena_tc, max_txqs);
3331 
3332 	if (ret) {
3333 		dev_err(ice_pf_to_dev(pf), "VSI %d failed lan queue config, error %d\n",
3334 			vsi->vsi_num, ret);
3335 		if (init_vsi) {
3336 			ret = -EIO;
3337 			goto err_vectors;
3338 		} else {
3339 			return ice_schedule_reset(pf, ICE_RESET_PFR);
3340 		}
3341 	}
3342 	ice_vsi_rebuild_set_coalesce(vsi, coalesce, prev_num_q_vectors);
3343 	kfree(coalesce);
3344 
3345 	return 0;
3346 
3347 err_vectors:
3348 	ice_vsi_free_q_vectors(vsi);
3349 err_rings:
3350 	if (vsi->netdev) {
3351 		vsi->current_netdev_flags = 0;
3352 		unregister_netdev(vsi->netdev);
3353 		free_netdev(vsi->netdev);
3354 		vsi->netdev = NULL;
3355 	}
3356 err_vsi:
3357 	ice_vsi_clear(vsi);
3358 	set_bit(ICE_RESET_FAILED, pf->state);
3359 	kfree(coalesce);
3360 	return ret;
3361 }
3362 
3363 /**
3364  * ice_is_reset_in_progress - check for a reset in progress
3365  * @state: PF state field
3366  */
3367 bool ice_is_reset_in_progress(unsigned long *state)
3368 {
3369 	return test_bit(ICE_RESET_OICR_RECV, state) ||
3370 	       test_bit(ICE_PFR_REQ, state) ||
3371 	       test_bit(ICE_CORER_REQ, state) ||
3372 	       test_bit(ICE_GLOBR_REQ, state);
3373 }
3374 
3375 /**
3376  * ice_wait_for_reset - Wait for driver to finish reset and rebuild
3377  * @pf: pointer to the PF structure
3378  * @timeout: length of time to wait, in jiffies
3379  *
3380  * Wait (sleep) for a short time until the driver finishes cleaning up from
3381  * a device reset. The caller must be able to sleep. Use this to delay
3382  * operations that could fail while the driver is cleaning up after a device
3383  * reset.
3384  *
3385  * Returns 0 on success, -EBUSY if the reset is not finished within the
3386  * timeout, and -ERESTARTSYS if the thread was interrupted.
3387  */
3388 int ice_wait_for_reset(struct ice_pf *pf, unsigned long timeout)
3389 {
3390 	long ret;
3391 
3392 	ret = wait_event_interruptible_timeout(pf->reset_wait_queue,
3393 					       !ice_is_reset_in_progress(pf->state),
3394 					       timeout);
3395 	if (ret < 0)
3396 		return ret;
3397 	else if (!ret)
3398 		return -EBUSY;
3399 	else
3400 		return 0;
3401 }
3402 
3403 /**
3404  * ice_vsi_update_q_map - update our copy of the VSI info with new queue map
3405  * @vsi: VSI being configured
3406  * @ctx: the context buffer returned from AQ VSI update command
3407  */
3408 static void ice_vsi_update_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctx)
3409 {
3410 	vsi->info.mapping_flags = ctx->info.mapping_flags;
3411 	memcpy(&vsi->info.q_mapping, &ctx->info.q_mapping,
3412 	       sizeof(vsi->info.q_mapping));
3413 	memcpy(&vsi->info.tc_mapping, ctx->info.tc_mapping,
3414 	       sizeof(vsi->info.tc_mapping));
3415 }
3416 
3417 /**
3418  * ice_vsi_cfg_netdev_tc - Setup the netdev TC configuration
3419  * @vsi: the VSI being configured
3420  * @ena_tc: TC map to be enabled
3421  */
3422 void ice_vsi_cfg_netdev_tc(struct ice_vsi *vsi, u8 ena_tc)
3423 {
3424 	struct net_device *netdev = vsi->netdev;
3425 	struct ice_pf *pf = vsi->back;
3426 	int numtc = vsi->tc_cfg.numtc;
3427 	struct ice_dcbx_cfg *dcbcfg;
3428 	u8 netdev_tc;
3429 	int i;
3430 
3431 	if (!netdev)
3432 		return;
3433 
3434 	/* CHNL VSI doesn't have it's own netdev, hence, no netdev_tc */
3435 	if (vsi->type == ICE_VSI_CHNL)
3436 		return;
3437 
3438 	if (!ena_tc) {
3439 		netdev_reset_tc(netdev);
3440 		return;
3441 	}
3442 
3443 	if (vsi->type == ICE_VSI_PF && ice_is_adq_active(pf))
3444 		numtc = vsi->all_numtc;
3445 
3446 	if (netdev_set_num_tc(netdev, numtc))
3447 		return;
3448 
3449 	dcbcfg = &pf->hw.port_info->qos_cfg.local_dcbx_cfg;
3450 
3451 	ice_for_each_traffic_class(i)
3452 		if (vsi->tc_cfg.ena_tc & BIT(i))
3453 			netdev_set_tc_queue(netdev,
3454 					    vsi->tc_cfg.tc_info[i].netdev_tc,
3455 					    vsi->tc_cfg.tc_info[i].qcount_tx,
3456 					    vsi->tc_cfg.tc_info[i].qoffset);
3457 	/* setup TC queue map for CHNL TCs */
3458 	ice_for_each_chnl_tc(i) {
3459 		if (!(vsi->all_enatc & BIT(i)))
3460 			break;
3461 		if (!vsi->mqprio_qopt.qopt.count[i])
3462 			break;
3463 		netdev_set_tc_queue(netdev, i,
3464 				    vsi->mqprio_qopt.qopt.count[i],
3465 				    vsi->mqprio_qopt.qopt.offset[i]);
3466 	}
3467 
3468 	if (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
3469 		return;
3470 
3471 	for (i = 0; i < ICE_MAX_USER_PRIORITY; i++) {
3472 		u8 ets_tc = dcbcfg->etscfg.prio_table[i];
3473 
3474 		/* Get the mapped netdev TC# for the UP */
3475 		netdev_tc = vsi->tc_cfg.tc_info[ets_tc].netdev_tc;
3476 		netdev_set_prio_tc_map(netdev, i, netdev_tc);
3477 	}
3478 }
3479 
3480 /**
3481  * ice_vsi_setup_q_map_mqprio - Prepares mqprio based tc_config
3482  * @vsi: the VSI being configured,
3483  * @ctxt: VSI context structure
3484  * @ena_tc: number of traffic classes to enable
3485  *
3486  * Prepares VSI tc_config to have queue configurations based on MQPRIO options.
3487  */
3488 static int
3489 ice_vsi_setup_q_map_mqprio(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt,
3490 			   u8 ena_tc)
3491 {
3492 	u16 pow, offset = 0, qcount_tx = 0, qcount_rx = 0, qmap;
3493 	u16 tc0_offset = vsi->mqprio_qopt.qopt.offset[0];
3494 	int tc0_qcount = vsi->mqprio_qopt.qopt.count[0];
3495 	u16 new_txq, new_rxq;
3496 	u8 netdev_tc = 0;
3497 	int i;
3498 
3499 	vsi->tc_cfg.ena_tc = ena_tc ? ena_tc : 1;
3500 
3501 	pow = order_base_2(tc0_qcount);
3502 	qmap = ((tc0_offset << ICE_AQ_VSI_TC_Q_OFFSET_S) &
3503 		ICE_AQ_VSI_TC_Q_OFFSET_M) |
3504 		((pow << ICE_AQ_VSI_TC_Q_NUM_S) & ICE_AQ_VSI_TC_Q_NUM_M);
3505 
3506 	ice_for_each_traffic_class(i) {
3507 		if (!(vsi->tc_cfg.ena_tc & BIT(i))) {
3508 			/* TC is not enabled */
3509 			vsi->tc_cfg.tc_info[i].qoffset = 0;
3510 			vsi->tc_cfg.tc_info[i].qcount_rx = 1;
3511 			vsi->tc_cfg.tc_info[i].qcount_tx = 1;
3512 			vsi->tc_cfg.tc_info[i].netdev_tc = 0;
3513 			ctxt->info.tc_mapping[i] = 0;
3514 			continue;
3515 		}
3516 
3517 		offset = vsi->mqprio_qopt.qopt.offset[i];
3518 		qcount_rx = vsi->mqprio_qopt.qopt.count[i];
3519 		qcount_tx = vsi->mqprio_qopt.qopt.count[i];
3520 		vsi->tc_cfg.tc_info[i].qoffset = offset;
3521 		vsi->tc_cfg.tc_info[i].qcount_rx = qcount_rx;
3522 		vsi->tc_cfg.tc_info[i].qcount_tx = qcount_tx;
3523 		vsi->tc_cfg.tc_info[i].netdev_tc = netdev_tc++;
3524 	}
3525 
3526 	if (vsi->all_numtc && vsi->all_numtc != vsi->tc_cfg.numtc) {
3527 		ice_for_each_chnl_tc(i) {
3528 			if (!(vsi->all_enatc & BIT(i)))
3529 				continue;
3530 			offset = vsi->mqprio_qopt.qopt.offset[i];
3531 			qcount_rx = vsi->mqprio_qopt.qopt.count[i];
3532 			qcount_tx = vsi->mqprio_qopt.qopt.count[i];
3533 		}
3534 	}
3535 
3536 	new_txq = offset + qcount_tx;
3537 	if (new_txq > vsi->alloc_txq) {
3538 		dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Tx queues (%u), than were allocated (%u)!\n",
3539 			new_txq, vsi->alloc_txq);
3540 		return -EINVAL;
3541 	}
3542 
3543 	new_rxq = offset + qcount_rx;
3544 	if (new_rxq > vsi->alloc_rxq) {
3545 		dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Rx queues (%u), than were allocated (%u)!\n",
3546 			new_rxq, vsi->alloc_rxq);
3547 		return -EINVAL;
3548 	}
3549 
3550 	/* Set actual Tx/Rx queue pairs */
3551 	vsi->num_txq = new_txq;
3552 	vsi->num_rxq = new_rxq;
3553 
3554 	/* Setup queue TC[0].qmap for given VSI context */
3555 	ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
3556 	ctxt->info.q_mapping[0] = cpu_to_le16(vsi->rxq_map[0]);
3557 	ctxt->info.q_mapping[1] = cpu_to_le16(tc0_qcount);
3558 
3559 	/* Find queue count available for channel VSIs and starting offset
3560 	 * for channel VSIs
3561 	 */
3562 	if (tc0_qcount && tc0_qcount < vsi->num_rxq) {
3563 		vsi->cnt_q_avail = vsi->num_rxq - tc0_qcount;
3564 		vsi->next_base_q = tc0_qcount;
3565 	}
3566 	dev_dbg(ice_pf_to_dev(vsi->back), "vsi->num_txq = %d\n",  vsi->num_txq);
3567 	dev_dbg(ice_pf_to_dev(vsi->back), "vsi->num_rxq = %d\n",  vsi->num_rxq);
3568 	dev_dbg(ice_pf_to_dev(vsi->back), "all_numtc %u, all_enatc: 0x%04x, tc_cfg.numtc %u\n",
3569 		vsi->all_numtc, vsi->all_enatc, vsi->tc_cfg.numtc);
3570 
3571 	return 0;
3572 }
3573 
3574 /**
3575  * ice_vsi_cfg_tc - Configure VSI Tx Sched for given TC map
3576  * @vsi: VSI to be configured
3577  * @ena_tc: TC bitmap
3578  *
3579  * VSI queues expected to be quiesced before calling this function
3580  */
3581 int ice_vsi_cfg_tc(struct ice_vsi *vsi, u8 ena_tc)
3582 {
3583 	u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };
3584 	struct ice_pf *pf = vsi->back;
3585 	struct ice_tc_cfg old_tc_cfg;
3586 	struct ice_vsi_ctx *ctx;
3587 	struct device *dev;
3588 	int i, ret = 0;
3589 	u8 num_tc = 0;
3590 
3591 	dev = ice_pf_to_dev(pf);
3592 	if (vsi->tc_cfg.ena_tc == ena_tc &&
3593 	    vsi->mqprio_qopt.mode != TC_MQPRIO_MODE_CHANNEL)
3594 		return ret;
3595 
3596 	ice_for_each_traffic_class(i) {
3597 		/* build bitmap of enabled TCs */
3598 		if (ena_tc & BIT(i))
3599 			num_tc++;
3600 		/* populate max_txqs per TC */
3601 		max_txqs[i] = vsi->alloc_txq;
3602 		/* Update max_txqs if it is CHNL VSI, because alloc_t[r]xq are
3603 		 * zero for CHNL VSI, hence use num_txq instead as max_txqs
3604 		 */
3605 		if (vsi->type == ICE_VSI_CHNL &&
3606 		    test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
3607 			max_txqs[i] = vsi->num_txq;
3608 	}
3609 
3610 	memcpy(&old_tc_cfg, &vsi->tc_cfg, sizeof(old_tc_cfg));
3611 	vsi->tc_cfg.ena_tc = ena_tc;
3612 	vsi->tc_cfg.numtc = num_tc;
3613 
3614 	ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
3615 	if (!ctx)
3616 		return -ENOMEM;
3617 
3618 	ctx->vf_num = 0;
3619 	ctx->info = vsi->info;
3620 
3621 	if (vsi->type == ICE_VSI_PF &&
3622 	    test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
3623 		ret = ice_vsi_setup_q_map_mqprio(vsi, ctx, ena_tc);
3624 	else
3625 		ret = ice_vsi_setup_q_map(vsi, ctx);
3626 
3627 	if (ret) {
3628 		memcpy(&vsi->tc_cfg, &old_tc_cfg, sizeof(vsi->tc_cfg));
3629 		goto out;
3630 	}
3631 
3632 	/* must to indicate which section of VSI context are being modified */
3633 	ctx->info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_RXQ_MAP_VALID);
3634 	ret = ice_update_vsi(&pf->hw, vsi->idx, ctx, NULL);
3635 	if (ret) {
3636 		dev_info(dev, "Failed VSI Update\n");
3637 		goto out;
3638 	}
3639 
3640 	if (vsi->type == ICE_VSI_PF &&
3641 	    test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
3642 		ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, 1, max_txqs);
3643 	else
3644 		ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx,
3645 				      vsi->tc_cfg.ena_tc, max_txqs);
3646 
3647 	if (ret) {
3648 		dev_err(dev, "VSI %d failed TC config, error %d\n",
3649 			vsi->vsi_num, ret);
3650 		goto out;
3651 	}
3652 	ice_vsi_update_q_map(vsi, ctx);
3653 	vsi->info.valid_sections = 0;
3654 
3655 	ice_vsi_cfg_netdev_tc(vsi, ena_tc);
3656 out:
3657 	kfree(ctx);
3658 	return ret;
3659 }
3660 
3661 /**
3662  * ice_update_ring_stats - Update ring statistics
3663  * @stats: stats to be updated
3664  * @pkts: number of processed packets
3665  * @bytes: number of processed bytes
3666  *
3667  * This function assumes that caller has acquired a u64_stats_sync lock.
3668  */
3669 static void ice_update_ring_stats(struct ice_q_stats *stats, u64 pkts, u64 bytes)
3670 {
3671 	stats->bytes += bytes;
3672 	stats->pkts += pkts;
3673 }
3674 
3675 /**
3676  * ice_update_tx_ring_stats - Update Tx ring specific counters
3677  * @tx_ring: ring to update
3678  * @pkts: number of processed packets
3679  * @bytes: number of processed bytes
3680  */
3681 void ice_update_tx_ring_stats(struct ice_tx_ring *tx_ring, u64 pkts, u64 bytes)
3682 {
3683 	u64_stats_update_begin(&tx_ring->syncp);
3684 	ice_update_ring_stats(&tx_ring->stats, pkts, bytes);
3685 	u64_stats_update_end(&tx_ring->syncp);
3686 }
3687 
3688 /**
3689  * ice_update_rx_ring_stats - Update Rx ring specific counters
3690  * @rx_ring: ring to update
3691  * @pkts: number of processed packets
3692  * @bytes: number of processed bytes
3693  */
3694 void ice_update_rx_ring_stats(struct ice_rx_ring *rx_ring, u64 pkts, u64 bytes)
3695 {
3696 	u64_stats_update_begin(&rx_ring->syncp);
3697 	ice_update_ring_stats(&rx_ring->stats, pkts, bytes);
3698 	u64_stats_update_end(&rx_ring->syncp);
3699 }
3700 
3701 /**
3702  * ice_is_dflt_vsi_in_use - check if the default forwarding VSI is being used
3703  * @pi: port info of the switch with default VSI
3704  *
3705  * Return true if the there is a single VSI in default forwarding VSI list
3706  */
3707 bool ice_is_dflt_vsi_in_use(struct ice_port_info *pi)
3708 {
3709 	bool exists = false;
3710 
3711 	ice_check_if_dflt_vsi(pi, 0, &exists);
3712 	return exists;
3713 }
3714 
3715 /**
3716  * ice_is_vsi_dflt_vsi - check if the VSI passed in is the default VSI
3717  * @vsi: VSI to compare against default forwarding VSI
3718  *
3719  * If this VSI passed in is the default forwarding VSI then return true, else
3720  * return false
3721  */
3722 bool ice_is_vsi_dflt_vsi(struct ice_vsi *vsi)
3723 {
3724 	return ice_check_if_dflt_vsi(vsi->port_info, vsi->idx, NULL);
3725 }
3726 
3727 /**
3728  * ice_set_dflt_vsi - set the default forwarding VSI
3729  * @vsi: VSI getting set as the default forwarding VSI on the switch
3730  *
3731  * If the VSI passed in is already the default VSI and it's enabled just return
3732  * success.
3733  *
3734  * Otherwise try to set the VSI passed in as the switch's default VSI and
3735  * return the result.
3736  */
3737 int ice_set_dflt_vsi(struct ice_vsi *vsi)
3738 {
3739 	struct device *dev;
3740 	int status;
3741 
3742 	if (!vsi)
3743 		return -EINVAL;
3744 
3745 	dev = ice_pf_to_dev(vsi->back);
3746 
3747 	/* the VSI passed in is already the default VSI */
3748 	if (ice_is_vsi_dflt_vsi(vsi)) {
3749 		dev_dbg(dev, "VSI %d passed in is already the default forwarding VSI, nothing to do\n",
3750 			vsi->vsi_num);
3751 		return 0;
3752 	}
3753 
3754 	status = ice_cfg_dflt_vsi(vsi->port_info, vsi->idx, true, ICE_FLTR_RX);
3755 	if (status) {
3756 		dev_err(dev, "Failed to set VSI %d as the default forwarding VSI, error %d\n",
3757 			vsi->vsi_num, status);
3758 		return status;
3759 	}
3760 
3761 	return 0;
3762 }
3763 
3764 /**
3765  * ice_clear_dflt_vsi - clear the default forwarding VSI
3766  * @vsi: VSI to remove from filter list
3767  *
3768  * If the switch has no default VSI or it's not enabled then return error.
3769  *
3770  * Otherwise try to clear the default VSI and return the result.
3771  */
3772 int ice_clear_dflt_vsi(struct ice_vsi *vsi)
3773 {
3774 	struct device *dev;
3775 	int status;
3776 
3777 	if (!vsi)
3778 		return -EINVAL;
3779 
3780 	dev = ice_pf_to_dev(vsi->back);
3781 
3782 	/* there is no default VSI configured */
3783 	if (!ice_is_dflt_vsi_in_use(vsi->port_info))
3784 		return -ENODEV;
3785 
3786 	status = ice_cfg_dflt_vsi(vsi->port_info, vsi->idx, false,
3787 				  ICE_FLTR_RX);
3788 	if (status) {
3789 		dev_err(dev, "Failed to clear the default forwarding VSI %d, error %d\n",
3790 			vsi->vsi_num, status);
3791 		return -EIO;
3792 	}
3793 
3794 	return 0;
3795 }
3796 
3797 /**
3798  * ice_get_link_speed_mbps - get link speed in Mbps
3799  * @vsi: the VSI whose link speed is being queried
3800  *
3801  * Return current VSI link speed and 0 if the speed is unknown.
3802  */
3803 int ice_get_link_speed_mbps(struct ice_vsi *vsi)
3804 {
3805 	switch (vsi->port_info->phy.link_info.link_speed) {
3806 	case ICE_AQ_LINK_SPEED_100GB:
3807 		return SPEED_100000;
3808 	case ICE_AQ_LINK_SPEED_50GB:
3809 		return SPEED_50000;
3810 	case ICE_AQ_LINK_SPEED_40GB:
3811 		return SPEED_40000;
3812 	case ICE_AQ_LINK_SPEED_25GB:
3813 		return SPEED_25000;
3814 	case ICE_AQ_LINK_SPEED_20GB:
3815 		return SPEED_20000;
3816 	case ICE_AQ_LINK_SPEED_10GB:
3817 		return SPEED_10000;
3818 	case ICE_AQ_LINK_SPEED_5GB:
3819 		return SPEED_5000;
3820 	case ICE_AQ_LINK_SPEED_2500MB:
3821 		return SPEED_2500;
3822 	case ICE_AQ_LINK_SPEED_1000MB:
3823 		return SPEED_1000;
3824 	case ICE_AQ_LINK_SPEED_100MB:
3825 		return SPEED_100;
3826 	case ICE_AQ_LINK_SPEED_10MB:
3827 		return SPEED_10;
3828 	case ICE_AQ_LINK_SPEED_UNKNOWN:
3829 	default:
3830 		return 0;
3831 	}
3832 }
3833 
3834 /**
3835  * ice_get_link_speed_kbps - get link speed in Kbps
3836  * @vsi: the VSI whose link speed is being queried
3837  *
3838  * Return current VSI link speed and 0 if the speed is unknown.
3839  */
3840 int ice_get_link_speed_kbps(struct ice_vsi *vsi)
3841 {
3842 	int speed_mbps;
3843 
3844 	speed_mbps = ice_get_link_speed_mbps(vsi);
3845 
3846 	return speed_mbps * 1000;
3847 }
3848 
3849 /**
3850  * ice_set_min_bw_limit - setup minimum BW limit for Tx based on min_tx_rate
3851  * @vsi: VSI to be configured
3852  * @min_tx_rate: min Tx rate in Kbps to be configured as BW limit
3853  *
3854  * If the min_tx_rate is specified as 0 that means to clear the minimum BW limit
3855  * profile, otherwise a non-zero value will force a minimum BW limit for the VSI
3856  * on TC 0.
3857  */
3858 int ice_set_min_bw_limit(struct ice_vsi *vsi, u64 min_tx_rate)
3859 {
3860 	struct ice_pf *pf = vsi->back;
3861 	struct device *dev;
3862 	int status;
3863 	int speed;
3864 
3865 	dev = ice_pf_to_dev(pf);
3866 	if (!vsi->port_info) {
3867 		dev_dbg(dev, "VSI %d, type %u specified doesn't have valid port_info\n",
3868 			vsi->idx, vsi->type);
3869 		return -EINVAL;
3870 	}
3871 
3872 	speed = ice_get_link_speed_kbps(vsi);
3873 	if (min_tx_rate > (u64)speed) {
3874 		dev_err(dev, "invalid min Tx rate %llu Kbps specified for %s %d is greater than current link speed %u Kbps\n",
3875 			min_tx_rate, ice_vsi_type_str(vsi->type), vsi->idx,
3876 			speed);
3877 		return -EINVAL;
3878 	}
3879 
3880 	/* Configure min BW for VSI limit */
3881 	if (min_tx_rate) {
3882 		status = ice_cfg_vsi_bw_lmt_per_tc(vsi->port_info, vsi->idx, 0,
3883 						   ICE_MIN_BW, min_tx_rate);
3884 		if (status) {
3885 			dev_err(dev, "failed to set min Tx rate(%llu Kbps) for %s %d\n",
3886 				min_tx_rate, ice_vsi_type_str(vsi->type),
3887 				vsi->idx);
3888 			return status;
3889 		}
3890 
3891 		dev_dbg(dev, "set min Tx rate(%llu Kbps) for %s\n",
3892 			min_tx_rate, ice_vsi_type_str(vsi->type));
3893 	} else {
3894 		status = ice_cfg_vsi_bw_dflt_lmt_per_tc(vsi->port_info,
3895 							vsi->idx, 0,
3896 							ICE_MIN_BW);
3897 		if (status) {
3898 			dev_err(dev, "failed to clear min Tx rate configuration for %s %d\n",
3899 				ice_vsi_type_str(vsi->type), vsi->idx);
3900 			return status;
3901 		}
3902 
3903 		dev_dbg(dev, "cleared min Tx rate configuration for %s %d\n",
3904 			ice_vsi_type_str(vsi->type), vsi->idx);
3905 	}
3906 
3907 	return 0;
3908 }
3909 
3910 /**
3911  * ice_set_max_bw_limit - setup maximum BW limit for Tx based on max_tx_rate
3912  * @vsi: VSI to be configured
3913  * @max_tx_rate: max Tx rate in Kbps to be configured as BW limit
3914  *
3915  * If the max_tx_rate is specified as 0 that means to clear the maximum BW limit
3916  * profile, otherwise a non-zero value will force a maximum BW limit for the VSI
3917  * on TC 0.
3918  */
3919 int ice_set_max_bw_limit(struct ice_vsi *vsi, u64 max_tx_rate)
3920 {
3921 	struct ice_pf *pf = vsi->back;
3922 	struct device *dev;
3923 	int status;
3924 	int speed;
3925 
3926 	dev = ice_pf_to_dev(pf);
3927 	if (!vsi->port_info) {
3928 		dev_dbg(dev, "VSI %d, type %u specified doesn't have valid port_info\n",
3929 			vsi->idx, vsi->type);
3930 		return -EINVAL;
3931 	}
3932 
3933 	speed = ice_get_link_speed_kbps(vsi);
3934 	if (max_tx_rate > (u64)speed) {
3935 		dev_err(dev, "invalid max Tx rate %llu Kbps specified for %s %d is greater than current link speed %u Kbps\n",
3936 			max_tx_rate, ice_vsi_type_str(vsi->type), vsi->idx,
3937 			speed);
3938 		return -EINVAL;
3939 	}
3940 
3941 	/* Configure max BW for VSI limit */
3942 	if (max_tx_rate) {
3943 		status = ice_cfg_vsi_bw_lmt_per_tc(vsi->port_info, vsi->idx, 0,
3944 						   ICE_MAX_BW, max_tx_rate);
3945 		if (status) {
3946 			dev_err(dev, "failed setting max Tx rate(%llu Kbps) for %s %d\n",
3947 				max_tx_rate, ice_vsi_type_str(vsi->type),
3948 				vsi->idx);
3949 			return status;
3950 		}
3951 
3952 		dev_dbg(dev, "set max Tx rate(%llu Kbps) for %s %d\n",
3953 			max_tx_rate, ice_vsi_type_str(vsi->type), vsi->idx);
3954 	} else {
3955 		status = ice_cfg_vsi_bw_dflt_lmt_per_tc(vsi->port_info,
3956 							vsi->idx, 0,
3957 							ICE_MAX_BW);
3958 		if (status) {
3959 			dev_err(dev, "failed clearing max Tx rate configuration for %s %d\n",
3960 				ice_vsi_type_str(vsi->type), vsi->idx);
3961 			return status;
3962 		}
3963 
3964 		dev_dbg(dev, "cleared max Tx rate configuration for %s %d\n",
3965 			ice_vsi_type_str(vsi->type), vsi->idx);
3966 	}
3967 
3968 	return 0;
3969 }
3970 
3971 /**
3972  * ice_set_link - turn on/off physical link
3973  * @vsi: VSI to modify physical link on
3974  * @ena: turn on/off physical link
3975  */
3976 int ice_set_link(struct ice_vsi *vsi, bool ena)
3977 {
3978 	struct device *dev = ice_pf_to_dev(vsi->back);
3979 	struct ice_port_info *pi = vsi->port_info;
3980 	struct ice_hw *hw = pi->hw;
3981 	int status;
3982 
3983 	if (vsi->type != ICE_VSI_PF)
3984 		return -EINVAL;
3985 
3986 	status = ice_aq_set_link_restart_an(pi, ena, NULL);
3987 
3988 	/* if link is owned by manageability, FW will return ICE_AQ_RC_EMODE.
3989 	 * this is not a fatal error, so print a warning message and return
3990 	 * a success code. Return an error if FW returns an error code other
3991 	 * than ICE_AQ_RC_EMODE
3992 	 */
3993 	if (status == -EIO) {
3994 		if (hw->adminq.sq_last_status == ICE_AQ_RC_EMODE)
3995 			dev_dbg(dev, "can't set link to %s, err %d aq_err %s. not fatal, continuing\n",
3996 				(ena ? "ON" : "OFF"), status,
3997 				ice_aq_str(hw->adminq.sq_last_status));
3998 	} else if (status) {
3999 		dev_err(dev, "can't set link to %s, err %d aq_err %s\n",
4000 			(ena ? "ON" : "OFF"), status,
4001 			ice_aq_str(hw->adminq.sq_last_status));
4002 		return status;
4003 	}
4004 
4005 	return 0;
4006 }
4007 
4008 /**
4009  * ice_vsi_add_vlan_zero - add VLAN 0 filter(s) for this VSI
4010  * @vsi: VSI used to add VLAN filters
4011  *
4012  * In Single VLAN Mode (SVM), single VLAN filters via ICE_SW_LKUP_VLAN are based
4013  * on the inner VLAN ID, so the VLAN TPID (i.e. 0x8100 or 0x888a8) doesn't
4014  * matter. In Double VLAN Mode (DVM), outer/single VLAN filters via
4015  * ICE_SW_LKUP_VLAN are based on the outer/single VLAN ID + VLAN TPID.
4016  *
4017  * For both modes add a VLAN 0 + no VLAN TPID filter to handle untagged traffic
4018  * when VLAN pruning is enabled. Also, this handles VLAN 0 priority tagged
4019  * traffic in SVM, since the VLAN TPID isn't part of filtering.
4020  *
4021  * If DVM is enabled then an explicit VLAN 0 + VLAN TPID filter needs to be
4022  * added to allow VLAN 0 priority tagged traffic in DVM, since the VLAN TPID is
4023  * part of filtering.
4024  */
4025 int ice_vsi_add_vlan_zero(struct ice_vsi *vsi)
4026 {
4027 	struct ice_vsi_vlan_ops *vlan_ops = ice_get_compat_vsi_vlan_ops(vsi);
4028 	struct ice_vlan vlan;
4029 	int err;
4030 
4031 	vlan = ICE_VLAN(0, 0, 0);
4032 	err = vlan_ops->add_vlan(vsi, &vlan);
4033 	if (err && err != -EEXIST)
4034 		return err;
4035 
4036 	/* in SVM both VLAN 0 filters are identical */
4037 	if (!ice_is_dvm_ena(&vsi->back->hw))
4038 		return 0;
4039 
4040 	vlan = ICE_VLAN(ETH_P_8021Q, 0, 0);
4041 	err = vlan_ops->add_vlan(vsi, &vlan);
4042 	if (err && err != -EEXIST)
4043 		return err;
4044 
4045 	return 0;
4046 }
4047 
4048 /**
4049  * ice_vsi_del_vlan_zero - delete VLAN 0 filter(s) for this VSI
4050  * @vsi: VSI used to add VLAN filters
4051  *
4052  * Delete the VLAN 0 filters in the same manner that they were added in
4053  * ice_vsi_add_vlan_zero.
4054  */
4055 int ice_vsi_del_vlan_zero(struct ice_vsi *vsi)
4056 {
4057 	struct ice_vsi_vlan_ops *vlan_ops = ice_get_compat_vsi_vlan_ops(vsi);
4058 	struct ice_vlan vlan;
4059 	int err;
4060 
4061 	vlan = ICE_VLAN(0, 0, 0);
4062 	err = vlan_ops->del_vlan(vsi, &vlan);
4063 	if (err && err != -EEXIST)
4064 		return err;
4065 
4066 	/* in SVM both VLAN 0 filters are identical */
4067 	if (!ice_is_dvm_ena(&vsi->back->hw))
4068 		return 0;
4069 
4070 	vlan = ICE_VLAN(ETH_P_8021Q, 0, 0);
4071 	err = vlan_ops->del_vlan(vsi, &vlan);
4072 	if (err && err != -EEXIST)
4073 		return err;
4074 
4075 	/* when deleting the last VLAN filter, make sure to disable the VLAN
4076 	 * promisc mode so the filter isn't left by accident
4077 	 */
4078 	return ice_clear_vsi_promisc(&vsi->back->hw, vsi->idx,
4079 				    ICE_MCAST_VLAN_PROMISC_BITS, 0);
4080 }
4081 
4082 /**
4083  * ice_vsi_num_zero_vlans - get number of VLAN 0 filters based on VLAN mode
4084  * @vsi: VSI used to get the VLAN mode
4085  *
4086  * If DVM is enabled then 2 VLAN 0 filters are added, else if SVM is enabled
4087  * then 1 VLAN 0 filter is added. See ice_vsi_add_vlan_zero for more details.
4088  */
4089 static u16 ice_vsi_num_zero_vlans(struct ice_vsi *vsi)
4090 {
4091 #define ICE_DVM_NUM_ZERO_VLAN_FLTRS	2
4092 #define ICE_SVM_NUM_ZERO_VLAN_FLTRS	1
4093 	/* no VLAN 0 filter is created when a port VLAN is active */
4094 	if (vsi->type == ICE_VSI_VF) {
4095 		if (WARN_ON(!vsi->vf))
4096 			return 0;
4097 
4098 		if (ice_vf_is_port_vlan_ena(vsi->vf))
4099 			return 0;
4100 	}
4101 
4102 	if (ice_is_dvm_ena(&vsi->back->hw))
4103 		return ICE_DVM_NUM_ZERO_VLAN_FLTRS;
4104 	else
4105 		return ICE_SVM_NUM_ZERO_VLAN_FLTRS;
4106 }
4107 
4108 /**
4109  * ice_vsi_has_non_zero_vlans - check if VSI has any non-zero VLANs
4110  * @vsi: VSI used to determine if any non-zero VLANs have been added
4111  */
4112 bool ice_vsi_has_non_zero_vlans(struct ice_vsi *vsi)
4113 {
4114 	return (vsi->num_vlan > ice_vsi_num_zero_vlans(vsi));
4115 }
4116 
4117 /**
4118  * ice_vsi_num_non_zero_vlans - get the number of non-zero VLANs for this VSI
4119  * @vsi: VSI used to get the number of non-zero VLANs added
4120  */
4121 u16 ice_vsi_num_non_zero_vlans(struct ice_vsi *vsi)
4122 {
4123 	return (vsi->num_vlan - ice_vsi_num_zero_vlans(vsi));
4124 }
4125 
4126 /**
4127  * ice_is_feature_supported
4128  * @pf: pointer to the struct ice_pf instance
4129  * @f: feature enum to be checked
4130  *
4131  * returns true if feature is supported, false otherwise
4132  */
4133 bool ice_is_feature_supported(struct ice_pf *pf, enum ice_feature f)
4134 {
4135 	if (f < 0 || f >= ICE_F_MAX)
4136 		return false;
4137 
4138 	return test_bit(f, pf->features);
4139 }
4140 
4141 /**
4142  * ice_set_feature_support
4143  * @pf: pointer to the struct ice_pf instance
4144  * @f: feature enum to set
4145  */
4146 static void ice_set_feature_support(struct ice_pf *pf, enum ice_feature f)
4147 {
4148 	if (f < 0 || f >= ICE_F_MAX)
4149 		return;
4150 
4151 	set_bit(f, pf->features);
4152 }
4153 
4154 /**
4155  * ice_clear_feature_support
4156  * @pf: pointer to the struct ice_pf instance
4157  * @f: feature enum to clear
4158  */
4159 void ice_clear_feature_support(struct ice_pf *pf, enum ice_feature f)
4160 {
4161 	if (f < 0 || f >= ICE_F_MAX)
4162 		return;
4163 
4164 	clear_bit(f, pf->features);
4165 }
4166 
4167 /**
4168  * ice_init_feature_support
4169  * @pf: pointer to the struct ice_pf instance
4170  *
4171  * called during init to setup supported feature
4172  */
4173 void ice_init_feature_support(struct ice_pf *pf)
4174 {
4175 	switch (pf->hw.device_id) {
4176 	case ICE_DEV_ID_E810C_BACKPLANE:
4177 	case ICE_DEV_ID_E810C_QSFP:
4178 	case ICE_DEV_ID_E810C_SFP:
4179 		ice_set_feature_support(pf, ICE_F_DSCP);
4180 		ice_set_feature_support(pf, ICE_F_PTP_EXTTS);
4181 		if (ice_is_e810t(&pf->hw)) {
4182 			ice_set_feature_support(pf, ICE_F_SMA_CTRL);
4183 			if (ice_gnss_is_gps_present(&pf->hw))
4184 				ice_set_feature_support(pf, ICE_F_GNSS);
4185 		}
4186 		break;
4187 	default:
4188 		break;
4189 	}
4190 }
4191 
4192 /**
4193  * ice_vsi_update_security - update security block in VSI
4194  * @vsi: pointer to VSI structure
4195  * @fill: function pointer to fill ctx
4196  */
4197 int
4198 ice_vsi_update_security(struct ice_vsi *vsi, void (*fill)(struct ice_vsi_ctx *))
4199 {
4200 	struct ice_vsi_ctx ctx = { 0 };
4201 
4202 	ctx.info = vsi->info;
4203 	ctx.info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_SECURITY_VALID);
4204 	fill(&ctx);
4205 
4206 	if (ice_update_vsi(&vsi->back->hw, vsi->idx, &ctx, NULL))
4207 		return -ENODEV;
4208 
4209 	vsi->info = ctx.info;
4210 	return 0;
4211 }
4212 
4213 /**
4214  * ice_vsi_ctx_set_antispoof - set antispoof function in VSI ctx
4215  * @ctx: pointer to VSI ctx structure
4216  */
4217 void ice_vsi_ctx_set_antispoof(struct ice_vsi_ctx *ctx)
4218 {
4219 	ctx->info.sec_flags |= ICE_AQ_VSI_SEC_FLAG_ENA_MAC_ANTI_SPOOF |
4220 			       (ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA <<
4221 				ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S);
4222 }
4223 
4224 /**
4225  * ice_vsi_ctx_clear_antispoof - clear antispoof function in VSI ctx
4226  * @ctx: pointer to VSI ctx structure
4227  */
4228 void ice_vsi_ctx_clear_antispoof(struct ice_vsi_ctx *ctx)
4229 {
4230 	ctx->info.sec_flags &= ~ICE_AQ_VSI_SEC_FLAG_ENA_MAC_ANTI_SPOOF &
4231 			       ~(ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA <<
4232 				 ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S);
4233 }
4234 
4235 /**
4236  * ice_vsi_ctx_set_allow_override - allow destination override on VSI
4237  * @ctx: pointer to VSI ctx structure
4238  */
4239 void ice_vsi_ctx_set_allow_override(struct ice_vsi_ctx *ctx)
4240 {
4241 	ctx->info.sec_flags |= ICE_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD;
4242 }
4243 
4244 /**
4245  * ice_vsi_ctx_clear_allow_override - turn off destination override on VSI
4246  * @ctx: pointer to VSI ctx structure
4247  */
4248 void ice_vsi_ctx_clear_allow_override(struct ice_vsi_ctx *ctx)
4249 {
4250 	ctx->info.sec_flags &= ~ICE_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD;
4251 }
4252