1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright (c) 2018, Intel Corporation. */ 3 4 #include "ice.h" 5 #include "ice_base.h" 6 #include "ice_flow.h" 7 #include "ice_lib.h" 8 #include "ice_fltr.h" 9 #include "ice_dcb_lib.h" 10 #include "ice_type.h" 11 #include "ice_vsi_vlan_ops.h" 12 13 /** 14 * ice_vsi_type_str - maps VSI type enum to string equivalents 15 * @vsi_type: VSI type enum 16 */ 17 const char *ice_vsi_type_str(enum ice_vsi_type vsi_type) 18 { 19 switch (vsi_type) { 20 case ICE_VSI_PF: 21 return "ICE_VSI_PF"; 22 case ICE_VSI_VF: 23 return "ICE_VSI_VF"; 24 case ICE_VSI_SF: 25 return "ICE_VSI_SF"; 26 case ICE_VSI_CTRL: 27 return "ICE_VSI_CTRL"; 28 case ICE_VSI_CHNL: 29 return "ICE_VSI_CHNL"; 30 case ICE_VSI_LB: 31 return "ICE_VSI_LB"; 32 default: 33 return "unknown"; 34 } 35 } 36 37 /** 38 * ice_vsi_ctrl_all_rx_rings - Start or stop a VSI's Rx rings 39 * @vsi: the VSI being configured 40 * @ena: start or stop the Rx rings 41 * 42 * First enable/disable all of the Rx rings, flush any remaining writes, and 43 * then verify that they have all been enabled/disabled successfully. This will 44 * let all of the register writes complete when enabling/disabling the Rx rings 45 * before waiting for the change in hardware to complete. 46 */ 47 static int ice_vsi_ctrl_all_rx_rings(struct ice_vsi *vsi, bool ena) 48 { 49 int ret = 0; 50 u16 i; 51 52 ice_for_each_rxq(vsi, i) 53 ice_vsi_ctrl_one_rx_ring(vsi, ena, i, false); 54 55 ice_flush(&vsi->back->hw); 56 57 ice_for_each_rxq(vsi, i) { 58 ret = ice_vsi_wait_one_rx_ring(vsi, ena, i); 59 if (ret) 60 break; 61 } 62 63 return ret; 64 } 65 66 /** 67 * ice_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the VSI 68 * @vsi: VSI pointer 69 * 70 * On error: returns error code (negative) 71 * On success: returns 0 72 */ 73 static int ice_vsi_alloc_arrays(struct ice_vsi *vsi) 74 { 75 struct ice_pf *pf = vsi->back; 76 struct device *dev; 77 78 dev = ice_pf_to_dev(pf); 79 if (vsi->type == ICE_VSI_CHNL) 80 return 0; 81 82 /* allocate memory for both Tx and Rx ring pointers */ 83 vsi->tx_rings = devm_kcalloc(dev, vsi->alloc_txq, 84 sizeof(*vsi->tx_rings), GFP_KERNEL); 85 if (!vsi->tx_rings) 86 return -ENOMEM; 87 88 vsi->rx_rings = devm_kcalloc(dev, vsi->alloc_rxq, 89 sizeof(*vsi->rx_rings), GFP_KERNEL); 90 if (!vsi->rx_rings) 91 goto err_rings; 92 93 /* txq_map needs to have enough space to track both Tx (stack) rings 94 * and XDP rings; at this point vsi->num_xdp_txq might not be set, 95 * so use num_possible_cpus() as we want to always provide XDP ring 96 * per CPU, regardless of queue count settings from user that might 97 * have come from ethtool's set_channels() callback; 98 */ 99 vsi->txq_map = devm_kcalloc(dev, (vsi->alloc_txq + num_possible_cpus()), 100 sizeof(*vsi->txq_map), GFP_KERNEL); 101 102 if (!vsi->txq_map) 103 goto err_txq_map; 104 105 vsi->rxq_map = devm_kcalloc(dev, vsi->alloc_rxq, 106 sizeof(*vsi->rxq_map), GFP_KERNEL); 107 if (!vsi->rxq_map) 108 goto err_rxq_map; 109 110 /* allocate memory for q_vector pointers */ 111 vsi->q_vectors = devm_kcalloc(dev, vsi->num_q_vectors, 112 sizeof(*vsi->q_vectors), GFP_KERNEL); 113 if (!vsi->q_vectors) 114 goto err_vectors; 115 116 return 0; 117 118 err_vectors: 119 devm_kfree(dev, vsi->rxq_map); 120 err_rxq_map: 121 devm_kfree(dev, vsi->txq_map); 122 err_txq_map: 123 devm_kfree(dev, vsi->rx_rings); 124 err_rings: 125 devm_kfree(dev, vsi->tx_rings); 126 return -ENOMEM; 127 } 128 129 /** 130 * ice_vsi_set_num_desc - Set number of descriptors for queues on this VSI 131 * @vsi: the VSI being configured 132 */ 133 static void ice_vsi_set_num_desc(struct ice_vsi *vsi) 134 { 135 switch (vsi->type) { 136 case ICE_VSI_PF: 137 case ICE_VSI_SF: 138 case ICE_VSI_CTRL: 139 case ICE_VSI_LB: 140 /* a user could change the values of num_[tr]x_desc using 141 * ethtool -G so we should keep those values instead of 142 * overwriting them with the defaults. 143 */ 144 if (!vsi->num_rx_desc) 145 vsi->num_rx_desc = ICE_DFLT_NUM_RX_DESC; 146 if (!vsi->num_tx_desc) 147 vsi->num_tx_desc = ICE_DFLT_NUM_TX_DESC; 148 break; 149 default: 150 dev_dbg(ice_pf_to_dev(vsi->back), "Not setting number of Tx/Rx descriptors for VSI type %d\n", 151 vsi->type); 152 break; 153 } 154 } 155 156 static u16 ice_get_rxq_count(struct ice_pf *pf, u16 held) 157 { 158 return min_t(u16, ice_get_avail_rxq_count(pf) + held, 159 netif_get_num_default_rss_queues()); 160 } 161 162 static u16 ice_get_txq_count(struct ice_pf *pf, u16 held) 163 { 164 return min_t(u16, ice_get_avail_txq_count(pf) + held, 165 netif_get_num_default_rss_queues()); 166 } 167 168 /* @held_txq, @held_rxq: queues the VSI still owns but is about to return to the 169 * PF pool, so that the result matches what it will be once they are back there. 170 */ 171 static struct ice_vsi_alloc_queues_params 172 ice_vsi_get_num_qs(struct ice_vsi *vsi, u16 held_txq, u16 held_rxq) 173 { 174 struct ice_vsi_alloc_queues_params qs = {}; 175 struct ice_pf *pf = vsi->back; 176 177 switch (vsi->type) { 178 case ICE_VSI_PF: 179 qs.alloc_txq = vsi->req_txq ?: ice_get_txq_count(pf, held_txq); 180 181 /* only 1 Rx queue unless RSS is enabled */ 182 if (!test_bit(ICE_FLAG_RSS_ENA, pf->flags)) 183 qs.alloc_rxq = 1; 184 else 185 qs.alloc_rxq = vsi->req_rxq ?: 186 ice_get_rxq_count(pf, held_rxq); 187 break; 188 case ICE_VSI_SF: 189 case ICE_VSI_CTRL: 190 case ICE_VSI_LB: 191 qs.alloc_txq = 1; 192 qs.alloc_rxq = 1; 193 break; 194 case ICE_VSI_VF: 195 qs.alloc_txq = vsi->vf->num_req_qs ?: vsi->vf->num_vf_qs; 196 qs.alloc_rxq = qs.alloc_txq; 197 break; 198 case ICE_VSI_CHNL: 199 break; 200 default: 201 dev_warn(ice_pf_to_dev(pf), "Unknown VSI type %d\n", vsi->type); 202 return vsi->alloc_txq_rxq; 203 } 204 205 return qs; 206 } 207 208 /** 209 * ice_vsi_set_num_qs - Set number of queues, descriptors and vectors for a VSI 210 * @vsi: the VSI being configured 211 */ 212 static void ice_vsi_set_num_qs(struct ice_vsi *vsi) 213 { 214 enum ice_vsi_type vsi_type = vsi->type; 215 struct ice_pf *pf = vsi->back; 216 struct ice_vf *vf = vsi->vf; 217 218 if (WARN_ON(vsi_type == ICE_VSI_VF && !vf)) 219 return; 220 221 vsi->alloc_txq_rxq = ice_vsi_get_num_qs(vsi, 0, 0); 222 223 switch (vsi_type) { 224 case ICE_VSI_PF: 225 if (vsi->req_txq) 226 vsi->num_txq = vsi->req_txq; 227 if (vsi->req_rxq && test_bit(ICE_FLAG_RSS_ENA, pf->flags)) 228 vsi->num_rxq = vsi->req_rxq; 229 230 pf->num_lan_tx = vsi->alloc_txq; 231 pf->num_lan_rx = vsi->alloc_rxq; 232 233 vsi->num_q_vectors = max(vsi->alloc_rxq, vsi->alloc_txq); 234 break; 235 case ICE_VSI_SF: 236 vsi->num_q_vectors = 1; 237 vsi->irq_dyn_alloc = true; 238 break; 239 case ICE_VSI_VF: 240 if (vf->num_req_qs) 241 vf->num_vf_qs = vf->num_req_qs; 242 /* pf->vfs.num_msix_per includes (VF miscellaneous vector + 243 * data queue interrupts). Since vsi->num_q_vectors is number 244 * of queues vectors, subtract 1 (ICE_NONQ_VECS_VF) from the 245 * original vector count 246 */ 247 vsi->num_q_vectors = vf->num_msix - ICE_NONQ_VECS_VF; 248 break; 249 case ICE_VSI_CTRL: 250 vsi->num_q_vectors = 1; 251 break; 252 case ICE_VSI_CHNL: 253 break; 254 case ICE_VSI_LB: 255 /* A dummy q_vector, no actual IRQ. */ 256 vsi->num_q_vectors = 1; 257 break; 258 default: 259 break; 260 } 261 262 ice_vsi_set_num_desc(vsi); 263 } 264 265 /** 266 * ice_get_free_slot - get the next non-NULL location index in array 267 * @array: array to search 268 * @size: size of the array 269 * @curr: last known occupied index to be used as a search hint 270 * 271 * void * is being used to keep the functionality generic. This lets us use this 272 * function on any array of pointers. 273 */ 274 static int ice_get_free_slot(void *array, int size, int curr) 275 { 276 int **tmp_array = (int **)array; 277 int next; 278 279 if (curr < (size - 1) && !tmp_array[curr + 1]) { 280 next = curr + 1; 281 } else { 282 int i = 0; 283 284 while ((i < size) && (tmp_array[i])) 285 i++; 286 if (i == size) 287 next = ICE_NO_VSI; 288 else 289 next = i; 290 } 291 return next; 292 } 293 294 /** 295 * ice_vsi_delete_from_hw - delete a VSI from the switch 296 * @vsi: pointer to VSI being removed 297 */ 298 static void ice_vsi_delete_from_hw(struct ice_vsi *vsi) 299 { 300 struct ice_pf *pf = vsi->back; 301 struct ice_vsi_ctx *ctxt; 302 int status; 303 304 ice_fltr_remove_all(vsi); 305 ctxt = kzalloc_obj(*ctxt); 306 if (!ctxt) 307 return; 308 309 if (vsi->type == ICE_VSI_VF) 310 ctxt->vf_num = vsi->vf->vf_id; 311 ctxt->vsi_num = vsi->vsi_num; 312 313 memcpy(&ctxt->info, &vsi->info, sizeof(ctxt->info)); 314 315 status = ice_free_vsi(&pf->hw, vsi->idx, ctxt, false, NULL); 316 if (status) 317 dev_err(ice_pf_to_dev(pf), "Failed to delete VSI %i in FW - error: %d\n", 318 vsi->vsi_num, status); 319 320 kfree(ctxt); 321 } 322 323 /** 324 * ice_vsi_free_arrays - De-allocate queue and vector pointer arrays for the VSI 325 * @vsi: pointer to VSI being cleared 326 */ 327 static void ice_vsi_free_arrays(struct ice_vsi *vsi) 328 { 329 struct ice_pf *pf = vsi->back; 330 struct device *dev; 331 332 dev = ice_pf_to_dev(pf); 333 334 /* free the ring and vector containers */ 335 devm_kfree(dev, vsi->q_vectors); 336 vsi->q_vectors = NULL; 337 devm_kfree(dev, vsi->tx_rings); 338 vsi->tx_rings = NULL; 339 devm_kfree(dev, vsi->rx_rings); 340 vsi->rx_rings = NULL; 341 devm_kfree(dev, vsi->txq_map); 342 vsi->txq_map = NULL; 343 devm_kfree(dev, vsi->rxq_map); 344 vsi->rxq_map = NULL; 345 } 346 347 /* free single stats memory */ 348 static void __ice_vsi_free_stats(struct ice_vsi_stats *vsi_stat, bool free_entries) 349 { 350 if (!vsi_stat) 351 return; 352 353 if (free_entries) { 354 for (int i = 0; i < vsi_stat->tx_ring_stats_len; i++) { 355 if (vsi_stat->tx_ring_stats[i]) { 356 kfree_rcu(vsi_stat->tx_ring_stats[i], rcu); 357 WRITE_ONCE(vsi_stat->tx_ring_stats[i], NULL); 358 } 359 } 360 for (int i = 0; i < vsi_stat->rx_ring_stats_len; i++) { 361 if (vsi_stat->rx_ring_stats[i]) { 362 kfree_rcu(vsi_stat->rx_ring_stats[i], rcu); 363 WRITE_ONCE(vsi_stat->rx_ring_stats[i], NULL); 364 } 365 } 366 } 367 368 kfree(vsi_stat->tx_ring_stats); 369 kfree(vsi_stat->rx_ring_stats); 370 kfree(vsi_stat); 371 } 372 373 /** 374 * ice_vsi_free_stats - Free the ring statistics structures 375 * @vsi: VSI pointer 376 */ 377 static void ice_vsi_free_stats(struct ice_vsi *vsi) 378 { 379 struct ice_vsi_stats *vsi_stat; 380 struct ice_pf *pf = vsi->back; 381 382 if (vsi->type == ICE_VSI_CHNL) 383 return; 384 if (!pf->vsi_stats) 385 return; 386 387 vsi_stat = pf->vsi_stats[vsi->idx]; 388 __ice_vsi_free_stats(vsi_stat, true); 389 pf->vsi_stats[vsi->idx] = NULL; 390 } 391 392 /** 393 * ice_vsi_alloc_ring_stats - Allocates Tx and Rx ring stats for the VSI 394 * @vsi: VSI which is having stats allocated 395 */ 396 static int ice_vsi_alloc_ring_stats(struct ice_vsi *vsi) 397 { 398 struct ice_ring_stats **tx_ring_stats; 399 struct ice_ring_stats **rx_ring_stats; 400 struct ice_vsi_stats *vsi_stats; 401 struct ice_pf *pf = vsi->back; 402 u16 i; 403 404 vsi_stats = pf->vsi_stats[vsi->idx]; 405 tx_ring_stats = vsi_stats->tx_ring_stats; 406 rx_ring_stats = vsi_stats->rx_ring_stats; 407 408 /* Allocate Tx ring stats */ 409 ice_for_each_alloc_txq(vsi, i) { 410 struct ice_ring_stats *ring_stats; 411 struct ice_tx_ring *ring; 412 413 ring = vsi->tx_rings[i]; 414 ring_stats = tx_ring_stats[i]; 415 416 if (!ring_stats) { 417 ring_stats = kzalloc_obj(*ring_stats); 418 if (!ring_stats) 419 goto err_out; 420 421 u64_stats_init(&ring_stats->syncp); 422 423 WRITE_ONCE(tx_ring_stats[i], ring_stats); 424 } 425 426 ring->ring_stats = ring_stats; 427 } 428 429 /* Allocate Rx ring stats */ 430 ice_for_each_alloc_rxq(vsi, i) { 431 struct ice_ring_stats *ring_stats; 432 struct ice_rx_ring *ring; 433 434 ring = vsi->rx_rings[i]; 435 ring_stats = rx_ring_stats[i]; 436 437 if (!ring_stats) { 438 ring_stats = kzalloc_obj(*ring_stats); 439 if (!ring_stats) 440 goto err_out; 441 442 u64_stats_init(&ring_stats->syncp); 443 444 WRITE_ONCE(rx_ring_stats[i], ring_stats); 445 } 446 447 ring->ring_stats = ring_stats; 448 } 449 450 return 0; 451 452 err_out: 453 ice_vsi_free_stats(vsi); 454 return -ENOMEM; 455 } 456 457 /** 458 * ice_vsi_free - clean up and deallocate the provided VSI 459 * @vsi: pointer to VSI being cleared 460 * 461 * This deallocates the VSI's queue resources, removes it from the PF's 462 * VSI array if necessary, and deallocates the VSI 463 */ 464 void ice_vsi_free(struct ice_vsi *vsi) 465 { 466 struct ice_pf *pf = NULL; 467 struct device *dev; 468 469 if (!vsi || !vsi->back) 470 return; 471 472 pf = vsi->back; 473 dev = ice_pf_to_dev(pf); 474 475 if (!pf->vsi[vsi->idx] || pf->vsi[vsi->idx] != vsi) { 476 dev_dbg(dev, "vsi does not exist at pf->vsi[%d]\n", vsi->idx); 477 return; 478 } 479 480 mutex_lock(&pf->sw_mutex); 481 /* updates the PF for this cleared VSI */ 482 483 pf->vsi[vsi->idx] = NULL; 484 pf->next_vsi = vsi->idx; 485 486 ice_vsi_free_stats(vsi); 487 ice_vsi_free_arrays(vsi); 488 mutex_destroy(&vsi->xdp_state_lock); 489 mutex_unlock(&pf->sw_mutex); 490 devm_kfree(dev, vsi); 491 } 492 493 void ice_vsi_delete(struct ice_vsi *vsi) 494 { 495 ice_vsi_delete_from_hw(vsi); 496 ice_vsi_free(vsi); 497 } 498 499 /** 500 * ice_msix_clean_ctrl_vsi - MSIX mode interrupt handler for ctrl VSI 501 * @irq: interrupt number 502 * @data: pointer to a q_vector 503 */ 504 static irqreturn_t ice_msix_clean_ctrl_vsi(int __always_unused irq, void *data) 505 { 506 struct ice_q_vector *q_vector = (struct ice_q_vector *)data; 507 508 if (!q_vector->tx.tx_ring) 509 return IRQ_HANDLED; 510 511 ice_clean_ctrl_rx_irq(q_vector->rx.rx_ring); 512 ice_clean_ctrl_tx_irq(q_vector->tx.tx_ring); 513 514 return IRQ_HANDLED; 515 } 516 517 /** 518 * ice_msix_clean_rings - MSIX mode Interrupt Handler 519 * @irq: interrupt number 520 * @data: pointer to a q_vector 521 */ 522 static irqreturn_t ice_msix_clean_rings(int __always_unused irq, void *data) 523 { 524 struct ice_q_vector *q_vector = (struct ice_q_vector *)data; 525 526 if (!q_vector->tx.tx_ring && !q_vector->rx.rx_ring) 527 return IRQ_HANDLED; 528 529 q_vector->total_events++; 530 531 napi_schedule(&q_vector->napi); 532 533 return IRQ_HANDLED; 534 } 535 536 static struct ice_vsi_stats *ice_vsi_new_stat_arrays(int txq, int rxq) 537 { 538 struct ice_ring_stats **tx_ring_stats; 539 struct ice_ring_stats **rx_ring_stats; 540 struct ice_vsi_stats *vsi_stat; 541 542 vsi_stat = kzalloc_obj(*vsi_stat); 543 tx_ring_stats = kzalloc_objs(*tx_ring_stats, txq); 544 rx_ring_stats = kzalloc_objs(*rx_ring_stats, rxq); 545 if (!vsi_stat || !tx_ring_stats || !rx_ring_stats) { 546 kfree(vsi_stat); 547 kfree(tx_ring_stats); 548 kfree(rx_ring_stats); 549 return NULL; 550 } 551 552 vsi_stat->tx_ring_stats = tx_ring_stats; 553 vsi_stat->rx_ring_stats = rx_ring_stats; 554 vsi_stat->tx_ring_stats_len = txq; 555 vsi_stat->rx_ring_stats_len = rxq; 556 557 return vsi_stat; 558 } 559 560 static void ice_vsi_free_unused_stat_arrays(struct ice_vsi_stats *vsi_stat, 561 struct ice_vsi_stats *new_vsi_stat) 562 { 563 int new_txq = new_vsi_stat->tx_ring_stats_len; 564 int new_rxq = new_vsi_stat->rx_ring_stats_len; 565 int prev_txq = vsi_stat->tx_ring_stats_len; 566 int prev_rxq = vsi_stat->rx_ring_stats_len; 567 568 for (int i = new_txq; i < prev_txq; i++) { 569 if (vsi_stat->tx_ring_stats[i]) { 570 kfree_rcu(vsi_stat->tx_ring_stats[i], rcu); 571 WRITE_ONCE(vsi_stat->tx_ring_stats[i], NULL); 572 } 573 } 574 for (int i = new_rxq; i < prev_rxq; i++) { 575 if (vsi_stat->rx_ring_stats[i]) { 576 kfree_rcu(vsi_stat->rx_ring_stats[i], rcu); 577 WRITE_ONCE(vsi_stat->rx_ring_stats[i], NULL); 578 } 579 } 580 } 581 582 static void ice_vsi_set_stat_arrays(struct ice_vsi *vsi, 583 struct ice_vsi_stats *new_vsi_stat) 584 { 585 u16 new_txq, new_rxq, prev_txq, prev_rxq; 586 struct ice_vsi_stats *vsi_stat; 587 struct ice_pf *pf = vsi->back; 588 589 new_txq = new_vsi_stat->tx_ring_stats_len; 590 new_rxq = new_vsi_stat->rx_ring_stats_len; 591 vsi_stat = pf->vsi_stats[vsi->idx]; 592 pf->vsi_stats[vsi->idx] = new_vsi_stat; 593 if (!vsi_stat) 594 return; /* don't copy if there is no source */ 595 596 prev_txq = vsi_stat->tx_ring_stats_len; 597 prev_rxq = vsi_stat->rx_ring_stats_len; 598 599 memcpy(new_vsi_stat->tx_ring_stats, vsi_stat->tx_ring_stats, 600 sizeof(*vsi_stat->tx_ring_stats) * min(prev_txq, new_txq)); 601 memcpy(new_vsi_stat->rx_ring_stats, vsi_stat->rx_ring_stats, 602 sizeof(*vsi_stat->rx_ring_stats) * min(prev_rxq, new_rxq)); 603 } 604 605 /** 606 * ice_vsi_install_stat_arrays - swap in freshly sized ring stats arrays 607 * @vsi: VSI to install the ring stats arrays of 608 * @txq: number of Tx ring stats entries to make room for 609 * @rxq: number of Rx ring stats entries to make room for 610 * 611 * Surviving entries are carried over, the rest is freed together with the old 612 * container. 613 * 614 * Return: 0 on success and negative value on failure. 615 */ 616 static int ice_vsi_install_stat_arrays(struct ice_vsi *vsi, u16 txq, u16 rxq) 617 { 618 struct ice_vsi_stats *old_stat, *new_stat; 619 620 new_stat = ice_vsi_new_stat_arrays(txq, rxq); 621 if (!new_stat) 622 return -ENOMEM; 623 624 old_stat = vsi->back->vsi_stats[vsi->idx]; 625 ice_vsi_set_stat_arrays(vsi, new_stat); 626 if (old_stat) { 627 ice_vsi_free_unused_stat_arrays(old_stat, new_stat); 628 __ice_vsi_free_stats(old_stat, false); 629 } 630 631 return 0; 632 } 633 634 /** 635 * ice_vsi_alloc_stat_arrays - Allocate statistics arrays 636 * @vsi: VSI pointer 637 * 638 * Runs after ice_vsi_set_num_qs(), so this is the first point where the queue 639 * count is final. Grow the arrays if an earlier sizing guessed too low. 640 * 641 * Return: 0 on success, negative error code otherwise. 642 */ 643 static int ice_vsi_alloc_stat_arrays(struct ice_vsi *vsi) 644 { 645 struct ice_vsi_stats *old_stat; 646 struct ice_pf *pf = vsi->back; 647 648 if (vsi->type == ICE_VSI_CHNL) 649 return 0; 650 if (!pf->vsi_stats) 651 return -ENOENT; 652 653 old_stat = pf->vsi_stats[vsi->idx]; 654 if (old_stat && old_stat->tx_ring_stats_len >= vsi->alloc_txq && 655 old_stat->rx_ring_stats_len >= vsi->alloc_rxq) 656 return 0; 657 658 return ice_vsi_install_stat_arrays(vsi, vsi->alloc_txq, 659 vsi->alloc_rxq); 660 } 661 662 /** 663 * ice_vsi_alloc_def - set default values for already allocated VSI 664 * @vsi: ptr to VSI 665 * @ch: ptr to channel 666 */ 667 static int 668 ice_vsi_alloc_def(struct ice_vsi *vsi, struct ice_channel *ch) 669 { 670 if (vsi->type != ICE_VSI_CHNL) { 671 ice_vsi_set_num_qs(vsi); 672 if (ice_vsi_alloc_arrays(vsi)) 673 return -ENOMEM; 674 } 675 676 vsi->irq_dyn_alloc = pci_msix_can_alloc_dyn(vsi->back->pdev); 677 678 switch (vsi->type) { 679 case ICE_VSI_PF: 680 case ICE_VSI_SF: 681 /* Setup default MSIX irq handler for VSI */ 682 vsi->irq_handler = ice_msix_clean_rings; 683 break; 684 case ICE_VSI_CTRL: 685 /* Setup ctrl VSI MSIX irq handler */ 686 vsi->irq_handler = ice_msix_clean_ctrl_vsi; 687 break; 688 case ICE_VSI_CHNL: 689 if (!ch) 690 return -EINVAL; 691 692 vsi->num_rxq = ch->num_rxq; 693 vsi->num_txq = ch->num_txq; 694 vsi->next_base_q = ch->base_q; 695 break; 696 case ICE_VSI_VF: 697 case ICE_VSI_LB: 698 break; 699 default: 700 ice_vsi_free_arrays(vsi); 701 return -EINVAL; 702 } 703 704 return 0; 705 } 706 707 /** 708 * ice_vsi_alloc - Allocates the next available struct VSI in the PF 709 * @pf: board private structure 710 * 711 * Reserves a VSI index from the PF and allocates an empty VSI structure 712 * without a type. The VSI structure must later be initialized by calling 713 * ice_vsi_cfg(). 714 * 715 * returns a pointer to a VSI on success, NULL on failure. 716 */ 717 struct ice_vsi *ice_vsi_alloc(struct ice_pf *pf) 718 { 719 struct device *dev = ice_pf_to_dev(pf); 720 struct ice_vsi *vsi = NULL; 721 722 /* Need to protect the allocation of the VSIs at the PF level */ 723 mutex_lock(&pf->sw_mutex); 724 725 /* If we have already allocated our maximum number of VSIs, 726 * pf->next_vsi will be ICE_NO_VSI. If not, pf->next_vsi index 727 * is available to be populated 728 */ 729 if (pf->next_vsi == ICE_NO_VSI) { 730 dev_dbg(dev, "out of VSI slots!\n"); 731 goto unlock_pf; 732 } 733 734 vsi = devm_kzalloc(dev, sizeof(*vsi), GFP_KERNEL); 735 if (!vsi) 736 goto unlock_pf; 737 738 vsi->back = pf; 739 set_bit(ICE_VSI_DOWN, vsi->state); 740 741 /* fill slot and make note of the index */ 742 vsi->idx = pf->next_vsi; 743 pf->vsi[pf->next_vsi] = vsi; 744 745 /* prepare pf->next_vsi for next use */ 746 pf->next_vsi = ice_get_free_slot(pf->vsi, pf->num_alloc_vsi, 747 pf->next_vsi); 748 749 mutex_init(&vsi->xdp_state_lock); 750 751 unlock_pf: 752 mutex_unlock(&pf->sw_mutex); 753 return vsi; 754 } 755 756 /** 757 * ice_alloc_fd_res - Allocate FD resource for a VSI 758 * @vsi: pointer to the ice_vsi 759 * 760 * This allocates the FD resources 761 * 762 * Returns 0 on success, -EPERM on no-op or -EIO on failure 763 */ 764 static int ice_alloc_fd_res(struct ice_vsi *vsi) 765 { 766 struct ice_pf *pf = vsi->back; 767 u32 g_val, b_val; 768 769 /* Flow Director filters are only allocated/assigned to the PF VSI or 770 * CHNL VSI which passes the traffic. The CTRL VSI is only used to 771 * add/delete filters so resources are not allocated to it 772 */ 773 if (!test_bit(ICE_FLAG_FD_ENA, pf->flags)) 774 return -EPERM; 775 776 if (!(vsi->type == ICE_VSI_PF || vsi->type == ICE_VSI_VF || 777 vsi->type == ICE_VSI_CHNL)) 778 return -EPERM; 779 780 /* FD filters from guaranteed pool per VSI */ 781 g_val = pf->hw.func_caps.fd_fltr_guar; 782 if (!g_val) 783 return -EPERM; 784 785 /* FD filters from best effort pool */ 786 b_val = pf->hw.func_caps.fd_fltr_best_effort; 787 if (!b_val) 788 return -EPERM; 789 790 /* PF main VSI gets only 64 FD resources from guaranteed pool 791 * when ADQ is configured. 792 */ 793 #define ICE_PF_VSI_GFLTR 64 794 795 /* determine FD filter resources per VSI from shared(best effort) and 796 * dedicated pool 797 */ 798 if (vsi->type == ICE_VSI_PF) { 799 vsi->num_gfltr = g_val; 800 /* if MQPRIO is configured, main VSI doesn't get all FD 801 * resources from guaranteed pool. PF VSI gets 64 FD resources 802 */ 803 if (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) { 804 if (g_val < ICE_PF_VSI_GFLTR) 805 return -EPERM; 806 /* allow bare minimum entries for PF VSI */ 807 vsi->num_gfltr = ICE_PF_VSI_GFLTR; 808 } 809 810 /* each VSI gets same "best_effort" quota */ 811 vsi->num_bfltr = b_val; 812 } else if (vsi->type == ICE_VSI_VF) { 813 vsi->num_gfltr = 0; 814 815 /* each VSI gets same "best_effort" quota */ 816 vsi->num_bfltr = b_val; 817 } else { 818 struct ice_vsi *main_vsi; 819 int numtc; 820 821 main_vsi = ice_get_main_vsi(pf); 822 if (!main_vsi) 823 return -EPERM; 824 825 if (!main_vsi->all_numtc) 826 return -EINVAL; 827 828 /* figure out ADQ numtc */ 829 numtc = main_vsi->all_numtc - ICE_CHNL_START_TC; 830 831 /* only one TC but still asking resources for channels, 832 * invalid config 833 */ 834 if (numtc < ICE_CHNL_START_TC) 835 return -EPERM; 836 837 g_val -= ICE_PF_VSI_GFLTR; 838 /* channel VSIs gets equal share from guaranteed pool */ 839 vsi->num_gfltr = g_val / numtc; 840 841 /* each VSI gets same "best_effort" quota */ 842 vsi->num_bfltr = b_val; 843 } 844 845 return 0; 846 } 847 848 /** 849 * ice_vsi_get_qs - Assign queues from PF to VSI 850 * @vsi: the VSI to assign queues to 851 * 852 * Returns 0 on success and a negative value on error 853 */ 854 static int ice_vsi_get_qs(struct ice_vsi *vsi) 855 { 856 struct ice_pf *pf = vsi->back; 857 struct ice_qs_cfg tx_qs_cfg = { 858 .qs_mutex = &pf->avail_q_mutex, 859 .pf_map = pf->avail_txqs, 860 .pf_map_size = pf->max_pf_txqs, 861 .q_count = vsi->alloc_txq, 862 .scatter_count = ICE_MAX_SCATTER_TXQS, 863 .vsi_map = vsi->txq_map, 864 .vsi_map_offset = 0, 865 .mapping_mode = ICE_VSI_MAP_CONTIG 866 }; 867 struct ice_qs_cfg rx_qs_cfg = { 868 .qs_mutex = &pf->avail_q_mutex, 869 .pf_map = pf->avail_rxqs, 870 .pf_map_size = pf->max_pf_rxqs, 871 .q_count = vsi->alloc_rxq, 872 .scatter_count = ICE_MAX_SCATTER_RXQS, 873 .vsi_map = vsi->rxq_map, 874 .vsi_map_offset = 0, 875 .mapping_mode = ICE_VSI_MAP_CONTIG 876 }; 877 int ret; 878 879 if (vsi->type == ICE_VSI_CHNL) 880 return 0; 881 882 ret = __ice_vsi_get_qs(&tx_qs_cfg); 883 if (ret) 884 return ret; 885 vsi->tx_mapping_mode = tx_qs_cfg.mapping_mode; 886 887 ret = __ice_vsi_get_qs(&rx_qs_cfg); 888 if (ret) 889 return ret; 890 vsi->rx_mapping_mode = rx_qs_cfg.mapping_mode; 891 892 return 0; 893 } 894 895 /** 896 * ice_vsi_put_qs - Release queues from VSI to PF 897 * @vsi: the VSI that is going to release queues 898 */ 899 static void ice_vsi_put_qs(struct ice_vsi *vsi) 900 { 901 struct ice_pf *pf = vsi->back; 902 int i; 903 904 mutex_lock(&pf->avail_q_mutex); 905 906 ice_for_each_alloc_txq(vsi, i) { 907 clear_bit(vsi->txq_map[i], pf->avail_txqs); 908 vsi->txq_map[i] = ICE_INVAL_Q_INDEX; 909 } 910 911 ice_for_each_alloc_rxq(vsi, i) { 912 clear_bit(vsi->rxq_map[i], pf->avail_rxqs); 913 vsi->rxq_map[i] = ICE_INVAL_Q_INDEX; 914 } 915 916 mutex_unlock(&pf->avail_q_mutex); 917 } 918 919 /** 920 * ice_is_safe_mode 921 * @pf: pointer to the PF struct 922 * 923 * returns true if driver is in safe mode, false otherwise 924 */ 925 bool ice_is_safe_mode(struct ice_pf *pf) 926 { 927 return !test_bit(ICE_FLAG_ADV_FEATURES, pf->flags); 928 } 929 930 /** 931 * ice_is_rdma_ena 932 * @pf: pointer to the PF struct 933 * 934 * returns true if RDMA is currently supported, false otherwise 935 */ 936 bool ice_is_rdma_ena(struct ice_pf *pf) 937 { 938 union devlink_param_value value; 939 int err; 940 941 err = devl_param_driverinit_value_get(priv_to_devlink(pf), 942 DEVLINK_PARAM_GENERIC_ID_ENABLE_RDMA, 943 &value); 944 return err ? test_bit(ICE_FLAG_RDMA_ENA, pf->flags) : value.vbool; 945 } 946 947 /** 948 * ice_vsi_clean_rss_flow_fld - Delete RSS configuration 949 * @vsi: the VSI being cleaned up 950 * 951 * This function deletes RSS input set for all flows that were configured 952 * for this VSI 953 */ 954 static void ice_vsi_clean_rss_flow_fld(struct ice_vsi *vsi) 955 { 956 struct ice_pf *pf = vsi->back; 957 int status; 958 959 if (ice_is_safe_mode(pf)) 960 return; 961 962 status = ice_rem_vsi_rss_cfg(&pf->hw, vsi->idx); 963 if (status) 964 dev_dbg(ice_pf_to_dev(pf), "ice_rem_vsi_rss_cfg failed for vsi = %d, error = %d\n", 965 vsi->vsi_num, status); 966 } 967 968 /** 969 * ice_rss_clean - Delete RSS related VSI structures and configuration 970 * @vsi: the VSI being removed 971 */ 972 static void ice_rss_clean(struct ice_vsi *vsi) 973 { 974 struct ice_pf *pf = vsi->back; 975 struct device *dev; 976 977 dev = ice_pf_to_dev(pf); 978 979 devm_kfree(dev, vsi->rss_hkey_user); 980 devm_kfree(dev, vsi->rss_lut_user); 981 982 ice_vsi_clean_rss_flow_fld(vsi); 983 /* remove RSS replay list */ 984 if (!ice_is_safe_mode(pf)) 985 ice_rem_vsi_rss_list(&pf->hw, vsi->idx); 986 } 987 988 /** 989 * ice_vsi_set_rss_params - Setup RSS capabilities per VSI type 990 * @vsi: the VSI being configured 991 */ 992 static void ice_vsi_set_rss_params(struct ice_vsi *vsi) 993 { 994 struct ice_hw_common_caps *cap; 995 struct ice_pf *pf = vsi->back; 996 u16 max_rss_size; 997 998 if (!test_bit(ICE_FLAG_RSS_ENA, pf->flags)) { 999 vsi->rss_size = 1; 1000 return; 1001 } 1002 1003 cap = &pf->hw.func_caps.common_cap; 1004 max_rss_size = BIT(cap->rss_table_entry_width); 1005 switch (vsi->type) { 1006 case ICE_VSI_CHNL: 1007 case ICE_VSI_PF: 1008 /* PF VSI will inherit RSS instance of PF */ 1009 vsi->rss_table_size = (u16)cap->rss_table_size; 1010 if (vsi->type == ICE_VSI_CHNL) 1011 vsi->rss_size = min_t(u16, vsi->num_rxq, max_rss_size); 1012 else 1013 vsi->rss_size = min_t(u16, 1014 netif_get_num_default_rss_queues(), 1015 max_rss_size); 1016 vsi->rss_lut_type = ICE_LUT_PF; 1017 break; 1018 case ICE_VSI_SF: 1019 vsi->rss_table_size = ICE_LUT_VSI_SIZE; 1020 vsi->rss_size = min_t(u16, netif_get_num_default_rss_queues(), 1021 max_rss_size); 1022 vsi->rss_lut_type = ICE_LUT_VSI; 1023 break; 1024 case ICE_VSI_VF: 1025 /* VF VSI will get a small RSS table. 1026 * For VSI_LUT, LUT size should be set to 64 bytes. 1027 */ 1028 vsi->rss_table_size = ICE_LUT_VSI_SIZE; 1029 vsi->rss_size = ICE_MAX_RSS_QS_PER_VF; 1030 vsi->rss_lut_type = ICE_LUT_VSI; 1031 break; 1032 case ICE_VSI_LB: 1033 break; 1034 default: 1035 dev_dbg(ice_pf_to_dev(pf), "Unsupported VSI type %s\n", 1036 ice_vsi_type_str(vsi->type)); 1037 break; 1038 } 1039 } 1040 1041 /** 1042 * ice_set_dflt_vsi_ctx - Set default VSI context before adding a VSI 1043 * @hw: HW structure used to determine the VLAN mode of the device 1044 * @ctxt: the VSI context being set 1045 * 1046 * This initializes a default VSI context for all sections except the Queues. 1047 */ 1048 static void ice_set_dflt_vsi_ctx(struct ice_hw *hw, struct ice_vsi_ctx *ctxt) 1049 { 1050 u32 table = 0; 1051 1052 memset(&ctxt->info, 0, sizeof(ctxt->info)); 1053 /* VSI's should be allocated from shared pool */ 1054 ctxt->alloc_from_pool = true; 1055 /* Src pruning enabled by default */ 1056 ctxt->info.sw_flags = ICE_AQ_VSI_SW_FLAG_SRC_PRUNE; 1057 /* Traffic from VSI can be sent to LAN */ 1058 ctxt->info.sw_flags2 = ICE_AQ_VSI_SW_FLAG_LAN_ENA; 1059 /* allow all untagged/tagged packets by default on Tx */ 1060 ctxt->info.inner_vlan_flags = FIELD_PREP(ICE_AQ_VSI_INNER_VLAN_TX_MODE_M, 1061 ICE_AQ_VSI_INNER_VLAN_TX_MODE_ALL); 1062 /* SVM - by default bits 3 and 4 in inner_vlan_flags are 0's which 1063 * results in legacy behavior (show VLAN, DEI, and UP) in descriptor. 1064 * 1065 * DVM - leave inner VLAN in packet by default 1066 */ 1067 if (ice_is_dvm_ena(hw)) { 1068 ctxt->info.inner_vlan_flags |= 1069 FIELD_PREP(ICE_AQ_VSI_INNER_VLAN_EMODE_M, 1070 ICE_AQ_VSI_INNER_VLAN_EMODE_NOTHING); 1071 ctxt->info.outer_vlan_flags = 1072 FIELD_PREP(ICE_AQ_VSI_OUTER_VLAN_TX_MODE_M, 1073 ICE_AQ_VSI_OUTER_VLAN_TX_MODE_ALL); 1074 ctxt->info.outer_vlan_flags |= 1075 FIELD_PREP(ICE_AQ_VSI_OUTER_TAG_TYPE_M, 1076 ICE_AQ_VSI_OUTER_TAG_VLAN_8100); 1077 ctxt->info.outer_vlan_flags |= 1078 FIELD_PREP(ICE_AQ_VSI_OUTER_VLAN_EMODE_M, 1079 ICE_AQ_VSI_OUTER_VLAN_EMODE_NOTHING); 1080 } 1081 /* Have 1:1 UP mapping for both ingress/egress tables */ 1082 table |= ICE_UP_TABLE_TRANSLATE(0, 0); 1083 table |= ICE_UP_TABLE_TRANSLATE(1, 1); 1084 table |= ICE_UP_TABLE_TRANSLATE(2, 2); 1085 table |= ICE_UP_TABLE_TRANSLATE(3, 3); 1086 table |= ICE_UP_TABLE_TRANSLATE(4, 4); 1087 table |= ICE_UP_TABLE_TRANSLATE(5, 5); 1088 table |= ICE_UP_TABLE_TRANSLATE(6, 6); 1089 table |= ICE_UP_TABLE_TRANSLATE(7, 7); 1090 ctxt->info.ingress_table = cpu_to_le32(table); 1091 ctxt->info.egress_table = cpu_to_le32(table); 1092 /* Have 1:1 UP mapping for outer to inner UP table */ 1093 ctxt->info.outer_up_table = cpu_to_le32(table); 1094 /* No Outer tag support outer_tag_flags remains to zero */ 1095 } 1096 1097 /** 1098 * ice_vsi_setup_q_map - Setup a VSI queue map 1099 * @vsi: the VSI being configured 1100 * @ctxt: VSI context structure 1101 */ 1102 static int ice_vsi_setup_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt) 1103 { 1104 u16 offset = 0, qmap = 0, tx_count = 0, rx_count = 0, pow = 0; 1105 u16 num_txq_per_tc, num_rxq_per_tc; 1106 u16 qcount_tx = vsi->alloc_txq; 1107 u16 qcount_rx = vsi->alloc_rxq; 1108 u8 netdev_tc = 0; 1109 int i; 1110 1111 if (!vsi->tc_cfg.numtc) { 1112 /* at least TC0 should be enabled by default */ 1113 vsi->tc_cfg.numtc = 1; 1114 vsi->tc_cfg.ena_tc = 1; 1115 } 1116 1117 num_rxq_per_tc = min_t(u16, qcount_rx / vsi->tc_cfg.numtc, ICE_MAX_RXQS_PER_TC); 1118 if (!num_rxq_per_tc) 1119 num_rxq_per_tc = 1; 1120 num_txq_per_tc = qcount_tx / vsi->tc_cfg.numtc; 1121 if (!num_txq_per_tc) 1122 num_txq_per_tc = 1; 1123 1124 /* find the (rounded up) power-of-2 of qcount */ 1125 pow = (u16)order_base_2(num_rxq_per_tc); 1126 1127 /* TC mapping is a function of the number of Rx queues assigned to the 1128 * VSI for each traffic class and the offset of these queues. 1129 * The first 10 bits are for queue offset for TC0, next 4 bits for no:of 1130 * queues allocated to TC0. No:of queues is a power-of-2. 1131 * 1132 * If TC is not enabled, the queue offset is set to 0, and allocate one 1133 * queue, this way, traffic for the given TC will be sent to the default 1134 * queue. 1135 * 1136 * Setup number and offset of Rx queues for all TCs for the VSI 1137 */ 1138 ice_for_each_traffic_class(i) { 1139 if (!(vsi->tc_cfg.ena_tc & BIT(i))) { 1140 /* TC is not enabled */ 1141 vsi->tc_cfg.tc_info[i].qoffset = 0; 1142 vsi->tc_cfg.tc_info[i].qcount_rx = 1; 1143 vsi->tc_cfg.tc_info[i].qcount_tx = 1; 1144 vsi->tc_cfg.tc_info[i].netdev_tc = 0; 1145 ctxt->info.tc_mapping[i] = 0; 1146 continue; 1147 } 1148 1149 /* TC is enabled */ 1150 vsi->tc_cfg.tc_info[i].qoffset = offset; 1151 vsi->tc_cfg.tc_info[i].qcount_rx = num_rxq_per_tc; 1152 vsi->tc_cfg.tc_info[i].qcount_tx = num_txq_per_tc; 1153 vsi->tc_cfg.tc_info[i].netdev_tc = netdev_tc++; 1154 1155 qmap = FIELD_PREP(ICE_AQ_VSI_TC_Q_OFFSET_M, offset); 1156 qmap |= FIELD_PREP(ICE_AQ_VSI_TC_Q_NUM_M, pow); 1157 offset += num_rxq_per_tc; 1158 tx_count += num_txq_per_tc; 1159 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap); 1160 } 1161 1162 /* if offset is non-zero, means it is calculated correctly based on 1163 * enabled TCs for a given VSI otherwise qcount_rx will always 1164 * be correct and non-zero because it is based off - VSI's 1165 * allocated Rx queues which is at least 1 (hence qcount_tx will be 1166 * at least 1) 1167 */ 1168 if (offset) 1169 rx_count = offset; 1170 else 1171 rx_count = num_rxq_per_tc; 1172 1173 if (rx_count > vsi->alloc_rxq) { 1174 dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Rx queues (%u), than were allocated (%u)!\n", 1175 rx_count, vsi->alloc_rxq); 1176 return -EINVAL; 1177 } 1178 1179 if (tx_count > vsi->alloc_txq) { 1180 dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Tx queues (%u), than were allocated (%u)!\n", 1181 tx_count, vsi->alloc_txq); 1182 return -EINVAL; 1183 } 1184 1185 vsi->num_txq = tx_count; 1186 vsi->num_rxq = rx_count; 1187 1188 if (vsi->type == ICE_VSI_VF && vsi->num_txq != vsi->num_rxq) { 1189 dev_dbg(ice_pf_to_dev(vsi->back), "VF VSI should have same number of Tx and Rx queues. Hence making them equal\n"); 1190 /* since there is a chance that num_rxq could have been changed 1191 * in the above for loop, make num_txq equal to num_rxq. 1192 */ 1193 vsi->num_txq = vsi->num_rxq; 1194 } 1195 1196 /* Rx queue mapping */ 1197 ctxt->info.mapping_flags |= cpu_to_le16(ICE_AQ_VSI_Q_MAP_CONTIG); 1198 /* q_mapping buffer holds the info for the first queue allocated for 1199 * this VSI in the PF space and also the number of queues associated 1200 * with this VSI. 1201 */ 1202 ctxt->info.q_mapping[0] = cpu_to_le16(vsi->rxq_map[0]); 1203 ctxt->info.q_mapping[1] = cpu_to_le16(vsi->num_rxq); 1204 1205 return 0; 1206 } 1207 1208 /** 1209 * ice_set_fd_vsi_ctx - Set FD VSI context before adding a VSI 1210 * @ctxt: the VSI context being set 1211 * @vsi: the VSI being configured 1212 */ 1213 static void ice_set_fd_vsi_ctx(struct ice_vsi_ctx *ctxt, struct ice_vsi *vsi) 1214 { 1215 u8 dflt_q_group, dflt_q_prio; 1216 u16 dflt_q, report_q, val; 1217 1218 if (vsi->type != ICE_VSI_PF && vsi->type != ICE_VSI_CTRL && 1219 vsi->type != ICE_VSI_VF && vsi->type != ICE_VSI_CHNL) 1220 return; 1221 1222 val = ICE_AQ_VSI_PROP_FLOW_DIR_VALID; 1223 ctxt->info.valid_sections |= cpu_to_le16(val); 1224 dflt_q = 0; 1225 dflt_q_group = 0; 1226 report_q = 0; 1227 dflt_q_prio = 0; 1228 1229 /* enable flow director filtering/programming */ 1230 val = ICE_AQ_VSI_FD_ENABLE | ICE_AQ_VSI_FD_PROG_ENABLE; 1231 ctxt->info.fd_options = cpu_to_le16(val); 1232 /* max of allocated flow director filters */ 1233 ctxt->info.max_fd_fltr_dedicated = 1234 cpu_to_le16(vsi->num_gfltr); 1235 /* max of shared flow director filters any VSI may program */ 1236 ctxt->info.max_fd_fltr_shared = 1237 cpu_to_le16(vsi->num_bfltr); 1238 /* default queue index within the VSI of the default FD */ 1239 val = FIELD_PREP(ICE_AQ_VSI_FD_DEF_Q_M, dflt_q); 1240 /* target queue or queue group to the FD filter */ 1241 val |= FIELD_PREP(ICE_AQ_VSI_FD_DEF_GRP_M, dflt_q_group); 1242 ctxt->info.fd_def_q = cpu_to_le16(val); 1243 /* queue index on which FD filter completion is reported */ 1244 val = FIELD_PREP(ICE_AQ_VSI_FD_REPORT_Q_M, report_q); 1245 /* priority of the default qindex action */ 1246 val |= FIELD_PREP(ICE_AQ_VSI_FD_DEF_PRIORITY_M, dflt_q_prio); 1247 ctxt->info.fd_report_opt = cpu_to_le16(val); 1248 } 1249 1250 /** 1251 * ice_set_rss_vsi_ctx - Set RSS VSI context before adding a VSI 1252 * @ctxt: the VSI context being set 1253 * @vsi: the VSI being configured 1254 */ 1255 static void ice_set_rss_vsi_ctx(struct ice_vsi_ctx *ctxt, struct ice_vsi *vsi) 1256 { 1257 u8 lut_type, hash_type; 1258 struct device *dev; 1259 struct ice_pf *pf; 1260 1261 pf = vsi->back; 1262 dev = ice_pf_to_dev(pf); 1263 1264 switch (vsi->type) { 1265 case ICE_VSI_CHNL: 1266 case ICE_VSI_PF: 1267 /* PF VSI will inherit RSS instance of PF */ 1268 lut_type = ICE_AQ_VSI_Q_OPT_RSS_LUT_PF; 1269 break; 1270 case ICE_VSI_VF: 1271 case ICE_VSI_SF: 1272 /* VF VSI will gets a small RSS table which is a VSI LUT type */ 1273 lut_type = ICE_AQ_VSI_Q_OPT_RSS_LUT_VSI; 1274 break; 1275 default: 1276 dev_dbg(dev, "Unsupported VSI type %s\n", 1277 ice_vsi_type_str(vsi->type)); 1278 return; 1279 } 1280 1281 hash_type = ICE_AQ_VSI_Q_OPT_RSS_HASH_TPLZ; 1282 vsi->rss_hfunc = hash_type; 1283 1284 ctxt->info.q_opt_rss = 1285 FIELD_PREP(ICE_AQ_VSI_Q_OPT_RSS_LUT_M, lut_type) | 1286 FIELD_PREP(ICE_AQ_VSI_Q_OPT_RSS_HASH_M, hash_type); 1287 } 1288 1289 static void 1290 ice_chnl_vsi_setup_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt) 1291 { 1292 u16 qcount, qmap; 1293 u8 offset = 0; 1294 int pow; 1295 1296 qcount = vsi->num_rxq; 1297 1298 pow = order_base_2(qcount); 1299 qmap = FIELD_PREP(ICE_AQ_VSI_TC_Q_OFFSET_M, offset); 1300 qmap |= FIELD_PREP(ICE_AQ_VSI_TC_Q_NUM_M, pow); 1301 1302 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap); 1303 ctxt->info.mapping_flags |= cpu_to_le16(ICE_AQ_VSI_Q_MAP_CONTIG); 1304 ctxt->info.q_mapping[0] = cpu_to_le16(vsi->next_base_q); 1305 ctxt->info.q_mapping[1] = cpu_to_le16(qcount); 1306 } 1307 1308 /** 1309 * ice_vsi_is_vlan_pruning_ena - check if VLAN pruning is enabled or not 1310 * @vsi: VSI to check whether or not VLAN pruning is enabled. 1311 * 1312 * returns true if Rx VLAN pruning is enabled and false otherwise. 1313 */ 1314 static bool ice_vsi_is_vlan_pruning_ena(struct ice_vsi *vsi) 1315 { 1316 return vsi->info.sw_flags2 & ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA; 1317 } 1318 1319 /** 1320 * ice_vsi_init - Create and initialize a VSI 1321 * @vsi: the VSI being configured 1322 * @vsi_flags: VSI configuration flags 1323 * 1324 * Set ICE_FLAG_VSI_INIT to initialize a new VSI context, clear it to 1325 * reconfigure an existing context. 1326 * 1327 * This initializes a VSI context depending on the VSI type to be added and 1328 * passes it down to the add_vsi aq command to create a new VSI. 1329 */ 1330 static int ice_vsi_init(struct ice_vsi *vsi, u32 vsi_flags) 1331 { 1332 struct ice_pf *pf = vsi->back; 1333 struct ice_hw *hw = &pf->hw; 1334 struct ice_vsi_ctx *ctxt; 1335 struct device *dev; 1336 int ret = 0; 1337 1338 dev = ice_pf_to_dev(pf); 1339 ctxt = kzalloc_obj(*ctxt); 1340 if (!ctxt) 1341 return -ENOMEM; 1342 1343 switch (vsi->type) { 1344 case ICE_VSI_CTRL: 1345 case ICE_VSI_LB: 1346 case ICE_VSI_PF: 1347 ctxt->flags = ICE_AQ_VSI_TYPE_PF; 1348 break; 1349 case ICE_VSI_SF: 1350 case ICE_VSI_CHNL: 1351 ctxt->flags = ICE_AQ_VSI_TYPE_VMDQ2; 1352 break; 1353 case ICE_VSI_VF: 1354 ctxt->flags = ICE_AQ_VSI_TYPE_VF; 1355 /* VF number here is the absolute VF number (0-255) */ 1356 ctxt->vf_num = vsi->vf->vf_id + hw->func_caps.vf_base_id; 1357 break; 1358 default: 1359 ret = -ENODEV; 1360 goto out; 1361 } 1362 1363 /* Handle VLAN pruning for channel VSI if main VSI has VLAN 1364 * prune enabled 1365 */ 1366 if (vsi->type == ICE_VSI_CHNL) { 1367 struct ice_vsi *main_vsi; 1368 1369 main_vsi = ice_get_main_vsi(pf); 1370 if (main_vsi && ice_vsi_is_vlan_pruning_ena(main_vsi)) 1371 ctxt->info.sw_flags2 |= 1372 ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA; 1373 else 1374 ctxt->info.sw_flags2 &= 1375 ~ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA; 1376 } 1377 1378 ice_set_dflt_vsi_ctx(hw, ctxt); 1379 if (test_bit(ICE_FLAG_FD_ENA, pf->flags)) 1380 ice_set_fd_vsi_ctx(ctxt, vsi); 1381 /* if the switch is in VEB mode, allow VSI loopback */ 1382 if (vsi->vsw->bridge_mode == BRIDGE_MODE_VEB) 1383 ctxt->info.sw_flags |= ICE_AQ_VSI_SW_FLAG_ALLOW_LB; 1384 1385 /* Set LUT type and HASH type if RSS is enabled */ 1386 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags) && 1387 vsi->type != ICE_VSI_CTRL) { 1388 ice_set_rss_vsi_ctx(ctxt, vsi); 1389 /* if updating VSI context, make sure to set valid_section: 1390 * to indicate which section of VSI context being updated 1391 */ 1392 if (!(vsi_flags & ICE_VSI_FLAG_INIT)) 1393 ctxt->info.valid_sections |= 1394 cpu_to_le16(ICE_AQ_VSI_PROP_Q_OPT_VALID); 1395 } 1396 1397 ctxt->info.sw_id = vsi->port_info->sw_id; 1398 if (vsi->type == ICE_VSI_CHNL) { 1399 ice_chnl_vsi_setup_q_map(vsi, ctxt); 1400 } else { 1401 ret = ice_vsi_setup_q_map(vsi, ctxt); 1402 if (ret) 1403 goto out; 1404 1405 if (!(vsi_flags & ICE_VSI_FLAG_INIT)) 1406 /* means VSI being updated */ 1407 /* must to indicate which section of VSI context are 1408 * being modified 1409 */ 1410 ctxt->info.valid_sections |= 1411 cpu_to_le16(ICE_AQ_VSI_PROP_RXQ_MAP_VALID); 1412 } 1413 1414 /* Allow control frames out of main VSI */ 1415 if (vsi->type == ICE_VSI_PF) { 1416 ctxt->info.sec_flags |= ICE_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD; 1417 ctxt->info.valid_sections |= 1418 cpu_to_le16(ICE_AQ_VSI_PROP_SECURITY_VALID); 1419 } 1420 1421 if (vsi_flags & ICE_VSI_FLAG_INIT) { 1422 ret = ice_add_vsi(hw, vsi->idx, ctxt, NULL); 1423 if (ret) { 1424 dev_err(dev, "Add VSI failed, err %d\n", ret); 1425 ret = -EIO; 1426 goto out; 1427 } 1428 } else { 1429 ret = ice_update_vsi(hw, vsi->idx, ctxt, NULL); 1430 if (ret) { 1431 dev_err(dev, "Update VSI failed, err %d\n", ret); 1432 ret = -EIO; 1433 goto out; 1434 } 1435 } 1436 1437 /* keep context for update VSI operations */ 1438 vsi->info = ctxt->info; 1439 1440 /* record VSI number returned */ 1441 vsi->vsi_num = ctxt->vsi_num; 1442 1443 out: 1444 kfree(ctxt); 1445 return ret; 1446 } 1447 1448 /** 1449 * ice_vsi_clear_rings - Deallocates the Tx and Rx rings for VSI 1450 * @vsi: the VSI having rings deallocated 1451 */ 1452 static void ice_vsi_clear_rings(struct ice_vsi *vsi) 1453 { 1454 int i; 1455 1456 /* Avoid stale references by clearing map from vector to ring */ 1457 if (vsi->q_vectors) { 1458 ice_for_each_q_vector(vsi, i) { 1459 struct ice_q_vector *q_vector = vsi->q_vectors[i]; 1460 1461 if (q_vector) { 1462 q_vector->tx.tx_ring = NULL; 1463 q_vector->rx.rx_ring = NULL; 1464 } 1465 } 1466 } 1467 1468 if (vsi->tx_rings) { 1469 ice_for_each_alloc_txq(vsi, i) { 1470 if (vsi->tx_rings[i]) { 1471 kfree_rcu(vsi->tx_rings[i], rcu); 1472 WRITE_ONCE(vsi->tx_rings[i], NULL); 1473 } 1474 } 1475 } 1476 if (vsi->rx_rings) { 1477 ice_for_each_alloc_rxq(vsi, i) { 1478 if (vsi->rx_rings[i]) { 1479 kfree_rcu(vsi->rx_rings[i], rcu); 1480 WRITE_ONCE(vsi->rx_rings[i], NULL); 1481 } 1482 } 1483 } 1484 } 1485 1486 /** 1487 * ice_vsi_alloc_rings - Allocates Tx and Rx rings for the VSI 1488 * @vsi: VSI which is having rings allocated 1489 */ 1490 static int ice_vsi_alloc_rings(struct ice_vsi *vsi) 1491 { 1492 bool dvm_ena = ice_is_dvm_ena(&vsi->back->hw); 1493 struct ice_pf *pf = vsi->back; 1494 struct device *dev; 1495 u16 i; 1496 1497 dev = ice_pf_to_dev(pf); 1498 /* Allocate Tx rings */ 1499 ice_for_each_alloc_txq(vsi, i) { 1500 struct ice_tx_ring *ring; 1501 1502 /* allocate with kzalloc(), free with kfree_rcu() */ 1503 ring = kzalloc_obj(*ring); 1504 1505 if (!ring) 1506 goto err_out; 1507 1508 ring->q_index = i; 1509 ring->reg_idx = vsi->txq_map[i]; 1510 ring->vsi = vsi; 1511 ring->tx_tstamps = &pf->ptp.port.tx; 1512 ring->dev = dev; 1513 ring->count = vsi->num_tx_desc; 1514 ring->txq_teid = ICE_INVAL_TEID; 1515 if (dvm_ena) 1516 set_bit(ICE_TX_RING_FLAGS_VLAN_L2TAG2, ring->flags); 1517 else 1518 set_bit(ICE_TX_RING_FLAGS_VLAN_L2TAG1, ring->flags); 1519 WRITE_ONCE(vsi->tx_rings[i], ring); 1520 } 1521 1522 /* Allocate Rx rings */ 1523 ice_for_each_alloc_rxq(vsi, i) { 1524 struct ice_rx_ring *ring; 1525 1526 /* allocate with kzalloc(), free with kfree_rcu() */ 1527 ring = kzalloc_obj(*ring); 1528 if (!ring) 1529 goto err_out; 1530 1531 ring->q_index = i; 1532 ring->reg_idx = vsi->rxq_map[i]; 1533 ring->vsi = vsi; 1534 ring->netdev = vsi->netdev; 1535 ring->count = vsi->num_rx_desc; 1536 ring->cached_phctime = pf->ptp.cached_phc_time; 1537 1538 if (ice_is_feature_supported(pf, ICE_F_GCS)) 1539 ring->flags |= ICE_RX_FLAGS_RING_GCS; 1540 1541 WRITE_ONCE(vsi->rx_rings[i], ring); 1542 } 1543 1544 return 0; 1545 1546 err_out: 1547 ice_vsi_clear_rings(vsi); 1548 return -ENOMEM; 1549 } 1550 1551 /** 1552 * ice_vsi_manage_rss_lut - disable/enable RSS 1553 * @vsi: the VSI being changed 1554 * @ena: boolean value indicating if this is an enable or disable request 1555 * 1556 * In the event of disable request for RSS, this function will zero out RSS 1557 * LUT, while in the event of enable request for RSS, it will reconfigure RSS 1558 * LUT. 1559 */ 1560 void ice_vsi_manage_rss_lut(struct ice_vsi *vsi, bool ena) 1561 { 1562 u8 *lut; 1563 1564 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL); 1565 if (!lut) 1566 return; 1567 1568 if (ena) { 1569 if (vsi->rss_lut_user) 1570 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size); 1571 else 1572 ice_fill_rss_lut(lut, vsi->rss_table_size, 1573 vsi->rss_size); 1574 } 1575 1576 ice_set_rss_lut(vsi, lut, vsi->rss_table_size); 1577 kfree(lut); 1578 } 1579 1580 /** 1581 * ice_vsi_cfg_crc_strip - Configure CRC stripping for a VSI 1582 * @vsi: VSI to be configured 1583 * @disable: set to true to have FCS / CRC in the frame data 1584 */ 1585 void ice_vsi_cfg_crc_strip(struct ice_vsi *vsi, bool disable) 1586 { 1587 int i; 1588 1589 ice_for_each_rxq(vsi, i) 1590 if (disable) 1591 vsi->rx_rings[i]->flags |= ICE_RX_FLAGS_CRC_STRIP_DIS; 1592 else 1593 vsi->rx_rings[i]->flags &= ~ICE_RX_FLAGS_CRC_STRIP_DIS; 1594 } 1595 1596 /** 1597 * ice_vsi_cfg_rss_lut_key - Configure RSS params for a VSI 1598 * @vsi: VSI to be configured 1599 */ 1600 int ice_vsi_cfg_rss_lut_key(struct ice_vsi *vsi) 1601 { 1602 struct ice_pf *pf = vsi->back; 1603 struct device *dev; 1604 u8 *lut, *key; 1605 int err; 1606 1607 dev = ice_pf_to_dev(pf); 1608 if (vsi->type == ICE_VSI_PF && vsi->ch_rss_size && 1609 (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))) { 1610 vsi->rss_size = min_t(u16, vsi->rss_size, vsi->ch_rss_size); 1611 } else { 1612 vsi->rss_size = min_t(u16, vsi->rss_size, vsi->num_rxq); 1613 1614 /* If orig_rss_size is valid and it is less than determined 1615 * main VSI's rss_size, update main VSI's rss_size to be 1616 * orig_rss_size so that when tc-qdisc is deleted, main VSI 1617 * RSS table gets programmed to be correct (whatever it was 1618 * to begin with (prior to setup-tc for ADQ config) 1619 */ 1620 if (vsi->orig_rss_size && vsi->rss_size < vsi->orig_rss_size && 1621 vsi->orig_rss_size <= vsi->num_rxq) { 1622 vsi->rss_size = vsi->orig_rss_size; 1623 /* now orig_rss_size is used, reset it to zero */ 1624 vsi->orig_rss_size = 0; 1625 } 1626 } 1627 1628 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL); 1629 if (!lut) 1630 return -ENOMEM; 1631 1632 if (vsi->rss_lut_user) 1633 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size); 1634 else 1635 ice_fill_rss_lut(lut, vsi->rss_table_size, vsi->rss_size); 1636 1637 err = ice_set_rss_lut(vsi, lut, vsi->rss_table_size); 1638 if (err) { 1639 dev_err(dev, "set_rss_lut failed, error %d\n", err); 1640 goto ice_vsi_cfg_rss_exit; 1641 } 1642 1643 key = kzalloc(ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE, GFP_KERNEL); 1644 if (!key) { 1645 err = -ENOMEM; 1646 goto ice_vsi_cfg_rss_exit; 1647 } 1648 1649 if (vsi->rss_hkey_user) 1650 memcpy(key, vsi->rss_hkey_user, ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE); 1651 else 1652 netdev_rss_key_fill((void *)key, ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE); 1653 1654 err = ice_set_rss_key(vsi, key); 1655 if (err) 1656 dev_err(dev, "set_rss_key failed, error %d\n", err); 1657 1658 kfree(key); 1659 ice_vsi_cfg_rss_exit: 1660 kfree(lut); 1661 return err; 1662 } 1663 1664 /** 1665 * ice_vsi_set_vf_rss_flow_fld - Sets VF VSI RSS input set for different flows 1666 * @vsi: VSI to be configured 1667 * 1668 * This function will only be called during the VF VSI setup. Upon successful 1669 * completion of package download, this function will configure default RSS 1670 * input sets for VF VSI. 1671 */ 1672 static void ice_vsi_set_vf_rss_flow_fld(struct ice_vsi *vsi) 1673 { 1674 struct ice_pf *pf = vsi->back; 1675 struct device *dev; 1676 int status; 1677 1678 dev = ice_pf_to_dev(pf); 1679 if (ice_is_safe_mode(pf)) { 1680 dev_dbg(dev, "Advanced RSS disabled. Package download failed, vsi num = %d\n", 1681 vsi->vsi_num); 1682 return; 1683 } 1684 1685 status = ice_add_avf_rss_cfg(&pf->hw, vsi, ICE_DEFAULT_RSS_HASHCFG); 1686 if (status) 1687 dev_dbg(dev, "ice_add_avf_rss_cfg failed for vsi = %d, error = %d\n", 1688 vsi->vsi_num, status); 1689 } 1690 1691 static const struct ice_rss_hash_cfg default_rss_cfgs[] = { 1692 /* configure RSS for IPv4 with input set IP src/dst */ 1693 {ICE_FLOW_SEG_HDR_IPV4, ICE_FLOW_HASH_IPV4, ICE_RSS_ANY_HEADERS, false}, 1694 /* configure RSS for IPv6 with input set IPv6 src/dst */ 1695 {ICE_FLOW_SEG_HDR_IPV6, ICE_FLOW_HASH_IPV6, ICE_RSS_ANY_HEADERS, false}, 1696 /* configure RSS for tcp4 with input set IP src/dst, TCP src/dst */ 1697 {ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV4, 1698 ICE_HASH_TCP_IPV4, ICE_RSS_ANY_HEADERS, false}, 1699 /* configure RSS for udp4 with input set IP src/dst, UDP src/dst */ 1700 {ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV4, 1701 ICE_HASH_UDP_IPV4, ICE_RSS_ANY_HEADERS, false}, 1702 /* configure RSS for sctp4 with input set IP src/dst - only support 1703 * RSS on SCTPv4 on outer headers (non-tunneled) 1704 */ 1705 {ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV4, 1706 ICE_HASH_SCTP_IPV4, ICE_RSS_OUTER_HEADERS, false}, 1707 /* configure RSS for gtpc4 with input set IPv4 src/dst */ 1708 {ICE_FLOW_SEG_HDR_GTPC | ICE_FLOW_SEG_HDR_IPV4, 1709 ICE_FLOW_HASH_IPV4, ICE_RSS_OUTER_HEADERS, false}, 1710 /* configure RSS for gtpc4t with input set IPv4 src/dst */ 1711 {ICE_FLOW_SEG_HDR_GTPC_TEID | ICE_FLOW_SEG_HDR_IPV4, 1712 ICE_FLOW_HASH_GTP_C_IPV4_TEID, ICE_RSS_OUTER_HEADERS, false}, 1713 /* configure RSS for gtpu4 with input set IPv4 src/dst */ 1714 {ICE_FLOW_SEG_HDR_GTPU_IP | ICE_FLOW_SEG_HDR_IPV4, 1715 ICE_FLOW_HASH_GTP_U_IPV4_TEID, ICE_RSS_OUTER_HEADERS, false}, 1716 /* configure RSS for gtpu4e with input set IPv4 src/dst */ 1717 {ICE_FLOW_SEG_HDR_GTPU_EH | ICE_FLOW_SEG_HDR_IPV4, 1718 ICE_FLOW_HASH_GTP_U_IPV4_EH, ICE_RSS_OUTER_HEADERS, false}, 1719 /* configure RSS for gtpu4u with input set IPv4 src/dst */ 1720 { ICE_FLOW_SEG_HDR_GTPU_UP | ICE_FLOW_SEG_HDR_IPV4, 1721 ICE_FLOW_HASH_GTP_U_IPV4_UP, ICE_RSS_OUTER_HEADERS, false}, 1722 /* configure RSS for gtpu4d with input set IPv4 src/dst */ 1723 {ICE_FLOW_SEG_HDR_GTPU_DWN | ICE_FLOW_SEG_HDR_IPV4, 1724 ICE_FLOW_HASH_GTP_U_IPV4_DWN, ICE_RSS_OUTER_HEADERS, false}, 1725 1726 /* configure RSS for tcp6 with input set IPv6 src/dst, TCP src/dst */ 1727 {ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV6, 1728 ICE_HASH_TCP_IPV6, ICE_RSS_ANY_HEADERS, false}, 1729 /* configure RSS for udp6 with input set IPv6 src/dst, UDP src/dst */ 1730 {ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV6, 1731 ICE_HASH_UDP_IPV6, ICE_RSS_ANY_HEADERS, false}, 1732 /* configure RSS for sctp6 with input set IPv6 src/dst - only support 1733 * RSS on SCTPv6 on outer headers (non-tunneled) 1734 */ 1735 {ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV6, 1736 ICE_HASH_SCTP_IPV6, ICE_RSS_OUTER_HEADERS, false}, 1737 /* configure RSS for IPSEC ESP SPI with input set MAC_IPV4_SPI */ 1738 {ICE_FLOW_SEG_HDR_ESP, 1739 ICE_FLOW_HASH_ESP_SPI, ICE_RSS_OUTER_HEADERS, false}, 1740 /* configure RSS for gtpc6 with input set IPv6 src/dst */ 1741 {ICE_FLOW_SEG_HDR_GTPC | ICE_FLOW_SEG_HDR_IPV6, 1742 ICE_FLOW_HASH_IPV6, ICE_RSS_OUTER_HEADERS, false}, 1743 /* configure RSS for gtpc6t with input set IPv6 src/dst */ 1744 {ICE_FLOW_SEG_HDR_GTPC_TEID | ICE_FLOW_SEG_HDR_IPV6, 1745 ICE_FLOW_HASH_GTP_C_IPV6_TEID, ICE_RSS_OUTER_HEADERS, false}, 1746 /* configure RSS for gtpu6 with input set IPv6 src/dst */ 1747 {ICE_FLOW_SEG_HDR_GTPU_IP | ICE_FLOW_SEG_HDR_IPV6, 1748 ICE_FLOW_HASH_GTP_U_IPV6_TEID, ICE_RSS_OUTER_HEADERS, false}, 1749 /* configure RSS for gtpu6e with input set IPv6 src/dst */ 1750 {ICE_FLOW_SEG_HDR_GTPU_EH | ICE_FLOW_SEG_HDR_IPV6, 1751 ICE_FLOW_HASH_GTP_U_IPV6_EH, ICE_RSS_OUTER_HEADERS, false}, 1752 /* configure RSS for gtpu6u with input set IPv6 src/dst */ 1753 { ICE_FLOW_SEG_HDR_GTPU_UP | ICE_FLOW_SEG_HDR_IPV6, 1754 ICE_FLOW_HASH_GTP_U_IPV6_UP, ICE_RSS_OUTER_HEADERS, false}, 1755 /* configure RSS for gtpu6d with input set IPv6 src/dst */ 1756 {ICE_FLOW_SEG_HDR_GTPU_DWN | ICE_FLOW_SEG_HDR_IPV6, 1757 ICE_FLOW_HASH_GTP_U_IPV6_DWN, ICE_RSS_OUTER_HEADERS, false}, 1758 }; 1759 1760 /** 1761 * ice_vsi_set_rss_flow_fld - Sets RSS input set for different flows 1762 * @vsi: VSI to be configured 1763 * 1764 * This function will only be called after successful download package call 1765 * during initialization of PF. Since the downloaded package will erase the 1766 * RSS section, this function will configure RSS input sets for different 1767 * flow types. The last profile added has the highest priority, therefore 2 1768 * tuple profiles (i.e. IPv4 src/dst) are added before 4 tuple profiles 1769 * (i.e. IPv4 src/dst TCP src/dst port). 1770 */ 1771 static void ice_vsi_set_rss_flow_fld(struct ice_vsi *vsi) 1772 { 1773 u16 vsi_num = vsi->vsi_num; 1774 struct ice_pf *pf = vsi->back; 1775 struct ice_hw *hw = &pf->hw; 1776 struct device *dev; 1777 int status; 1778 u32 i; 1779 1780 dev = ice_pf_to_dev(pf); 1781 if (ice_is_safe_mode(pf)) { 1782 dev_dbg(dev, "Advanced RSS disabled. Package download failed, vsi num = %d\n", 1783 vsi_num); 1784 return; 1785 } 1786 for (i = 0; i < ARRAY_SIZE(default_rss_cfgs); i++) { 1787 const struct ice_rss_hash_cfg *cfg = &default_rss_cfgs[i]; 1788 1789 status = ice_add_rss_cfg(hw, vsi, cfg); 1790 if (status) 1791 dev_dbg(dev, "ice_add_rss_cfg failed, addl_hdrs = %x, hash_flds = %llx, hdr_type = %d, symm = %d\n", 1792 cfg->addl_hdrs, cfg->hash_flds, 1793 cfg->hdr_type, cfg->symm); 1794 } 1795 } 1796 1797 /** 1798 * ice_pf_state_is_nominal - checks the PF for nominal state 1799 * @pf: pointer to PF to check 1800 * 1801 * Check the PF's state for a collection of bits that would indicate 1802 * the PF is in a state that would inhibit normal operation for 1803 * driver functionality. 1804 * 1805 * Returns true if PF is in a nominal state, false otherwise 1806 */ 1807 bool ice_pf_state_is_nominal(struct ice_pf *pf) 1808 { 1809 return bitmap_empty(pf->state, ICE_STATE_NOMINAL_CHECK_BITS); 1810 } 1811 1812 #define ICE_FW_MODE_REC_M BIT(1) 1813 bool ice_is_recovery_mode(struct ice_hw *hw) 1814 { 1815 return rd32(hw, GL_MNG_FWSM) & ICE_FW_MODE_REC_M; 1816 } 1817 1818 /** 1819 * ice_update_eth_stats - Update VSI-specific ethernet statistics counters 1820 * @vsi: the VSI to be updated 1821 */ 1822 void ice_update_eth_stats(struct ice_vsi *vsi) 1823 { 1824 struct ice_eth_stats *prev_es, *cur_es; 1825 struct ice_hw *hw = &vsi->back->hw; 1826 struct ice_pf *pf = vsi->back; 1827 u16 vsi_num = vsi->vsi_num; /* HW absolute index of a VSI */ 1828 1829 prev_es = &vsi->eth_stats_prev; 1830 cur_es = &vsi->eth_stats; 1831 1832 if (ice_is_reset_in_progress(pf->state)) 1833 vsi->stat_offsets_loaded = false; 1834 1835 ice_stat_update40(hw, GLV_GORCL(vsi_num), vsi->stat_offsets_loaded, 1836 &prev_es->rx_bytes, &cur_es->rx_bytes); 1837 1838 ice_stat_update40(hw, GLV_UPRCL(vsi_num), vsi->stat_offsets_loaded, 1839 &prev_es->rx_unicast, &cur_es->rx_unicast); 1840 1841 ice_stat_update40(hw, GLV_MPRCL(vsi_num), vsi->stat_offsets_loaded, 1842 &prev_es->rx_multicast, &cur_es->rx_multicast); 1843 1844 ice_stat_update40(hw, GLV_BPRCL(vsi_num), vsi->stat_offsets_loaded, 1845 &prev_es->rx_broadcast, &cur_es->rx_broadcast); 1846 1847 ice_stat_update32(hw, GLV_RDPC(vsi_num), vsi->stat_offsets_loaded, 1848 &prev_es->rx_discards, &cur_es->rx_discards); 1849 1850 ice_stat_update40(hw, GLV_GOTCL(vsi_num), vsi->stat_offsets_loaded, 1851 &prev_es->tx_bytes, &cur_es->tx_bytes); 1852 1853 ice_stat_update40(hw, GLV_UPTCL(vsi_num), vsi->stat_offsets_loaded, 1854 &prev_es->tx_unicast, &cur_es->tx_unicast); 1855 1856 ice_stat_update40(hw, GLV_MPTCL(vsi_num), vsi->stat_offsets_loaded, 1857 &prev_es->tx_multicast, &cur_es->tx_multicast); 1858 1859 ice_stat_update40(hw, GLV_BPTCL(vsi_num), vsi->stat_offsets_loaded, 1860 &prev_es->tx_broadcast, &cur_es->tx_broadcast); 1861 1862 ice_stat_update32(hw, GLV_TEPC(vsi_num), vsi->stat_offsets_loaded, 1863 &prev_es->tx_errors, &cur_es->tx_errors); 1864 1865 vsi->stat_offsets_loaded = true; 1866 } 1867 1868 /** 1869 * ice_write_qrxflxp_cntxt - write/configure QRXFLXP_CNTXT register 1870 * @hw: HW pointer 1871 * @pf_q: index of the Rx queue in the PF's queue space 1872 * @rxdid: flexible descriptor RXDID 1873 * @prio: priority for the RXDID for this queue 1874 * @ena_ts: true to enable timestamp and false to disable timestamp 1875 */ 1876 void ice_write_qrxflxp_cntxt(struct ice_hw *hw, u16 pf_q, u32 rxdid, u32 prio, 1877 bool ena_ts) 1878 { 1879 int regval = rd32(hw, QRXFLXP_CNTXT(pf_q)); 1880 1881 /* clear any previous values */ 1882 regval &= ~(QRXFLXP_CNTXT_RXDID_IDX_M | 1883 QRXFLXP_CNTXT_RXDID_PRIO_M | 1884 QRXFLXP_CNTXT_TS_M); 1885 1886 regval |= FIELD_PREP(QRXFLXP_CNTXT_RXDID_IDX_M, rxdid); 1887 regval |= FIELD_PREP(QRXFLXP_CNTXT_RXDID_PRIO_M, prio); 1888 1889 if (ena_ts) 1890 /* Enable TimeSync on this queue */ 1891 regval |= QRXFLXP_CNTXT_TS_M; 1892 1893 wr32(hw, QRXFLXP_CNTXT(pf_q), regval); 1894 } 1895 1896 /** 1897 * ice_intrl_usec_to_reg - convert interrupt rate limit to register value 1898 * @intrl: interrupt rate limit in usecs 1899 * @gran: interrupt rate limit granularity in usecs 1900 * 1901 * This function converts a decimal interrupt rate limit in usecs to the format 1902 * expected by firmware. 1903 */ 1904 static u32 ice_intrl_usec_to_reg(u8 intrl, u8 gran) 1905 { 1906 u32 val = intrl / gran; 1907 1908 if (val) 1909 return val | GLINT_RATE_INTRL_ENA_M; 1910 return 0; 1911 } 1912 1913 /** 1914 * ice_write_intrl - write throttle rate limit to interrupt specific register 1915 * @q_vector: pointer to interrupt specific structure 1916 * @intrl: throttle rate limit in microseconds to write 1917 */ 1918 void ice_write_intrl(struct ice_q_vector *q_vector, u8 intrl) 1919 { 1920 struct ice_hw *hw = &q_vector->vsi->back->hw; 1921 1922 wr32(hw, GLINT_RATE(q_vector->reg_idx), 1923 ice_intrl_usec_to_reg(intrl, ICE_INTRL_GRAN_ABOVE_25)); 1924 } 1925 1926 static struct ice_q_vector *ice_pull_qvec_from_rc(struct ice_ring_container *rc) 1927 { 1928 switch (rc->type) { 1929 case ICE_RX_CONTAINER: 1930 if (rc->rx_ring) 1931 return rc->rx_ring->q_vector; 1932 break; 1933 case ICE_TX_CONTAINER: 1934 if (rc->tx_ring) 1935 return rc->tx_ring->q_vector; 1936 break; 1937 default: 1938 break; 1939 } 1940 1941 return NULL; 1942 } 1943 1944 /** 1945 * __ice_write_itr - write throttle rate to register 1946 * @q_vector: pointer to interrupt data structure 1947 * @rc: pointer to ring container 1948 * @itr: throttle rate in microseconds to write 1949 */ 1950 static void __ice_write_itr(struct ice_q_vector *q_vector, 1951 struct ice_ring_container *rc, u16 itr) 1952 { 1953 struct ice_hw *hw = &q_vector->vsi->back->hw; 1954 1955 wr32(hw, GLINT_ITR(rc->itr_idx, q_vector->reg_idx), 1956 ITR_REG_ALIGN(itr) >> ICE_ITR_GRAN_S); 1957 } 1958 1959 /** 1960 * ice_write_itr - write throttle rate to queue specific register 1961 * @rc: pointer to ring container 1962 * @itr: throttle rate in microseconds to write 1963 */ 1964 void ice_write_itr(struct ice_ring_container *rc, u16 itr) 1965 { 1966 struct ice_q_vector *q_vector; 1967 1968 q_vector = ice_pull_qvec_from_rc(rc); 1969 if (!q_vector) 1970 return; 1971 1972 __ice_write_itr(q_vector, rc, itr); 1973 } 1974 1975 /** 1976 * ice_set_q_vector_intrl - set up interrupt rate limiting 1977 * @q_vector: the vector to be configured 1978 * 1979 * Interrupt rate limiting is local to the vector, not per-queue so we must 1980 * detect if either ring container has dynamic moderation enabled to decide 1981 * what to set the interrupt rate limit to via INTRL settings. In the case that 1982 * dynamic moderation is disabled on both, write the value with the cached 1983 * setting to make sure INTRL register matches the user visible value. 1984 */ 1985 void ice_set_q_vector_intrl(struct ice_q_vector *q_vector) 1986 { 1987 if (ITR_IS_DYNAMIC(&q_vector->tx) || ITR_IS_DYNAMIC(&q_vector->rx)) { 1988 /* in the case of dynamic enabled, cap each vector to no more 1989 * than (4 us) 250,000 ints/sec, which allows low latency 1990 * but still less than 500,000 interrupts per second, which 1991 * reduces CPU a bit in the case of the lowest latency 1992 * setting. The 4 here is a value in microseconds. 1993 */ 1994 ice_write_intrl(q_vector, 4); 1995 } else { 1996 ice_write_intrl(q_vector, q_vector->intrl); 1997 } 1998 } 1999 2000 /** 2001 * ice_vsi_cfg_msix - MSIX mode Interrupt Config in the HW 2002 * @vsi: the VSI being configured 2003 * 2004 * This configures MSIX mode interrupts for the PF VSI, and should not be used 2005 * for the VF VSI. 2006 */ 2007 void ice_vsi_cfg_msix(struct ice_vsi *vsi) 2008 { 2009 struct ice_pf *pf = vsi->back; 2010 struct ice_hw *hw = &pf->hw; 2011 u16 txq = 0, rxq = 0; 2012 int i, q; 2013 2014 ice_for_each_q_vector(vsi, i) { 2015 struct ice_q_vector *q_vector = vsi->q_vectors[i]; 2016 u16 reg_idx = q_vector->reg_idx; 2017 2018 ice_cfg_itr(hw, q_vector); 2019 2020 /* Both Transmit Queue Interrupt Cause Control register 2021 * and Receive Queue Interrupt Cause control register 2022 * expects MSIX_INDX field to be the vector index 2023 * within the function space and not the absolute 2024 * vector index across PF or across device. 2025 * For SR-IOV VF VSIs queue vector index always starts 2026 * with 1 since first vector index(0) is used for OICR 2027 * in VF space. Since VMDq and other PF VSIs are within 2028 * the PF function space, use the vector index that is 2029 * tracked for this PF. 2030 */ 2031 for (q = 0; q < q_vector->num_ring_tx; q++) { 2032 ice_cfg_txq_interrupt(vsi, txq, reg_idx, 2033 q_vector->tx.itr_idx); 2034 txq++; 2035 } 2036 2037 for (q = 0; q < q_vector->num_ring_rx; q++) { 2038 ice_cfg_rxq_interrupt(vsi, rxq, reg_idx, 2039 q_vector->rx.itr_idx); 2040 rxq++; 2041 } 2042 } 2043 } 2044 2045 /** 2046 * ice_vsi_start_all_rx_rings - start/enable all of a VSI's Rx rings 2047 * @vsi: the VSI whose rings are to be enabled 2048 * 2049 * Returns 0 on success and a negative value on error 2050 */ 2051 int ice_vsi_start_all_rx_rings(struct ice_vsi *vsi) 2052 { 2053 return ice_vsi_ctrl_all_rx_rings(vsi, true); 2054 } 2055 2056 /** 2057 * ice_vsi_stop_all_rx_rings - stop/disable all of a VSI's Rx rings 2058 * @vsi: the VSI whose rings are to be disabled 2059 * 2060 * Returns 0 on success and a negative value on error 2061 */ 2062 int ice_vsi_stop_all_rx_rings(struct ice_vsi *vsi) 2063 { 2064 return ice_vsi_ctrl_all_rx_rings(vsi, false); 2065 } 2066 2067 /** 2068 * ice_vsi_stop_tx_rings - Disable Tx rings 2069 * @vsi: the VSI being configured 2070 * @rst_src: reset source 2071 * @rel_vmvf_num: Relative ID of VF/VM 2072 * @rings: Tx ring array to be stopped 2073 * @count: number of Tx ring array elements 2074 */ 2075 static int 2076 ice_vsi_stop_tx_rings(struct ice_vsi *vsi, enum ice_disq_rst_src rst_src, 2077 u16 rel_vmvf_num, struct ice_tx_ring **rings, u16 count) 2078 { 2079 u16 q_idx; 2080 2081 if (vsi->num_txq > ICE_LAN_TXQ_MAX_QDIS) 2082 return -EINVAL; 2083 2084 for (q_idx = 0; q_idx < count; q_idx++) { 2085 struct ice_txq_meta txq_meta = { }; 2086 int status; 2087 2088 if (!rings || !rings[q_idx]) 2089 return -EINVAL; 2090 2091 ice_fill_txq_meta(vsi, rings[q_idx], &txq_meta); 2092 status = ice_vsi_stop_tx_ring(vsi, rst_src, rel_vmvf_num, 2093 rings[q_idx], &txq_meta); 2094 2095 if (status) 2096 return status; 2097 } 2098 2099 return 0; 2100 } 2101 2102 /** 2103 * ice_vsi_stop_lan_tx_rings - Disable LAN Tx rings 2104 * @vsi: the VSI being configured 2105 * @rst_src: reset source 2106 * @rel_vmvf_num: Relative ID of VF/VM 2107 */ 2108 int 2109 ice_vsi_stop_lan_tx_rings(struct ice_vsi *vsi, enum ice_disq_rst_src rst_src, 2110 u16 rel_vmvf_num) 2111 { 2112 return ice_vsi_stop_tx_rings(vsi, rst_src, rel_vmvf_num, vsi->tx_rings, vsi->num_txq); 2113 } 2114 2115 /** 2116 * ice_vsi_stop_xdp_tx_rings - Disable XDP Tx rings 2117 * @vsi: the VSI being configured 2118 */ 2119 int ice_vsi_stop_xdp_tx_rings(struct ice_vsi *vsi) 2120 { 2121 return ice_vsi_stop_tx_rings(vsi, ICE_NO_RESET, 0, vsi->xdp_rings, vsi->num_xdp_txq); 2122 } 2123 2124 /** 2125 * ice_vsi_is_rx_queue_active 2126 * @vsi: the VSI being configured 2127 * 2128 * Return true if at least one queue is active. 2129 */ 2130 bool ice_vsi_is_rx_queue_active(struct ice_vsi *vsi) 2131 { 2132 struct ice_pf *pf = vsi->back; 2133 struct ice_hw *hw = &pf->hw; 2134 int i; 2135 2136 ice_for_each_rxq(vsi, i) { 2137 u32 rx_reg; 2138 int pf_q; 2139 2140 pf_q = vsi->rxq_map[i]; 2141 rx_reg = rd32(hw, QRX_CTRL(pf_q)); 2142 if (rx_reg & QRX_CTRL_QENA_STAT_M) 2143 return true; 2144 } 2145 2146 return false; 2147 } 2148 2149 static void ice_vsi_set_tc_cfg(struct ice_vsi *vsi) 2150 { 2151 if (!test_bit(ICE_FLAG_DCB_ENA, vsi->back->flags)) { 2152 vsi->tc_cfg.ena_tc = ICE_DFLT_TRAFFIC_CLASS; 2153 vsi->tc_cfg.numtc = 1; 2154 return; 2155 } 2156 2157 /* set VSI TC information based on DCB config */ 2158 ice_vsi_set_dcb_tc_cfg(vsi); 2159 } 2160 2161 /** 2162 * ice_vsi_cfg_sw_lldp - Config switch rules for LLDP packet handling 2163 * @vsi: the VSI being configured 2164 * @tx: bool to determine Tx or Rx rule 2165 * @create: bool to determine create or remove Rule 2166 * 2167 * Adding an ethtype Tx rule to the uplink VSI results in it being applied 2168 * to the whole port, so LLDP transmission for VFs will be blocked too. 2169 */ 2170 void ice_vsi_cfg_sw_lldp(struct ice_vsi *vsi, bool tx, bool create) 2171 { 2172 int (*eth_fltr)(struct ice_vsi *v, u16 type, u16 flag, 2173 enum ice_sw_fwd_act_type act); 2174 struct ice_pf *pf = vsi->back; 2175 struct device *dev; 2176 int status; 2177 2178 dev = ice_pf_to_dev(pf); 2179 eth_fltr = create ? ice_fltr_add_eth : ice_fltr_remove_eth; 2180 2181 if (tx) { 2182 status = eth_fltr(vsi, ETH_P_LLDP, ICE_FLTR_TX, 2183 ICE_DROP_PACKET); 2184 } else { 2185 if (!test_bit(ICE_FLAG_LLDP_AQ_FLTR, pf->flags)) { 2186 status = eth_fltr(vsi, ETH_P_LLDP, ICE_FLTR_RX, 2187 ICE_FWD_TO_VSI); 2188 if (!status || !create) 2189 goto report; 2190 2191 dev_info(dev, 2192 "Failed to add generic LLDP Rx filter on VSI %i error: %d, falling back to specialized AQ control\n", 2193 vsi->vsi_num, status); 2194 } 2195 2196 status = ice_lldp_fltr_add_remove(&pf->hw, vsi, create); 2197 if (!status) 2198 set_bit(ICE_FLAG_LLDP_AQ_FLTR, pf->flags); 2199 2200 } 2201 2202 report: 2203 if (status) 2204 dev_warn(dev, "Failed to %s %s LLDP rule on VSI %i error: %d\n", 2205 create ? "add" : "remove", tx ? "Tx" : "Rx", 2206 vsi->vsi_num, status); 2207 } 2208 2209 /** 2210 * ice_cfg_sw_rx_lldp - Enable/disable software handling of LLDP 2211 * @pf: the PF being configured 2212 * @enable: enable or disable 2213 * 2214 * Configure switch rules to enable/disable LLDP handling by software 2215 * across PF. 2216 */ 2217 void ice_cfg_sw_rx_lldp(struct ice_pf *pf, bool enable) 2218 { 2219 struct ice_vsi *vsi; 2220 struct ice_vf *vf; 2221 unsigned int bkt; 2222 2223 vsi = ice_get_main_vsi(pf); 2224 ice_vsi_cfg_sw_lldp(vsi, false, enable); 2225 2226 if (!test_bit(ICE_FLAG_SRIOV_ENA, pf->flags)) 2227 return; 2228 2229 ice_for_each_vf(pf, bkt, vf) { 2230 vsi = ice_get_vf_vsi(vf); 2231 2232 if (WARN_ON(!vsi)) 2233 continue; 2234 2235 if (ice_vf_is_lldp_ena(vf)) 2236 ice_vsi_cfg_sw_lldp(vsi, false, enable); 2237 } 2238 } 2239 2240 /** 2241 * ice_set_agg_vsi - sets up scheduler aggregator node and move VSI into it 2242 * @vsi: pointer to the VSI 2243 * 2244 * This function will allocate new scheduler aggregator now if needed and will 2245 * move specified VSI into it. 2246 */ 2247 static void ice_set_agg_vsi(struct ice_vsi *vsi) 2248 { 2249 struct device *dev = ice_pf_to_dev(vsi->back); 2250 struct ice_agg_node *agg_node_iter = NULL; 2251 u32 agg_id = ICE_INVALID_AGG_NODE_ID; 2252 struct ice_agg_node *agg_node = NULL; 2253 int node_offset, max_agg_nodes = 0; 2254 struct ice_port_info *port_info; 2255 struct ice_pf *pf = vsi->back; 2256 u32 agg_node_id_start = 0; 2257 int status; 2258 2259 /* create (as needed) scheduler aggregator node and move VSI into 2260 * corresponding aggregator node 2261 * - PF aggregator node to contains VSIs of type _PF and _CTRL 2262 * - VF aggregator nodes will contain VF VSI 2263 */ 2264 port_info = pf->hw.port_info; 2265 if (!port_info) 2266 return; 2267 2268 switch (vsi->type) { 2269 case ICE_VSI_CTRL: 2270 case ICE_VSI_CHNL: 2271 case ICE_VSI_LB: 2272 case ICE_VSI_PF: 2273 case ICE_VSI_SF: 2274 max_agg_nodes = ICE_MAX_PF_AGG_NODES; 2275 agg_node_id_start = ICE_PF_AGG_NODE_ID_START; 2276 agg_node_iter = &pf->pf_agg_node[0]; 2277 break; 2278 case ICE_VSI_VF: 2279 /* user can create 'n' VFs on a given PF, but since max children 2280 * per aggregator node can be only 64. Following code handles 2281 * aggregator(s) for VF VSIs, either selects a agg_node which 2282 * was already created provided num_vsis < 64, otherwise 2283 * select next available node, which will be created 2284 */ 2285 max_agg_nodes = ICE_MAX_VF_AGG_NODES; 2286 agg_node_id_start = ICE_VF_AGG_NODE_ID_START; 2287 agg_node_iter = &pf->vf_agg_node[0]; 2288 break; 2289 default: 2290 /* other VSI type, handle later if needed */ 2291 dev_dbg(dev, "unexpected VSI type %s\n", 2292 ice_vsi_type_str(vsi->type)); 2293 return; 2294 } 2295 2296 /* find the appropriate aggregator node */ 2297 for (node_offset = 0; node_offset < max_agg_nodes; node_offset++) { 2298 /* see if we can find space in previously created 2299 * node if num_vsis < 64, otherwise skip 2300 */ 2301 if (agg_node_iter->num_vsis && 2302 agg_node_iter->num_vsis == ICE_MAX_VSIS_IN_AGG_NODE) { 2303 agg_node_iter++; 2304 continue; 2305 } 2306 2307 if (agg_node_iter->valid && 2308 agg_node_iter->agg_id != ICE_INVALID_AGG_NODE_ID) { 2309 agg_id = agg_node_iter->agg_id; 2310 agg_node = agg_node_iter; 2311 break; 2312 } 2313 2314 /* find unclaimed agg_id */ 2315 if (agg_node_iter->agg_id == ICE_INVALID_AGG_NODE_ID) { 2316 agg_id = node_offset + agg_node_id_start; 2317 agg_node = agg_node_iter; 2318 break; 2319 } 2320 /* move to next agg_node */ 2321 agg_node_iter++; 2322 } 2323 2324 if (!agg_node) 2325 return; 2326 2327 /* if selected aggregator node was not created, create it */ 2328 if (!agg_node->valid) { 2329 status = ice_cfg_agg(port_info, agg_id, ICE_AGG_TYPE_AGG, 2330 (u8)vsi->tc_cfg.ena_tc); 2331 if (status) { 2332 dev_err(dev, "unable to create aggregator node with agg_id %u\n", 2333 agg_id); 2334 return; 2335 } 2336 /* aggregator node is created, store the needed info */ 2337 agg_node->valid = true; 2338 agg_node->agg_id = agg_id; 2339 } 2340 2341 /* move VSI to corresponding aggregator node */ 2342 status = ice_move_vsi_to_agg(port_info, agg_id, vsi->idx, 2343 (u8)vsi->tc_cfg.ena_tc); 2344 if (status) { 2345 dev_err(dev, "unable to move VSI idx %u into aggregator %u node", 2346 vsi->idx, agg_id); 2347 return; 2348 } 2349 2350 /* keep active children count for aggregator node */ 2351 agg_node->num_vsis++; 2352 2353 /* cache the 'agg_id' in VSI, so that after reset - VSI will be moved 2354 * to aggregator node 2355 */ 2356 vsi->agg_node = agg_node; 2357 dev_dbg(dev, "successfully moved VSI idx %u tc_bitmap 0x%x) into aggregator node %d which has num_vsis %u\n", 2358 vsi->idx, vsi->tc_cfg.ena_tc, vsi->agg_node->agg_id, 2359 vsi->agg_node->num_vsis); 2360 } 2361 2362 static int ice_vsi_cfg_tc_lan(struct ice_pf *pf, struct ice_vsi *vsi) 2363 { 2364 u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 }; 2365 struct device *dev = ice_pf_to_dev(pf); 2366 int ret, i; 2367 2368 /* configure VSI nodes based on number of queues and TC's */ 2369 ice_for_each_traffic_class(i) { 2370 if (!(vsi->tc_cfg.ena_tc & BIT(i))) 2371 continue; 2372 2373 if (vsi->type == ICE_VSI_CHNL) { 2374 if (!vsi->alloc_txq && vsi->num_txq) 2375 max_txqs[i] = vsi->num_txq; 2376 else 2377 max_txqs[i] = pf->num_lan_tx; 2378 } else { 2379 max_txqs[i] = vsi->alloc_txq; 2380 } 2381 2382 if (vsi->type == ICE_VSI_PF) 2383 max_txqs[i] += vsi->num_xdp_txq; 2384 } 2385 2386 dev_dbg(dev, "vsi->tc_cfg.ena_tc = %d\n", vsi->tc_cfg.ena_tc); 2387 ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, vsi->tc_cfg.ena_tc, 2388 max_txqs); 2389 if (ret) { 2390 dev_err(dev, "VSI %d failed lan queue config, error %d\n", 2391 vsi->vsi_num, ret); 2392 return ret; 2393 } 2394 2395 return 0; 2396 } 2397 2398 /** 2399 * ice_vsi_cfg_def - configure default VSI based on the type 2400 * @vsi: pointer to VSI 2401 */ 2402 static int ice_vsi_cfg_def(struct ice_vsi *vsi) 2403 { 2404 struct device *dev = ice_pf_to_dev(vsi->back); 2405 struct ice_pf *pf = vsi->back; 2406 int ret; 2407 2408 vsi->vsw = pf->first_sw; 2409 2410 ret = ice_vsi_alloc_def(vsi, vsi->ch); 2411 if (ret) 2412 return ret; 2413 2414 /* allocate memory for Tx/Rx ring stat pointers */ 2415 ret = ice_vsi_alloc_stat_arrays(vsi); 2416 if (ret) 2417 goto unroll_vsi_alloc; 2418 2419 ice_alloc_fd_res(vsi); 2420 2421 ret = ice_vsi_get_qs(vsi); 2422 if (ret) { 2423 dev_err(dev, "Failed to allocate queues. vsi->idx = %d\n", 2424 vsi->idx); 2425 goto unroll_vsi_alloc_stat; 2426 } 2427 2428 /* set RSS capabilities */ 2429 ice_vsi_set_rss_params(vsi); 2430 2431 /* set TC configuration */ 2432 ice_vsi_set_tc_cfg(vsi); 2433 2434 /* create the VSI */ 2435 ret = ice_vsi_init(vsi, vsi->flags); 2436 if (ret) 2437 goto unroll_get_qs; 2438 2439 ice_vsi_init_vlan_ops(vsi); 2440 2441 switch (vsi->type) { 2442 case ICE_VSI_CTRL: 2443 case ICE_VSI_SF: 2444 case ICE_VSI_PF: 2445 ret = ice_vsi_alloc_q_vectors(vsi); 2446 if (ret) 2447 goto unroll_vsi_init; 2448 2449 ret = ice_vsi_alloc_rings(vsi); 2450 if (ret) 2451 goto unroll_vector_base; 2452 2453 ret = ice_vsi_alloc_ring_stats(vsi); 2454 if (ret) 2455 goto unroll_vector_base; 2456 2457 if (ice_is_xdp_ena_vsi(vsi)) { 2458 ret = ice_vsi_determine_xdp_res(vsi); 2459 if (ret) 2460 goto unroll_vector_base; 2461 ret = ice_prepare_xdp_rings(vsi, vsi->xdp_prog, 2462 ICE_XDP_CFG_PART); 2463 if (ret) 2464 goto unroll_vector_base; 2465 } 2466 2467 ice_vsi_map_rings_to_vectors(vsi); 2468 2469 vsi->stat_offsets_loaded = false; 2470 2471 /* ICE_VSI_CTRL does not need RSS so skip RSS processing */ 2472 if (vsi->type != ICE_VSI_CTRL) 2473 /* Do not exit if configuring RSS had an issue, at 2474 * least receive traffic on first queue. Hence no 2475 * need to capture return value 2476 */ 2477 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) { 2478 ice_vsi_cfg_rss_lut_key(vsi); 2479 ice_vsi_set_rss_flow_fld(vsi); 2480 } 2481 ice_init_arfs(vsi); 2482 break; 2483 case ICE_VSI_CHNL: 2484 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) { 2485 ice_vsi_cfg_rss_lut_key(vsi); 2486 ice_vsi_set_rss_flow_fld(vsi); 2487 } 2488 break; 2489 case ICE_VSI_VF: 2490 /* VF driver will take care of creating netdev for this type and 2491 * map queues to vectors through Virtchnl, PF driver only 2492 * creates a VSI and corresponding structures for bookkeeping 2493 * purpose 2494 */ 2495 ret = ice_vsi_alloc_q_vectors(vsi); 2496 if (ret) 2497 goto unroll_vsi_init; 2498 2499 ret = ice_vsi_alloc_rings(vsi); 2500 if (ret) 2501 goto unroll_alloc_q_vector; 2502 2503 ret = ice_vsi_alloc_ring_stats(vsi); 2504 if (ret) 2505 goto unroll_vector_base; 2506 2507 vsi->stat_offsets_loaded = false; 2508 2509 /* Do not exit if configuring RSS had an issue, at least 2510 * receive traffic on first queue. Hence no need to capture 2511 * return value 2512 */ 2513 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) { 2514 ice_vsi_cfg_rss_lut_key(vsi); 2515 ice_vsi_set_vf_rss_flow_fld(vsi); 2516 } 2517 break; 2518 case ICE_VSI_LB: 2519 ret = ice_vsi_alloc_q_vectors(vsi); 2520 if (ret) 2521 goto unroll_vsi_init; 2522 2523 ret = ice_vsi_alloc_rings(vsi); 2524 if (ret) 2525 goto unroll_alloc_q_vector; 2526 2527 ret = ice_vsi_alloc_ring_stats(vsi); 2528 if (ret) 2529 goto unroll_vector_base; 2530 2531 /* Simply map the dummy q_vector to the only rx_ring */ 2532 vsi->rx_rings[0]->q_vector = vsi->q_vectors[0]; 2533 2534 break; 2535 default: 2536 /* clean up the resources and exit */ 2537 ret = -EINVAL; 2538 goto unroll_vsi_init; 2539 } 2540 2541 return 0; 2542 2543 unroll_vector_base: 2544 /* reclaim SW interrupts back to the common pool */ 2545 unroll_alloc_q_vector: 2546 ice_vsi_free_q_vectors(vsi); 2547 unroll_vsi_init: 2548 ice_vsi_delete_from_hw(vsi); 2549 unroll_get_qs: 2550 ice_vsi_put_qs(vsi); 2551 unroll_vsi_alloc_stat: 2552 ice_vsi_free_stats(vsi); 2553 unroll_vsi_alloc: 2554 ice_vsi_free_arrays(vsi); 2555 return ret; 2556 } 2557 2558 /** 2559 * ice_vsi_cfg - configure a previously allocated VSI 2560 * @vsi: pointer to VSI 2561 */ 2562 int ice_vsi_cfg(struct ice_vsi *vsi) 2563 { 2564 struct ice_pf *pf = vsi->back; 2565 int ret; 2566 2567 if (WARN_ON(vsi->type == ICE_VSI_VF && !vsi->vf)) 2568 return -EINVAL; 2569 2570 ret = ice_vsi_cfg_def(vsi); 2571 if (ret) 2572 return ret; 2573 2574 ret = ice_vsi_cfg_tc_lan(vsi->back, vsi); 2575 if (ret) 2576 ice_vsi_decfg(vsi); 2577 2578 if (vsi->type == ICE_VSI_CTRL) { 2579 if (vsi->vf) { 2580 WARN_ON(vsi->vf->ctrl_vsi_idx != ICE_NO_VSI); 2581 vsi->vf->ctrl_vsi_idx = vsi->idx; 2582 } else { 2583 WARN_ON(pf->ctrl_vsi_idx != ICE_NO_VSI); 2584 pf->ctrl_vsi_idx = vsi->idx; 2585 } 2586 } 2587 2588 return ret; 2589 } 2590 2591 /** 2592 * ice_vsi_decfg - remove all VSI configuration 2593 * @vsi: pointer to VSI 2594 */ 2595 void ice_vsi_decfg(struct ice_vsi *vsi) 2596 { 2597 struct ice_pf *pf = vsi->back; 2598 int err; 2599 2600 ice_rm_vsi_lan_cfg(vsi->port_info, vsi->idx); 2601 err = ice_rm_vsi_rdma_cfg(vsi->port_info, vsi->idx); 2602 if (err) 2603 dev_err(ice_pf_to_dev(pf), "Failed to remove RDMA scheduler config for VSI %u, err %d\n", 2604 vsi->vsi_num, err); 2605 2606 if (vsi->xdp_rings) 2607 /* return value check can be skipped here, it always returns 2608 * 0 if reset is in progress 2609 */ 2610 ice_destroy_xdp_rings(vsi, ICE_XDP_CFG_PART); 2611 2612 ice_vsi_clear_rings(vsi); 2613 ice_vsi_free_q_vectors(vsi); 2614 ice_vsi_put_qs(vsi); 2615 ice_vsi_free_arrays(vsi); 2616 2617 /* SR-IOV determines needed MSIX resources all at once instead of per 2618 * VSI since when VFs are spawned we know how many VFs there are and how 2619 * many interrupts each VF needs. SR-IOV MSIX resources are also 2620 * cleared in the same manner. 2621 */ 2622 2623 if (vsi->type == ICE_VSI_VF && 2624 vsi->agg_node && vsi->agg_node->valid) 2625 vsi->agg_node->num_vsis--; 2626 } 2627 2628 /** 2629 * ice_vsi_setup - Set up a VSI by a given type 2630 * @pf: board private structure 2631 * @params: parameters to use when creating the VSI 2632 * 2633 * This allocates the sw VSI structure and its queue resources. 2634 * 2635 * Returns pointer to the successfully allocated and configured VSI sw struct on 2636 * success, NULL on failure. 2637 */ 2638 struct ice_vsi * 2639 ice_vsi_setup(struct ice_pf *pf, struct ice_vsi_cfg_params *params) 2640 { 2641 struct device *dev = ice_pf_to_dev(pf); 2642 struct ice_vsi *vsi; 2643 int ret; 2644 2645 /* ice_vsi_setup can only initialize a new VSI, and we must have 2646 * a port_info structure for it. 2647 */ 2648 if (WARN_ON(!(params->flags & ICE_VSI_FLAG_INIT)) || 2649 WARN_ON(!params->port_info)) 2650 return NULL; 2651 2652 vsi = ice_vsi_alloc(pf); 2653 if (!vsi) { 2654 dev_err(dev, "could not allocate VSI\n"); 2655 return NULL; 2656 } 2657 2658 vsi->params = *params; 2659 ret = ice_vsi_cfg(vsi); 2660 if (ret) 2661 goto err_vsi_cfg; 2662 2663 /* Add switch rule to drop all Tx Flow Control Frames, of look up 2664 * type ETHERTYPE from VSIs, and restrict malicious VF from sending 2665 * out PAUSE or PFC frames. If enabled, FW can still send FC frames. 2666 * The rule is added once for PF VSI in order to create appropriate 2667 * recipe, since VSI/VSI list is ignored with drop action... 2668 * Also add rules to handle LLDP Tx packets. Tx LLDP packets need to 2669 * be dropped so that VFs cannot send LLDP packets to reconfig DCB 2670 * settings in the HW. 2671 */ 2672 if (!ice_is_safe_mode(pf) && vsi->type == ICE_VSI_PF) { 2673 ice_fltr_add_eth(vsi, ETH_P_PAUSE, ICE_FLTR_TX, 2674 ICE_DROP_PACKET); 2675 ice_vsi_cfg_sw_lldp(vsi, true, true); 2676 } 2677 2678 if (!vsi->agg_node) 2679 ice_set_agg_vsi(vsi); 2680 2681 return vsi; 2682 2683 err_vsi_cfg: 2684 ice_vsi_free(vsi); 2685 2686 return NULL; 2687 } 2688 2689 /** 2690 * ice_vsi_release_msix - Clear the queue to Interrupt mapping in HW 2691 * @vsi: the VSI being cleaned up 2692 */ 2693 static void ice_vsi_release_msix(struct ice_vsi *vsi) 2694 { 2695 struct ice_pf *pf = vsi->back; 2696 struct ice_hw *hw = &pf->hw; 2697 u32 txq = 0; 2698 u32 rxq = 0; 2699 int i, q; 2700 2701 ice_for_each_q_vector(vsi, i) { 2702 struct ice_q_vector *q_vector = vsi->q_vectors[i]; 2703 2704 ice_write_intrl(q_vector, 0); 2705 for (q = 0; q < q_vector->num_ring_tx; q++) { 2706 ice_write_itr(&q_vector->tx, 0); 2707 wr32(hw, QINT_TQCTL(vsi->txq_map[txq]), 0); 2708 if (vsi->xdp_rings) { 2709 u32 xdp_txq = txq + vsi->num_xdp_txq; 2710 2711 wr32(hw, QINT_TQCTL(vsi->txq_map[xdp_txq]), 0); 2712 } 2713 txq++; 2714 } 2715 2716 for (q = 0; q < q_vector->num_ring_rx; q++) { 2717 ice_write_itr(&q_vector->rx, 0); 2718 wr32(hw, QINT_RQCTL(vsi->rxq_map[rxq]), 0); 2719 rxq++; 2720 } 2721 } 2722 2723 ice_flush(hw); 2724 } 2725 2726 /** 2727 * ice_vsi_free_irq - Free the IRQ association with the OS 2728 * @vsi: the VSI being configured 2729 */ 2730 void ice_vsi_free_irq(struct ice_vsi *vsi) 2731 { 2732 struct ice_pf *pf = vsi->back; 2733 int i; 2734 2735 if (!vsi->q_vectors || !vsi->irqs_ready) 2736 return; 2737 2738 ice_vsi_release_msix(vsi); 2739 if (vsi->type == ICE_VSI_VF) 2740 return; 2741 2742 vsi->irqs_ready = false; 2743 2744 ice_for_each_q_vector(vsi, i) { 2745 int irq_num; 2746 2747 irq_num = vsi->q_vectors[i]->irq.virq; 2748 2749 /* free only the irqs that were actually requested */ 2750 if (!vsi->q_vectors[i] || 2751 !(vsi->q_vectors[i]->num_ring_tx || 2752 vsi->q_vectors[i]->num_ring_rx)) 2753 continue; 2754 2755 synchronize_irq(irq_num); 2756 devm_free_irq(ice_pf_to_dev(pf), irq_num, vsi->q_vectors[i]); 2757 } 2758 } 2759 2760 /** 2761 * ice_vsi_free_tx_rings - Free Tx resources for VSI queues 2762 * @vsi: the VSI having resources freed 2763 */ 2764 void ice_vsi_free_tx_rings(struct ice_vsi *vsi) 2765 { 2766 int i; 2767 2768 if (!vsi->tx_rings) 2769 return; 2770 2771 ice_for_each_txq(vsi, i) 2772 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) 2773 ice_free_tx_ring(vsi->tx_rings[i]); 2774 } 2775 2776 /** 2777 * ice_vsi_free_rx_rings - Free Rx resources for VSI queues 2778 * @vsi: the VSI having resources freed 2779 */ 2780 void ice_vsi_free_rx_rings(struct ice_vsi *vsi) 2781 { 2782 int i; 2783 2784 if (!vsi->rx_rings) 2785 return; 2786 2787 ice_for_each_rxq(vsi, i) 2788 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc) 2789 ice_free_rx_ring(vsi->rx_rings[i]); 2790 } 2791 2792 /** 2793 * ice_vsi_close - Shut down a VSI 2794 * @vsi: the VSI being shut down 2795 */ 2796 void ice_vsi_close(struct ice_vsi *vsi) 2797 { 2798 if (!test_and_set_bit(ICE_VSI_DOWN, vsi->state)) 2799 ice_down(vsi); 2800 2801 ice_vsi_clear_napi_queues(vsi); 2802 ice_vsi_free_irq(vsi); 2803 ice_vsi_free_tx_rings(vsi); 2804 ice_vsi_free_rx_rings(vsi); 2805 } 2806 2807 /** 2808 * ice_ena_vsi - resume a VSI 2809 * @vsi: the VSI being resume 2810 * @locked: is the rtnl_lock already held 2811 */ 2812 int ice_ena_vsi(struct ice_vsi *vsi, bool locked) 2813 { 2814 int err = 0; 2815 2816 if (!test_bit(ICE_VSI_NEEDS_RESTART, vsi->state)) 2817 return 0; 2818 2819 clear_bit(ICE_VSI_NEEDS_RESTART, vsi->state); 2820 2821 if (vsi->netdev && (vsi->type == ICE_VSI_PF || 2822 vsi->type == ICE_VSI_SF)) { 2823 if (netif_running(vsi->netdev)) { 2824 if (!locked) 2825 rtnl_lock(); 2826 2827 err = ice_open_internal(vsi->netdev); 2828 2829 if (!locked) 2830 rtnl_unlock(); 2831 } 2832 } else if (vsi->type == ICE_VSI_CTRL) { 2833 err = ice_vsi_open_ctrl(vsi); 2834 } 2835 2836 return err; 2837 } 2838 2839 /** 2840 * ice_dis_vsi - pause a VSI 2841 * @vsi: the VSI being paused 2842 * @locked: is the rtnl_lock already held 2843 */ 2844 void ice_dis_vsi(struct ice_vsi *vsi, bool locked) 2845 { 2846 bool already_down = test_bit(ICE_VSI_DOWN, vsi->state); 2847 2848 set_bit(ICE_VSI_NEEDS_RESTART, vsi->state); 2849 2850 if (vsi->netdev && (vsi->type == ICE_VSI_PF || 2851 vsi->type == ICE_VSI_SF)) { 2852 if (netif_running(vsi->netdev)) { 2853 if (!locked) 2854 rtnl_lock(); 2855 already_down = test_bit(ICE_VSI_DOWN, vsi->state); 2856 if (!already_down) 2857 ice_vsi_close(vsi); 2858 2859 if (!locked) 2860 rtnl_unlock(); 2861 } else if (!already_down) { 2862 ice_vsi_close(vsi); 2863 } 2864 } else if (vsi->type == ICE_VSI_CTRL && !already_down) { 2865 ice_vsi_close(vsi); 2866 } 2867 } 2868 2869 /** 2870 * ice_vsi_set_napi_queues - associate netdev queues with napi 2871 * @vsi: VSI pointer 2872 * 2873 * Associate queue[s] with napi for all vectors. 2874 */ 2875 void ice_vsi_set_napi_queues(struct ice_vsi *vsi) 2876 { 2877 struct net_device *netdev = vsi->netdev; 2878 int q_idx, v_idx; 2879 2880 if (!netdev) 2881 return; 2882 2883 ASSERT_RTNL(); 2884 ice_for_each_rxq(vsi, q_idx) 2885 if (vsi->rx_rings[q_idx] && vsi->rx_rings[q_idx]->q_vector) 2886 netif_queue_set_napi(netdev, q_idx, NETDEV_QUEUE_TYPE_RX, 2887 &vsi->rx_rings[q_idx]->q_vector->napi); 2888 2889 ice_for_each_txq(vsi, q_idx) 2890 if (vsi->tx_rings[q_idx] && vsi->tx_rings[q_idx]->q_vector) 2891 netif_queue_set_napi(netdev, q_idx, NETDEV_QUEUE_TYPE_TX, 2892 &vsi->tx_rings[q_idx]->q_vector->napi); 2893 /* Also set the interrupt number for the NAPI */ 2894 ice_for_each_q_vector(vsi, v_idx) { 2895 struct ice_q_vector *q_vector = vsi->q_vectors[v_idx]; 2896 2897 netif_napi_set_irq(&q_vector->napi, q_vector->irq.virq); 2898 } 2899 } 2900 2901 /** 2902 * ice_vsi_clear_napi_queues - dissociate netdev queues from napi 2903 * @vsi: VSI pointer 2904 * 2905 * Clear the association between all VSI queues queue[s] and napi. 2906 */ 2907 void ice_vsi_clear_napi_queues(struct ice_vsi *vsi) 2908 { 2909 struct net_device *netdev = vsi->netdev; 2910 int q_idx, v_idx; 2911 2912 if (!netdev) 2913 return; 2914 2915 ASSERT_RTNL(); 2916 /* Clear the NAPI's interrupt number */ 2917 ice_for_each_q_vector(vsi, v_idx) { 2918 struct ice_q_vector *q_vector = vsi->q_vectors[v_idx]; 2919 2920 netif_napi_set_irq(&q_vector->napi, -1); 2921 } 2922 2923 ice_for_each_txq(vsi, q_idx) 2924 netif_queue_set_napi(netdev, q_idx, NETDEV_QUEUE_TYPE_TX, NULL); 2925 2926 ice_for_each_rxq(vsi, q_idx) 2927 netif_queue_set_napi(netdev, q_idx, NETDEV_QUEUE_TYPE_RX, NULL); 2928 } 2929 2930 /** 2931 * ice_napi_add - register NAPI handler for the VSI 2932 * @vsi: VSI for which NAPI handler is to be registered 2933 * 2934 * This function is only called in the driver's load path. Registering the NAPI 2935 * handler is done in ice_vsi_alloc_q_vector() for all other cases (i.e. resume, 2936 * reset/rebuild, etc.) 2937 */ 2938 void ice_napi_add(struct ice_vsi *vsi) 2939 { 2940 int v_idx; 2941 2942 if (!vsi->netdev) 2943 return; 2944 2945 ice_for_each_q_vector(vsi, v_idx) 2946 netif_napi_add_config(vsi->netdev, 2947 &vsi->q_vectors[v_idx]->napi, 2948 ice_napi_poll, 2949 v_idx); 2950 } 2951 2952 /** 2953 * ice_vsi_release - Delete a VSI and free its resources 2954 * @vsi: the VSI being removed 2955 * 2956 * Returns 0 on success or < 0 on error 2957 */ 2958 int ice_vsi_release(struct ice_vsi *vsi) 2959 { 2960 struct ice_pf *pf; 2961 2962 if (!vsi->back) 2963 return -ENODEV; 2964 pf = vsi->back; 2965 2966 if (ice_is_vsi_dflt_vsi(vsi)) 2967 ice_clear_dflt_vsi(vsi); 2968 2969 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) 2970 ice_rss_clean(vsi); 2971 2972 ice_vsi_close(vsi); 2973 2974 /* The Rx rule will only exist to remove if the LLDP FW 2975 * engine is currently stopped 2976 */ 2977 if (!ice_is_safe_mode(pf) && 2978 !test_bit(ICE_FLAG_FW_LLDP_AGENT, pf->flags) && 2979 (vsi->type == ICE_VSI_PF || (vsi->type == ICE_VSI_VF && 2980 ice_vf_is_lldp_ena(vsi->vf)))) 2981 ice_vsi_cfg_sw_lldp(vsi, false, false); 2982 2983 ice_vsi_decfg(vsi); 2984 2985 /* retain SW VSI data structure since it is needed to unregister and 2986 * free VSI netdev when PF is not in reset recovery pending state,\ 2987 * for ex: during rmmod. 2988 */ 2989 if (!ice_is_reset_in_progress(pf->state)) 2990 ice_vsi_delete(vsi); 2991 2992 return 0; 2993 } 2994 2995 /** 2996 * ice_vsi_rebuild_get_coalesce - get coalesce from all q_vectors 2997 * @vsi: VSI connected with q_vectors 2998 * @coalesce: array of struct with stored coalesce 2999 * 3000 * Returns array size. 3001 */ 3002 static int 3003 ice_vsi_rebuild_get_coalesce(struct ice_vsi *vsi, 3004 struct ice_coalesce_stored *coalesce) 3005 { 3006 int i; 3007 3008 ice_for_each_q_vector(vsi, i) { 3009 struct ice_q_vector *q_vector = vsi->q_vectors[i]; 3010 3011 coalesce[i].itr_tx = q_vector->tx.itr_settings; 3012 coalesce[i].itr_rx = q_vector->rx.itr_settings; 3013 coalesce[i].intrl = q_vector->intrl; 3014 3015 if (i < vsi->num_txq) 3016 coalesce[i].tx_valid = true; 3017 if (i < vsi->num_rxq) 3018 coalesce[i].rx_valid = true; 3019 } 3020 3021 return vsi->num_q_vectors; 3022 } 3023 3024 /** 3025 * ice_vsi_rebuild_set_coalesce - set coalesce from earlier saved arrays 3026 * @vsi: VSI connected with q_vectors 3027 * @coalesce: pointer to array of struct with stored coalesce 3028 * @size: size of coalesce array 3029 * 3030 * Before this function, ice_vsi_rebuild_get_coalesce should be called to save 3031 * ITR params in arrays. If size is 0 or coalesce wasn't stored set coalesce 3032 * to default value. 3033 */ 3034 static void 3035 ice_vsi_rebuild_set_coalesce(struct ice_vsi *vsi, 3036 struct ice_coalesce_stored *coalesce, int size) 3037 { 3038 struct ice_ring_container *rc; 3039 int i; 3040 3041 if ((size && !coalesce) || !vsi) 3042 return; 3043 3044 /* There are a couple of cases that have to be handled here: 3045 * 1. The case where the number of queue vectors stays the same, but 3046 * the number of Tx or Rx rings changes (the first for loop) 3047 * 2. The case where the number of queue vectors increased (the 3048 * second for loop) 3049 */ 3050 for (i = 0; i < size && i < vsi->num_q_vectors; i++) { 3051 /* There are 2 cases to handle here and they are the same for 3052 * both Tx and Rx: 3053 * if the entry was valid previously (coalesce[i].[tr]x_valid 3054 * and the loop variable is less than the number of rings 3055 * allocated, then write the previous values 3056 * 3057 * if the entry was not valid previously, but the number of 3058 * rings is less than are allocated (this means the number of 3059 * rings increased from previously), then write out the 3060 * values in the first element 3061 * 3062 * Also, always write the ITR, even if in ITR_IS_DYNAMIC 3063 * as there is no harm because the dynamic algorithm 3064 * will just overwrite. 3065 */ 3066 if (i < vsi->alloc_rxq && coalesce[i].rx_valid) { 3067 rc = &vsi->q_vectors[i]->rx; 3068 rc->itr_settings = coalesce[i].itr_rx; 3069 ice_write_itr(rc, rc->itr_setting); 3070 } else if (i < vsi->alloc_rxq) { 3071 rc = &vsi->q_vectors[i]->rx; 3072 rc->itr_settings = coalesce[0].itr_rx; 3073 ice_write_itr(rc, rc->itr_setting); 3074 } 3075 3076 if (i < vsi->alloc_txq && coalesce[i].tx_valid) { 3077 rc = &vsi->q_vectors[i]->tx; 3078 rc->itr_settings = coalesce[i].itr_tx; 3079 ice_write_itr(rc, rc->itr_setting); 3080 } else if (i < vsi->alloc_txq) { 3081 rc = &vsi->q_vectors[i]->tx; 3082 rc->itr_settings = coalesce[0].itr_tx; 3083 ice_write_itr(rc, rc->itr_setting); 3084 } 3085 3086 vsi->q_vectors[i]->intrl = coalesce[i].intrl; 3087 ice_set_q_vector_intrl(vsi->q_vectors[i]); 3088 } 3089 3090 /* the number of queue vectors increased so write whatever is in 3091 * the first element 3092 */ 3093 for (; i < vsi->num_q_vectors; i++) { 3094 /* transmit */ 3095 rc = &vsi->q_vectors[i]->tx; 3096 rc->itr_settings = coalesce[0].itr_tx; 3097 ice_write_itr(rc, rc->itr_setting); 3098 3099 /* receive */ 3100 rc = &vsi->q_vectors[i]->rx; 3101 rc->itr_settings = coalesce[0].itr_rx; 3102 ice_write_itr(rc, rc->itr_setting); 3103 3104 vsi->q_vectors[i]->intrl = coalesce[0].intrl; 3105 ice_set_q_vector_intrl(vsi->q_vectors[i]); 3106 } 3107 } 3108 3109 /** 3110 * ice_vsi_resize_stat_arrays - resize ring stats arrays for new queue count 3111 * @vsi: VSI to swap the ring stats arrays of 3112 * 3113 * Call while @vsi still owns its queues and before ice_vsi_decfg() returns them 3114 * to the PF pool, so that the new size is what ice_vsi_set_num_qs() will compute 3115 * afterwards. Surviving entries are carried over, the rest is freed. 3116 * 3117 * Return: 0 on success and negative value on failure. 3118 */ 3119 static int ice_vsi_resize_stat_arrays(struct ice_vsi *vsi) 3120 { 3121 struct ice_vsi_alloc_queues_params qs; 3122 3123 /* channel VSIs have no entry in pf->vsi_stats[] */ 3124 if (vsi->type == ICE_VSI_CHNL) 3125 return 0; 3126 3127 qs = ice_vsi_get_num_qs(vsi, vsi->alloc_txq + vsi->num_xdp_txq, 3128 vsi->alloc_rxq); 3129 3130 return ice_vsi_install_stat_arrays(vsi, qs.alloc_txq, qs.alloc_rxq); 3131 } 3132 3133 /** 3134 * ice_vsi_rebuild - Rebuild VSI after reset 3135 * @vsi: VSI to be rebuild 3136 * @vsi_flags: flags used for VSI rebuild flow 3137 * 3138 * Set vsi_flags to ICE_VSI_FLAG_INIT to initialize a new VSI, or 3139 * ICE_VSI_FLAG_NO_INIT to rebuild an existing VSI in hardware. 3140 * 3141 * Returns 0 on success and negative value on failure 3142 */ 3143 int ice_vsi_rebuild(struct ice_vsi *vsi, u32 vsi_flags) 3144 { 3145 struct ice_coalesce_stored *coalesce; 3146 int prev_num_q_vectors; 3147 struct ice_pf *pf; 3148 int ret; 3149 3150 if (!vsi) 3151 return -EINVAL; 3152 3153 vsi->flags = vsi_flags; 3154 pf = vsi->back; 3155 if (WARN_ON(vsi->type == ICE_VSI_VF && !vsi->vf)) 3156 return -EINVAL; 3157 3158 mutex_lock(&vsi->xdp_state_lock); 3159 3160 ret = ice_vsi_resize_stat_arrays(vsi); 3161 if (ret) 3162 goto unlock; 3163 3164 ice_vsi_decfg(vsi); 3165 ret = ice_vsi_cfg_def(vsi); 3166 if (ret) 3167 goto unlock; 3168 3169 coalesce = kzalloc_objs(struct ice_coalesce_stored, vsi->num_q_vectors); 3170 if (!coalesce) { 3171 ret = -ENOMEM; 3172 goto decfg; 3173 } 3174 3175 prev_num_q_vectors = ice_vsi_rebuild_get_coalesce(vsi, coalesce); 3176 3177 ret = ice_vsi_cfg_tc_lan(pf, vsi); 3178 if (ret) { 3179 if (vsi_flags & ICE_VSI_FLAG_INIT) { 3180 ret = -EIO; 3181 goto free_coalesce; 3182 } 3183 3184 ret = ice_schedule_reset(pf, ICE_RESET_PFR); 3185 goto free_coalesce; 3186 } 3187 3188 ice_vsi_rebuild_set_coalesce(vsi, coalesce, prev_num_q_vectors); 3189 clear_bit(ICE_VSI_REBUILD_PENDING, vsi->state); 3190 3191 free_coalesce: 3192 kfree(coalesce); 3193 decfg: 3194 if (ret) 3195 ice_vsi_decfg(vsi); 3196 unlock: 3197 mutex_unlock(&vsi->xdp_state_lock); 3198 return ret; 3199 } 3200 3201 /** 3202 * ice_is_reset_in_progress - check for a reset in progress 3203 * @state: PF state field 3204 */ 3205 bool ice_is_reset_in_progress(unsigned long *state) 3206 { 3207 return test_bit(ICE_RESET_OICR_RECV, state) || 3208 test_bit(ICE_PFR_REQ, state) || 3209 test_bit(ICE_CORER_REQ, state) || 3210 test_bit(ICE_GLOBR_REQ, state); 3211 } 3212 3213 /** 3214 * ice_wait_for_reset - Wait for driver to finish reset and rebuild 3215 * @pf: pointer to the PF structure 3216 * @timeout: length of time to wait, in jiffies 3217 * 3218 * Wait (sleep) for a short time until the driver finishes cleaning up from 3219 * a device reset. The caller must be able to sleep. Use this to delay 3220 * operations that could fail while the driver is cleaning up after a device 3221 * reset. 3222 * 3223 * Returns 0 on success, -EBUSY if the reset is not finished within the 3224 * timeout, and -ERESTARTSYS if the thread was interrupted. 3225 */ 3226 int ice_wait_for_reset(struct ice_pf *pf, unsigned long timeout) 3227 { 3228 long ret; 3229 3230 ret = wait_event_interruptible_timeout(pf->reset_wait_queue, 3231 !ice_is_reset_in_progress(pf->state), 3232 timeout); 3233 if (ret < 0) 3234 return ret; 3235 else if (!ret) 3236 return -EBUSY; 3237 else 3238 return 0; 3239 } 3240 3241 /** 3242 * ice_vsi_update_q_map - update our copy of the VSI info with new queue map 3243 * @vsi: VSI being configured 3244 * @ctx: the context buffer returned from AQ VSI update command 3245 */ 3246 static void ice_vsi_update_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctx) 3247 { 3248 vsi->info.mapping_flags = ctx->info.mapping_flags; 3249 memcpy(&vsi->info.q_mapping, &ctx->info.q_mapping, 3250 sizeof(vsi->info.q_mapping)); 3251 memcpy(&vsi->info.tc_mapping, ctx->info.tc_mapping, 3252 sizeof(vsi->info.tc_mapping)); 3253 } 3254 3255 /** 3256 * ice_vsi_cfg_netdev_tc - Setup the netdev TC configuration 3257 * @vsi: the VSI being configured 3258 * @ena_tc: TC map to be enabled 3259 */ 3260 void ice_vsi_cfg_netdev_tc(struct ice_vsi *vsi, u8 ena_tc) 3261 { 3262 struct net_device *netdev = vsi->netdev; 3263 struct ice_pf *pf = vsi->back; 3264 int numtc = vsi->tc_cfg.numtc; 3265 struct ice_dcbx_cfg *dcbcfg; 3266 u8 netdev_tc; 3267 int i; 3268 3269 if (!netdev) 3270 return; 3271 3272 /* CHNL VSI doesn't have its own netdev, hence, no netdev_tc */ 3273 if (vsi->type == ICE_VSI_CHNL) 3274 return; 3275 3276 if (!ena_tc) { 3277 netdev_reset_tc(netdev); 3278 return; 3279 } 3280 3281 if (vsi->type == ICE_VSI_PF && ice_is_adq_active(pf)) 3282 numtc = vsi->all_numtc; 3283 3284 if (netdev_set_num_tc(netdev, numtc)) 3285 return; 3286 3287 dcbcfg = &pf->hw.port_info->qos_cfg.local_dcbx_cfg; 3288 3289 ice_for_each_traffic_class(i) 3290 if (vsi->tc_cfg.ena_tc & BIT(i)) 3291 netdev_set_tc_queue(netdev, 3292 vsi->tc_cfg.tc_info[i].netdev_tc, 3293 vsi->tc_cfg.tc_info[i].qcount_tx, 3294 vsi->tc_cfg.tc_info[i].qoffset); 3295 /* setup TC queue map for CHNL TCs */ 3296 ice_for_each_chnl_tc(i) { 3297 if (!(vsi->all_enatc & BIT(i))) 3298 break; 3299 if (!vsi->mqprio_qopt.qopt.count[i]) 3300 break; 3301 netdev_set_tc_queue(netdev, i, 3302 vsi->mqprio_qopt.qopt.count[i], 3303 vsi->mqprio_qopt.qopt.offset[i]); 3304 } 3305 3306 if (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) 3307 return; 3308 3309 for (i = 0; i < ICE_MAX_USER_PRIORITY; i++) { 3310 u8 ets_tc = dcbcfg->etscfg.prio_table[i]; 3311 3312 /* Get the mapped netdev TC# for the UP */ 3313 netdev_tc = vsi->tc_cfg.tc_info[ets_tc].netdev_tc; 3314 netdev_set_prio_tc_map(netdev, i, netdev_tc); 3315 } 3316 } 3317 3318 /** 3319 * ice_vsi_setup_q_map_mqprio - Prepares mqprio based tc_config 3320 * @vsi: the VSI being configured, 3321 * @ctxt: VSI context structure 3322 * @ena_tc: number of traffic classes to enable 3323 * 3324 * Prepares VSI tc_config to have queue configurations based on MQPRIO options. 3325 */ 3326 static int 3327 ice_vsi_setup_q_map_mqprio(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt, 3328 u8 ena_tc) 3329 { 3330 u16 pow, offset = 0, qcount_tx = 0, qcount_rx = 0, qmap; 3331 u16 tc0_offset = vsi->mqprio_qopt.qopt.offset[0]; 3332 int tc0_qcount = vsi->mqprio_qopt.qopt.count[0]; 3333 u16 new_txq, new_rxq; 3334 u8 netdev_tc = 0; 3335 int i; 3336 3337 vsi->tc_cfg.ena_tc = ena_tc ? ena_tc : 1; 3338 3339 pow = order_base_2(tc0_qcount); 3340 qmap = FIELD_PREP(ICE_AQ_VSI_TC_Q_OFFSET_M, tc0_offset); 3341 qmap |= FIELD_PREP(ICE_AQ_VSI_TC_Q_NUM_M, pow); 3342 3343 ice_for_each_traffic_class(i) { 3344 if (!(vsi->tc_cfg.ena_tc & BIT(i))) { 3345 /* TC is not enabled */ 3346 vsi->tc_cfg.tc_info[i].qoffset = 0; 3347 vsi->tc_cfg.tc_info[i].qcount_rx = 1; 3348 vsi->tc_cfg.tc_info[i].qcount_tx = 1; 3349 vsi->tc_cfg.tc_info[i].netdev_tc = 0; 3350 ctxt->info.tc_mapping[i] = 0; 3351 continue; 3352 } 3353 3354 offset = vsi->mqprio_qopt.qopt.offset[i]; 3355 qcount_rx = vsi->mqprio_qopt.qopt.count[i]; 3356 qcount_tx = vsi->mqprio_qopt.qopt.count[i]; 3357 vsi->tc_cfg.tc_info[i].qoffset = offset; 3358 vsi->tc_cfg.tc_info[i].qcount_rx = qcount_rx; 3359 vsi->tc_cfg.tc_info[i].qcount_tx = qcount_tx; 3360 vsi->tc_cfg.tc_info[i].netdev_tc = netdev_tc++; 3361 } 3362 3363 if (vsi->all_numtc && vsi->all_numtc != vsi->tc_cfg.numtc) { 3364 ice_for_each_chnl_tc(i) { 3365 if (!(vsi->all_enatc & BIT(i))) 3366 continue; 3367 offset = vsi->mqprio_qopt.qopt.offset[i]; 3368 qcount_rx = vsi->mqprio_qopt.qopt.count[i]; 3369 qcount_tx = vsi->mqprio_qopt.qopt.count[i]; 3370 } 3371 } 3372 3373 new_txq = offset + qcount_tx; 3374 if (new_txq > vsi->alloc_txq) { 3375 dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Tx queues (%u), than were allocated (%u)!\n", 3376 new_txq, vsi->alloc_txq); 3377 return -EINVAL; 3378 } 3379 3380 new_rxq = offset + qcount_rx; 3381 if (new_rxq > vsi->alloc_rxq) { 3382 dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Rx queues (%u), than were allocated (%u)!\n", 3383 new_rxq, vsi->alloc_rxq); 3384 return -EINVAL; 3385 } 3386 3387 /* Set actual Tx/Rx queue pairs */ 3388 vsi->num_txq = new_txq; 3389 vsi->num_rxq = new_rxq; 3390 3391 /* Setup queue TC[0].qmap for given VSI context */ 3392 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap); 3393 ctxt->info.q_mapping[0] = cpu_to_le16(vsi->rxq_map[0]); 3394 ctxt->info.q_mapping[1] = cpu_to_le16(tc0_qcount); 3395 3396 /* Find queue count available for channel VSIs and starting offset 3397 * for channel VSIs 3398 */ 3399 if (tc0_qcount && tc0_qcount < vsi->num_rxq) { 3400 vsi->cnt_q_avail = vsi->num_rxq - tc0_qcount; 3401 vsi->next_base_q = tc0_qcount; 3402 } 3403 dev_dbg(ice_pf_to_dev(vsi->back), "vsi->num_txq = %d\n", vsi->num_txq); 3404 dev_dbg(ice_pf_to_dev(vsi->back), "vsi->num_rxq = %d\n", vsi->num_rxq); 3405 dev_dbg(ice_pf_to_dev(vsi->back), "all_numtc %u, all_enatc: 0x%04x, tc_cfg.numtc %u\n", 3406 vsi->all_numtc, vsi->all_enatc, vsi->tc_cfg.numtc); 3407 3408 return 0; 3409 } 3410 3411 /** 3412 * ice_vsi_cfg_tc - Configure VSI Tx Sched for given TC map 3413 * @vsi: VSI to be configured 3414 * @ena_tc: TC bitmap 3415 * 3416 * VSI queues expected to be quiesced before calling this function 3417 */ 3418 int ice_vsi_cfg_tc(struct ice_vsi *vsi, u8 ena_tc) 3419 { 3420 u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 }; 3421 struct ice_pf *pf = vsi->back; 3422 struct ice_tc_cfg old_tc_cfg; 3423 struct ice_vsi_ctx *ctx; 3424 struct device *dev; 3425 int i, ret = 0; 3426 u8 num_tc = 0; 3427 3428 dev = ice_pf_to_dev(pf); 3429 if (vsi->tc_cfg.ena_tc == ena_tc && 3430 vsi->mqprio_qopt.mode != TC_MQPRIO_MODE_CHANNEL) 3431 return 0; 3432 3433 ice_for_each_traffic_class(i) { 3434 /* build bitmap of enabled TCs */ 3435 if (ena_tc & BIT(i)) 3436 num_tc++; 3437 /* populate max_txqs per TC */ 3438 max_txqs[i] = vsi->alloc_txq; 3439 /* Update max_txqs if it is CHNL VSI, because alloc_t[r]xq are 3440 * zero for CHNL VSI, hence use num_txq instead as max_txqs 3441 */ 3442 if (vsi->type == ICE_VSI_CHNL && 3443 test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) 3444 max_txqs[i] = vsi->num_txq; 3445 } 3446 3447 memcpy(&old_tc_cfg, &vsi->tc_cfg, sizeof(old_tc_cfg)); 3448 vsi->tc_cfg.ena_tc = ena_tc; 3449 vsi->tc_cfg.numtc = num_tc; 3450 3451 ctx = kzalloc_obj(*ctx); 3452 if (!ctx) 3453 return -ENOMEM; 3454 3455 ctx->vf_num = 0; 3456 ctx->info = vsi->info; 3457 3458 if (vsi->type == ICE_VSI_PF && 3459 test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) 3460 ret = ice_vsi_setup_q_map_mqprio(vsi, ctx, ena_tc); 3461 else 3462 ret = ice_vsi_setup_q_map(vsi, ctx); 3463 3464 if (ret) { 3465 memcpy(&vsi->tc_cfg, &old_tc_cfg, sizeof(vsi->tc_cfg)); 3466 goto out; 3467 } 3468 3469 /* must to indicate which section of VSI context are being modified */ 3470 ctx->info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_RXQ_MAP_VALID); 3471 ret = ice_update_vsi(&pf->hw, vsi->idx, ctx, NULL); 3472 if (ret) { 3473 dev_info(dev, "Failed VSI Update\n"); 3474 goto out; 3475 } 3476 3477 if (vsi->type == ICE_VSI_PF && 3478 test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) 3479 ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, 1, max_txqs); 3480 else 3481 ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, 3482 vsi->tc_cfg.ena_tc, max_txqs); 3483 3484 if (ret) { 3485 dev_err(dev, "VSI %d failed TC config, error %d\n", 3486 vsi->vsi_num, ret); 3487 goto out; 3488 } 3489 ice_vsi_update_q_map(vsi, ctx); 3490 vsi->info.valid_sections = 0; 3491 3492 ice_vsi_cfg_netdev_tc(vsi, ena_tc); 3493 out: 3494 kfree(ctx); 3495 return ret; 3496 } 3497 3498 /** 3499 * ice_update_tx_ring_stats - Update Tx ring specific counters 3500 * @tx_ring: ring to update 3501 * @pkts: number of processed packets 3502 * @bytes: number of processed bytes 3503 */ 3504 void ice_update_tx_ring_stats(struct ice_tx_ring *tx_ring, u64 pkts, u64 bytes) 3505 { 3506 u64_stats_update_begin(&tx_ring->ring_stats->syncp); 3507 u64_stats_add(&tx_ring->ring_stats->pkts, pkts); 3508 u64_stats_add(&tx_ring->ring_stats->bytes, bytes); 3509 u64_stats_update_end(&tx_ring->ring_stats->syncp); 3510 } 3511 3512 /** 3513 * ice_update_rx_ring_stats - Update Rx ring specific counters 3514 * @rx_ring: ring to update 3515 * @pkts: number of processed packets 3516 * @bytes: number of processed bytes 3517 */ 3518 void ice_update_rx_ring_stats(struct ice_rx_ring *rx_ring, u64 pkts, u64 bytes) 3519 { 3520 u64_stats_update_begin(&rx_ring->ring_stats->syncp); 3521 u64_stats_add(&rx_ring->ring_stats->pkts, pkts); 3522 u64_stats_add(&rx_ring->ring_stats->bytes, bytes); 3523 u64_stats_update_end(&rx_ring->ring_stats->syncp); 3524 } 3525 3526 /** 3527 * ice_fetch_tx_ring_stats - Fetch Tx ring packet and byte counters 3528 * @ring: ring to update 3529 * @pkts: number of processed packets 3530 * @bytes: number of processed bytes 3531 */ 3532 void ice_fetch_tx_ring_stats(const struct ice_tx_ring *ring, 3533 u64 *pkts, u64 *bytes) 3534 { 3535 unsigned int start; 3536 3537 do { 3538 start = u64_stats_fetch_begin(&ring->ring_stats->syncp); 3539 *pkts = u64_stats_read(&ring->ring_stats->pkts); 3540 *bytes = u64_stats_read(&ring->ring_stats->bytes); 3541 } while (u64_stats_fetch_retry(&ring->ring_stats->syncp, start)); 3542 } 3543 3544 /** 3545 * ice_fetch_rx_ring_stats - Fetch Rx ring packet and byte counters 3546 * @ring: ring to read 3547 * @pkts: number of processed packets 3548 * @bytes: number of processed bytes 3549 */ 3550 void ice_fetch_rx_ring_stats(const struct ice_rx_ring *ring, 3551 u64 *pkts, u64 *bytes) 3552 { 3553 unsigned int start; 3554 3555 do { 3556 start = u64_stats_fetch_begin(&ring->ring_stats->syncp); 3557 *pkts = u64_stats_read(&ring->ring_stats->pkts); 3558 *bytes = u64_stats_read(&ring->ring_stats->bytes); 3559 } while (u64_stats_fetch_retry(&ring->ring_stats->syncp, start)); 3560 } 3561 3562 /** 3563 * ice_is_dflt_vsi_in_use - check if the default forwarding VSI is being used 3564 * @pi: port info of the switch with default VSI 3565 * 3566 * Return true if the there is a single VSI in default forwarding VSI list 3567 */ 3568 bool ice_is_dflt_vsi_in_use(struct ice_port_info *pi) 3569 { 3570 bool exists = false; 3571 3572 ice_check_if_dflt_vsi(pi, 0, &exists); 3573 return exists; 3574 } 3575 3576 /** 3577 * ice_is_vsi_dflt_vsi - check if the VSI passed in is the default VSI 3578 * @vsi: VSI to compare against default forwarding VSI 3579 * 3580 * If this VSI passed in is the default forwarding VSI then return true, else 3581 * return false 3582 */ 3583 bool ice_is_vsi_dflt_vsi(struct ice_vsi *vsi) 3584 { 3585 return ice_check_if_dflt_vsi(vsi->port_info, vsi->idx, NULL); 3586 } 3587 3588 /** 3589 * ice_set_dflt_vsi - set the default forwarding VSI 3590 * @vsi: VSI getting set as the default forwarding VSI on the switch 3591 * 3592 * If the VSI passed in is already the default VSI and it's enabled just return 3593 * success. 3594 * 3595 * Otherwise try to set the VSI passed in as the switch's default VSI and 3596 * return the result. 3597 */ 3598 int ice_set_dflt_vsi(struct ice_vsi *vsi) 3599 { 3600 struct device *dev; 3601 int status; 3602 3603 if (!vsi) 3604 return -EINVAL; 3605 3606 dev = ice_pf_to_dev(vsi->back); 3607 3608 if (ice_lag_is_switchdev_running(vsi->back)) { 3609 dev_dbg(dev, "VSI %d passed is a part of LAG containing interfaces in switchdev mode, nothing to do\n", 3610 vsi->vsi_num); 3611 return 0; 3612 } 3613 3614 /* the VSI passed in is already the default VSI */ 3615 if (ice_is_vsi_dflt_vsi(vsi)) { 3616 dev_dbg(dev, "VSI %d passed in is already the default forwarding VSI, nothing to do\n", 3617 vsi->vsi_num); 3618 return 0; 3619 } 3620 3621 status = ice_cfg_dflt_vsi(vsi->port_info, vsi->idx, true, ICE_FLTR_RX); 3622 if (status) { 3623 dev_err(dev, "Failed to set VSI %d as the default forwarding VSI, error %d\n", 3624 vsi->vsi_num, status); 3625 return status; 3626 } 3627 3628 return 0; 3629 } 3630 3631 /** 3632 * ice_clear_dflt_vsi - clear the default forwarding VSI 3633 * @vsi: VSI to remove from filter list 3634 * 3635 * If the switch has no default VSI or it's not enabled then return error. 3636 * 3637 * Otherwise try to clear the default VSI and return the result. 3638 */ 3639 int ice_clear_dflt_vsi(struct ice_vsi *vsi) 3640 { 3641 struct device *dev; 3642 int status; 3643 3644 if (!vsi) 3645 return -EINVAL; 3646 3647 dev = ice_pf_to_dev(vsi->back); 3648 3649 /* there is no default VSI configured */ 3650 if (!ice_is_dflt_vsi_in_use(vsi->port_info)) 3651 return -ENODEV; 3652 3653 status = ice_cfg_dflt_vsi(vsi->port_info, vsi->idx, false, 3654 ICE_FLTR_RX); 3655 if (status) { 3656 dev_err(dev, "Failed to clear the default forwarding VSI %d, error %d\n", 3657 vsi->vsi_num, status); 3658 return -EIO; 3659 } 3660 3661 return 0; 3662 } 3663 3664 /** 3665 * ice_get_link_speed_mbps - get link speed in Mbps 3666 * @vsi: the VSI whose link speed is being queried 3667 * 3668 * Return current VSI link speed and 0 if the speed is unknown. 3669 */ 3670 int ice_get_link_speed_mbps(struct ice_vsi *vsi) 3671 { 3672 unsigned int link_speed; 3673 3674 link_speed = vsi->port_info->phy.link_info.link_speed; 3675 3676 return (int)ice_get_link_speed(fls(link_speed) - 1); 3677 } 3678 3679 /** 3680 * ice_get_link_speed_kbps - get link speed in Kbps 3681 * @vsi: the VSI whose link speed is being queried 3682 * 3683 * Return current VSI link speed and 0 if the speed is unknown. 3684 */ 3685 int ice_get_link_speed_kbps(struct ice_vsi *vsi) 3686 { 3687 int speed_mbps; 3688 3689 speed_mbps = ice_get_link_speed_mbps(vsi); 3690 3691 return speed_mbps * 1000; 3692 } 3693 3694 /** 3695 * ice_set_min_bw_limit - setup minimum BW limit for Tx based on min_tx_rate 3696 * @vsi: VSI to be configured 3697 * @min_tx_rate: min Tx rate in Kbps to be configured as BW limit 3698 * 3699 * If the min_tx_rate is specified as 0 that means to clear the minimum BW limit 3700 * profile, otherwise a non-zero value will force a minimum BW limit for the VSI 3701 * on TC 0. 3702 */ 3703 int ice_set_min_bw_limit(struct ice_vsi *vsi, u64 min_tx_rate) 3704 { 3705 struct ice_pf *pf = vsi->back; 3706 struct device *dev; 3707 int status; 3708 int speed; 3709 3710 dev = ice_pf_to_dev(pf); 3711 if (!vsi->port_info) { 3712 dev_dbg(dev, "VSI %d, type %u specified doesn't have valid port_info\n", 3713 vsi->idx, vsi->type); 3714 return -EINVAL; 3715 } 3716 3717 speed = ice_get_link_speed_kbps(vsi); 3718 if (min_tx_rate > (u64)speed) { 3719 dev_err(dev, "invalid min Tx rate %llu Kbps specified for %s %d is greater than current link speed %u Kbps\n", 3720 min_tx_rate, ice_vsi_type_str(vsi->type), vsi->idx, 3721 speed); 3722 return -EINVAL; 3723 } 3724 3725 /* Configure min BW for VSI limit */ 3726 if (min_tx_rate) { 3727 status = ice_cfg_vsi_bw_lmt_per_tc(vsi->port_info, vsi->idx, 0, 3728 ICE_MIN_BW, min_tx_rate); 3729 if (status) { 3730 dev_err(dev, "failed to set min Tx rate(%llu Kbps) for %s %d\n", 3731 min_tx_rate, ice_vsi_type_str(vsi->type), 3732 vsi->idx); 3733 return status; 3734 } 3735 3736 dev_dbg(dev, "set min Tx rate(%llu Kbps) for %s\n", 3737 min_tx_rate, ice_vsi_type_str(vsi->type)); 3738 } else { 3739 status = ice_cfg_vsi_bw_dflt_lmt_per_tc(vsi->port_info, 3740 vsi->idx, 0, 3741 ICE_MIN_BW); 3742 if (status) { 3743 dev_err(dev, "failed to clear min Tx rate configuration for %s %d\n", 3744 ice_vsi_type_str(vsi->type), vsi->idx); 3745 return status; 3746 } 3747 3748 dev_dbg(dev, "cleared min Tx rate configuration for %s %d\n", 3749 ice_vsi_type_str(vsi->type), vsi->idx); 3750 } 3751 3752 return 0; 3753 } 3754 3755 /** 3756 * ice_set_max_bw_limit - setup maximum BW limit for Tx based on max_tx_rate 3757 * @vsi: VSI to be configured 3758 * @max_tx_rate: max Tx rate in Kbps to be configured as BW limit 3759 * 3760 * If the max_tx_rate is specified as 0 that means to clear the maximum BW limit 3761 * profile, otherwise a non-zero value will force a maximum BW limit for the VSI 3762 * on TC 0. 3763 */ 3764 int ice_set_max_bw_limit(struct ice_vsi *vsi, u64 max_tx_rate) 3765 { 3766 struct ice_pf *pf = vsi->back; 3767 struct device *dev; 3768 int status; 3769 int speed; 3770 3771 dev = ice_pf_to_dev(pf); 3772 if (!vsi->port_info) { 3773 dev_dbg(dev, "VSI %d, type %u specified doesn't have valid port_info\n", 3774 vsi->idx, vsi->type); 3775 return -EINVAL; 3776 } 3777 3778 speed = ice_get_link_speed_kbps(vsi); 3779 if (max_tx_rate > (u64)speed) { 3780 dev_err(dev, "invalid max Tx rate %llu Kbps specified for %s %d is greater than current link speed %u Kbps\n", 3781 max_tx_rate, ice_vsi_type_str(vsi->type), vsi->idx, 3782 speed); 3783 return -EINVAL; 3784 } 3785 3786 /* Configure max BW for VSI limit */ 3787 if (max_tx_rate) { 3788 status = ice_cfg_vsi_bw_lmt_per_tc(vsi->port_info, vsi->idx, 0, 3789 ICE_MAX_BW, max_tx_rate); 3790 if (status) { 3791 dev_err(dev, "failed setting max Tx rate(%llu Kbps) for %s %d\n", 3792 max_tx_rate, ice_vsi_type_str(vsi->type), 3793 vsi->idx); 3794 return status; 3795 } 3796 3797 dev_dbg(dev, "set max Tx rate(%llu Kbps) for %s %d\n", 3798 max_tx_rate, ice_vsi_type_str(vsi->type), vsi->idx); 3799 } else { 3800 status = ice_cfg_vsi_bw_dflt_lmt_per_tc(vsi->port_info, 3801 vsi->idx, 0, 3802 ICE_MAX_BW); 3803 if (status) { 3804 dev_err(dev, "failed clearing max Tx rate configuration for %s %d\n", 3805 ice_vsi_type_str(vsi->type), vsi->idx); 3806 return status; 3807 } 3808 3809 dev_dbg(dev, "cleared max Tx rate configuration for %s %d\n", 3810 ice_vsi_type_str(vsi->type), vsi->idx); 3811 } 3812 3813 return 0; 3814 } 3815 3816 /** 3817 * ice_set_link - turn on/off physical link 3818 * @vsi: VSI to modify physical link on 3819 * @ena: turn on/off physical link 3820 */ 3821 int ice_set_link(struct ice_vsi *vsi, bool ena) 3822 { 3823 struct device *dev = ice_pf_to_dev(vsi->back); 3824 struct ice_port_info *pi = vsi->port_info; 3825 struct ice_hw *hw = pi->hw; 3826 int status; 3827 3828 if (vsi->type != ICE_VSI_PF) 3829 return -EINVAL; 3830 3831 status = ice_aq_set_link_restart_an(pi, ena, NULL, 3832 ICE_AQC_RESTART_AN_REFCLK_NOCHANGE); 3833 3834 /* if link is owned by manageability, FW will return LIBIE_AQ_RC_EMODE. 3835 * this is not a fatal error, so print a warning message and return 3836 * a success code. Return an error if FW returns an error code other 3837 * than LIBIE_AQ_RC_EMODE 3838 */ 3839 if (status == -EIO) { 3840 if (hw->adminq.sq_last_status == LIBIE_AQ_RC_EMODE) 3841 dev_dbg(dev, "can't set link to %s, err %d aq_err %s. not fatal, continuing\n", 3842 (ena ? "ON" : "OFF"), status, 3843 libie_aq_str(hw->adminq.sq_last_status)); 3844 } else if (status) { 3845 dev_err(dev, "can't set link to %s, err %d aq_err %s\n", 3846 (ena ? "ON" : "OFF"), status, 3847 libie_aq_str(hw->adminq.sq_last_status)); 3848 return status; 3849 } 3850 3851 return 0; 3852 } 3853 3854 /** 3855 * ice_vsi_add_vlan_zero - add VLAN 0 filter(s) for this VSI 3856 * @vsi: VSI used to add VLAN filters 3857 * 3858 * In Single VLAN Mode (SVM), single VLAN filters via ICE_SW_LKUP_VLAN are based 3859 * on the inner VLAN ID, so the VLAN TPID (i.e. 0x8100 or 0x888a8) doesn't 3860 * matter. In Double VLAN Mode (DVM), outer/single VLAN filters via 3861 * ICE_SW_LKUP_VLAN are based on the outer/single VLAN ID + VLAN TPID. 3862 * 3863 * For both modes add a VLAN 0 + no VLAN TPID filter to handle untagged traffic 3864 * when VLAN pruning is enabled. Also, this handles VLAN 0 priority tagged 3865 * traffic in SVM, since the VLAN TPID isn't part of filtering. 3866 * 3867 * If DVM is enabled then an explicit VLAN 0 + VLAN TPID filter needs to be 3868 * added to allow VLAN 0 priority tagged traffic in DVM, since the VLAN TPID is 3869 * part of filtering. 3870 */ 3871 int ice_vsi_add_vlan_zero(struct ice_vsi *vsi) 3872 { 3873 struct ice_vsi_vlan_ops *vlan_ops = ice_get_compat_vsi_vlan_ops(vsi); 3874 struct ice_vlan vlan; 3875 int err; 3876 3877 vlan = ICE_VLAN(0, 0, 0); 3878 err = vlan_ops->add_vlan(vsi, &vlan); 3879 if (err && err != -EEXIST) 3880 return err; 3881 3882 /* in SVM both VLAN 0 filters are identical */ 3883 if (!ice_is_dvm_ena(&vsi->back->hw)) 3884 return 0; 3885 3886 vlan = ICE_VLAN(ETH_P_8021Q, 0, 0); 3887 err = vlan_ops->add_vlan(vsi, &vlan); 3888 if (err && err != -EEXIST) 3889 return err; 3890 3891 return 0; 3892 } 3893 3894 /** 3895 * ice_vsi_del_vlan_zero - delete VLAN 0 filter(s) for this VSI 3896 * @vsi: VSI used to add VLAN filters 3897 * 3898 * Delete the VLAN 0 filters in the same manner that they were added in 3899 * ice_vsi_add_vlan_zero. 3900 */ 3901 int ice_vsi_del_vlan_zero(struct ice_vsi *vsi) 3902 { 3903 struct ice_vsi_vlan_ops *vlan_ops = ice_get_compat_vsi_vlan_ops(vsi); 3904 struct ice_pf *pf = vsi->back; 3905 struct ice_vlan vlan; 3906 int err; 3907 3908 if (pf->lag && pf->lag->primary) { 3909 dev_dbg(ice_pf_to_dev(pf), "Interface is primary in aggregate - not deleting prune list\n"); 3910 } else { 3911 vlan = ICE_VLAN(0, 0, 0); 3912 err = vlan_ops->del_vlan(vsi, &vlan); 3913 if (err && err != -EEXIST) 3914 return err; 3915 } 3916 3917 /* in SVM both VLAN 0 filters are identical */ 3918 if (!ice_is_dvm_ena(&vsi->back->hw)) 3919 return 0; 3920 3921 if (pf->lag && pf->lag->primary) { 3922 dev_dbg(ice_pf_to_dev(pf), "Interface is primary in aggregate - not deleting QinQ prune list\n"); 3923 } else { 3924 vlan = ICE_VLAN(ETH_P_8021Q, 0, 0); 3925 err = vlan_ops->del_vlan(vsi, &vlan); 3926 if (err && err != -EEXIST) 3927 return err; 3928 } 3929 3930 /* when deleting the last VLAN filter, make sure to disable the VLAN 3931 * promisc mode so the filter isn't left by accident 3932 */ 3933 return ice_clear_vsi_promisc(&vsi->back->hw, vsi->idx, 3934 ICE_MCAST_VLAN_PROMISC_BITS, 0); 3935 } 3936 3937 /** 3938 * ice_vsi_num_zero_vlans - get number of VLAN 0 filters based on VLAN mode 3939 * @vsi: VSI used to get the VLAN mode 3940 * 3941 * If DVM is enabled then 2 VLAN 0 filters are added, else if SVM is enabled 3942 * then 1 VLAN 0 filter is added. See ice_vsi_add_vlan_zero for more details. 3943 */ 3944 static u16 ice_vsi_num_zero_vlans(struct ice_vsi *vsi) 3945 { 3946 #define ICE_DVM_NUM_ZERO_VLAN_FLTRS 2 3947 #define ICE_SVM_NUM_ZERO_VLAN_FLTRS 1 3948 /* no VLAN 0 filter is created when a port VLAN is active */ 3949 if (vsi->type == ICE_VSI_VF) { 3950 if (WARN_ON(!vsi->vf)) 3951 return 0; 3952 3953 if (ice_vf_is_port_vlan_ena(vsi->vf)) 3954 return 0; 3955 } 3956 3957 if (ice_is_dvm_ena(&vsi->back->hw)) 3958 return ICE_DVM_NUM_ZERO_VLAN_FLTRS; 3959 else 3960 return ICE_SVM_NUM_ZERO_VLAN_FLTRS; 3961 } 3962 3963 /** 3964 * ice_vsi_has_non_zero_vlans - check if VSI has any non-zero VLANs 3965 * @vsi: VSI used to determine if any non-zero VLANs have been added 3966 */ 3967 bool ice_vsi_has_non_zero_vlans(struct ice_vsi *vsi) 3968 { 3969 return (vsi->num_vlan > ice_vsi_num_zero_vlans(vsi)); 3970 } 3971 3972 /** 3973 * ice_vsi_num_non_zero_vlans - get the number of non-zero VLANs for this VSI 3974 * @vsi: VSI used to get the number of non-zero VLANs added 3975 */ 3976 u16 ice_vsi_num_non_zero_vlans(struct ice_vsi *vsi) 3977 { 3978 return (vsi->num_vlan - ice_vsi_num_zero_vlans(vsi)); 3979 } 3980 3981 /** 3982 * ice_is_feature_supported 3983 * @pf: pointer to the struct ice_pf instance 3984 * @f: feature enum to be checked 3985 * 3986 * returns true if feature is supported, false otherwise 3987 */ 3988 bool ice_is_feature_supported(struct ice_pf *pf, enum ice_feature f) 3989 { 3990 if (f < 0 || f >= ICE_F_MAX) 3991 return false; 3992 3993 return test_bit(f, pf->features); 3994 } 3995 3996 /** 3997 * ice_set_feature_support 3998 * @pf: pointer to the struct ice_pf instance 3999 * @f: feature enum to set 4000 */ 4001 void ice_set_feature_support(struct ice_pf *pf, enum ice_feature f) 4002 { 4003 if (f < 0 || f >= ICE_F_MAX) 4004 return; 4005 4006 set_bit(f, pf->features); 4007 } 4008 4009 /** 4010 * ice_clear_feature_support 4011 * @pf: pointer to the struct ice_pf instance 4012 * @f: feature enum to clear 4013 */ 4014 void ice_clear_feature_support(struct ice_pf *pf, enum ice_feature f) 4015 { 4016 if (f < 0 || f >= ICE_F_MAX) 4017 return; 4018 4019 clear_bit(f, pf->features); 4020 } 4021 4022 /** 4023 * ice_init_feature_support 4024 * @pf: pointer to the struct ice_pf instance 4025 * 4026 * called during init to setup supported feature 4027 */ 4028 void ice_init_feature_support(struct ice_pf *pf) 4029 { 4030 switch (pf->hw.device_id) { 4031 case ICE_DEV_ID_E810C_BACKPLANE: 4032 case ICE_DEV_ID_E810C_QSFP: 4033 case ICE_DEV_ID_E810C_SFP: 4034 case ICE_DEV_ID_E810_XXV_BACKPLANE: 4035 case ICE_DEV_ID_E810_XXV_QSFP: 4036 case ICE_DEV_ID_E810_XXV_SFP: 4037 ice_set_feature_support(pf, ICE_F_DSCP); 4038 if (ice_is_phy_rclk_in_netlist(&pf->hw)) 4039 ice_set_feature_support(pf, ICE_F_PHY_RCLK); 4040 /* If we don't own the timer - don't enable other caps */ 4041 if (!ice_pf_src_tmr_owned(pf)) 4042 break; 4043 if (ice_is_cgu_in_netlist(&pf->hw)) 4044 ice_set_feature_support(pf, ICE_F_CGU); 4045 if (ice_is_clock_mux_in_netlist(&pf->hw)) 4046 ice_set_feature_support(pf, ICE_F_SMA_CTRL); 4047 if (ice_gnss_is_module_present(&pf->hw)) 4048 ice_set_feature_support(pf, ICE_F_GNSS); 4049 break; 4050 default: 4051 break; 4052 } 4053 4054 if (pf->hw.mac_type == ICE_MAC_GENERIC_3K_E825) 4055 ice_set_feature_support(pf, ICE_F_PHY_RCLK); 4056 4057 if (pf->hw.mac_type == ICE_MAC_E830) { 4058 ice_set_feature_support(pf, ICE_F_MBX_LIMIT); 4059 ice_set_feature_support(pf, ICE_F_GCS); 4060 ice_set_feature_support(pf, ICE_F_TXTIME); 4061 } 4062 } 4063 4064 /** 4065 * ice_vsi_update_security - update security block in VSI 4066 * @vsi: pointer to VSI structure 4067 * @fill: function pointer to fill ctx 4068 */ 4069 int 4070 ice_vsi_update_security(struct ice_vsi *vsi, void (*fill)(struct ice_vsi_ctx *)) 4071 { 4072 struct ice_vsi_ctx ctx = { 0 }; 4073 4074 ctx.info = vsi->info; 4075 ctx.info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_SECURITY_VALID); 4076 fill(&ctx); 4077 4078 if (ice_update_vsi(&vsi->back->hw, vsi->idx, &ctx, NULL)) 4079 return -ENODEV; 4080 4081 vsi->info = ctx.info; 4082 return 0; 4083 } 4084 4085 /** 4086 * ice_vsi_ctx_set_antispoof - set antispoof function in VSI ctx 4087 * @ctx: pointer to VSI ctx structure 4088 */ 4089 void ice_vsi_ctx_set_antispoof(struct ice_vsi_ctx *ctx) 4090 { 4091 ctx->info.sec_flags |= ICE_AQ_VSI_SEC_FLAG_ENA_MAC_ANTI_SPOOF | 4092 (ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA << 4093 ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S); 4094 } 4095 4096 /** 4097 * ice_vsi_ctx_clear_antispoof - clear antispoof function in VSI ctx 4098 * @ctx: pointer to VSI ctx structure 4099 */ 4100 void ice_vsi_ctx_clear_antispoof(struct ice_vsi_ctx *ctx) 4101 { 4102 ctx->info.sec_flags &= ~ICE_AQ_VSI_SEC_FLAG_ENA_MAC_ANTI_SPOOF & 4103 ~(ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA << 4104 ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S); 4105 } 4106 4107 /** 4108 * ice_vsi_update_local_lb - update sw block in VSI with local loopback bit 4109 * @vsi: pointer to VSI structure 4110 * @set: set or unset the bit 4111 */ 4112 int 4113 ice_vsi_update_local_lb(struct ice_vsi *vsi, bool set) 4114 { 4115 struct ice_vsi_ctx ctx = { 4116 .info = vsi->info, 4117 }; 4118 4119 ctx.info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_SW_VALID); 4120 if (set) 4121 ctx.info.sw_flags |= ICE_AQ_VSI_SW_FLAG_LOCAL_LB; 4122 else 4123 ctx.info.sw_flags &= ~ICE_AQ_VSI_SW_FLAG_LOCAL_LB; 4124 4125 if (ice_update_vsi(&vsi->back->hw, vsi->idx, &ctx, NULL)) 4126 return -ENODEV; 4127 4128 vsi->info = ctx.info; 4129 return 0; 4130 } 4131 4132 /** 4133 * ice_vsi_update_l2tsel - update l2tsel field for all Rx rings on this VSI 4134 * @vsi: VSI used to update l2tsel on 4135 * @l2tsel: l2tsel setting requested 4136 * 4137 * Use the l2tsel setting to update all of the Rx queue context bits for l2tsel. 4138 * This will modify which descriptor field the first offloaded VLAN will be 4139 * stripped into. 4140 */ 4141 void ice_vsi_update_l2tsel(struct ice_vsi *vsi, enum ice_l2tsel l2tsel) 4142 { 4143 struct ice_hw *hw = &vsi->back->hw; 4144 u32 l2tsel_bit; 4145 int i; 4146 4147 if (l2tsel == ICE_L2TSEL_EXTRACT_FIRST_TAG_L2TAG2_2ND) 4148 l2tsel_bit = 0; 4149 else 4150 l2tsel_bit = BIT(ICE_L2TSEL_BIT_OFFSET); 4151 4152 for (i = 0; i < vsi->alloc_rxq; i++) { 4153 u16 pfq = vsi->rxq_map[i]; 4154 u32 qrx_context_offset; 4155 u32 regval; 4156 4157 qrx_context_offset = 4158 QRX_CONTEXT(ICE_L2TSEL_QRX_CONTEXT_REG_IDX, pfq); 4159 4160 regval = rd32(hw, qrx_context_offset); 4161 regval &= ~BIT(ICE_L2TSEL_BIT_OFFSET); 4162 regval |= l2tsel_bit; 4163 wr32(hw, qrx_context_offset, regval); 4164 } 4165 } 4166