1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright (c) 2018, Intel Corporation. */ 3 4 #include "ice.h" 5 #include "ice_base.h" 6 #include "ice_flow.h" 7 #include "ice_lib.h" 8 #include "ice_fltr.h" 9 #include "ice_dcb_lib.h" 10 #include "ice_type.h" 11 #include "ice_vsi_vlan_ops.h" 12 13 /** 14 * ice_vsi_type_str - maps VSI type enum to string equivalents 15 * @vsi_type: VSI type enum 16 */ 17 const char *ice_vsi_type_str(enum ice_vsi_type vsi_type) 18 { 19 switch (vsi_type) { 20 case ICE_VSI_PF: 21 return "ICE_VSI_PF"; 22 case ICE_VSI_VF: 23 return "ICE_VSI_VF"; 24 case ICE_VSI_SF: 25 return "ICE_VSI_SF"; 26 case ICE_VSI_CTRL: 27 return "ICE_VSI_CTRL"; 28 case ICE_VSI_CHNL: 29 return "ICE_VSI_CHNL"; 30 case ICE_VSI_LB: 31 return "ICE_VSI_LB"; 32 default: 33 return "unknown"; 34 } 35 } 36 37 /** 38 * ice_vsi_ctrl_all_rx_rings - Start or stop a VSI's Rx rings 39 * @vsi: the VSI being configured 40 * @ena: start or stop the Rx rings 41 * 42 * First enable/disable all of the Rx rings, flush any remaining writes, and 43 * then verify that they have all been enabled/disabled successfully. This will 44 * let all of the register writes complete when enabling/disabling the Rx rings 45 * before waiting for the change in hardware to complete. 46 */ 47 static int ice_vsi_ctrl_all_rx_rings(struct ice_vsi *vsi, bool ena) 48 { 49 int ret = 0; 50 u16 i; 51 52 ice_for_each_rxq(vsi, i) 53 ice_vsi_ctrl_one_rx_ring(vsi, ena, i, false); 54 55 ice_flush(&vsi->back->hw); 56 57 ice_for_each_rxq(vsi, i) { 58 ret = ice_vsi_wait_one_rx_ring(vsi, ena, i); 59 if (ret) 60 break; 61 } 62 63 return ret; 64 } 65 66 /** 67 * ice_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the VSI 68 * @vsi: VSI pointer 69 * 70 * On error: returns error code (negative) 71 * On success: returns 0 72 */ 73 static int ice_vsi_alloc_arrays(struct ice_vsi *vsi) 74 { 75 struct ice_pf *pf = vsi->back; 76 struct device *dev; 77 78 dev = ice_pf_to_dev(pf); 79 if (vsi->type == ICE_VSI_CHNL) 80 return 0; 81 82 /* allocate memory for both Tx and Rx ring pointers */ 83 vsi->tx_rings = devm_kcalloc(dev, vsi->alloc_txq, 84 sizeof(*vsi->tx_rings), GFP_KERNEL); 85 if (!vsi->tx_rings) 86 return -ENOMEM; 87 88 vsi->rx_rings = devm_kcalloc(dev, vsi->alloc_rxq, 89 sizeof(*vsi->rx_rings), GFP_KERNEL); 90 if (!vsi->rx_rings) 91 goto err_rings; 92 93 /* txq_map needs to have enough space to track both Tx (stack) rings 94 * and XDP rings; at this point vsi->num_xdp_txq might not be set, 95 * so use num_possible_cpus() as we want to always provide XDP ring 96 * per CPU, regardless of queue count settings from user that might 97 * have come from ethtool's set_channels() callback; 98 */ 99 vsi->txq_map = devm_kcalloc(dev, (vsi->alloc_txq + num_possible_cpus()), 100 sizeof(*vsi->txq_map), GFP_KERNEL); 101 102 if (!vsi->txq_map) 103 goto err_txq_map; 104 105 vsi->rxq_map = devm_kcalloc(dev, vsi->alloc_rxq, 106 sizeof(*vsi->rxq_map), GFP_KERNEL); 107 if (!vsi->rxq_map) 108 goto err_rxq_map; 109 110 /* There is no need to allocate q_vectors for a loopback VSI. */ 111 if (vsi->type == ICE_VSI_LB) 112 return 0; 113 114 /* allocate memory for q_vector pointers */ 115 vsi->q_vectors = devm_kcalloc(dev, vsi->num_q_vectors, 116 sizeof(*vsi->q_vectors), GFP_KERNEL); 117 if (!vsi->q_vectors) 118 goto err_vectors; 119 120 return 0; 121 122 err_vectors: 123 devm_kfree(dev, vsi->rxq_map); 124 err_rxq_map: 125 devm_kfree(dev, vsi->txq_map); 126 err_txq_map: 127 devm_kfree(dev, vsi->rx_rings); 128 err_rings: 129 devm_kfree(dev, vsi->tx_rings); 130 return -ENOMEM; 131 } 132 133 /** 134 * ice_vsi_set_num_desc - Set number of descriptors for queues on this VSI 135 * @vsi: the VSI being configured 136 */ 137 static void ice_vsi_set_num_desc(struct ice_vsi *vsi) 138 { 139 switch (vsi->type) { 140 case ICE_VSI_PF: 141 case ICE_VSI_SF: 142 case ICE_VSI_CTRL: 143 case ICE_VSI_LB: 144 /* a user could change the values of num_[tr]x_desc using 145 * ethtool -G so we should keep those values instead of 146 * overwriting them with the defaults. 147 */ 148 if (!vsi->num_rx_desc) 149 vsi->num_rx_desc = ICE_DFLT_NUM_RX_DESC; 150 if (!vsi->num_tx_desc) 151 vsi->num_tx_desc = ICE_DFLT_NUM_TX_DESC; 152 break; 153 default: 154 dev_dbg(ice_pf_to_dev(vsi->back), "Not setting number of Tx/Rx descriptors for VSI type %d\n", 155 vsi->type); 156 break; 157 } 158 } 159 160 static u16 ice_get_rxq_count(struct ice_pf *pf) 161 { 162 return min(ice_get_avail_rxq_count(pf), num_online_cpus()); 163 } 164 165 static u16 ice_get_txq_count(struct ice_pf *pf) 166 { 167 return min(ice_get_avail_txq_count(pf), num_online_cpus()); 168 } 169 170 /** 171 * ice_vsi_set_num_qs - Set number of queues, descriptors and vectors for a VSI 172 * @vsi: the VSI being configured 173 * 174 * Return 0 on success and a negative value on error 175 */ 176 static void ice_vsi_set_num_qs(struct ice_vsi *vsi) 177 { 178 enum ice_vsi_type vsi_type = vsi->type; 179 struct ice_pf *pf = vsi->back; 180 struct ice_vf *vf = vsi->vf; 181 182 if (WARN_ON(vsi_type == ICE_VSI_VF && !vf)) 183 return; 184 185 switch (vsi_type) { 186 case ICE_VSI_PF: 187 if (vsi->req_txq) { 188 vsi->alloc_txq = vsi->req_txq; 189 vsi->num_txq = vsi->req_txq; 190 } else { 191 vsi->alloc_txq = ice_get_txq_count(pf); 192 } 193 194 pf->num_lan_tx = vsi->alloc_txq; 195 196 /* only 1 Rx queue unless RSS is enabled */ 197 if (!test_bit(ICE_FLAG_RSS_ENA, pf->flags)) { 198 vsi->alloc_rxq = 1; 199 } else { 200 if (vsi->req_rxq) { 201 vsi->alloc_rxq = vsi->req_rxq; 202 vsi->num_rxq = vsi->req_rxq; 203 } else { 204 vsi->alloc_rxq = ice_get_rxq_count(pf); 205 } 206 } 207 208 pf->num_lan_rx = vsi->alloc_rxq; 209 210 vsi->num_q_vectors = max(vsi->alloc_rxq, vsi->alloc_txq); 211 break; 212 case ICE_VSI_SF: 213 vsi->alloc_txq = 1; 214 vsi->alloc_rxq = 1; 215 vsi->num_q_vectors = 1; 216 vsi->irq_dyn_alloc = true; 217 break; 218 case ICE_VSI_VF: 219 if (vf->num_req_qs) 220 vf->num_vf_qs = vf->num_req_qs; 221 vsi->alloc_txq = vf->num_vf_qs; 222 vsi->alloc_rxq = vf->num_vf_qs; 223 /* pf->vfs.num_msix_per includes (VF miscellaneous vector + 224 * data queue interrupts). Since vsi->num_q_vectors is number 225 * of queues vectors, subtract 1 (ICE_NONQ_VECS_VF) from the 226 * original vector count 227 */ 228 vsi->num_q_vectors = vf->num_msix - ICE_NONQ_VECS_VF; 229 break; 230 case ICE_VSI_CTRL: 231 vsi->alloc_txq = 1; 232 vsi->alloc_rxq = 1; 233 vsi->num_q_vectors = 1; 234 break; 235 case ICE_VSI_CHNL: 236 vsi->alloc_txq = 0; 237 vsi->alloc_rxq = 0; 238 break; 239 case ICE_VSI_LB: 240 vsi->alloc_txq = 1; 241 vsi->alloc_rxq = 1; 242 break; 243 default: 244 dev_warn(ice_pf_to_dev(pf), "Unknown VSI type %d\n", vsi_type); 245 break; 246 } 247 248 ice_vsi_set_num_desc(vsi); 249 } 250 251 /** 252 * ice_get_free_slot - get the next non-NULL location index in array 253 * @array: array to search 254 * @size: size of the array 255 * @curr: last known occupied index to be used as a search hint 256 * 257 * void * is being used to keep the functionality generic. This lets us use this 258 * function on any array of pointers. 259 */ 260 static int ice_get_free_slot(void *array, int size, int curr) 261 { 262 int **tmp_array = (int **)array; 263 int next; 264 265 if (curr < (size - 1) && !tmp_array[curr + 1]) { 266 next = curr + 1; 267 } else { 268 int i = 0; 269 270 while ((i < size) && (tmp_array[i])) 271 i++; 272 if (i == size) 273 next = ICE_NO_VSI; 274 else 275 next = i; 276 } 277 return next; 278 } 279 280 /** 281 * ice_vsi_delete_from_hw - delete a VSI from the switch 282 * @vsi: pointer to VSI being removed 283 */ 284 static void ice_vsi_delete_from_hw(struct ice_vsi *vsi) 285 { 286 struct ice_pf *pf = vsi->back; 287 struct ice_vsi_ctx *ctxt; 288 int status; 289 290 ice_fltr_remove_all(vsi); 291 ctxt = kzalloc(sizeof(*ctxt), GFP_KERNEL); 292 if (!ctxt) 293 return; 294 295 if (vsi->type == ICE_VSI_VF) 296 ctxt->vf_num = vsi->vf->vf_id; 297 ctxt->vsi_num = vsi->vsi_num; 298 299 memcpy(&ctxt->info, &vsi->info, sizeof(ctxt->info)); 300 301 status = ice_free_vsi(&pf->hw, vsi->idx, ctxt, false, NULL); 302 if (status) 303 dev_err(ice_pf_to_dev(pf), "Failed to delete VSI %i in FW - error: %d\n", 304 vsi->vsi_num, status); 305 306 kfree(ctxt); 307 } 308 309 /** 310 * ice_vsi_free_arrays - De-allocate queue and vector pointer arrays for the VSI 311 * @vsi: pointer to VSI being cleared 312 */ 313 static void ice_vsi_free_arrays(struct ice_vsi *vsi) 314 { 315 struct ice_pf *pf = vsi->back; 316 struct device *dev; 317 318 dev = ice_pf_to_dev(pf); 319 320 /* free the ring and vector containers */ 321 devm_kfree(dev, vsi->q_vectors); 322 vsi->q_vectors = NULL; 323 devm_kfree(dev, vsi->tx_rings); 324 vsi->tx_rings = NULL; 325 devm_kfree(dev, vsi->rx_rings); 326 vsi->rx_rings = NULL; 327 devm_kfree(dev, vsi->txq_map); 328 vsi->txq_map = NULL; 329 devm_kfree(dev, vsi->rxq_map); 330 vsi->rxq_map = NULL; 331 } 332 333 /** 334 * ice_vsi_free_stats - Free the ring statistics structures 335 * @vsi: VSI pointer 336 */ 337 static void ice_vsi_free_stats(struct ice_vsi *vsi) 338 { 339 struct ice_vsi_stats *vsi_stat; 340 struct ice_pf *pf = vsi->back; 341 int i; 342 343 if (vsi->type == ICE_VSI_CHNL) 344 return; 345 if (!pf->vsi_stats) 346 return; 347 348 vsi_stat = pf->vsi_stats[vsi->idx]; 349 if (!vsi_stat) 350 return; 351 352 ice_for_each_alloc_txq(vsi, i) { 353 if (vsi_stat->tx_ring_stats[i]) { 354 kfree_rcu(vsi_stat->tx_ring_stats[i], rcu); 355 WRITE_ONCE(vsi_stat->tx_ring_stats[i], NULL); 356 } 357 } 358 359 ice_for_each_alloc_rxq(vsi, i) { 360 if (vsi_stat->rx_ring_stats[i]) { 361 kfree_rcu(vsi_stat->rx_ring_stats[i], rcu); 362 WRITE_ONCE(vsi_stat->rx_ring_stats[i], NULL); 363 } 364 } 365 366 kfree(vsi_stat->tx_ring_stats); 367 kfree(vsi_stat->rx_ring_stats); 368 kfree(vsi_stat); 369 pf->vsi_stats[vsi->idx] = NULL; 370 } 371 372 /** 373 * ice_vsi_alloc_ring_stats - Allocates Tx and Rx ring stats for the VSI 374 * @vsi: VSI which is having stats allocated 375 */ 376 static int ice_vsi_alloc_ring_stats(struct ice_vsi *vsi) 377 { 378 struct ice_ring_stats **tx_ring_stats; 379 struct ice_ring_stats **rx_ring_stats; 380 struct ice_vsi_stats *vsi_stats; 381 struct ice_pf *pf = vsi->back; 382 u16 i; 383 384 vsi_stats = pf->vsi_stats[vsi->idx]; 385 tx_ring_stats = vsi_stats->tx_ring_stats; 386 rx_ring_stats = vsi_stats->rx_ring_stats; 387 388 /* Allocate Tx ring stats */ 389 ice_for_each_alloc_txq(vsi, i) { 390 struct ice_ring_stats *ring_stats; 391 struct ice_tx_ring *ring; 392 393 ring = vsi->tx_rings[i]; 394 ring_stats = tx_ring_stats[i]; 395 396 if (!ring_stats) { 397 ring_stats = kzalloc(sizeof(*ring_stats), GFP_KERNEL); 398 if (!ring_stats) 399 goto err_out; 400 401 WRITE_ONCE(tx_ring_stats[i], ring_stats); 402 } 403 404 ring->ring_stats = ring_stats; 405 } 406 407 /* Allocate Rx ring stats */ 408 ice_for_each_alloc_rxq(vsi, i) { 409 struct ice_ring_stats *ring_stats; 410 struct ice_rx_ring *ring; 411 412 ring = vsi->rx_rings[i]; 413 ring_stats = rx_ring_stats[i]; 414 415 if (!ring_stats) { 416 ring_stats = kzalloc(sizeof(*ring_stats), GFP_KERNEL); 417 if (!ring_stats) 418 goto err_out; 419 420 WRITE_ONCE(rx_ring_stats[i], ring_stats); 421 } 422 423 ring->ring_stats = ring_stats; 424 } 425 426 return 0; 427 428 err_out: 429 ice_vsi_free_stats(vsi); 430 return -ENOMEM; 431 } 432 433 /** 434 * ice_vsi_free - clean up and deallocate the provided VSI 435 * @vsi: pointer to VSI being cleared 436 * 437 * This deallocates the VSI's queue resources, removes it from the PF's 438 * VSI array if necessary, and deallocates the VSI 439 */ 440 void ice_vsi_free(struct ice_vsi *vsi) 441 { 442 struct ice_pf *pf = NULL; 443 struct device *dev; 444 445 if (!vsi || !vsi->back) 446 return; 447 448 pf = vsi->back; 449 dev = ice_pf_to_dev(pf); 450 451 if (!pf->vsi[vsi->idx] || pf->vsi[vsi->idx] != vsi) { 452 dev_dbg(dev, "vsi does not exist at pf->vsi[%d]\n", vsi->idx); 453 return; 454 } 455 456 mutex_lock(&pf->sw_mutex); 457 /* updates the PF for this cleared VSI */ 458 459 pf->vsi[vsi->idx] = NULL; 460 pf->next_vsi = vsi->idx; 461 462 ice_vsi_free_stats(vsi); 463 ice_vsi_free_arrays(vsi); 464 mutex_destroy(&vsi->xdp_state_lock); 465 mutex_unlock(&pf->sw_mutex); 466 devm_kfree(dev, vsi); 467 } 468 469 void ice_vsi_delete(struct ice_vsi *vsi) 470 { 471 ice_vsi_delete_from_hw(vsi); 472 ice_vsi_free(vsi); 473 } 474 475 /** 476 * ice_msix_clean_ctrl_vsi - MSIX mode interrupt handler for ctrl VSI 477 * @irq: interrupt number 478 * @data: pointer to a q_vector 479 */ 480 static irqreturn_t ice_msix_clean_ctrl_vsi(int __always_unused irq, void *data) 481 { 482 struct ice_q_vector *q_vector = (struct ice_q_vector *)data; 483 484 if (!q_vector->tx.tx_ring) 485 return IRQ_HANDLED; 486 487 #define FDIR_RX_DESC_CLEAN_BUDGET 64 488 ice_clean_rx_irq(q_vector->rx.rx_ring, FDIR_RX_DESC_CLEAN_BUDGET); 489 ice_clean_ctrl_tx_irq(q_vector->tx.tx_ring); 490 491 return IRQ_HANDLED; 492 } 493 494 /** 495 * ice_msix_clean_rings - MSIX mode Interrupt Handler 496 * @irq: interrupt number 497 * @data: pointer to a q_vector 498 */ 499 static irqreturn_t ice_msix_clean_rings(int __always_unused irq, void *data) 500 { 501 struct ice_q_vector *q_vector = (struct ice_q_vector *)data; 502 503 if (!q_vector->tx.tx_ring && !q_vector->rx.rx_ring) 504 return IRQ_HANDLED; 505 506 q_vector->total_events++; 507 508 napi_schedule(&q_vector->napi); 509 510 return IRQ_HANDLED; 511 } 512 513 /** 514 * ice_vsi_alloc_stat_arrays - Allocate statistics arrays 515 * @vsi: VSI pointer 516 */ 517 static int ice_vsi_alloc_stat_arrays(struct ice_vsi *vsi) 518 { 519 struct ice_vsi_stats *vsi_stat; 520 struct ice_pf *pf = vsi->back; 521 522 if (vsi->type == ICE_VSI_CHNL) 523 return 0; 524 if (!pf->vsi_stats) 525 return -ENOENT; 526 527 if (pf->vsi_stats[vsi->idx]) 528 /* realloc will happen in rebuild path */ 529 return 0; 530 531 vsi_stat = kzalloc(sizeof(*vsi_stat), GFP_KERNEL); 532 if (!vsi_stat) 533 return -ENOMEM; 534 535 vsi_stat->tx_ring_stats = 536 kcalloc(vsi->alloc_txq, sizeof(*vsi_stat->tx_ring_stats), 537 GFP_KERNEL); 538 if (!vsi_stat->tx_ring_stats) 539 goto err_alloc_tx; 540 541 vsi_stat->rx_ring_stats = 542 kcalloc(vsi->alloc_rxq, sizeof(*vsi_stat->rx_ring_stats), 543 GFP_KERNEL); 544 if (!vsi_stat->rx_ring_stats) 545 goto err_alloc_rx; 546 547 pf->vsi_stats[vsi->idx] = vsi_stat; 548 549 return 0; 550 551 err_alloc_rx: 552 kfree(vsi_stat->rx_ring_stats); 553 err_alloc_tx: 554 kfree(vsi_stat->tx_ring_stats); 555 kfree(vsi_stat); 556 pf->vsi_stats[vsi->idx] = NULL; 557 return -ENOMEM; 558 } 559 560 /** 561 * ice_vsi_alloc_def - set default values for already allocated VSI 562 * @vsi: ptr to VSI 563 * @ch: ptr to channel 564 */ 565 static int 566 ice_vsi_alloc_def(struct ice_vsi *vsi, struct ice_channel *ch) 567 { 568 if (vsi->type != ICE_VSI_CHNL) { 569 ice_vsi_set_num_qs(vsi); 570 if (ice_vsi_alloc_arrays(vsi)) 571 return -ENOMEM; 572 } 573 574 vsi->irq_dyn_alloc = pci_msix_can_alloc_dyn(vsi->back->pdev); 575 576 switch (vsi->type) { 577 case ICE_VSI_PF: 578 case ICE_VSI_SF: 579 /* Setup default MSIX irq handler for VSI */ 580 vsi->irq_handler = ice_msix_clean_rings; 581 break; 582 case ICE_VSI_CTRL: 583 /* Setup ctrl VSI MSIX irq handler */ 584 vsi->irq_handler = ice_msix_clean_ctrl_vsi; 585 break; 586 case ICE_VSI_CHNL: 587 if (!ch) 588 return -EINVAL; 589 590 vsi->num_rxq = ch->num_rxq; 591 vsi->num_txq = ch->num_txq; 592 vsi->next_base_q = ch->base_q; 593 break; 594 case ICE_VSI_VF: 595 case ICE_VSI_LB: 596 break; 597 default: 598 ice_vsi_free_arrays(vsi); 599 return -EINVAL; 600 } 601 602 return 0; 603 } 604 605 /** 606 * ice_vsi_alloc - Allocates the next available struct VSI in the PF 607 * @pf: board private structure 608 * 609 * Reserves a VSI index from the PF and allocates an empty VSI structure 610 * without a type. The VSI structure must later be initialized by calling 611 * ice_vsi_cfg(). 612 * 613 * returns a pointer to a VSI on success, NULL on failure. 614 */ 615 struct ice_vsi *ice_vsi_alloc(struct ice_pf *pf) 616 { 617 struct device *dev = ice_pf_to_dev(pf); 618 struct ice_vsi *vsi = NULL; 619 620 /* Need to protect the allocation of the VSIs at the PF level */ 621 mutex_lock(&pf->sw_mutex); 622 623 /* If we have already allocated our maximum number of VSIs, 624 * pf->next_vsi will be ICE_NO_VSI. If not, pf->next_vsi index 625 * is available to be populated 626 */ 627 if (pf->next_vsi == ICE_NO_VSI) { 628 dev_dbg(dev, "out of VSI slots!\n"); 629 goto unlock_pf; 630 } 631 632 vsi = devm_kzalloc(dev, sizeof(*vsi), GFP_KERNEL); 633 if (!vsi) 634 goto unlock_pf; 635 636 vsi->back = pf; 637 set_bit(ICE_VSI_DOWN, vsi->state); 638 639 /* fill slot and make note of the index */ 640 vsi->idx = pf->next_vsi; 641 pf->vsi[pf->next_vsi] = vsi; 642 643 /* prepare pf->next_vsi for next use */ 644 pf->next_vsi = ice_get_free_slot(pf->vsi, pf->num_alloc_vsi, 645 pf->next_vsi); 646 647 mutex_init(&vsi->xdp_state_lock); 648 649 unlock_pf: 650 mutex_unlock(&pf->sw_mutex); 651 return vsi; 652 } 653 654 /** 655 * ice_alloc_fd_res - Allocate FD resource for a VSI 656 * @vsi: pointer to the ice_vsi 657 * 658 * This allocates the FD resources 659 * 660 * Returns 0 on success, -EPERM on no-op or -EIO on failure 661 */ 662 static int ice_alloc_fd_res(struct ice_vsi *vsi) 663 { 664 struct ice_pf *pf = vsi->back; 665 u32 g_val, b_val; 666 667 /* Flow Director filters are only allocated/assigned to the PF VSI or 668 * CHNL VSI which passes the traffic. The CTRL VSI is only used to 669 * add/delete filters so resources are not allocated to it 670 */ 671 if (!test_bit(ICE_FLAG_FD_ENA, pf->flags)) 672 return -EPERM; 673 674 if (!(vsi->type == ICE_VSI_PF || vsi->type == ICE_VSI_VF || 675 vsi->type == ICE_VSI_CHNL)) 676 return -EPERM; 677 678 /* FD filters from guaranteed pool per VSI */ 679 g_val = pf->hw.func_caps.fd_fltr_guar; 680 if (!g_val) 681 return -EPERM; 682 683 /* FD filters from best effort pool */ 684 b_val = pf->hw.func_caps.fd_fltr_best_effort; 685 if (!b_val) 686 return -EPERM; 687 688 /* PF main VSI gets only 64 FD resources from guaranteed pool 689 * when ADQ is configured. 690 */ 691 #define ICE_PF_VSI_GFLTR 64 692 693 /* determine FD filter resources per VSI from shared(best effort) and 694 * dedicated pool 695 */ 696 if (vsi->type == ICE_VSI_PF) { 697 vsi->num_gfltr = g_val; 698 /* if MQPRIO is configured, main VSI doesn't get all FD 699 * resources from guaranteed pool. PF VSI gets 64 FD resources 700 */ 701 if (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) { 702 if (g_val < ICE_PF_VSI_GFLTR) 703 return -EPERM; 704 /* allow bare minimum entries for PF VSI */ 705 vsi->num_gfltr = ICE_PF_VSI_GFLTR; 706 } 707 708 /* each VSI gets same "best_effort" quota */ 709 vsi->num_bfltr = b_val; 710 } else if (vsi->type == ICE_VSI_VF) { 711 vsi->num_gfltr = 0; 712 713 /* each VSI gets same "best_effort" quota */ 714 vsi->num_bfltr = b_val; 715 } else { 716 struct ice_vsi *main_vsi; 717 int numtc; 718 719 main_vsi = ice_get_main_vsi(pf); 720 if (!main_vsi) 721 return -EPERM; 722 723 if (!main_vsi->all_numtc) 724 return -EINVAL; 725 726 /* figure out ADQ numtc */ 727 numtc = main_vsi->all_numtc - ICE_CHNL_START_TC; 728 729 /* only one TC but still asking resources for channels, 730 * invalid config 731 */ 732 if (numtc < ICE_CHNL_START_TC) 733 return -EPERM; 734 735 g_val -= ICE_PF_VSI_GFLTR; 736 /* channel VSIs gets equal share from guaranteed pool */ 737 vsi->num_gfltr = g_val / numtc; 738 739 /* each VSI gets same "best_effort" quota */ 740 vsi->num_bfltr = b_val; 741 } 742 743 return 0; 744 } 745 746 /** 747 * ice_vsi_get_qs - Assign queues from PF to VSI 748 * @vsi: the VSI to assign queues to 749 * 750 * Returns 0 on success and a negative value on error 751 */ 752 static int ice_vsi_get_qs(struct ice_vsi *vsi) 753 { 754 struct ice_pf *pf = vsi->back; 755 struct ice_qs_cfg tx_qs_cfg = { 756 .qs_mutex = &pf->avail_q_mutex, 757 .pf_map = pf->avail_txqs, 758 .pf_map_size = pf->max_pf_txqs, 759 .q_count = vsi->alloc_txq, 760 .scatter_count = ICE_MAX_SCATTER_TXQS, 761 .vsi_map = vsi->txq_map, 762 .vsi_map_offset = 0, 763 .mapping_mode = ICE_VSI_MAP_CONTIG 764 }; 765 struct ice_qs_cfg rx_qs_cfg = { 766 .qs_mutex = &pf->avail_q_mutex, 767 .pf_map = pf->avail_rxqs, 768 .pf_map_size = pf->max_pf_rxqs, 769 .q_count = vsi->alloc_rxq, 770 .scatter_count = ICE_MAX_SCATTER_RXQS, 771 .vsi_map = vsi->rxq_map, 772 .vsi_map_offset = 0, 773 .mapping_mode = ICE_VSI_MAP_CONTIG 774 }; 775 int ret; 776 777 if (vsi->type == ICE_VSI_CHNL) 778 return 0; 779 780 ret = __ice_vsi_get_qs(&tx_qs_cfg); 781 if (ret) 782 return ret; 783 vsi->tx_mapping_mode = tx_qs_cfg.mapping_mode; 784 785 ret = __ice_vsi_get_qs(&rx_qs_cfg); 786 if (ret) 787 return ret; 788 vsi->rx_mapping_mode = rx_qs_cfg.mapping_mode; 789 790 return 0; 791 } 792 793 /** 794 * ice_vsi_put_qs - Release queues from VSI to PF 795 * @vsi: the VSI that is going to release queues 796 */ 797 static void ice_vsi_put_qs(struct ice_vsi *vsi) 798 { 799 struct ice_pf *pf = vsi->back; 800 int i; 801 802 mutex_lock(&pf->avail_q_mutex); 803 804 ice_for_each_alloc_txq(vsi, i) { 805 clear_bit(vsi->txq_map[i], pf->avail_txqs); 806 vsi->txq_map[i] = ICE_INVAL_Q_INDEX; 807 } 808 809 ice_for_each_alloc_rxq(vsi, i) { 810 clear_bit(vsi->rxq_map[i], pf->avail_rxqs); 811 vsi->rxq_map[i] = ICE_INVAL_Q_INDEX; 812 } 813 814 mutex_unlock(&pf->avail_q_mutex); 815 } 816 817 /** 818 * ice_is_safe_mode 819 * @pf: pointer to the PF struct 820 * 821 * returns true if driver is in safe mode, false otherwise 822 */ 823 bool ice_is_safe_mode(struct ice_pf *pf) 824 { 825 return !test_bit(ICE_FLAG_ADV_FEATURES, pf->flags); 826 } 827 828 /** 829 * ice_is_rdma_ena 830 * @pf: pointer to the PF struct 831 * 832 * returns true if RDMA is currently supported, false otherwise 833 */ 834 bool ice_is_rdma_ena(struct ice_pf *pf) 835 { 836 union devlink_param_value value; 837 int err; 838 839 err = devl_param_driverinit_value_get(priv_to_devlink(pf), 840 DEVLINK_PARAM_GENERIC_ID_ENABLE_RDMA, 841 &value); 842 return err ? test_bit(ICE_FLAG_RDMA_ENA, pf->flags) : value.vbool; 843 } 844 845 /** 846 * ice_vsi_clean_rss_flow_fld - Delete RSS configuration 847 * @vsi: the VSI being cleaned up 848 * 849 * This function deletes RSS input set for all flows that were configured 850 * for this VSI 851 */ 852 static void ice_vsi_clean_rss_flow_fld(struct ice_vsi *vsi) 853 { 854 struct ice_pf *pf = vsi->back; 855 int status; 856 857 if (ice_is_safe_mode(pf)) 858 return; 859 860 status = ice_rem_vsi_rss_cfg(&pf->hw, vsi->idx); 861 if (status) 862 dev_dbg(ice_pf_to_dev(pf), "ice_rem_vsi_rss_cfg failed for vsi = %d, error = %d\n", 863 vsi->vsi_num, status); 864 } 865 866 /** 867 * ice_rss_clean - Delete RSS related VSI structures and configuration 868 * @vsi: the VSI being removed 869 */ 870 static void ice_rss_clean(struct ice_vsi *vsi) 871 { 872 struct ice_pf *pf = vsi->back; 873 struct device *dev; 874 875 dev = ice_pf_to_dev(pf); 876 877 devm_kfree(dev, vsi->rss_hkey_user); 878 devm_kfree(dev, vsi->rss_lut_user); 879 880 ice_vsi_clean_rss_flow_fld(vsi); 881 /* remove RSS replay list */ 882 if (!ice_is_safe_mode(pf)) 883 ice_rem_vsi_rss_list(&pf->hw, vsi->idx); 884 } 885 886 /** 887 * ice_vsi_set_rss_params - Setup RSS capabilities per VSI type 888 * @vsi: the VSI being configured 889 */ 890 static void ice_vsi_set_rss_params(struct ice_vsi *vsi) 891 { 892 struct ice_hw_common_caps *cap; 893 struct ice_pf *pf = vsi->back; 894 u16 max_rss_size; 895 896 if (!test_bit(ICE_FLAG_RSS_ENA, pf->flags)) { 897 vsi->rss_size = 1; 898 return; 899 } 900 901 cap = &pf->hw.func_caps.common_cap; 902 max_rss_size = BIT(cap->rss_table_entry_width); 903 switch (vsi->type) { 904 case ICE_VSI_CHNL: 905 case ICE_VSI_PF: 906 /* PF VSI will inherit RSS instance of PF */ 907 vsi->rss_table_size = (u16)cap->rss_table_size; 908 if (vsi->type == ICE_VSI_CHNL) 909 vsi->rss_size = min_t(u16, vsi->num_rxq, max_rss_size); 910 else 911 vsi->rss_size = min_t(u16, num_online_cpus(), 912 max_rss_size); 913 vsi->rss_lut_type = ICE_LUT_PF; 914 break; 915 case ICE_VSI_SF: 916 vsi->rss_table_size = ICE_LUT_VSI_SIZE; 917 vsi->rss_size = min_t(u16, num_online_cpus(), max_rss_size); 918 vsi->rss_lut_type = ICE_LUT_VSI; 919 break; 920 case ICE_VSI_VF: 921 /* VF VSI will get a small RSS table. 922 * For VSI_LUT, LUT size should be set to 64 bytes. 923 */ 924 vsi->rss_table_size = ICE_LUT_VSI_SIZE; 925 vsi->rss_size = ICE_MAX_RSS_QS_PER_VF; 926 vsi->rss_lut_type = ICE_LUT_VSI; 927 break; 928 case ICE_VSI_LB: 929 break; 930 default: 931 dev_dbg(ice_pf_to_dev(pf), "Unsupported VSI type %s\n", 932 ice_vsi_type_str(vsi->type)); 933 break; 934 } 935 } 936 937 /** 938 * ice_set_dflt_vsi_ctx - Set default VSI context before adding a VSI 939 * @hw: HW structure used to determine the VLAN mode of the device 940 * @ctxt: the VSI context being set 941 * 942 * This initializes a default VSI context for all sections except the Queues. 943 */ 944 static void ice_set_dflt_vsi_ctx(struct ice_hw *hw, struct ice_vsi_ctx *ctxt) 945 { 946 u32 table = 0; 947 948 memset(&ctxt->info, 0, sizeof(ctxt->info)); 949 /* VSI's should be allocated from shared pool */ 950 ctxt->alloc_from_pool = true; 951 /* Src pruning enabled by default */ 952 ctxt->info.sw_flags = ICE_AQ_VSI_SW_FLAG_SRC_PRUNE; 953 /* Traffic from VSI can be sent to LAN */ 954 ctxt->info.sw_flags2 = ICE_AQ_VSI_SW_FLAG_LAN_ENA; 955 /* allow all untagged/tagged packets by default on Tx */ 956 ctxt->info.inner_vlan_flags = FIELD_PREP(ICE_AQ_VSI_INNER_VLAN_TX_MODE_M, 957 ICE_AQ_VSI_INNER_VLAN_TX_MODE_ALL); 958 /* SVM - by default bits 3 and 4 in inner_vlan_flags are 0's which 959 * results in legacy behavior (show VLAN, DEI, and UP) in descriptor. 960 * 961 * DVM - leave inner VLAN in packet by default 962 */ 963 if (ice_is_dvm_ena(hw)) { 964 ctxt->info.inner_vlan_flags |= 965 FIELD_PREP(ICE_AQ_VSI_INNER_VLAN_EMODE_M, 966 ICE_AQ_VSI_INNER_VLAN_EMODE_NOTHING); 967 ctxt->info.outer_vlan_flags = 968 FIELD_PREP(ICE_AQ_VSI_OUTER_VLAN_TX_MODE_M, 969 ICE_AQ_VSI_OUTER_VLAN_TX_MODE_ALL); 970 ctxt->info.outer_vlan_flags |= 971 FIELD_PREP(ICE_AQ_VSI_OUTER_TAG_TYPE_M, 972 ICE_AQ_VSI_OUTER_TAG_VLAN_8100); 973 ctxt->info.outer_vlan_flags |= 974 FIELD_PREP(ICE_AQ_VSI_OUTER_VLAN_EMODE_M, 975 ICE_AQ_VSI_OUTER_VLAN_EMODE_NOTHING); 976 } 977 /* Have 1:1 UP mapping for both ingress/egress tables */ 978 table |= ICE_UP_TABLE_TRANSLATE(0, 0); 979 table |= ICE_UP_TABLE_TRANSLATE(1, 1); 980 table |= ICE_UP_TABLE_TRANSLATE(2, 2); 981 table |= ICE_UP_TABLE_TRANSLATE(3, 3); 982 table |= ICE_UP_TABLE_TRANSLATE(4, 4); 983 table |= ICE_UP_TABLE_TRANSLATE(5, 5); 984 table |= ICE_UP_TABLE_TRANSLATE(6, 6); 985 table |= ICE_UP_TABLE_TRANSLATE(7, 7); 986 ctxt->info.ingress_table = cpu_to_le32(table); 987 ctxt->info.egress_table = cpu_to_le32(table); 988 /* Have 1:1 UP mapping for outer to inner UP table */ 989 ctxt->info.outer_up_table = cpu_to_le32(table); 990 /* No Outer tag support outer_tag_flags remains to zero */ 991 } 992 993 /** 994 * ice_vsi_setup_q_map - Setup a VSI queue map 995 * @vsi: the VSI being configured 996 * @ctxt: VSI context structure 997 */ 998 static int ice_vsi_setup_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt) 999 { 1000 u16 offset = 0, qmap = 0, tx_count = 0, rx_count = 0, pow = 0; 1001 u16 num_txq_per_tc, num_rxq_per_tc; 1002 u16 qcount_tx = vsi->alloc_txq; 1003 u16 qcount_rx = vsi->alloc_rxq; 1004 u8 netdev_tc = 0; 1005 int i; 1006 1007 if (!vsi->tc_cfg.numtc) { 1008 /* at least TC0 should be enabled by default */ 1009 vsi->tc_cfg.numtc = 1; 1010 vsi->tc_cfg.ena_tc = 1; 1011 } 1012 1013 num_rxq_per_tc = min_t(u16, qcount_rx / vsi->tc_cfg.numtc, ICE_MAX_RXQS_PER_TC); 1014 if (!num_rxq_per_tc) 1015 num_rxq_per_tc = 1; 1016 num_txq_per_tc = qcount_tx / vsi->tc_cfg.numtc; 1017 if (!num_txq_per_tc) 1018 num_txq_per_tc = 1; 1019 1020 /* find the (rounded up) power-of-2 of qcount */ 1021 pow = (u16)order_base_2(num_rxq_per_tc); 1022 1023 /* TC mapping is a function of the number of Rx queues assigned to the 1024 * VSI for each traffic class and the offset of these queues. 1025 * The first 10 bits are for queue offset for TC0, next 4 bits for no:of 1026 * queues allocated to TC0. No:of queues is a power-of-2. 1027 * 1028 * If TC is not enabled, the queue offset is set to 0, and allocate one 1029 * queue, this way, traffic for the given TC will be sent to the default 1030 * queue. 1031 * 1032 * Setup number and offset of Rx queues for all TCs for the VSI 1033 */ 1034 ice_for_each_traffic_class(i) { 1035 if (!(vsi->tc_cfg.ena_tc & BIT(i))) { 1036 /* TC is not enabled */ 1037 vsi->tc_cfg.tc_info[i].qoffset = 0; 1038 vsi->tc_cfg.tc_info[i].qcount_rx = 1; 1039 vsi->tc_cfg.tc_info[i].qcount_tx = 1; 1040 vsi->tc_cfg.tc_info[i].netdev_tc = 0; 1041 ctxt->info.tc_mapping[i] = 0; 1042 continue; 1043 } 1044 1045 /* TC is enabled */ 1046 vsi->tc_cfg.tc_info[i].qoffset = offset; 1047 vsi->tc_cfg.tc_info[i].qcount_rx = num_rxq_per_tc; 1048 vsi->tc_cfg.tc_info[i].qcount_tx = num_txq_per_tc; 1049 vsi->tc_cfg.tc_info[i].netdev_tc = netdev_tc++; 1050 1051 qmap = FIELD_PREP(ICE_AQ_VSI_TC_Q_OFFSET_M, offset); 1052 qmap |= FIELD_PREP(ICE_AQ_VSI_TC_Q_NUM_M, pow); 1053 offset += num_rxq_per_tc; 1054 tx_count += num_txq_per_tc; 1055 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap); 1056 } 1057 1058 /* if offset is non-zero, means it is calculated correctly based on 1059 * enabled TCs for a given VSI otherwise qcount_rx will always 1060 * be correct and non-zero because it is based off - VSI's 1061 * allocated Rx queues which is at least 1 (hence qcount_tx will be 1062 * at least 1) 1063 */ 1064 if (offset) 1065 rx_count = offset; 1066 else 1067 rx_count = num_rxq_per_tc; 1068 1069 if (rx_count > vsi->alloc_rxq) { 1070 dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Rx queues (%u), than were allocated (%u)!\n", 1071 rx_count, vsi->alloc_rxq); 1072 return -EINVAL; 1073 } 1074 1075 if (tx_count > vsi->alloc_txq) { 1076 dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Tx queues (%u), than were allocated (%u)!\n", 1077 tx_count, vsi->alloc_txq); 1078 return -EINVAL; 1079 } 1080 1081 vsi->num_txq = tx_count; 1082 vsi->num_rxq = rx_count; 1083 1084 if (vsi->type == ICE_VSI_VF && vsi->num_txq != vsi->num_rxq) { 1085 dev_dbg(ice_pf_to_dev(vsi->back), "VF VSI should have same number of Tx and Rx queues. Hence making them equal\n"); 1086 /* since there is a chance that num_rxq could have been changed 1087 * in the above for loop, make num_txq equal to num_rxq. 1088 */ 1089 vsi->num_txq = vsi->num_rxq; 1090 } 1091 1092 /* Rx queue mapping */ 1093 ctxt->info.mapping_flags |= cpu_to_le16(ICE_AQ_VSI_Q_MAP_CONTIG); 1094 /* q_mapping buffer holds the info for the first queue allocated for 1095 * this VSI in the PF space and also the number of queues associated 1096 * with this VSI. 1097 */ 1098 ctxt->info.q_mapping[0] = cpu_to_le16(vsi->rxq_map[0]); 1099 ctxt->info.q_mapping[1] = cpu_to_le16(vsi->num_rxq); 1100 1101 return 0; 1102 } 1103 1104 /** 1105 * ice_set_fd_vsi_ctx - Set FD VSI context before adding a VSI 1106 * @ctxt: the VSI context being set 1107 * @vsi: the VSI being configured 1108 */ 1109 static void ice_set_fd_vsi_ctx(struct ice_vsi_ctx *ctxt, struct ice_vsi *vsi) 1110 { 1111 u8 dflt_q_group, dflt_q_prio; 1112 u16 dflt_q, report_q, val; 1113 1114 if (vsi->type != ICE_VSI_PF && vsi->type != ICE_VSI_CTRL && 1115 vsi->type != ICE_VSI_VF && vsi->type != ICE_VSI_CHNL) 1116 return; 1117 1118 val = ICE_AQ_VSI_PROP_FLOW_DIR_VALID; 1119 ctxt->info.valid_sections |= cpu_to_le16(val); 1120 dflt_q = 0; 1121 dflt_q_group = 0; 1122 report_q = 0; 1123 dflt_q_prio = 0; 1124 1125 /* enable flow director filtering/programming */ 1126 val = ICE_AQ_VSI_FD_ENABLE | ICE_AQ_VSI_FD_PROG_ENABLE; 1127 ctxt->info.fd_options = cpu_to_le16(val); 1128 /* max of allocated flow director filters */ 1129 ctxt->info.max_fd_fltr_dedicated = 1130 cpu_to_le16(vsi->num_gfltr); 1131 /* max of shared flow director filters any VSI may program */ 1132 ctxt->info.max_fd_fltr_shared = 1133 cpu_to_le16(vsi->num_bfltr); 1134 /* default queue index within the VSI of the default FD */ 1135 val = FIELD_PREP(ICE_AQ_VSI_FD_DEF_Q_M, dflt_q); 1136 /* target queue or queue group to the FD filter */ 1137 val |= FIELD_PREP(ICE_AQ_VSI_FD_DEF_GRP_M, dflt_q_group); 1138 ctxt->info.fd_def_q = cpu_to_le16(val); 1139 /* queue index on which FD filter completion is reported */ 1140 val = FIELD_PREP(ICE_AQ_VSI_FD_REPORT_Q_M, report_q); 1141 /* priority of the default qindex action */ 1142 val |= FIELD_PREP(ICE_AQ_VSI_FD_DEF_PRIORITY_M, dflt_q_prio); 1143 ctxt->info.fd_report_opt = cpu_to_le16(val); 1144 } 1145 1146 /** 1147 * ice_set_rss_vsi_ctx - Set RSS VSI context before adding a VSI 1148 * @ctxt: the VSI context being set 1149 * @vsi: the VSI being configured 1150 */ 1151 static void ice_set_rss_vsi_ctx(struct ice_vsi_ctx *ctxt, struct ice_vsi *vsi) 1152 { 1153 u8 lut_type, hash_type; 1154 struct device *dev; 1155 struct ice_pf *pf; 1156 1157 pf = vsi->back; 1158 dev = ice_pf_to_dev(pf); 1159 1160 switch (vsi->type) { 1161 case ICE_VSI_CHNL: 1162 case ICE_VSI_PF: 1163 /* PF VSI will inherit RSS instance of PF */ 1164 lut_type = ICE_AQ_VSI_Q_OPT_RSS_LUT_PF; 1165 break; 1166 case ICE_VSI_VF: 1167 case ICE_VSI_SF: 1168 /* VF VSI will gets a small RSS table which is a VSI LUT type */ 1169 lut_type = ICE_AQ_VSI_Q_OPT_RSS_LUT_VSI; 1170 break; 1171 default: 1172 dev_dbg(dev, "Unsupported VSI type %s\n", 1173 ice_vsi_type_str(vsi->type)); 1174 return; 1175 } 1176 1177 hash_type = ICE_AQ_VSI_Q_OPT_RSS_HASH_TPLZ; 1178 vsi->rss_hfunc = hash_type; 1179 1180 ctxt->info.q_opt_rss = 1181 FIELD_PREP(ICE_AQ_VSI_Q_OPT_RSS_LUT_M, lut_type) | 1182 FIELD_PREP(ICE_AQ_VSI_Q_OPT_RSS_HASH_M, hash_type); 1183 } 1184 1185 static void 1186 ice_chnl_vsi_setup_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt) 1187 { 1188 u16 qcount, qmap; 1189 u8 offset = 0; 1190 int pow; 1191 1192 qcount = vsi->num_rxq; 1193 1194 pow = order_base_2(qcount); 1195 qmap = FIELD_PREP(ICE_AQ_VSI_TC_Q_OFFSET_M, offset); 1196 qmap |= FIELD_PREP(ICE_AQ_VSI_TC_Q_NUM_M, pow); 1197 1198 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap); 1199 ctxt->info.mapping_flags |= cpu_to_le16(ICE_AQ_VSI_Q_MAP_CONTIG); 1200 ctxt->info.q_mapping[0] = cpu_to_le16(vsi->next_base_q); 1201 ctxt->info.q_mapping[1] = cpu_to_le16(qcount); 1202 } 1203 1204 /** 1205 * ice_vsi_is_vlan_pruning_ena - check if VLAN pruning is enabled or not 1206 * @vsi: VSI to check whether or not VLAN pruning is enabled. 1207 * 1208 * returns true if Rx VLAN pruning is enabled and false otherwise. 1209 */ 1210 static bool ice_vsi_is_vlan_pruning_ena(struct ice_vsi *vsi) 1211 { 1212 return vsi->info.sw_flags2 & ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA; 1213 } 1214 1215 /** 1216 * ice_vsi_init - Create and initialize a VSI 1217 * @vsi: the VSI being configured 1218 * @vsi_flags: VSI configuration flags 1219 * 1220 * Set ICE_FLAG_VSI_INIT to initialize a new VSI context, clear it to 1221 * reconfigure an existing context. 1222 * 1223 * This initializes a VSI context depending on the VSI type to be added and 1224 * passes it down to the add_vsi aq command to create a new VSI. 1225 */ 1226 static int ice_vsi_init(struct ice_vsi *vsi, u32 vsi_flags) 1227 { 1228 struct ice_pf *pf = vsi->back; 1229 struct ice_hw *hw = &pf->hw; 1230 struct ice_vsi_ctx *ctxt; 1231 struct device *dev; 1232 int ret = 0; 1233 1234 dev = ice_pf_to_dev(pf); 1235 ctxt = kzalloc(sizeof(*ctxt), GFP_KERNEL); 1236 if (!ctxt) 1237 return -ENOMEM; 1238 1239 switch (vsi->type) { 1240 case ICE_VSI_CTRL: 1241 case ICE_VSI_LB: 1242 case ICE_VSI_PF: 1243 ctxt->flags = ICE_AQ_VSI_TYPE_PF; 1244 break; 1245 case ICE_VSI_SF: 1246 case ICE_VSI_CHNL: 1247 ctxt->flags = ICE_AQ_VSI_TYPE_VMDQ2; 1248 break; 1249 case ICE_VSI_VF: 1250 ctxt->flags = ICE_AQ_VSI_TYPE_VF; 1251 /* VF number here is the absolute VF number (0-255) */ 1252 ctxt->vf_num = vsi->vf->vf_id + hw->func_caps.vf_base_id; 1253 break; 1254 default: 1255 ret = -ENODEV; 1256 goto out; 1257 } 1258 1259 /* Handle VLAN pruning for channel VSI if main VSI has VLAN 1260 * prune enabled 1261 */ 1262 if (vsi->type == ICE_VSI_CHNL) { 1263 struct ice_vsi *main_vsi; 1264 1265 main_vsi = ice_get_main_vsi(pf); 1266 if (main_vsi && ice_vsi_is_vlan_pruning_ena(main_vsi)) 1267 ctxt->info.sw_flags2 |= 1268 ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA; 1269 else 1270 ctxt->info.sw_flags2 &= 1271 ~ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA; 1272 } 1273 1274 ice_set_dflt_vsi_ctx(hw, ctxt); 1275 if (test_bit(ICE_FLAG_FD_ENA, pf->flags)) 1276 ice_set_fd_vsi_ctx(ctxt, vsi); 1277 /* if the switch is in VEB mode, allow VSI loopback */ 1278 if (vsi->vsw->bridge_mode == BRIDGE_MODE_VEB) 1279 ctxt->info.sw_flags |= ICE_AQ_VSI_SW_FLAG_ALLOW_LB; 1280 1281 /* Set LUT type and HASH type if RSS is enabled */ 1282 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags) && 1283 vsi->type != ICE_VSI_CTRL) { 1284 ice_set_rss_vsi_ctx(ctxt, vsi); 1285 /* if updating VSI context, make sure to set valid_section: 1286 * to indicate which section of VSI context being updated 1287 */ 1288 if (!(vsi_flags & ICE_VSI_FLAG_INIT)) 1289 ctxt->info.valid_sections |= 1290 cpu_to_le16(ICE_AQ_VSI_PROP_Q_OPT_VALID); 1291 } 1292 1293 ctxt->info.sw_id = vsi->port_info->sw_id; 1294 if (vsi->type == ICE_VSI_CHNL) { 1295 ice_chnl_vsi_setup_q_map(vsi, ctxt); 1296 } else { 1297 ret = ice_vsi_setup_q_map(vsi, ctxt); 1298 if (ret) 1299 goto out; 1300 1301 if (!(vsi_flags & ICE_VSI_FLAG_INIT)) 1302 /* means VSI being updated */ 1303 /* must to indicate which section of VSI context are 1304 * being modified 1305 */ 1306 ctxt->info.valid_sections |= 1307 cpu_to_le16(ICE_AQ_VSI_PROP_RXQ_MAP_VALID); 1308 } 1309 1310 /* Allow control frames out of main VSI */ 1311 if (vsi->type == ICE_VSI_PF) { 1312 ctxt->info.sec_flags |= ICE_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD; 1313 ctxt->info.valid_sections |= 1314 cpu_to_le16(ICE_AQ_VSI_PROP_SECURITY_VALID); 1315 } 1316 1317 if (vsi_flags & ICE_VSI_FLAG_INIT) { 1318 ret = ice_add_vsi(hw, vsi->idx, ctxt, NULL); 1319 if (ret) { 1320 dev_err(dev, "Add VSI failed, err %d\n", ret); 1321 ret = -EIO; 1322 goto out; 1323 } 1324 } else { 1325 ret = ice_update_vsi(hw, vsi->idx, ctxt, NULL); 1326 if (ret) { 1327 dev_err(dev, "Update VSI failed, err %d\n", ret); 1328 ret = -EIO; 1329 goto out; 1330 } 1331 } 1332 1333 /* keep context for update VSI operations */ 1334 vsi->info = ctxt->info; 1335 1336 /* record VSI number returned */ 1337 vsi->vsi_num = ctxt->vsi_num; 1338 1339 out: 1340 kfree(ctxt); 1341 return ret; 1342 } 1343 1344 /** 1345 * ice_vsi_clear_rings - Deallocates the Tx and Rx rings for VSI 1346 * @vsi: the VSI having rings deallocated 1347 */ 1348 static void ice_vsi_clear_rings(struct ice_vsi *vsi) 1349 { 1350 int i; 1351 1352 /* Avoid stale references by clearing map from vector to ring */ 1353 if (vsi->q_vectors) { 1354 ice_for_each_q_vector(vsi, i) { 1355 struct ice_q_vector *q_vector = vsi->q_vectors[i]; 1356 1357 if (q_vector) { 1358 q_vector->tx.tx_ring = NULL; 1359 q_vector->rx.rx_ring = NULL; 1360 } 1361 } 1362 } 1363 1364 if (vsi->tx_rings) { 1365 ice_for_each_alloc_txq(vsi, i) { 1366 if (vsi->tx_rings[i]) { 1367 kfree_rcu(vsi->tx_rings[i], rcu); 1368 WRITE_ONCE(vsi->tx_rings[i], NULL); 1369 } 1370 } 1371 } 1372 if (vsi->rx_rings) { 1373 ice_for_each_alloc_rxq(vsi, i) { 1374 if (vsi->rx_rings[i]) { 1375 kfree_rcu(vsi->rx_rings[i], rcu); 1376 WRITE_ONCE(vsi->rx_rings[i], NULL); 1377 } 1378 } 1379 } 1380 } 1381 1382 /** 1383 * ice_vsi_alloc_rings - Allocates Tx and Rx rings for the VSI 1384 * @vsi: VSI which is having rings allocated 1385 */ 1386 static int ice_vsi_alloc_rings(struct ice_vsi *vsi) 1387 { 1388 bool dvm_ena = ice_is_dvm_ena(&vsi->back->hw); 1389 struct ice_pf *pf = vsi->back; 1390 struct device *dev; 1391 u16 i; 1392 1393 dev = ice_pf_to_dev(pf); 1394 /* Allocate Tx rings */ 1395 ice_for_each_alloc_txq(vsi, i) { 1396 struct ice_tx_ring *ring; 1397 1398 /* allocate with kzalloc(), free with kfree_rcu() */ 1399 ring = kzalloc(sizeof(*ring), GFP_KERNEL); 1400 1401 if (!ring) 1402 goto err_out; 1403 1404 ring->q_index = i; 1405 ring->reg_idx = vsi->txq_map[i]; 1406 ring->vsi = vsi; 1407 ring->tx_tstamps = &pf->ptp.port.tx; 1408 ring->dev = dev; 1409 ring->count = vsi->num_tx_desc; 1410 ring->txq_teid = ICE_INVAL_TEID; 1411 if (dvm_ena) 1412 ring->flags |= ICE_TX_FLAGS_RING_VLAN_L2TAG2; 1413 else 1414 ring->flags |= ICE_TX_FLAGS_RING_VLAN_L2TAG1; 1415 WRITE_ONCE(vsi->tx_rings[i], ring); 1416 } 1417 1418 /* Allocate Rx rings */ 1419 ice_for_each_alloc_rxq(vsi, i) { 1420 struct ice_rx_ring *ring; 1421 1422 /* allocate with kzalloc(), free with kfree_rcu() */ 1423 ring = kzalloc(sizeof(*ring), GFP_KERNEL); 1424 if (!ring) 1425 goto err_out; 1426 1427 ring->q_index = i; 1428 ring->reg_idx = vsi->rxq_map[i]; 1429 ring->vsi = vsi; 1430 ring->netdev = vsi->netdev; 1431 ring->dev = dev; 1432 ring->count = vsi->num_rx_desc; 1433 ring->cached_phctime = pf->ptp.cached_phc_time; 1434 WRITE_ONCE(vsi->rx_rings[i], ring); 1435 } 1436 1437 return 0; 1438 1439 err_out: 1440 ice_vsi_clear_rings(vsi); 1441 return -ENOMEM; 1442 } 1443 1444 /** 1445 * ice_vsi_manage_rss_lut - disable/enable RSS 1446 * @vsi: the VSI being changed 1447 * @ena: boolean value indicating if this is an enable or disable request 1448 * 1449 * In the event of disable request for RSS, this function will zero out RSS 1450 * LUT, while in the event of enable request for RSS, it will reconfigure RSS 1451 * LUT. 1452 */ 1453 void ice_vsi_manage_rss_lut(struct ice_vsi *vsi, bool ena) 1454 { 1455 u8 *lut; 1456 1457 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL); 1458 if (!lut) 1459 return; 1460 1461 if (ena) { 1462 if (vsi->rss_lut_user) 1463 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size); 1464 else 1465 ice_fill_rss_lut(lut, vsi->rss_table_size, 1466 vsi->rss_size); 1467 } 1468 1469 ice_set_rss_lut(vsi, lut, vsi->rss_table_size); 1470 kfree(lut); 1471 } 1472 1473 /** 1474 * ice_vsi_cfg_crc_strip - Configure CRC stripping for a VSI 1475 * @vsi: VSI to be configured 1476 * @disable: set to true to have FCS / CRC in the frame data 1477 */ 1478 void ice_vsi_cfg_crc_strip(struct ice_vsi *vsi, bool disable) 1479 { 1480 int i; 1481 1482 ice_for_each_rxq(vsi, i) 1483 if (disable) 1484 vsi->rx_rings[i]->flags |= ICE_RX_FLAGS_CRC_STRIP_DIS; 1485 else 1486 vsi->rx_rings[i]->flags &= ~ICE_RX_FLAGS_CRC_STRIP_DIS; 1487 } 1488 1489 /** 1490 * ice_vsi_cfg_rss_lut_key - Configure RSS params for a VSI 1491 * @vsi: VSI to be configured 1492 */ 1493 int ice_vsi_cfg_rss_lut_key(struct ice_vsi *vsi) 1494 { 1495 struct ice_pf *pf = vsi->back; 1496 struct device *dev; 1497 u8 *lut, *key; 1498 int err; 1499 1500 dev = ice_pf_to_dev(pf); 1501 if (vsi->type == ICE_VSI_PF && vsi->ch_rss_size && 1502 (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))) { 1503 vsi->rss_size = min_t(u16, vsi->rss_size, vsi->ch_rss_size); 1504 } else { 1505 vsi->rss_size = min_t(u16, vsi->rss_size, vsi->num_rxq); 1506 1507 /* If orig_rss_size is valid and it is less than determined 1508 * main VSI's rss_size, update main VSI's rss_size to be 1509 * orig_rss_size so that when tc-qdisc is deleted, main VSI 1510 * RSS table gets programmed to be correct (whatever it was 1511 * to begin with (prior to setup-tc for ADQ config) 1512 */ 1513 if (vsi->orig_rss_size && vsi->rss_size < vsi->orig_rss_size && 1514 vsi->orig_rss_size <= vsi->num_rxq) { 1515 vsi->rss_size = vsi->orig_rss_size; 1516 /* now orig_rss_size is used, reset it to zero */ 1517 vsi->orig_rss_size = 0; 1518 } 1519 } 1520 1521 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL); 1522 if (!lut) 1523 return -ENOMEM; 1524 1525 if (vsi->rss_lut_user) 1526 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size); 1527 else 1528 ice_fill_rss_lut(lut, vsi->rss_table_size, vsi->rss_size); 1529 1530 err = ice_set_rss_lut(vsi, lut, vsi->rss_table_size); 1531 if (err) { 1532 dev_err(dev, "set_rss_lut failed, error %d\n", err); 1533 goto ice_vsi_cfg_rss_exit; 1534 } 1535 1536 key = kzalloc(ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE, GFP_KERNEL); 1537 if (!key) { 1538 err = -ENOMEM; 1539 goto ice_vsi_cfg_rss_exit; 1540 } 1541 1542 if (vsi->rss_hkey_user) 1543 memcpy(key, vsi->rss_hkey_user, ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE); 1544 else 1545 netdev_rss_key_fill((void *)key, ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE); 1546 1547 err = ice_set_rss_key(vsi, key); 1548 if (err) 1549 dev_err(dev, "set_rss_key failed, error %d\n", err); 1550 1551 kfree(key); 1552 ice_vsi_cfg_rss_exit: 1553 kfree(lut); 1554 return err; 1555 } 1556 1557 /** 1558 * ice_vsi_set_vf_rss_flow_fld - Sets VF VSI RSS input set for different flows 1559 * @vsi: VSI to be configured 1560 * 1561 * This function will only be called during the VF VSI setup. Upon successful 1562 * completion of package download, this function will configure default RSS 1563 * input sets for VF VSI. 1564 */ 1565 static void ice_vsi_set_vf_rss_flow_fld(struct ice_vsi *vsi) 1566 { 1567 struct ice_pf *pf = vsi->back; 1568 struct device *dev; 1569 int status; 1570 1571 dev = ice_pf_to_dev(pf); 1572 if (ice_is_safe_mode(pf)) { 1573 dev_dbg(dev, "Advanced RSS disabled. Package download failed, vsi num = %d\n", 1574 vsi->vsi_num); 1575 return; 1576 } 1577 1578 status = ice_add_avf_rss_cfg(&pf->hw, vsi, ICE_DEFAULT_RSS_HENA); 1579 if (status) 1580 dev_dbg(dev, "ice_add_avf_rss_cfg failed for vsi = %d, error = %d\n", 1581 vsi->vsi_num, status); 1582 } 1583 1584 static const struct ice_rss_hash_cfg default_rss_cfgs[] = { 1585 /* configure RSS for IPv4 with input set IP src/dst */ 1586 {ICE_FLOW_SEG_HDR_IPV4, ICE_FLOW_HASH_IPV4, ICE_RSS_ANY_HEADERS, false}, 1587 /* configure RSS for IPv6 with input set IPv6 src/dst */ 1588 {ICE_FLOW_SEG_HDR_IPV6, ICE_FLOW_HASH_IPV6, ICE_RSS_ANY_HEADERS, false}, 1589 /* configure RSS for tcp4 with input set IP src/dst, TCP src/dst */ 1590 {ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV4, 1591 ICE_HASH_TCP_IPV4, ICE_RSS_ANY_HEADERS, false}, 1592 /* configure RSS for udp4 with input set IP src/dst, UDP src/dst */ 1593 {ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV4, 1594 ICE_HASH_UDP_IPV4, ICE_RSS_ANY_HEADERS, false}, 1595 /* configure RSS for sctp4 with input set IP src/dst - only support 1596 * RSS on SCTPv4 on outer headers (non-tunneled) 1597 */ 1598 {ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV4, 1599 ICE_HASH_SCTP_IPV4, ICE_RSS_OUTER_HEADERS, false}, 1600 /* configure RSS for gtpc4 with input set IPv4 src/dst */ 1601 {ICE_FLOW_SEG_HDR_GTPC | ICE_FLOW_SEG_HDR_IPV4, 1602 ICE_FLOW_HASH_IPV4, ICE_RSS_OUTER_HEADERS, false}, 1603 /* configure RSS for gtpc4t with input set IPv4 src/dst */ 1604 {ICE_FLOW_SEG_HDR_GTPC_TEID | ICE_FLOW_SEG_HDR_IPV4, 1605 ICE_FLOW_HASH_GTP_C_IPV4_TEID, ICE_RSS_OUTER_HEADERS, false}, 1606 /* configure RSS for gtpu4 with input set IPv4 src/dst */ 1607 {ICE_FLOW_SEG_HDR_GTPU_IP | ICE_FLOW_SEG_HDR_IPV4, 1608 ICE_FLOW_HASH_GTP_U_IPV4_TEID, ICE_RSS_OUTER_HEADERS, false}, 1609 /* configure RSS for gtpu4e with input set IPv4 src/dst */ 1610 {ICE_FLOW_SEG_HDR_GTPU_EH | ICE_FLOW_SEG_HDR_IPV4, 1611 ICE_FLOW_HASH_GTP_U_IPV4_EH, ICE_RSS_OUTER_HEADERS, false}, 1612 /* configure RSS for gtpu4u with input set IPv4 src/dst */ 1613 { ICE_FLOW_SEG_HDR_GTPU_UP | ICE_FLOW_SEG_HDR_IPV4, 1614 ICE_FLOW_HASH_GTP_U_IPV4_UP, ICE_RSS_OUTER_HEADERS, false}, 1615 /* configure RSS for gtpu4d with input set IPv4 src/dst */ 1616 {ICE_FLOW_SEG_HDR_GTPU_DWN | ICE_FLOW_SEG_HDR_IPV4, 1617 ICE_FLOW_HASH_GTP_U_IPV4_DWN, ICE_RSS_OUTER_HEADERS, false}, 1618 1619 /* configure RSS for tcp6 with input set IPv6 src/dst, TCP src/dst */ 1620 {ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV6, 1621 ICE_HASH_TCP_IPV6, ICE_RSS_ANY_HEADERS, false}, 1622 /* configure RSS for udp6 with input set IPv6 src/dst, UDP src/dst */ 1623 {ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV6, 1624 ICE_HASH_UDP_IPV6, ICE_RSS_ANY_HEADERS, false}, 1625 /* configure RSS for sctp6 with input set IPv6 src/dst - only support 1626 * RSS on SCTPv6 on outer headers (non-tunneled) 1627 */ 1628 {ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV6, 1629 ICE_HASH_SCTP_IPV6, ICE_RSS_OUTER_HEADERS, false}, 1630 /* configure RSS for IPSEC ESP SPI with input set MAC_IPV4_SPI */ 1631 {ICE_FLOW_SEG_HDR_ESP, 1632 ICE_FLOW_HASH_ESP_SPI, ICE_RSS_OUTER_HEADERS, false}, 1633 /* configure RSS for gtpc6 with input set IPv6 src/dst */ 1634 {ICE_FLOW_SEG_HDR_GTPC | ICE_FLOW_SEG_HDR_IPV6, 1635 ICE_FLOW_HASH_IPV6, ICE_RSS_OUTER_HEADERS, false}, 1636 /* configure RSS for gtpc6t with input set IPv6 src/dst */ 1637 {ICE_FLOW_SEG_HDR_GTPC_TEID | ICE_FLOW_SEG_HDR_IPV6, 1638 ICE_FLOW_HASH_GTP_C_IPV6_TEID, ICE_RSS_OUTER_HEADERS, false}, 1639 /* configure RSS for gtpu6 with input set IPv6 src/dst */ 1640 {ICE_FLOW_SEG_HDR_GTPU_IP | ICE_FLOW_SEG_HDR_IPV6, 1641 ICE_FLOW_HASH_GTP_U_IPV6_TEID, ICE_RSS_OUTER_HEADERS, false}, 1642 /* configure RSS for gtpu6e with input set IPv6 src/dst */ 1643 {ICE_FLOW_SEG_HDR_GTPU_EH | ICE_FLOW_SEG_HDR_IPV6, 1644 ICE_FLOW_HASH_GTP_U_IPV6_EH, ICE_RSS_OUTER_HEADERS, false}, 1645 /* configure RSS for gtpu6u with input set IPv6 src/dst */ 1646 { ICE_FLOW_SEG_HDR_GTPU_UP | ICE_FLOW_SEG_HDR_IPV6, 1647 ICE_FLOW_HASH_GTP_U_IPV6_UP, ICE_RSS_OUTER_HEADERS, false}, 1648 /* configure RSS for gtpu6d with input set IPv6 src/dst */ 1649 {ICE_FLOW_SEG_HDR_GTPU_DWN | ICE_FLOW_SEG_HDR_IPV6, 1650 ICE_FLOW_HASH_GTP_U_IPV6_DWN, ICE_RSS_OUTER_HEADERS, false}, 1651 }; 1652 1653 /** 1654 * ice_vsi_set_rss_flow_fld - Sets RSS input set for different flows 1655 * @vsi: VSI to be configured 1656 * 1657 * This function will only be called after successful download package call 1658 * during initialization of PF. Since the downloaded package will erase the 1659 * RSS section, this function will configure RSS input sets for different 1660 * flow types. The last profile added has the highest priority, therefore 2 1661 * tuple profiles (i.e. IPv4 src/dst) are added before 4 tuple profiles 1662 * (i.e. IPv4 src/dst TCP src/dst port). 1663 */ 1664 static void ice_vsi_set_rss_flow_fld(struct ice_vsi *vsi) 1665 { 1666 u16 vsi_num = vsi->vsi_num; 1667 struct ice_pf *pf = vsi->back; 1668 struct ice_hw *hw = &pf->hw; 1669 struct device *dev; 1670 int status; 1671 u32 i; 1672 1673 dev = ice_pf_to_dev(pf); 1674 if (ice_is_safe_mode(pf)) { 1675 dev_dbg(dev, "Advanced RSS disabled. Package download failed, vsi num = %d\n", 1676 vsi_num); 1677 return; 1678 } 1679 for (i = 0; i < ARRAY_SIZE(default_rss_cfgs); i++) { 1680 const struct ice_rss_hash_cfg *cfg = &default_rss_cfgs[i]; 1681 1682 status = ice_add_rss_cfg(hw, vsi, cfg); 1683 if (status) 1684 dev_dbg(dev, "ice_add_rss_cfg failed, addl_hdrs = %x, hash_flds = %llx, hdr_type = %d, symm = %d\n", 1685 cfg->addl_hdrs, cfg->hash_flds, 1686 cfg->hdr_type, cfg->symm); 1687 } 1688 } 1689 1690 /** 1691 * ice_pf_state_is_nominal - checks the PF for nominal state 1692 * @pf: pointer to PF to check 1693 * 1694 * Check the PF's state for a collection of bits that would indicate 1695 * the PF is in a state that would inhibit normal operation for 1696 * driver functionality. 1697 * 1698 * Returns true if PF is in a nominal state, false otherwise 1699 */ 1700 bool ice_pf_state_is_nominal(struct ice_pf *pf) 1701 { 1702 DECLARE_BITMAP(check_bits, ICE_STATE_NBITS) = { 0 }; 1703 1704 if (!pf) 1705 return false; 1706 1707 bitmap_set(check_bits, 0, ICE_STATE_NOMINAL_CHECK_BITS); 1708 if (bitmap_intersects(pf->state, check_bits, ICE_STATE_NBITS)) 1709 return false; 1710 1711 return true; 1712 } 1713 1714 #define ICE_FW_MODE_REC_M BIT(1) 1715 bool ice_is_recovery_mode(struct ice_hw *hw) 1716 { 1717 return rd32(hw, GL_MNG_FWSM) & ICE_FW_MODE_REC_M; 1718 } 1719 1720 /** 1721 * ice_update_eth_stats - Update VSI-specific ethernet statistics counters 1722 * @vsi: the VSI to be updated 1723 */ 1724 void ice_update_eth_stats(struct ice_vsi *vsi) 1725 { 1726 struct ice_eth_stats *prev_es, *cur_es; 1727 struct ice_hw *hw = &vsi->back->hw; 1728 struct ice_pf *pf = vsi->back; 1729 u16 vsi_num = vsi->vsi_num; /* HW absolute index of a VSI */ 1730 1731 prev_es = &vsi->eth_stats_prev; 1732 cur_es = &vsi->eth_stats; 1733 1734 if (ice_is_reset_in_progress(pf->state)) 1735 vsi->stat_offsets_loaded = false; 1736 1737 ice_stat_update40(hw, GLV_GORCL(vsi_num), vsi->stat_offsets_loaded, 1738 &prev_es->rx_bytes, &cur_es->rx_bytes); 1739 1740 ice_stat_update40(hw, GLV_UPRCL(vsi_num), vsi->stat_offsets_loaded, 1741 &prev_es->rx_unicast, &cur_es->rx_unicast); 1742 1743 ice_stat_update40(hw, GLV_MPRCL(vsi_num), vsi->stat_offsets_loaded, 1744 &prev_es->rx_multicast, &cur_es->rx_multicast); 1745 1746 ice_stat_update40(hw, GLV_BPRCL(vsi_num), vsi->stat_offsets_loaded, 1747 &prev_es->rx_broadcast, &cur_es->rx_broadcast); 1748 1749 ice_stat_update32(hw, GLV_RDPC(vsi_num), vsi->stat_offsets_loaded, 1750 &prev_es->rx_discards, &cur_es->rx_discards); 1751 1752 ice_stat_update40(hw, GLV_GOTCL(vsi_num), vsi->stat_offsets_loaded, 1753 &prev_es->tx_bytes, &cur_es->tx_bytes); 1754 1755 ice_stat_update40(hw, GLV_UPTCL(vsi_num), vsi->stat_offsets_loaded, 1756 &prev_es->tx_unicast, &cur_es->tx_unicast); 1757 1758 ice_stat_update40(hw, GLV_MPTCL(vsi_num), vsi->stat_offsets_loaded, 1759 &prev_es->tx_multicast, &cur_es->tx_multicast); 1760 1761 ice_stat_update40(hw, GLV_BPTCL(vsi_num), vsi->stat_offsets_loaded, 1762 &prev_es->tx_broadcast, &cur_es->tx_broadcast); 1763 1764 ice_stat_update32(hw, GLV_TEPC(vsi_num), vsi->stat_offsets_loaded, 1765 &prev_es->tx_errors, &cur_es->tx_errors); 1766 1767 vsi->stat_offsets_loaded = true; 1768 } 1769 1770 /** 1771 * ice_write_qrxflxp_cntxt - write/configure QRXFLXP_CNTXT register 1772 * @hw: HW pointer 1773 * @pf_q: index of the Rx queue in the PF's queue space 1774 * @rxdid: flexible descriptor RXDID 1775 * @prio: priority for the RXDID for this queue 1776 * @ena_ts: true to enable timestamp and false to disable timestamp 1777 */ 1778 void 1779 ice_write_qrxflxp_cntxt(struct ice_hw *hw, u16 pf_q, u32 rxdid, u32 prio, 1780 bool ena_ts) 1781 { 1782 int regval = rd32(hw, QRXFLXP_CNTXT(pf_q)); 1783 1784 /* clear any previous values */ 1785 regval &= ~(QRXFLXP_CNTXT_RXDID_IDX_M | 1786 QRXFLXP_CNTXT_RXDID_PRIO_M | 1787 QRXFLXP_CNTXT_TS_M); 1788 1789 regval |= FIELD_PREP(QRXFLXP_CNTXT_RXDID_IDX_M, rxdid); 1790 regval |= FIELD_PREP(QRXFLXP_CNTXT_RXDID_PRIO_M, prio); 1791 1792 if (ena_ts) 1793 /* Enable TimeSync on this queue */ 1794 regval |= QRXFLXP_CNTXT_TS_M; 1795 1796 wr32(hw, QRXFLXP_CNTXT(pf_q), regval); 1797 } 1798 1799 /** 1800 * ice_intrl_usec_to_reg - convert interrupt rate limit to register value 1801 * @intrl: interrupt rate limit in usecs 1802 * @gran: interrupt rate limit granularity in usecs 1803 * 1804 * This function converts a decimal interrupt rate limit in usecs to the format 1805 * expected by firmware. 1806 */ 1807 static u32 ice_intrl_usec_to_reg(u8 intrl, u8 gran) 1808 { 1809 u32 val = intrl / gran; 1810 1811 if (val) 1812 return val | GLINT_RATE_INTRL_ENA_M; 1813 return 0; 1814 } 1815 1816 /** 1817 * ice_write_intrl - write throttle rate limit to interrupt specific register 1818 * @q_vector: pointer to interrupt specific structure 1819 * @intrl: throttle rate limit in microseconds to write 1820 */ 1821 void ice_write_intrl(struct ice_q_vector *q_vector, u8 intrl) 1822 { 1823 struct ice_hw *hw = &q_vector->vsi->back->hw; 1824 1825 wr32(hw, GLINT_RATE(q_vector->reg_idx), 1826 ice_intrl_usec_to_reg(intrl, ICE_INTRL_GRAN_ABOVE_25)); 1827 } 1828 1829 static struct ice_q_vector *ice_pull_qvec_from_rc(struct ice_ring_container *rc) 1830 { 1831 switch (rc->type) { 1832 case ICE_RX_CONTAINER: 1833 if (rc->rx_ring) 1834 return rc->rx_ring->q_vector; 1835 break; 1836 case ICE_TX_CONTAINER: 1837 if (rc->tx_ring) 1838 return rc->tx_ring->q_vector; 1839 break; 1840 default: 1841 break; 1842 } 1843 1844 return NULL; 1845 } 1846 1847 /** 1848 * __ice_write_itr - write throttle rate to register 1849 * @q_vector: pointer to interrupt data structure 1850 * @rc: pointer to ring container 1851 * @itr: throttle rate in microseconds to write 1852 */ 1853 static void __ice_write_itr(struct ice_q_vector *q_vector, 1854 struct ice_ring_container *rc, u16 itr) 1855 { 1856 struct ice_hw *hw = &q_vector->vsi->back->hw; 1857 1858 wr32(hw, GLINT_ITR(rc->itr_idx, q_vector->reg_idx), 1859 ITR_REG_ALIGN(itr) >> ICE_ITR_GRAN_S); 1860 } 1861 1862 /** 1863 * ice_write_itr - write throttle rate to queue specific register 1864 * @rc: pointer to ring container 1865 * @itr: throttle rate in microseconds to write 1866 */ 1867 void ice_write_itr(struct ice_ring_container *rc, u16 itr) 1868 { 1869 struct ice_q_vector *q_vector; 1870 1871 q_vector = ice_pull_qvec_from_rc(rc); 1872 if (!q_vector) 1873 return; 1874 1875 __ice_write_itr(q_vector, rc, itr); 1876 } 1877 1878 /** 1879 * ice_set_q_vector_intrl - set up interrupt rate limiting 1880 * @q_vector: the vector to be configured 1881 * 1882 * Interrupt rate limiting is local to the vector, not per-queue so we must 1883 * detect if either ring container has dynamic moderation enabled to decide 1884 * what to set the interrupt rate limit to via INTRL settings. In the case that 1885 * dynamic moderation is disabled on both, write the value with the cached 1886 * setting to make sure INTRL register matches the user visible value. 1887 */ 1888 void ice_set_q_vector_intrl(struct ice_q_vector *q_vector) 1889 { 1890 if (ITR_IS_DYNAMIC(&q_vector->tx) || ITR_IS_DYNAMIC(&q_vector->rx)) { 1891 /* in the case of dynamic enabled, cap each vector to no more 1892 * than (4 us) 250,000 ints/sec, which allows low latency 1893 * but still less than 500,000 interrupts per second, which 1894 * reduces CPU a bit in the case of the lowest latency 1895 * setting. The 4 here is a value in microseconds. 1896 */ 1897 ice_write_intrl(q_vector, 4); 1898 } else { 1899 ice_write_intrl(q_vector, q_vector->intrl); 1900 } 1901 } 1902 1903 /** 1904 * ice_vsi_cfg_msix - MSIX mode Interrupt Config in the HW 1905 * @vsi: the VSI being configured 1906 * 1907 * This configures MSIX mode interrupts for the PF VSI, and should not be used 1908 * for the VF VSI. 1909 */ 1910 void ice_vsi_cfg_msix(struct ice_vsi *vsi) 1911 { 1912 struct ice_pf *pf = vsi->back; 1913 struct ice_hw *hw = &pf->hw; 1914 u16 txq = 0, rxq = 0; 1915 int i, q; 1916 1917 ice_for_each_q_vector(vsi, i) { 1918 struct ice_q_vector *q_vector = vsi->q_vectors[i]; 1919 u16 reg_idx = q_vector->reg_idx; 1920 1921 ice_cfg_itr(hw, q_vector); 1922 1923 /* Both Transmit Queue Interrupt Cause Control register 1924 * and Receive Queue Interrupt Cause control register 1925 * expects MSIX_INDX field to be the vector index 1926 * within the function space and not the absolute 1927 * vector index across PF or across device. 1928 * For SR-IOV VF VSIs queue vector index always starts 1929 * with 1 since first vector index(0) is used for OICR 1930 * in VF space. Since VMDq and other PF VSIs are within 1931 * the PF function space, use the vector index that is 1932 * tracked for this PF. 1933 */ 1934 for (q = 0; q < q_vector->num_ring_tx; q++) { 1935 ice_cfg_txq_interrupt(vsi, txq, reg_idx, 1936 q_vector->tx.itr_idx); 1937 txq++; 1938 } 1939 1940 for (q = 0; q < q_vector->num_ring_rx; q++) { 1941 ice_cfg_rxq_interrupt(vsi, rxq, reg_idx, 1942 q_vector->rx.itr_idx); 1943 rxq++; 1944 } 1945 } 1946 } 1947 1948 /** 1949 * ice_vsi_start_all_rx_rings - start/enable all of a VSI's Rx rings 1950 * @vsi: the VSI whose rings are to be enabled 1951 * 1952 * Returns 0 on success and a negative value on error 1953 */ 1954 int ice_vsi_start_all_rx_rings(struct ice_vsi *vsi) 1955 { 1956 return ice_vsi_ctrl_all_rx_rings(vsi, true); 1957 } 1958 1959 /** 1960 * ice_vsi_stop_all_rx_rings - stop/disable all of a VSI's Rx rings 1961 * @vsi: the VSI whose rings are to be disabled 1962 * 1963 * Returns 0 on success and a negative value on error 1964 */ 1965 int ice_vsi_stop_all_rx_rings(struct ice_vsi *vsi) 1966 { 1967 return ice_vsi_ctrl_all_rx_rings(vsi, false); 1968 } 1969 1970 /** 1971 * ice_vsi_stop_tx_rings - Disable Tx rings 1972 * @vsi: the VSI being configured 1973 * @rst_src: reset source 1974 * @rel_vmvf_num: Relative ID of VF/VM 1975 * @rings: Tx ring array to be stopped 1976 * @count: number of Tx ring array elements 1977 */ 1978 static int 1979 ice_vsi_stop_tx_rings(struct ice_vsi *vsi, enum ice_disq_rst_src rst_src, 1980 u16 rel_vmvf_num, struct ice_tx_ring **rings, u16 count) 1981 { 1982 u16 q_idx; 1983 1984 if (vsi->num_txq > ICE_LAN_TXQ_MAX_QDIS) 1985 return -EINVAL; 1986 1987 for (q_idx = 0; q_idx < count; q_idx++) { 1988 struct ice_txq_meta txq_meta = { }; 1989 int status; 1990 1991 if (!rings || !rings[q_idx]) 1992 return -EINVAL; 1993 1994 ice_fill_txq_meta(vsi, rings[q_idx], &txq_meta); 1995 status = ice_vsi_stop_tx_ring(vsi, rst_src, rel_vmvf_num, 1996 rings[q_idx], &txq_meta); 1997 1998 if (status) 1999 return status; 2000 } 2001 2002 return 0; 2003 } 2004 2005 /** 2006 * ice_vsi_stop_lan_tx_rings - Disable LAN Tx rings 2007 * @vsi: the VSI being configured 2008 * @rst_src: reset source 2009 * @rel_vmvf_num: Relative ID of VF/VM 2010 */ 2011 int 2012 ice_vsi_stop_lan_tx_rings(struct ice_vsi *vsi, enum ice_disq_rst_src rst_src, 2013 u16 rel_vmvf_num) 2014 { 2015 return ice_vsi_stop_tx_rings(vsi, rst_src, rel_vmvf_num, vsi->tx_rings, vsi->num_txq); 2016 } 2017 2018 /** 2019 * ice_vsi_stop_xdp_tx_rings - Disable XDP Tx rings 2020 * @vsi: the VSI being configured 2021 */ 2022 int ice_vsi_stop_xdp_tx_rings(struct ice_vsi *vsi) 2023 { 2024 return ice_vsi_stop_tx_rings(vsi, ICE_NO_RESET, 0, vsi->xdp_rings, vsi->num_xdp_txq); 2025 } 2026 2027 /** 2028 * ice_vsi_is_rx_queue_active 2029 * @vsi: the VSI being configured 2030 * 2031 * Return true if at least one queue is active. 2032 */ 2033 bool ice_vsi_is_rx_queue_active(struct ice_vsi *vsi) 2034 { 2035 struct ice_pf *pf = vsi->back; 2036 struct ice_hw *hw = &pf->hw; 2037 int i; 2038 2039 ice_for_each_rxq(vsi, i) { 2040 u32 rx_reg; 2041 int pf_q; 2042 2043 pf_q = vsi->rxq_map[i]; 2044 rx_reg = rd32(hw, QRX_CTRL(pf_q)); 2045 if (rx_reg & QRX_CTRL_QENA_STAT_M) 2046 return true; 2047 } 2048 2049 return false; 2050 } 2051 2052 static void ice_vsi_set_tc_cfg(struct ice_vsi *vsi) 2053 { 2054 if (!test_bit(ICE_FLAG_DCB_ENA, vsi->back->flags)) { 2055 vsi->tc_cfg.ena_tc = ICE_DFLT_TRAFFIC_CLASS; 2056 vsi->tc_cfg.numtc = 1; 2057 return; 2058 } 2059 2060 /* set VSI TC information based on DCB config */ 2061 ice_vsi_set_dcb_tc_cfg(vsi); 2062 } 2063 2064 /** 2065 * ice_cfg_sw_lldp - Config switch rules for LLDP packet handling 2066 * @vsi: the VSI being configured 2067 * @tx: bool to determine Tx or Rx rule 2068 * @create: bool to determine create or remove Rule 2069 */ 2070 void ice_cfg_sw_lldp(struct ice_vsi *vsi, bool tx, bool create) 2071 { 2072 int (*eth_fltr)(struct ice_vsi *v, u16 type, u16 flag, 2073 enum ice_sw_fwd_act_type act); 2074 struct ice_pf *pf = vsi->back; 2075 struct device *dev; 2076 int status; 2077 2078 dev = ice_pf_to_dev(pf); 2079 eth_fltr = create ? ice_fltr_add_eth : ice_fltr_remove_eth; 2080 2081 if (tx) { 2082 status = eth_fltr(vsi, ETH_P_LLDP, ICE_FLTR_TX, 2083 ICE_DROP_PACKET); 2084 } else { 2085 if (ice_fw_supports_lldp_fltr_ctrl(&pf->hw)) { 2086 status = ice_lldp_fltr_add_remove(&pf->hw, vsi->vsi_num, 2087 create); 2088 } else { 2089 status = eth_fltr(vsi, ETH_P_LLDP, ICE_FLTR_RX, 2090 ICE_FWD_TO_VSI); 2091 } 2092 } 2093 2094 if (status) 2095 dev_dbg(dev, "Fail %s %s LLDP rule on VSI %i error: %d\n", 2096 create ? "adding" : "removing", tx ? "TX" : "RX", 2097 vsi->vsi_num, status); 2098 } 2099 2100 /** 2101 * ice_set_agg_vsi - sets up scheduler aggregator node and move VSI into it 2102 * @vsi: pointer to the VSI 2103 * 2104 * This function will allocate new scheduler aggregator now if needed and will 2105 * move specified VSI into it. 2106 */ 2107 static void ice_set_agg_vsi(struct ice_vsi *vsi) 2108 { 2109 struct device *dev = ice_pf_to_dev(vsi->back); 2110 struct ice_agg_node *agg_node_iter = NULL; 2111 u32 agg_id = ICE_INVALID_AGG_NODE_ID; 2112 struct ice_agg_node *agg_node = NULL; 2113 int node_offset, max_agg_nodes = 0; 2114 struct ice_port_info *port_info; 2115 struct ice_pf *pf = vsi->back; 2116 u32 agg_node_id_start = 0; 2117 int status; 2118 2119 /* create (as needed) scheduler aggregator node and move VSI into 2120 * corresponding aggregator node 2121 * - PF aggregator node to contains VSIs of type _PF and _CTRL 2122 * - VF aggregator nodes will contain VF VSI 2123 */ 2124 port_info = pf->hw.port_info; 2125 if (!port_info) 2126 return; 2127 2128 switch (vsi->type) { 2129 case ICE_VSI_CTRL: 2130 case ICE_VSI_CHNL: 2131 case ICE_VSI_LB: 2132 case ICE_VSI_PF: 2133 case ICE_VSI_SF: 2134 max_agg_nodes = ICE_MAX_PF_AGG_NODES; 2135 agg_node_id_start = ICE_PF_AGG_NODE_ID_START; 2136 agg_node_iter = &pf->pf_agg_node[0]; 2137 break; 2138 case ICE_VSI_VF: 2139 /* user can create 'n' VFs on a given PF, but since max children 2140 * per aggregator node can be only 64. Following code handles 2141 * aggregator(s) for VF VSIs, either selects a agg_node which 2142 * was already created provided num_vsis < 64, otherwise 2143 * select next available node, which will be created 2144 */ 2145 max_agg_nodes = ICE_MAX_VF_AGG_NODES; 2146 agg_node_id_start = ICE_VF_AGG_NODE_ID_START; 2147 agg_node_iter = &pf->vf_agg_node[0]; 2148 break; 2149 default: 2150 /* other VSI type, handle later if needed */ 2151 dev_dbg(dev, "unexpected VSI type %s\n", 2152 ice_vsi_type_str(vsi->type)); 2153 return; 2154 } 2155 2156 /* find the appropriate aggregator node */ 2157 for (node_offset = 0; node_offset < max_agg_nodes; node_offset++) { 2158 /* see if we can find space in previously created 2159 * node if num_vsis < 64, otherwise skip 2160 */ 2161 if (agg_node_iter->num_vsis && 2162 agg_node_iter->num_vsis == ICE_MAX_VSIS_IN_AGG_NODE) { 2163 agg_node_iter++; 2164 continue; 2165 } 2166 2167 if (agg_node_iter->valid && 2168 agg_node_iter->agg_id != ICE_INVALID_AGG_NODE_ID) { 2169 agg_id = agg_node_iter->agg_id; 2170 agg_node = agg_node_iter; 2171 break; 2172 } 2173 2174 /* find unclaimed agg_id */ 2175 if (agg_node_iter->agg_id == ICE_INVALID_AGG_NODE_ID) { 2176 agg_id = node_offset + agg_node_id_start; 2177 agg_node = agg_node_iter; 2178 break; 2179 } 2180 /* move to next agg_node */ 2181 agg_node_iter++; 2182 } 2183 2184 if (!agg_node) 2185 return; 2186 2187 /* if selected aggregator node was not created, create it */ 2188 if (!agg_node->valid) { 2189 status = ice_cfg_agg(port_info, agg_id, ICE_AGG_TYPE_AGG, 2190 (u8)vsi->tc_cfg.ena_tc); 2191 if (status) { 2192 dev_err(dev, "unable to create aggregator node with agg_id %u\n", 2193 agg_id); 2194 return; 2195 } 2196 /* aggregator node is created, store the needed info */ 2197 agg_node->valid = true; 2198 agg_node->agg_id = agg_id; 2199 } 2200 2201 /* move VSI to corresponding aggregator node */ 2202 status = ice_move_vsi_to_agg(port_info, agg_id, vsi->idx, 2203 (u8)vsi->tc_cfg.ena_tc); 2204 if (status) { 2205 dev_err(dev, "unable to move VSI idx %u into aggregator %u node", 2206 vsi->idx, agg_id); 2207 return; 2208 } 2209 2210 /* keep active children count for aggregator node */ 2211 agg_node->num_vsis++; 2212 2213 /* cache the 'agg_id' in VSI, so that after reset - VSI will be moved 2214 * to aggregator node 2215 */ 2216 vsi->agg_node = agg_node; 2217 dev_dbg(dev, "successfully moved VSI idx %u tc_bitmap 0x%x) into aggregator node %d which has num_vsis %u\n", 2218 vsi->idx, vsi->tc_cfg.ena_tc, vsi->agg_node->agg_id, 2219 vsi->agg_node->num_vsis); 2220 } 2221 2222 static int ice_vsi_cfg_tc_lan(struct ice_pf *pf, struct ice_vsi *vsi) 2223 { 2224 u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 }; 2225 struct device *dev = ice_pf_to_dev(pf); 2226 int ret, i; 2227 2228 /* configure VSI nodes based on number of queues and TC's */ 2229 ice_for_each_traffic_class(i) { 2230 if (!(vsi->tc_cfg.ena_tc & BIT(i))) 2231 continue; 2232 2233 if (vsi->type == ICE_VSI_CHNL) { 2234 if (!vsi->alloc_txq && vsi->num_txq) 2235 max_txqs[i] = vsi->num_txq; 2236 else 2237 max_txqs[i] = pf->num_lan_tx; 2238 } else { 2239 max_txqs[i] = vsi->alloc_txq; 2240 } 2241 2242 if (vsi->type == ICE_VSI_PF) 2243 max_txqs[i] += vsi->num_xdp_txq; 2244 } 2245 2246 dev_dbg(dev, "vsi->tc_cfg.ena_tc = %d\n", vsi->tc_cfg.ena_tc); 2247 ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, vsi->tc_cfg.ena_tc, 2248 max_txqs); 2249 if (ret) { 2250 dev_err(dev, "VSI %d failed lan queue config, error %d\n", 2251 vsi->vsi_num, ret); 2252 return ret; 2253 } 2254 2255 return 0; 2256 } 2257 2258 /** 2259 * ice_vsi_cfg_def - configure default VSI based on the type 2260 * @vsi: pointer to VSI 2261 */ 2262 static int ice_vsi_cfg_def(struct ice_vsi *vsi) 2263 { 2264 struct device *dev = ice_pf_to_dev(vsi->back); 2265 struct ice_pf *pf = vsi->back; 2266 int ret; 2267 2268 vsi->vsw = pf->first_sw; 2269 2270 ret = ice_vsi_alloc_def(vsi, vsi->ch); 2271 if (ret) 2272 return ret; 2273 2274 /* allocate memory for Tx/Rx ring stat pointers */ 2275 ret = ice_vsi_alloc_stat_arrays(vsi); 2276 if (ret) 2277 goto unroll_vsi_alloc; 2278 2279 ice_alloc_fd_res(vsi); 2280 2281 ret = ice_vsi_get_qs(vsi); 2282 if (ret) { 2283 dev_err(dev, "Failed to allocate queues. vsi->idx = %d\n", 2284 vsi->idx); 2285 goto unroll_vsi_alloc_stat; 2286 } 2287 2288 /* set RSS capabilities */ 2289 ice_vsi_set_rss_params(vsi); 2290 2291 /* set TC configuration */ 2292 ice_vsi_set_tc_cfg(vsi); 2293 2294 /* create the VSI */ 2295 ret = ice_vsi_init(vsi, vsi->flags); 2296 if (ret) 2297 goto unroll_get_qs; 2298 2299 ice_vsi_init_vlan_ops(vsi); 2300 2301 switch (vsi->type) { 2302 case ICE_VSI_CTRL: 2303 case ICE_VSI_SF: 2304 case ICE_VSI_PF: 2305 ret = ice_vsi_alloc_q_vectors(vsi); 2306 if (ret) 2307 goto unroll_vsi_init; 2308 2309 ret = ice_vsi_alloc_rings(vsi); 2310 if (ret) 2311 goto unroll_vector_base; 2312 2313 ret = ice_vsi_alloc_ring_stats(vsi); 2314 if (ret) 2315 goto unroll_vector_base; 2316 2317 if (ice_is_xdp_ena_vsi(vsi)) { 2318 ret = ice_vsi_determine_xdp_res(vsi); 2319 if (ret) 2320 goto unroll_vector_base; 2321 ret = ice_prepare_xdp_rings(vsi, vsi->xdp_prog, 2322 ICE_XDP_CFG_PART); 2323 if (ret) 2324 goto unroll_vector_base; 2325 } 2326 2327 ice_vsi_map_rings_to_vectors(vsi); 2328 2329 vsi->stat_offsets_loaded = false; 2330 2331 /* ICE_VSI_CTRL does not need RSS so skip RSS processing */ 2332 if (vsi->type != ICE_VSI_CTRL) 2333 /* Do not exit if configuring RSS had an issue, at 2334 * least receive traffic on first queue. Hence no 2335 * need to capture return value 2336 */ 2337 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) { 2338 ice_vsi_cfg_rss_lut_key(vsi); 2339 ice_vsi_set_rss_flow_fld(vsi); 2340 } 2341 ice_init_arfs(vsi); 2342 break; 2343 case ICE_VSI_CHNL: 2344 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) { 2345 ice_vsi_cfg_rss_lut_key(vsi); 2346 ice_vsi_set_rss_flow_fld(vsi); 2347 } 2348 break; 2349 case ICE_VSI_VF: 2350 /* VF driver will take care of creating netdev for this type and 2351 * map queues to vectors through Virtchnl, PF driver only 2352 * creates a VSI and corresponding structures for bookkeeping 2353 * purpose 2354 */ 2355 ret = ice_vsi_alloc_q_vectors(vsi); 2356 if (ret) 2357 goto unroll_vsi_init; 2358 2359 ret = ice_vsi_alloc_rings(vsi); 2360 if (ret) 2361 goto unroll_alloc_q_vector; 2362 2363 ret = ice_vsi_alloc_ring_stats(vsi); 2364 if (ret) 2365 goto unroll_vector_base; 2366 2367 vsi->stat_offsets_loaded = false; 2368 2369 /* Do not exit if configuring RSS had an issue, at least 2370 * receive traffic on first queue. Hence no need to capture 2371 * return value 2372 */ 2373 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) { 2374 ice_vsi_cfg_rss_lut_key(vsi); 2375 ice_vsi_set_vf_rss_flow_fld(vsi); 2376 } 2377 break; 2378 case ICE_VSI_LB: 2379 ret = ice_vsi_alloc_rings(vsi); 2380 if (ret) 2381 goto unroll_vsi_init; 2382 2383 ret = ice_vsi_alloc_ring_stats(vsi); 2384 if (ret) 2385 goto unroll_vector_base; 2386 2387 break; 2388 default: 2389 /* clean up the resources and exit */ 2390 ret = -EINVAL; 2391 goto unroll_vsi_init; 2392 } 2393 2394 return 0; 2395 2396 unroll_vector_base: 2397 /* reclaim SW interrupts back to the common pool */ 2398 unroll_alloc_q_vector: 2399 ice_vsi_free_q_vectors(vsi); 2400 unroll_vsi_init: 2401 ice_vsi_delete_from_hw(vsi); 2402 unroll_get_qs: 2403 ice_vsi_put_qs(vsi); 2404 unroll_vsi_alloc_stat: 2405 ice_vsi_free_stats(vsi); 2406 unroll_vsi_alloc: 2407 ice_vsi_free_arrays(vsi); 2408 return ret; 2409 } 2410 2411 /** 2412 * ice_vsi_cfg - configure a previously allocated VSI 2413 * @vsi: pointer to VSI 2414 */ 2415 int ice_vsi_cfg(struct ice_vsi *vsi) 2416 { 2417 struct ice_pf *pf = vsi->back; 2418 int ret; 2419 2420 if (WARN_ON(vsi->type == ICE_VSI_VF && !vsi->vf)) 2421 return -EINVAL; 2422 2423 ret = ice_vsi_cfg_def(vsi); 2424 if (ret) 2425 return ret; 2426 2427 ret = ice_vsi_cfg_tc_lan(vsi->back, vsi); 2428 if (ret) 2429 ice_vsi_decfg(vsi); 2430 2431 if (vsi->type == ICE_VSI_CTRL) { 2432 if (vsi->vf) { 2433 WARN_ON(vsi->vf->ctrl_vsi_idx != ICE_NO_VSI); 2434 vsi->vf->ctrl_vsi_idx = vsi->idx; 2435 } else { 2436 WARN_ON(pf->ctrl_vsi_idx != ICE_NO_VSI); 2437 pf->ctrl_vsi_idx = vsi->idx; 2438 } 2439 } 2440 2441 return ret; 2442 } 2443 2444 /** 2445 * ice_vsi_decfg - remove all VSI configuration 2446 * @vsi: pointer to VSI 2447 */ 2448 void ice_vsi_decfg(struct ice_vsi *vsi) 2449 { 2450 struct ice_pf *pf = vsi->back; 2451 int err; 2452 2453 ice_rm_vsi_lan_cfg(vsi->port_info, vsi->idx); 2454 err = ice_rm_vsi_rdma_cfg(vsi->port_info, vsi->idx); 2455 if (err) 2456 dev_err(ice_pf_to_dev(pf), "Failed to remove RDMA scheduler config for VSI %u, err %d\n", 2457 vsi->vsi_num, err); 2458 2459 if (vsi->xdp_rings) 2460 /* return value check can be skipped here, it always returns 2461 * 0 if reset is in progress 2462 */ 2463 ice_destroy_xdp_rings(vsi, ICE_XDP_CFG_PART); 2464 2465 ice_vsi_clear_rings(vsi); 2466 ice_vsi_free_q_vectors(vsi); 2467 ice_vsi_put_qs(vsi); 2468 ice_vsi_free_arrays(vsi); 2469 2470 /* SR-IOV determines needed MSIX resources all at once instead of per 2471 * VSI since when VFs are spawned we know how many VFs there are and how 2472 * many interrupts each VF needs. SR-IOV MSIX resources are also 2473 * cleared in the same manner. 2474 */ 2475 2476 if (vsi->type == ICE_VSI_VF && 2477 vsi->agg_node && vsi->agg_node->valid) 2478 vsi->agg_node->num_vsis--; 2479 } 2480 2481 /** 2482 * ice_vsi_setup - Set up a VSI by a given type 2483 * @pf: board private structure 2484 * @params: parameters to use when creating the VSI 2485 * 2486 * This allocates the sw VSI structure and its queue resources. 2487 * 2488 * Returns pointer to the successfully allocated and configured VSI sw struct on 2489 * success, NULL on failure. 2490 */ 2491 struct ice_vsi * 2492 ice_vsi_setup(struct ice_pf *pf, struct ice_vsi_cfg_params *params) 2493 { 2494 struct device *dev = ice_pf_to_dev(pf); 2495 struct ice_vsi *vsi; 2496 int ret; 2497 2498 /* ice_vsi_setup can only initialize a new VSI, and we must have 2499 * a port_info structure for it. 2500 */ 2501 if (WARN_ON(!(params->flags & ICE_VSI_FLAG_INIT)) || 2502 WARN_ON(!params->port_info)) 2503 return NULL; 2504 2505 vsi = ice_vsi_alloc(pf); 2506 if (!vsi) { 2507 dev_err(dev, "could not allocate VSI\n"); 2508 return NULL; 2509 } 2510 2511 vsi->params = *params; 2512 ret = ice_vsi_cfg(vsi); 2513 if (ret) 2514 goto err_vsi_cfg; 2515 2516 /* Add switch rule to drop all Tx Flow Control Frames, of look up 2517 * type ETHERTYPE from VSIs, and restrict malicious VF from sending 2518 * out PAUSE or PFC frames. If enabled, FW can still send FC frames. 2519 * The rule is added once for PF VSI in order to create appropriate 2520 * recipe, since VSI/VSI list is ignored with drop action... 2521 * Also add rules to handle LLDP Tx packets. Tx LLDP packets need to 2522 * be dropped so that VFs cannot send LLDP packets to reconfig DCB 2523 * settings in the HW. 2524 */ 2525 if (!ice_is_safe_mode(pf) && vsi->type == ICE_VSI_PF) { 2526 ice_fltr_add_eth(vsi, ETH_P_PAUSE, ICE_FLTR_TX, 2527 ICE_DROP_PACKET); 2528 ice_cfg_sw_lldp(vsi, true, true); 2529 } 2530 2531 if (!vsi->agg_node) 2532 ice_set_agg_vsi(vsi); 2533 2534 return vsi; 2535 2536 err_vsi_cfg: 2537 ice_vsi_free(vsi); 2538 2539 return NULL; 2540 } 2541 2542 /** 2543 * ice_vsi_release_msix - Clear the queue to Interrupt mapping in HW 2544 * @vsi: the VSI being cleaned up 2545 */ 2546 static void ice_vsi_release_msix(struct ice_vsi *vsi) 2547 { 2548 struct ice_pf *pf = vsi->back; 2549 struct ice_hw *hw = &pf->hw; 2550 u32 txq = 0; 2551 u32 rxq = 0; 2552 int i, q; 2553 2554 ice_for_each_q_vector(vsi, i) { 2555 struct ice_q_vector *q_vector = vsi->q_vectors[i]; 2556 2557 ice_write_intrl(q_vector, 0); 2558 for (q = 0; q < q_vector->num_ring_tx; q++) { 2559 ice_write_itr(&q_vector->tx, 0); 2560 wr32(hw, QINT_TQCTL(vsi->txq_map[txq]), 0); 2561 if (vsi->xdp_rings) { 2562 u32 xdp_txq = txq + vsi->num_xdp_txq; 2563 2564 wr32(hw, QINT_TQCTL(vsi->txq_map[xdp_txq]), 0); 2565 } 2566 txq++; 2567 } 2568 2569 for (q = 0; q < q_vector->num_ring_rx; q++) { 2570 ice_write_itr(&q_vector->rx, 0); 2571 wr32(hw, QINT_RQCTL(vsi->rxq_map[rxq]), 0); 2572 rxq++; 2573 } 2574 } 2575 2576 ice_flush(hw); 2577 } 2578 2579 /** 2580 * ice_vsi_free_irq - Free the IRQ association with the OS 2581 * @vsi: the VSI being configured 2582 */ 2583 void ice_vsi_free_irq(struct ice_vsi *vsi) 2584 { 2585 struct ice_pf *pf = vsi->back; 2586 int i; 2587 2588 if (!vsi->q_vectors || !vsi->irqs_ready) 2589 return; 2590 2591 ice_vsi_release_msix(vsi); 2592 if (vsi->type == ICE_VSI_VF) 2593 return; 2594 2595 vsi->irqs_ready = false; 2596 ice_free_cpu_rx_rmap(vsi); 2597 2598 ice_for_each_q_vector(vsi, i) { 2599 int irq_num; 2600 2601 irq_num = vsi->q_vectors[i]->irq.virq; 2602 2603 /* free only the irqs that were actually requested */ 2604 if (!vsi->q_vectors[i] || 2605 !(vsi->q_vectors[i]->num_ring_tx || 2606 vsi->q_vectors[i]->num_ring_rx)) 2607 continue; 2608 2609 /* clear the affinity notifier in the IRQ descriptor */ 2610 if (!IS_ENABLED(CONFIG_RFS_ACCEL)) 2611 irq_set_affinity_notifier(irq_num, NULL); 2612 2613 /* clear the affinity_hint in the IRQ descriptor */ 2614 irq_update_affinity_hint(irq_num, NULL); 2615 synchronize_irq(irq_num); 2616 devm_free_irq(ice_pf_to_dev(pf), irq_num, vsi->q_vectors[i]); 2617 } 2618 } 2619 2620 /** 2621 * ice_vsi_free_tx_rings - Free Tx resources for VSI queues 2622 * @vsi: the VSI having resources freed 2623 */ 2624 void ice_vsi_free_tx_rings(struct ice_vsi *vsi) 2625 { 2626 int i; 2627 2628 if (!vsi->tx_rings) 2629 return; 2630 2631 ice_for_each_txq(vsi, i) 2632 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) 2633 ice_free_tx_ring(vsi->tx_rings[i]); 2634 } 2635 2636 /** 2637 * ice_vsi_free_rx_rings - Free Rx resources for VSI queues 2638 * @vsi: the VSI having resources freed 2639 */ 2640 void ice_vsi_free_rx_rings(struct ice_vsi *vsi) 2641 { 2642 int i; 2643 2644 if (!vsi->rx_rings) 2645 return; 2646 2647 ice_for_each_rxq(vsi, i) 2648 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc) 2649 ice_free_rx_ring(vsi->rx_rings[i]); 2650 } 2651 2652 /** 2653 * ice_vsi_close - Shut down a VSI 2654 * @vsi: the VSI being shut down 2655 */ 2656 void ice_vsi_close(struct ice_vsi *vsi) 2657 { 2658 if (!test_and_set_bit(ICE_VSI_DOWN, vsi->state)) 2659 ice_down(vsi); 2660 2661 ice_vsi_clear_napi_queues(vsi); 2662 ice_vsi_free_irq(vsi); 2663 ice_vsi_free_tx_rings(vsi); 2664 ice_vsi_free_rx_rings(vsi); 2665 } 2666 2667 /** 2668 * ice_ena_vsi - resume a VSI 2669 * @vsi: the VSI being resume 2670 * @locked: is the rtnl_lock already held 2671 */ 2672 int ice_ena_vsi(struct ice_vsi *vsi, bool locked) 2673 { 2674 int err = 0; 2675 2676 if (!test_bit(ICE_VSI_NEEDS_RESTART, vsi->state)) 2677 return 0; 2678 2679 clear_bit(ICE_VSI_NEEDS_RESTART, vsi->state); 2680 2681 if (vsi->netdev && (vsi->type == ICE_VSI_PF || 2682 vsi->type == ICE_VSI_SF)) { 2683 if (netif_running(vsi->netdev)) { 2684 if (!locked) 2685 rtnl_lock(); 2686 2687 err = ice_open_internal(vsi->netdev); 2688 2689 if (!locked) 2690 rtnl_unlock(); 2691 } 2692 } else if (vsi->type == ICE_VSI_CTRL) { 2693 err = ice_vsi_open_ctrl(vsi); 2694 } 2695 2696 return err; 2697 } 2698 2699 /** 2700 * ice_dis_vsi - pause a VSI 2701 * @vsi: the VSI being paused 2702 * @locked: is the rtnl_lock already held 2703 */ 2704 void ice_dis_vsi(struct ice_vsi *vsi, bool locked) 2705 { 2706 bool already_down = test_bit(ICE_VSI_DOWN, vsi->state); 2707 2708 set_bit(ICE_VSI_NEEDS_RESTART, vsi->state); 2709 2710 if (vsi->netdev && (vsi->type == ICE_VSI_PF || 2711 vsi->type == ICE_VSI_SF)) { 2712 if (netif_running(vsi->netdev)) { 2713 if (!locked) 2714 rtnl_lock(); 2715 already_down = test_bit(ICE_VSI_DOWN, vsi->state); 2716 if (!already_down) 2717 ice_vsi_close(vsi); 2718 2719 if (!locked) 2720 rtnl_unlock(); 2721 } else if (!already_down) { 2722 ice_vsi_close(vsi); 2723 } 2724 } else if (vsi->type == ICE_VSI_CTRL && !already_down) { 2725 ice_vsi_close(vsi); 2726 } 2727 } 2728 2729 /** 2730 * ice_vsi_set_napi_queues - associate netdev queues with napi 2731 * @vsi: VSI pointer 2732 * 2733 * Associate queue[s] with napi for all vectors. 2734 * The caller must hold rtnl_lock. 2735 */ 2736 void ice_vsi_set_napi_queues(struct ice_vsi *vsi) 2737 { 2738 struct net_device *netdev = vsi->netdev; 2739 int q_idx, v_idx; 2740 2741 if (!netdev) 2742 return; 2743 2744 ice_for_each_rxq(vsi, q_idx) 2745 netif_queue_set_napi(netdev, q_idx, NETDEV_QUEUE_TYPE_RX, 2746 &vsi->rx_rings[q_idx]->q_vector->napi); 2747 2748 ice_for_each_txq(vsi, q_idx) 2749 netif_queue_set_napi(netdev, q_idx, NETDEV_QUEUE_TYPE_TX, 2750 &vsi->tx_rings[q_idx]->q_vector->napi); 2751 /* Also set the interrupt number for the NAPI */ 2752 ice_for_each_q_vector(vsi, v_idx) { 2753 struct ice_q_vector *q_vector = vsi->q_vectors[v_idx]; 2754 2755 netif_napi_set_irq(&q_vector->napi, q_vector->irq.virq); 2756 } 2757 } 2758 2759 /** 2760 * ice_vsi_clear_napi_queues - dissociate netdev queues from napi 2761 * @vsi: VSI pointer 2762 * 2763 * Clear the association between all VSI queues queue[s] and napi. 2764 * The caller must hold rtnl_lock. 2765 */ 2766 void ice_vsi_clear_napi_queues(struct ice_vsi *vsi) 2767 { 2768 struct net_device *netdev = vsi->netdev; 2769 int q_idx; 2770 2771 if (!netdev) 2772 return; 2773 2774 ice_for_each_txq(vsi, q_idx) 2775 netif_queue_set_napi(netdev, q_idx, NETDEV_QUEUE_TYPE_TX, NULL); 2776 2777 ice_for_each_rxq(vsi, q_idx) 2778 netif_queue_set_napi(netdev, q_idx, NETDEV_QUEUE_TYPE_RX, NULL); 2779 } 2780 2781 /** 2782 * ice_napi_add - register NAPI handler for the VSI 2783 * @vsi: VSI for which NAPI handler is to be registered 2784 * 2785 * This function is only called in the driver's load path. Registering the NAPI 2786 * handler is done in ice_vsi_alloc_q_vector() for all other cases (i.e. resume, 2787 * reset/rebuild, etc.) 2788 */ 2789 void ice_napi_add(struct ice_vsi *vsi) 2790 { 2791 int v_idx; 2792 2793 if (!vsi->netdev) 2794 return; 2795 2796 ice_for_each_q_vector(vsi, v_idx) 2797 netif_napi_add_config(vsi->netdev, 2798 &vsi->q_vectors[v_idx]->napi, 2799 ice_napi_poll, 2800 v_idx); 2801 } 2802 2803 /** 2804 * ice_vsi_release - Delete a VSI and free its resources 2805 * @vsi: the VSI being removed 2806 * 2807 * Returns 0 on success or < 0 on error 2808 */ 2809 int ice_vsi_release(struct ice_vsi *vsi) 2810 { 2811 struct ice_pf *pf; 2812 2813 if (!vsi->back) 2814 return -ENODEV; 2815 pf = vsi->back; 2816 2817 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) 2818 ice_rss_clean(vsi); 2819 2820 ice_vsi_close(vsi); 2821 2822 /* The Rx rule will only exist to remove if the LLDP FW 2823 * engine is currently stopped 2824 */ 2825 if (!ice_is_safe_mode(pf) && vsi->type == ICE_VSI_PF && 2826 !test_bit(ICE_FLAG_FW_LLDP_AGENT, pf->flags)) 2827 ice_cfg_sw_lldp(vsi, false, false); 2828 2829 ice_vsi_decfg(vsi); 2830 2831 /* retain SW VSI data structure since it is needed to unregister and 2832 * free VSI netdev when PF is not in reset recovery pending state,\ 2833 * for ex: during rmmod. 2834 */ 2835 if (!ice_is_reset_in_progress(pf->state)) 2836 ice_vsi_delete(vsi); 2837 2838 return 0; 2839 } 2840 2841 /** 2842 * ice_vsi_rebuild_get_coalesce - get coalesce from all q_vectors 2843 * @vsi: VSI connected with q_vectors 2844 * @coalesce: array of struct with stored coalesce 2845 * 2846 * Returns array size. 2847 */ 2848 static int 2849 ice_vsi_rebuild_get_coalesce(struct ice_vsi *vsi, 2850 struct ice_coalesce_stored *coalesce) 2851 { 2852 int i; 2853 2854 ice_for_each_q_vector(vsi, i) { 2855 struct ice_q_vector *q_vector = vsi->q_vectors[i]; 2856 2857 coalesce[i].itr_tx = q_vector->tx.itr_settings; 2858 coalesce[i].itr_rx = q_vector->rx.itr_settings; 2859 coalesce[i].intrl = q_vector->intrl; 2860 2861 if (i < vsi->num_txq) 2862 coalesce[i].tx_valid = true; 2863 if (i < vsi->num_rxq) 2864 coalesce[i].rx_valid = true; 2865 } 2866 2867 return vsi->num_q_vectors; 2868 } 2869 2870 /** 2871 * ice_vsi_rebuild_set_coalesce - set coalesce from earlier saved arrays 2872 * @vsi: VSI connected with q_vectors 2873 * @coalesce: pointer to array of struct with stored coalesce 2874 * @size: size of coalesce array 2875 * 2876 * Before this function, ice_vsi_rebuild_get_coalesce should be called to save 2877 * ITR params in arrays. If size is 0 or coalesce wasn't stored set coalesce 2878 * to default value. 2879 */ 2880 static void 2881 ice_vsi_rebuild_set_coalesce(struct ice_vsi *vsi, 2882 struct ice_coalesce_stored *coalesce, int size) 2883 { 2884 struct ice_ring_container *rc; 2885 int i; 2886 2887 if ((size && !coalesce) || !vsi) 2888 return; 2889 2890 /* There are a couple of cases that have to be handled here: 2891 * 1. The case where the number of queue vectors stays the same, but 2892 * the number of Tx or Rx rings changes (the first for loop) 2893 * 2. The case where the number of queue vectors increased (the 2894 * second for loop) 2895 */ 2896 for (i = 0; i < size && i < vsi->num_q_vectors; i++) { 2897 /* There are 2 cases to handle here and they are the same for 2898 * both Tx and Rx: 2899 * if the entry was valid previously (coalesce[i].[tr]x_valid 2900 * and the loop variable is less than the number of rings 2901 * allocated, then write the previous values 2902 * 2903 * if the entry was not valid previously, but the number of 2904 * rings is less than are allocated (this means the number of 2905 * rings increased from previously), then write out the 2906 * values in the first element 2907 * 2908 * Also, always write the ITR, even if in ITR_IS_DYNAMIC 2909 * as there is no harm because the dynamic algorithm 2910 * will just overwrite. 2911 */ 2912 if (i < vsi->alloc_rxq && coalesce[i].rx_valid) { 2913 rc = &vsi->q_vectors[i]->rx; 2914 rc->itr_settings = coalesce[i].itr_rx; 2915 ice_write_itr(rc, rc->itr_setting); 2916 } else if (i < vsi->alloc_rxq) { 2917 rc = &vsi->q_vectors[i]->rx; 2918 rc->itr_settings = coalesce[0].itr_rx; 2919 ice_write_itr(rc, rc->itr_setting); 2920 } 2921 2922 if (i < vsi->alloc_txq && coalesce[i].tx_valid) { 2923 rc = &vsi->q_vectors[i]->tx; 2924 rc->itr_settings = coalesce[i].itr_tx; 2925 ice_write_itr(rc, rc->itr_setting); 2926 } else if (i < vsi->alloc_txq) { 2927 rc = &vsi->q_vectors[i]->tx; 2928 rc->itr_settings = coalesce[0].itr_tx; 2929 ice_write_itr(rc, rc->itr_setting); 2930 } 2931 2932 vsi->q_vectors[i]->intrl = coalesce[i].intrl; 2933 ice_set_q_vector_intrl(vsi->q_vectors[i]); 2934 } 2935 2936 /* the number of queue vectors increased so write whatever is in 2937 * the first element 2938 */ 2939 for (; i < vsi->num_q_vectors; i++) { 2940 /* transmit */ 2941 rc = &vsi->q_vectors[i]->tx; 2942 rc->itr_settings = coalesce[0].itr_tx; 2943 ice_write_itr(rc, rc->itr_setting); 2944 2945 /* receive */ 2946 rc = &vsi->q_vectors[i]->rx; 2947 rc->itr_settings = coalesce[0].itr_rx; 2948 ice_write_itr(rc, rc->itr_setting); 2949 2950 vsi->q_vectors[i]->intrl = coalesce[0].intrl; 2951 ice_set_q_vector_intrl(vsi->q_vectors[i]); 2952 } 2953 } 2954 2955 /** 2956 * ice_vsi_realloc_stat_arrays - Frees unused stat structures or alloc new ones 2957 * @vsi: VSI pointer 2958 */ 2959 static int 2960 ice_vsi_realloc_stat_arrays(struct ice_vsi *vsi) 2961 { 2962 u16 req_txq = vsi->req_txq ? vsi->req_txq : vsi->alloc_txq; 2963 u16 req_rxq = vsi->req_rxq ? vsi->req_rxq : vsi->alloc_rxq; 2964 struct ice_ring_stats **tx_ring_stats; 2965 struct ice_ring_stats **rx_ring_stats; 2966 struct ice_vsi_stats *vsi_stat; 2967 struct ice_pf *pf = vsi->back; 2968 u16 prev_txq = vsi->alloc_txq; 2969 u16 prev_rxq = vsi->alloc_rxq; 2970 int i; 2971 2972 vsi_stat = pf->vsi_stats[vsi->idx]; 2973 2974 if (req_txq < prev_txq) { 2975 for (i = req_txq; i < prev_txq; i++) { 2976 if (vsi_stat->tx_ring_stats[i]) { 2977 kfree_rcu(vsi_stat->tx_ring_stats[i], rcu); 2978 WRITE_ONCE(vsi_stat->tx_ring_stats[i], NULL); 2979 } 2980 } 2981 } 2982 2983 tx_ring_stats = vsi_stat->tx_ring_stats; 2984 vsi_stat->tx_ring_stats = 2985 krealloc_array(vsi_stat->tx_ring_stats, req_txq, 2986 sizeof(*vsi_stat->tx_ring_stats), 2987 GFP_KERNEL | __GFP_ZERO); 2988 if (!vsi_stat->tx_ring_stats) { 2989 vsi_stat->tx_ring_stats = tx_ring_stats; 2990 return -ENOMEM; 2991 } 2992 2993 if (req_rxq < prev_rxq) { 2994 for (i = req_rxq; i < prev_rxq; i++) { 2995 if (vsi_stat->rx_ring_stats[i]) { 2996 kfree_rcu(vsi_stat->rx_ring_stats[i], rcu); 2997 WRITE_ONCE(vsi_stat->rx_ring_stats[i], NULL); 2998 } 2999 } 3000 } 3001 3002 rx_ring_stats = vsi_stat->rx_ring_stats; 3003 vsi_stat->rx_ring_stats = 3004 krealloc_array(vsi_stat->rx_ring_stats, req_rxq, 3005 sizeof(*vsi_stat->rx_ring_stats), 3006 GFP_KERNEL | __GFP_ZERO); 3007 if (!vsi_stat->rx_ring_stats) { 3008 vsi_stat->rx_ring_stats = rx_ring_stats; 3009 return -ENOMEM; 3010 } 3011 3012 return 0; 3013 } 3014 3015 /** 3016 * ice_vsi_rebuild - Rebuild VSI after reset 3017 * @vsi: VSI to be rebuild 3018 * @vsi_flags: flags used for VSI rebuild flow 3019 * 3020 * Set vsi_flags to ICE_VSI_FLAG_INIT to initialize a new VSI, or 3021 * ICE_VSI_FLAG_NO_INIT to rebuild an existing VSI in hardware. 3022 * 3023 * Returns 0 on success and negative value on failure 3024 */ 3025 int ice_vsi_rebuild(struct ice_vsi *vsi, u32 vsi_flags) 3026 { 3027 struct ice_coalesce_stored *coalesce; 3028 int prev_num_q_vectors; 3029 struct ice_pf *pf; 3030 int ret; 3031 3032 if (!vsi) 3033 return -EINVAL; 3034 3035 vsi->flags = vsi_flags; 3036 pf = vsi->back; 3037 if (WARN_ON(vsi->type == ICE_VSI_VF && !vsi->vf)) 3038 return -EINVAL; 3039 3040 mutex_lock(&vsi->xdp_state_lock); 3041 3042 ret = ice_vsi_realloc_stat_arrays(vsi); 3043 if (ret) 3044 goto unlock; 3045 3046 ice_vsi_decfg(vsi); 3047 ret = ice_vsi_cfg_def(vsi); 3048 if (ret) 3049 goto unlock; 3050 3051 coalesce = kcalloc(vsi->num_q_vectors, 3052 sizeof(struct ice_coalesce_stored), GFP_KERNEL); 3053 if (!coalesce) { 3054 ret = -ENOMEM; 3055 goto decfg; 3056 } 3057 3058 prev_num_q_vectors = ice_vsi_rebuild_get_coalesce(vsi, coalesce); 3059 3060 ret = ice_vsi_cfg_tc_lan(pf, vsi); 3061 if (ret) { 3062 if (vsi_flags & ICE_VSI_FLAG_INIT) { 3063 ret = -EIO; 3064 goto free_coalesce; 3065 } 3066 3067 ret = ice_schedule_reset(pf, ICE_RESET_PFR); 3068 goto free_coalesce; 3069 } 3070 3071 ice_vsi_rebuild_set_coalesce(vsi, coalesce, prev_num_q_vectors); 3072 clear_bit(ICE_VSI_REBUILD_PENDING, vsi->state); 3073 3074 free_coalesce: 3075 kfree(coalesce); 3076 decfg: 3077 if (ret) 3078 ice_vsi_decfg(vsi); 3079 unlock: 3080 mutex_unlock(&vsi->xdp_state_lock); 3081 return ret; 3082 } 3083 3084 /** 3085 * ice_is_reset_in_progress - check for a reset in progress 3086 * @state: PF state field 3087 */ 3088 bool ice_is_reset_in_progress(unsigned long *state) 3089 { 3090 return test_bit(ICE_RESET_OICR_RECV, state) || 3091 test_bit(ICE_PFR_REQ, state) || 3092 test_bit(ICE_CORER_REQ, state) || 3093 test_bit(ICE_GLOBR_REQ, state); 3094 } 3095 3096 /** 3097 * ice_wait_for_reset - Wait for driver to finish reset and rebuild 3098 * @pf: pointer to the PF structure 3099 * @timeout: length of time to wait, in jiffies 3100 * 3101 * Wait (sleep) for a short time until the driver finishes cleaning up from 3102 * a device reset. The caller must be able to sleep. Use this to delay 3103 * operations that could fail while the driver is cleaning up after a device 3104 * reset. 3105 * 3106 * Returns 0 on success, -EBUSY if the reset is not finished within the 3107 * timeout, and -ERESTARTSYS if the thread was interrupted. 3108 */ 3109 int ice_wait_for_reset(struct ice_pf *pf, unsigned long timeout) 3110 { 3111 long ret; 3112 3113 ret = wait_event_interruptible_timeout(pf->reset_wait_queue, 3114 !ice_is_reset_in_progress(pf->state), 3115 timeout); 3116 if (ret < 0) 3117 return ret; 3118 else if (!ret) 3119 return -EBUSY; 3120 else 3121 return 0; 3122 } 3123 3124 /** 3125 * ice_vsi_update_q_map - update our copy of the VSI info with new queue map 3126 * @vsi: VSI being configured 3127 * @ctx: the context buffer returned from AQ VSI update command 3128 */ 3129 static void ice_vsi_update_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctx) 3130 { 3131 vsi->info.mapping_flags = ctx->info.mapping_flags; 3132 memcpy(&vsi->info.q_mapping, &ctx->info.q_mapping, 3133 sizeof(vsi->info.q_mapping)); 3134 memcpy(&vsi->info.tc_mapping, ctx->info.tc_mapping, 3135 sizeof(vsi->info.tc_mapping)); 3136 } 3137 3138 /** 3139 * ice_vsi_cfg_netdev_tc - Setup the netdev TC configuration 3140 * @vsi: the VSI being configured 3141 * @ena_tc: TC map to be enabled 3142 */ 3143 void ice_vsi_cfg_netdev_tc(struct ice_vsi *vsi, u8 ena_tc) 3144 { 3145 struct net_device *netdev = vsi->netdev; 3146 struct ice_pf *pf = vsi->back; 3147 int numtc = vsi->tc_cfg.numtc; 3148 struct ice_dcbx_cfg *dcbcfg; 3149 u8 netdev_tc; 3150 int i; 3151 3152 if (!netdev) 3153 return; 3154 3155 /* CHNL VSI doesn't have it's own netdev, hence, no netdev_tc */ 3156 if (vsi->type == ICE_VSI_CHNL) 3157 return; 3158 3159 if (!ena_tc) { 3160 netdev_reset_tc(netdev); 3161 return; 3162 } 3163 3164 if (vsi->type == ICE_VSI_PF && ice_is_adq_active(pf)) 3165 numtc = vsi->all_numtc; 3166 3167 if (netdev_set_num_tc(netdev, numtc)) 3168 return; 3169 3170 dcbcfg = &pf->hw.port_info->qos_cfg.local_dcbx_cfg; 3171 3172 ice_for_each_traffic_class(i) 3173 if (vsi->tc_cfg.ena_tc & BIT(i)) 3174 netdev_set_tc_queue(netdev, 3175 vsi->tc_cfg.tc_info[i].netdev_tc, 3176 vsi->tc_cfg.tc_info[i].qcount_tx, 3177 vsi->tc_cfg.tc_info[i].qoffset); 3178 /* setup TC queue map for CHNL TCs */ 3179 ice_for_each_chnl_tc(i) { 3180 if (!(vsi->all_enatc & BIT(i))) 3181 break; 3182 if (!vsi->mqprio_qopt.qopt.count[i]) 3183 break; 3184 netdev_set_tc_queue(netdev, i, 3185 vsi->mqprio_qopt.qopt.count[i], 3186 vsi->mqprio_qopt.qopt.offset[i]); 3187 } 3188 3189 if (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) 3190 return; 3191 3192 for (i = 0; i < ICE_MAX_USER_PRIORITY; i++) { 3193 u8 ets_tc = dcbcfg->etscfg.prio_table[i]; 3194 3195 /* Get the mapped netdev TC# for the UP */ 3196 netdev_tc = vsi->tc_cfg.tc_info[ets_tc].netdev_tc; 3197 netdev_set_prio_tc_map(netdev, i, netdev_tc); 3198 } 3199 } 3200 3201 /** 3202 * ice_vsi_setup_q_map_mqprio - Prepares mqprio based tc_config 3203 * @vsi: the VSI being configured, 3204 * @ctxt: VSI context structure 3205 * @ena_tc: number of traffic classes to enable 3206 * 3207 * Prepares VSI tc_config to have queue configurations based on MQPRIO options. 3208 */ 3209 static int 3210 ice_vsi_setup_q_map_mqprio(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt, 3211 u8 ena_tc) 3212 { 3213 u16 pow, offset = 0, qcount_tx = 0, qcount_rx = 0, qmap; 3214 u16 tc0_offset = vsi->mqprio_qopt.qopt.offset[0]; 3215 int tc0_qcount = vsi->mqprio_qopt.qopt.count[0]; 3216 u16 new_txq, new_rxq; 3217 u8 netdev_tc = 0; 3218 int i; 3219 3220 vsi->tc_cfg.ena_tc = ena_tc ? ena_tc : 1; 3221 3222 pow = order_base_2(tc0_qcount); 3223 qmap = FIELD_PREP(ICE_AQ_VSI_TC_Q_OFFSET_M, tc0_offset); 3224 qmap |= FIELD_PREP(ICE_AQ_VSI_TC_Q_NUM_M, pow); 3225 3226 ice_for_each_traffic_class(i) { 3227 if (!(vsi->tc_cfg.ena_tc & BIT(i))) { 3228 /* TC is not enabled */ 3229 vsi->tc_cfg.tc_info[i].qoffset = 0; 3230 vsi->tc_cfg.tc_info[i].qcount_rx = 1; 3231 vsi->tc_cfg.tc_info[i].qcount_tx = 1; 3232 vsi->tc_cfg.tc_info[i].netdev_tc = 0; 3233 ctxt->info.tc_mapping[i] = 0; 3234 continue; 3235 } 3236 3237 offset = vsi->mqprio_qopt.qopt.offset[i]; 3238 qcount_rx = vsi->mqprio_qopt.qopt.count[i]; 3239 qcount_tx = vsi->mqprio_qopt.qopt.count[i]; 3240 vsi->tc_cfg.tc_info[i].qoffset = offset; 3241 vsi->tc_cfg.tc_info[i].qcount_rx = qcount_rx; 3242 vsi->tc_cfg.tc_info[i].qcount_tx = qcount_tx; 3243 vsi->tc_cfg.tc_info[i].netdev_tc = netdev_tc++; 3244 } 3245 3246 if (vsi->all_numtc && vsi->all_numtc != vsi->tc_cfg.numtc) { 3247 ice_for_each_chnl_tc(i) { 3248 if (!(vsi->all_enatc & BIT(i))) 3249 continue; 3250 offset = vsi->mqprio_qopt.qopt.offset[i]; 3251 qcount_rx = vsi->mqprio_qopt.qopt.count[i]; 3252 qcount_tx = vsi->mqprio_qopt.qopt.count[i]; 3253 } 3254 } 3255 3256 new_txq = offset + qcount_tx; 3257 if (new_txq > vsi->alloc_txq) { 3258 dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Tx queues (%u), than were allocated (%u)!\n", 3259 new_txq, vsi->alloc_txq); 3260 return -EINVAL; 3261 } 3262 3263 new_rxq = offset + qcount_rx; 3264 if (new_rxq > vsi->alloc_rxq) { 3265 dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Rx queues (%u), than were allocated (%u)!\n", 3266 new_rxq, vsi->alloc_rxq); 3267 return -EINVAL; 3268 } 3269 3270 /* Set actual Tx/Rx queue pairs */ 3271 vsi->num_txq = new_txq; 3272 vsi->num_rxq = new_rxq; 3273 3274 /* Setup queue TC[0].qmap for given VSI context */ 3275 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap); 3276 ctxt->info.q_mapping[0] = cpu_to_le16(vsi->rxq_map[0]); 3277 ctxt->info.q_mapping[1] = cpu_to_le16(tc0_qcount); 3278 3279 /* Find queue count available for channel VSIs and starting offset 3280 * for channel VSIs 3281 */ 3282 if (tc0_qcount && tc0_qcount < vsi->num_rxq) { 3283 vsi->cnt_q_avail = vsi->num_rxq - tc0_qcount; 3284 vsi->next_base_q = tc0_qcount; 3285 } 3286 dev_dbg(ice_pf_to_dev(vsi->back), "vsi->num_txq = %d\n", vsi->num_txq); 3287 dev_dbg(ice_pf_to_dev(vsi->back), "vsi->num_rxq = %d\n", vsi->num_rxq); 3288 dev_dbg(ice_pf_to_dev(vsi->back), "all_numtc %u, all_enatc: 0x%04x, tc_cfg.numtc %u\n", 3289 vsi->all_numtc, vsi->all_enatc, vsi->tc_cfg.numtc); 3290 3291 return 0; 3292 } 3293 3294 /** 3295 * ice_vsi_cfg_tc - Configure VSI Tx Sched for given TC map 3296 * @vsi: VSI to be configured 3297 * @ena_tc: TC bitmap 3298 * 3299 * VSI queues expected to be quiesced before calling this function 3300 */ 3301 int ice_vsi_cfg_tc(struct ice_vsi *vsi, u8 ena_tc) 3302 { 3303 u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 }; 3304 struct ice_pf *pf = vsi->back; 3305 struct ice_tc_cfg old_tc_cfg; 3306 struct ice_vsi_ctx *ctx; 3307 struct device *dev; 3308 int i, ret = 0; 3309 u8 num_tc = 0; 3310 3311 dev = ice_pf_to_dev(pf); 3312 if (vsi->tc_cfg.ena_tc == ena_tc && 3313 vsi->mqprio_qopt.mode != TC_MQPRIO_MODE_CHANNEL) 3314 return 0; 3315 3316 ice_for_each_traffic_class(i) { 3317 /* build bitmap of enabled TCs */ 3318 if (ena_tc & BIT(i)) 3319 num_tc++; 3320 /* populate max_txqs per TC */ 3321 max_txqs[i] = vsi->alloc_txq; 3322 /* Update max_txqs if it is CHNL VSI, because alloc_t[r]xq are 3323 * zero for CHNL VSI, hence use num_txq instead as max_txqs 3324 */ 3325 if (vsi->type == ICE_VSI_CHNL && 3326 test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) 3327 max_txqs[i] = vsi->num_txq; 3328 } 3329 3330 memcpy(&old_tc_cfg, &vsi->tc_cfg, sizeof(old_tc_cfg)); 3331 vsi->tc_cfg.ena_tc = ena_tc; 3332 vsi->tc_cfg.numtc = num_tc; 3333 3334 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); 3335 if (!ctx) 3336 return -ENOMEM; 3337 3338 ctx->vf_num = 0; 3339 ctx->info = vsi->info; 3340 3341 if (vsi->type == ICE_VSI_PF && 3342 test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) 3343 ret = ice_vsi_setup_q_map_mqprio(vsi, ctx, ena_tc); 3344 else 3345 ret = ice_vsi_setup_q_map(vsi, ctx); 3346 3347 if (ret) { 3348 memcpy(&vsi->tc_cfg, &old_tc_cfg, sizeof(vsi->tc_cfg)); 3349 goto out; 3350 } 3351 3352 /* must to indicate which section of VSI context are being modified */ 3353 ctx->info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_RXQ_MAP_VALID); 3354 ret = ice_update_vsi(&pf->hw, vsi->idx, ctx, NULL); 3355 if (ret) { 3356 dev_info(dev, "Failed VSI Update\n"); 3357 goto out; 3358 } 3359 3360 if (vsi->type == ICE_VSI_PF && 3361 test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) 3362 ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, 1, max_txqs); 3363 else 3364 ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, 3365 vsi->tc_cfg.ena_tc, max_txqs); 3366 3367 if (ret) { 3368 dev_err(dev, "VSI %d failed TC config, error %d\n", 3369 vsi->vsi_num, ret); 3370 goto out; 3371 } 3372 ice_vsi_update_q_map(vsi, ctx); 3373 vsi->info.valid_sections = 0; 3374 3375 ice_vsi_cfg_netdev_tc(vsi, ena_tc); 3376 out: 3377 kfree(ctx); 3378 return ret; 3379 } 3380 3381 /** 3382 * ice_update_ring_stats - Update ring statistics 3383 * @stats: stats to be updated 3384 * @pkts: number of processed packets 3385 * @bytes: number of processed bytes 3386 * 3387 * This function assumes that caller has acquired a u64_stats_sync lock. 3388 */ 3389 static void ice_update_ring_stats(struct ice_q_stats *stats, u64 pkts, u64 bytes) 3390 { 3391 stats->bytes += bytes; 3392 stats->pkts += pkts; 3393 } 3394 3395 /** 3396 * ice_update_tx_ring_stats - Update Tx ring specific counters 3397 * @tx_ring: ring to update 3398 * @pkts: number of processed packets 3399 * @bytes: number of processed bytes 3400 */ 3401 void ice_update_tx_ring_stats(struct ice_tx_ring *tx_ring, u64 pkts, u64 bytes) 3402 { 3403 u64_stats_update_begin(&tx_ring->ring_stats->syncp); 3404 ice_update_ring_stats(&tx_ring->ring_stats->stats, pkts, bytes); 3405 u64_stats_update_end(&tx_ring->ring_stats->syncp); 3406 } 3407 3408 /** 3409 * ice_update_rx_ring_stats - Update Rx ring specific counters 3410 * @rx_ring: ring to update 3411 * @pkts: number of processed packets 3412 * @bytes: number of processed bytes 3413 */ 3414 void ice_update_rx_ring_stats(struct ice_rx_ring *rx_ring, u64 pkts, u64 bytes) 3415 { 3416 u64_stats_update_begin(&rx_ring->ring_stats->syncp); 3417 ice_update_ring_stats(&rx_ring->ring_stats->stats, pkts, bytes); 3418 u64_stats_update_end(&rx_ring->ring_stats->syncp); 3419 } 3420 3421 /** 3422 * ice_is_dflt_vsi_in_use - check if the default forwarding VSI is being used 3423 * @pi: port info of the switch with default VSI 3424 * 3425 * Return true if the there is a single VSI in default forwarding VSI list 3426 */ 3427 bool ice_is_dflt_vsi_in_use(struct ice_port_info *pi) 3428 { 3429 bool exists = false; 3430 3431 ice_check_if_dflt_vsi(pi, 0, &exists); 3432 return exists; 3433 } 3434 3435 /** 3436 * ice_is_vsi_dflt_vsi - check if the VSI passed in is the default VSI 3437 * @vsi: VSI to compare against default forwarding VSI 3438 * 3439 * If this VSI passed in is the default forwarding VSI then return true, else 3440 * return false 3441 */ 3442 bool ice_is_vsi_dflt_vsi(struct ice_vsi *vsi) 3443 { 3444 return ice_check_if_dflt_vsi(vsi->port_info, vsi->idx, NULL); 3445 } 3446 3447 /** 3448 * ice_set_dflt_vsi - set the default forwarding VSI 3449 * @vsi: VSI getting set as the default forwarding VSI on the switch 3450 * 3451 * If the VSI passed in is already the default VSI and it's enabled just return 3452 * success. 3453 * 3454 * Otherwise try to set the VSI passed in as the switch's default VSI and 3455 * return the result. 3456 */ 3457 int ice_set_dflt_vsi(struct ice_vsi *vsi) 3458 { 3459 struct device *dev; 3460 int status; 3461 3462 if (!vsi) 3463 return -EINVAL; 3464 3465 dev = ice_pf_to_dev(vsi->back); 3466 3467 if (ice_lag_is_switchdev_running(vsi->back)) { 3468 dev_dbg(dev, "VSI %d passed is a part of LAG containing interfaces in switchdev mode, nothing to do\n", 3469 vsi->vsi_num); 3470 return 0; 3471 } 3472 3473 /* the VSI passed in is already the default VSI */ 3474 if (ice_is_vsi_dflt_vsi(vsi)) { 3475 dev_dbg(dev, "VSI %d passed in is already the default forwarding VSI, nothing to do\n", 3476 vsi->vsi_num); 3477 return 0; 3478 } 3479 3480 status = ice_cfg_dflt_vsi(vsi->port_info, vsi->idx, true, ICE_FLTR_RX); 3481 if (status) { 3482 dev_err(dev, "Failed to set VSI %d as the default forwarding VSI, error %d\n", 3483 vsi->vsi_num, status); 3484 return status; 3485 } 3486 3487 return 0; 3488 } 3489 3490 /** 3491 * ice_clear_dflt_vsi - clear the default forwarding VSI 3492 * @vsi: VSI to remove from filter list 3493 * 3494 * If the switch has no default VSI or it's not enabled then return error. 3495 * 3496 * Otherwise try to clear the default VSI and return the result. 3497 */ 3498 int ice_clear_dflt_vsi(struct ice_vsi *vsi) 3499 { 3500 struct device *dev; 3501 int status; 3502 3503 if (!vsi) 3504 return -EINVAL; 3505 3506 dev = ice_pf_to_dev(vsi->back); 3507 3508 /* there is no default VSI configured */ 3509 if (!ice_is_dflt_vsi_in_use(vsi->port_info)) 3510 return -ENODEV; 3511 3512 status = ice_cfg_dflt_vsi(vsi->port_info, vsi->idx, false, 3513 ICE_FLTR_RX); 3514 if (status) { 3515 dev_err(dev, "Failed to clear the default forwarding VSI %d, error %d\n", 3516 vsi->vsi_num, status); 3517 return -EIO; 3518 } 3519 3520 return 0; 3521 } 3522 3523 /** 3524 * ice_get_link_speed_mbps - get link speed in Mbps 3525 * @vsi: the VSI whose link speed is being queried 3526 * 3527 * Return current VSI link speed and 0 if the speed is unknown. 3528 */ 3529 int ice_get_link_speed_mbps(struct ice_vsi *vsi) 3530 { 3531 unsigned int link_speed; 3532 3533 link_speed = vsi->port_info->phy.link_info.link_speed; 3534 3535 return (int)ice_get_link_speed(fls(link_speed) - 1); 3536 } 3537 3538 /** 3539 * ice_get_link_speed_kbps - get link speed in Kbps 3540 * @vsi: the VSI whose link speed is being queried 3541 * 3542 * Return current VSI link speed and 0 if the speed is unknown. 3543 */ 3544 int ice_get_link_speed_kbps(struct ice_vsi *vsi) 3545 { 3546 int speed_mbps; 3547 3548 speed_mbps = ice_get_link_speed_mbps(vsi); 3549 3550 return speed_mbps * 1000; 3551 } 3552 3553 /** 3554 * ice_set_min_bw_limit - setup minimum BW limit for Tx based on min_tx_rate 3555 * @vsi: VSI to be configured 3556 * @min_tx_rate: min Tx rate in Kbps to be configured as BW limit 3557 * 3558 * If the min_tx_rate is specified as 0 that means to clear the minimum BW limit 3559 * profile, otherwise a non-zero value will force a minimum BW limit for the VSI 3560 * on TC 0. 3561 */ 3562 int ice_set_min_bw_limit(struct ice_vsi *vsi, u64 min_tx_rate) 3563 { 3564 struct ice_pf *pf = vsi->back; 3565 struct device *dev; 3566 int status; 3567 int speed; 3568 3569 dev = ice_pf_to_dev(pf); 3570 if (!vsi->port_info) { 3571 dev_dbg(dev, "VSI %d, type %u specified doesn't have valid port_info\n", 3572 vsi->idx, vsi->type); 3573 return -EINVAL; 3574 } 3575 3576 speed = ice_get_link_speed_kbps(vsi); 3577 if (min_tx_rate > (u64)speed) { 3578 dev_err(dev, "invalid min Tx rate %llu Kbps specified for %s %d is greater than current link speed %u Kbps\n", 3579 min_tx_rate, ice_vsi_type_str(vsi->type), vsi->idx, 3580 speed); 3581 return -EINVAL; 3582 } 3583 3584 /* Configure min BW for VSI limit */ 3585 if (min_tx_rate) { 3586 status = ice_cfg_vsi_bw_lmt_per_tc(vsi->port_info, vsi->idx, 0, 3587 ICE_MIN_BW, min_tx_rate); 3588 if (status) { 3589 dev_err(dev, "failed to set min Tx rate(%llu Kbps) for %s %d\n", 3590 min_tx_rate, ice_vsi_type_str(vsi->type), 3591 vsi->idx); 3592 return status; 3593 } 3594 3595 dev_dbg(dev, "set min Tx rate(%llu Kbps) for %s\n", 3596 min_tx_rate, ice_vsi_type_str(vsi->type)); 3597 } else { 3598 status = ice_cfg_vsi_bw_dflt_lmt_per_tc(vsi->port_info, 3599 vsi->idx, 0, 3600 ICE_MIN_BW); 3601 if (status) { 3602 dev_err(dev, "failed to clear min Tx rate configuration for %s %d\n", 3603 ice_vsi_type_str(vsi->type), vsi->idx); 3604 return status; 3605 } 3606 3607 dev_dbg(dev, "cleared min Tx rate configuration for %s %d\n", 3608 ice_vsi_type_str(vsi->type), vsi->idx); 3609 } 3610 3611 return 0; 3612 } 3613 3614 /** 3615 * ice_set_max_bw_limit - setup maximum BW limit for Tx based on max_tx_rate 3616 * @vsi: VSI to be configured 3617 * @max_tx_rate: max Tx rate in Kbps to be configured as BW limit 3618 * 3619 * If the max_tx_rate is specified as 0 that means to clear the maximum BW limit 3620 * profile, otherwise a non-zero value will force a maximum BW limit for the VSI 3621 * on TC 0. 3622 */ 3623 int ice_set_max_bw_limit(struct ice_vsi *vsi, u64 max_tx_rate) 3624 { 3625 struct ice_pf *pf = vsi->back; 3626 struct device *dev; 3627 int status; 3628 int speed; 3629 3630 dev = ice_pf_to_dev(pf); 3631 if (!vsi->port_info) { 3632 dev_dbg(dev, "VSI %d, type %u specified doesn't have valid port_info\n", 3633 vsi->idx, vsi->type); 3634 return -EINVAL; 3635 } 3636 3637 speed = ice_get_link_speed_kbps(vsi); 3638 if (max_tx_rate > (u64)speed) { 3639 dev_err(dev, "invalid max Tx rate %llu Kbps specified for %s %d is greater than current link speed %u Kbps\n", 3640 max_tx_rate, ice_vsi_type_str(vsi->type), vsi->idx, 3641 speed); 3642 return -EINVAL; 3643 } 3644 3645 /* Configure max BW for VSI limit */ 3646 if (max_tx_rate) { 3647 status = ice_cfg_vsi_bw_lmt_per_tc(vsi->port_info, vsi->idx, 0, 3648 ICE_MAX_BW, max_tx_rate); 3649 if (status) { 3650 dev_err(dev, "failed setting max Tx rate(%llu Kbps) for %s %d\n", 3651 max_tx_rate, ice_vsi_type_str(vsi->type), 3652 vsi->idx); 3653 return status; 3654 } 3655 3656 dev_dbg(dev, "set max Tx rate(%llu Kbps) for %s %d\n", 3657 max_tx_rate, ice_vsi_type_str(vsi->type), vsi->idx); 3658 } else { 3659 status = ice_cfg_vsi_bw_dflt_lmt_per_tc(vsi->port_info, 3660 vsi->idx, 0, 3661 ICE_MAX_BW); 3662 if (status) { 3663 dev_err(dev, "failed clearing max Tx rate configuration for %s %d\n", 3664 ice_vsi_type_str(vsi->type), vsi->idx); 3665 return status; 3666 } 3667 3668 dev_dbg(dev, "cleared max Tx rate configuration for %s %d\n", 3669 ice_vsi_type_str(vsi->type), vsi->idx); 3670 } 3671 3672 return 0; 3673 } 3674 3675 /** 3676 * ice_set_link - turn on/off physical link 3677 * @vsi: VSI to modify physical link on 3678 * @ena: turn on/off physical link 3679 */ 3680 int ice_set_link(struct ice_vsi *vsi, bool ena) 3681 { 3682 struct device *dev = ice_pf_to_dev(vsi->back); 3683 struct ice_port_info *pi = vsi->port_info; 3684 struct ice_hw *hw = pi->hw; 3685 int status; 3686 3687 if (vsi->type != ICE_VSI_PF) 3688 return -EINVAL; 3689 3690 status = ice_aq_set_link_restart_an(pi, ena, NULL); 3691 3692 /* if link is owned by manageability, FW will return ICE_AQ_RC_EMODE. 3693 * this is not a fatal error, so print a warning message and return 3694 * a success code. Return an error if FW returns an error code other 3695 * than ICE_AQ_RC_EMODE 3696 */ 3697 if (status == -EIO) { 3698 if (hw->adminq.sq_last_status == ICE_AQ_RC_EMODE) 3699 dev_dbg(dev, "can't set link to %s, err %d aq_err %s. not fatal, continuing\n", 3700 (ena ? "ON" : "OFF"), status, 3701 ice_aq_str(hw->adminq.sq_last_status)); 3702 } else if (status) { 3703 dev_err(dev, "can't set link to %s, err %d aq_err %s\n", 3704 (ena ? "ON" : "OFF"), status, 3705 ice_aq_str(hw->adminq.sq_last_status)); 3706 return status; 3707 } 3708 3709 return 0; 3710 } 3711 3712 /** 3713 * ice_vsi_add_vlan_zero - add VLAN 0 filter(s) for this VSI 3714 * @vsi: VSI used to add VLAN filters 3715 * 3716 * In Single VLAN Mode (SVM), single VLAN filters via ICE_SW_LKUP_VLAN are based 3717 * on the inner VLAN ID, so the VLAN TPID (i.e. 0x8100 or 0x888a8) doesn't 3718 * matter. In Double VLAN Mode (DVM), outer/single VLAN filters via 3719 * ICE_SW_LKUP_VLAN are based on the outer/single VLAN ID + VLAN TPID. 3720 * 3721 * For both modes add a VLAN 0 + no VLAN TPID filter to handle untagged traffic 3722 * when VLAN pruning is enabled. Also, this handles VLAN 0 priority tagged 3723 * traffic in SVM, since the VLAN TPID isn't part of filtering. 3724 * 3725 * If DVM is enabled then an explicit VLAN 0 + VLAN TPID filter needs to be 3726 * added to allow VLAN 0 priority tagged traffic in DVM, since the VLAN TPID is 3727 * part of filtering. 3728 */ 3729 int ice_vsi_add_vlan_zero(struct ice_vsi *vsi) 3730 { 3731 struct ice_vsi_vlan_ops *vlan_ops = ice_get_compat_vsi_vlan_ops(vsi); 3732 struct ice_vlan vlan; 3733 int err; 3734 3735 vlan = ICE_VLAN(0, 0, 0); 3736 err = vlan_ops->add_vlan(vsi, &vlan); 3737 if (err && err != -EEXIST) 3738 return err; 3739 3740 /* in SVM both VLAN 0 filters are identical */ 3741 if (!ice_is_dvm_ena(&vsi->back->hw)) 3742 return 0; 3743 3744 vlan = ICE_VLAN(ETH_P_8021Q, 0, 0); 3745 err = vlan_ops->add_vlan(vsi, &vlan); 3746 if (err && err != -EEXIST) 3747 return err; 3748 3749 return 0; 3750 } 3751 3752 /** 3753 * ice_vsi_del_vlan_zero - delete VLAN 0 filter(s) for this VSI 3754 * @vsi: VSI used to add VLAN filters 3755 * 3756 * Delete the VLAN 0 filters in the same manner that they were added in 3757 * ice_vsi_add_vlan_zero. 3758 */ 3759 int ice_vsi_del_vlan_zero(struct ice_vsi *vsi) 3760 { 3761 struct ice_vsi_vlan_ops *vlan_ops = ice_get_compat_vsi_vlan_ops(vsi); 3762 struct ice_vlan vlan; 3763 int err; 3764 3765 vlan = ICE_VLAN(0, 0, 0); 3766 err = vlan_ops->del_vlan(vsi, &vlan); 3767 if (err && err != -EEXIST) 3768 return err; 3769 3770 /* in SVM both VLAN 0 filters are identical */ 3771 if (!ice_is_dvm_ena(&vsi->back->hw)) 3772 return 0; 3773 3774 vlan = ICE_VLAN(ETH_P_8021Q, 0, 0); 3775 err = vlan_ops->del_vlan(vsi, &vlan); 3776 if (err && err != -EEXIST) 3777 return err; 3778 3779 /* when deleting the last VLAN filter, make sure to disable the VLAN 3780 * promisc mode so the filter isn't left by accident 3781 */ 3782 return ice_clear_vsi_promisc(&vsi->back->hw, vsi->idx, 3783 ICE_MCAST_VLAN_PROMISC_BITS, 0); 3784 } 3785 3786 /** 3787 * ice_vsi_num_zero_vlans - get number of VLAN 0 filters based on VLAN mode 3788 * @vsi: VSI used to get the VLAN mode 3789 * 3790 * If DVM is enabled then 2 VLAN 0 filters are added, else if SVM is enabled 3791 * then 1 VLAN 0 filter is added. See ice_vsi_add_vlan_zero for more details. 3792 */ 3793 static u16 ice_vsi_num_zero_vlans(struct ice_vsi *vsi) 3794 { 3795 #define ICE_DVM_NUM_ZERO_VLAN_FLTRS 2 3796 #define ICE_SVM_NUM_ZERO_VLAN_FLTRS 1 3797 /* no VLAN 0 filter is created when a port VLAN is active */ 3798 if (vsi->type == ICE_VSI_VF) { 3799 if (WARN_ON(!vsi->vf)) 3800 return 0; 3801 3802 if (ice_vf_is_port_vlan_ena(vsi->vf)) 3803 return 0; 3804 } 3805 3806 if (ice_is_dvm_ena(&vsi->back->hw)) 3807 return ICE_DVM_NUM_ZERO_VLAN_FLTRS; 3808 else 3809 return ICE_SVM_NUM_ZERO_VLAN_FLTRS; 3810 } 3811 3812 /** 3813 * ice_vsi_has_non_zero_vlans - check if VSI has any non-zero VLANs 3814 * @vsi: VSI used to determine if any non-zero VLANs have been added 3815 */ 3816 bool ice_vsi_has_non_zero_vlans(struct ice_vsi *vsi) 3817 { 3818 return (vsi->num_vlan > ice_vsi_num_zero_vlans(vsi)); 3819 } 3820 3821 /** 3822 * ice_vsi_num_non_zero_vlans - get the number of non-zero VLANs for this VSI 3823 * @vsi: VSI used to get the number of non-zero VLANs added 3824 */ 3825 u16 ice_vsi_num_non_zero_vlans(struct ice_vsi *vsi) 3826 { 3827 return (vsi->num_vlan - ice_vsi_num_zero_vlans(vsi)); 3828 } 3829 3830 /** 3831 * ice_is_feature_supported 3832 * @pf: pointer to the struct ice_pf instance 3833 * @f: feature enum to be checked 3834 * 3835 * returns true if feature is supported, false otherwise 3836 */ 3837 bool ice_is_feature_supported(struct ice_pf *pf, enum ice_feature f) 3838 { 3839 if (f < 0 || f >= ICE_F_MAX) 3840 return false; 3841 3842 return test_bit(f, pf->features); 3843 } 3844 3845 /** 3846 * ice_set_feature_support 3847 * @pf: pointer to the struct ice_pf instance 3848 * @f: feature enum to set 3849 */ 3850 void ice_set_feature_support(struct ice_pf *pf, enum ice_feature f) 3851 { 3852 if (f < 0 || f >= ICE_F_MAX) 3853 return; 3854 3855 set_bit(f, pf->features); 3856 } 3857 3858 /** 3859 * ice_clear_feature_support 3860 * @pf: pointer to the struct ice_pf instance 3861 * @f: feature enum to clear 3862 */ 3863 void ice_clear_feature_support(struct ice_pf *pf, enum ice_feature f) 3864 { 3865 if (f < 0 || f >= ICE_F_MAX) 3866 return; 3867 3868 clear_bit(f, pf->features); 3869 } 3870 3871 /** 3872 * ice_init_feature_support 3873 * @pf: pointer to the struct ice_pf instance 3874 * 3875 * called during init to setup supported feature 3876 */ 3877 void ice_init_feature_support(struct ice_pf *pf) 3878 { 3879 switch (pf->hw.device_id) { 3880 case ICE_DEV_ID_E810C_BACKPLANE: 3881 case ICE_DEV_ID_E810C_QSFP: 3882 case ICE_DEV_ID_E810C_SFP: 3883 case ICE_DEV_ID_E810_XXV_BACKPLANE: 3884 case ICE_DEV_ID_E810_XXV_QSFP: 3885 case ICE_DEV_ID_E810_XXV_SFP: 3886 ice_set_feature_support(pf, ICE_F_DSCP); 3887 if (ice_is_phy_rclk_in_netlist(&pf->hw)) 3888 ice_set_feature_support(pf, ICE_F_PHY_RCLK); 3889 /* If we don't own the timer - don't enable other caps */ 3890 if (!ice_pf_src_tmr_owned(pf)) 3891 break; 3892 if (ice_is_cgu_in_netlist(&pf->hw)) 3893 ice_set_feature_support(pf, ICE_F_CGU); 3894 if (ice_is_clock_mux_in_netlist(&pf->hw)) 3895 ice_set_feature_support(pf, ICE_F_SMA_CTRL); 3896 if (ice_gnss_is_module_present(&pf->hw)) 3897 ice_set_feature_support(pf, ICE_F_GNSS); 3898 break; 3899 default: 3900 break; 3901 } 3902 3903 if (pf->hw.mac_type == ICE_MAC_E830) 3904 ice_set_feature_support(pf, ICE_F_MBX_LIMIT); 3905 } 3906 3907 /** 3908 * ice_vsi_update_security - update security block in VSI 3909 * @vsi: pointer to VSI structure 3910 * @fill: function pointer to fill ctx 3911 */ 3912 int 3913 ice_vsi_update_security(struct ice_vsi *vsi, void (*fill)(struct ice_vsi_ctx *)) 3914 { 3915 struct ice_vsi_ctx ctx = { 0 }; 3916 3917 ctx.info = vsi->info; 3918 ctx.info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_SECURITY_VALID); 3919 fill(&ctx); 3920 3921 if (ice_update_vsi(&vsi->back->hw, vsi->idx, &ctx, NULL)) 3922 return -ENODEV; 3923 3924 vsi->info = ctx.info; 3925 return 0; 3926 } 3927 3928 /** 3929 * ice_vsi_ctx_set_antispoof - set antispoof function in VSI ctx 3930 * @ctx: pointer to VSI ctx structure 3931 */ 3932 void ice_vsi_ctx_set_antispoof(struct ice_vsi_ctx *ctx) 3933 { 3934 ctx->info.sec_flags |= ICE_AQ_VSI_SEC_FLAG_ENA_MAC_ANTI_SPOOF | 3935 (ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA << 3936 ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S); 3937 } 3938 3939 /** 3940 * ice_vsi_ctx_clear_antispoof - clear antispoof function in VSI ctx 3941 * @ctx: pointer to VSI ctx structure 3942 */ 3943 void ice_vsi_ctx_clear_antispoof(struct ice_vsi_ctx *ctx) 3944 { 3945 ctx->info.sec_flags &= ~ICE_AQ_VSI_SEC_FLAG_ENA_MAC_ANTI_SPOOF & 3946 ~(ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA << 3947 ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S); 3948 } 3949 3950 /** 3951 * ice_vsi_ctx_set_allow_override - allow destination override on VSI 3952 * @ctx: pointer to VSI ctx structure 3953 */ 3954 void ice_vsi_ctx_set_allow_override(struct ice_vsi_ctx *ctx) 3955 { 3956 ctx->info.sec_flags |= ICE_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD; 3957 } 3958 3959 /** 3960 * ice_vsi_ctx_clear_allow_override - turn off destination override on VSI 3961 * @ctx: pointer to VSI ctx structure 3962 */ 3963 void ice_vsi_ctx_clear_allow_override(struct ice_vsi_ctx *ctx) 3964 { 3965 ctx->info.sec_flags &= ~ICE_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD; 3966 } 3967 3968 /** 3969 * ice_vsi_update_local_lb - update sw block in VSI with local loopback bit 3970 * @vsi: pointer to VSI structure 3971 * @set: set or unset the bit 3972 */ 3973 int 3974 ice_vsi_update_local_lb(struct ice_vsi *vsi, bool set) 3975 { 3976 struct ice_vsi_ctx ctx = { 3977 .info = vsi->info, 3978 }; 3979 3980 ctx.info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_SW_VALID); 3981 if (set) 3982 ctx.info.sw_flags |= ICE_AQ_VSI_SW_FLAG_LOCAL_LB; 3983 else 3984 ctx.info.sw_flags &= ~ICE_AQ_VSI_SW_FLAG_LOCAL_LB; 3985 3986 if (ice_update_vsi(&vsi->back->hw, vsi->idx, &ctx, NULL)) 3987 return -ENODEV; 3988 3989 vsi->info = ctx.info; 3990 return 0; 3991 } 3992