xref: /linux/drivers/net/ethernet/intel/ice/ice_lib.c (revision 0a9f4a20c6153d187c8ee58133357ac671372f5f)
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2018, Intel Corporation. */
3 
4 #include "ice.h"
5 #include "ice_base.h"
6 #include "ice_flow.h"
7 #include "ice_lib.h"
8 #include "ice_fltr.h"
9 #include "ice_dcb_lib.h"
10 #include "ice_devlink.h"
11 #include "ice_vsi_vlan_ops.h"
12 
13 /**
14  * ice_vsi_type_str - maps VSI type enum to string equivalents
15  * @vsi_type: VSI type enum
16  */
17 const char *ice_vsi_type_str(enum ice_vsi_type vsi_type)
18 {
19 	switch (vsi_type) {
20 	case ICE_VSI_PF:
21 		return "ICE_VSI_PF";
22 	case ICE_VSI_VF:
23 		return "ICE_VSI_VF";
24 	case ICE_VSI_CTRL:
25 		return "ICE_VSI_CTRL";
26 	case ICE_VSI_CHNL:
27 		return "ICE_VSI_CHNL";
28 	case ICE_VSI_LB:
29 		return "ICE_VSI_LB";
30 	case ICE_VSI_SWITCHDEV_CTRL:
31 		return "ICE_VSI_SWITCHDEV_CTRL";
32 	default:
33 		return "unknown";
34 	}
35 }
36 
37 /**
38  * ice_vsi_ctrl_all_rx_rings - Start or stop a VSI's Rx rings
39  * @vsi: the VSI being configured
40  * @ena: start or stop the Rx rings
41  *
42  * First enable/disable all of the Rx rings, flush any remaining writes, and
43  * then verify that they have all been enabled/disabled successfully. This will
44  * let all of the register writes complete when enabling/disabling the Rx rings
45  * before waiting for the change in hardware to complete.
46  */
47 static int ice_vsi_ctrl_all_rx_rings(struct ice_vsi *vsi, bool ena)
48 {
49 	int ret = 0;
50 	u16 i;
51 
52 	ice_for_each_rxq(vsi, i)
53 		ice_vsi_ctrl_one_rx_ring(vsi, ena, i, false);
54 
55 	ice_flush(&vsi->back->hw);
56 
57 	ice_for_each_rxq(vsi, i) {
58 		ret = ice_vsi_wait_one_rx_ring(vsi, ena, i);
59 		if (ret)
60 			break;
61 	}
62 
63 	return ret;
64 }
65 
66 /**
67  * ice_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the VSI
68  * @vsi: VSI pointer
69  *
70  * On error: returns error code (negative)
71  * On success: returns 0
72  */
73 static int ice_vsi_alloc_arrays(struct ice_vsi *vsi)
74 {
75 	struct ice_pf *pf = vsi->back;
76 	struct device *dev;
77 
78 	dev = ice_pf_to_dev(pf);
79 	if (vsi->type == ICE_VSI_CHNL)
80 		return 0;
81 
82 	/* allocate memory for both Tx and Rx ring pointers */
83 	vsi->tx_rings = devm_kcalloc(dev, vsi->alloc_txq,
84 				     sizeof(*vsi->tx_rings), GFP_KERNEL);
85 	if (!vsi->tx_rings)
86 		return -ENOMEM;
87 
88 	vsi->rx_rings = devm_kcalloc(dev, vsi->alloc_rxq,
89 				     sizeof(*vsi->rx_rings), GFP_KERNEL);
90 	if (!vsi->rx_rings)
91 		goto err_rings;
92 
93 	/* txq_map needs to have enough space to track both Tx (stack) rings
94 	 * and XDP rings; at this point vsi->num_xdp_txq might not be set,
95 	 * so use num_possible_cpus() as we want to always provide XDP ring
96 	 * per CPU, regardless of queue count settings from user that might
97 	 * have come from ethtool's set_channels() callback;
98 	 */
99 	vsi->txq_map = devm_kcalloc(dev, (vsi->alloc_txq + num_possible_cpus()),
100 				    sizeof(*vsi->txq_map), GFP_KERNEL);
101 
102 	if (!vsi->txq_map)
103 		goto err_txq_map;
104 
105 	vsi->rxq_map = devm_kcalloc(dev, vsi->alloc_rxq,
106 				    sizeof(*vsi->rxq_map), GFP_KERNEL);
107 	if (!vsi->rxq_map)
108 		goto err_rxq_map;
109 
110 	/* There is no need to allocate q_vectors for a loopback VSI. */
111 	if (vsi->type == ICE_VSI_LB)
112 		return 0;
113 
114 	/* allocate memory for q_vector pointers */
115 	vsi->q_vectors = devm_kcalloc(dev, vsi->num_q_vectors,
116 				      sizeof(*vsi->q_vectors), GFP_KERNEL);
117 	if (!vsi->q_vectors)
118 		goto err_vectors;
119 
120 	vsi->af_xdp_zc_qps = bitmap_zalloc(max_t(int, vsi->alloc_txq, vsi->alloc_rxq), GFP_KERNEL);
121 	if (!vsi->af_xdp_zc_qps)
122 		goto err_zc_qps;
123 
124 	return 0;
125 
126 err_zc_qps:
127 	devm_kfree(dev, vsi->q_vectors);
128 err_vectors:
129 	devm_kfree(dev, vsi->rxq_map);
130 err_rxq_map:
131 	devm_kfree(dev, vsi->txq_map);
132 err_txq_map:
133 	devm_kfree(dev, vsi->rx_rings);
134 err_rings:
135 	devm_kfree(dev, vsi->tx_rings);
136 	return -ENOMEM;
137 }
138 
139 /**
140  * ice_vsi_set_num_desc - Set number of descriptors for queues on this VSI
141  * @vsi: the VSI being configured
142  */
143 static void ice_vsi_set_num_desc(struct ice_vsi *vsi)
144 {
145 	switch (vsi->type) {
146 	case ICE_VSI_PF:
147 	case ICE_VSI_SWITCHDEV_CTRL:
148 	case ICE_VSI_CTRL:
149 	case ICE_VSI_LB:
150 		/* a user could change the values of num_[tr]x_desc using
151 		 * ethtool -G so we should keep those values instead of
152 		 * overwriting them with the defaults.
153 		 */
154 		if (!vsi->num_rx_desc)
155 			vsi->num_rx_desc = ICE_DFLT_NUM_RX_DESC;
156 		if (!vsi->num_tx_desc)
157 			vsi->num_tx_desc = ICE_DFLT_NUM_TX_DESC;
158 		break;
159 	default:
160 		dev_dbg(ice_pf_to_dev(vsi->back), "Not setting number of Tx/Rx descriptors for VSI type %d\n",
161 			vsi->type);
162 		break;
163 	}
164 }
165 
166 /**
167  * ice_vsi_set_num_qs - Set number of queues, descriptors and vectors for a VSI
168  * @vsi: the VSI being configured
169  * @vf_id: ID of the VF being configured
170  *
171  * Return 0 on success and a negative value on error
172  */
173 static void ice_vsi_set_num_qs(struct ice_vsi *vsi, u16 vf_id)
174 {
175 	struct ice_pf *pf = vsi->back;
176 	struct ice_vf *vf = NULL;
177 
178 	if (vsi->type == ICE_VSI_VF)
179 		vsi->vf_id = vf_id;
180 	else
181 		vsi->vf_id = ICE_INVAL_VFID;
182 
183 	switch (vsi->type) {
184 	case ICE_VSI_PF:
185 		if (vsi->req_txq) {
186 			vsi->alloc_txq = vsi->req_txq;
187 			vsi->num_txq = vsi->req_txq;
188 		} else {
189 			vsi->alloc_txq = min3(pf->num_lan_msix,
190 					      ice_get_avail_txq_count(pf),
191 					      (u16)num_online_cpus());
192 		}
193 
194 		pf->num_lan_tx = vsi->alloc_txq;
195 
196 		/* only 1 Rx queue unless RSS is enabled */
197 		if (!test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
198 			vsi->alloc_rxq = 1;
199 		} else {
200 			if (vsi->req_rxq) {
201 				vsi->alloc_rxq = vsi->req_rxq;
202 				vsi->num_rxq = vsi->req_rxq;
203 			} else {
204 				vsi->alloc_rxq = min3(pf->num_lan_msix,
205 						      ice_get_avail_rxq_count(pf),
206 						      (u16)num_online_cpus());
207 			}
208 		}
209 
210 		pf->num_lan_rx = vsi->alloc_rxq;
211 
212 		vsi->num_q_vectors = min_t(int, pf->num_lan_msix,
213 					   max_t(int, vsi->alloc_rxq,
214 						 vsi->alloc_txq));
215 		break;
216 	case ICE_VSI_SWITCHDEV_CTRL:
217 		/* The number of queues for ctrl VSI is equal to number of VFs.
218 		 * Each ring is associated to the corresponding VF_PR netdev.
219 		 */
220 		vsi->alloc_txq = pf->num_alloc_vfs;
221 		vsi->alloc_rxq = pf->num_alloc_vfs;
222 		vsi->num_q_vectors = 1;
223 		break;
224 	case ICE_VSI_VF:
225 		vf = &pf->vf[vsi->vf_id];
226 		if (vf->num_req_qs)
227 			vf->num_vf_qs = vf->num_req_qs;
228 		vsi->alloc_txq = vf->num_vf_qs;
229 		vsi->alloc_rxq = vf->num_vf_qs;
230 		/* pf->num_msix_per_vf includes (VF miscellaneous vector +
231 		 * data queue interrupts). Since vsi->num_q_vectors is number
232 		 * of queues vectors, subtract 1 (ICE_NONQ_VECS_VF) from the
233 		 * original vector count
234 		 */
235 		vsi->num_q_vectors = pf->num_msix_per_vf - ICE_NONQ_VECS_VF;
236 		break;
237 	case ICE_VSI_CTRL:
238 		vsi->alloc_txq = 1;
239 		vsi->alloc_rxq = 1;
240 		vsi->num_q_vectors = 1;
241 		break;
242 	case ICE_VSI_CHNL:
243 		vsi->alloc_txq = 0;
244 		vsi->alloc_rxq = 0;
245 		break;
246 	case ICE_VSI_LB:
247 		vsi->alloc_txq = 1;
248 		vsi->alloc_rxq = 1;
249 		break;
250 	default:
251 		dev_warn(ice_pf_to_dev(pf), "Unknown VSI type %d\n", vsi->type);
252 		break;
253 	}
254 
255 	ice_vsi_set_num_desc(vsi);
256 }
257 
258 /**
259  * ice_get_free_slot - get the next non-NULL location index in array
260  * @array: array to search
261  * @size: size of the array
262  * @curr: last known occupied index to be used as a search hint
263  *
264  * void * is being used to keep the functionality generic. This lets us use this
265  * function on any array of pointers.
266  */
267 static int ice_get_free_slot(void *array, int size, int curr)
268 {
269 	int **tmp_array = (int **)array;
270 	int next;
271 
272 	if (curr < (size - 1) && !tmp_array[curr + 1]) {
273 		next = curr + 1;
274 	} else {
275 		int i = 0;
276 
277 		while ((i < size) && (tmp_array[i]))
278 			i++;
279 		if (i == size)
280 			next = ICE_NO_VSI;
281 		else
282 			next = i;
283 	}
284 	return next;
285 }
286 
287 /**
288  * ice_vsi_delete - delete a VSI from the switch
289  * @vsi: pointer to VSI being removed
290  */
291 void ice_vsi_delete(struct ice_vsi *vsi)
292 {
293 	struct ice_pf *pf = vsi->back;
294 	struct ice_vsi_ctx *ctxt;
295 	int status;
296 
297 	ctxt = kzalloc(sizeof(*ctxt), GFP_KERNEL);
298 	if (!ctxt)
299 		return;
300 
301 	if (vsi->type == ICE_VSI_VF)
302 		ctxt->vf_num = vsi->vf_id;
303 	ctxt->vsi_num = vsi->vsi_num;
304 
305 	memcpy(&ctxt->info, &vsi->info, sizeof(ctxt->info));
306 
307 	status = ice_free_vsi(&pf->hw, vsi->idx, ctxt, false, NULL);
308 	if (status)
309 		dev_err(ice_pf_to_dev(pf), "Failed to delete VSI %i in FW - error: %d\n",
310 			vsi->vsi_num, status);
311 
312 	kfree(ctxt);
313 }
314 
315 /**
316  * ice_vsi_free_arrays - De-allocate queue and vector pointer arrays for the VSI
317  * @vsi: pointer to VSI being cleared
318  */
319 static void ice_vsi_free_arrays(struct ice_vsi *vsi)
320 {
321 	struct ice_pf *pf = vsi->back;
322 	struct device *dev;
323 
324 	dev = ice_pf_to_dev(pf);
325 
326 	if (vsi->af_xdp_zc_qps) {
327 		bitmap_free(vsi->af_xdp_zc_qps);
328 		vsi->af_xdp_zc_qps = NULL;
329 	}
330 	/* free the ring and vector containers */
331 	if (vsi->q_vectors) {
332 		devm_kfree(dev, vsi->q_vectors);
333 		vsi->q_vectors = NULL;
334 	}
335 	if (vsi->tx_rings) {
336 		devm_kfree(dev, vsi->tx_rings);
337 		vsi->tx_rings = NULL;
338 	}
339 	if (vsi->rx_rings) {
340 		devm_kfree(dev, vsi->rx_rings);
341 		vsi->rx_rings = NULL;
342 	}
343 	if (vsi->txq_map) {
344 		devm_kfree(dev, vsi->txq_map);
345 		vsi->txq_map = NULL;
346 	}
347 	if (vsi->rxq_map) {
348 		devm_kfree(dev, vsi->rxq_map);
349 		vsi->rxq_map = NULL;
350 	}
351 }
352 
353 /**
354  * ice_vsi_clear - clean up and deallocate the provided VSI
355  * @vsi: pointer to VSI being cleared
356  *
357  * This deallocates the VSI's queue resources, removes it from the PF's
358  * VSI array if necessary, and deallocates the VSI
359  *
360  * Returns 0 on success, negative on failure
361  */
362 int ice_vsi_clear(struct ice_vsi *vsi)
363 {
364 	struct ice_pf *pf = NULL;
365 	struct device *dev;
366 
367 	if (!vsi)
368 		return 0;
369 
370 	if (!vsi->back)
371 		return -EINVAL;
372 
373 	pf = vsi->back;
374 	dev = ice_pf_to_dev(pf);
375 
376 	if (!pf->vsi[vsi->idx] || pf->vsi[vsi->idx] != vsi) {
377 		dev_dbg(dev, "vsi does not exist at pf->vsi[%d]\n", vsi->idx);
378 		return -EINVAL;
379 	}
380 
381 	mutex_lock(&pf->sw_mutex);
382 	/* updates the PF for this cleared VSI */
383 
384 	pf->vsi[vsi->idx] = NULL;
385 	if (vsi->idx < pf->next_vsi && vsi->type != ICE_VSI_CTRL)
386 		pf->next_vsi = vsi->idx;
387 	if (vsi->idx < pf->next_vsi && vsi->type == ICE_VSI_CTRL &&
388 	    vsi->vf_id != ICE_INVAL_VFID)
389 		pf->next_vsi = vsi->idx;
390 
391 	ice_vsi_free_arrays(vsi);
392 	mutex_unlock(&pf->sw_mutex);
393 	devm_kfree(dev, vsi);
394 
395 	return 0;
396 }
397 
398 /**
399  * ice_msix_clean_ctrl_vsi - MSIX mode interrupt handler for ctrl VSI
400  * @irq: interrupt number
401  * @data: pointer to a q_vector
402  */
403 static irqreturn_t ice_msix_clean_ctrl_vsi(int __always_unused irq, void *data)
404 {
405 	struct ice_q_vector *q_vector = (struct ice_q_vector *)data;
406 
407 	if (!q_vector->tx.tx_ring)
408 		return IRQ_HANDLED;
409 
410 #define FDIR_RX_DESC_CLEAN_BUDGET 64
411 	ice_clean_rx_irq(q_vector->rx.rx_ring, FDIR_RX_DESC_CLEAN_BUDGET);
412 	ice_clean_ctrl_tx_irq(q_vector->tx.tx_ring);
413 
414 	return IRQ_HANDLED;
415 }
416 
417 /**
418  * ice_msix_clean_rings - MSIX mode Interrupt Handler
419  * @irq: interrupt number
420  * @data: pointer to a q_vector
421  */
422 static irqreturn_t ice_msix_clean_rings(int __always_unused irq, void *data)
423 {
424 	struct ice_q_vector *q_vector = (struct ice_q_vector *)data;
425 
426 	if (!q_vector->tx.tx_ring && !q_vector->rx.rx_ring)
427 		return IRQ_HANDLED;
428 
429 	q_vector->total_events++;
430 
431 	napi_schedule(&q_vector->napi);
432 
433 	return IRQ_HANDLED;
434 }
435 
436 static irqreturn_t ice_eswitch_msix_clean_rings(int __always_unused irq, void *data)
437 {
438 	struct ice_q_vector *q_vector = (struct ice_q_vector *)data;
439 	struct ice_pf *pf = q_vector->vsi->back;
440 	int i;
441 
442 	if (!q_vector->tx.tx_ring && !q_vector->rx.rx_ring)
443 		return IRQ_HANDLED;
444 
445 	ice_for_each_vf(pf, i)
446 		napi_schedule(&pf->vf[i].repr->q_vector->napi);
447 
448 	return IRQ_HANDLED;
449 }
450 
451 /**
452  * ice_vsi_alloc - Allocates the next available struct VSI in the PF
453  * @pf: board private structure
454  * @vsi_type: type of VSI
455  * @ch: ptr to channel
456  * @vf_id: ID of the VF being configured
457  *
458  * returns a pointer to a VSI on success, NULL on failure.
459  */
460 static struct ice_vsi *
461 ice_vsi_alloc(struct ice_pf *pf, enum ice_vsi_type vsi_type,
462 	      struct ice_channel *ch, u16 vf_id)
463 {
464 	struct device *dev = ice_pf_to_dev(pf);
465 	struct ice_vsi *vsi = NULL;
466 
467 	/* Need to protect the allocation of the VSIs at the PF level */
468 	mutex_lock(&pf->sw_mutex);
469 
470 	/* If we have already allocated our maximum number of VSIs,
471 	 * pf->next_vsi will be ICE_NO_VSI. If not, pf->next_vsi index
472 	 * is available to be populated
473 	 */
474 	if (pf->next_vsi == ICE_NO_VSI) {
475 		dev_dbg(dev, "out of VSI slots!\n");
476 		goto unlock_pf;
477 	}
478 
479 	vsi = devm_kzalloc(dev, sizeof(*vsi), GFP_KERNEL);
480 	if (!vsi)
481 		goto unlock_pf;
482 
483 	vsi->type = vsi_type;
484 	vsi->back = pf;
485 	set_bit(ICE_VSI_DOWN, vsi->state);
486 
487 	if (vsi_type == ICE_VSI_VF)
488 		ice_vsi_set_num_qs(vsi, vf_id);
489 	else if (vsi_type != ICE_VSI_CHNL)
490 		ice_vsi_set_num_qs(vsi, ICE_INVAL_VFID);
491 
492 	switch (vsi->type) {
493 	case ICE_VSI_SWITCHDEV_CTRL:
494 		if (ice_vsi_alloc_arrays(vsi))
495 			goto err_rings;
496 
497 		/* Setup eswitch MSIX irq handler for VSI */
498 		vsi->irq_handler = ice_eswitch_msix_clean_rings;
499 		break;
500 	case ICE_VSI_PF:
501 		if (ice_vsi_alloc_arrays(vsi))
502 			goto err_rings;
503 
504 		/* Setup default MSIX irq handler for VSI */
505 		vsi->irq_handler = ice_msix_clean_rings;
506 		break;
507 	case ICE_VSI_CTRL:
508 		if (ice_vsi_alloc_arrays(vsi))
509 			goto err_rings;
510 
511 		/* Setup ctrl VSI MSIX irq handler */
512 		vsi->irq_handler = ice_msix_clean_ctrl_vsi;
513 		break;
514 	case ICE_VSI_VF:
515 		if (ice_vsi_alloc_arrays(vsi))
516 			goto err_rings;
517 		break;
518 	case ICE_VSI_CHNL:
519 		if (!ch)
520 			goto err_rings;
521 		vsi->num_rxq = ch->num_rxq;
522 		vsi->num_txq = ch->num_txq;
523 		vsi->next_base_q = ch->base_q;
524 		break;
525 	case ICE_VSI_LB:
526 		if (ice_vsi_alloc_arrays(vsi))
527 			goto err_rings;
528 		break;
529 	default:
530 		dev_warn(dev, "Unknown VSI type %d\n", vsi->type);
531 		goto unlock_pf;
532 	}
533 
534 	if (vsi->type == ICE_VSI_CTRL && vf_id == ICE_INVAL_VFID) {
535 		/* Use the last VSI slot as the index for PF control VSI */
536 		vsi->idx = pf->num_alloc_vsi - 1;
537 		pf->ctrl_vsi_idx = vsi->idx;
538 		pf->vsi[vsi->idx] = vsi;
539 	} else {
540 		/* fill slot and make note of the index */
541 		vsi->idx = pf->next_vsi;
542 		pf->vsi[pf->next_vsi] = vsi;
543 
544 		/* prepare pf->next_vsi for next use */
545 		pf->next_vsi = ice_get_free_slot(pf->vsi, pf->num_alloc_vsi,
546 						 pf->next_vsi);
547 	}
548 
549 	if (vsi->type == ICE_VSI_CTRL && vf_id != ICE_INVAL_VFID)
550 		pf->vf[vf_id].ctrl_vsi_idx = vsi->idx;
551 	goto unlock_pf;
552 
553 err_rings:
554 	devm_kfree(dev, vsi);
555 	vsi = NULL;
556 unlock_pf:
557 	mutex_unlock(&pf->sw_mutex);
558 	return vsi;
559 }
560 
561 /**
562  * ice_alloc_fd_res - Allocate FD resource for a VSI
563  * @vsi: pointer to the ice_vsi
564  *
565  * This allocates the FD resources
566  *
567  * Returns 0 on success, -EPERM on no-op or -EIO on failure
568  */
569 static int ice_alloc_fd_res(struct ice_vsi *vsi)
570 {
571 	struct ice_pf *pf = vsi->back;
572 	u32 g_val, b_val;
573 
574 	/* Flow Director filters are only allocated/assigned to the PF VSI or
575 	 * CHNL VSI which passes the traffic. The CTRL VSI is only used to
576 	 * add/delete filters so resources are not allocated to it
577 	 */
578 	if (!test_bit(ICE_FLAG_FD_ENA, pf->flags))
579 		return -EPERM;
580 
581 	if (!(vsi->type == ICE_VSI_PF || vsi->type == ICE_VSI_VF ||
582 	      vsi->type == ICE_VSI_CHNL))
583 		return -EPERM;
584 
585 	/* FD filters from guaranteed pool per VSI */
586 	g_val = pf->hw.func_caps.fd_fltr_guar;
587 	if (!g_val)
588 		return -EPERM;
589 
590 	/* FD filters from best effort pool */
591 	b_val = pf->hw.func_caps.fd_fltr_best_effort;
592 	if (!b_val)
593 		return -EPERM;
594 
595 	/* PF main VSI gets only 64 FD resources from guaranteed pool
596 	 * when ADQ is configured.
597 	 */
598 #define ICE_PF_VSI_GFLTR	64
599 
600 	/* determine FD filter resources per VSI from shared(best effort) and
601 	 * dedicated pool
602 	 */
603 	if (vsi->type == ICE_VSI_PF) {
604 		vsi->num_gfltr = g_val;
605 		/* if MQPRIO is configured, main VSI doesn't get all FD
606 		 * resources from guaranteed pool. PF VSI gets 64 FD resources
607 		 */
608 		if (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) {
609 			if (g_val < ICE_PF_VSI_GFLTR)
610 				return -EPERM;
611 			/* allow bare minimum entries for PF VSI */
612 			vsi->num_gfltr = ICE_PF_VSI_GFLTR;
613 		}
614 
615 		/* each VSI gets same "best_effort" quota */
616 		vsi->num_bfltr = b_val;
617 	} else if (vsi->type == ICE_VSI_VF) {
618 		vsi->num_gfltr = 0;
619 
620 		/* each VSI gets same "best_effort" quota */
621 		vsi->num_bfltr = b_val;
622 	} else {
623 		struct ice_vsi *main_vsi;
624 		int numtc;
625 
626 		main_vsi = ice_get_main_vsi(pf);
627 		if (!main_vsi)
628 			return -EPERM;
629 
630 		if (!main_vsi->all_numtc)
631 			return -EINVAL;
632 
633 		/* figure out ADQ numtc */
634 		numtc = main_vsi->all_numtc - ICE_CHNL_START_TC;
635 
636 		/* only one TC but still asking resources for channels,
637 		 * invalid config
638 		 */
639 		if (numtc < ICE_CHNL_START_TC)
640 			return -EPERM;
641 
642 		g_val -= ICE_PF_VSI_GFLTR;
643 		/* channel VSIs gets equal share from guaranteed pool */
644 		vsi->num_gfltr = g_val / numtc;
645 
646 		/* each VSI gets same "best_effort" quota */
647 		vsi->num_bfltr = b_val;
648 	}
649 
650 	return 0;
651 }
652 
653 /**
654  * ice_vsi_get_qs - Assign queues from PF to VSI
655  * @vsi: the VSI to assign queues to
656  *
657  * Returns 0 on success and a negative value on error
658  */
659 static int ice_vsi_get_qs(struct ice_vsi *vsi)
660 {
661 	struct ice_pf *pf = vsi->back;
662 	struct ice_qs_cfg tx_qs_cfg = {
663 		.qs_mutex = &pf->avail_q_mutex,
664 		.pf_map = pf->avail_txqs,
665 		.pf_map_size = pf->max_pf_txqs,
666 		.q_count = vsi->alloc_txq,
667 		.scatter_count = ICE_MAX_SCATTER_TXQS,
668 		.vsi_map = vsi->txq_map,
669 		.vsi_map_offset = 0,
670 		.mapping_mode = ICE_VSI_MAP_CONTIG
671 	};
672 	struct ice_qs_cfg rx_qs_cfg = {
673 		.qs_mutex = &pf->avail_q_mutex,
674 		.pf_map = pf->avail_rxqs,
675 		.pf_map_size = pf->max_pf_rxqs,
676 		.q_count = vsi->alloc_rxq,
677 		.scatter_count = ICE_MAX_SCATTER_RXQS,
678 		.vsi_map = vsi->rxq_map,
679 		.vsi_map_offset = 0,
680 		.mapping_mode = ICE_VSI_MAP_CONTIG
681 	};
682 	int ret;
683 
684 	if (vsi->type == ICE_VSI_CHNL)
685 		return 0;
686 
687 	ret = __ice_vsi_get_qs(&tx_qs_cfg);
688 	if (ret)
689 		return ret;
690 	vsi->tx_mapping_mode = tx_qs_cfg.mapping_mode;
691 
692 	ret = __ice_vsi_get_qs(&rx_qs_cfg);
693 	if (ret)
694 		return ret;
695 	vsi->rx_mapping_mode = rx_qs_cfg.mapping_mode;
696 
697 	return 0;
698 }
699 
700 /**
701  * ice_vsi_put_qs - Release queues from VSI to PF
702  * @vsi: the VSI that is going to release queues
703  */
704 static void ice_vsi_put_qs(struct ice_vsi *vsi)
705 {
706 	struct ice_pf *pf = vsi->back;
707 	int i;
708 
709 	mutex_lock(&pf->avail_q_mutex);
710 
711 	ice_for_each_alloc_txq(vsi, i) {
712 		clear_bit(vsi->txq_map[i], pf->avail_txqs);
713 		vsi->txq_map[i] = ICE_INVAL_Q_INDEX;
714 	}
715 
716 	ice_for_each_alloc_rxq(vsi, i) {
717 		clear_bit(vsi->rxq_map[i], pf->avail_rxqs);
718 		vsi->rxq_map[i] = ICE_INVAL_Q_INDEX;
719 	}
720 
721 	mutex_unlock(&pf->avail_q_mutex);
722 }
723 
724 /**
725  * ice_is_safe_mode
726  * @pf: pointer to the PF struct
727  *
728  * returns true if driver is in safe mode, false otherwise
729  */
730 bool ice_is_safe_mode(struct ice_pf *pf)
731 {
732 	return !test_bit(ICE_FLAG_ADV_FEATURES, pf->flags);
733 }
734 
735 /**
736  * ice_is_aux_ena
737  * @pf: pointer to the PF struct
738  *
739  * returns true if AUX devices/drivers are supported, false otherwise
740  */
741 bool ice_is_aux_ena(struct ice_pf *pf)
742 {
743 	return test_bit(ICE_FLAG_AUX_ENA, pf->flags);
744 }
745 
746 /**
747  * ice_vsi_clean_rss_flow_fld - Delete RSS configuration
748  * @vsi: the VSI being cleaned up
749  *
750  * This function deletes RSS input set for all flows that were configured
751  * for this VSI
752  */
753 static void ice_vsi_clean_rss_flow_fld(struct ice_vsi *vsi)
754 {
755 	struct ice_pf *pf = vsi->back;
756 	int status;
757 
758 	if (ice_is_safe_mode(pf))
759 		return;
760 
761 	status = ice_rem_vsi_rss_cfg(&pf->hw, vsi->idx);
762 	if (status)
763 		dev_dbg(ice_pf_to_dev(pf), "ice_rem_vsi_rss_cfg failed for vsi = %d, error = %d\n",
764 			vsi->vsi_num, status);
765 }
766 
767 /**
768  * ice_rss_clean - Delete RSS related VSI structures and configuration
769  * @vsi: the VSI being removed
770  */
771 static void ice_rss_clean(struct ice_vsi *vsi)
772 {
773 	struct ice_pf *pf = vsi->back;
774 	struct device *dev;
775 
776 	dev = ice_pf_to_dev(pf);
777 
778 	if (vsi->rss_hkey_user)
779 		devm_kfree(dev, vsi->rss_hkey_user);
780 	if (vsi->rss_lut_user)
781 		devm_kfree(dev, vsi->rss_lut_user);
782 
783 	ice_vsi_clean_rss_flow_fld(vsi);
784 	/* remove RSS replay list */
785 	if (!ice_is_safe_mode(pf))
786 		ice_rem_vsi_rss_list(&pf->hw, vsi->idx);
787 }
788 
789 /**
790  * ice_vsi_set_rss_params - Setup RSS capabilities per VSI type
791  * @vsi: the VSI being configured
792  */
793 static void ice_vsi_set_rss_params(struct ice_vsi *vsi)
794 {
795 	struct ice_hw_common_caps *cap;
796 	struct ice_pf *pf = vsi->back;
797 
798 	if (!test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
799 		vsi->rss_size = 1;
800 		return;
801 	}
802 
803 	cap = &pf->hw.func_caps.common_cap;
804 	switch (vsi->type) {
805 	case ICE_VSI_CHNL:
806 	case ICE_VSI_PF:
807 		/* PF VSI will inherit RSS instance of PF */
808 		vsi->rss_table_size = (u16)cap->rss_table_size;
809 		if (vsi->type == ICE_VSI_CHNL)
810 			vsi->rss_size = min_t(u16, vsi->num_rxq,
811 					      BIT(cap->rss_table_entry_width));
812 		else
813 			vsi->rss_size = min_t(u16, num_online_cpus(),
814 					      BIT(cap->rss_table_entry_width));
815 		vsi->rss_lut_type = ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_PF;
816 		break;
817 	case ICE_VSI_SWITCHDEV_CTRL:
818 		vsi->rss_table_size = ICE_VSIQF_HLUT_ARRAY_SIZE;
819 		vsi->rss_size = min_t(u16, num_online_cpus(),
820 				      BIT(cap->rss_table_entry_width));
821 		vsi->rss_lut_type = ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_VSI;
822 		break;
823 	case ICE_VSI_VF:
824 		/* VF VSI will get a small RSS table.
825 		 * For VSI_LUT, LUT size should be set to 64 bytes.
826 		 */
827 		vsi->rss_table_size = ICE_VSIQF_HLUT_ARRAY_SIZE;
828 		vsi->rss_size = ICE_MAX_RSS_QS_PER_VF;
829 		vsi->rss_lut_type = ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_VSI;
830 		break;
831 	case ICE_VSI_LB:
832 		break;
833 	default:
834 		dev_dbg(ice_pf_to_dev(pf), "Unsupported VSI type %s\n",
835 			ice_vsi_type_str(vsi->type));
836 		break;
837 	}
838 }
839 
840 /**
841  * ice_set_dflt_vsi_ctx - Set default VSI context before adding a VSI
842  * @hw: HW structure used to determine the VLAN mode of the device
843  * @ctxt: the VSI context being set
844  *
845  * This initializes a default VSI context for all sections except the Queues.
846  */
847 static void ice_set_dflt_vsi_ctx(struct ice_hw *hw, struct ice_vsi_ctx *ctxt)
848 {
849 	u32 table = 0;
850 
851 	memset(&ctxt->info, 0, sizeof(ctxt->info));
852 	/* VSI's should be allocated from shared pool */
853 	ctxt->alloc_from_pool = true;
854 	/* Src pruning enabled by default */
855 	ctxt->info.sw_flags = ICE_AQ_VSI_SW_FLAG_SRC_PRUNE;
856 	/* Traffic from VSI can be sent to LAN */
857 	ctxt->info.sw_flags2 = ICE_AQ_VSI_SW_FLAG_LAN_ENA;
858 	/* allow all untagged/tagged packets by default on Tx */
859 	ctxt->info.inner_vlan_flags = ((ICE_AQ_VSI_INNER_VLAN_TX_MODE_ALL &
860 				  ICE_AQ_VSI_INNER_VLAN_TX_MODE_M) >>
861 				 ICE_AQ_VSI_INNER_VLAN_TX_MODE_S);
862 	/* SVM - by default bits 3 and 4 in inner_vlan_flags are 0's which
863 	 * results in legacy behavior (show VLAN, DEI, and UP) in descriptor.
864 	 *
865 	 * DVM - leave inner VLAN in packet by default
866 	 */
867 	if (ice_is_dvm_ena(hw)) {
868 		ctxt->info.inner_vlan_flags |=
869 			ICE_AQ_VSI_INNER_VLAN_EMODE_NOTHING;
870 		ctxt->info.outer_vlan_flags =
871 			(ICE_AQ_VSI_OUTER_VLAN_TX_MODE_ALL <<
872 			 ICE_AQ_VSI_OUTER_VLAN_TX_MODE_S) &
873 			ICE_AQ_VSI_OUTER_VLAN_TX_MODE_M;
874 		ctxt->info.outer_vlan_flags |=
875 			(ICE_AQ_VSI_OUTER_TAG_VLAN_8100 <<
876 			 ICE_AQ_VSI_OUTER_TAG_TYPE_S) &
877 			ICE_AQ_VSI_OUTER_TAG_TYPE_M;
878 	}
879 	/* Have 1:1 UP mapping for both ingress/egress tables */
880 	table |= ICE_UP_TABLE_TRANSLATE(0, 0);
881 	table |= ICE_UP_TABLE_TRANSLATE(1, 1);
882 	table |= ICE_UP_TABLE_TRANSLATE(2, 2);
883 	table |= ICE_UP_TABLE_TRANSLATE(3, 3);
884 	table |= ICE_UP_TABLE_TRANSLATE(4, 4);
885 	table |= ICE_UP_TABLE_TRANSLATE(5, 5);
886 	table |= ICE_UP_TABLE_TRANSLATE(6, 6);
887 	table |= ICE_UP_TABLE_TRANSLATE(7, 7);
888 	ctxt->info.ingress_table = cpu_to_le32(table);
889 	ctxt->info.egress_table = cpu_to_le32(table);
890 	/* Have 1:1 UP mapping for outer to inner UP table */
891 	ctxt->info.outer_up_table = cpu_to_le32(table);
892 	/* No Outer tag support outer_tag_flags remains to zero */
893 }
894 
895 /**
896  * ice_vsi_setup_q_map - Setup a VSI queue map
897  * @vsi: the VSI being configured
898  * @ctxt: VSI context structure
899  */
900 static void ice_vsi_setup_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt)
901 {
902 	u16 offset = 0, qmap = 0, tx_count = 0, pow = 0;
903 	u16 num_txq_per_tc, num_rxq_per_tc;
904 	u16 qcount_tx = vsi->alloc_txq;
905 	u16 qcount_rx = vsi->alloc_rxq;
906 	u8 netdev_tc = 0;
907 	int i;
908 
909 	if (!vsi->tc_cfg.numtc) {
910 		/* at least TC0 should be enabled by default */
911 		vsi->tc_cfg.numtc = 1;
912 		vsi->tc_cfg.ena_tc = 1;
913 	}
914 
915 	num_rxq_per_tc = min_t(u16, qcount_rx / vsi->tc_cfg.numtc, ICE_MAX_RXQS_PER_TC);
916 	if (!num_rxq_per_tc)
917 		num_rxq_per_tc = 1;
918 	num_txq_per_tc = qcount_tx / vsi->tc_cfg.numtc;
919 	if (!num_txq_per_tc)
920 		num_txq_per_tc = 1;
921 
922 	/* find the (rounded up) power-of-2 of qcount */
923 	pow = (u16)order_base_2(num_rxq_per_tc);
924 
925 	/* TC mapping is a function of the number of Rx queues assigned to the
926 	 * VSI for each traffic class and the offset of these queues.
927 	 * The first 10 bits are for queue offset for TC0, next 4 bits for no:of
928 	 * queues allocated to TC0. No:of queues is a power-of-2.
929 	 *
930 	 * If TC is not enabled, the queue offset is set to 0, and allocate one
931 	 * queue, this way, traffic for the given TC will be sent to the default
932 	 * queue.
933 	 *
934 	 * Setup number and offset of Rx queues for all TCs for the VSI
935 	 */
936 	ice_for_each_traffic_class(i) {
937 		if (!(vsi->tc_cfg.ena_tc & BIT(i))) {
938 			/* TC is not enabled */
939 			vsi->tc_cfg.tc_info[i].qoffset = 0;
940 			vsi->tc_cfg.tc_info[i].qcount_rx = 1;
941 			vsi->tc_cfg.tc_info[i].qcount_tx = 1;
942 			vsi->tc_cfg.tc_info[i].netdev_tc = 0;
943 			ctxt->info.tc_mapping[i] = 0;
944 			continue;
945 		}
946 
947 		/* TC is enabled */
948 		vsi->tc_cfg.tc_info[i].qoffset = offset;
949 		vsi->tc_cfg.tc_info[i].qcount_rx = num_rxq_per_tc;
950 		vsi->tc_cfg.tc_info[i].qcount_tx = num_txq_per_tc;
951 		vsi->tc_cfg.tc_info[i].netdev_tc = netdev_tc++;
952 
953 		qmap = ((offset << ICE_AQ_VSI_TC_Q_OFFSET_S) &
954 			ICE_AQ_VSI_TC_Q_OFFSET_M) |
955 			((pow << ICE_AQ_VSI_TC_Q_NUM_S) &
956 			 ICE_AQ_VSI_TC_Q_NUM_M);
957 		offset += num_rxq_per_tc;
958 		tx_count += num_txq_per_tc;
959 		ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
960 	}
961 
962 	/* if offset is non-zero, means it is calculated correctly based on
963 	 * enabled TCs for a given VSI otherwise qcount_rx will always
964 	 * be correct and non-zero because it is based off - VSI's
965 	 * allocated Rx queues which is at least 1 (hence qcount_tx will be
966 	 * at least 1)
967 	 */
968 	if (offset)
969 		vsi->num_rxq = offset;
970 	else
971 		vsi->num_rxq = num_rxq_per_tc;
972 
973 	vsi->num_txq = tx_count;
974 
975 	if (vsi->type == ICE_VSI_VF && vsi->num_txq != vsi->num_rxq) {
976 		dev_dbg(ice_pf_to_dev(vsi->back), "VF VSI should have same number of Tx and Rx queues. Hence making them equal\n");
977 		/* since there is a chance that num_rxq could have been changed
978 		 * in the above for loop, make num_txq equal to num_rxq.
979 		 */
980 		vsi->num_txq = vsi->num_rxq;
981 	}
982 
983 	/* Rx queue mapping */
984 	ctxt->info.mapping_flags |= cpu_to_le16(ICE_AQ_VSI_Q_MAP_CONTIG);
985 	/* q_mapping buffer holds the info for the first queue allocated for
986 	 * this VSI in the PF space and also the number of queues associated
987 	 * with this VSI.
988 	 */
989 	ctxt->info.q_mapping[0] = cpu_to_le16(vsi->rxq_map[0]);
990 	ctxt->info.q_mapping[1] = cpu_to_le16(vsi->num_rxq);
991 }
992 
993 /**
994  * ice_set_fd_vsi_ctx - Set FD VSI context before adding a VSI
995  * @ctxt: the VSI context being set
996  * @vsi: the VSI being configured
997  */
998 static void ice_set_fd_vsi_ctx(struct ice_vsi_ctx *ctxt, struct ice_vsi *vsi)
999 {
1000 	u8 dflt_q_group, dflt_q_prio;
1001 	u16 dflt_q, report_q, val;
1002 
1003 	if (vsi->type != ICE_VSI_PF && vsi->type != ICE_VSI_CTRL &&
1004 	    vsi->type != ICE_VSI_VF && vsi->type != ICE_VSI_CHNL)
1005 		return;
1006 
1007 	val = ICE_AQ_VSI_PROP_FLOW_DIR_VALID;
1008 	ctxt->info.valid_sections |= cpu_to_le16(val);
1009 	dflt_q = 0;
1010 	dflt_q_group = 0;
1011 	report_q = 0;
1012 	dflt_q_prio = 0;
1013 
1014 	/* enable flow director filtering/programming */
1015 	val = ICE_AQ_VSI_FD_ENABLE | ICE_AQ_VSI_FD_PROG_ENABLE;
1016 	ctxt->info.fd_options = cpu_to_le16(val);
1017 	/* max of allocated flow director filters */
1018 	ctxt->info.max_fd_fltr_dedicated =
1019 			cpu_to_le16(vsi->num_gfltr);
1020 	/* max of shared flow director filters any VSI may program */
1021 	ctxt->info.max_fd_fltr_shared =
1022 			cpu_to_le16(vsi->num_bfltr);
1023 	/* default queue index within the VSI of the default FD */
1024 	val = ((dflt_q << ICE_AQ_VSI_FD_DEF_Q_S) &
1025 	       ICE_AQ_VSI_FD_DEF_Q_M);
1026 	/* target queue or queue group to the FD filter */
1027 	val |= ((dflt_q_group << ICE_AQ_VSI_FD_DEF_GRP_S) &
1028 		ICE_AQ_VSI_FD_DEF_GRP_M);
1029 	ctxt->info.fd_def_q = cpu_to_le16(val);
1030 	/* queue index on which FD filter completion is reported */
1031 	val = ((report_q << ICE_AQ_VSI_FD_REPORT_Q_S) &
1032 	       ICE_AQ_VSI_FD_REPORT_Q_M);
1033 	/* priority of the default qindex action */
1034 	val |= ((dflt_q_prio << ICE_AQ_VSI_FD_DEF_PRIORITY_S) &
1035 		ICE_AQ_VSI_FD_DEF_PRIORITY_M);
1036 	ctxt->info.fd_report_opt = cpu_to_le16(val);
1037 }
1038 
1039 /**
1040  * ice_set_rss_vsi_ctx - Set RSS VSI context before adding a VSI
1041  * @ctxt: the VSI context being set
1042  * @vsi: the VSI being configured
1043  */
1044 static void ice_set_rss_vsi_ctx(struct ice_vsi_ctx *ctxt, struct ice_vsi *vsi)
1045 {
1046 	u8 lut_type, hash_type;
1047 	struct device *dev;
1048 	struct ice_pf *pf;
1049 
1050 	pf = vsi->back;
1051 	dev = ice_pf_to_dev(pf);
1052 
1053 	switch (vsi->type) {
1054 	case ICE_VSI_CHNL:
1055 	case ICE_VSI_PF:
1056 		/* PF VSI will inherit RSS instance of PF */
1057 		lut_type = ICE_AQ_VSI_Q_OPT_RSS_LUT_PF;
1058 		hash_type = ICE_AQ_VSI_Q_OPT_RSS_TPLZ;
1059 		break;
1060 	case ICE_VSI_VF:
1061 		/* VF VSI will gets a small RSS table which is a VSI LUT type */
1062 		lut_type = ICE_AQ_VSI_Q_OPT_RSS_LUT_VSI;
1063 		hash_type = ICE_AQ_VSI_Q_OPT_RSS_TPLZ;
1064 		break;
1065 	default:
1066 		dev_dbg(dev, "Unsupported VSI type %s\n",
1067 			ice_vsi_type_str(vsi->type));
1068 		return;
1069 	}
1070 
1071 	ctxt->info.q_opt_rss = ((lut_type << ICE_AQ_VSI_Q_OPT_RSS_LUT_S) &
1072 				ICE_AQ_VSI_Q_OPT_RSS_LUT_M) |
1073 				((hash_type << ICE_AQ_VSI_Q_OPT_RSS_HASH_S) &
1074 				 ICE_AQ_VSI_Q_OPT_RSS_HASH_M);
1075 }
1076 
1077 static void
1078 ice_chnl_vsi_setup_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt)
1079 {
1080 	struct ice_pf *pf = vsi->back;
1081 	u16 qcount, qmap;
1082 	u8 offset = 0;
1083 	int pow;
1084 
1085 	qcount = min_t(int, vsi->num_rxq, pf->num_lan_msix);
1086 
1087 	pow = order_base_2(qcount);
1088 	qmap = ((offset << ICE_AQ_VSI_TC_Q_OFFSET_S) &
1089 		 ICE_AQ_VSI_TC_Q_OFFSET_M) |
1090 		 ((pow << ICE_AQ_VSI_TC_Q_NUM_S) &
1091 		   ICE_AQ_VSI_TC_Q_NUM_M);
1092 
1093 	ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
1094 	ctxt->info.mapping_flags |= cpu_to_le16(ICE_AQ_VSI_Q_MAP_CONTIG);
1095 	ctxt->info.q_mapping[0] = cpu_to_le16(vsi->next_base_q);
1096 	ctxt->info.q_mapping[1] = cpu_to_le16(qcount);
1097 }
1098 
1099 /**
1100  * ice_vsi_init - Create and initialize a VSI
1101  * @vsi: the VSI being configured
1102  * @init_vsi: is this call creating a VSI
1103  *
1104  * This initializes a VSI context depending on the VSI type to be added and
1105  * passes it down to the add_vsi aq command to create a new VSI.
1106  */
1107 static int ice_vsi_init(struct ice_vsi *vsi, bool init_vsi)
1108 {
1109 	struct ice_pf *pf = vsi->back;
1110 	struct ice_hw *hw = &pf->hw;
1111 	struct ice_vsi_ctx *ctxt;
1112 	struct device *dev;
1113 	int ret = 0;
1114 
1115 	dev = ice_pf_to_dev(pf);
1116 	ctxt = kzalloc(sizeof(*ctxt), GFP_KERNEL);
1117 	if (!ctxt)
1118 		return -ENOMEM;
1119 
1120 	switch (vsi->type) {
1121 	case ICE_VSI_CTRL:
1122 	case ICE_VSI_LB:
1123 	case ICE_VSI_PF:
1124 		ctxt->flags = ICE_AQ_VSI_TYPE_PF;
1125 		break;
1126 	case ICE_VSI_SWITCHDEV_CTRL:
1127 	case ICE_VSI_CHNL:
1128 		ctxt->flags = ICE_AQ_VSI_TYPE_VMDQ2;
1129 		break;
1130 	case ICE_VSI_VF:
1131 		ctxt->flags = ICE_AQ_VSI_TYPE_VF;
1132 		/* VF number here is the absolute VF number (0-255) */
1133 		ctxt->vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
1134 		break;
1135 	default:
1136 		ret = -ENODEV;
1137 		goto out;
1138 	}
1139 
1140 	/* Handle VLAN pruning for channel VSI if main VSI has VLAN
1141 	 * prune enabled
1142 	 */
1143 	if (vsi->type == ICE_VSI_CHNL) {
1144 		struct ice_vsi *main_vsi;
1145 
1146 		main_vsi = ice_get_main_vsi(pf);
1147 		if (main_vsi && ice_vsi_is_vlan_pruning_ena(main_vsi))
1148 			ctxt->info.sw_flags2 |=
1149 				ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA;
1150 		else
1151 			ctxt->info.sw_flags2 &=
1152 				~ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA;
1153 	}
1154 
1155 	ice_set_dflt_vsi_ctx(hw, ctxt);
1156 	if (test_bit(ICE_FLAG_FD_ENA, pf->flags))
1157 		ice_set_fd_vsi_ctx(ctxt, vsi);
1158 	/* if the switch is in VEB mode, allow VSI loopback */
1159 	if (vsi->vsw->bridge_mode == BRIDGE_MODE_VEB)
1160 		ctxt->info.sw_flags |= ICE_AQ_VSI_SW_FLAG_ALLOW_LB;
1161 
1162 	/* Set LUT type and HASH type if RSS is enabled */
1163 	if (test_bit(ICE_FLAG_RSS_ENA, pf->flags) &&
1164 	    vsi->type != ICE_VSI_CTRL) {
1165 		ice_set_rss_vsi_ctx(ctxt, vsi);
1166 		/* if updating VSI context, make sure to set valid_section:
1167 		 * to indicate which section of VSI context being updated
1168 		 */
1169 		if (!init_vsi)
1170 			ctxt->info.valid_sections |=
1171 				cpu_to_le16(ICE_AQ_VSI_PROP_Q_OPT_VALID);
1172 	}
1173 
1174 	ctxt->info.sw_id = vsi->port_info->sw_id;
1175 	if (vsi->type == ICE_VSI_CHNL) {
1176 		ice_chnl_vsi_setup_q_map(vsi, ctxt);
1177 	} else {
1178 		ice_vsi_setup_q_map(vsi, ctxt);
1179 		if (!init_vsi) /* means VSI being updated */
1180 			/* must to indicate which section of VSI context are
1181 			 * being modified
1182 			 */
1183 			ctxt->info.valid_sections |=
1184 				cpu_to_le16(ICE_AQ_VSI_PROP_RXQ_MAP_VALID);
1185 	}
1186 
1187 	/* Allow control frames out of main VSI */
1188 	if (vsi->type == ICE_VSI_PF) {
1189 		ctxt->info.sec_flags |= ICE_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD;
1190 		ctxt->info.valid_sections |=
1191 			cpu_to_le16(ICE_AQ_VSI_PROP_SECURITY_VALID);
1192 	}
1193 
1194 	if (init_vsi) {
1195 		ret = ice_add_vsi(hw, vsi->idx, ctxt, NULL);
1196 		if (ret) {
1197 			dev_err(dev, "Add VSI failed, err %d\n", ret);
1198 			ret = -EIO;
1199 			goto out;
1200 		}
1201 	} else {
1202 		ret = ice_update_vsi(hw, vsi->idx, ctxt, NULL);
1203 		if (ret) {
1204 			dev_err(dev, "Update VSI failed, err %d\n", ret);
1205 			ret = -EIO;
1206 			goto out;
1207 		}
1208 	}
1209 
1210 	/* keep context for update VSI operations */
1211 	vsi->info = ctxt->info;
1212 
1213 	/* record VSI number returned */
1214 	vsi->vsi_num = ctxt->vsi_num;
1215 
1216 out:
1217 	kfree(ctxt);
1218 	return ret;
1219 }
1220 
1221 /**
1222  * ice_free_res - free a block of resources
1223  * @res: pointer to the resource
1224  * @index: starting index previously returned by ice_get_res
1225  * @id: identifier to track owner
1226  *
1227  * Returns number of resources freed
1228  */
1229 int ice_free_res(struct ice_res_tracker *res, u16 index, u16 id)
1230 {
1231 	int count = 0;
1232 	int i;
1233 
1234 	if (!res || index >= res->end)
1235 		return -EINVAL;
1236 
1237 	id |= ICE_RES_VALID_BIT;
1238 	for (i = index; i < res->end && res->list[i] == id; i++) {
1239 		res->list[i] = 0;
1240 		count++;
1241 	}
1242 
1243 	return count;
1244 }
1245 
1246 /**
1247  * ice_search_res - Search the tracker for a block of resources
1248  * @res: pointer to the resource
1249  * @needed: size of the block needed
1250  * @id: identifier to track owner
1251  *
1252  * Returns the base item index of the block, or -ENOMEM for error
1253  */
1254 static int ice_search_res(struct ice_res_tracker *res, u16 needed, u16 id)
1255 {
1256 	u16 start = 0, end = 0;
1257 
1258 	if (needed > res->end)
1259 		return -ENOMEM;
1260 
1261 	id |= ICE_RES_VALID_BIT;
1262 
1263 	do {
1264 		/* skip already allocated entries */
1265 		if (res->list[end++] & ICE_RES_VALID_BIT) {
1266 			start = end;
1267 			if ((start + needed) > res->end)
1268 				break;
1269 		}
1270 
1271 		if (end == (start + needed)) {
1272 			int i = start;
1273 
1274 			/* there was enough, so assign it to the requestor */
1275 			while (i != end)
1276 				res->list[i++] = id;
1277 
1278 			return start;
1279 		}
1280 	} while (end < res->end);
1281 
1282 	return -ENOMEM;
1283 }
1284 
1285 /**
1286  * ice_get_free_res_count - Get free count from a resource tracker
1287  * @res: Resource tracker instance
1288  */
1289 static u16 ice_get_free_res_count(struct ice_res_tracker *res)
1290 {
1291 	u16 i, count = 0;
1292 
1293 	for (i = 0; i < res->end; i++)
1294 		if (!(res->list[i] & ICE_RES_VALID_BIT))
1295 			count++;
1296 
1297 	return count;
1298 }
1299 
1300 /**
1301  * ice_get_res - get a block of resources
1302  * @pf: board private structure
1303  * @res: pointer to the resource
1304  * @needed: size of the block needed
1305  * @id: identifier to track owner
1306  *
1307  * Returns the base item index of the block, or negative for error
1308  */
1309 int
1310 ice_get_res(struct ice_pf *pf, struct ice_res_tracker *res, u16 needed, u16 id)
1311 {
1312 	if (!res || !pf)
1313 		return -EINVAL;
1314 
1315 	if (!needed || needed > res->num_entries || id >= ICE_RES_VALID_BIT) {
1316 		dev_err(ice_pf_to_dev(pf), "param err: needed=%d, num_entries = %d id=0x%04x\n",
1317 			needed, res->num_entries, id);
1318 		return -EINVAL;
1319 	}
1320 
1321 	return ice_search_res(res, needed, id);
1322 }
1323 
1324 /**
1325  * ice_vsi_setup_vector_base - Set up the base vector for the given VSI
1326  * @vsi: ptr to the VSI
1327  *
1328  * This should only be called after ice_vsi_alloc() which allocates the
1329  * corresponding SW VSI structure and initializes num_queue_pairs for the
1330  * newly allocated VSI.
1331  *
1332  * Returns 0 on success or negative on failure
1333  */
1334 static int ice_vsi_setup_vector_base(struct ice_vsi *vsi)
1335 {
1336 	struct ice_pf *pf = vsi->back;
1337 	struct device *dev;
1338 	u16 num_q_vectors;
1339 	int base;
1340 
1341 	dev = ice_pf_to_dev(pf);
1342 	/* SRIOV doesn't grab irq_tracker entries for each VSI */
1343 	if (vsi->type == ICE_VSI_VF)
1344 		return 0;
1345 	if (vsi->type == ICE_VSI_CHNL)
1346 		return 0;
1347 
1348 	if (vsi->base_vector) {
1349 		dev_dbg(dev, "VSI %d has non-zero base vector %d\n",
1350 			vsi->vsi_num, vsi->base_vector);
1351 		return -EEXIST;
1352 	}
1353 
1354 	num_q_vectors = vsi->num_q_vectors;
1355 	/* reserve slots from OS requested IRQs */
1356 	if (vsi->type == ICE_VSI_CTRL && vsi->vf_id != ICE_INVAL_VFID) {
1357 		int i;
1358 
1359 		ice_for_each_vf(pf, i) {
1360 			struct ice_vf *vf = &pf->vf[i];
1361 
1362 			if (i != vsi->vf_id && vf->ctrl_vsi_idx != ICE_NO_VSI) {
1363 				base = pf->vsi[vf->ctrl_vsi_idx]->base_vector;
1364 				break;
1365 			}
1366 		}
1367 		if (i == pf->num_alloc_vfs)
1368 			base = ice_get_res(pf, pf->irq_tracker, num_q_vectors,
1369 					   ICE_RES_VF_CTRL_VEC_ID);
1370 	} else {
1371 		base = ice_get_res(pf, pf->irq_tracker, num_q_vectors,
1372 				   vsi->idx);
1373 	}
1374 
1375 	if (base < 0) {
1376 		dev_err(dev, "%d MSI-X interrupts available. %s %d failed to get %d MSI-X vectors\n",
1377 			ice_get_free_res_count(pf->irq_tracker),
1378 			ice_vsi_type_str(vsi->type), vsi->idx, num_q_vectors);
1379 		return -ENOENT;
1380 	}
1381 	vsi->base_vector = (u16)base;
1382 	pf->num_avail_sw_msix -= num_q_vectors;
1383 
1384 	return 0;
1385 }
1386 
1387 /**
1388  * ice_vsi_clear_rings - Deallocates the Tx and Rx rings for VSI
1389  * @vsi: the VSI having rings deallocated
1390  */
1391 static void ice_vsi_clear_rings(struct ice_vsi *vsi)
1392 {
1393 	int i;
1394 
1395 	/* Avoid stale references by clearing map from vector to ring */
1396 	if (vsi->q_vectors) {
1397 		ice_for_each_q_vector(vsi, i) {
1398 			struct ice_q_vector *q_vector = vsi->q_vectors[i];
1399 
1400 			if (q_vector) {
1401 				q_vector->tx.tx_ring = NULL;
1402 				q_vector->rx.rx_ring = NULL;
1403 			}
1404 		}
1405 	}
1406 
1407 	if (vsi->tx_rings) {
1408 		ice_for_each_alloc_txq(vsi, i) {
1409 			if (vsi->tx_rings[i]) {
1410 				kfree_rcu(vsi->tx_rings[i], rcu);
1411 				WRITE_ONCE(vsi->tx_rings[i], NULL);
1412 			}
1413 		}
1414 	}
1415 	if (vsi->rx_rings) {
1416 		ice_for_each_alloc_rxq(vsi, i) {
1417 			if (vsi->rx_rings[i]) {
1418 				kfree_rcu(vsi->rx_rings[i], rcu);
1419 				WRITE_ONCE(vsi->rx_rings[i], NULL);
1420 			}
1421 		}
1422 	}
1423 }
1424 
1425 /**
1426  * ice_vsi_alloc_rings - Allocates Tx and Rx rings for the VSI
1427  * @vsi: VSI which is having rings allocated
1428  */
1429 static int ice_vsi_alloc_rings(struct ice_vsi *vsi)
1430 {
1431 	bool dvm_ena = ice_is_dvm_ena(&vsi->back->hw);
1432 	struct ice_pf *pf = vsi->back;
1433 	struct device *dev;
1434 	u16 i;
1435 
1436 	dev = ice_pf_to_dev(pf);
1437 	/* Allocate Tx rings */
1438 	ice_for_each_alloc_txq(vsi, i) {
1439 		struct ice_tx_ring *ring;
1440 
1441 		/* allocate with kzalloc(), free with kfree_rcu() */
1442 		ring = kzalloc(sizeof(*ring), GFP_KERNEL);
1443 
1444 		if (!ring)
1445 			goto err_out;
1446 
1447 		ring->q_index = i;
1448 		ring->reg_idx = vsi->txq_map[i];
1449 		ring->vsi = vsi;
1450 		ring->tx_tstamps = &pf->ptp.port.tx;
1451 		ring->dev = dev;
1452 		ring->count = vsi->num_tx_desc;
1453 		if (dvm_ena)
1454 			ring->flags |= ICE_TX_FLAGS_RING_VLAN_L2TAG2;
1455 		else
1456 			ring->flags |= ICE_TX_FLAGS_RING_VLAN_L2TAG1;
1457 		WRITE_ONCE(vsi->tx_rings[i], ring);
1458 	}
1459 
1460 	/* Allocate Rx rings */
1461 	ice_for_each_alloc_rxq(vsi, i) {
1462 		struct ice_rx_ring *ring;
1463 
1464 		/* allocate with kzalloc(), free with kfree_rcu() */
1465 		ring = kzalloc(sizeof(*ring), GFP_KERNEL);
1466 		if (!ring)
1467 			goto err_out;
1468 
1469 		ring->q_index = i;
1470 		ring->reg_idx = vsi->rxq_map[i];
1471 		ring->vsi = vsi;
1472 		ring->netdev = vsi->netdev;
1473 		ring->dev = dev;
1474 		ring->count = vsi->num_rx_desc;
1475 		WRITE_ONCE(vsi->rx_rings[i], ring);
1476 	}
1477 
1478 	return 0;
1479 
1480 err_out:
1481 	ice_vsi_clear_rings(vsi);
1482 	return -ENOMEM;
1483 }
1484 
1485 /**
1486  * ice_vsi_manage_rss_lut - disable/enable RSS
1487  * @vsi: the VSI being changed
1488  * @ena: boolean value indicating if this is an enable or disable request
1489  *
1490  * In the event of disable request for RSS, this function will zero out RSS
1491  * LUT, while in the event of enable request for RSS, it will reconfigure RSS
1492  * LUT.
1493  */
1494 void ice_vsi_manage_rss_lut(struct ice_vsi *vsi, bool ena)
1495 {
1496 	u8 *lut;
1497 
1498 	lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
1499 	if (!lut)
1500 		return;
1501 
1502 	if (ena) {
1503 		if (vsi->rss_lut_user)
1504 			memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
1505 		else
1506 			ice_fill_rss_lut(lut, vsi->rss_table_size,
1507 					 vsi->rss_size);
1508 	}
1509 
1510 	ice_set_rss_lut(vsi, lut, vsi->rss_table_size);
1511 	kfree(lut);
1512 }
1513 
1514 /**
1515  * ice_vsi_cfg_rss_lut_key - Configure RSS params for a VSI
1516  * @vsi: VSI to be configured
1517  */
1518 int ice_vsi_cfg_rss_lut_key(struct ice_vsi *vsi)
1519 {
1520 	struct ice_pf *pf = vsi->back;
1521 	struct device *dev;
1522 	u8 *lut, *key;
1523 	int err;
1524 
1525 	dev = ice_pf_to_dev(pf);
1526 	if (vsi->type == ICE_VSI_PF && vsi->ch_rss_size &&
1527 	    (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))) {
1528 		vsi->rss_size = min_t(u16, vsi->rss_size, vsi->ch_rss_size);
1529 	} else {
1530 		vsi->rss_size = min_t(u16, vsi->rss_size, vsi->num_rxq);
1531 
1532 		/* If orig_rss_size is valid and it is less than determined
1533 		 * main VSI's rss_size, update main VSI's rss_size to be
1534 		 * orig_rss_size so that when tc-qdisc is deleted, main VSI
1535 		 * RSS table gets programmed to be correct (whatever it was
1536 		 * to begin with (prior to setup-tc for ADQ config)
1537 		 */
1538 		if (vsi->orig_rss_size && vsi->rss_size < vsi->orig_rss_size &&
1539 		    vsi->orig_rss_size <= vsi->num_rxq) {
1540 			vsi->rss_size = vsi->orig_rss_size;
1541 			/* now orig_rss_size is used, reset it to zero */
1542 			vsi->orig_rss_size = 0;
1543 		}
1544 	}
1545 
1546 	lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
1547 	if (!lut)
1548 		return -ENOMEM;
1549 
1550 	if (vsi->rss_lut_user)
1551 		memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
1552 	else
1553 		ice_fill_rss_lut(lut, vsi->rss_table_size, vsi->rss_size);
1554 
1555 	err = ice_set_rss_lut(vsi, lut, vsi->rss_table_size);
1556 	if (err) {
1557 		dev_err(dev, "set_rss_lut failed, error %d\n", err);
1558 		goto ice_vsi_cfg_rss_exit;
1559 	}
1560 
1561 	key = kzalloc(ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE, GFP_KERNEL);
1562 	if (!key) {
1563 		err = -ENOMEM;
1564 		goto ice_vsi_cfg_rss_exit;
1565 	}
1566 
1567 	if (vsi->rss_hkey_user)
1568 		memcpy(key, vsi->rss_hkey_user, ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE);
1569 	else
1570 		netdev_rss_key_fill((void *)key, ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE);
1571 
1572 	err = ice_set_rss_key(vsi, key);
1573 	if (err)
1574 		dev_err(dev, "set_rss_key failed, error %d\n", err);
1575 
1576 	kfree(key);
1577 ice_vsi_cfg_rss_exit:
1578 	kfree(lut);
1579 	return err;
1580 }
1581 
1582 /**
1583  * ice_vsi_set_vf_rss_flow_fld - Sets VF VSI RSS input set for different flows
1584  * @vsi: VSI to be configured
1585  *
1586  * This function will only be called during the VF VSI setup. Upon successful
1587  * completion of package download, this function will configure default RSS
1588  * input sets for VF VSI.
1589  */
1590 static void ice_vsi_set_vf_rss_flow_fld(struct ice_vsi *vsi)
1591 {
1592 	struct ice_pf *pf = vsi->back;
1593 	struct device *dev;
1594 	int status;
1595 
1596 	dev = ice_pf_to_dev(pf);
1597 	if (ice_is_safe_mode(pf)) {
1598 		dev_dbg(dev, "Advanced RSS disabled. Package download failed, vsi num = %d\n",
1599 			vsi->vsi_num);
1600 		return;
1601 	}
1602 
1603 	status = ice_add_avf_rss_cfg(&pf->hw, vsi->idx, ICE_DEFAULT_RSS_HENA);
1604 	if (status)
1605 		dev_dbg(dev, "ice_add_avf_rss_cfg failed for vsi = %d, error = %d\n",
1606 			vsi->vsi_num, status);
1607 }
1608 
1609 /**
1610  * ice_vsi_set_rss_flow_fld - Sets RSS input set for different flows
1611  * @vsi: VSI to be configured
1612  *
1613  * This function will only be called after successful download package call
1614  * during initialization of PF. Since the downloaded package will erase the
1615  * RSS section, this function will configure RSS input sets for different
1616  * flow types. The last profile added has the highest priority, therefore 2
1617  * tuple profiles (i.e. IPv4 src/dst) are added before 4 tuple profiles
1618  * (i.e. IPv4 src/dst TCP src/dst port).
1619  */
1620 static void ice_vsi_set_rss_flow_fld(struct ice_vsi *vsi)
1621 {
1622 	u16 vsi_handle = vsi->idx, vsi_num = vsi->vsi_num;
1623 	struct ice_pf *pf = vsi->back;
1624 	struct ice_hw *hw = &pf->hw;
1625 	struct device *dev;
1626 	int status;
1627 
1628 	dev = ice_pf_to_dev(pf);
1629 	if (ice_is_safe_mode(pf)) {
1630 		dev_dbg(dev, "Advanced RSS disabled. Package download failed, vsi num = %d\n",
1631 			vsi_num);
1632 		return;
1633 	}
1634 	/* configure RSS for IPv4 with input set IP src/dst */
1635 	status = ice_add_rss_cfg(hw, vsi_handle, ICE_FLOW_HASH_IPV4,
1636 				 ICE_FLOW_SEG_HDR_IPV4);
1637 	if (status)
1638 		dev_dbg(dev, "ice_add_rss_cfg failed for ipv4 flow, vsi = %d, error = %d\n",
1639 			vsi_num, status);
1640 
1641 	/* configure RSS for IPv6 with input set IPv6 src/dst */
1642 	status = ice_add_rss_cfg(hw, vsi_handle, ICE_FLOW_HASH_IPV6,
1643 				 ICE_FLOW_SEG_HDR_IPV6);
1644 	if (status)
1645 		dev_dbg(dev, "ice_add_rss_cfg failed for ipv6 flow, vsi = %d, error = %d\n",
1646 			vsi_num, status);
1647 
1648 	/* configure RSS for tcp4 with input set IP src/dst, TCP src/dst */
1649 	status = ice_add_rss_cfg(hw, vsi_handle, ICE_HASH_TCP_IPV4,
1650 				 ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV4);
1651 	if (status)
1652 		dev_dbg(dev, "ice_add_rss_cfg failed for tcp4 flow, vsi = %d, error = %d\n",
1653 			vsi_num, status);
1654 
1655 	/* configure RSS for udp4 with input set IP src/dst, UDP src/dst */
1656 	status = ice_add_rss_cfg(hw, vsi_handle, ICE_HASH_UDP_IPV4,
1657 				 ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV4);
1658 	if (status)
1659 		dev_dbg(dev, "ice_add_rss_cfg failed for udp4 flow, vsi = %d, error = %d\n",
1660 			vsi_num, status);
1661 
1662 	/* configure RSS for sctp4 with input set IP src/dst */
1663 	status = ice_add_rss_cfg(hw, vsi_handle, ICE_FLOW_HASH_IPV4,
1664 				 ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV4);
1665 	if (status)
1666 		dev_dbg(dev, "ice_add_rss_cfg failed for sctp4 flow, vsi = %d, error = %d\n",
1667 			vsi_num, status);
1668 
1669 	/* configure RSS for tcp6 with input set IPv6 src/dst, TCP src/dst */
1670 	status = ice_add_rss_cfg(hw, vsi_handle, ICE_HASH_TCP_IPV6,
1671 				 ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV6);
1672 	if (status)
1673 		dev_dbg(dev, "ice_add_rss_cfg failed for tcp6 flow, vsi = %d, error = %d\n",
1674 			vsi_num, status);
1675 
1676 	/* configure RSS for udp6 with input set IPv6 src/dst, UDP src/dst */
1677 	status = ice_add_rss_cfg(hw, vsi_handle, ICE_HASH_UDP_IPV6,
1678 				 ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV6);
1679 	if (status)
1680 		dev_dbg(dev, "ice_add_rss_cfg failed for udp6 flow, vsi = %d, error = %d\n",
1681 			vsi_num, status);
1682 
1683 	/* configure RSS for sctp6 with input set IPv6 src/dst */
1684 	status = ice_add_rss_cfg(hw, vsi_handle, ICE_FLOW_HASH_IPV6,
1685 				 ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV6);
1686 	if (status)
1687 		dev_dbg(dev, "ice_add_rss_cfg failed for sctp6 flow, vsi = %d, error = %d\n",
1688 			vsi_num, status);
1689 }
1690 
1691 /**
1692  * ice_pf_state_is_nominal - checks the PF for nominal state
1693  * @pf: pointer to PF to check
1694  *
1695  * Check the PF's state for a collection of bits that would indicate
1696  * the PF is in a state that would inhibit normal operation for
1697  * driver functionality.
1698  *
1699  * Returns true if PF is in a nominal state, false otherwise
1700  */
1701 bool ice_pf_state_is_nominal(struct ice_pf *pf)
1702 {
1703 	DECLARE_BITMAP(check_bits, ICE_STATE_NBITS) = { 0 };
1704 
1705 	if (!pf)
1706 		return false;
1707 
1708 	bitmap_set(check_bits, 0, ICE_STATE_NOMINAL_CHECK_BITS);
1709 	if (bitmap_intersects(pf->state, check_bits, ICE_STATE_NBITS))
1710 		return false;
1711 
1712 	return true;
1713 }
1714 
1715 /**
1716  * ice_update_eth_stats - Update VSI-specific ethernet statistics counters
1717  * @vsi: the VSI to be updated
1718  */
1719 void ice_update_eth_stats(struct ice_vsi *vsi)
1720 {
1721 	struct ice_eth_stats *prev_es, *cur_es;
1722 	struct ice_hw *hw = &vsi->back->hw;
1723 	u16 vsi_num = vsi->vsi_num;    /* HW absolute index of a VSI */
1724 
1725 	prev_es = &vsi->eth_stats_prev;
1726 	cur_es = &vsi->eth_stats;
1727 
1728 	ice_stat_update40(hw, GLV_GORCL(vsi_num), vsi->stat_offsets_loaded,
1729 			  &prev_es->rx_bytes, &cur_es->rx_bytes);
1730 
1731 	ice_stat_update40(hw, GLV_UPRCL(vsi_num), vsi->stat_offsets_loaded,
1732 			  &prev_es->rx_unicast, &cur_es->rx_unicast);
1733 
1734 	ice_stat_update40(hw, GLV_MPRCL(vsi_num), vsi->stat_offsets_loaded,
1735 			  &prev_es->rx_multicast, &cur_es->rx_multicast);
1736 
1737 	ice_stat_update40(hw, GLV_BPRCL(vsi_num), vsi->stat_offsets_loaded,
1738 			  &prev_es->rx_broadcast, &cur_es->rx_broadcast);
1739 
1740 	ice_stat_update32(hw, GLV_RDPC(vsi_num), vsi->stat_offsets_loaded,
1741 			  &prev_es->rx_discards, &cur_es->rx_discards);
1742 
1743 	ice_stat_update40(hw, GLV_GOTCL(vsi_num), vsi->stat_offsets_loaded,
1744 			  &prev_es->tx_bytes, &cur_es->tx_bytes);
1745 
1746 	ice_stat_update40(hw, GLV_UPTCL(vsi_num), vsi->stat_offsets_loaded,
1747 			  &prev_es->tx_unicast, &cur_es->tx_unicast);
1748 
1749 	ice_stat_update40(hw, GLV_MPTCL(vsi_num), vsi->stat_offsets_loaded,
1750 			  &prev_es->tx_multicast, &cur_es->tx_multicast);
1751 
1752 	ice_stat_update40(hw, GLV_BPTCL(vsi_num), vsi->stat_offsets_loaded,
1753 			  &prev_es->tx_broadcast, &cur_es->tx_broadcast);
1754 
1755 	ice_stat_update32(hw, GLV_TEPC(vsi_num), vsi->stat_offsets_loaded,
1756 			  &prev_es->tx_errors, &cur_es->tx_errors);
1757 
1758 	vsi->stat_offsets_loaded = true;
1759 }
1760 
1761 /**
1762  * ice_vsi_cfg_frame_size - setup max frame size and Rx buffer length
1763  * @vsi: VSI
1764  */
1765 void ice_vsi_cfg_frame_size(struct ice_vsi *vsi)
1766 {
1767 	if (!vsi->netdev || test_bit(ICE_FLAG_LEGACY_RX, vsi->back->flags)) {
1768 		vsi->max_frame = ICE_AQ_SET_MAC_FRAME_SIZE_MAX;
1769 		vsi->rx_buf_len = ICE_RXBUF_2048;
1770 #if (PAGE_SIZE < 8192)
1771 	} else if (!ICE_2K_TOO_SMALL_WITH_PADDING &&
1772 		   (vsi->netdev->mtu <= ETH_DATA_LEN)) {
1773 		vsi->max_frame = ICE_RXBUF_1536 - NET_IP_ALIGN;
1774 		vsi->rx_buf_len = ICE_RXBUF_1536 - NET_IP_ALIGN;
1775 #endif
1776 	} else {
1777 		vsi->max_frame = ICE_AQ_SET_MAC_FRAME_SIZE_MAX;
1778 #if (PAGE_SIZE < 8192)
1779 		vsi->rx_buf_len = ICE_RXBUF_3072;
1780 #else
1781 		vsi->rx_buf_len = ICE_RXBUF_2048;
1782 #endif
1783 	}
1784 }
1785 
1786 /**
1787  * ice_write_qrxflxp_cntxt - write/configure QRXFLXP_CNTXT register
1788  * @hw: HW pointer
1789  * @pf_q: index of the Rx queue in the PF's queue space
1790  * @rxdid: flexible descriptor RXDID
1791  * @prio: priority for the RXDID for this queue
1792  * @ena_ts: true to enable timestamp and false to disable timestamp
1793  */
1794 void
1795 ice_write_qrxflxp_cntxt(struct ice_hw *hw, u16 pf_q, u32 rxdid, u32 prio,
1796 			bool ena_ts)
1797 {
1798 	int regval = rd32(hw, QRXFLXP_CNTXT(pf_q));
1799 
1800 	/* clear any previous values */
1801 	regval &= ~(QRXFLXP_CNTXT_RXDID_IDX_M |
1802 		    QRXFLXP_CNTXT_RXDID_PRIO_M |
1803 		    QRXFLXP_CNTXT_TS_M);
1804 
1805 	regval |= (rxdid << QRXFLXP_CNTXT_RXDID_IDX_S) &
1806 		QRXFLXP_CNTXT_RXDID_IDX_M;
1807 
1808 	regval |= (prio << QRXFLXP_CNTXT_RXDID_PRIO_S) &
1809 		QRXFLXP_CNTXT_RXDID_PRIO_M;
1810 
1811 	if (ena_ts)
1812 		/* Enable TimeSync on this queue */
1813 		regval |= QRXFLXP_CNTXT_TS_M;
1814 
1815 	wr32(hw, QRXFLXP_CNTXT(pf_q), regval);
1816 }
1817 
1818 int ice_vsi_cfg_single_rxq(struct ice_vsi *vsi, u16 q_idx)
1819 {
1820 	if (q_idx >= vsi->num_rxq)
1821 		return -EINVAL;
1822 
1823 	return ice_vsi_cfg_rxq(vsi->rx_rings[q_idx]);
1824 }
1825 
1826 int ice_vsi_cfg_single_txq(struct ice_vsi *vsi, struct ice_tx_ring **tx_rings, u16 q_idx)
1827 {
1828 	struct ice_aqc_add_tx_qgrp *qg_buf;
1829 	int err;
1830 
1831 	if (q_idx >= vsi->alloc_txq || !tx_rings || !tx_rings[q_idx])
1832 		return -EINVAL;
1833 
1834 	qg_buf = kzalloc(struct_size(qg_buf, txqs, 1), GFP_KERNEL);
1835 	if (!qg_buf)
1836 		return -ENOMEM;
1837 
1838 	qg_buf->num_txqs = 1;
1839 
1840 	err = ice_vsi_cfg_txq(vsi, tx_rings[q_idx], qg_buf);
1841 	kfree(qg_buf);
1842 	return err;
1843 }
1844 
1845 /**
1846  * ice_vsi_cfg_rxqs - Configure the VSI for Rx
1847  * @vsi: the VSI being configured
1848  *
1849  * Return 0 on success and a negative value on error
1850  * Configure the Rx VSI for operation.
1851  */
1852 int ice_vsi_cfg_rxqs(struct ice_vsi *vsi)
1853 {
1854 	u16 i;
1855 
1856 	if (vsi->type == ICE_VSI_VF)
1857 		goto setup_rings;
1858 
1859 	ice_vsi_cfg_frame_size(vsi);
1860 setup_rings:
1861 	/* set up individual rings */
1862 	ice_for_each_rxq(vsi, i) {
1863 		int err = ice_vsi_cfg_rxq(vsi->rx_rings[i]);
1864 
1865 		if (err)
1866 			return err;
1867 	}
1868 
1869 	return 0;
1870 }
1871 
1872 /**
1873  * ice_vsi_cfg_txqs - Configure the VSI for Tx
1874  * @vsi: the VSI being configured
1875  * @rings: Tx ring array to be configured
1876  * @count: number of Tx ring array elements
1877  *
1878  * Return 0 on success and a negative value on error
1879  * Configure the Tx VSI for operation.
1880  */
1881 static int
1882 ice_vsi_cfg_txqs(struct ice_vsi *vsi, struct ice_tx_ring **rings, u16 count)
1883 {
1884 	struct ice_aqc_add_tx_qgrp *qg_buf;
1885 	u16 q_idx = 0;
1886 	int err = 0;
1887 
1888 	qg_buf = kzalloc(struct_size(qg_buf, txqs, 1), GFP_KERNEL);
1889 	if (!qg_buf)
1890 		return -ENOMEM;
1891 
1892 	qg_buf->num_txqs = 1;
1893 
1894 	for (q_idx = 0; q_idx < count; q_idx++) {
1895 		err = ice_vsi_cfg_txq(vsi, rings[q_idx], qg_buf);
1896 		if (err)
1897 			goto err_cfg_txqs;
1898 	}
1899 
1900 err_cfg_txqs:
1901 	kfree(qg_buf);
1902 	return err;
1903 }
1904 
1905 /**
1906  * ice_vsi_cfg_lan_txqs - Configure the VSI for Tx
1907  * @vsi: the VSI being configured
1908  *
1909  * Return 0 on success and a negative value on error
1910  * Configure the Tx VSI for operation.
1911  */
1912 int ice_vsi_cfg_lan_txqs(struct ice_vsi *vsi)
1913 {
1914 	return ice_vsi_cfg_txqs(vsi, vsi->tx_rings, vsi->num_txq);
1915 }
1916 
1917 /**
1918  * ice_vsi_cfg_xdp_txqs - Configure Tx queues dedicated for XDP in given VSI
1919  * @vsi: the VSI being configured
1920  *
1921  * Return 0 on success and a negative value on error
1922  * Configure the Tx queues dedicated for XDP in given VSI for operation.
1923  */
1924 int ice_vsi_cfg_xdp_txqs(struct ice_vsi *vsi)
1925 {
1926 	int ret;
1927 	int i;
1928 
1929 	ret = ice_vsi_cfg_txqs(vsi, vsi->xdp_rings, vsi->num_xdp_txq);
1930 	if (ret)
1931 		return ret;
1932 
1933 	ice_for_each_xdp_txq(vsi, i)
1934 		vsi->xdp_rings[i]->xsk_pool = ice_tx_xsk_pool(vsi->xdp_rings[i]);
1935 
1936 	return ret;
1937 }
1938 
1939 /**
1940  * ice_intrl_usec_to_reg - convert interrupt rate limit to register value
1941  * @intrl: interrupt rate limit in usecs
1942  * @gran: interrupt rate limit granularity in usecs
1943  *
1944  * This function converts a decimal interrupt rate limit in usecs to the format
1945  * expected by firmware.
1946  */
1947 static u32 ice_intrl_usec_to_reg(u8 intrl, u8 gran)
1948 {
1949 	u32 val = intrl / gran;
1950 
1951 	if (val)
1952 		return val | GLINT_RATE_INTRL_ENA_M;
1953 	return 0;
1954 }
1955 
1956 /**
1957  * ice_write_intrl - write throttle rate limit to interrupt specific register
1958  * @q_vector: pointer to interrupt specific structure
1959  * @intrl: throttle rate limit in microseconds to write
1960  */
1961 void ice_write_intrl(struct ice_q_vector *q_vector, u8 intrl)
1962 {
1963 	struct ice_hw *hw = &q_vector->vsi->back->hw;
1964 
1965 	wr32(hw, GLINT_RATE(q_vector->reg_idx),
1966 	     ice_intrl_usec_to_reg(intrl, ICE_INTRL_GRAN_ABOVE_25));
1967 }
1968 
1969 static struct ice_q_vector *ice_pull_qvec_from_rc(struct ice_ring_container *rc)
1970 {
1971 	switch (rc->type) {
1972 	case ICE_RX_CONTAINER:
1973 		if (rc->rx_ring)
1974 			return rc->rx_ring->q_vector;
1975 		break;
1976 	case ICE_TX_CONTAINER:
1977 		if (rc->tx_ring)
1978 			return rc->tx_ring->q_vector;
1979 		break;
1980 	default:
1981 		break;
1982 	}
1983 
1984 	return NULL;
1985 }
1986 
1987 /**
1988  * __ice_write_itr - write throttle rate to register
1989  * @q_vector: pointer to interrupt data structure
1990  * @rc: pointer to ring container
1991  * @itr: throttle rate in microseconds to write
1992  */
1993 static void __ice_write_itr(struct ice_q_vector *q_vector,
1994 			    struct ice_ring_container *rc, u16 itr)
1995 {
1996 	struct ice_hw *hw = &q_vector->vsi->back->hw;
1997 
1998 	wr32(hw, GLINT_ITR(rc->itr_idx, q_vector->reg_idx),
1999 	     ITR_REG_ALIGN(itr) >> ICE_ITR_GRAN_S);
2000 }
2001 
2002 /**
2003  * ice_write_itr - write throttle rate to queue specific register
2004  * @rc: pointer to ring container
2005  * @itr: throttle rate in microseconds to write
2006  */
2007 void ice_write_itr(struct ice_ring_container *rc, u16 itr)
2008 {
2009 	struct ice_q_vector *q_vector;
2010 
2011 	q_vector = ice_pull_qvec_from_rc(rc);
2012 	if (!q_vector)
2013 		return;
2014 
2015 	__ice_write_itr(q_vector, rc, itr);
2016 }
2017 
2018 /**
2019  * ice_set_q_vector_intrl - set up interrupt rate limiting
2020  * @q_vector: the vector to be configured
2021  *
2022  * Interrupt rate limiting is local to the vector, not per-queue so we must
2023  * detect if either ring container has dynamic moderation enabled to decide
2024  * what to set the interrupt rate limit to via INTRL settings. In the case that
2025  * dynamic moderation is disabled on both, write the value with the cached
2026  * setting to make sure INTRL register matches the user visible value.
2027  */
2028 void ice_set_q_vector_intrl(struct ice_q_vector *q_vector)
2029 {
2030 	if (ITR_IS_DYNAMIC(&q_vector->tx) || ITR_IS_DYNAMIC(&q_vector->rx)) {
2031 		/* in the case of dynamic enabled, cap each vector to no more
2032 		 * than (4 us) 250,000 ints/sec, which allows low latency
2033 		 * but still less than 500,000 interrupts per second, which
2034 		 * reduces CPU a bit in the case of the lowest latency
2035 		 * setting. The 4 here is a value in microseconds.
2036 		 */
2037 		ice_write_intrl(q_vector, 4);
2038 	} else {
2039 		ice_write_intrl(q_vector, q_vector->intrl);
2040 	}
2041 }
2042 
2043 /**
2044  * ice_vsi_cfg_msix - MSIX mode Interrupt Config in the HW
2045  * @vsi: the VSI being configured
2046  *
2047  * This configures MSIX mode interrupts for the PF VSI, and should not be used
2048  * for the VF VSI.
2049  */
2050 void ice_vsi_cfg_msix(struct ice_vsi *vsi)
2051 {
2052 	struct ice_pf *pf = vsi->back;
2053 	struct ice_hw *hw = &pf->hw;
2054 	u16 txq = 0, rxq = 0;
2055 	int i, q;
2056 
2057 	ice_for_each_q_vector(vsi, i) {
2058 		struct ice_q_vector *q_vector = vsi->q_vectors[i];
2059 		u16 reg_idx = q_vector->reg_idx;
2060 
2061 		ice_cfg_itr(hw, q_vector);
2062 
2063 		/* Both Transmit Queue Interrupt Cause Control register
2064 		 * and Receive Queue Interrupt Cause control register
2065 		 * expects MSIX_INDX field to be the vector index
2066 		 * within the function space and not the absolute
2067 		 * vector index across PF or across device.
2068 		 * For SR-IOV VF VSIs queue vector index always starts
2069 		 * with 1 since first vector index(0) is used for OICR
2070 		 * in VF space. Since VMDq and other PF VSIs are within
2071 		 * the PF function space, use the vector index that is
2072 		 * tracked for this PF.
2073 		 */
2074 		for (q = 0; q < q_vector->num_ring_tx; q++) {
2075 			ice_cfg_txq_interrupt(vsi, txq, reg_idx,
2076 					      q_vector->tx.itr_idx);
2077 			txq++;
2078 		}
2079 
2080 		for (q = 0; q < q_vector->num_ring_rx; q++) {
2081 			ice_cfg_rxq_interrupt(vsi, rxq, reg_idx,
2082 					      q_vector->rx.itr_idx);
2083 			rxq++;
2084 		}
2085 	}
2086 }
2087 
2088 /**
2089  * ice_vsi_start_all_rx_rings - start/enable all of a VSI's Rx rings
2090  * @vsi: the VSI whose rings are to be enabled
2091  *
2092  * Returns 0 on success and a negative value on error
2093  */
2094 int ice_vsi_start_all_rx_rings(struct ice_vsi *vsi)
2095 {
2096 	return ice_vsi_ctrl_all_rx_rings(vsi, true);
2097 }
2098 
2099 /**
2100  * ice_vsi_stop_all_rx_rings - stop/disable all of a VSI's Rx rings
2101  * @vsi: the VSI whose rings are to be disabled
2102  *
2103  * Returns 0 on success and a negative value on error
2104  */
2105 int ice_vsi_stop_all_rx_rings(struct ice_vsi *vsi)
2106 {
2107 	return ice_vsi_ctrl_all_rx_rings(vsi, false);
2108 }
2109 
2110 /**
2111  * ice_vsi_stop_tx_rings - Disable Tx rings
2112  * @vsi: the VSI being configured
2113  * @rst_src: reset source
2114  * @rel_vmvf_num: Relative ID of VF/VM
2115  * @rings: Tx ring array to be stopped
2116  * @count: number of Tx ring array elements
2117  */
2118 static int
2119 ice_vsi_stop_tx_rings(struct ice_vsi *vsi, enum ice_disq_rst_src rst_src,
2120 		      u16 rel_vmvf_num, struct ice_tx_ring **rings, u16 count)
2121 {
2122 	u16 q_idx;
2123 
2124 	if (vsi->num_txq > ICE_LAN_TXQ_MAX_QDIS)
2125 		return -EINVAL;
2126 
2127 	for (q_idx = 0; q_idx < count; q_idx++) {
2128 		struct ice_txq_meta txq_meta = { };
2129 		int status;
2130 
2131 		if (!rings || !rings[q_idx])
2132 			return -EINVAL;
2133 
2134 		ice_fill_txq_meta(vsi, rings[q_idx], &txq_meta);
2135 		status = ice_vsi_stop_tx_ring(vsi, rst_src, rel_vmvf_num,
2136 					      rings[q_idx], &txq_meta);
2137 
2138 		if (status)
2139 			return status;
2140 	}
2141 
2142 	return 0;
2143 }
2144 
2145 /**
2146  * ice_vsi_stop_lan_tx_rings - Disable LAN Tx rings
2147  * @vsi: the VSI being configured
2148  * @rst_src: reset source
2149  * @rel_vmvf_num: Relative ID of VF/VM
2150  */
2151 int
2152 ice_vsi_stop_lan_tx_rings(struct ice_vsi *vsi, enum ice_disq_rst_src rst_src,
2153 			  u16 rel_vmvf_num)
2154 {
2155 	return ice_vsi_stop_tx_rings(vsi, rst_src, rel_vmvf_num, vsi->tx_rings, vsi->num_txq);
2156 }
2157 
2158 /**
2159  * ice_vsi_stop_xdp_tx_rings - Disable XDP Tx rings
2160  * @vsi: the VSI being configured
2161  */
2162 int ice_vsi_stop_xdp_tx_rings(struct ice_vsi *vsi)
2163 {
2164 	return ice_vsi_stop_tx_rings(vsi, ICE_NO_RESET, 0, vsi->xdp_rings, vsi->num_xdp_txq);
2165 }
2166 
2167 /**
2168  * ice_vsi_is_vlan_pruning_ena - check if VLAN pruning is enabled or not
2169  * @vsi: VSI to check whether or not VLAN pruning is enabled.
2170  *
2171  * returns true if Rx VLAN pruning is enabled and false otherwise.
2172  */
2173 bool ice_vsi_is_vlan_pruning_ena(struct ice_vsi *vsi)
2174 {
2175 	if (!vsi)
2176 		return false;
2177 
2178 	return (vsi->info.sw_flags2 & ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA);
2179 }
2180 
2181 static void ice_vsi_set_tc_cfg(struct ice_vsi *vsi)
2182 {
2183 	if (!test_bit(ICE_FLAG_DCB_ENA, vsi->back->flags)) {
2184 		vsi->tc_cfg.ena_tc = ICE_DFLT_TRAFFIC_CLASS;
2185 		vsi->tc_cfg.numtc = 1;
2186 		return;
2187 	}
2188 
2189 	/* set VSI TC information based on DCB config */
2190 	ice_vsi_set_dcb_tc_cfg(vsi);
2191 }
2192 
2193 /**
2194  * ice_vsi_set_q_vectors_reg_idx - set the HW register index for all q_vectors
2195  * @vsi: VSI to set the q_vectors register index on
2196  */
2197 static int
2198 ice_vsi_set_q_vectors_reg_idx(struct ice_vsi *vsi)
2199 {
2200 	u16 i;
2201 
2202 	if (!vsi || !vsi->q_vectors)
2203 		return -EINVAL;
2204 
2205 	ice_for_each_q_vector(vsi, i) {
2206 		struct ice_q_vector *q_vector = vsi->q_vectors[i];
2207 
2208 		if (!q_vector) {
2209 			dev_err(ice_pf_to_dev(vsi->back), "Failed to set reg_idx on q_vector %d VSI %d\n",
2210 				i, vsi->vsi_num);
2211 			goto clear_reg_idx;
2212 		}
2213 
2214 		if (vsi->type == ICE_VSI_VF) {
2215 			struct ice_vf *vf = &vsi->back->vf[vsi->vf_id];
2216 
2217 			q_vector->reg_idx = ice_calc_vf_reg_idx(vf, q_vector);
2218 		} else {
2219 			q_vector->reg_idx =
2220 				q_vector->v_idx + vsi->base_vector;
2221 		}
2222 	}
2223 
2224 	return 0;
2225 
2226 clear_reg_idx:
2227 	ice_for_each_q_vector(vsi, i) {
2228 		struct ice_q_vector *q_vector = vsi->q_vectors[i];
2229 
2230 		if (q_vector)
2231 			q_vector->reg_idx = 0;
2232 	}
2233 
2234 	return -EINVAL;
2235 }
2236 
2237 /**
2238  * ice_cfg_sw_lldp - Config switch rules for LLDP packet handling
2239  * @vsi: the VSI being configured
2240  * @tx: bool to determine Tx or Rx rule
2241  * @create: bool to determine create or remove Rule
2242  */
2243 void ice_cfg_sw_lldp(struct ice_vsi *vsi, bool tx, bool create)
2244 {
2245 	int (*eth_fltr)(struct ice_vsi *v, u16 type, u16 flag,
2246 			enum ice_sw_fwd_act_type act);
2247 	struct ice_pf *pf = vsi->back;
2248 	struct device *dev;
2249 	int status;
2250 
2251 	dev = ice_pf_to_dev(pf);
2252 	eth_fltr = create ? ice_fltr_add_eth : ice_fltr_remove_eth;
2253 
2254 	if (tx) {
2255 		status = eth_fltr(vsi, ETH_P_LLDP, ICE_FLTR_TX,
2256 				  ICE_DROP_PACKET);
2257 	} else {
2258 		if (ice_fw_supports_lldp_fltr_ctrl(&pf->hw)) {
2259 			status = ice_lldp_fltr_add_remove(&pf->hw, vsi->vsi_num,
2260 							  create);
2261 		} else {
2262 			status = eth_fltr(vsi, ETH_P_LLDP, ICE_FLTR_RX,
2263 					  ICE_FWD_TO_VSI);
2264 		}
2265 	}
2266 
2267 	if (status)
2268 		dev_dbg(dev, "Fail %s %s LLDP rule on VSI %i error: %d\n",
2269 			create ? "adding" : "removing", tx ? "TX" : "RX",
2270 			vsi->vsi_num, status);
2271 }
2272 
2273 /**
2274  * ice_set_agg_vsi - sets up scheduler aggregator node and move VSI into it
2275  * @vsi: pointer to the VSI
2276  *
2277  * This function will allocate new scheduler aggregator now if needed and will
2278  * move specified VSI into it.
2279  */
2280 static void ice_set_agg_vsi(struct ice_vsi *vsi)
2281 {
2282 	struct device *dev = ice_pf_to_dev(vsi->back);
2283 	struct ice_agg_node *agg_node_iter = NULL;
2284 	u32 agg_id = ICE_INVALID_AGG_NODE_ID;
2285 	struct ice_agg_node *agg_node = NULL;
2286 	int node_offset, max_agg_nodes = 0;
2287 	struct ice_port_info *port_info;
2288 	struct ice_pf *pf = vsi->back;
2289 	u32 agg_node_id_start = 0;
2290 	int status;
2291 
2292 	/* create (as needed) scheduler aggregator node and move VSI into
2293 	 * corresponding aggregator node
2294 	 * - PF aggregator node to contains VSIs of type _PF and _CTRL
2295 	 * - VF aggregator nodes will contain VF VSI
2296 	 */
2297 	port_info = pf->hw.port_info;
2298 	if (!port_info)
2299 		return;
2300 
2301 	switch (vsi->type) {
2302 	case ICE_VSI_CTRL:
2303 	case ICE_VSI_CHNL:
2304 	case ICE_VSI_LB:
2305 	case ICE_VSI_PF:
2306 	case ICE_VSI_SWITCHDEV_CTRL:
2307 		max_agg_nodes = ICE_MAX_PF_AGG_NODES;
2308 		agg_node_id_start = ICE_PF_AGG_NODE_ID_START;
2309 		agg_node_iter = &pf->pf_agg_node[0];
2310 		break;
2311 	case ICE_VSI_VF:
2312 		/* user can create 'n' VFs on a given PF, but since max children
2313 		 * per aggregator node can be only 64. Following code handles
2314 		 * aggregator(s) for VF VSIs, either selects a agg_node which
2315 		 * was already created provided num_vsis < 64, otherwise
2316 		 * select next available node, which will be created
2317 		 */
2318 		max_agg_nodes = ICE_MAX_VF_AGG_NODES;
2319 		agg_node_id_start = ICE_VF_AGG_NODE_ID_START;
2320 		agg_node_iter = &pf->vf_agg_node[0];
2321 		break;
2322 	default:
2323 		/* other VSI type, handle later if needed */
2324 		dev_dbg(dev, "unexpected VSI type %s\n",
2325 			ice_vsi_type_str(vsi->type));
2326 		return;
2327 	}
2328 
2329 	/* find the appropriate aggregator node */
2330 	for (node_offset = 0; node_offset < max_agg_nodes; node_offset++) {
2331 		/* see if we can find space in previously created
2332 		 * node if num_vsis < 64, otherwise skip
2333 		 */
2334 		if (agg_node_iter->num_vsis &&
2335 		    agg_node_iter->num_vsis == ICE_MAX_VSIS_IN_AGG_NODE) {
2336 			agg_node_iter++;
2337 			continue;
2338 		}
2339 
2340 		if (agg_node_iter->valid &&
2341 		    agg_node_iter->agg_id != ICE_INVALID_AGG_NODE_ID) {
2342 			agg_id = agg_node_iter->agg_id;
2343 			agg_node = agg_node_iter;
2344 			break;
2345 		}
2346 
2347 		/* find unclaimed agg_id */
2348 		if (agg_node_iter->agg_id == ICE_INVALID_AGG_NODE_ID) {
2349 			agg_id = node_offset + agg_node_id_start;
2350 			agg_node = agg_node_iter;
2351 			break;
2352 		}
2353 		/* move to next agg_node */
2354 		agg_node_iter++;
2355 	}
2356 
2357 	if (!agg_node)
2358 		return;
2359 
2360 	/* if selected aggregator node was not created, create it */
2361 	if (!agg_node->valid) {
2362 		status = ice_cfg_agg(port_info, agg_id, ICE_AGG_TYPE_AGG,
2363 				     (u8)vsi->tc_cfg.ena_tc);
2364 		if (status) {
2365 			dev_err(dev, "unable to create aggregator node with agg_id %u\n",
2366 				agg_id);
2367 			return;
2368 		}
2369 		/* aggregator node is created, store the neeeded info */
2370 		agg_node->valid = true;
2371 		agg_node->agg_id = agg_id;
2372 	}
2373 
2374 	/* move VSI to corresponding aggregator node */
2375 	status = ice_move_vsi_to_agg(port_info, agg_id, vsi->idx,
2376 				     (u8)vsi->tc_cfg.ena_tc);
2377 	if (status) {
2378 		dev_err(dev, "unable to move VSI idx %u into aggregator %u node",
2379 			vsi->idx, agg_id);
2380 		return;
2381 	}
2382 
2383 	/* keep active children count for aggregator node */
2384 	agg_node->num_vsis++;
2385 
2386 	/* cache the 'agg_id' in VSI, so that after reset - VSI will be moved
2387 	 * to aggregator node
2388 	 */
2389 	vsi->agg_node = agg_node;
2390 	dev_dbg(dev, "successfully moved VSI idx %u tc_bitmap 0x%x) into aggregator node %d which has num_vsis %u\n",
2391 		vsi->idx, vsi->tc_cfg.ena_tc, vsi->agg_node->agg_id,
2392 		vsi->agg_node->num_vsis);
2393 }
2394 
2395 /**
2396  * ice_vsi_setup - Set up a VSI by a given type
2397  * @pf: board private structure
2398  * @pi: pointer to the port_info instance
2399  * @vsi_type: VSI type
2400  * @vf_id: defines VF ID to which this VSI connects. This field is meant to be
2401  *         used only for ICE_VSI_VF VSI type. For other VSI types, should
2402  *         fill-in ICE_INVAL_VFID as input.
2403  * @ch: ptr to channel
2404  *
2405  * This allocates the sw VSI structure and its queue resources.
2406  *
2407  * Returns pointer to the successfully allocated and configured VSI sw struct on
2408  * success, NULL on failure.
2409  */
2410 struct ice_vsi *
2411 ice_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi,
2412 	      enum ice_vsi_type vsi_type, u16 vf_id, struct ice_channel *ch)
2413 {
2414 	u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };
2415 	struct device *dev = ice_pf_to_dev(pf);
2416 	struct ice_vsi *vsi;
2417 	int ret, i;
2418 
2419 	if (vsi_type == ICE_VSI_CHNL)
2420 		vsi = ice_vsi_alloc(pf, vsi_type, ch, ICE_INVAL_VFID);
2421 	else if (vsi_type == ICE_VSI_VF || vsi_type == ICE_VSI_CTRL)
2422 		vsi = ice_vsi_alloc(pf, vsi_type, NULL, vf_id);
2423 	else
2424 		vsi = ice_vsi_alloc(pf, vsi_type, NULL, ICE_INVAL_VFID);
2425 
2426 	if (!vsi) {
2427 		dev_err(dev, "could not allocate VSI\n");
2428 		return NULL;
2429 	}
2430 
2431 	vsi->port_info = pi;
2432 	vsi->vsw = pf->first_sw;
2433 	if (vsi->type == ICE_VSI_PF)
2434 		vsi->ethtype = ETH_P_PAUSE;
2435 
2436 	if (vsi->type == ICE_VSI_VF || vsi->type == ICE_VSI_CTRL)
2437 		vsi->vf_id = vf_id;
2438 
2439 	ice_alloc_fd_res(vsi);
2440 
2441 	if (vsi_type != ICE_VSI_CHNL) {
2442 		if (ice_vsi_get_qs(vsi)) {
2443 			dev_err(dev, "Failed to allocate queues. vsi->idx = %d\n",
2444 				vsi->idx);
2445 			goto unroll_vsi_alloc;
2446 		}
2447 	}
2448 
2449 	/* set RSS capabilities */
2450 	ice_vsi_set_rss_params(vsi);
2451 
2452 	/* set TC configuration */
2453 	ice_vsi_set_tc_cfg(vsi);
2454 
2455 	/* create the VSI */
2456 	ret = ice_vsi_init(vsi, true);
2457 	if (ret)
2458 		goto unroll_get_qs;
2459 
2460 	ice_vsi_init_vlan_ops(vsi);
2461 
2462 	switch (vsi->type) {
2463 	case ICE_VSI_CTRL:
2464 	case ICE_VSI_SWITCHDEV_CTRL:
2465 	case ICE_VSI_PF:
2466 		ret = ice_vsi_alloc_q_vectors(vsi);
2467 		if (ret)
2468 			goto unroll_vsi_init;
2469 
2470 		ret = ice_vsi_setup_vector_base(vsi);
2471 		if (ret)
2472 			goto unroll_alloc_q_vector;
2473 
2474 		ret = ice_vsi_set_q_vectors_reg_idx(vsi);
2475 		if (ret)
2476 			goto unroll_vector_base;
2477 
2478 		ret = ice_vsi_alloc_rings(vsi);
2479 		if (ret)
2480 			goto unroll_vector_base;
2481 
2482 		ice_vsi_map_rings_to_vectors(vsi);
2483 
2484 		/* ICE_VSI_CTRL does not need RSS so skip RSS processing */
2485 		if (vsi->type != ICE_VSI_CTRL)
2486 			/* Do not exit if configuring RSS had an issue, at
2487 			 * least receive traffic on first queue. Hence no
2488 			 * need to capture return value
2489 			 */
2490 			if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
2491 				ice_vsi_cfg_rss_lut_key(vsi);
2492 				ice_vsi_set_rss_flow_fld(vsi);
2493 			}
2494 		ice_init_arfs(vsi);
2495 		break;
2496 	case ICE_VSI_CHNL:
2497 		if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
2498 			ice_vsi_cfg_rss_lut_key(vsi);
2499 			ice_vsi_set_rss_flow_fld(vsi);
2500 		}
2501 		break;
2502 	case ICE_VSI_VF:
2503 		/* VF driver will take care of creating netdev for this type and
2504 		 * map queues to vectors through Virtchnl, PF driver only
2505 		 * creates a VSI and corresponding structures for bookkeeping
2506 		 * purpose
2507 		 */
2508 		ret = ice_vsi_alloc_q_vectors(vsi);
2509 		if (ret)
2510 			goto unroll_vsi_init;
2511 
2512 		ret = ice_vsi_alloc_rings(vsi);
2513 		if (ret)
2514 			goto unroll_alloc_q_vector;
2515 
2516 		ret = ice_vsi_set_q_vectors_reg_idx(vsi);
2517 		if (ret)
2518 			goto unroll_vector_base;
2519 
2520 		/* Do not exit if configuring RSS had an issue, at least
2521 		 * receive traffic on first queue. Hence no need to capture
2522 		 * return value
2523 		 */
2524 		if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
2525 			ice_vsi_cfg_rss_lut_key(vsi);
2526 			ice_vsi_set_vf_rss_flow_fld(vsi);
2527 		}
2528 		break;
2529 	case ICE_VSI_LB:
2530 		ret = ice_vsi_alloc_rings(vsi);
2531 		if (ret)
2532 			goto unroll_vsi_init;
2533 		break;
2534 	default:
2535 		/* clean up the resources and exit */
2536 		goto unroll_vsi_init;
2537 	}
2538 
2539 	/* configure VSI nodes based on number of queues and TC's */
2540 	ice_for_each_traffic_class(i) {
2541 		if (!(vsi->tc_cfg.ena_tc & BIT(i)))
2542 			continue;
2543 
2544 		if (vsi->type == ICE_VSI_CHNL) {
2545 			if (!vsi->alloc_txq && vsi->num_txq)
2546 				max_txqs[i] = vsi->num_txq;
2547 			else
2548 				max_txqs[i] = pf->num_lan_tx;
2549 		} else {
2550 			max_txqs[i] = vsi->alloc_txq;
2551 		}
2552 	}
2553 
2554 	dev_dbg(dev, "vsi->tc_cfg.ena_tc = %d\n", vsi->tc_cfg.ena_tc);
2555 	ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, vsi->tc_cfg.ena_tc,
2556 			      max_txqs);
2557 	if (ret) {
2558 		dev_err(dev, "VSI %d failed lan queue config, error %d\n",
2559 			vsi->vsi_num, ret);
2560 		goto unroll_clear_rings;
2561 	}
2562 
2563 	/* Add switch rule to drop all Tx Flow Control Frames, of look up
2564 	 * type ETHERTYPE from VSIs, and restrict malicious VF from sending
2565 	 * out PAUSE or PFC frames. If enabled, FW can still send FC frames.
2566 	 * The rule is added once for PF VSI in order to create appropriate
2567 	 * recipe, since VSI/VSI list is ignored with drop action...
2568 	 * Also add rules to handle LLDP Tx packets.  Tx LLDP packets need to
2569 	 * be dropped so that VFs cannot send LLDP packets to reconfig DCB
2570 	 * settings in the HW.
2571 	 */
2572 	if (!ice_is_safe_mode(pf))
2573 		if (vsi->type == ICE_VSI_PF) {
2574 			ice_fltr_add_eth(vsi, ETH_P_PAUSE, ICE_FLTR_TX,
2575 					 ICE_DROP_PACKET);
2576 			ice_cfg_sw_lldp(vsi, true, true);
2577 		}
2578 
2579 	if (!vsi->agg_node)
2580 		ice_set_agg_vsi(vsi);
2581 	return vsi;
2582 
2583 unroll_clear_rings:
2584 	ice_vsi_clear_rings(vsi);
2585 unroll_vector_base:
2586 	/* reclaim SW interrupts back to the common pool */
2587 	ice_free_res(pf->irq_tracker, vsi->base_vector, vsi->idx);
2588 	pf->num_avail_sw_msix += vsi->num_q_vectors;
2589 unroll_alloc_q_vector:
2590 	ice_vsi_free_q_vectors(vsi);
2591 unroll_vsi_init:
2592 	ice_vsi_delete(vsi);
2593 unroll_get_qs:
2594 	ice_vsi_put_qs(vsi);
2595 unroll_vsi_alloc:
2596 	if (vsi_type == ICE_VSI_VF)
2597 		ice_enable_lag(pf->lag);
2598 	ice_vsi_clear(vsi);
2599 
2600 	return NULL;
2601 }
2602 
2603 /**
2604  * ice_vsi_release_msix - Clear the queue to Interrupt mapping in HW
2605  * @vsi: the VSI being cleaned up
2606  */
2607 static void ice_vsi_release_msix(struct ice_vsi *vsi)
2608 {
2609 	struct ice_pf *pf = vsi->back;
2610 	struct ice_hw *hw = &pf->hw;
2611 	u32 txq = 0;
2612 	u32 rxq = 0;
2613 	int i, q;
2614 
2615 	ice_for_each_q_vector(vsi, i) {
2616 		struct ice_q_vector *q_vector = vsi->q_vectors[i];
2617 
2618 		ice_write_intrl(q_vector, 0);
2619 		for (q = 0; q < q_vector->num_ring_tx; q++) {
2620 			ice_write_itr(&q_vector->tx, 0);
2621 			wr32(hw, QINT_TQCTL(vsi->txq_map[txq]), 0);
2622 			if (ice_is_xdp_ena_vsi(vsi)) {
2623 				u32 xdp_txq = txq + vsi->num_xdp_txq;
2624 
2625 				wr32(hw, QINT_TQCTL(vsi->txq_map[xdp_txq]), 0);
2626 			}
2627 			txq++;
2628 		}
2629 
2630 		for (q = 0; q < q_vector->num_ring_rx; q++) {
2631 			ice_write_itr(&q_vector->rx, 0);
2632 			wr32(hw, QINT_RQCTL(vsi->rxq_map[rxq]), 0);
2633 			rxq++;
2634 		}
2635 	}
2636 
2637 	ice_flush(hw);
2638 }
2639 
2640 /**
2641  * ice_vsi_free_irq - Free the IRQ association with the OS
2642  * @vsi: the VSI being configured
2643  */
2644 void ice_vsi_free_irq(struct ice_vsi *vsi)
2645 {
2646 	struct ice_pf *pf = vsi->back;
2647 	int base = vsi->base_vector;
2648 	int i;
2649 
2650 	if (!vsi->q_vectors || !vsi->irqs_ready)
2651 		return;
2652 
2653 	ice_vsi_release_msix(vsi);
2654 	if (vsi->type == ICE_VSI_VF)
2655 		return;
2656 
2657 	vsi->irqs_ready = false;
2658 	ice_for_each_q_vector(vsi, i) {
2659 		u16 vector = i + base;
2660 		int irq_num;
2661 
2662 		irq_num = pf->msix_entries[vector].vector;
2663 
2664 		/* free only the irqs that were actually requested */
2665 		if (!vsi->q_vectors[i] ||
2666 		    !(vsi->q_vectors[i]->num_ring_tx ||
2667 		      vsi->q_vectors[i]->num_ring_rx))
2668 			continue;
2669 
2670 		/* clear the affinity notifier in the IRQ descriptor */
2671 		irq_set_affinity_notifier(irq_num, NULL);
2672 
2673 		/* clear the affinity_mask in the IRQ descriptor */
2674 		irq_set_affinity_hint(irq_num, NULL);
2675 		synchronize_irq(irq_num);
2676 		devm_free_irq(ice_pf_to_dev(pf), irq_num, vsi->q_vectors[i]);
2677 	}
2678 }
2679 
2680 /**
2681  * ice_vsi_free_tx_rings - Free Tx resources for VSI queues
2682  * @vsi: the VSI having resources freed
2683  */
2684 void ice_vsi_free_tx_rings(struct ice_vsi *vsi)
2685 {
2686 	int i;
2687 
2688 	if (!vsi->tx_rings)
2689 		return;
2690 
2691 	ice_for_each_txq(vsi, i)
2692 		if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2693 			ice_free_tx_ring(vsi->tx_rings[i]);
2694 }
2695 
2696 /**
2697  * ice_vsi_free_rx_rings - Free Rx resources for VSI queues
2698  * @vsi: the VSI having resources freed
2699  */
2700 void ice_vsi_free_rx_rings(struct ice_vsi *vsi)
2701 {
2702 	int i;
2703 
2704 	if (!vsi->rx_rings)
2705 		return;
2706 
2707 	ice_for_each_rxq(vsi, i)
2708 		if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2709 			ice_free_rx_ring(vsi->rx_rings[i]);
2710 }
2711 
2712 /**
2713  * ice_vsi_close - Shut down a VSI
2714  * @vsi: the VSI being shut down
2715  */
2716 void ice_vsi_close(struct ice_vsi *vsi)
2717 {
2718 	if (!test_and_set_bit(ICE_VSI_DOWN, vsi->state))
2719 		ice_down(vsi);
2720 
2721 	ice_vsi_free_irq(vsi);
2722 	ice_vsi_free_tx_rings(vsi);
2723 	ice_vsi_free_rx_rings(vsi);
2724 }
2725 
2726 /**
2727  * ice_ena_vsi - resume a VSI
2728  * @vsi: the VSI being resume
2729  * @locked: is the rtnl_lock already held
2730  */
2731 int ice_ena_vsi(struct ice_vsi *vsi, bool locked)
2732 {
2733 	int err = 0;
2734 
2735 	if (!test_bit(ICE_VSI_NEEDS_RESTART, vsi->state))
2736 		return 0;
2737 
2738 	clear_bit(ICE_VSI_NEEDS_RESTART, vsi->state);
2739 
2740 	if (vsi->netdev && vsi->type == ICE_VSI_PF) {
2741 		if (netif_running(vsi->netdev)) {
2742 			if (!locked)
2743 				rtnl_lock();
2744 
2745 			err = ice_open_internal(vsi->netdev);
2746 
2747 			if (!locked)
2748 				rtnl_unlock();
2749 		}
2750 	} else if (vsi->type == ICE_VSI_CTRL) {
2751 		err = ice_vsi_open_ctrl(vsi);
2752 	}
2753 
2754 	return err;
2755 }
2756 
2757 /**
2758  * ice_dis_vsi - pause a VSI
2759  * @vsi: the VSI being paused
2760  * @locked: is the rtnl_lock already held
2761  */
2762 void ice_dis_vsi(struct ice_vsi *vsi, bool locked)
2763 {
2764 	if (test_bit(ICE_VSI_DOWN, vsi->state))
2765 		return;
2766 
2767 	set_bit(ICE_VSI_NEEDS_RESTART, vsi->state);
2768 
2769 	if (vsi->type == ICE_VSI_PF && vsi->netdev) {
2770 		if (netif_running(vsi->netdev)) {
2771 			if (!locked)
2772 				rtnl_lock();
2773 
2774 			ice_vsi_close(vsi);
2775 
2776 			if (!locked)
2777 				rtnl_unlock();
2778 		} else {
2779 			ice_vsi_close(vsi);
2780 		}
2781 	} else if (vsi->type == ICE_VSI_CTRL ||
2782 		   vsi->type == ICE_VSI_SWITCHDEV_CTRL) {
2783 		ice_vsi_close(vsi);
2784 	}
2785 }
2786 
2787 /**
2788  * ice_vsi_dis_irq - Mask off queue interrupt generation on the VSI
2789  * @vsi: the VSI being un-configured
2790  */
2791 void ice_vsi_dis_irq(struct ice_vsi *vsi)
2792 {
2793 	int base = vsi->base_vector;
2794 	struct ice_pf *pf = vsi->back;
2795 	struct ice_hw *hw = &pf->hw;
2796 	u32 val;
2797 	int i;
2798 
2799 	/* disable interrupt causation from each queue */
2800 	if (vsi->tx_rings) {
2801 		ice_for_each_txq(vsi, i) {
2802 			if (vsi->tx_rings[i]) {
2803 				u16 reg;
2804 
2805 				reg = vsi->tx_rings[i]->reg_idx;
2806 				val = rd32(hw, QINT_TQCTL(reg));
2807 				val &= ~QINT_TQCTL_CAUSE_ENA_M;
2808 				wr32(hw, QINT_TQCTL(reg), val);
2809 			}
2810 		}
2811 	}
2812 
2813 	if (vsi->rx_rings) {
2814 		ice_for_each_rxq(vsi, i) {
2815 			if (vsi->rx_rings[i]) {
2816 				u16 reg;
2817 
2818 				reg = vsi->rx_rings[i]->reg_idx;
2819 				val = rd32(hw, QINT_RQCTL(reg));
2820 				val &= ~QINT_RQCTL_CAUSE_ENA_M;
2821 				wr32(hw, QINT_RQCTL(reg), val);
2822 			}
2823 		}
2824 	}
2825 
2826 	/* disable each interrupt */
2827 	ice_for_each_q_vector(vsi, i) {
2828 		if (!vsi->q_vectors[i])
2829 			continue;
2830 		wr32(hw, GLINT_DYN_CTL(vsi->q_vectors[i]->reg_idx), 0);
2831 	}
2832 
2833 	ice_flush(hw);
2834 
2835 	/* don't call synchronize_irq() for VF's from the host */
2836 	if (vsi->type == ICE_VSI_VF)
2837 		return;
2838 
2839 	ice_for_each_q_vector(vsi, i)
2840 		synchronize_irq(pf->msix_entries[i + base].vector);
2841 }
2842 
2843 /**
2844  * ice_napi_del - Remove NAPI handler for the VSI
2845  * @vsi: VSI for which NAPI handler is to be removed
2846  */
2847 void ice_napi_del(struct ice_vsi *vsi)
2848 {
2849 	int v_idx;
2850 
2851 	if (!vsi->netdev)
2852 		return;
2853 
2854 	ice_for_each_q_vector(vsi, v_idx)
2855 		netif_napi_del(&vsi->q_vectors[v_idx]->napi);
2856 }
2857 
2858 /**
2859  * ice_vsi_release - Delete a VSI and free its resources
2860  * @vsi: the VSI being removed
2861  *
2862  * Returns 0 on success or < 0 on error
2863  */
2864 int ice_vsi_release(struct ice_vsi *vsi)
2865 {
2866 	struct ice_pf *pf;
2867 	int err;
2868 
2869 	if (!vsi->back)
2870 		return -ENODEV;
2871 	pf = vsi->back;
2872 
2873 	/* do not unregister while driver is in the reset recovery pending
2874 	 * state. Since reset/rebuild happens through PF service task workqueue,
2875 	 * it's not a good idea to unregister netdev that is associated to the
2876 	 * PF that is running the work queue items currently. This is done to
2877 	 * avoid check_flush_dependency() warning on this wq
2878 	 */
2879 	if (vsi->netdev && !ice_is_reset_in_progress(pf->state) &&
2880 	    (test_bit(ICE_VSI_NETDEV_REGISTERED, vsi->state))) {
2881 		unregister_netdev(vsi->netdev);
2882 		clear_bit(ICE_VSI_NETDEV_REGISTERED, vsi->state);
2883 	}
2884 
2885 	if (vsi->type == ICE_VSI_PF)
2886 		ice_devlink_destroy_pf_port(pf);
2887 
2888 	if (test_bit(ICE_FLAG_RSS_ENA, pf->flags))
2889 		ice_rss_clean(vsi);
2890 
2891 	/* Disable VSI and free resources */
2892 	if (vsi->type != ICE_VSI_LB)
2893 		ice_vsi_dis_irq(vsi);
2894 	ice_vsi_close(vsi);
2895 
2896 	/* SR-IOV determines needed MSIX resources all at once instead of per
2897 	 * VSI since when VFs are spawned we know how many VFs there are and how
2898 	 * many interrupts each VF needs. SR-IOV MSIX resources are also
2899 	 * cleared in the same manner.
2900 	 */
2901 	if (vsi->type == ICE_VSI_CTRL && vsi->vf_id != ICE_INVAL_VFID) {
2902 		int i;
2903 
2904 		ice_for_each_vf(pf, i) {
2905 			struct ice_vf *vf = &pf->vf[i];
2906 
2907 			if (i != vsi->vf_id && vf->ctrl_vsi_idx != ICE_NO_VSI)
2908 				break;
2909 		}
2910 		if (i == pf->num_alloc_vfs) {
2911 			/* No other VFs left that have control VSI, reclaim SW
2912 			 * interrupts back to the common pool
2913 			 */
2914 			ice_free_res(pf->irq_tracker, vsi->base_vector,
2915 				     ICE_RES_VF_CTRL_VEC_ID);
2916 			pf->num_avail_sw_msix += vsi->num_q_vectors;
2917 		}
2918 	} else if (vsi->type != ICE_VSI_VF) {
2919 		/* reclaim SW interrupts back to the common pool */
2920 		ice_free_res(pf->irq_tracker, vsi->base_vector, vsi->idx);
2921 		pf->num_avail_sw_msix += vsi->num_q_vectors;
2922 	}
2923 
2924 	if (!ice_is_safe_mode(pf)) {
2925 		if (vsi->type == ICE_VSI_PF) {
2926 			ice_fltr_remove_eth(vsi, ETH_P_PAUSE, ICE_FLTR_TX,
2927 					    ICE_DROP_PACKET);
2928 			ice_cfg_sw_lldp(vsi, true, false);
2929 			/* The Rx rule will only exist to remove if the LLDP FW
2930 			 * engine is currently stopped
2931 			 */
2932 			if (!test_bit(ICE_FLAG_FW_LLDP_AGENT, pf->flags))
2933 				ice_cfg_sw_lldp(vsi, false, false);
2934 		}
2935 	}
2936 
2937 	ice_fltr_remove_all(vsi);
2938 	ice_rm_vsi_lan_cfg(vsi->port_info, vsi->idx);
2939 	err = ice_rm_vsi_rdma_cfg(vsi->port_info, vsi->idx);
2940 	if (err)
2941 		dev_err(ice_pf_to_dev(vsi->back), "Failed to remove RDMA scheduler config for VSI %u, err %d\n",
2942 			vsi->vsi_num, err);
2943 	ice_vsi_delete(vsi);
2944 	ice_vsi_free_q_vectors(vsi);
2945 
2946 	if (vsi->netdev) {
2947 		if (test_bit(ICE_VSI_NETDEV_REGISTERED, vsi->state)) {
2948 			unregister_netdev(vsi->netdev);
2949 			clear_bit(ICE_VSI_NETDEV_REGISTERED, vsi->state);
2950 		}
2951 		if (test_bit(ICE_VSI_NETDEV_ALLOCD, vsi->state)) {
2952 			free_netdev(vsi->netdev);
2953 			vsi->netdev = NULL;
2954 			clear_bit(ICE_VSI_NETDEV_ALLOCD, vsi->state);
2955 		}
2956 	}
2957 
2958 	if (vsi->type == ICE_VSI_VF &&
2959 	    vsi->agg_node && vsi->agg_node->valid)
2960 		vsi->agg_node->num_vsis--;
2961 	ice_vsi_clear_rings(vsi);
2962 
2963 	ice_vsi_put_qs(vsi);
2964 
2965 	/* retain SW VSI data structure since it is needed to unregister and
2966 	 * free VSI netdev when PF is not in reset recovery pending state,\
2967 	 * for ex: during rmmod.
2968 	 */
2969 	if (!ice_is_reset_in_progress(pf->state))
2970 		ice_vsi_clear(vsi);
2971 
2972 	return 0;
2973 }
2974 
2975 /**
2976  * ice_vsi_rebuild_get_coalesce - get coalesce from all q_vectors
2977  * @vsi: VSI connected with q_vectors
2978  * @coalesce: array of struct with stored coalesce
2979  *
2980  * Returns array size.
2981  */
2982 static int
2983 ice_vsi_rebuild_get_coalesce(struct ice_vsi *vsi,
2984 			     struct ice_coalesce_stored *coalesce)
2985 {
2986 	int i;
2987 
2988 	ice_for_each_q_vector(vsi, i) {
2989 		struct ice_q_vector *q_vector = vsi->q_vectors[i];
2990 
2991 		coalesce[i].itr_tx = q_vector->tx.itr_setting;
2992 		coalesce[i].itr_rx = q_vector->rx.itr_setting;
2993 		coalesce[i].intrl = q_vector->intrl;
2994 
2995 		if (i < vsi->num_txq)
2996 			coalesce[i].tx_valid = true;
2997 		if (i < vsi->num_rxq)
2998 			coalesce[i].rx_valid = true;
2999 	}
3000 
3001 	return vsi->num_q_vectors;
3002 }
3003 
3004 /**
3005  * ice_vsi_rebuild_set_coalesce - set coalesce from earlier saved arrays
3006  * @vsi: VSI connected with q_vectors
3007  * @coalesce: pointer to array of struct with stored coalesce
3008  * @size: size of coalesce array
3009  *
3010  * Before this function, ice_vsi_rebuild_get_coalesce should be called to save
3011  * ITR params in arrays. If size is 0 or coalesce wasn't stored set coalesce
3012  * to default value.
3013  */
3014 static void
3015 ice_vsi_rebuild_set_coalesce(struct ice_vsi *vsi,
3016 			     struct ice_coalesce_stored *coalesce, int size)
3017 {
3018 	struct ice_ring_container *rc;
3019 	int i;
3020 
3021 	if ((size && !coalesce) || !vsi)
3022 		return;
3023 
3024 	/* There are a couple of cases that have to be handled here:
3025 	 *   1. The case where the number of queue vectors stays the same, but
3026 	 *      the number of Tx or Rx rings changes (the first for loop)
3027 	 *   2. The case where the number of queue vectors increased (the
3028 	 *      second for loop)
3029 	 */
3030 	for (i = 0; i < size && i < vsi->num_q_vectors; i++) {
3031 		/* There are 2 cases to handle here and they are the same for
3032 		 * both Tx and Rx:
3033 		 *   if the entry was valid previously (coalesce[i].[tr]x_valid
3034 		 *   and the loop variable is less than the number of rings
3035 		 *   allocated, then write the previous values
3036 		 *
3037 		 *   if the entry was not valid previously, but the number of
3038 		 *   rings is less than are allocated (this means the number of
3039 		 *   rings increased from previously), then write out the
3040 		 *   values in the first element
3041 		 *
3042 		 *   Also, always write the ITR, even if in ITR_IS_DYNAMIC
3043 		 *   as there is no harm because the dynamic algorithm
3044 		 *   will just overwrite.
3045 		 */
3046 		if (i < vsi->alloc_rxq && coalesce[i].rx_valid) {
3047 			rc = &vsi->q_vectors[i]->rx;
3048 			rc->itr_setting = coalesce[i].itr_rx;
3049 			ice_write_itr(rc, rc->itr_setting);
3050 		} else if (i < vsi->alloc_rxq) {
3051 			rc = &vsi->q_vectors[i]->rx;
3052 			rc->itr_setting = coalesce[0].itr_rx;
3053 			ice_write_itr(rc, rc->itr_setting);
3054 		}
3055 
3056 		if (i < vsi->alloc_txq && coalesce[i].tx_valid) {
3057 			rc = &vsi->q_vectors[i]->tx;
3058 			rc->itr_setting = coalesce[i].itr_tx;
3059 			ice_write_itr(rc, rc->itr_setting);
3060 		} else if (i < vsi->alloc_txq) {
3061 			rc = &vsi->q_vectors[i]->tx;
3062 			rc->itr_setting = coalesce[0].itr_tx;
3063 			ice_write_itr(rc, rc->itr_setting);
3064 		}
3065 
3066 		vsi->q_vectors[i]->intrl = coalesce[i].intrl;
3067 		ice_set_q_vector_intrl(vsi->q_vectors[i]);
3068 	}
3069 
3070 	/* the number of queue vectors increased so write whatever is in
3071 	 * the first element
3072 	 */
3073 	for (; i < vsi->num_q_vectors; i++) {
3074 		/* transmit */
3075 		rc = &vsi->q_vectors[i]->tx;
3076 		rc->itr_setting = coalesce[0].itr_tx;
3077 		ice_write_itr(rc, rc->itr_setting);
3078 
3079 		/* receive */
3080 		rc = &vsi->q_vectors[i]->rx;
3081 		rc->itr_setting = coalesce[0].itr_rx;
3082 		ice_write_itr(rc, rc->itr_setting);
3083 
3084 		vsi->q_vectors[i]->intrl = coalesce[0].intrl;
3085 		ice_set_q_vector_intrl(vsi->q_vectors[i]);
3086 	}
3087 }
3088 
3089 /**
3090  * ice_vsi_rebuild - Rebuild VSI after reset
3091  * @vsi: VSI to be rebuild
3092  * @init_vsi: is this an initialization or a reconfigure of the VSI
3093  *
3094  * Returns 0 on success and negative value on failure
3095  */
3096 int ice_vsi_rebuild(struct ice_vsi *vsi, bool init_vsi)
3097 {
3098 	u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };
3099 	struct ice_coalesce_stored *coalesce;
3100 	int prev_num_q_vectors = 0;
3101 	struct ice_vf *vf = NULL;
3102 	enum ice_vsi_type vtype;
3103 	struct ice_pf *pf;
3104 	int ret, i;
3105 
3106 	if (!vsi)
3107 		return -EINVAL;
3108 
3109 	pf = vsi->back;
3110 	vtype = vsi->type;
3111 	if (vtype == ICE_VSI_VF)
3112 		vf = &pf->vf[vsi->vf_id];
3113 
3114 	ice_vsi_init_vlan_ops(vsi);
3115 
3116 	coalesce = kcalloc(vsi->num_q_vectors,
3117 			   sizeof(struct ice_coalesce_stored), GFP_KERNEL);
3118 	if (!coalesce)
3119 		return -ENOMEM;
3120 
3121 	prev_num_q_vectors = ice_vsi_rebuild_get_coalesce(vsi, coalesce);
3122 
3123 	ice_rm_vsi_lan_cfg(vsi->port_info, vsi->idx);
3124 	ret = ice_rm_vsi_rdma_cfg(vsi->port_info, vsi->idx);
3125 	if (ret)
3126 		dev_err(ice_pf_to_dev(vsi->back), "Failed to remove RDMA scheduler config for VSI %u, err %d\n",
3127 			vsi->vsi_num, ret);
3128 	ice_vsi_free_q_vectors(vsi);
3129 
3130 	/* SR-IOV determines needed MSIX resources all at once instead of per
3131 	 * VSI since when VFs are spawned we know how many VFs there are and how
3132 	 * many interrupts each VF needs. SR-IOV MSIX resources are also
3133 	 * cleared in the same manner.
3134 	 */
3135 	if (vtype != ICE_VSI_VF) {
3136 		/* reclaim SW interrupts back to the common pool */
3137 		ice_free_res(pf->irq_tracker, vsi->base_vector, vsi->idx);
3138 		pf->num_avail_sw_msix += vsi->num_q_vectors;
3139 		vsi->base_vector = 0;
3140 	}
3141 
3142 	if (ice_is_xdp_ena_vsi(vsi))
3143 		/* return value check can be skipped here, it always returns
3144 		 * 0 if reset is in progress
3145 		 */
3146 		ice_destroy_xdp_rings(vsi);
3147 	ice_vsi_put_qs(vsi);
3148 	ice_vsi_clear_rings(vsi);
3149 	ice_vsi_free_arrays(vsi);
3150 	if (vtype == ICE_VSI_VF)
3151 		ice_vsi_set_num_qs(vsi, vf->vf_id);
3152 	else
3153 		ice_vsi_set_num_qs(vsi, ICE_INVAL_VFID);
3154 
3155 	ret = ice_vsi_alloc_arrays(vsi);
3156 	if (ret < 0)
3157 		goto err_vsi;
3158 
3159 	ice_vsi_get_qs(vsi);
3160 
3161 	ice_alloc_fd_res(vsi);
3162 	ice_vsi_set_tc_cfg(vsi);
3163 
3164 	/* Initialize VSI struct elements and create VSI in FW */
3165 	ret = ice_vsi_init(vsi, init_vsi);
3166 	if (ret < 0)
3167 		goto err_vsi;
3168 
3169 	switch (vtype) {
3170 	case ICE_VSI_CTRL:
3171 	case ICE_VSI_SWITCHDEV_CTRL:
3172 	case ICE_VSI_PF:
3173 		ret = ice_vsi_alloc_q_vectors(vsi);
3174 		if (ret)
3175 			goto err_rings;
3176 
3177 		ret = ice_vsi_setup_vector_base(vsi);
3178 		if (ret)
3179 			goto err_vectors;
3180 
3181 		ret = ice_vsi_set_q_vectors_reg_idx(vsi);
3182 		if (ret)
3183 			goto err_vectors;
3184 
3185 		ret = ice_vsi_alloc_rings(vsi);
3186 		if (ret)
3187 			goto err_vectors;
3188 
3189 		ice_vsi_map_rings_to_vectors(vsi);
3190 		if (ice_is_xdp_ena_vsi(vsi)) {
3191 			ret = ice_vsi_determine_xdp_res(vsi);
3192 			if (ret)
3193 				goto err_vectors;
3194 			ret = ice_prepare_xdp_rings(vsi, vsi->xdp_prog);
3195 			if (ret)
3196 				goto err_vectors;
3197 		}
3198 		/* ICE_VSI_CTRL does not need RSS so skip RSS processing */
3199 		if (vtype != ICE_VSI_CTRL)
3200 			/* Do not exit if configuring RSS had an issue, at
3201 			 * least receive traffic on first queue. Hence no
3202 			 * need to capture return value
3203 			 */
3204 			if (test_bit(ICE_FLAG_RSS_ENA, pf->flags))
3205 				ice_vsi_cfg_rss_lut_key(vsi);
3206 		break;
3207 	case ICE_VSI_VF:
3208 		ret = ice_vsi_alloc_q_vectors(vsi);
3209 		if (ret)
3210 			goto err_rings;
3211 
3212 		ret = ice_vsi_set_q_vectors_reg_idx(vsi);
3213 		if (ret)
3214 			goto err_vectors;
3215 
3216 		ret = ice_vsi_alloc_rings(vsi);
3217 		if (ret)
3218 			goto err_vectors;
3219 
3220 		break;
3221 	case ICE_VSI_CHNL:
3222 		if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
3223 			ice_vsi_cfg_rss_lut_key(vsi);
3224 			ice_vsi_set_rss_flow_fld(vsi);
3225 		}
3226 		break;
3227 	default:
3228 		break;
3229 	}
3230 
3231 	/* configure VSI nodes based on number of queues and TC's */
3232 	for (i = 0; i < vsi->tc_cfg.numtc; i++) {
3233 		/* configure VSI nodes based on number of queues and TC's.
3234 		 * ADQ creates VSIs for each TC/Channel but doesn't
3235 		 * allocate queues instead it reconfigures the PF queues
3236 		 * as per the TC command. So max_txqs should point to the
3237 		 * PF Tx queues.
3238 		 */
3239 		if (vtype == ICE_VSI_CHNL)
3240 			max_txqs[i] = pf->num_lan_tx;
3241 		else
3242 			max_txqs[i] = vsi->alloc_txq;
3243 
3244 		if (ice_is_xdp_ena_vsi(vsi))
3245 			max_txqs[i] += vsi->num_xdp_txq;
3246 	}
3247 
3248 	if (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
3249 		/* If MQPRIO is set, means channel code path, hence for main
3250 		 * VSI's, use TC as 1
3251 		 */
3252 		ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, 1, max_txqs);
3253 	else
3254 		ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx,
3255 				      vsi->tc_cfg.ena_tc, max_txqs);
3256 
3257 	if (ret) {
3258 		dev_err(ice_pf_to_dev(pf), "VSI %d failed lan queue config, error %d\n",
3259 			vsi->vsi_num, ret);
3260 		if (init_vsi) {
3261 			ret = -EIO;
3262 			goto err_vectors;
3263 		} else {
3264 			return ice_schedule_reset(pf, ICE_RESET_PFR);
3265 		}
3266 	}
3267 	ice_vsi_rebuild_set_coalesce(vsi, coalesce, prev_num_q_vectors);
3268 	kfree(coalesce);
3269 
3270 	return 0;
3271 
3272 err_vectors:
3273 	ice_vsi_free_q_vectors(vsi);
3274 err_rings:
3275 	if (vsi->netdev) {
3276 		vsi->current_netdev_flags = 0;
3277 		unregister_netdev(vsi->netdev);
3278 		free_netdev(vsi->netdev);
3279 		vsi->netdev = NULL;
3280 	}
3281 err_vsi:
3282 	ice_vsi_clear(vsi);
3283 	set_bit(ICE_RESET_FAILED, pf->state);
3284 	kfree(coalesce);
3285 	return ret;
3286 }
3287 
3288 /**
3289  * ice_is_reset_in_progress - check for a reset in progress
3290  * @state: PF state field
3291  */
3292 bool ice_is_reset_in_progress(unsigned long *state)
3293 {
3294 	return test_bit(ICE_RESET_OICR_RECV, state) ||
3295 	       test_bit(ICE_PFR_REQ, state) ||
3296 	       test_bit(ICE_CORER_REQ, state) ||
3297 	       test_bit(ICE_GLOBR_REQ, state);
3298 }
3299 
3300 /**
3301  * ice_wait_for_reset - Wait for driver to finish reset and rebuild
3302  * @pf: pointer to the PF structure
3303  * @timeout: length of time to wait, in jiffies
3304  *
3305  * Wait (sleep) for a short time until the driver finishes cleaning up from
3306  * a device reset. The caller must be able to sleep. Use this to delay
3307  * operations that could fail while the driver is cleaning up after a device
3308  * reset.
3309  *
3310  * Returns 0 on success, -EBUSY if the reset is not finished within the
3311  * timeout, and -ERESTARTSYS if the thread was interrupted.
3312  */
3313 int ice_wait_for_reset(struct ice_pf *pf, unsigned long timeout)
3314 {
3315 	long ret;
3316 
3317 	ret = wait_event_interruptible_timeout(pf->reset_wait_queue,
3318 					       !ice_is_reset_in_progress(pf->state),
3319 					       timeout);
3320 	if (ret < 0)
3321 		return ret;
3322 	else if (!ret)
3323 		return -EBUSY;
3324 	else
3325 		return 0;
3326 }
3327 
3328 /**
3329  * ice_vsi_update_q_map - update our copy of the VSI info with new queue map
3330  * @vsi: VSI being configured
3331  * @ctx: the context buffer returned from AQ VSI update command
3332  */
3333 static void ice_vsi_update_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctx)
3334 {
3335 	vsi->info.mapping_flags = ctx->info.mapping_flags;
3336 	memcpy(&vsi->info.q_mapping, &ctx->info.q_mapping,
3337 	       sizeof(vsi->info.q_mapping));
3338 	memcpy(&vsi->info.tc_mapping, ctx->info.tc_mapping,
3339 	       sizeof(vsi->info.tc_mapping));
3340 }
3341 
3342 /**
3343  * ice_vsi_cfg_netdev_tc - Setup the netdev TC configuration
3344  * @vsi: the VSI being configured
3345  * @ena_tc: TC map to be enabled
3346  */
3347 void ice_vsi_cfg_netdev_tc(struct ice_vsi *vsi, u8 ena_tc)
3348 {
3349 	struct net_device *netdev = vsi->netdev;
3350 	struct ice_pf *pf = vsi->back;
3351 	int numtc = vsi->tc_cfg.numtc;
3352 	struct ice_dcbx_cfg *dcbcfg;
3353 	u8 netdev_tc;
3354 	int i;
3355 
3356 	if (!netdev)
3357 		return;
3358 
3359 	/* CHNL VSI doesn't have it's own netdev, hence, no netdev_tc */
3360 	if (vsi->type == ICE_VSI_CHNL)
3361 		return;
3362 
3363 	if (!ena_tc) {
3364 		netdev_reset_tc(netdev);
3365 		return;
3366 	}
3367 
3368 	if (vsi->type == ICE_VSI_PF && ice_is_adq_active(pf))
3369 		numtc = vsi->all_numtc;
3370 
3371 	if (netdev_set_num_tc(netdev, numtc))
3372 		return;
3373 
3374 	dcbcfg = &pf->hw.port_info->qos_cfg.local_dcbx_cfg;
3375 
3376 	ice_for_each_traffic_class(i)
3377 		if (vsi->tc_cfg.ena_tc & BIT(i))
3378 			netdev_set_tc_queue(netdev,
3379 					    vsi->tc_cfg.tc_info[i].netdev_tc,
3380 					    vsi->tc_cfg.tc_info[i].qcount_tx,
3381 					    vsi->tc_cfg.tc_info[i].qoffset);
3382 	/* setup TC queue map for CHNL TCs */
3383 	ice_for_each_chnl_tc(i) {
3384 		if (!(vsi->all_enatc & BIT(i)))
3385 			break;
3386 		if (!vsi->mqprio_qopt.qopt.count[i])
3387 			break;
3388 		netdev_set_tc_queue(netdev, i,
3389 				    vsi->mqprio_qopt.qopt.count[i],
3390 				    vsi->mqprio_qopt.qopt.offset[i]);
3391 	}
3392 
3393 	if (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
3394 		return;
3395 
3396 	for (i = 0; i < ICE_MAX_USER_PRIORITY; i++) {
3397 		u8 ets_tc = dcbcfg->etscfg.prio_table[i];
3398 
3399 		/* Get the mapped netdev TC# for the UP */
3400 		netdev_tc = vsi->tc_cfg.tc_info[ets_tc].netdev_tc;
3401 		netdev_set_prio_tc_map(netdev, i, netdev_tc);
3402 	}
3403 }
3404 
3405 /**
3406  * ice_vsi_setup_q_map_mqprio - Prepares mqprio based tc_config
3407  * @vsi: the VSI being configured,
3408  * @ctxt: VSI context structure
3409  * @ena_tc: number of traffic classes to enable
3410  *
3411  * Prepares VSI tc_config to have queue configurations based on MQPRIO options.
3412  */
3413 static void
3414 ice_vsi_setup_q_map_mqprio(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt,
3415 			   u8 ena_tc)
3416 {
3417 	u16 pow, offset = 0, qcount_tx = 0, qcount_rx = 0, qmap;
3418 	u16 tc0_offset = vsi->mqprio_qopt.qopt.offset[0];
3419 	int tc0_qcount = vsi->mqprio_qopt.qopt.count[0];
3420 	u8 netdev_tc = 0;
3421 	int i;
3422 
3423 	vsi->tc_cfg.ena_tc = ena_tc ? ena_tc : 1;
3424 
3425 	pow = order_base_2(tc0_qcount);
3426 	qmap = ((tc0_offset << ICE_AQ_VSI_TC_Q_OFFSET_S) &
3427 		ICE_AQ_VSI_TC_Q_OFFSET_M) |
3428 		((pow << ICE_AQ_VSI_TC_Q_NUM_S) & ICE_AQ_VSI_TC_Q_NUM_M);
3429 
3430 	ice_for_each_traffic_class(i) {
3431 		if (!(vsi->tc_cfg.ena_tc & BIT(i))) {
3432 			/* TC is not enabled */
3433 			vsi->tc_cfg.tc_info[i].qoffset = 0;
3434 			vsi->tc_cfg.tc_info[i].qcount_rx = 1;
3435 			vsi->tc_cfg.tc_info[i].qcount_tx = 1;
3436 			vsi->tc_cfg.tc_info[i].netdev_tc = 0;
3437 			ctxt->info.tc_mapping[i] = 0;
3438 			continue;
3439 		}
3440 
3441 		offset = vsi->mqprio_qopt.qopt.offset[i];
3442 		qcount_rx = vsi->mqprio_qopt.qopt.count[i];
3443 		qcount_tx = vsi->mqprio_qopt.qopt.count[i];
3444 		vsi->tc_cfg.tc_info[i].qoffset = offset;
3445 		vsi->tc_cfg.tc_info[i].qcount_rx = qcount_rx;
3446 		vsi->tc_cfg.tc_info[i].qcount_tx = qcount_tx;
3447 		vsi->tc_cfg.tc_info[i].netdev_tc = netdev_tc++;
3448 	}
3449 
3450 	if (vsi->all_numtc && vsi->all_numtc != vsi->tc_cfg.numtc) {
3451 		ice_for_each_chnl_tc(i) {
3452 			if (!(vsi->all_enatc & BIT(i)))
3453 				continue;
3454 			offset = vsi->mqprio_qopt.qopt.offset[i];
3455 			qcount_rx = vsi->mqprio_qopt.qopt.count[i];
3456 			qcount_tx = vsi->mqprio_qopt.qopt.count[i];
3457 		}
3458 	}
3459 
3460 	/* Set actual Tx/Rx queue pairs */
3461 	vsi->num_txq = offset + qcount_tx;
3462 	vsi->num_rxq = offset + qcount_rx;
3463 
3464 	/* Setup queue TC[0].qmap for given VSI context */
3465 	ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
3466 	ctxt->info.q_mapping[0] = cpu_to_le16(vsi->rxq_map[0]);
3467 	ctxt->info.q_mapping[1] = cpu_to_le16(tc0_qcount);
3468 
3469 	/* Find queue count available for channel VSIs and starting offset
3470 	 * for channel VSIs
3471 	 */
3472 	if (tc0_qcount && tc0_qcount < vsi->num_rxq) {
3473 		vsi->cnt_q_avail = vsi->num_rxq - tc0_qcount;
3474 		vsi->next_base_q = tc0_qcount;
3475 	}
3476 	dev_dbg(ice_pf_to_dev(vsi->back), "vsi->num_txq = %d\n",  vsi->num_txq);
3477 	dev_dbg(ice_pf_to_dev(vsi->back), "vsi->num_rxq = %d\n",  vsi->num_rxq);
3478 	dev_dbg(ice_pf_to_dev(vsi->back), "all_numtc %u, all_enatc: 0x%04x, tc_cfg.numtc %u\n",
3479 		vsi->all_numtc, vsi->all_enatc, vsi->tc_cfg.numtc);
3480 }
3481 
3482 /**
3483  * ice_vsi_cfg_tc - Configure VSI Tx Sched for given TC map
3484  * @vsi: VSI to be configured
3485  * @ena_tc: TC bitmap
3486  *
3487  * VSI queues expected to be quiesced before calling this function
3488  */
3489 int ice_vsi_cfg_tc(struct ice_vsi *vsi, u8 ena_tc)
3490 {
3491 	u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };
3492 	struct ice_pf *pf = vsi->back;
3493 	struct ice_vsi_ctx *ctx;
3494 	struct device *dev;
3495 	int i, ret = 0;
3496 	u8 num_tc = 0;
3497 
3498 	dev = ice_pf_to_dev(pf);
3499 	if (vsi->tc_cfg.ena_tc == ena_tc &&
3500 	    vsi->mqprio_qopt.mode != TC_MQPRIO_MODE_CHANNEL)
3501 		return ret;
3502 
3503 	ice_for_each_traffic_class(i) {
3504 		/* build bitmap of enabled TCs */
3505 		if (ena_tc & BIT(i))
3506 			num_tc++;
3507 		/* populate max_txqs per TC */
3508 		max_txqs[i] = vsi->alloc_txq;
3509 		/* Update max_txqs if it is CHNL VSI, because alloc_t[r]xq are
3510 		 * zero for CHNL VSI, hence use num_txq instead as max_txqs
3511 		 */
3512 		if (vsi->type == ICE_VSI_CHNL &&
3513 		    test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
3514 			max_txqs[i] = vsi->num_txq;
3515 	}
3516 
3517 	vsi->tc_cfg.ena_tc = ena_tc;
3518 	vsi->tc_cfg.numtc = num_tc;
3519 
3520 	ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
3521 	if (!ctx)
3522 		return -ENOMEM;
3523 
3524 	ctx->vf_num = 0;
3525 	ctx->info = vsi->info;
3526 
3527 	if (vsi->type == ICE_VSI_PF &&
3528 	    test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
3529 		ice_vsi_setup_q_map_mqprio(vsi, ctx, ena_tc);
3530 	else
3531 		ice_vsi_setup_q_map(vsi, ctx);
3532 
3533 	/* must to indicate which section of VSI context are being modified */
3534 	ctx->info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_RXQ_MAP_VALID);
3535 	ret = ice_update_vsi(&pf->hw, vsi->idx, ctx, NULL);
3536 	if (ret) {
3537 		dev_info(dev, "Failed VSI Update\n");
3538 		goto out;
3539 	}
3540 
3541 	if (vsi->type == ICE_VSI_PF &&
3542 	    test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
3543 		ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, 1, max_txqs);
3544 	else
3545 		ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx,
3546 				      vsi->tc_cfg.ena_tc, max_txqs);
3547 
3548 	if (ret) {
3549 		dev_err(dev, "VSI %d failed TC config, error %d\n",
3550 			vsi->vsi_num, ret);
3551 		goto out;
3552 	}
3553 	ice_vsi_update_q_map(vsi, ctx);
3554 	vsi->info.valid_sections = 0;
3555 
3556 	ice_vsi_cfg_netdev_tc(vsi, ena_tc);
3557 out:
3558 	kfree(ctx);
3559 	return ret;
3560 }
3561 
3562 /**
3563  * ice_update_ring_stats - Update ring statistics
3564  * @stats: stats to be updated
3565  * @pkts: number of processed packets
3566  * @bytes: number of processed bytes
3567  *
3568  * This function assumes that caller has acquired a u64_stats_sync lock.
3569  */
3570 static void ice_update_ring_stats(struct ice_q_stats *stats, u64 pkts, u64 bytes)
3571 {
3572 	stats->bytes += bytes;
3573 	stats->pkts += pkts;
3574 }
3575 
3576 /**
3577  * ice_update_tx_ring_stats - Update Tx ring specific counters
3578  * @tx_ring: ring to update
3579  * @pkts: number of processed packets
3580  * @bytes: number of processed bytes
3581  */
3582 void ice_update_tx_ring_stats(struct ice_tx_ring *tx_ring, u64 pkts, u64 bytes)
3583 {
3584 	u64_stats_update_begin(&tx_ring->syncp);
3585 	ice_update_ring_stats(&tx_ring->stats, pkts, bytes);
3586 	u64_stats_update_end(&tx_ring->syncp);
3587 }
3588 
3589 /**
3590  * ice_update_rx_ring_stats - Update Rx ring specific counters
3591  * @rx_ring: ring to update
3592  * @pkts: number of processed packets
3593  * @bytes: number of processed bytes
3594  */
3595 void ice_update_rx_ring_stats(struct ice_rx_ring *rx_ring, u64 pkts, u64 bytes)
3596 {
3597 	u64_stats_update_begin(&rx_ring->syncp);
3598 	ice_update_ring_stats(&rx_ring->stats, pkts, bytes);
3599 	u64_stats_update_end(&rx_ring->syncp);
3600 }
3601 
3602 /**
3603  * ice_is_dflt_vsi_in_use - check if the default forwarding VSI is being used
3604  * @sw: switch to check if its default forwarding VSI is free
3605  *
3606  * Return true if the default forwarding VSI is already being used, else returns
3607  * false signalling that it's available to use.
3608  */
3609 bool ice_is_dflt_vsi_in_use(struct ice_sw *sw)
3610 {
3611 	return (sw->dflt_vsi && sw->dflt_vsi_ena);
3612 }
3613 
3614 /**
3615  * ice_is_vsi_dflt_vsi - check if the VSI passed in is the default VSI
3616  * @sw: switch for the default forwarding VSI to compare against
3617  * @vsi: VSI to compare against default forwarding VSI
3618  *
3619  * If this VSI passed in is the default forwarding VSI then return true, else
3620  * return false
3621  */
3622 bool ice_is_vsi_dflt_vsi(struct ice_sw *sw, struct ice_vsi *vsi)
3623 {
3624 	return (sw->dflt_vsi == vsi && sw->dflt_vsi_ena);
3625 }
3626 
3627 /**
3628  * ice_set_dflt_vsi - set the default forwarding VSI
3629  * @sw: switch used to assign the default forwarding VSI
3630  * @vsi: VSI getting set as the default forwarding VSI on the switch
3631  *
3632  * If the VSI passed in is already the default VSI and it's enabled just return
3633  * success.
3634  *
3635  * If there is already a default VSI on the switch and it's enabled then return
3636  * -EEXIST since there can only be one default VSI per switch.
3637  *
3638  *  Otherwise try to set the VSI passed in as the switch's default VSI and
3639  *  return the result.
3640  */
3641 int ice_set_dflt_vsi(struct ice_sw *sw, struct ice_vsi *vsi)
3642 {
3643 	struct device *dev;
3644 	int status;
3645 
3646 	if (!sw || !vsi)
3647 		return -EINVAL;
3648 
3649 	dev = ice_pf_to_dev(vsi->back);
3650 
3651 	/* the VSI passed in is already the default VSI */
3652 	if (ice_is_vsi_dflt_vsi(sw, vsi)) {
3653 		dev_dbg(dev, "VSI %d passed in is already the default forwarding VSI, nothing to do\n",
3654 			vsi->vsi_num);
3655 		return 0;
3656 	}
3657 
3658 	/* another VSI is already the default VSI for this switch */
3659 	if (ice_is_dflt_vsi_in_use(sw)) {
3660 		dev_err(dev, "Default forwarding VSI %d already in use, disable it and try again\n",
3661 			sw->dflt_vsi->vsi_num);
3662 		return -EEXIST;
3663 	}
3664 
3665 	status = ice_cfg_dflt_vsi(&vsi->back->hw, vsi->idx, true, ICE_FLTR_RX);
3666 	if (status) {
3667 		dev_err(dev, "Failed to set VSI %d as the default forwarding VSI, error %d\n",
3668 			vsi->vsi_num, status);
3669 		return status;
3670 	}
3671 
3672 	sw->dflt_vsi = vsi;
3673 	sw->dflt_vsi_ena = true;
3674 
3675 	return 0;
3676 }
3677 
3678 /**
3679  * ice_clear_dflt_vsi - clear the default forwarding VSI
3680  * @sw: switch used to clear the default VSI
3681  *
3682  * If the switch has no default VSI or it's not enabled then return error.
3683  *
3684  * Otherwise try to clear the default VSI and return the result.
3685  */
3686 int ice_clear_dflt_vsi(struct ice_sw *sw)
3687 {
3688 	struct ice_vsi *dflt_vsi;
3689 	struct device *dev;
3690 	int status;
3691 
3692 	if (!sw)
3693 		return -EINVAL;
3694 
3695 	dev = ice_pf_to_dev(sw->pf);
3696 
3697 	dflt_vsi = sw->dflt_vsi;
3698 
3699 	/* there is no default VSI configured */
3700 	if (!ice_is_dflt_vsi_in_use(sw))
3701 		return -ENODEV;
3702 
3703 	status = ice_cfg_dflt_vsi(&dflt_vsi->back->hw, dflt_vsi->idx, false,
3704 				  ICE_FLTR_RX);
3705 	if (status) {
3706 		dev_err(dev, "Failed to clear the default forwarding VSI %d, error %d\n",
3707 			dflt_vsi->vsi_num, status);
3708 		return -EIO;
3709 	}
3710 
3711 	sw->dflt_vsi = NULL;
3712 	sw->dflt_vsi_ena = false;
3713 
3714 	return 0;
3715 }
3716 
3717 /**
3718  * ice_get_link_speed_mbps - get link speed in Mbps
3719  * @vsi: the VSI whose link speed is being queried
3720  *
3721  * Return current VSI link speed and 0 if the speed is unknown.
3722  */
3723 int ice_get_link_speed_mbps(struct ice_vsi *vsi)
3724 {
3725 	switch (vsi->port_info->phy.link_info.link_speed) {
3726 	case ICE_AQ_LINK_SPEED_100GB:
3727 		return SPEED_100000;
3728 	case ICE_AQ_LINK_SPEED_50GB:
3729 		return SPEED_50000;
3730 	case ICE_AQ_LINK_SPEED_40GB:
3731 		return SPEED_40000;
3732 	case ICE_AQ_LINK_SPEED_25GB:
3733 		return SPEED_25000;
3734 	case ICE_AQ_LINK_SPEED_20GB:
3735 		return SPEED_20000;
3736 	case ICE_AQ_LINK_SPEED_10GB:
3737 		return SPEED_10000;
3738 	case ICE_AQ_LINK_SPEED_5GB:
3739 		return SPEED_5000;
3740 	case ICE_AQ_LINK_SPEED_2500MB:
3741 		return SPEED_2500;
3742 	case ICE_AQ_LINK_SPEED_1000MB:
3743 		return SPEED_1000;
3744 	case ICE_AQ_LINK_SPEED_100MB:
3745 		return SPEED_100;
3746 	case ICE_AQ_LINK_SPEED_10MB:
3747 		return SPEED_10;
3748 	case ICE_AQ_LINK_SPEED_UNKNOWN:
3749 	default:
3750 		return 0;
3751 	}
3752 }
3753 
3754 /**
3755  * ice_get_link_speed_kbps - get link speed in Kbps
3756  * @vsi: the VSI whose link speed is being queried
3757  *
3758  * Return current VSI link speed and 0 if the speed is unknown.
3759  */
3760 int ice_get_link_speed_kbps(struct ice_vsi *vsi)
3761 {
3762 	int speed_mbps;
3763 
3764 	speed_mbps = ice_get_link_speed_mbps(vsi);
3765 
3766 	return speed_mbps * 1000;
3767 }
3768 
3769 /**
3770  * ice_set_min_bw_limit - setup minimum BW limit for Tx based on min_tx_rate
3771  * @vsi: VSI to be configured
3772  * @min_tx_rate: min Tx rate in Kbps to be configured as BW limit
3773  *
3774  * If the min_tx_rate is specified as 0 that means to clear the minimum BW limit
3775  * profile, otherwise a non-zero value will force a minimum BW limit for the VSI
3776  * on TC 0.
3777  */
3778 int ice_set_min_bw_limit(struct ice_vsi *vsi, u64 min_tx_rate)
3779 {
3780 	struct ice_pf *pf = vsi->back;
3781 	struct device *dev;
3782 	int status;
3783 	int speed;
3784 
3785 	dev = ice_pf_to_dev(pf);
3786 	if (!vsi->port_info) {
3787 		dev_dbg(dev, "VSI %d, type %u specified doesn't have valid port_info\n",
3788 			vsi->idx, vsi->type);
3789 		return -EINVAL;
3790 	}
3791 
3792 	speed = ice_get_link_speed_kbps(vsi);
3793 	if (min_tx_rate > (u64)speed) {
3794 		dev_err(dev, "invalid min Tx rate %llu Kbps specified for %s %d is greater than current link speed %u Kbps\n",
3795 			min_tx_rate, ice_vsi_type_str(vsi->type), vsi->idx,
3796 			speed);
3797 		return -EINVAL;
3798 	}
3799 
3800 	/* Configure min BW for VSI limit */
3801 	if (min_tx_rate) {
3802 		status = ice_cfg_vsi_bw_lmt_per_tc(vsi->port_info, vsi->idx, 0,
3803 						   ICE_MIN_BW, min_tx_rate);
3804 		if (status) {
3805 			dev_err(dev, "failed to set min Tx rate(%llu Kbps) for %s %d\n",
3806 				min_tx_rate, ice_vsi_type_str(vsi->type),
3807 				vsi->idx);
3808 			return status;
3809 		}
3810 
3811 		dev_dbg(dev, "set min Tx rate(%llu Kbps) for %s\n",
3812 			min_tx_rate, ice_vsi_type_str(vsi->type));
3813 	} else {
3814 		status = ice_cfg_vsi_bw_dflt_lmt_per_tc(vsi->port_info,
3815 							vsi->idx, 0,
3816 							ICE_MIN_BW);
3817 		if (status) {
3818 			dev_err(dev, "failed to clear min Tx rate configuration for %s %d\n",
3819 				ice_vsi_type_str(vsi->type), vsi->idx);
3820 			return status;
3821 		}
3822 
3823 		dev_dbg(dev, "cleared min Tx rate configuration for %s %d\n",
3824 			ice_vsi_type_str(vsi->type), vsi->idx);
3825 	}
3826 
3827 	return 0;
3828 }
3829 
3830 /**
3831  * ice_set_max_bw_limit - setup maximum BW limit for Tx based on max_tx_rate
3832  * @vsi: VSI to be configured
3833  * @max_tx_rate: max Tx rate in Kbps to be configured as BW limit
3834  *
3835  * If the max_tx_rate is specified as 0 that means to clear the maximum BW limit
3836  * profile, otherwise a non-zero value will force a maximum BW limit for the VSI
3837  * on TC 0.
3838  */
3839 int ice_set_max_bw_limit(struct ice_vsi *vsi, u64 max_tx_rate)
3840 {
3841 	struct ice_pf *pf = vsi->back;
3842 	struct device *dev;
3843 	int status;
3844 	int speed;
3845 
3846 	dev = ice_pf_to_dev(pf);
3847 	if (!vsi->port_info) {
3848 		dev_dbg(dev, "VSI %d, type %u specified doesn't have valid port_info\n",
3849 			vsi->idx, vsi->type);
3850 		return -EINVAL;
3851 	}
3852 
3853 	speed = ice_get_link_speed_kbps(vsi);
3854 	if (max_tx_rate > (u64)speed) {
3855 		dev_err(dev, "invalid max Tx rate %llu Kbps specified for %s %d is greater than current link speed %u Kbps\n",
3856 			max_tx_rate, ice_vsi_type_str(vsi->type), vsi->idx,
3857 			speed);
3858 		return -EINVAL;
3859 	}
3860 
3861 	/* Configure max BW for VSI limit */
3862 	if (max_tx_rate) {
3863 		status = ice_cfg_vsi_bw_lmt_per_tc(vsi->port_info, vsi->idx, 0,
3864 						   ICE_MAX_BW, max_tx_rate);
3865 		if (status) {
3866 			dev_err(dev, "failed setting max Tx rate(%llu Kbps) for %s %d\n",
3867 				max_tx_rate, ice_vsi_type_str(vsi->type),
3868 				vsi->idx);
3869 			return status;
3870 		}
3871 
3872 		dev_dbg(dev, "set max Tx rate(%llu Kbps) for %s %d\n",
3873 			max_tx_rate, ice_vsi_type_str(vsi->type), vsi->idx);
3874 	} else {
3875 		status = ice_cfg_vsi_bw_dflt_lmt_per_tc(vsi->port_info,
3876 							vsi->idx, 0,
3877 							ICE_MAX_BW);
3878 		if (status) {
3879 			dev_err(dev, "failed clearing max Tx rate configuration for %s %d\n",
3880 				ice_vsi_type_str(vsi->type), vsi->idx);
3881 			return status;
3882 		}
3883 
3884 		dev_dbg(dev, "cleared max Tx rate configuration for %s %d\n",
3885 			ice_vsi_type_str(vsi->type), vsi->idx);
3886 	}
3887 
3888 	return 0;
3889 }
3890 
3891 /**
3892  * ice_set_link - turn on/off physical link
3893  * @vsi: VSI to modify physical link on
3894  * @ena: turn on/off physical link
3895  */
3896 int ice_set_link(struct ice_vsi *vsi, bool ena)
3897 {
3898 	struct device *dev = ice_pf_to_dev(vsi->back);
3899 	struct ice_port_info *pi = vsi->port_info;
3900 	struct ice_hw *hw = pi->hw;
3901 	int status;
3902 
3903 	if (vsi->type != ICE_VSI_PF)
3904 		return -EINVAL;
3905 
3906 	status = ice_aq_set_link_restart_an(pi, ena, NULL);
3907 
3908 	/* if link is owned by manageability, FW will return ICE_AQ_RC_EMODE.
3909 	 * this is not a fatal error, so print a warning message and return
3910 	 * a success code. Return an error if FW returns an error code other
3911 	 * than ICE_AQ_RC_EMODE
3912 	 */
3913 	if (status == -EIO) {
3914 		if (hw->adminq.sq_last_status == ICE_AQ_RC_EMODE)
3915 			dev_warn(dev, "can't set link to %s, err %d aq_err %s. not fatal, continuing\n",
3916 				 (ena ? "ON" : "OFF"), status,
3917 				 ice_aq_str(hw->adminq.sq_last_status));
3918 	} else if (status) {
3919 		dev_err(dev, "can't set link to %s, err %d aq_err %s\n",
3920 			(ena ? "ON" : "OFF"), status,
3921 			ice_aq_str(hw->adminq.sq_last_status));
3922 		return status;
3923 	}
3924 
3925 	return 0;
3926 }
3927 
3928 /**
3929  * ice_vsi_add_vlan_zero - add VLAN 0 filter(s) for this VSI
3930  * @vsi: VSI used to add VLAN filters
3931  *
3932  * In Single VLAN Mode (SVM), single VLAN filters via ICE_SW_LKUP_VLAN are based
3933  * on the inner VLAN ID, so the VLAN TPID (i.e. 0x8100 or 0x888a8) doesn't
3934  * matter. In Double VLAN Mode (DVM), outer/single VLAN filters via
3935  * ICE_SW_LKUP_VLAN are based on the outer/single VLAN ID + VLAN TPID.
3936  *
3937  * For both modes add a VLAN 0 + no VLAN TPID filter to handle untagged traffic
3938  * when VLAN pruning is enabled. Also, this handles VLAN 0 priority tagged
3939  * traffic in SVM, since the VLAN TPID isn't part of filtering.
3940  *
3941  * If DVM is enabled then an explicit VLAN 0 + VLAN TPID filter needs to be
3942  * added to allow VLAN 0 priority tagged traffic in DVM, since the VLAN TPID is
3943  * part of filtering.
3944  */
3945 int ice_vsi_add_vlan_zero(struct ice_vsi *vsi)
3946 {
3947 	struct ice_vsi_vlan_ops *vlan_ops = ice_get_compat_vsi_vlan_ops(vsi);
3948 	struct ice_vlan vlan;
3949 	int err;
3950 
3951 	vlan = ICE_VLAN(0, 0, 0);
3952 	err = vlan_ops->add_vlan(vsi, &vlan);
3953 	if (err && err != -EEXIST)
3954 		return err;
3955 
3956 	/* in SVM both VLAN 0 filters are identical */
3957 	if (!ice_is_dvm_ena(&vsi->back->hw))
3958 		return 0;
3959 
3960 	vlan = ICE_VLAN(ETH_P_8021Q, 0, 0);
3961 	err = vlan_ops->add_vlan(vsi, &vlan);
3962 	if (err && err != -EEXIST)
3963 		return err;
3964 
3965 	return 0;
3966 }
3967 
3968 /**
3969  * ice_vsi_del_vlan_zero - delete VLAN 0 filter(s) for this VSI
3970  * @vsi: VSI used to add VLAN filters
3971  *
3972  * Delete the VLAN 0 filters in the same manner that they were added in
3973  * ice_vsi_add_vlan_zero.
3974  */
3975 int ice_vsi_del_vlan_zero(struct ice_vsi *vsi)
3976 {
3977 	struct ice_vsi_vlan_ops *vlan_ops = ice_get_compat_vsi_vlan_ops(vsi);
3978 	struct ice_vlan vlan;
3979 	int err;
3980 
3981 	vlan = ICE_VLAN(0, 0, 0);
3982 	err = vlan_ops->del_vlan(vsi, &vlan);
3983 	if (err && err != -EEXIST)
3984 		return err;
3985 
3986 	/* in SVM both VLAN 0 filters are identical */
3987 	if (!ice_is_dvm_ena(&vsi->back->hw))
3988 		return 0;
3989 
3990 	vlan = ICE_VLAN(ETH_P_8021Q, 0, 0);
3991 	err = vlan_ops->del_vlan(vsi, &vlan);
3992 	if (err && err != -EEXIST)
3993 		return err;
3994 
3995 	return 0;
3996 }
3997 
3998 /**
3999  * ice_vsi_num_zero_vlans - get number of VLAN 0 filters based on VLAN mode
4000  * @vsi: VSI used to get the VLAN mode
4001  *
4002  * If DVM is enabled then 2 VLAN 0 filters are added, else if SVM is enabled
4003  * then 1 VLAN 0 filter is added. See ice_vsi_add_vlan_zero for more details.
4004  */
4005 static u16 ice_vsi_num_zero_vlans(struct ice_vsi *vsi)
4006 {
4007 #define ICE_DVM_NUM_ZERO_VLAN_FLTRS	2
4008 #define ICE_SVM_NUM_ZERO_VLAN_FLTRS	1
4009 	/* no VLAN 0 filter is created when a port VLAN is active */
4010 	if (vsi->type == ICE_VSI_VF &&
4011 	    ice_vf_is_port_vlan_ena(&vsi->back->vf[vsi->vf_id]))
4012 		return 0;
4013 	if (ice_is_dvm_ena(&vsi->back->hw))
4014 		return ICE_DVM_NUM_ZERO_VLAN_FLTRS;
4015 	else
4016 		return ICE_SVM_NUM_ZERO_VLAN_FLTRS;
4017 }
4018 
4019 /**
4020  * ice_vsi_has_non_zero_vlans - check if VSI has any non-zero VLANs
4021  * @vsi: VSI used to determine if any non-zero VLANs have been added
4022  */
4023 bool ice_vsi_has_non_zero_vlans(struct ice_vsi *vsi)
4024 {
4025 	return (vsi->num_vlan > ice_vsi_num_zero_vlans(vsi));
4026 }
4027 
4028 /**
4029  * ice_vsi_num_non_zero_vlans - get the number of non-zero VLANs for this VSI
4030  * @vsi: VSI used to get the number of non-zero VLANs added
4031  */
4032 u16 ice_vsi_num_non_zero_vlans(struct ice_vsi *vsi)
4033 {
4034 	return (vsi->num_vlan - ice_vsi_num_zero_vlans(vsi));
4035 }
4036 
4037 /**
4038  * ice_is_feature_supported
4039  * @pf: pointer to the struct ice_pf instance
4040  * @f: feature enum to be checked
4041  *
4042  * returns true if feature is supported, false otherwise
4043  */
4044 bool ice_is_feature_supported(struct ice_pf *pf, enum ice_feature f)
4045 {
4046 	if (f < 0 || f >= ICE_F_MAX)
4047 		return false;
4048 
4049 	return test_bit(f, pf->features);
4050 }
4051 
4052 /**
4053  * ice_set_feature_support
4054  * @pf: pointer to the struct ice_pf instance
4055  * @f: feature enum to set
4056  */
4057 static void ice_set_feature_support(struct ice_pf *pf, enum ice_feature f)
4058 {
4059 	if (f < 0 || f >= ICE_F_MAX)
4060 		return;
4061 
4062 	set_bit(f, pf->features);
4063 }
4064 
4065 /**
4066  * ice_clear_feature_support
4067  * @pf: pointer to the struct ice_pf instance
4068  * @f: feature enum to clear
4069  */
4070 void ice_clear_feature_support(struct ice_pf *pf, enum ice_feature f)
4071 {
4072 	if (f < 0 || f >= ICE_F_MAX)
4073 		return;
4074 
4075 	clear_bit(f, pf->features);
4076 }
4077 
4078 /**
4079  * ice_init_feature_support
4080  * @pf: pointer to the struct ice_pf instance
4081  *
4082  * called during init to setup supported feature
4083  */
4084 void ice_init_feature_support(struct ice_pf *pf)
4085 {
4086 	switch (pf->hw.device_id) {
4087 	case ICE_DEV_ID_E810C_BACKPLANE:
4088 	case ICE_DEV_ID_E810C_QSFP:
4089 	case ICE_DEV_ID_E810C_SFP:
4090 		ice_set_feature_support(pf, ICE_F_DSCP);
4091 		if (ice_is_e810t(&pf->hw))
4092 			ice_set_feature_support(pf, ICE_F_SMA_CTRL);
4093 		break;
4094 	default:
4095 		break;
4096 	}
4097 }
4098 
4099 /**
4100  * ice_vsi_update_security - update security block in VSI
4101  * @vsi: pointer to VSI structure
4102  * @fill: function pointer to fill ctx
4103  */
4104 int
4105 ice_vsi_update_security(struct ice_vsi *vsi, void (*fill)(struct ice_vsi_ctx *))
4106 {
4107 	struct ice_vsi_ctx ctx = { 0 };
4108 
4109 	ctx.info = vsi->info;
4110 	ctx.info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_SECURITY_VALID);
4111 	fill(&ctx);
4112 
4113 	if (ice_update_vsi(&vsi->back->hw, vsi->idx, &ctx, NULL))
4114 		return -ENODEV;
4115 
4116 	vsi->info = ctx.info;
4117 	return 0;
4118 }
4119 
4120 /**
4121  * ice_vsi_ctx_set_antispoof - set antispoof function in VSI ctx
4122  * @ctx: pointer to VSI ctx structure
4123  */
4124 void ice_vsi_ctx_set_antispoof(struct ice_vsi_ctx *ctx)
4125 {
4126 	ctx->info.sec_flags |= ICE_AQ_VSI_SEC_FLAG_ENA_MAC_ANTI_SPOOF |
4127 			       (ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA <<
4128 				ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S);
4129 }
4130 
4131 /**
4132  * ice_vsi_ctx_clear_antispoof - clear antispoof function in VSI ctx
4133  * @ctx: pointer to VSI ctx structure
4134  */
4135 void ice_vsi_ctx_clear_antispoof(struct ice_vsi_ctx *ctx)
4136 {
4137 	ctx->info.sec_flags &= ~ICE_AQ_VSI_SEC_FLAG_ENA_MAC_ANTI_SPOOF &
4138 			       ~(ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA <<
4139 				 ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S);
4140 }
4141 
4142 /**
4143  * ice_vsi_ctx_set_allow_override - allow destination override on VSI
4144  * @ctx: pointer to VSI ctx structure
4145  */
4146 void ice_vsi_ctx_set_allow_override(struct ice_vsi_ctx *ctx)
4147 {
4148 	ctx->info.sec_flags |= ICE_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD;
4149 }
4150 
4151 /**
4152  * ice_vsi_ctx_clear_allow_override - turn off destination override on VSI
4153  * @ctx: pointer to VSI ctx structure
4154  */
4155 void ice_vsi_ctx_clear_allow_override(struct ice_vsi_ctx *ctx)
4156 {
4157 	ctx->info.sec_flags &= ~ICE_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD;
4158 }
4159