1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (C) 2022, Intel Corporation. */ 3 4 #ifndef _ICE_DPLL_H_ 5 #define _ICE_DPLL_H_ 6 7 #include "ice.h" 8 9 #define ICE_DPLL_RCLK_NUM_MAX 4 10 11 /** 12 * enum ice_dpll_pin_sw - enumerate ice software pin indices: 13 * @ICE_DPLL_PIN_SW_1_IDX: index of first SW pin 14 * @ICE_DPLL_PIN_SW_2_IDX: index of second SW pin 15 * @ICE_DPLL_PIN_SW_NUM: number of SW pins in pair 16 */ 17 enum ice_dpll_pin_sw { 18 ICE_DPLL_PIN_SW_1_IDX, 19 ICE_DPLL_PIN_SW_2_IDX, 20 ICE_DPLL_PIN_SW_NUM 21 }; 22 23 /** ice_dpll_pin - store info about pins 24 * @pin: dpll pin structure 25 * @pf: pointer to pf, which has registered the dpll_pin 26 * @idx: ice pin private idx 27 * @num_parents: hols number of parent pins 28 * @parent_idx: hold indexes of parent pins 29 * @flags: pin flags returned from HW 30 * @state: state of a pin 31 * @prop: pin properties 32 * @freq: current frequency of a pin 33 * @phase_adjust: current phase adjust value 34 */ 35 struct ice_dpll_pin { 36 struct dpll_pin *pin; 37 struct ice_pf *pf; 38 u8 idx; 39 u8 num_parents; 40 u8 parent_idx[ICE_DPLL_RCLK_NUM_MAX]; 41 u8 flags[ICE_DPLL_RCLK_NUM_MAX]; 42 u8 state[ICE_DPLL_RCLK_NUM_MAX]; 43 struct dpll_pin_properties prop; 44 u32 freq; 45 s32 phase_adjust; 46 struct ice_dpll_pin *input; 47 struct ice_dpll_pin *output; 48 enum dpll_pin_direction direction; 49 u8 status; 50 bool active; 51 bool hidden; 52 }; 53 54 /** ice_dpll - store info required for DPLL control 55 * @dpll: pointer to dpll dev 56 * @pf: pointer to pf, which has registered the dpll_device 57 * @dpll_idx: index of dpll on the NIC 58 * @input_idx: currently selected input index 59 * @prev_input_idx: previously selected input index 60 * @ref_state: state of dpll reference signals 61 * @eec_mode: eec_mode dpll is configured for 62 * @phase_offset: phase offset of active pin vs dpll signal 63 * @prev_phase_offset: previous phase offset of active pin vs dpll signal 64 * @input_prio: priorities of each input 65 * @dpll_state: current dpll sync state 66 * @prev_dpll_state: last dpll sync state 67 * @active_input: pointer to active input pin 68 * @prev_input: pointer to previous active input pin 69 */ 70 struct ice_dpll { 71 struct dpll_device *dpll; 72 struct ice_pf *pf; 73 u8 dpll_idx; 74 u8 input_idx; 75 u8 prev_input_idx; 76 u8 ref_state; 77 u8 eec_mode; 78 s64 phase_offset; 79 s64 prev_phase_offset; 80 u8 *input_prio; 81 enum dpll_lock_status dpll_state; 82 enum dpll_lock_status prev_dpll_state; 83 enum dpll_mode mode; 84 struct dpll_pin *active_input; 85 struct dpll_pin *prev_input; 86 }; 87 88 /** ice_dplls - store info required for CCU (clock controlling unit) 89 * @kworker: periodic worker 90 * @work: periodic work 91 * @lock: locks access to configuration of a dpll 92 * @eec: pointer to EEC dpll dev 93 * @pps: pointer to PPS dpll dev 94 * @inputs: input pins pointer 95 * @outputs: output pins pointer 96 * @rclk: recovered pins pointer 97 * @num_inputs: number of input pins available on dpll 98 * @num_outputs: number of output pins available on dpll 99 * @cgu_state_acq_err_num: number of errors returned during periodic work 100 * @base_rclk_idx: idx of first pin used for clock revocery pins 101 * @clock_id: clock_id of dplls 102 * @input_phase_adj_max: max phase adjust value for an input pins 103 * @output_phase_adj_max: max phase adjust value for an output pins 104 */ 105 struct ice_dplls { 106 struct kthread_worker *kworker; 107 struct kthread_delayed_work work; 108 struct mutex lock; 109 struct ice_dpll eec; 110 struct ice_dpll pps; 111 struct ice_dpll_pin *inputs; 112 struct ice_dpll_pin *outputs; 113 struct ice_dpll_pin sma[ICE_DPLL_PIN_SW_NUM]; 114 struct ice_dpll_pin ufl[ICE_DPLL_PIN_SW_NUM]; 115 struct ice_dpll_pin rclk; 116 u8 num_inputs; 117 u8 num_outputs; 118 u8 sma_data; 119 u8 base_rclk_idx; 120 int cgu_state_acq_err_num; 121 u64 clock_id; 122 s32 input_phase_adj_max; 123 s32 output_phase_adj_max; 124 bool generic; 125 }; 126 127 #if IS_ENABLED(CONFIG_PTP_1588_CLOCK) 128 void ice_dpll_init(struct ice_pf *pf); 129 void ice_dpll_deinit(struct ice_pf *pf); 130 #else 131 static inline void ice_dpll_init(struct ice_pf *pf) { } 132 static inline void ice_dpll_deinit(struct ice_pf *pf) { } 133 #endif 134 135 #endif 136