1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2019, Intel Corporation. */ 3 4 #ifndef _ICE_BASE_H_ 5 #define _ICE_BASE_H_ 6 7 #include "ice.h" 8 9 int ice_vsi_cfg_single_rxq(struct ice_vsi *vsi, u16 q_idx); 10 int ice_vsi_cfg_rxqs(struct ice_vsi *vsi); 11 int __ice_vsi_get_qs(struct ice_qs_cfg *qs_cfg); 12 int 13 ice_vsi_ctrl_one_rx_ring(struct ice_vsi *vsi, bool ena, u16 rxq_idx, bool wait); 14 int ice_vsi_wait_one_rx_ring(struct ice_vsi *vsi, bool ena, u16 rxq_idx); 15 int ice_vsi_alloc_q_vectors(struct ice_vsi *vsi); 16 void ice_vsi_map_rings_to_vectors(struct ice_vsi *vsi); 17 void ice_vsi_free_q_vectors(struct ice_vsi *vsi); 18 int ice_vsi_cfg_single_txq(struct ice_vsi *vsi, struct ice_tx_ring **tx_rings, 19 u16 q_idx); 20 int ice_vsi_cfg_lan_txqs(struct ice_vsi *vsi); 21 int ice_vsi_cfg_xdp_txqs(struct ice_vsi *vsi); 22 void ice_cfg_itr(struct ice_hw *hw, struct ice_q_vector *q_vector); 23 void 24 ice_cfg_txq_interrupt(struct ice_vsi *vsi, u16 txq, u16 msix_idx, u16 itr_idx); 25 void 26 ice_cfg_rxq_interrupt(struct ice_vsi *vsi, u16 rxq, u16 msix_idx, u16 itr_idx); 27 void ice_trigger_sw_intr(struct ice_hw *hw, const struct ice_q_vector *q_vector); 28 int 29 ice_vsi_stop_tx_ring(struct ice_vsi *vsi, enum ice_disq_rst_src rst_src, 30 u16 rel_vmvf_num, struct ice_tx_ring *ring, 31 struct ice_txq_meta *txq_meta); 32 void 33 ice_fill_txq_meta(const struct ice_vsi *vsi, struct ice_tx_ring *ring, 34 struct ice_txq_meta *txq_meta); 35 #endif /* _ICE_BASE_H_ */ 36