1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2018, Intel Corporation. */ 3 4 #ifndef _ICE_H_ 5 #define _ICE_H_ 6 7 #include <linux/types.h> 8 #include <linux/errno.h> 9 #include <linux/kernel.h> 10 #include <linux/module.h> 11 #include <linux/firmware.h> 12 #include <linux/netdevice.h> 13 #include <linux/compiler.h> 14 #include <linux/etherdevice.h> 15 #include <linux/skbuff.h> 16 #include <linux/cpumask.h> 17 #include <linux/rtnetlink.h> 18 #include <linux/if_vlan.h> 19 #include <linux/dma-mapping.h> 20 #include <linux/pci.h> 21 #include <linux/workqueue.h> 22 #include <linux/wait.h> 23 #include <linux/interrupt.h> 24 #include <linux/ethtool.h> 25 #include <linux/timer.h> 26 #include <linux/delay.h> 27 #include <linux/bitmap.h> 28 #include <linux/log2.h> 29 #include <linux/ip.h> 30 #include <linux/sctp.h> 31 #include <linux/ipv6.h> 32 #include <linux/pkt_sched.h> 33 #include <linux/if_bridge.h> 34 #include <linux/ctype.h> 35 #include <linux/linkmode.h> 36 #include <linux/bpf.h> 37 #include <linux/btf.h> 38 #include <linux/auxiliary_bus.h> 39 #include <linux/avf/virtchnl.h> 40 #include <linux/cpu_rmap.h> 41 #include <linux/dim.h> 42 #include <linux/gnss.h> 43 #include <net/pkt_cls.h> 44 #include <net/pkt_sched.h> 45 #include <net/tc_act/tc_mirred.h> 46 #include <net/tc_act/tc_gact.h> 47 #include <net/ip.h> 48 #include <net/devlink.h> 49 #include <net/ipv6.h> 50 #include <net/xdp_sock.h> 51 #include <net/xdp_sock_drv.h> 52 #include <net/geneve.h> 53 #include <net/gre.h> 54 #include <net/udp_tunnel.h> 55 #include <net/vxlan.h> 56 #include <net/gtp.h> 57 #include <linux/ppp_defs.h> 58 #include "ice_devids.h" 59 #include "ice_type.h" 60 #include "ice_txrx.h" 61 #include "ice_dcb.h" 62 #include "ice_switch.h" 63 #include "ice_common.h" 64 #include "ice_flow.h" 65 #include "ice_sched.h" 66 #include "ice_idc_int.h" 67 #include "ice_sriov.h" 68 #include "ice_vf_mbx.h" 69 #include "ice_ptp.h" 70 #include "ice_fdir.h" 71 #include "ice_xsk.h" 72 #include "ice_arfs.h" 73 #include "ice_repr.h" 74 #include "ice_eswitch.h" 75 #include "ice_lag.h" 76 #include "ice_vsi_vlan_ops.h" 77 #include "ice_gnss.h" 78 #include "ice_irq.h" 79 #include "ice_dpll.h" 80 #include "ice_adapter.h" 81 82 #define ICE_BAR0 0 83 #define ICE_REQ_DESC_MULTIPLE 32 84 #define ICE_MIN_NUM_DESC 64 85 #define ICE_MAX_NUM_DESC 8160 86 #define ICE_DFLT_MIN_RX_DESC 512 87 #define ICE_DFLT_NUM_TX_DESC 256 88 #define ICE_DFLT_NUM_RX_DESC 2048 89 90 #define ICE_DFLT_TRAFFIC_CLASS BIT(0) 91 #define ICE_INT_NAME_STR_LEN (IFNAMSIZ + 16) 92 #define ICE_AQ_LEN 192 93 #define ICE_MBXSQ_LEN 64 94 #define ICE_SBQ_LEN 64 95 #define ICE_MIN_LAN_TXRX_MSIX 1 96 #define ICE_MIN_LAN_OICR_MSIX 1 97 #define ICE_MIN_MSIX (ICE_MIN_LAN_TXRX_MSIX + ICE_MIN_LAN_OICR_MSIX) 98 #define ICE_FDIR_MSIX 2 99 #define ICE_RDMA_NUM_AEQ_MSIX 4 100 #define ICE_MIN_RDMA_MSIX 2 101 #define ICE_ESWITCH_MSIX 1 102 #define ICE_NO_VSI 0xffff 103 #define ICE_VSI_MAP_CONTIG 0 104 #define ICE_VSI_MAP_SCATTER 1 105 #define ICE_MAX_SCATTER_TXQS 16 106 #define ICE_MAX_SCATTER_RXQS 16 107 #define ICE_Q_WAIT_RETRY_LIMIT 10 108 #define ICE_Q_WAIT_MAX_RETRY (5 * ICE_Q_WAIT_RETRY_LIMIT) 109 #define ICE_MAX_LG_RSS_QS 256 110 #define ICE_INVAL_Q_INDEX 0xffff 111 112 #define ICE_MAX_RXQS_PER_TC 256 /* Used when setting VSI context per TC Rx queues */ 113 114 #define ICE_CHNL_START_TC 1 115 116 #define ICE_MAX_RESET_WAIT 20 117 118 #define ICE_VSIQF_HKEY_ARRAY_SIZE ((VSIQF_HKEY_MAX_INDEX + 1) * 4) 119 120 #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK) 121 122 #define ICE_MAX_MTU (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD) 123 124 #define ICE_MAX_TSO_SIZE 131072 125 126 #define ICE_UP_TABLE_TRANSLATE(val, i) \ 127 (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \ 128 ICE_AQ_VSI_UP_TABLE_UP##i##_M) 129 130 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i])) 131 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i])) 132 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i])) 133 #define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i])) 134 135 /* Minimum BW limit is 500 Kbps for any scheduler node */ 136 #define ICE_MIN_BW_LIMIT 500 137 /* User can specify BW in either Kbit/Mbit/Gbit and OS converts it in bytes. 138 * use it to convert user specified BW limit into Kbps 139 */ 140 #define ICE_BW_KBPS_DIVISOR 125 141 142 /* Default recipes have priority 4 and below, hence priority values between 5..7 143 * can be used as filter priority for advanced switch filter (advanced switch 144 * filters need new recipe to be created for specified extraction sequence 145 * because default recipe extraction sequence does not represent custom 146 * extraction) 147 */ 148 #define ICE_SWITCH_FLTR_PRIO_QUEUE 7 149 /* prio 6 is reserved for future use (e.g. switch filter with L3 fields + 150 * (Optional: IP TOS/TTL) + L4 fields + (optionally: TCP fields such as 151 * SYN/FIN/RST)) 152 */ 153 #define ICE_SWITCH_FLTR_PRIO_RSVD 6 154 #define ICE_SWITCH_FLTR_PRIO_VSI 5 155 #define ICE_SWITCH_FLTR_PRIO_QGRP ICE_SWITCH_FLTR_PRIO_VSI 156 157 /* Macro for each VSI in a PF */ 158 #define ice_for_each_vsi(pf, i) \ 159 for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++) 160 161 /* Macros for each Tx/Xdp/Rx ring in a VSI */ 162 #define ice_for_each_txq(vsi, i) \ 163 for ((i) = 0; (i) < (vsi)->num_txq; (i)++) 164 165 #define ice_for_each_xdp_txq(vsi, i) \ 166 for ((i) = 0; (i) < (vsi)->num_xdp_txq; (i)++) 167 168 #define ice_for_each_rxq(vsi, i) \ 169 for ((i) = 0; (i) < (vsi)->num_rxq; (i)++) 170 171 /* Macros for each allocated Tx/Rx ring whether used or not in a VSI */ 172 #define ice_for_each_alloc_txq(vsi, i) \ 173 for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++) 174 175 #define ice_for_each_alloc_rxq(vsi, i) \ 176 for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++) 177 178 #define ice_for_each_q_vector(vsi, i) \ 179 for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++) 180 181 #define ice_for_each_chnl_tc(i) \ 182 for ((i) = ICE_CHNL_START_TC; (i) < ICE_CHNL_MAX_TC; (i)++) 183 184 #define ICE_UCAST_PROMISC_BITS (ICE_PROMISC_UCAST_TX | ICE_PROMISC_UCAST_RX) 185 186 #define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_TX | \ 187 ICE_PROMISC_UCAST_RX | \ 188 ICE_PROMISC_VLAN_TX | \ 189 ICE_PROMISC_VLAN_RX) 190 191 #define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX) 192 193 #define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \ 194 ICE_PROMISC_MCAST_RX | \ 195 ICE_PROMISC_VLAN_TX | \ 196 ICE_PROMISC_VLAN_RX) 197 198 #define ice_pf_to_dev(pf) (&((pf)->pdev->dev)) 199 200 #define ice_pf_src_tmr_owned(pf) ((pf)->hw.func_caps.ts_func_info.src_tmr_owned) 201 202 enum ice_feature { 203 ICE_F_DSCP, 204 ICE_F_PHY_RCLK, 205 ICE_F_SMA_CTRL, 206 ICE_F_CGU, 207 ICE_F_GNSS, 208 ICE_F_ROCE_LAG, 209 ICE_F_SRIOV_LAG, 210 ICE_F_MAX 211 }; 212 213 DECLARE_STATIC_KEY_FALSE(ice_xdp_locking_key); 214 215 struct ice_channel { 216 struct list_head list; 217 u8 type; 218 u16 sw_id; 219 u16 base_q; 220 u16 num_rxq; 221 u16 num_txq; 222 u16 vsi_num; 223 u8 ena_tc; 224 struct ice_aqc_vsi_props info; 225 u64 max_tx_rate; 226 u64 min_tx_rate; 227 atomic_t num_sb_fltr; 228 struct ice_vsi *ch_vsi; 229 }; 230 231 struct ice_txq_meta { 232 u32 q_teid; /* Tx-scheduler element identifier */ 233 u16 q_id; /* Entry in VSI's txq_map bitmap */ 234 u16 q_handle; /* Relative index of Tx queue within TC */ 235 u16 vsi_idx; /* VSI index that Tx queue belongs to */ 236 u8 tc; /* TC number that Tx queue belongs to */ 237 }; 238 239 struct ice_tc_info { 240 u16 qoffset; 241 u16 qcount_tx; 242 u16 qcount_rx; 243 u8 netdev_tc; 244 }; 245 246 struct ice_tc_cfg { 247 u8 numtc; /* Total number of enabled TCs */ 248 u16 ena_tc; /* Tx map */ 249 struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS]; 250 }; 251 252 struct ice_qs_cfg { 253 struct mutex *qs_mutex; /* will be assigned to &pf->avail_q_mutex */ 254 unsigned long *pf_map; 255 unsigned long pf_map_size; 256 unsigned int q_count; 257 unsigned int scatter_count; 258 u16 *vsi_map; 259 u16 vsi_map_offset; 260 u8 mapping_mode; 261 }; 262 263 struct ice_sw { 264 struct ice_pf *pf; 265 u16 sw_id; /* switch ID for this switch */ 266 u16 bridge_mode; /* VEB/VEPA/Port Virtualizer */ 267 }; 268 269 enum ice_pf_state { 270 ICE_TESTING, 271 ICE_DOWN, 272 ICE_NEEDS_RESTART, 273 ICE_PREPARED_FOR_RESET, /* set by driver when prepared */ 274 ICE_RESET_OICR_RECV, /* set by driver after rcv reset OICR */ 275 ICE_PFR_REQ, /* set by driver */ 276 ICE_CORER_REQ, /* set by driver */ 277 ICE_GLOBR_REQ, /* set by driver */ 278 ICE_CORER_RECV, /* set by OICR handler */ 279 ICE_GLOBR_RECV, /* set by OICR handler */ 280 ICE_EMPR_RECV, /* set by OICR handler */ 281 ICE_SUSPENDED, /* set on module remove path */ 282 ICE_RESET_FAILED, /* set by reset/rebuild */ 283 /* When checking for the PF to be in a nominal operating state, the 284 * bits that are grouped at the beginning of the list need to be 285 * checked. Bits occurring before ICE_STATE_NOMINAL_CHECK_BITS will 286 * be checked. If you need to add a bit into consideration for nominal 287 * operating state, it must be added before 288 * ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position 289 * without appropriate consideration. 290 */ 291 ICE_STATE_NOMINAL_CHECK_BITS, 292 ICE_ADMINQ_EVENT_PENDING, 293 ICE_MAILBOXQ_EVENT_PENDING, 294 ICE_SIDEBANDQ_EVENT_PENDING, 295 ICE_MDD_EVENT_PENDING, 296 ICE_VFLR_EVENT_PENDING, 297 ICE_FLTR_OVERFLOW_PROMISC, 298 ICE_VF_DIS, 299 ICE_CFG_BUSY, 300 ICE_SERVICE_SCHED, 301 ICE_SERVICE_DIS, 302 ICE_FD_FLUSH_REQ, 303 ICE_OICR_INTR_DIS, /* Global OICR interrupt disabled */ 304 ICE_MDD_VF_PRINT_PENDING, /* set when MDD event handle */ 305 ICE_VF_RESETS_DISABLED, /* disable resets during ice_remove */ 306 ICE_LINK_DEFAULT_OVERRIDE_PENDING, 307 ICE_PHY_INIT_COMPLETE, 308 ICE_FD_VF_FLUSH_CTX, /* set at FD Rx IRQ or timeout */ 309 ICE_AUX_ERR_PENDING, 310 ICE_STATE_NBITS /* must be last */ 311 }; 312 313 enum ice_vsi_state { 314 ICE_VSI_DOWN, 315 ICE_VSI_NEEDS_RESTART, 316 ICE_VSI_NETDEV_ALLOCD, 317 ICE_VSI_NETDEV_REGISTERED, 318 ICE_VSI_UMAC_FLTR_CHANGED, 319 ICE_VSI_MMAC_FLTR_CHANGED, 320 ICE_VSI_PROMISC_CHANGED, 321 ICE_VSI_STATE_NBITS /* must be last */ 322 }; 323 324 struct ice_vsi_stats { 325 struct ice_ring_stats **tx_ring_stats; /* Tx ring stats array */ 326 struct ice_ring_stats **rx_ring_stats; /* Rx ring stats array */ 327 }; 328 329 /* struct that defines a VSI, associated with a dev */ 330 struct ice_vsi { 331 struct net_device *netdev; 332 struct ice_sw *vsw; /* switch this VSI is on */ 333 struct ice_pf *back; /* back pointer to PF */ 334 struct ice_rx_ring **rx_rings; /* Rx ring array */ 335 struct ice_tx_ring **tx_rings; /* Tx ring array */ 336 struct ice_q_vector **q_vectors; /* q_vector array */ 337 338 irqreturn_t (*irq_handler)(int irq, void *data); 339 340 u64 tx_linearize; 341 DECLARE_BITMAP(state, ICE_VSI_STATE_NBITS); 342 unsigned int current_netdev_flags; 343 u32 tx_restart; 344 u32 tx_busy; 345 u32 rx_buf_failed; 346 u32 rx_page_failed; 347 u16 num_q_vectors; 348 /* tell if only dynamic irq allocation is allowed */ 349 bool irq_dyn_alloc; 350 351 u16 vsi_num; /* HW (absolute) index of this VSI */ 352 u16 idx; /* software index in pf->vsi[] */ 353 354 u16 num_gfltr; 355 u16 num_bfltr; 356 357 /* RSS config */ 358 u16 rss_table_size; /* HW RSS table size */ 359 u16 rss_size; /* Allocated RSS queues */ 360 u8 rss_hfunc; /* User configured hash type */ 361 u8 *rss_hkey_user; /* User configured hash keys */ 362 u8 *rss_lut_user; /* User configured lookup table entries */ 363 u8 rss_lut_type; /* used to configure Get/Set RSS LUT AQ call */ 364 365 /* aRFS members only allocated for the PF VSI */ 366 #define ICE_MAX_ARFS_LIST 1024 367 #define ICE_ARFS_LST_MASK (ICE_MAX_ARFS_LIST - 1) 368 struct hlist_head *arfs_fltr_list; 369 struct ice_arfs_active_fltr_cntrs *arfs_fltr_cntrs; 370 spinlock_t arfs_lock; /* protects aRFS hash table and filter state */ 371 atomic_t *arfs_last_fltr_id; 372 373 u16 max_frame; 374 u16 rx_buf_len; 375 376 struct ice_aqc_vsi_props info; /* VSI properties */ 377 struct ice_vsi_vlan_info vlan_info; /* vlan config to be restored */ 378 379 /* VSI stats */ 380 struct rtnl_link_stats64 net_stats; 381 struct rtnl_link_stats64 net_stats_prev; 382 struct ice_eth_stats eth_stats; 383 struct ice_eth_stats eth_stats_prev; 384 385 struct list_head tmp_sync_list; /* MAC filters to be synced */ 386 struct list_head tmp_unsync_list; /* MAC filters to be unsynced */ 387 388 u8 irqs_ready:1; 389 u8 current_isup:1; /* Sync 'link up' logging */ 390 u8 stat_offsets_loaded:1; 391 struct ice_vsi_vlan_ops inner_vlan_ops; 392 struct ice_vsi_vlan_ops outer_vlan_ops; 393 u16 num_vlan; 394 395 /* queue information */ 396 u8 tx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 397 u8 rx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 398 u16 *txq_map; /* index in pf->avail_txqs */ 399 u16 *rxq_map; /* index in pf->avail_rxqs */ 400 u16 alloc_txq; /* Allocated Tx queues */ 401 u16 num_txq; /* Used Tx queues */ 402 u16 alloc_rxq; /* Allocated Rx queues */ 403 u16 num_rxq; /* Used Rx queues */ 404 u16 req_txq; /* User requested Tx queues */ 405 u16 req_rxq; /* User requested Rx queues */ 406 u16 num_rx_desc; 407 u16 num_tx_desc; 408 u16 qset_handle[ICE_MAX_TRAFFIC_CLASS]; 409 struct ice_tc_cfg tc_cfg; 410 struct bpf_prog *xdp_prog; 411 struct ice_tx_ring **xdp_rings; /* XDP ring array */ 412 unsigned long *af_xdp_zc_qps; /* tracks AF_XDP ZC enabled qps */ 413 u16 num_xdp_txq; /* Used XDP queues */ 414 u8 xdp_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 415 416 struct net_device **target_netdevs; 417 418 struct tc_mqprio_qopt_offload mqprio_qopt; /* queue parameters */ 419 420 /* Channel Specific Fields */ 421 struct ice_vsi *tc_map_vsi[ICE_CHNL_MAX_TC]; 422 u16 cnt_q_avail; 423 u16 next_base_q; /* next queue to be used for channel setup */ 424 struct list_head ch_list; 425 u16 num_chnl_rxq; 426 u16 num_chnl_txq; 427 u16 ch_rss_size; 428 u16 num_chnl_fltr; 429 /* store away rss size info before configuring ADQ channels so that, 430 * it can be used after tc-qdisc delete, to get back RSS setting as 431 * they were before 432 */ 433 u16 orig_rss_size; 434 /* this keeps tracks of all enabled TC with and without DCB 435 * and inclusive of ADQ, vsi->mqprio_opt keeps track of queue 436 * information 437 */ 438 u8 all_numtc; 439 u16 all_enatc; 440 441 /* store away TC info, to be used for rebuild logic */ 442 u8 old_numtc; 443 u16 old_ena_tc; 444 445 /* setup back reference, to which aggregator node this VSI 446 * corresponds to 447 */ 448 struct ice_agg_node *agg_node; 449 450 struct_group_tagged(ice_vsi_cfg_params, params, 451 struct ice_port_info *port_info; /* back pointer to port_info */ 452 struct ice_channel *ch; /* VSI's channel structure, may be NULL */ 453 struct ice_vf *vf; /* VF associated with this VSI, may be NULL */ 454 u32 flags; /* VSI flags used for rebuild and configuration */ 455 enum ice_vsi_type type; /* the type of the VSI */ 456 ); 457 } ____cacheline_internodealigned_in_smp; 458 459 /* struct that defines an interrupt vector */ 460 struct ice_q_vector { 461 struct ice_vsi *vsi; 462 463 u16 v_idx; /* index in the vsi->q_vector array. */ 464 u16 reg_idx; /* PF relative register index */ 465 u8 num_ring_rx; /* total number of Rx rings in vector */ 466 u8 num_ring_tx; /* total number of Tx rings in vector */ 467 u8 wb_on_itr:1; /* if true, WB on ITR is enabled */ 468 /* in usecs, need to use ice_intrl_to_usecs_reg() before writing this 469 * value to the device 470 */ 471 u8 intrl; 472 473 struct napi_struct napi; 474 475 struct ice_ring_container rx; 476 struct ice_ring_container tx; 477 478 cpumask_t affinity_mask; 479 struct irq_affinity_notify affinity_notify; 480 481 struct ice_channel *ch; 482 483 char name[ICE_INT_NAME_STR_LEN]; 484 485 u16 total_events; /* net_dim(): number of interrupts processed */ 486 u16 vf_reg_idx; /* VF relative register index */ 487 struct msi_map irq; 488 } ____cacheline_internodealigned_in_smp; 489 490 enum ice_pf_flags { 491 ICE_FLAG_FLTR_SYNC, 492 ICE_FLAG_RDMA_ENA, 493 ICE_FLAG_RSS_ENA, 494 ICE_FLAG_SRIOV_ENA, 495 ICE_FLAG_SRIOV_CAPABLE, 496 ICE_FLAG_DCB_CAPABLE, 497 ICE_FLAG_DCB_ENA, 498 ICE_FLAG_FD_ENA, 499 ICE_FLAG_PTP_SUPPORTED, /* PTP is supported by NVM */ 500 ICE_FLAG_ADV_FEATURES, 501 ICE_FLAG_TC_MQPRIO, /* support for Multi queue TC */ 502 ICE_FLAG_CLS_FLOWER, 503 ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA, 504 ICE_FLAG_TOTAL_PORT_SHUTDOWN_ENA, 505 ICE_FLAG_NO_MEDIA, 506 ICE_FLAG_FW_LLDP_AGENT, 507 ICE_FLAG_MOD_POWER_UNSUPPORTED, 508 ICE_FLAG_PHY_FW_LOAD_FAILED, 509 ICE_FLAG_ETHTOOL_CTXT, /* set when ethtool holds RTNL lock */ 510 ICE_FLAG_LEGACY_RX, 511 ICE_FLAG_VF_TRUE_PROMISC_ENA, 512 ICE_FLAG_MDD_AUTO_RESET_VF, 513 ICE_FLAG_VF_VLAN_PRUNING, 514 ICE_FLAG_LINK_LENIENT_MODE_ENA, 515 ICE_FLAG_PLUG_AUX_DEV, 516 ICE_FLAG_UNPLUG_AUX_DEV, 517 ICE_FLAG_MTU_CHANGED, 518 ICE_FLAG_GNSS, /* GNSS successfully initialized */ 519 ICE_FLAG_DPLL, /* SyncE/PTP dplls initialized */ 520 ICE_PF_FLAGS_NBITS /* must be last */ 521 }; 522 523 enum ice_misc_thread_tasks { 524 ICE_MISC_THREAD_TX_TSTAMP, 525 ICE_MISC_THREAD_NBITS /* must be last */ 526 }; 527 528 struct ice_eswitch { 529 struct ice_vsi *uplink_vsi; 530 struct ice_esw_br_offloads *br_offloads; 531 struct xarray reprs; 532 bool is_running; 533 }; 534 535 struct ice_agg_node { 536 u32 agg_id; 537 #define ICE_MAX_VSIS_IN_AGG_NODE 64 538 u32 num_vsis; 539 u8 valid; 540 }; 541 542 struct ice_pf { 543 struct pci_dev *pdev; 544 struct ice_adapter *adapter; 545 546 struct devlink_region *nvm_region; 547 struct devlink_region *sram_region; 548 struct devlink_region *devcaps_region; 549 550 /* devlink port data */ 551 struct devlink_port devlink_port; 552 553 /* OS reserved IRQ details */ 554 struct msix_entry *msix_entries; 555 struct ice_irq_tracker irq_tracker; 556 /* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the 557 * number of MSIX vectors needed for all SR-IOV VFs from the number of 558 * MSIX vectors allowed on this PF. 559 */ 560 u16 sriov_base_vector; 561 unsigned long *sriov_irq_bm; /* bitmap to track irq usage */ 562 u16 sriov_irq_size; /* size of the irq_bm bitmap */ 563 564 u16 ctrl_vsi_idx; /* control VSI index in pf->vsi array */ 565 566 struct ice_vsi **vsi; /* VSIs created by the driver */ 567 struct ice_vsi_stats **vsi_stats; 568 struct ice_sw *first_sw; /* first switch created by firmware */ 569 u16 eswitch_mode; /* current mode of eswitch */ 570 struct dentry *ice_debugfs_pf; 571 struct dentry *ice_debugfs_pf_fwlog; 572 /* keep track of all the dentrys for FW log modules */ 573 struct dentry **ice_debugfs_pf_fwlog_modules; 574 struct ice_vfs vfs; 575 DECLARE_BITMAP(features, ICE_F_MAX); 576 DECLARE_BITMAP(state, ICE_STATE_NBITS); 577 DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS); 578 DECLARE_BITMAP(misc_thread, ICE_MISC_THREAD_NBITS); 579 unsigned long *avail_txqs; /* bitmap to track PF Tx queue usage */ 580 unsigned long *avail_rxqs; /* bitmap to track PF Rx queue usage */ 581 unsigned long serv_tmr_period; 582 unsigned long serv_tmr_prev; 583 struct timer_list serv_tmr; 584 struct work_struct serv_task; 585 struct mutex avail_q_mutex; /* protects access to avail_[rx|tx]qs */ 586 struct mutex sw_mutex; /* lock for protecting VSI alloc flow */ 587 struct mutex tc_mutex; /* lock to protect TC changes */ 588 struct mutex adev_mutex; /* lock to protect aux device access */ 589 struct mutex lag_mutex; /* protect ice_lag struct in PF */ 590 u32 msg_enable; 591 struct ice_ptp ptp; 592 struct gnss_serial *gnss_serial; 593 struct gnss_device *gnss_dev; 594 u16 num_rdma_msix; /* Total MSIX vectors for RDMA driver */ 595 u16 rdma_base_vector; 596 597 /* spinlock to protect the AdminQ wait list */ 598 spinlock_t aq_wait_lock; 599 struct hlist_head aq_wait_list; 600 wait_queue_head_t aq_wait_queue; 601 bool fw_emp_reset_disabled; 602 603 wait_queue_head_t reset_wait_queue; 604 605 u32 hw_csum_rx_error; 606 u32 hw_rx_eipe_error; 607 u32 oicr_err_reg; 608 struct msi_map oicr_irq; /* Other interrupt cause MSIX vector */ 609 struct msi_map ll_ts_irq; /* LL_TS interrupt MSIX vector */ 610 u16 max_pf_txqs; /* Total Tx queues PF wide */ 611 u16 max_pf_rxqs; /* Total Rx queues PF wide */ 612 u16 num_lan_msix; /* Total MSIX vectors for base driver */ 613 u16 num_lan_tx; /* num LAN Tx queues setup */ 614 u16 num_lan_rx; /* num LAN Rx queues setup */ 615 u16 next_vsi; /* Next free slot in pf->vsi[] - 0-based! */ 616 u16 num_alloc_vsi; 617 u16 corer_count; /* Core reset count */ 618 u16 globr_count; /* Global reset count */ 619 u16 empr_count; /* EMP reset count */ 620 u16 pfr_count; /* PF reset count */ 621 622 u8 wol_ena : 1; /* software state of WoL */ 623 u32 wakeup_reason; /* last wakeup reason */ 624 struct ice_hw_port_stats stats; 625 struct ice_hw_port_stats stats_prev; 626 struct ice_hw hw; 627 u8 stat_prev_loaded:1; /* has previous stats been loaded */ 628 u8 rdma_mode; 629 u16 dcbx_cap; 630 u32 tx_timeout_count; 631 unsigned long tx_timeout_last_recovery; 632 u32 tx_timeout_recovery_level; 633 char int_name[ICE_INT_NAME_STR_LEN]; 634 char int_name_ll_ts[ICE_INT_NAME_STR_LEN]; 635 struct auxiliary_device *adev; 636 int aux_idx; 637 u32 sw_int_count; 638 /* count of tc_flower filters specific to channel (aka where filter 639 * action is "hw_tc <tc_num>") 640 */ 641 u16 num_dmac_chnl_fltrs; 642 struct hlist_head tc_flower_fltr_list; 643 644 u64 supported_rxdids; 645 646 __le64 nvm_phy_type_lo; /* NVM PHY type low */ 647 __le64 nvm_phy_type_hi; /* NVM PHY type high */ 648 struct ice_link_default_override_tlv link_dflt_override; 649 struct ice_lag *lag; /* Link Aggregation information */ 650 651 struct ice_eswitch eswitch; 652 struct ice_esw_br_port *br_port; 653 654 #define ICE_INVALID_AGG_NODE_ID 0 655 #define ICE_PF_AGG_NODE_ID_START 1 656 #define ICE_MAX_PF_AGG_NODES 32 657 struct ice_agg_node pf_agg_node[ICE_MAX_PF_AGG_NODES]; 658 #define ICE_VF_AGG_NODE_ID_START 65 659 #define ICE_MAX_VF_AGG_NODES 32 660 struct ice_agg_node vf_agg_node[ICE_MAX_VF_AGG_NODES]; 661 struct ice_dplls dplls; 662 struct device *hwmon_dev; 663 }; 664 665 extern struct workqueue_struct *ice_lag_wq; 666 667 struct ice_netdev_priv { 668 struct ice_vsi *vsi; 669 struct ice_repr *repr; 670 /* indirect block callbacks on registered higher level devices 671 * (e.g. tunnel devices) 672 * 673 * tc_indr_block_cb_priv_list is used to look up indirect callback 674 * private data 675 */ 676 struct list_head tc_indr_block_priv_list; 677 }; 678 679 /** 680 * ice_vector_ch_enabled 681 * @qv: pointer to q_vector, can be NULL 682 * 683 * This function returns true if vector is channel enabled otherwise false 684 */ 685 static inline bool ice_vector_ch_enabled(struct ice_q_vector *qv) 686 { 687 return !!qv->ch; /* Enable it to run with TC */ 688 } 689 690 /** 691 * ice_ptp_pf_handles_tx_interrupt - Check if PF handles Tx interrupt 692 * @pf: Board private structure 693 * 694 * Return true if this PF should respond to the Tx timestamp interrupt 695 * indication in the miscellaneous OICR interrupt handler. 696 */ 697 static inline bool ice_ptp_pf_handles_tx_interrupt(struct ice_pf *pf) 698 { 699 return pf->ptp.tx_interrupt_mode != ICE_PTP_TX_INTERRUPT_NONE; 700 } 701 702 /** 703 * ice_irq_dynamic_ena - Enable default interrupt generation settings 704 * @hw: pointer to HW struct 705 * @vsi: pointer to VSI struct, can be NULL 706 * @q_vector: pointer to q_vector, can be NULL 707 */ 708 static inline void 709 ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi, 710 struct ice_q_vector *q_vector) 711 { 712 u32 vector = (vsi && q_vector) ? q_vector->reg_idx : 713 ((struct ice_pf *)hw->back)->oicr_irq.index; 714 int itr = ICE_ITR_NONE; 715 u32 val; 716 717 /* clear the PBA here, as this function is meant to clean out all 718 * previous interrupts and enable the interrupt 719 */ 720 val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M | 721 (itr << GLINT_DYN_CTL_ITR_INDX_S); 722 if (vsi) 723 if (test_bit(ICE_VSI_DOWN, vsi->state)) 724 return; 725 wr32(hw, GLINT_DYN_CTL(vector), val); 726 } 727 728 /** 729 * ice_netdev_to_pf - Retrieve the PF struct associated with a netdev 730 * @netdev: pointer to the netdev struct 731 */ 732 static inline struct ice_pf *ice_netdev_to_pf(struct net_device *netdev) 733 { 734 struct ice_netdev_priv *np = netdev_priv(netdev); 735 736 return np->vsi->back; 737 } 738 739 static inline bool ice_is_xdp_ena_vsi(struct ice_vsi *vsi) 740 { 741 return !!READ_ONCE(vsi->xdp_prog); 742 } 743 744 static inline void ice_set_ring_xdp(struct ice_tx_ring *ring) 745 { 746 ring->flags |= ICE_TX_FLAGS_RING_XDP; 747 } 748 749 /** 750 * ice_xsk_pool - get XSK buffer pool bound to a ring 751 * @ring: Rx ring to use 752 * 753 * Returns a pointer to xsk_buff_pool structure if there is a buffer pool 754 * present, NULL otherwise. 755 */ 756 static inline struct xsk_buff_pool *ice_xsk_pool(struct ice_rx_ring *ring) 757 { 758 struct ice_vsi *vsi = ring->vsi; 759 u16 qid = ring->q_index; 760 761 if (!ice_is_xdp_ena_vsi(vsi) || !test_bit(qid, vsi->af_xdp_zc_qps)) 762 return NULL; 763 764 return xsk_get_pool_from_qid(vsi->netdev, qid); 765 } 766 767 /** 768 * ice_tx_xsk_pool - assign XSK buff pool to XDP ring 769 * @vsi: pointer to VSI 770 * @qid: index of a queue to look at XSK buff pool presence 771 * 772 * Sets XSK buff pool pointer on XDP ring. 773 * 774 * XDP ring is picked from Rx ring, whereas Rx ring is picked based on provided 775 * queue id. Reason for doing so is that queue vectors might have assigned more 776 * than one XDP ring, e.g. when user reduced the queue count on netdev; Rx ring 777 * carries a pointer to one of these XDP rings for its own purposes, such as 778 * handling XDP_TX action, therefore we can piggyback here on the 779 * rx_ring->xdp_ring assignment that was done during XDP rings initialization. 780 */ 781 static inline void ice_tx_xsk_pool(struct ice_vsi *vsi, u16 qid) 782 { 783 struct ice_tx_ring *ring; 784 785 ring = vsi->rx_rings[qid]->xdp_ring; 786 if (!ring) 787 return; 788 789 if (!ice_is_xdp_ena_vsi(vsi) || !test_bit(qid, vsi->af_xdp_zc_qps)) { 790 ring->xsk_pool = NULL; 791 return; 792 } 793 794 ring->xsk_pool = xsk_get_pool_from_qid(vsi->netdev, qid); 795 } 796 797 /** 798 * ice_get_main_vsi - Get the PF VSI 799 * @pf: PF instance 800 * 801 * returns pf->vsi[0], which by definition is the PF VSI 802 */ 803 static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf) 804 { 805 if (pf->vsi) 806 return pf->vsi[0]; 807 808 return NULL; 809 } 810 811 /** 812 * ice_get_netdev_priv_vsi - return VSI associated with netdev priv. 813 * @np: private netdev structure 814 */ 815 static inline struct ice_vsi *ice_get_netdev_priv_vsi(struct ice_netdev_priv *np) 816 { 817 /* In case of port representor return source port VSI. */ 818 if (np->repr) 819 return np->repr->src_vsi; 820 else 821 return np->vsi; 822 } 823 824 /** 825 * ice_get_ctrl_vsi - Get the control VSI 826 * @pf: PF instance 827 */ 828 static inline struct ice_vsi *ice_get_ctrl_vsi(struct ice_pf *pf) 829 { 830 /* if pf->ctrl_vsi_idx is ICE_NO_VSI, control VSI was not set up */ 831 if (!pf->vsi || pf->ctrl_vsi_idx == ICE_NO_VSI) 832 return NULL; 833 834 return pf->vsi[pf->ctrl_vsi_idx]; 835 } 836 837 /** 838 * ice_find_vsi - Find the VSI from VSI ID 839 * @pf: The PF pointer to search in 840 * @vsi_num: The VSI ID to search for 841 */ 842 static inline struct ice_vsi *ice_find_vsi(struct ice_pf *pf, u16 vsi_num) 843 { 844 int i; 845 846 ice_for_each_vsi(pf, i) 847 if (pf->vsi[i] && pf->vsi[i]->vsi_num == vsi_num) 848 return pf->vsi[i]; 849 return NULL; 850 } 851 852 /** 853 * ice_is_switchdev_running - check if switchdev is configured 854 * @pf: pointer to PF structure 855 * 856 * Returns true if eswitch mode is set to DEVLINK_ESWITCH_MODE_SWITCHDEV 857 * and switchdev is configured, false otherwise. 858 */ 859 static inline bool ice_is_switchdev_running(struct ice_pf *pf) 860 { 861 return pf->eswitch.is_running; 862 } 863 864 #define ICE_FD_STAT_CTR_BLOCK_COUNT 256 865 #define ICE_FD_STAT_PF_IDX(base_idx) \ 866 ((base_idx) * ICE_FD_STAT_CTR_BLOCK_COUNT) 867 #define ICE_FD_SB_STAT_IDX(base_idx) ICE_FD_STAT_PF_IDX(base_idx) 868 #define ICE_FD_STAT_CH 1 869 #define ICE_FD_CH_STAT_IDX(base_idx) \ 870 (ICE_FD_STAT_PF_IDX(base_idx) + ICE_FD_STAT_CH) 871 872 /** 873 * ice_is_adq_active - any active ADQs 874 * @pf: pointer to PF 875 * 876 * This function returns true if there are any ADQs configured (which is 877 * determined by looking at VSI type (which should be VSI_PF), numtc, and 878 * TC_MQPRIO flag) otherwise return false 879 */ 880 static inline bool ice_is_adq_active(struct ice_pf *pf) 881 { 882 struct ice_vsi *vsi; 883 884 vsi = ice_get_main_vsi(pf); 885 if (!vsi) 886 return false; 887 888 /* is ADQ configured */ 889 if (vsi->tc_cfg.numtc > ICE_CHNL_START_TC && 890 test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) 891 return true; 892 893 return false; 894 } 895 896 void ice_debugfs_fwlog_init(struct ice_pf *pf); 897 void ice_debugfs_pf_deinit(struct ice_pf *pf); 898 void ice_debugfs_init(void); 899 void ice_debugfs_exit(void); 900 void ice_pf_fwlog_update_module(struct ice_pf *pf, int log_level, int module); 901 902 bool netif_is_ice(const struct net_device *dev); 903 int ice_vsi_setup_tx_rings(struct ice_vsi *vsi); 904 int ice_vsi_setup_rx_rings(struct ice_vsi *vsi); 905 int ice_vsi_open_ctrl(struct ice_vsi *vsi); 906 int ice_vsi_open(struct ice_vsi *vsi); 907 void ice_set_ethtool_ops(struct net_device *netdev); 908 void ice_set_ethtool_repr_ops(struct net_device *netdev); 909 void ice_set_ethtool_safe_mode_ops(struct net_device *netdev); 910 u16 ice_get_avail_txq_count(struct ice_pf *pf); 911 u16 ice_get_avail_rxq_count(struct ice_pf *pf); 912 int ice_vsi_recfg_qs(struct ice_vsi *vsi, int new_rx, int new_tx, bool locked); 913 void ice_update_vsi_stats(struct ice_vsi *vsi); 914 void ice_update_pf_stats(struct ice_pf *pf); 915 void 916 ice_fetch_u64_stats_per_ring(struct u64_stats_sync *syncp, 917 struct ice_q_stats stats, u64 *pkts, u64 *bytes); 918 int ice_up(struct ice_vsi *vsi); 919 int ice_down(struct ice_vsi *vsi); 920 int ice_down_up(struct ice_vsi *vsi); 921 int ice_vsi_cfg_lan(struct ice_vsi *vsi); 922 struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi); 923 int ice_vsi_determine_xdp_res(struct ice_vsi *vsi); 924 int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog); 925 int ice_destroy_xdp_rings(struct ice_vsi *vsi); 926 int 927 ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames, 928 u32 flags); 929 int ice_set_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size); 930 int ice_get_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size); 931 int ice_set_rss_key(struct ice_vsi *vsi, u8 *seed); 932 int ice_get_rss_key(struct ice_vsi *vsi, u8 *seed); 933 int ice_set_rss_hfunc(struct ice_vsi *vsi, u8 hfunc); 934 void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size); 935 int ice_schedule_reset(struct ice_pf *pf, enum ice_reset_req reset); 936 void ice_print_link_msg(struct ice_vsi *vsi, bool isup); 937 int ice_plug_aux_dev(struct ice_pf *pf); 938 void ice_unplug_aux_dev(struct ice_pf *pf); 939 int ice_init_rdma(struct ice_pf *pf); 940 void ice_deinit_rdma(struct ice_pf *pf); 941 const char *ice_aq_str(enum ice_aq_err aq_err); 942 bool ice_is_wol_supported(struct ice_hw *hw); 943 void ice_fdir_del_all_fltrs(struct ice_vsi *vsi); 944 int 945 ice_fdir_write_fltr(struct ice_pf *pf, struct ice_fdir_fltr *input, bool add, 946 bool is_tun); 947 void ice_vsi_manage_fdir(struct ice_vsi *vsi, bool ena); 948 int ice_add_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd); 949 int ice_del_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd); 950 int ice_get_ethtool_fdir_entry(struct ice_hw *hw, struct ethtool_rxnfc *cmd); 951 int 952 ice_get_fdir_fltr_ids(struct ice_hw *hw, struct ethtool_rxnfc *cmd, 953 u32 *rule_locs); 954 void ice_fdir_rem_adq_chnl(struct ice_hw *hw, u16 vsi_idx); 955 void ice_fdir_release_flows(struct ice_hw *hw); 956 void ice_fdir_replay_flows(struct ice_hw *hw); 957 void ice_fdir_replay_fltrs(struct ice_pf *pf); 958 int ice_fdir_create_dflt_rules(struct ice_pf *pf); 959 960 enum ice_aq_task_state { 961 ICE_AQ_TASK_NOT_PREPARED, 962 ICE_AQ_TASK_WAITING, 963 ICE_AQ_TASK_COMPLETE, 964 ICE_AQ_TASK_CANCELED, 965 }; 966 967 struct ice_aq_task { 968 struct hlist_node entry; 969 struct ice_rq_event_info event; 970 enum ice_aq_task_state state; 971 u16 opcode; 972 }; 973 974 void ice_aq_prep_for_event(struct ice_pf *pf, struct ice_aq_task *task, 975 u16 opcode); 976 int ice_aq_wait_for_event(struct ice_pf *pf, struct ice_aq_task *task, 977 unsigned long timeout); 978 int ice_open(struct net_device *netdev); 979 int ice_open_internal(struct net_device *netdev); 980 int ice_stop(struct net_device *netdev); 981 void ice_service_task_schedule(struct ice_pf *pf); 982 int ice_load(struct ice_pf *pf); 983 void ice_unload(struct ice_pf *pf); 984 void ice_adv_lnk_speed_maps_init(void); 985 int ice_init_dev(struct ice_pf *pf); 986 void ice_deinit_dev(struct ice_pf *pf); 987 988 /** 989 * ice_set_rdma_cap - enable RDMA support 990 * @pf: PF struct 991 */ 992 static inline void ice_set_rdma_cap(struct ice_pf *pf) 993 { 994 if (pf->hw.func_caps.common_cap.rdma && pf->num_rdma_msix) { 995 set_bit(ICE_FLAG_RDMA_ENA, pf->flags); 996 set_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags); 997 } 998 } 999 1000 /** 1001 * ice_clear_rdma_cap - disable RDMA support 1002 * @pf: PF struct 1003 */ 1004 static inline void ice_clear_rdma_cap(struct ice_pf *pf) 1005 { 1006 /* defer unplug to service task to avoid RTNL lock and 1007 * clear PLUG bit so that pending plugs don't interfere 1008 */ 1009 clear_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags); 1010 set_bit(ICE_FLAG_UNPLUG_AUX_DEV, pf->flags); 1011 clear_bit(ICE_FLAG_RDMA_ENA, pf->flags); 1012 } 1013 1014 extern const struct xdp_metadata_ops ice_xdp_md_ops; 1015 #endif /* _ICE_H_ */ 1016