1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2018, Intel Corporation. */ 3 4 #ifndef _ICE_H_ 5 #define _ICE_H_ 6 7 #include <linux/types.h> 8 #include <linux/errno.h> 9 #include <linux/kernel.h> 10 #include <linux/module.h> 11 #include <linux/firmware.h> 12 #include <linux/netdevice.h> 13 #include <linux/compiler.h> 14 #include <linux/etherdevice.h> 15 #include <linux/skbuff.h> 16 #include <linux/cpumask.h> 17 #include <linux/rtnetlink.h> 18 #include <linux/if_vlan.h> 19 #include <linux/dma-mapping.h> 20 #include <linux/pci.h> 21 #include <linux/workqueue.h> 22 #include <linux/wait.h> 23 #include <linux/interrupt.h> 24 #include <linux/ethtool.h> 25 #include <linux/timer.h> 26 #include <linux/delay.h> 27 #include <linux/bitmap.h> 28 #include <linux/log2.h> 29 #include <linux/ip.h> 30 #include <linux/sctp.h> 31 #include <linux/ipv6.h> 32 #include <linux/pkt_sched.h> 33 #include <linux/if_bridge.h> 34 #include <linux/ctype.h> 35 #include <linux/linkmode.h> 36 #include <linux/bpf.h> 37 #include <linux/btf.h> 38 #include <linux/auxiliary_bus.h> 39 #include <linux/avf/virtchnl.h> 40 #include <linux/cpu_rmap.h> 41 #include <linux/dim.h> 42 #include <linux/gnss.h> 43 #include <net/pkt_cls.h> 44 #include <net/pkt_sched.h> 45 #include <net/tc_act/tc_mirred.h> 46 #include <net/tc_act/tc_gact.h> 47 #include <net/ip.h> 48 #include <net/devlink.h> 49 #include <net/ipv6.h> 50 #include <net/xdp_sock.h> 51 #include <net/xdp_sock_drv.h> 52 #include <net/geneve.h> 53 #include <net/gre.h> 54 #include <net/udp_tunnel.h> 55 #include <net/vxlan.h> 56 #include <net/gtp.h> 57 #include <linux/ppp_defs.h> 58 #include "ice_devids.h" 59 #include "ice_type.h" 60 #include "ice_txrx.h" 61 #include "ice_dcb.h" 62 #include "ice_switch.h" 63 #include "ice_common.h" 64 #include "ice_flow.h" 65 #include "ice_sched.h" 66 #include "ice_idc_int.h" 67 #include "ice_sriov.h" 68 #include "ice_vf_mbx.h" 69 #include "ice_ptp.h" 70 #include "ice_tspll.h" 71 #include "ice_fdir.h" 72 #include "ice_xsk.h" 73 #include "ice_arfs.h" 74 #include "ice_repr.h" 75 #include "ice_eswitch.h" 76 #include "ice_lag.h" 77 #include "ice_vsi_vlan_ops.h" 78 #include "ice_gnss.h" 79 #include "ice_irq.h" 80 #include "ice_dpll.h" 81 #include "ice_adapter.h" 82 #include "devlink/health.h" 83 84 #define ICE_BAR0 0 85 #define ICE_REQ_DESC_MULTIPLE 32 86 #define ICE_MIN_NUM_DESC 64 87 #define ICE_MAX_NUM_DESC 8160 88 #define ICE_DFLT_MIN_RX_DESC 512 89 #define ICE_DFLT_NUM_TX_DESC 256 90 #define ICE_DFLT_NUM_RX_DESC 2048 91 92 #define ICE_DFLT_TRAFFIC_CLASS BIT(0) 93 #define ICE_INT_NAME_STR_LEN (IFNAMSIZ + 16) 94 #define ICE_AQ_LEN 192 95 #define ICE_MBXSQ_LEN 64 96 #define ICE_SBQ_LEN 64 97 #define ICE_MIN_LAN_TXRX_MSIX 1 98 #define ICE_MIN_LAN_OICR_MSIX 1 99 #define ICE_MIN_MSIX (ICE_MIN_LAN_TXRX_MSIX + ICE_MIN_LAN_OICR_MSIX) 100 #define ICE_FDIR_MSIX 2 101 #define ICE_NO_VSI 0xffff 102 #define ICE_VSI_MAP_CONTIG 0 103 #define ICE_VSI_MAP_SCATTER 1 104 #define ICE_MAX_SCATTER_TXQS 16 105 #define ICE_MAX_SCATTER_RXQS 16 106 #define ICE_Q_WAIT_RETRY_LIMIT 10 107 #define ICE_Q_WAIT_MAX_RETRY (5 * ICE_Q_WAIT_RETRY_LIMIT) 108 #define ICE_MAX_LG_RSS_QS 256 109 #define ICE_INVAL_Q_INDEX 0xffff 110 111 #define ICE_MAX_RXQS_PER_TC 256 /* Used when setting VSI context per TC Rx queues */ 112 113 #define ICE_CHNL_START_TC 1 114 115 #define ICE_MAX_RESET_WAIT 20 116 117 #define ICE_VSIQF_HKEY_ARRAY_SIZE ((VSIQF_HKEY_MAX_INDEX + 1) * 4) 118 119 #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK) 120 121 #define ICE_MAX_MTU (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD) 122 123 #define ICE_MAX_TSO_SIZE 131072 124 125 #define ICE_UP_TABLE_TRANSLATE(val, i) \ 126 (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \ 127 ICE_AQ_VSI_UP_TABLE_UP##i##_M) 128 129 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i])) 130 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i])) 131 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i])) 132 #define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i])) 133 134 /* Minimum BW limit is 500 Kbps for any scheduler node */ 135 #define ICE_MIN_BW_LIMIT 500 136 /* User can specify BW in either Kbit/Mbit/Gbit and OS converts it in bytes. 137 * use it to convert user specified BW limit into Kbps 138 */ 139 #define ICE_BW_KBPS_DIVISOR 125 140 141 /* Default recipes have priority 4 and below, hence priority values between 5..7 142 * can be used as filter priority for advanced switch filter (advanced switch 143 * filters need new recipe to be created for specified extraction sequence 144 * because default recipe extraction sequence does not represent custom 145 * extraction) 146 */ 147 #define ICE_SWITCH_FLTR_PRIO_QUEUE 7 148 /* prio 6 is reserved for future use (e.g. switch filter with L3 fields + 149 * (Optional: IP TOS/TTL) + L4 fields + (optionally: TCP fields such as 150 * SYN/FIN/RST)) 151 */ 152 #define ICE_SWITCH_FLTR_PRIO_RSVD 6 153 #define ICE_SWITCH_FLTR_PRIO_VSI 5 154 #define ICE_SWITCH_FLTR_PRIO_QGRP ICE_SWITCH_FLTR_PRIO_VSI 155 156 /* Macro for each VSI in a PF */ 157 #define ice_for_each_vsi(pf, i) \ 158 for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++) 159 160 /* Macros for each Tx/Xdp/Rx ring in a VSI */ 161 #define ice_for_each_txq(vsi, i) \ 162 for ((i) = 0; (i) < (vsi)->num_txq; (i)++) 163 164 #define ice_for_each_xdp_txq(vsi, i) \ 165 for ((i) = 0; (i) < (vsi)->num_xdp_txq; (i)++) 166 167 #define ice_for_each_rxq(vsi, i) \ 168 for ((i) = 0; (i) < (vsi)->num_rxq; (i)++) 169 170 /* Macros for each allocated Tx/Rx ring whether used or not in a VSI */ 171 #define ice_for_each_alloc_txq(vsi, i) \ 172 for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++) 173 174 #define ice_for_each_alloc_rxq(vsi, i) \ 175 for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++) 176 177 #define ice_for_each_q_vector(vsi, i) \ 178 for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++) 179 180 #define ice_for_each_chnl_tc(i) \ 181 for ((i) = ICE_CHNL_START_TC; (i) < ICE_CHNL_MAX_TC; (i)++) 182 183 #define ICE_UCAST_PROMISC_BITS ICE_PROMISC_UCAST_RX 184 185 #define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_RX | \ 186 ICE_PROMISC_VLAN_RX) 187 188 #define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX) 189 190 #define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \ 191 ICE_PROMISC_MCAST_RX | \ 192 ICE_PROMISC_VLAN_TX | \ 193 ICE_PROMISC_VLAN_RX) 194 195 #define ice_pf_to_dev(pf) (&((pf)->pdev->dev)) 196 197 enum ice_feature { 198 ICE_F_DSCP, 199 ICE_F_PHY_RCLK, 200 ICE_F_SMA_CTRL, 201 ICE_F_CGU, 202 ICE_F_GNSS, 203 ICE_F_GCS, 204 ICE_F_ROCE_LAG, 205 ICE_F_SRIOV_LAG, 206 ICE_F_SRIOV_AA_LAG, 207 ICE_F_MBX_LIMIT, 208 ICE_F_MAX 209 }; 210 211 DECLARE_STATIC_KEY_FALSE(ice_xdp_locking_key); 212 213 struct ice_channel { 214 struct list_head list; 215 u8 type; 216 u16 sw_id; 217 u16 base_q; 218 u16 num_rxq; 219 u16 num_txq; 220 u16 vsi_num; 221 u8 ena_tc; 222 struct ice_aqc_vsi_props info; 223 u64 max_tx_rate; 224 u64 min_tx_rate; 225 atomic_t num_sb_fltr; 226 struct ice_vsi *ch_vsi; 227 }; 228 229 struct ice_txq_meta { 230 u32 q_teid; /* Tx-scheduler element identifier */ 231 u16 q_id; /* Entry in VSI's txq_map bitmap */ 232 u16 q_handle; /* Relative index of Tx queue within TC */ 233 u16 vsi_idx; /* VSI index that Tx queue belongs to */ 234 u8 tc; /* TC number that Tx queue belongs to */ 235 }; 236 237 struct ice_tc_info { 238 u16 qoffset; 239 u16 qcount_tx; 240 u16 qcount_rx; 241 u8 netdev_tc; 242 }; 243 244 struct ice_tc_cfg { 245 u8 numtc; /* Total number of enabled TCs */ 246 u16 ena_tc; /* Tx map */ 247 struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS]; 248 }; 249 250 struct ice_qs_cfg { 251 struct mutex *qs_mutex; /* will be assigned to &pf->avail_q_mutex */ 252 unsigned long *pf_map; 253 unsigned long pf_map_size; 254 unsigned int q_count; 255 unsigned int scatter_count; 256 u16 *vsi_map; 257 u16 vsi_map_offset; 258 u8 mapping_mode; 259 }; 260 261 struct ice_sw { 262 struct ice_pf *pf; 263 u16 sw_id; /* switch ID for this switch */ 264 u16 bridge_mode; /* VEB/VEPA/Port Virtualizer */ 265 }; 266 267 enum ice_pf_state { 268 ICE_TESTING, 269 ICE_DOWN, 270 ICE_NEEDS_RESTART, 271 ICE_PREPARED_FOR_RESET, /* set by driver when prepared */ 272 ICE_RESET_OICR_RECV, /* set by driver after rcv reset OICR */ 273 ICE_PFR_REQ, /* set by driver */ 274 ICE_CORER_REQ, /* set by driver */ 275 ICE_GLOBR_REQ, /* set by driver */ 276 ICE_CORER_RECV, /* set by OICR handler */ 277 ICE_GLOBR_RECV, /* set by OICR handler */ 278 ICE_EMPR_RECV, /* set by OICR handler */ 279 ICE_SUSPENDED, /* set on module remove path */ 280 ICE_RESET_FAILED, /* set by reset/rebuild */ 281 /* When checking for the PF to be in a nominal operating state, the 282 * bits that are grouped at the beginning of the list need to be 283 * checked. Bits occurring before ICE_STATE_NOMINAL_CHECK_BITS will 284 * be checked. If you need to add a bit into consideration for nominal 285 * operating state, it must be added before 286 * ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position 287 * without appropriate consideration. 288 */ 289 ICE_STATE_NOMINAL_CHECK_BITS, 290 ICE_ADMINQ_EVENT_PENDING, 291 ICE_MAILBOXQ_EVENT_PENDING, 292 ICE_SIDEBANDQ_EVENT_PENDING, 293 ICE_MDD_EVENT_PENDING, 294 ICE_VFLR_EVENT_PENDING, 295 ICE_FLTR_OVERFLOW_PROMISC, 296 ICE_VF_DIS, 297 ICE_CFG_BUSY, 298 ICE_SERVICE_SCHED, 299 ICE_SERVICE_DIS, 300 ICE_FD_FLUSH_REQ, 301 ICE_OICR_INTR_DIS, /* Global OICR interrupt disabled */ 302 ICE_MDD_VF_PRINT_PENDING, /* set when MDD event handle */ 303 ICE_VF_RESETS_DISABLED, /* disable resets during ice_remove */ 304 ICE_LINK_DEFAULT_OVERRIDE_PENDING, 305 ICE_PHY_INIT_COMPLETE, 306 ICE_FD_VF_FLUSH_CTX, /* set at FD Rx IRQ or timeout */ 307 ICE_AUX_ERR_PENDING, 308 ICE_STATE_NBITS /* must be last */ 309 }; 310 311 enum ice_vsi_state { 312 ICE_VSI_DOWN, 313 ICE_VSI_NEEDS_RESTART, 314 ICE_VSI_NETDEV_ALLOCD, 315 ICE_VSI_NETDEV_REGISTERED, 316 ICE_VSI_UMAC_FLTR_CHANGED, 317 ICE_VSI_MMAC_FLTR_CHANGED, 318 ICE_VSI_PROMISC_CHANGED, 319 ICE_VSI_REBUILD_PENDING, 320 ICE_VSI_STATE_NBITS /* must be last */ 321 }; 322 323 struct ice_vsi_stats { 324 struct ice_ring_stats **tx_ring_stats; /* Tx ring stats array */ 325 struct ice_ring_stats **rx_ring_stats; /* Rx ring stats array */ 326 }; 327 328 /* struct that defines a VSI, associated with a dev */ 329 struct ice_vsi { 330 struct net_device *netdev; 331 struct ice_sw *vsw; /* switch this VSI is on */ 332 struct ice_pf *back; /* back pointer to PF */ 333 struct ice_rx_ring **rx_rings; /* Rx ring array */ 334 struct ice_tx_ring **tx_rings; /* Tx ring array */ 335 struct ice_q_vector **q_vectors; /* q_vector array */ 336 337 irqreturn_t (*irq_handler)(int irq, void *data); 338 339 u64 tx_linearize; 340 DECLARE_BITMAP(state, ICE_VSI_STATE_NBITS); 341 unsigned int current_netdev_flags; 342 u32 tx_restart; 343 u32 tx_busy; 344 u32 rx_buf_failed; 345 u32 rx_page_failed; 346 u16 num_q_vectors; 347 /* tell if only dynamic irq allocation is allowed */ 348 bool irq_dyn_alloc; 349 350 u16 vsi_num; /* HW (absolute) index of this VSI */ 351 u16 idx; /* software index in pf->vsi[] */ 352 353 u16 num_gfltr; 354 u16 num_bfltr; 355 356 /* RSS config */ 357 u16 rss_table_size; /* HW RSS table size */ 358 u16 rss_size; /* Allocated RSS queues */ 359 u8 rss_hfunc; /* User configured hash type */ 360 u8 *rss_hkey_user; /* User configured hash keys */ 361 u8 *rss_lut_user; /* User configured lookup table entries */ 362 u8 rss_lut_type; /* used to configure Get/Set RSS LUT AQ call */ 363 364 /* aRFS members only allocated for the PF VSI */ 365 #define ICE_MAX_ARFS_LIST 1024 366 #define ICE_ARFS_LST_MASK (ICE_MAX_ARFS_LIST - 1) 367 struct hlist_head *arfs_fltr_list; 368 struct ice_arfs_active_fltr_cntrs *arfs_fltr_cntrs; 369 spinlock_t arfs_lock; /* protects aRFS hash table and filter state */ 370 atomic_t *arfs_last_fltr_id; 371 372 struct ice_aqc_vsi_props info; /* VSI properties */ 373 struct ice_vsi_vlan_info vlan_info; /* vlan config to be restored */ 374 375 /* VSI stats */ 376 struct rtnl_link_stats64 net_stats; 377 struct rtnl_link_stats64 net_stats_prev; 378 struct ice_eth_stats eth_stats; 379 struct ice_eth_stats eth_stats_prev; 380 381 struct list_head tmp_sync_list; /* MAC filters to be synced */ 382 struct list_head tmp_unsync_list; /* MAC filters to be unsynced */ 383 384 u8 irqs_ready:1; 385 u8 current_isup:1; /* Sync 'link up' logging */ 386 u8 stat_offsets_loaded:1; 387 struct ice_vsi_vlan_ops inner_vlan_ops; 388 struct ice_vsi_vlan_ops outer_vlan_ops; 389 u16 num_vlan; 390 391 /* queue information */ 392 u8 tx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 393 u8 rx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 394 u16 *txq_map; /* index in pf->avail_txqs */ 395 u16 *rxq_map; /* index in pf->avail_rxqs */ 396 u16 alloc_txq; /* Allocated Tx queues */ 397 u16 num_txq; /* Used Tx queues */ 398 u16 alloc_rxq; /* Allocated Rx queues */ 399 u16 num_rxq; /* Used Rx queues */ 400 u16 req_txq; /* User requested Tx queues */ 401 u16 req_rxq; /* User requested Rx queues */ 402 u16 num_rx_desc; 403 u16 num_tx_desc; 404 struct ice_tc_cfg tc_cfg; 405 struct bpf_prog *xdp_prog; 406 struct ice_tx_ring **xdp_rings; /* XDP ring array */ 407 u16 num_xdp_txq; /* Used XDP queues */ 408 u8 xdp_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 409 struct mutex xdp_state_lock; 410 411 struct net_device **target_netdevs; 412 413 struct tc_mqprio_qopt_offload mqprio_qopt; /* queue parameters */ 414 415 /* Channel Specific Fields */ 416 struct ice_vsi *tc_map_vsi[ICE_CHNL_MAX_TC]; 417 u16 cnt_q_avail; 418 u16 next_base_q; /* next queue to be used for channel setup */ 419 struct list_head ch_list; 420 u16 num_chnl_rxq; 421 u16 num_chnl_txq; 422 u16 ch_rss_size; 423 u16 num_chnl_fltr; 424 /* store away rss size info before configuring ADQ channels so that, 425 * it can be used after tc-qdisc delete, to get back RSS setting as 426 * they were before 427 */ 428 u16 orig_rss_size; 429 /* this keeps tracks of all enabled TC with and without DCB 430 * and inclusive of ADQ, vsi->mqprio_opt keeps track of queue 431 * information 432 */ 433 u8 all_numtc; 434 u16 all_enatc; 435 436 /* store away TC info, to be used for rebuild logic */ 437 u8 old_numtc; 438 u16 old_ena_tc; 439 440 /* setup back reference, to which aggregator node this VSI 441 * corresponds to 442 */ 443 struct ice_agg_node *agg_node; 444 445 struct_group_tagged(ice_vsi_cfg_params, params, 446 struct ice_port_info *port_info; /* back pointer to port_info */ 447 struct ice_channel *ch; /* VSI's channel structure, may be NULL */ 448 union { 449 /* VF associated with this VSI, may be NULL */ 450 struct ice_vf *vf; 451 /* SF associated with this VSI, may be NULL */ 452 struct ice_dynamic_port *sf; 453 }; 454 u32 flags; /* VSI flags used for rebuild and configuration */ 455 enum ice_vsi_type type; /* the type of the VSI */ 456 ); 457 } ____cacheline_internodealigned_in_smp; 458 459 /* struct that defines an interrupt vector */ 460 struct ice_q_vector { 461 struct ice_vsi *vsi; 462 463 u16 v_idx; /* index in the vsi->q_vector array. */ 464 u16 reg_idx; /* PF relative register index */ 465 u8 num_ring_rx; /* total number of Rx rings in vector */ 466 u8 num_ring_tx; /* total number of Tx rings in vector */ 467 u8 wb_on_itr:1; /* if true, WB on ITR is enabled */ 468 /* in usecs, need to use ice_intrl_to_usecs_reg() before writing this 469 * value to the device 470 */ 471 u8 intrl; 472 473 struct napi_struct napi; 474 475 struct ice_ring_container rx; 476 struct ice_ring_container tx; 477 478 struct ice_channel *ch; 479 480 char name[ICE_INT_NAME_STR_LEN]; 481 482 u16 total_events; /* net_dim(): number of interrupts processed */ 483 u16 vf_reg_idx; /* VF relative register index */ 484 struct msi_map irq; 485 } ____cacheline_internodealigned_in_smp; 486 487 enum ice_pf_flags { 488 ICE_FLAG_FLTR_SYNC, 489 ICE_FLAG_RDMA_ENA, 490 ICE_FLAG_RSS_ENA, 491 ICE_FLAG_SRIOV_ENA, 492 ICE_FLAG_SRIOV_CAPABLE, 493 ICE_FLAG_DCB_CAPABLE, 494 ICE_FLAG_DCB_ENA, 495 ICE_FLAG_FD_ENA, 496 ICE_FLAG_PTP_SUPPORTED, /* PTP is supported by NVM */ 497 ICE_FLAG_ADV_FEATURES, 498 ICE_FLAG_TC_MQPRIO, /* support for Multi queue TC */ 499 ICE_FLAG_CLS_FLOWER, 500 ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA, 501 ICE_FLAG_TOTAL_PORT_SHUTDOWN_ENA, 502 ICE_FLAG_NO_MEDIA, 503 ICE_FLAG_FW_LLDP_AGENT, 504 ICE_FLAG_MOD_POWER_UNSUPPORTED, 505 ICE_FLAG_PHY_FW_LOAD_FAILED, 506 ICE_FLAG_ETHTOOL_CTXT, /* set when ethtool holds RTNL lock */ 507 ICE_FLAG_LEGACY_RX, 508 ICE_FLAG_VF_TRUE_PROMISC_ENA, 509 ICE_FLAG_MDD_AUTO_RESET_VF, 510 ICE_FLAG_VF_VLAN_PRUNING, 511 ICE_FLAG_LINK_LENIENT_MODE_ENA, 512 ICE_FLAG_PLUG_AUX_DEV, 513 ICE_FLAG_UNPLUG_AUX_DEV, 514 ICE_FLAG_AUX_DEV_CREATED, 515 ICE_FLAG_MTU_CHANGED, 516 ICE_FLAG_GNSS, /* GNSS successfully initialized */ 517 ICE_FLAG_DPLL, /* SyncE/PTP dplls initialized */ 518 ICE_FLAG_LLDP_AQ_FLTR, 519 ICE_PF_FLAGS_NBITS /* must be last */ 520 }; 521 522 enum ice_misc_thread_tasks { 523 ICE_MISC_THREAD_TX_TSTAMP, 524 ICE_MISC_THREAD_NBITS /* must be last */ 525 }; 526 527 struct ice_eswitch { 528 struct ice_vsi *uplink_vsi; 529 struct ice_esw_br_offloads *br_offloads; 530 struct xarray reprs; 531 bool is_running; 532 }; 533 534 struct ice_agg_node { 535 u32 agg_id; 536 #define ICE_MAX_VSIS_IN_AGG_NODE 64 537 u32 num_vsis; 538 u8 valid; 539 }; 540 541 struct ice_pf_msix { 542 u32 cur; 543 u32 min; 544 u32 max; 545 u32 total; 546 u32 rest; 547 }; 548 549 struct ice_pf { 550 struct pci_dev *pdev; 551 struct ice_adapter *adapter; 552 553 struct devlink_region *nvm_region; 554 struct devlink_region *sram_region; 555 struct devlink_region *devcaps_region; 556 557 /* devlink port data */ 558 struct devlink_port devlink_port; 559 560 /* OS reserved IRQ details */ 561 struct ice_irq_tracker irq_tracker; 562 struct ice_virt_irq_tracker virt_irq_tracker; 563 564 u16 ctrl_vsi_idx; /* control VSI index in pf->vsi array */ 565 566 struct ice_vsi **vsi; /* VSIs created by the driver */ 567 struct ice_vsi_stats **vsi_stats; 568 struct ice_sw *first_sw; /* first switch created by firmware */ 569 u16 eswitch_mode; /* current mode of eswitch */ 570 struct dentry *ice_debugfs_pf; 571 struct dentry *ice_debugfs_pf_fwlog; 572 /* keep track of all the dentrys for FW log modules */ 573 struct dentry **ice_debugfs_pf_fwlog_modules; 574 struct ice_vfs vfs; 575 DECLARE_BITMAP(features, ICE_F_MAX); 576 DECLARE_BITMAP(state, ICE_STATE_NBITS); 577 DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS); 578 DECLARE_BITMAP(misc_thread, ICE_MISC_THREAD_NBITS); 579 unsigned long *avail_txqs; /* bitmap to track PF Tx queue usage */ 580 unsigned long *avail_rxqs; /* bitmap to track PF Rx queue usage */ 581 unsigned long serv_tmr_period; 582 unsigned long serv_tmr_prev; 583 struct timer_list serv_tmr; 584 struct work_struct serv_task; 585 struct mutex avail_q_mutex; /* protects access to avail_[rx|tx]qs */ 586 struct mutex sw_mutex; /* lock for protecting VSI alloc flow */ 587 struct mutex tc_mutex; /* lock to protect TC changes */ 588 struct mutex adev_mutex; /* lock to protect aux device access */ 589 struct mutex lag_mutex; /* protect ice_lag struct in PF */ 590 u32 msg_enable; 591 struct ice_ptp ptp; 592 struct gnss_serial *gnss_serial; 593 struct gnss_device *gnss_dev; 594 u16 num_rdma_msix; /* Total MSIX vectors for RDMA driver */ 595 596 /* spinlock to protect the AdminQ wait list */ 597 spinlock_t aq_wait_lock; 598 struct hlist_head aq_wait_list; 599 wait_queue_head_t aq_wait_queue; 600 bool fw_emp_reset_disabled; 601 602 wait_queue_head_t reset_wait_queue; 603 604 u32 hw_csum_rx_error; 605 u32 hw_rx_eipe_error; 606 u32 oicr_err_reg; 607 struct msi_map oicr_irq; /* Other interrupt cause MSIX vector */ 608 struct msi_map ll_ts_irq; /* LL_TS interrupt MSIX vector */ 609 u16 max_pf_txqs; /* Total Tx queues PF wide */ 610 u16 max_pf_rxqs; /* Total Rx queues PF wide */ 611 struct ice_pf_msix msix; 612 u16 num_lan_tx; /* num LAN Tx queues setup */ 613 u16 num_lan_rx; /* num LAN Rx queues setup */ 614 u16 next_vsi; /* Next free slot in pf->vsi[] - 0-based! */ 615 u16 num_alloc_vsi; 616 u16 corer_count; /* Core reset count */ 617 u16 globr_count; /* Global reset count */ 618 u16 empr_count; /* EMP reset count */ 619 u16 pfr_count; /* PF reset count */ 620 u32 link_down_events; 621 622 u8 wol_ena : 1; /* software state of WoL */ 623 u32 wakeup_reason; /* last wakeup reason */ 624 struct ice_hw_port_stats stats; 625 struct ice_hw_port_stats stats_prev; 626 struct ice_hw hw; 627 u8 stat_prev_loaded:1; /* has previous stats been loaded */ 628 u16 dcbx_cap; 629 u32 tx_timeout_count; 630 unsigned long tx_timeout_last_recovery; 631 u32 tx_timeout_recovery_level; 632 char int_name[ICE_INT_NAME_STR_LEN]; 633 char int_name_ll_ts[ICE_INT_NAME_STR_LEN]; 634 int aux_idx; 635 u32 sw_int_count; 636 /* count of tc_flower filters specific to channel (aka where filter 637 * action is "hw_tc <tc_num>") 638 */ 639 u16 num_dmac_chnl_fltrs; 640 struct hlist_head tc_flower_fltr_list; 641 642 u64 supported_rxdids; 643 644 __le64 nvm_phy_type_lo; /* NVM PHY type low */ 645 __le64 nvm_phy_type_hi; /* NVM PHY type high */ 646 struct ice_link_default_override_tlv link_dflt_override; 647 struct ice_lag *lag; /* Link Aggregation information */ 648 649 struct ice_eswitch eswitch; 650 struct ice_esw_br_port *br_port; 651 652 struct xarray dyn_ports; 653 struct xarray sf_nums; 654 655 #define ICE_INVALID_AGG_NODE_ID 0 656 #define ICE_PF_AGG_NODE_ID_START 1 657 #define ICE_MAX_PF_AGG_NODES 32 658 struct ice_agg_node pf_agg_node[ICE_MAX_PF_AGG_NODES]; 659 #define ICE_VF_AGG_NODE_ID_START 65 660 #define ICE_MAX_VF_AGG_NODES 32 661 struct ice_agg_node vf_agg_node[ICE_MAX_VF_AGG_NODES]; 662 struct ice_dplls dplls; 663 struct device *hwmon_dev; 664 struct ice_health health_reporters; 665 struct iidc_rdma_core_dev_info *cdev_info; 666 667 u8 num_quanta_prof_used; 668 }; 669 670 extern struct workqueue_struct *ice_lag_wq; 671 672 struct ice_netdev_priv { 673 struct ice_vsi *vsi; 674 struct ice_repr *repr; 675 /* indirect block callbacks on registered higher level devices 676 * (e.g. tunnel devices) 677 * 678 * tc_indr_block_cb_priv_list is used to look up indirect callback 679 * private data 680 */ 681 struct list_head tc_indr_block_priv_list; 682 }; 683 684 /** 685 * ice_vector_ch_enabled 686 * @qv: pointer to q_vector, can be NULL 687 * 688 * This function returns true if vector is channel enabled otherwise false 689 */ 690 static inline bool ice_vector_ch_enabled(struct ice_q_vector *qv) 691 { 692 return !!qv->ch; /* Enable it to run with TC */ 693 } 694 695 /** 696 * ice_ptp_pf_handles_tx_interrupt - Check if PF handles Tx interrupt 697 * @pf: Board private structure 698 * 699 * Return true if this PF should respond to the Tx timestamp interrupt 700 * indication in the miscellaneous OICR interrupt handler. 701 */ 702 static inline bool ice_ptp_pf_handles_tx_interrupt(struct ice_pf *pf) 703 { 704 return pf->ptp.tx_interrupt_mode != ICE_PTP_TX_INTERRUPT_NONE; 705 } 706 707 /** 708 * ice_irq_dynamic_ena - Enable default interrupt generation settings 709 * @hw: pointer to HW struct 710 * @vsi: pointer to VSI struct, can be NULL 711 * @q_vector: pointer to q_vector, can be NULL 712 */ 713 static inline void 714 ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi, 715 struct ice_q_vector *q_vector) 716 { 717 u32 vector = (vsi && q_vector) ? q_vector->reg_idx : 718 ((struct ice_pf *)hw->back)->oicr_irq.index; 719 int itr = ICE_ITR_NONE; 720 u32 val; 721 722 /* clear the PBA here, as this function is meant to clean out all 723 * previous interrupts and enable the interrupt 724 */ 725 val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M | 726 (itr << GLINT_DYN_CTL_ITR_INDX_S); 727 if (vsi) 728 if (test_bit(ICE_VSI_DOWN, vsi->state)) 729 return; 730 wr32(hw, GLINT_DYN_CTL(vector), val); 731 } 732 733 /** 734 * ice_netdev_to_pf - Retrieve the PF struct associated with a netdev 735 * @netdev: pointer to the netdev struct 736 */ 737 static inline struct ice_pf *ice_netdev_to_pf(struct net_device *netdev) 738 { 739 struct ice_netdev_priv *np = netdev_priv(netdev); 740 741 return np->vsi->back; 742 } 743 744 static inline bool ice_is_xdp_ena_vsi(struct ice_vsi *vsi) 745 { 746 return !!READ_ONCE(vsi->xdp_prog); 747 } 748 749 static inline void ice_set_ring_xdp(struct ice_tx_ring *ring) 750 { 751 ring->flags |= ICE_TX_FLAGS_RING_XDP; 752 } 753 754 /** 755 * ice_get_xp_from_qid - get ZC XSK buffer pool bound to a queue ID 756 * @vsi: pointer to VSI 757 * @qid: index of a queue to look at XSK buff pool presence 758 * 759 * Return: A pointer to xsk_buff_pool structure if there is a buffer pool 760 * attached and configured as zero-copy, NULL otherwise. 761 */ 762 static inline struct xsk_buff_pool *ice_get_xp_from_qid(struct ice_vsi *vsi, 763 u16 qid) 764 { 765 struct xsk_buff_pool *pool = xsk_get_pool_from_qid(vsi->netdev, qid); 766 767 if (!ice_is_xdp_ena_vsi(vsi)) 768 return NULL; 769 770 return (pool && pool->dev) ? pool : NULL; 771 } 772 773 /** 774 * ice_rx_xsk_pool - assign XSK buff pool to Rx ring 775 * @ring: Rx ring to use 776 * 777 * Sets XSK buff pool pointer on Rx ring. 778 */ 779 static inline void ice_rx_xsk_pool(struct ice_rx_ring *ring) 780 { 781 struct ice_vsi *vsi = ring->vsi; 782 u16 qid = ring->q_index; 783 784 WRITE_ONCE(ring->xsk_pool, ice_get_xp_from_qid(vsi, qid)); 785 } 786 787 /** 788 * ice_tx_xsk_pool - assign XSK buff pool to XDP ring 789 * @vsi: pointer to VSI 790 * @qid: index of a queue to look at XSK buff pool presence 791 * 792 * Sets XSK buff pool pointer on XDP ring. 793 * 794 * XDP ring is picked from Rx ring, whereas Rx ring is picked based on provided 795 * queue id. Reason for doing so is that queue vectors might have assigned more 796 * than one XDP ring, e.g. when user reduced the queue count on netdev; Rx ring 797 * carries a pointer to one of these XDP rings for its own purposes, such as 798 * handling XDP_TX action, therefore we can piggyback here on the 799 * rx_ring->xdp_ring assignment that was done during XDP rings initialization. 800 */ 801 static inline void ice_tx_xsk_pool(struct ice_vsi *vsi, u16 qid) 802 { 803 struct ice_tx_ring *ring; 804 805 ring = vsi->rx_rings[qid]->xdp_ring; 806 if (!ring) 807 return; 808 809 WRITE_ONCE(ring->xsk_pool, ice_get_xp_from_qid(vsi, qid)); 810 } 811 812 /** 813 * ice_get_main_vsi - Get the PF VSI 814 * @pf: PF instance 815 * 816 * returns pf->vsi[0], which by definition is the PF VSI 817 */ 818 static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf) 819 { 820 if (pf->vsi) 821 return pf->vsi[0]; 822 823 return NULL; 824 } 825 826 /** 827 * ice_get_netdev_priv_vsi - return VSI associated with netdev priv. 828 * @np: private netdev structure 829 */ 830 static inline struct ice_vsi *ice_get_netdev_priv_vsi(struct ice_netdev_priv *np) 831 { 832 /* In case of port representor return source port VSI. */ 833 if (np->repr) 834 return np->repr->src_vsi; 835 else 836 return np->vsi; 837 } 838 839 /** 840 * ice_get_ctrl_vsi - Get the control VSI 841 * @pf: PF instance 842 */ 843 static inline struct ice_vsi *ice_get_ctrl_vsi(struct ice_pf *pf) 844 { 845 /* if pf->ctrl_vsi_idx is ICE_NO_VSI, control VSI was not set up */ 846 if (!pf->vsi || pf->ctrl_vsi_idx == ICE_NO_VSI) 847 return NULL; 848 849 return pf->vsi[pf->ctrl_vsi_idx]; 850 } 851 852 /** 853 * ice_find_vsi - Find the VSI from VSI ID 854 * @pf: The PF pointer to search in 855 * @vsi_num: The VSI ID to search for 856 */ 857 static inline struct ice_vsi *ice_find_vsi(struct ice_pf *pf, u16 vsi_num) 858 { 859 int i; 860 861 ice_for_each_vsi(pf, i) 862 if (pf->vsi[i] && pf->vsi[i]->vsi_num == vsi_num) 863 return pf->vsi[i]; 864 return NULL; 865 } 866 867 /** 868 * ice_is_switchdev_running - check if switchdev is configured 869 * @pf: pointer to PF structure 870 * 871 * Returns true if eswitch mode is set to DEVLINK_ESWITCH_MODE_SWITCHDEV 872 * and switchdev is configured, false otherwise. 873 */ 874 static inline bool ice_is_switchdev_running(struct ice_pf *pf) 875 { 876 return pf->eswitch.is_running; 877 } 878 879 #define ICE_FD_STAT_CTR_BLOCK_COUNT 256 880 #define ICE_FD_STAT_PF_IDX(base_idx) \ 881 ((base_idx) * ICE_FD_STAT_CTR_BLOCK_COUNT) 882 #define ICE_FD_SB_STAT_IDX(base_idx) ICE_FD_STAT_PF_IDX(base_idx) 883 #define ICE_FD_STAT_CH 1 884 #define ICE_FD_CH_STAT_IDX(base_idx) \ 885 (ICE_FD_STAT_PF_IDX(base_idx) + ICE_FD_STAT_CH) 886 887 /** 888 * ice_is_adq_active - any active ADQs 889 * @pf: pointer to PF 890 * 891 * This function returns true if there are any ADQs configured (which is 892 * determined by looking at VSI type (which should be VSI_PF), numtc, and 893 * TC_MQPRIO flag) otherwise return false 894 */ 895 static inline bool ice_is_adq_active(struct ice_pf *pf) 896 { 897 struct ice_vsi *vsi; 898 899 vsi = ice_get_main_vsi(pf); 900 if (!vsi) 901 return false; 902 903 /* is ADQ configured */ 904 if (vsi->tc_cfg.numtc > ICE_CHNL_START_TC && 905 test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) 906 return true; 907 908 return false; 909 } 910 911 void ice_debugfs_fwlog_init(struct ice_pf *pf); 912 void ice_debugfs_pf_deinit(struct ice_pf *pf); 913 void ice_debugfs_init(void); 914 void ice_debugfs_exit(void); 915 void ice_pf_fwlog_update_module(struct ice_pf *pf, int log_level, int module); 916 917 bool netif_is_ice(const struct net_device *dev); 918 int ice_vsi_setup_tx_rings(struct ice_vsi *vsi); 919 int ice_vsi_setup_rx_rings(struct ice_vsi *vsi); 920 int ice_vsi_open_ctrl(struct ice_vsi *vsi); 921 int ice_vsi_open(struct ice_vsi *vsi); 922 void ice_set_ethtool_ops(struct net_device *netdev); 923 void ice_set_ethtool_repr_ops(struct net_device *netdev); 924 void ice_set_ethtool_safe_mode_ops(struct net_device *netdev); 925 void ice_set_ethtool_sf_ops(struct net_device *netdev); 926 u16 ice_get_avail_txq_count(struct ice_pf *pf); 927 u16 ice_get_avail_rxq_count(struct ice_pf *pf); 928 int ice_vsi_recfg_qs(struct ice_vsi *vsi, int new_rx, int new_tx, bool locked); 929 void ice_update_vsi_stats(struct ice_vsi *vsi); 930 void ice_update_pf_stats(struct ice_pf *pf); 931 void 932 ice_fetch_u64_stats_per_ring(struct u64_stats_sync *syncp, 933 struct ice_q_stats stats, u64 *pkts, u64 *bytes); 934 int ice_up(struct ice_vsi *vsi); 935 int ice_down(struct ice_vsi *vsi); 936 int ice_down_up(struct ice_vsi *vsi); 937 int ice_vsi_cfg_lan(struct ice_vsi *vsi); 938 struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi); 939 940 enum ice_xdp_cfg { 941 ICE_XDP_CFG_FULL, /* Fully apply new config in .ndo_bpf() */ 942 ICE_XDP_CFG_PART, /* Save/use part of config in VSI rebuild */ 943 }; 944 945 int ice_vsi_determine_xdp_res(struct ice_vsi *vsi); 946 int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog, 947 enum ice_xdp_cfg cfg_type); 948 int ice_destroy_xdp_rings(struct ice_vsi *vsi, enum ice_xdp_cfg cfg_type); 949 void ice_map_xdp_rings(struct ice_vsi *vsi); 950 int 951 ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames, 952 u32 flags); 953 int ice_set_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size); 954 int ice_get_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size); 955 int ice_set_rss_key(struct ice_vsi *vsi, u8 *seed); 956 int ice_get_rss_key(struct ice_vsi *vsi, u8 *seed); 957 int ice_set_rss_hfunc(struct ice_vsi *vsi, u8 hfunc); 958 void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size); 959 int ice_schedule_reset(struct ice_pf *pf, enum ice_reset_req reset); 960 void ice_print_link_msg(struct ice_vsi *vsi, bool isup); 961 int ice_plug_aux_dev(struct ice_pf *pf); 962 void ice_unplug_aux_dev(struct ice_pf *pf); 963 int ice_init_rdma(struct ice_pf *pf); 964 void ice_deinit_rdma(struct ice_pf *pf); 965 bool ice_is_wol_supported(struct ice_hw *hw); 966 void ice_fdir_del_all_fltrs(struct ice_vsi *vsi); 967 int 968 ice_fdir_write_fltr(struct ice_pf *pf, struct ice_fdir_fltr *input, bool add, 969 bool is_tun); 970 void ice_vsi_manage_fdir(struct ice_vsi *vsi, bool ena); 971 int ice_add_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd); 972 int ice_del_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd); 973 int ice_get_ethtool_fdir_entry(struct ice_hw *hw, struct ethtool_rxnfc *cmd); 974 int 975 ice_get_fdir_fltr_ids(struct ice_hw *hw, struct ethtool_rxnfc *cmd, 976 u32 *rule_locs); 977 void ice_fdir_rem_adq_chnl(struct ice_hw *hw, u16 vsi_idx); 978 void ice_fdir_release_flows(struct ice_hw *hw); 979 void ice_fdir_replay_flows(struct ice_hw *hw); 980 void ice_fdir_replay_fltrs(struct ice_pf *pf); 981 int ice_fdir_create_dflt_rules(struct ice_pf *pf); 982 983 enum ice_aq_task_state { 984 ICE_AQ_TASK_NOT_PREPARED, 985 ICE_AQ_TASK_WAITING, 986 ICE_AQ_TASK_COMPLETE, 987 ICE_AQ_TASK_CANCELED, 988 }; 989 990 struct ice_aq_task { 991 struct hlist_node entry; 992 struct ice_rq_event_info event; 993 enum ice_aq_task_state state; 994 u16 opcode; 995 }; 996 997 void ice_aq_prep_for_event(struct ice_pf *pf, struct ice_aq_task *task, 998 u16 opcode); 999 int ice_aq_wait_for_event(struct ice_pf *pf, struct ice_aq_task *task, 1000 unsigned long timeout); 1001 int ice_open(struct net_device *netdev); 1002 int ice_open_internal(struct net_device *netdev); 1003 int ice_stop(struct net_device *netdev); 1004 void ice_service_task_schedule(struct ice_pf *pf); 1005 int ice_load(struct ice_pf *pf); 1006 void ice_unload(struct ice_pf *pf); 1007 void ice_adv_lnk_speed_maps_init(void); 1008 int ice_init_dev(struct ice_pf *pf); 1009 void ice_deinit_dev(struct ice_pf *pf); 1010 int ice_change_mtu(struct net_device *netdev, int new_mtu); 1011 void ice_tx_timeout(struct net_device *netdev, unsigned int txqueue); 1012 int ice_xdp(struct net_device *dev, struct netdev_bpf *xdp); 1013 void ice_set_netdev_features(struct net_device *netdev); 1014 int ice_vlan_rx_add_vid(struct net_device *netdev, __be16 proto, u16 vid); 1015 int ice_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto, u16 vid); 1016 void ice_get_stats64(struct net_device *netdev, 1017 struct rtnl_link_stats64 *stats); 1018 1019 /** 1020 * ice_set_rdma_cap - enable RDMA support 1021 * @pf: PF struct 1022 */ 1023 static inline void ice_set_rdma_cap(struct ice_pf *pf) 1024 { 1025 if (pf->hw.func_caps.common_cap.rdma && pf->num_rdma_msix) { 1026 set_bit(ICE_FLAG_RDMA_ENA, pf->flags); 1027 set_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags); 1028 } 1029 } 1030 1031 /** 1032 * ice_clear_rdma_cap - disable RDMA support 1033 * @pf: PF struct 1034 */ 1035 static inline void ice_clear_rdma_cap(struct ice_pf *pf) 1036 { 1037 /* defer unplug to service task to avoid RTNL lock and 1038 * clear PLUG bit so that pending plugs don't interfere 1039 */ 1040 clear_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags); 1041 set_bit(ICE_FLAG_UNPLUG_AUX_DEV, pf->flags); 1042 clear_bit(ICE_FLAG_RDMA_ENA, pf->flags); 1043 } 1044 1045 extern const struct xdp_metadata_ops ice_xdp_md_ops; 1046 1047 /** 1048 * ice_is_dual - Check if given config is multi-NAC 1049 * @hw: pointer to HW structure 1050 * 1051 * Return: true if the device is running in mutli-NAC (Network 1052 * Acceleration Complex) configuration variant, false otherwise 1053 * (always false for non-E825 devices). 1054 */ 1055 static inline bool ice_is_dual(struct ice_hw *hw) 1056 { 1057 return hw->mac_type == ICE_MAC_GENERIC_3K_E825 && 1058 (hw->dev_caps.nac_topo.mode & ICE_NAC_TOPO_DUAL_M); 1059 } 1060 1061 /** 1062 * ice_is_primary - Check if given device belongs to the primary complex 1063 * @hw: pointer to HW structure 1064 * 1065 * Check if given PF/HW is running on primary complex in multi-NAC 1066 * configuration. 1067 * 1068 * Return: true if the device is dual, false otherwise (always true 1069 * for non-E825 devices). 1070 */ 1071 static inline bool ice_is_primary(struct ice_hw *hw) 1072 { 1073 return hw->mac_type != ICE_MAC_GENERIC_3K_E825 || 1074 !ice_is_dual(hw) || 1075 (hw->dev_caps.nac_topo.mode & ICE_NAC_TOPO_PRIMARY_M); 1076 } 1077 1078 /** 1079 * ice_pf_src_tmr_owned - Check if a primary timer is owned by PF 1080 * @pf: pointer to PF structure 1081 * 1082 * Return: true if PF owns primary timer, false otherwise. 1083 */ 1084 static inline bool ice_pf_src_tmr_owned(struct ice_pf *pf) 1085 { 1086 return pf->hw.func_caps.ts_func_info.src_tmr_owned && 1087 ice_is_primary(&pf->hw); 1088 } 1089 1090 /** 1091 * ice_get_primary_hw - Get pointer to primary ice_hw structure 1092 * @pf: pointer to PF structure 1093 * 1094 * Return: A pointer to ice_hw structure with access to timesync 1095 * register space. 1096 */ 1097 static inline struct ice_hw *ice_get_primary_hw(struct ice_pf *pf) 1098 { 1099 if (!pf->adapter->ctrl_pf) 1100 return &pf->hw; 1101 else 1102 return &pf->adapter->ctrl_pf->hw; 1103 } 1104 #endif /* _ICE_H_ */ 1105