xref: /linux/drivers/net/ethernet/intel/ice/ice.h (revision 856e7c4b619af622d56b3b454f7bec32a170ac99)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2018, Intel Corporation. */
3 
4 #ifndef _ICE_H_
5 #define _ICE_H_
6 
7 #include <linux/types.h>
8 #include <linux/errno.h>
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11 #include <linux/netdevice.h>
12 #include <linux/compiler.h>
13 #include <linux/etherdevice.h>
14 #include <linux/skbuff.h>
15 #include <linux/cpumask.h>
16 #include <linux/rtnetlink.h>
17 #include <linux/if_vlan.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/pci.h>
20 #include <linux/workqueue.h>
21 #include <linux/aer.h>
22 #include <linux/interrupt.h>
23 #include <linux/ethtool.h>
24 #include <linux/timer.h>
25 #include <linux/delay.h>
26 #include <linux/bitmap.h>
27 #include <linux/log2.h>
28 #include <linux/ip.h>
29 #include <linux/ipv6.h>
30 #include <linux/if_bridge.h>
31 #include <net/ipv6.h>
32 #include "ice_devids.h"
33 #include "ice_type.h"
34 #include "ice_txrx.h"
35 #include "ice_switch.h"
36 #include "ice_common.h"
37 #include "ice_sched.h"
38 
39 extern const char ice_drv_ver[];
40 #define ICE_BAR0		0
41 #define ICE_DFLT_NUM_DESC	128
42 #define ICE_MIN_NUM_DESC	8
43 #define ICE_MAX_NUM_DESC	8160
44 #define ICE_REQ_DESC_MULTIPLE	32
45 #define ICE_DFLT_TRAFFIC_CLASS	BIT(0)
46 #define ICE_INT_NAME_STR_LEN	(IFNAMSIZ + 16)
47 #define ICE_ETHTOOL_FWVER_LEN	32
48 #define ICE_AQ_LEN		64
49 #define ICE_MIN_MSIX		2
50 #define ICE_NO_VSI		0xffff
51 #define ICE_MAX_VSI_ALLOC	130
52 #define ICE_MAX_TXQS		2048
53 #define ICE_MAX_RXQS		2048
54 #define ICE_VSI_MAP_CONTIG	0
55 #define ICE_VSI_MAP_SCATTER	1
56 #define ICE_MAX_SCATTER_TXQS	16
57 #define ICE_MAX_SCATTER_RXQS	16
58 #define ICE_Q_WAIT_RETRY_LIMIT	10
59 #define ICE_Q_WAIT_MAX_RETRY	(5 * ICE_Q_WAIT_RETRY_LIMIT)
60 #define ICE_MAX_LG_RSS_QS	256
61 #define ICE_MAX_SMALL_RSS_QS	8
62 #define ICE_RES_VALID_BIT	0x8000
63 #define ICE_RES_MISC_VEC_ID	(ICE_RES_VALID_BIT - 1)
64 #define ICE_INVAL_Q_INDEX	0xffff
65 
66 #define ICE_VSIQF_HKEY_ARRAY_SIZE	((VSIQF_HKEY_MAX_INDEX + 1) *	4)
67 
68 #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
69 
70 #define ICE_MAX_MTU	(ICE_AQ_SET_MAC_FRAME_SIZE_MAX - \
71 			 ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN)
72 
73 #define ICE_UP_TABLE_TRANSLATE(val, i) \
74 		(((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \
75 		  ICE_AQ_VSI_UP_TABLE_UP##i##_M)
76 
77 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i]))
78 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i]))
79 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i]))
80 
81 /* Macro for each VSI in a PF */
82 #define ice_for_each_vsi(pf, i) \
83 	for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++)
84 
85 /* Macros for each tx/rx ring in a VSI */
86 #define ice_for_each_txq(vsi, i) \
87 	for ((i) = 0; (i) < (vsi)->num_txq; (i)++)
88 
89 #define ice_for_each_rxq(vsi, i) \
90 	for ((i) = 0; (i) < (vsi)->num_rxq; (i)++)
91 
92 struct ice_tc_info {
93 	u16 qoffset;
94 	u16 qcount;
95 };
96 
97 struct ice_tc_cfg {
98 	u8 numtc; /* Total number of enabled TCs */
99 	u8 ena_tc; /* TX map */
100 	struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS];
101 };
102 
103 struct ice_res_tracker {
104 	u16 num_entries;
105 	u16 search_hint;
106 	u16 list[1];
107 };
108 
109 struct ice_sw {
110 	struct ice_pf *pf;
111 	u16 sw_id;		/* switch ID for this switch */
112 	u16 bridge_mode;	/* VEB/VEPA/Port Virtualizer */
113 };
114 
115 enum ice_state {
116 	__ICE_DOWN,
117 	__ICE_NEEDS_RESTART,
118 	__ICE_RESET_RECOVERY_PENDING,	/* set by driver when reset starts */
119 	__ICE_PFR_REQ,			/* set by driver and peers */
120 	__ICE_CORER_REQ,		/* set by driver and peers */
121 	__ICE_GLOBR_REQ,		/* set by driver and peers */
122 	__ICE_CORER_RECV,		/* set by OICR handler */
123 	__ICE_GLOBR_RECV,		/* set by OICR handler */
124 	__ICE_EMPR_RECV,		/* set by OICR handler */
125 	__ICE_SUSPENDED,		/* set on module remove path */
126 	__ICE_RESET_FAILED,		/* set by reset/rebuild */
127 	__ICE_ADMINQ_EVENT_PENDING,
128 	__ICE_FLTR_OVERFLOW_PROMISC,
129 	__ICE_CFG_BUSY,
130 	__ICE_SERVICE_SCHED,
131 	__ICE_STATE_NBITS		/* must be last */
132 };
133 
134 enum ice_vsi_flags {
135 	ICE_VSI_FLAG_UMAC_FLTR_CHANGED,
136 	ICE_VSI_FLAG_MMAC_FLTR_CHANGED,
137 	ICE_VSI_FLAG_VLAN_FLTR_CHANGED,
138 	ICE_VSI_FLAG_PROMISC_CHANGED,
139 	ICE_VSI_FLAG_NBITS		/* must be last */
140 };
141 
142 /* struct that defines a VSI, associated with a dev */
143 struct ice_vsi {
144 	struct net_device *netdev;
145 	struct ice_sw *vsw;		 /* switch this VSI is on */
146 	struct ice_pf *back;		 /* back pointer to PF */
147 	struct ice_port_info *port_info; /* back pointer to port_info */
148 	struct ice_ring **rx_rings;	 /* rx ring array */
149 	struct ice_ring **tx_rings;	 /* tx ring array */
150 	struct ice_q_vector **q_vectors; /* q_vector array */
151 
152 	irqreturn_t (*irq_handler)(int irq, void *data);
153 
154 	u64 tx_linearize;
155 	DECLARE_BITMAP(state, __ICE_STATE_NBITS);
156 	DECLARE_BITMAP(flags, ICE_VSI_FLAG_NBITS);
157 	unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
158 	unsigned int current_netdev_flags;
159 	u32 tx_restart;
160 	u32 tx_busy;
161 	u32 rx_buf_failed;
162 	u32 rx_page_failed;
163 	int num_q_vectors;
164 	int base_vector;
165 	enum ice_vsi_type type;
166 	u16 vsi_num;			 /* HW (absolute) index of this VSI */
167 	u16 idx;			 /* software index in pf->vsi[] */
168 
169 	/* Interrupt thresholds */
170 	u16 work_lmt;
171 
172 	/* RSS config */
173 	u16 rss_table_size;	/* HW RSS table size */
174 	u16 rss_size;		/* Allocated RSS queues */
175 	u8 *rss_hkey_user;	/* User configured hash keys */
176 	u8 *rss_lut_user;	/* User configured lookup table entries */
177 	u8 rss_lut_type;	/* used to configure Get/Set RSS LUT AQ call */
178 
179 	u16 max_frame;
180 	u16 rx_buf_len;
181 
182 	struct ice_aqc_vsi_props info;	 /* VSI properties */
183 
184 	/* VSI stats */
185 	struct rtnl_link_stats64 net_stats;
186 	struct ice_eth_stats eth_stats;
187 	struct ice_eth_stats eth_stats_prev;
188 
189 	struct list_head tmp_sync_list;		/* MAC filters to be synced */
190 	struct list_head tmp_unsync_list;	/* MAC filters to be unsynced */
191 
192 	bool irqs_ready;
193 	bool current_isup;		 /* Sync 'link up' logging */
194 	bool stat_offsets_loaded;
195 
196 	/* queue information */
197 	u8 tx_mapping_mode;		 /* ICE_MAP_MODE_[CONTIG|SCATTER] */
198 	u8 rx_mapping_mode;		 /* ICE_MAP_MODE_[CONTIG|SCATTER] */
199 	u16 txq_map[ICE_MAX_TXQS];	 /* index in pf->avail_txqs */
200 	u16 rxq_map[ICE_MAX_RXQS];	 /* index in pf->avail_rxqs */
201 	u16 alloc_txq;			 /* Allocated Tx queues */
202 	u16 num_txq;			 /* Used Tx queues */
203 	u16 alloc_rxq;			 /* Allocated Rx queues */
204 	u16 num_rxq;			 /* Used Rx queues */
205 	u16 num_desc;
206 	struct ice_tc_cfg tc_cfg;
207 } ____cacheline_internodealigned_in_smp;
208 
209 /* struct that defines an interrupt vector */
210 struct ice_q_vector {
211 	struct ice_vsi *vsi;
212 	cpumask_t affinity_mask;
213 	struct napi_struct napi;
214 	struct ice_ring_container rx;
215 	struct ice_ring_container tx;
216 	struct irq_affinity_notify affinity_notify;
217 	u16 v_idx;			/* index in the vsi->q_vector array. */
218 	u8 num_ring_tx;			/* total number of tx rings in vector */
219 	u8 num_ring_rx;			/* total number of rx rings in vector */
220 	char name[ICE_INT_NAME_STR_LEN];
221 } ____cacheline_internodealigned_in_smp;
222 
223 enum ice_pf_flags {
224 	ICE_FLAG_MSIX_ENA,
225 	ICE_FLAG_FLTR_SYNC,
226 	ICE_FLAG_RSS_ENA,
227 	ICE_PF_FLAGS_NBITS		/* must be last */
228 };
229 
230 struct ice_pf {
231 	struct pci_dev *pdev;
232 	struct msix_entry *msix_entries;
233 	struct ice_res_tracker *irq_tracker;
234 	struct ice_vsi **vsi;		/* VSIs created by the driver */
235 	struct ice_sw *first_sw;	/* first switch created by firmware */
236 	DECLARE_BITMAP(state, __ICE_STATE_NBITS);
237 	DECLARE_BITMAP(avail_txqs, ICE_MAX_TXQS);
238 	DECLARE_BITMAP(avail_rxqs, ICE_MAX_RXQS);
239 	DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS);
240 	unsigned long serv_tmr_period;
241 	unsigned long serv_tmr_prev;
242 	struct timer_list serv_tmr;
243 	struct work_struct serv_task;
244 	struct mutex avail_q_mutex;	/* protects access to avail_[rx|tx]qs */
245 	struct mutex sw_mutex;		/* lock for protecting VSI alloc flow */
246 	u32 msg_enable;
247 	u32 hw_csum_rx_error;
248 	u32 oicr_idx;		/* Other interrupt cause vector index */
249 	u32 num_lan_msix;	/* Total MSIX vectors for base driver */
250 	u32 num_avail_msix;	/* remaining MSIX vectors left unclaimed */
251 	u16 num_lan_tx;		/* num lan tx queues setup */
252 	u16 num_lan_rx;		/* num lan rx queues setup */
253 	u16 q_left_tx;		/* remaining num tx queues left unclaimed */
254 	u16 q_left_rx;		/* remaining num rx queues left unclaimed */
255 	u16 next_vsi;		/* Next free slot in pf->vsi[] - 0-based! */
256 	u16 num_alloc_vsi;
257 	u16 corer_count;	/* Core reset count */
258 	u16 globr_count;	/* Global reset count */
259 	u16 empr_count;		/* EMP reset count */
260 	u16 pfr_count;		/* PF reset count */
261 
262 	struct ice_hw_port_stats stats;
263 	struct ice_hw_port_stats stats_prev;
264 	struct ice_hw hw;
265 	bool stat_prev_loaded;	/* has previous stats been loaded */
266 	char int_name[ICE_INT_NAME_STR_LEN];
267 };
268 
269 struct ice_netdev_priv {
270 	struct ice_vsi *vsi;
271 };
272 
273 /**
274  * ice_irq_dynamic_ena - Enable default interrupt generation settings
275  * @hw: pointer to hw struct
276  * @vsi: pointer to vsi struct, can be NULL
277  * @q_vector: pointer to q_vector, can be NULL
278  */
279 static inline void ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi,
280 				       struct ice_q_vector *q_vector)
281 {
282 	u32 vector = (vsi && q_vector) ? vsi->base_vector + q_vector->v_idx :
283 					((struct ice_pf *)hw->back)->oicr_idx;
284 	int itr = ICE_ITR_NONE;
285 	u32 val;
286 
287 	/* clear the PBA here, as this function is meant to clean out all
288 	 * previous interrupts and enable the interrupt
289 	 */
290 	val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
291 	      (itr << GLINT_DYN_CTL_ITR_INDX_S);
292 	if (vsi)
293 		if (test_bit(__ICE_DOWN, vsi->state))
294 			return;
295 	wr32(hw, GLINT_DYN_CTL(vector), val);
296 }
297 
298 static inline void ice_vsi_set_tc_cfg(struct ice_vsi *vsi)
299 {
300 	vsi->tc_cfg.ena_tc =  ICE_DFLT_TRAFFIC_CLASS;
301 	vsi->tc_cfg.numtc = 1;
302 }
303 
304 void ice_set_ethtool_ops(struct net_device *netdev);
305 int ice_up(struct ice_vsi *vsi);
306 int ice_down(struct ice_vsi *vsi);
307 int ice_set_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
308 int ice_get_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
309 void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size);
310 void ice_print_link_msg(struct ice_vsi *vsi, bool isup);
311 
312 #endif /* _ICE_H_ */
313