1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2018, Intel Corporation. */ 3 4 #ifndef _ICE_H_ 5 #define _ICE_H_ 6 7 #include <linux/types.h> 8 #include <linux/errno.h> 9 #include <linux/kernel.h> 10 #include <linux/module.h> 11 #include <linux/firmware.h> 12 #include <linux/netdevice.h> 13 #include <linux/compiler.h> 14 #include <linux/etherdevice.h> 15 #include <linux/skbuff.h> 16 #include <linux/cpumask.h> 17 #include <linux/rtnetlink.h> 18 #include <linux/if_vlan.h> 19 #include <linux/dma-mapping.h> 20 #include <linux/pci.h> 21 #include <linux/workqueue.h> 22 #include <linux/wait.h> 23 #include <linux/aer.h> 24 #include <linux/interrupt.h> 25 #include <linux/ethtool.h> 26 #include <linux/timer.h> 27 #include <linux/delay.h> 28 #include <linux/bitmap.h> 29 #include <linux/log2.h> 30 #include <linux/ip.h> 31 #include <linux/sctp.h> 32 #include <linux/ipv6.h> 33 #include <linux/pkt_sched.h> 34 #include <linux/if_bridge.h> 35 #include <linux/ctype.h> 36 #include <linux/bpf.h> 37 #include <linux/auxiliary_bus.h> 38 #include <linux/avf/virtchnl.h> 39 #include <linux/cpu_rmap.h> 40 #include <linux/dim.h> 41 #include <net/pkt_cls.h> 42 #include <net/tc_act/tc_mirred.h> 43 #include <net/tc_act/tc_gact.h> 44 #include <net/ip.h> 45 #include <net/devlink.h> 46 #include <net/ipv6.h> 47 #include <net/xdp_sock.h> 48 #include <net/xdp_sock_drv.h> 49 #include <net/geneve.h> 50 #include <net/gre.h> 51 #include <net/udp_tunnel.h> 52 #include <net/vxlan.h> 53 #if IS_ENABLED(CONFIG_DCB) 54 #include <scsi/iscsi_proto.h> 55 #endif /* CONFIG_DCB */ 56 #include "ice_devids.h" 57 #include "ice_type.h" 58 #include "ice_txrx.h" 59 #include "ice_dcb.h" 60 #include "ice_switch.h" 61 #include "ice_common.h" 62 #include "ice_flow.h" 63 #include "ice_sched.h" 64 #include "ice_idc_int.h" 65 #include "ice_virtchnl_pf.h" 66 #include "ice_sriov.h" 67 #include "ice_ptp.h" 68 #include "ice_fdir.h" 69 #include "ice_xsk.h" 70 #include "ice_arfs.h" 71 #include "ice_repr.h" 72 #include "ice_eswitch.h" 73 #include "ice_lag.h" 74 75 #define ICE_BAR0 0 76 #define ICE_REQ_DESC_MULTIPLE 32 77 #define ICE_MIN_NUM_DESC 64 78 #define ICE_MAX_NUM_DESC 8160 79 #define ICE_DFLT_MIN_RX_DESC 512 80 #define ICE_DFLT_NUM_TX_DESC 256 81 #define ICE_DFLT_NUM_RX_DESC 2048 82 83 #define ICE_DFLT_TRAFFIC_CLASS BIT(0) 84 #define ICE_INT_NAME_STR_LEN (IFNAMSIZ + 16) 85 #define ICE_AQ_LEN 192 86 #define ICE_MBXSQ_LEN 64 87 #define ICE_SBQ_LEN 64 88 #define ICE_MIN_LAN_TXRX_MSIX 1 89 #define ICE_MIN_LAN_OICR_MSIX 1 90 #define ICE_MIN_MSIX (ICE_MIN_LAN_TXRX_MSIX + ICE_MIN_LAN_OICR_MSIX) 91 #define ICE_FDIR_MSIX 2 92 #define ICE_RDMA_NUM_AEQ_MSIX 4 93 #define ICE_MIN_RDMA_MSIX 2 94 #define ICE_ESWITCH_MSIX 1 95 #define ICE_NO_VSI 0xffff 96 #define ICE_VSI_MAP_CONTIG 0 97 #define ICE_VSI_MAP_SCATTER 1 98 #define ICE_MAX_SCATTER_TXQS 16 99 #define ICE_MAX_SCATTER_RXQS 16 100 #define ICE_Q_WAIT_RETRY_LIMIT 10 101 #define ICE_Q_WAIT_MAX_RETRY (5 * ICE_Q_WAIT_RETRY_LIMIT) 102 #define ICE_MAX_LG_RSS_QS 256 103 #define ICE_RES_VALID_BIT 0x8000 104 #define ICE_RES_MISC_VEC_ID (ICE_RES_VALID_BIT - 1) 105 #define ICE_RES_RDMA_VEC_ID (ICE_RES_MISC_VEC_ID - 1) 106 /* All VF control VSIs share the same IRQ, so assign a unique ID for them */ 107 #define ICE_RES_VF_CTRL_VEC_ID (ICE_RES_RDMA_VEC_ID - 1) 108 #define ICE_INVAL_Q_INDEX 0xffff 109 #define ICE_INVAL_VFID 256 110 111 #define ICE_MAX_RXQS_PER_TC 256 /* Used when setting VSI context per TC Rx queues */ 112 113 #define ICE_CHNL_START_TC 1 114 #define ICE_CHNL_MAX_TC 16 115 116 #define ICE_MAX_RESET_WAIT 20 117 118 #define ICE_VSIQF_HKEY_ARRAY_SIZE ((VSIQF_HKEY_MAX_INDEX + 1) * 4) 119 120 #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK) 121 122 #define ICE_MAX_MTU (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD) 123 124 #define ICE_UP_TABLE_TRANSLATE(val, i) \ 125 (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \ 126 ICE_AQ_VSI_UP_TABLE_UP##i##_M) 127 128 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i])) 129 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i])) 130 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i])) 131 #define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i])) 132 133 /* Minimum BW limit is 500 Kbps for any scheduler node */ 134 #define ICE_MIN_BW_LIMIT 500 135 /* User can specify BW in either Kbit/Mbit/Gbit and OS converts it in bytes. 136 * use it to convert user specified BW limit into Kbps 137 */ 138 #define ICE_BW_KBPS_DIVISOR 125 139 140 /* Macro for each VSI in a PF */ 141 #define ice_for_each_vsi(pf, i) \ 142 for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++) 143 144 /* Macros for each Tx/Xdp/Rx ring in a VSI */ 145 #define ice_for_each_txq(vsi, i) \ 146 for ((i) = 0; (i) < (vsi)->num_txq; (i)++) 147 148 #define ice_for_each_xdp_txq(vsi, i) \ 149 for ((i) = 0; (i) < (vsi)->num_xdp_txq; (i)++) 150 151 #define ice_for_each_rxq(vsi, i) \ 152 for ((i) = 0; (i) < (vsi)->num_rxq; (i)++) 153 154 /* Macros for each allocated Tx/Rx ring whether used or not in a VSI */ 155 #define ice_for_each_alloc_txq(vsi, i) \ 156 for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++) 157 158 #define ice_for_each_alloc_rxq(vsi, i) \ 159 for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++) 160 161 #define ice_for_each_q_vector(vsi, i) \ 162 for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++) 163 164 #define ice_for_each_chnl_tc(i) \ 165 for ((i) = ICE_CHNL_START_TC; (i) < ICE_CHNL_MAX_TC; (i)++) 166 167 #define ICE_UCAST_PROMISC_BITS (ICE_PROMISC_UCAST_TX | ICE_PROMISC_MCAST_TX | \ 168 ICE_PROMISC_UCAST_RX | ICE_PROMISC_MCAST_RX) 169 170 #define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_TX | \ 171 ICE_PROMISC_MCAST_TX | \ 172 ICE_PROMISC_UCAST_RX | \ 173 ICE_PROMISC_MCAST_RX | \ 174 ICE_PROMISC_VLAN_TX | \ 175 ICE_PROMISC_VLAN_RX) 176 177 #define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX) 178 179 #define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \ 180 ICE_PROMISC_MCAST_RX | \ 181 ICE_PROMISC_VLAN_TX | \ 182 ICE_PROMISC_VLAN_RX) 183 184 #define ice_pf_to_dev(pf) (&((pf)->pdev->dev)) 185 186 enum ice_feature { 187 ICE_F_DSCP, 188 ICE_F_SMA_CTRL, 189 ICE_F_MAX 190 }; 191 192 DECLARE_STATIC_KEY_FALSE(ice_xdp_locking_key); 193 194 struct ice_channel { 195 struct list_head list; 196 u8 type; 197 u16 sw_id; 198 u16 base_q; 199 u16 num_rxq; 200 u16 num_txq; 201 u16 vsi_num; 202 u8 ena_tc; 203 struct ice_aqc_vsi_props info; 204 u64 max_tx_rate; 205 u64 min_tx_rate; 206 struct ice_vsi *ch_vsi; 207 }; 208 209 struct ice_txq_meta { 210 u32 q_teid; /* Tx-scheduler element identifier */ 211 u16 q_id; /* Entry in VSI's txq_map bitmap */ 212 u16 q_handle; /* Relative index of Tx queue within TC */ 213 u16 vsi_idx; /* VSI index that Tx queue belongs to */ 214 u8 tc; /* TC number that Tx queue belongs to */ 215 }; 216 217 struct ice_tc_info { 218 u16 qoffset; 219 u16 qcount_tx; 220 u16 qcount_rx; 221 u8 netdev_tc; 222 }; 223 224 struct ice_tc_cfg { 225 u8 numtc; /* Total number of enabled TCs */ 226 u16 ena_tc; /* Tx map */ 227 struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS]; 228 }; 229 230 struct ice_res_tracker { 231 u16 num_entries; 232 u16 end; 233 u16 list[]; 234 }; 235 236 struct ice_qs_cfg { 237 struct mutex *qs_mutex; /* will be assigned to &pf->avail_q_mutex */ 238 unsigned long *pf_map; 239 unsigned long pf_map_size; 240 unsigned int q_count; 241 unsigned int scatter_count; 242 u16 *vsi_map; 243 u16 vsi_map_offset; 244 u8 mapping_mode; 245 }; 246 247 struct ice_sw { 248 struct ice_pf *pf; 249 u16 sw_id; /* switch ID for this switch */ 250 u16 bridge_mode; /* VEB/VEPA/Port Virtualizer */ 251 struct ice_vsi *dflt_vsi; /* default VSI for this switch */ 252 u8 dflt_vsi_ena:1; /* true if above dflt_vsi is enabled */ 253 }; 254 255 enum ice_pf_state { 256 ICE_TESTING, 257 ICE_DOWN, 258 ICE_NEEDS_RESTART, 259 ICE_PREPARED_FOR_RESET, /* set by driver when prepared */ 260 ICE_RESET_OICR_RECV, /* set by driver after rcv reset OICR */ 261 ICE_PFR_REQ, /* set by driver */ 262 ICE_CORER_REQ, /* set by driver */ 263 ICE_GLOBR_REQ, /* set by driver */ 264 ICE_CORER_RECV, /* set by OICR handler */ 265 ICE_GLOBR_RECV, /* set by OICR handler */ 266 ICE_EMPR_RECV, /* set by OICR handler */ 267 ICE_SUSPENDED, /* set on module remove path */ 268 ICE_RESET_FAILED, /* set by reset/rebuild */ 269 /* When checking for the PF to be in a nominal operating state, the 270 * bits that are grouped at the beginning of the list need to be 271 * checked. Bits occurring before ICE_STATE_NOMINAL_CHECK_BITS will 272 * be checked. If you need to add a bit into consideration for nominal 273 * operating state, it must be added before 274 * ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position 275 * without appropriate consideration. 276 */ 277 ICE_STATE_NOMINAL_CHECK_BITS, 278 ICE_ADMINQ_EVENT_PENDING, 279 ICE_MAILBOXQ_EVENT_PENDING, 280 ICE_SIDEBANDQ_EVENT_PENDING, 281 ICE_MDD_EVENT_PENDING, 282 ICE_VFLR_EVENT_PENDING, 283 ICE_FLTR_OVERFLOW_PROMISC, 284 ICE_VF_DIS, 285 ICE_VF_DEINIT_IN_PROGRESS, 286 ICE_CFG_BUSY, 287 ICE_SERVICE_SCHED, 288 ICE_SERVICE_DIS, 289 ICE_FD_FLUSH_REQ, 290 ICE_OICR_INTR_DIS, /* Global OICR interrupt disabled */ 291 ICE_MDD_VF_PRINT_PENDING, /* set when MDD event handle */ 292 ICE_VF_RESETS_DISABLED, /* disable resets during ice_remove */ 293 ICE_LINK_DEFAULT_OVERRIDE_PENDING, 294 ICE_PHY_INIT_COMPLETE, 295 ICE_FD_VF_FLUSH_CTX, /* set at FD Rx IRQ or timeout */ 296 ICE_STATE_NBITS /* must be last */ 297 }; 298 299 enum ice_vsi_state { 300 ICE_VSI_DOWN, 301 ICE_VSI_NEEDS_RESTART, 302 ICE_VSI_NETDEV_ALLOCD, 303 ICE_VSI_NETDEV_REGISTERED, 304 ICE_VSI_UMAC_FLTR_CHANGED, 305 ICE_VSI_MMAC_FLTR_CHANGED, 306 ICE_VSI_VLAN_FLTR_CHANGED, 307 ICE_VSI_PROMISC_CHANGED, 308 ICE_VSI_STATE_NBITS /* must be last */ 309 }; 310 311 /* struct that defines a VSI, associated with a dev */ 312 struct ice_vsi { 313 struct net_device *netdev; 314 struct ice_sw *vsw; /* switch this VSI is on */ 315 struct ice_pf *back; /* back pointer to PF */ 316 struct ice_port_info *port_info; /* back pointer to port_info */ 317 struct ice_rx_ring **rx_rings; /* Rx ring array */ 318 struct ice_tx_ring **tx_rings; /* Tx ring array */ 319 struct ice_q_vector **q_vectors; /* q_vector array */ 320 321 irqreturn_t (*irq_handler)(int irq, void *data); 322 323 u64 tx_linearize; 324 DECLARE_BITMAP(state, ICE_VSI_STATE_NBITS); 325 unsigned int current_netdev_flags; 326 u32 tx_restart; 327 u32 tx_busy; 328 u32 rx_buf_failed; 329 u32 rx_page_failed; 330 u16 num_q_vectors; 331 u16 base_vector; /* IRQ base for OS reserved vectors */ 332 enum ice_vsi_type type; 333 u16 vsi_num; /* HW (absolute) index of this VSI */ 334 u16 idx; /* software index in pf->vsi[] */ 335 336 s16 vf_id; /* VF ID for SR-IOV VSIs */ 337 338 u16 ethtype; /* Ethernet protocol for pause frame */ 339 u16 num_gfltr; 340 u16 num_bfltr; 341 342 /* RSS config */ 343 u16 rss_table_size; /* HW RSS table size */ 344 u16 rss_size; /* Allocated RSS queues */ 345 u8 *rss_hkey_user; /* User configured hash keys */ 346 u8 *rss_lut_user; /* User configured lookup table entries */ 347 u8 rss_lut_type; /* used to configure Get/Set RSS LUT AQ call */ 348 349 /* aRFS members only allocated for the PF VSI */ 350 #define ICE_MAX_ARFS_LIST 1024 351 #define ICE_ARFS_LST_MASK (ICE_MAX_ARFS_LIST - 1) 352 struct hlist_head *arfs_fltr_list; 353 struct ice_arfs_active_fltr_cntrs *arfs_fltr_cntrs; 354 spinlock_t arfs_lock; /* protects aRFS hash table and filter state */ 355 atomic_t *arfs_last_fltr_id; 356 357 u16 max_frame; 358 u16 rx_buf_len; 359 360 struct ice_aqc_vsi_props info; /* VSI properties */ 361 362 /* VSI stats */ 363 struct rtnl_link_stats64 net_stats; 364 struct ice_eth_stats eth_stats; 365 struct ice_eth_stats eth_stats_prev; 366 367 struct list_head tmp_sync_list; /* MAC filters to be synced */ 368 struct list_head tmp_unsync_list; /* MAC filters to be unsynced */ 369 370 u8 irqs_ready:1; 371 u8 current_isup:1; /* Sync 'link up' logging */ 372 u8 stat_offsets_loaded:1; 373 u16 num_vlan; 374 375 /* queue information */ 376 u8 tx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 377 u8 rx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 378 u16 *txq_map; /* index in pf->avail_txqs */ 379 u16 *rxq_map; /* index in pf->avail_rxqs */ 380 u16 alloc_txq; /* Allocated Tx queues */ 381 u16 num_txq; /* Used Tx queues */ 382 u16 alloc_rxq; /* Allocated Rx queues */ 383 u16 num_rxq; /* Used Rx queues */ 384 u16 req_txq; /* User requested Tx queues */ 385 u16 req_rxq; /* User requested Rx queues */ 386 u16 num_rx_desc; 387 u16 num_tx_desc; 388 u16 qset_handle[ICE_MAX_TRAFFIC_CLASS]; 389 struct ice_tc_cfg tc_cfg; 390 struct bpf_prog *xdp_prog; 391 struct ice_tx_ring **xdp_rings; /* XDP ring array */ 392 unsigned long *af_xdp_zc_qps; /* tracks AF_XDP ZC enabled qps */ 393 u16 num_xdp_txq; /* Used XDP queues */ 394 u8 xdp_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 395 396 struct net_device **target_netdevs; 397 398 struct tc_mqprio_qopt_offload mqprio_qopt; /* queue parameters */ 399 400 /* Channel Specific Fields */ 401 struct ice_vsi *tc_map_vsi[ICE_CHNL_MAX_TC]; 402 u16 cnt_q_avail; 403 u16 next_base_q; /* next queue to be used for channel setup */ 404 struct list_head ch_list; 405 u16 num_chnl_rxq; 406 u16 num_chnl_txq; 407 u16 ch_rss_size; 408 u16 num_chnl_fltr; 409 /* store away rss size info before configuring ADQ channels so that, 410 * it can be used after tc-qdisc delete, to get back RSS setting as 411 * they were before 412 */ 413 u16 orig_rss_size; 414 /* this keeps tracks of all enabled TC with and without DCB 415 * and inclusive of ADQ, vsi->mqprio_opt keeps track of queue 416 * information 417 */ 418 u8 all_numtc; 419 u16 all_enatc; 420 421 /* store away TC info, to be used for rebuild logic */ 422 u8 old_numtc; 423 u16 old_ena_tc; 424 425 struct ice_channel *ch; 426 427 /* setup back reference, to which aggregator node this VSI 428 * corresponds to 429 */ 430 struct ice_agg_node *agg_node; 431 } ____cacheline_internodealigned_in_smp; 432 433 /* struct that defines an interrupt vector */ 434 struct ice_q_vector { 435 struct ice_vsi *vsi; 436 437 u16 v_idx; /* index in the vsi->q_vector array. */ 438 u16 reg_idx; 439 u8 num_ring_rx; /* total number of Rx rings in vector */ 440 u8 num_ring_tx; /* total number of Tx rings in vector */ 441 u8 wb_on_itr:1; /* if true, WB on ITR is enabled */ 442 /* in usecs, need to use ice_intrl_to_usecs_reg() before writing this 443 * value to the device 444 */ 445 u8 intrl; 446 447 struct napi_struct napi; 448 449 struct ice_ring_container rx; 450 struct ice_ring_container tx; 451 452 cpumask_t affinity_mask; 453 struct irq_affinity_notify affinity_notify; 454 455 struct ice_channel *ch; 456 457 char name[ICE_INT_NAME_STR_LEN]; 458 459 u16 total_events; /* net_dim(): number of interrupts processed */ 460 } ____cacheline_internodealigned_in_smp; 461 462 enum ice_pf_flags { 463 ICE_FLAG_FLTR_SYNC, 464 ICE_FLAG_RDMA_ENA, 465 ICE_FLAG_RSS_ENA, 466 ICE_FLAG_SRIOV_ENA, 467 ICE_FLAG_SRIOV_CAPABLE, 468 ICE_FLAG_DCB_CAPABLE, 469 ICE_FLAG_DCB_ENA, 470 ICE_FLAG_FD_ENA, 471 ICE_FLAG_PTP_SUPPORTED, /* PTP is supported by NVM */ 472 ICE_FLAG_PTP, /* PTP is enabled by software */ 473 ICE_FLAG_AUX_ENA, 474 ICE_FLAG_ADV_FEATURES, 475 ICE_FLAG_TC_MQPRIO, /* support for Multi queue TC */ 476 ICE_FLAG_CLS_FLOWER, 477 ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA, 478 ICE_FLAG_TOTAL_PORT_SHUTDOWN_ENA, 479 ICE_FLAG_NO_MEDIA, 480 ICE_FLAG_FW_LLDP_AGENT, 481 ICE_FLAG_MOD_POWER_UNSUPPORTED, 482 ICE_FLAG_ETHTOOL_CTXT, /* set when ethtool holds RTNL lock */ 483 ICE_FLAG_LEGACY_RX, 484 ICE_FLAG_VF_TRUE_PROMISC_ENA, 485 ICE_FLAG_MDD_AUTO_RESET_VF, 486 ICE_FLAG_LINK_LENIENT_MODE_ENA, 487 ICE_PF_FLAGS_NBITS /* must be last */ 488 }; 489 490 struct ice_switchdev_info { 491 struct ice_vsi *control_vsi; 492 struct ice_vsi *uplink_vsi; 493 bool is_running; 494 }; 495 496 struct ice_agg_node { 497 u32 agg_id; 498 #define ICE_MAX_VSIS_IN_AGG_NODE 64 499 u32 num_vsis; 500 u8 valid; 501 }; 502 503 struct ice_pf { 504 struct pci_dev *pdev; 505 506 struct devlink_region *nvm_region; 507 struct devlink_region *devcaps_region; 508 509 /* devlink port data */ 510 struct devlink_port devlink_port; 511 512 /* OS reserved IRQ details */ 513 struct msix_entry *msix_entries; 514 struct ice_res_tracker *irq_tracker; 515 /* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the 516 * number of MSIX vectors needed for all SR-IOV VFs from the number of 517 * MSIX vectors allowed on this PF. 518 */ 519 u16 sriov_base_vector; 520 521 u16 ctrl_vsi_idx; /* control VSI index in pf->vsi array */ 522 523 struct ice_vsi **vsi; /* VSIs created by the driver */ 524 struct ice_sw *first_sw; /* first switch created by firmware */ 525 u16 eswitch_mode; /* current mode of eswitch */ 526 /* Virtchnl/SR-IOV config info */ 527 struct ice_vf *vf; 528 u16 num_alloc_vfs; /* actual number of VFs allocated */ 529 u16 num_vfs_supported; /* num VFs supported for this PF */ 530 u16 num_qps_per_vf; 531 u16 num_msix_per_vf; 532 /* used to ratelimit the MDD event logging */ 533 unsigned long last_printed_mdd_jiffies; 534 DECLARE_BITMAP(malvfs, ICE_MAX_VF_COUNT); 535 DECLARE_BITMAP(features, ICE_F_MAX); 536 DECLARE_BITMAP(state, ICE_STATE_NBITS); 537 DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS); 538 unsigned long *avail_txqs; /* bitmap to track PF Tx queue usage */ 539 unsigned long *avail_rxqs; /* bitmap to track PF Rx queue usage */ 540 unsigned long serv_tmr_period; 541 unsigned long serv_tmr_prev; 542 struct timer_list serv_tmr; 543 struct work_struct serv_task; 544 struct mutex avail_q_mutex; /* protects access to avail_[rx|tx]qs */ 545 struct mutex sw_mutex; /* lock for protecting VSI alloc flow */ 546 struct mutex tc_mutex; /* lock to protect TC changes */ 547 u32 msg_enable; 548 struct ice_ptp ptp; 549 u16 num_rdma_msix; /* Total MSIX vectors for RDMA driver */ 550 u16 rdma_base_vector; 551 552 /* spinlock to protect the AdminQ wait list */ 553 spinlock_t aq_wait_lock; 554 struct hlist_head aq_wait_list; 555 wait_queue_head_t aq_wait_queue; 556 557 wait_queue_head_t reset_wait_queue; 558 559 u32 hw_csum_rx_error; 560 u16 oicr_idx; /* Other interrupt cause MSIX vector index */ 561 u16 num_avail_sw_msix; /* remaining MSIX SW vectors left unclaimed */ 562 u16 max_pf_txqs; /* Total Tx queues PF wide */ 563 u16 max_pf_rxqs; /* Total Rx queues PF wide */ 564 u16 num_lan_msix; /* Total MSIX vectors for base driver */ 565 u16 num_lan_tx; /* num LAN Tx queues setup */ 566 u16 num_lan_rx; /* num LAN Rx queues setup */ 567 u16 next_vsi; /* Next free slot in pf->vsi[] - 0-based! */ 568 u16 num_alloc_vsi; 569 u16 corer_count; /* Core reset count */ 570 u16 globr_count; /* Global reset count */ 571 u16 empr_count; /* EMP reset count */ 572 u16 pfr_count; /* PF reset count */ 573 574 u8 wol_ena : 1; /* software state of WoL */ 575 u32 wakeup_reason; /* last wakeup reason */ 576 struct ice_hw_port_stats stats; 577 struct ice_hw_port_stats stats_prev; 578 struct ice_hw hw; 579 u8 stat_prev_loaded:1; /* has previous stats been loaded */ 580 u16 dcbx_cap; 581 u32 tx_timeout_count; 582 unsigned long tx_timeout_last_recovery; 583 u32 tx_timeout_recovery_level; 584 char int_name[ICE_INT_NAME_STR_LEN]; 585 struct auxiliary_device *adev; 586 int aux_idx; 587 u32 sw_int_count; 588 /* count of tc_flower filters specific to channel (aka where filter 589 * action is "hw_tc <tc_num>") 590 */ 591 u16 num_dmac_chnl_fltrs; 592 struct hlist_head tc_flower_fltr_list; 593 594 __le64 nvm_phy_type_lo; /* NVM PHY type low */ 595 __le64 nvm_phy_type_hi; /* NVM PHY type high */ 596 struct ice_link_default_override_tlv link_dflt_override; 597 struct ice_lag *lag; /* Link Aggregation information */ 598 599 struct ice_switchdev_info switchdev; 600 601 #define ICE_INVALID_AGG_NODE_ID 0 602 #define ICE_PF_AGG_NODE_ID_START 1 603 #define ICE_MAX_PF_AGG_NODES 32 604 struct ice_agg_node pf_agg_node[ICE_MAX_PF_AGG_NODES]; 605 #define ICE_VF_AGG_NODE_ID_START 65 606 #define ICE_MAX_VF_AGG_NODES 32 607 struct ice_agg_node vf_agg_node[ICE_MAX_VF_AGG_NODES]; 608 }; 609 610 struct ice_netdev_priv { 611 struct ice_vsi *vsi; 612 struct ice_repr *repr; 613 }; 614 615 /** 616 * ice_vector_ch_enabled 617 * @qv: pointer to q_vector, can be NULL 618 * 619 * This function returns true if vector is channel enabled otherwise false 620 */ 621 static inline bool ice_vector_ch_enabled(struct ice_q_vector *qv) 622 { 623 return !!qv->ch; /* Enable it to run with TC */ 624 } 625 626 /** 627 * ice_irq_dynamic_ena - Enable default interrupt generation settings 628 * @hw: pointer to HW struct 629 * @vsi: pointer to VSI struct, can be NULL 630 * @q_vector: pointer to q_vector, can be NULL 631 */ 632 static inline void 633 ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi, 634 struct ice_q_vector *q_vector) 635 { 636 u32 vector = (vsi && q_vector) ? q_vector->reg_idx : 637 ((struct ice_pf *)hw->back)->oicr_idx; 638 int itr = ICE_ITR_NONE; 639 u32 val; 640 641 /* clear the PBA here, as this function is meant to clean out all 642 * previous interrupts and enable the interrupt 643 */ 644 val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M | 645 (itr << GLINT_DYN_CTL_ITR_INDX_S); 646 if (vsi) 647 if (test_bit(ICE_VSI_DOWN, vsi->state)) 648 return; 649 wr32(hw, GLINT_DYN_CTL(vector), val); 650 } 651 652 /** 653 * ice_netdev_to_pf - Retrieve the PF struct associated with a netdev 654 * @netdev: pointer to the netdev struct 655 */ 656 static inline struct ice_pf *ice_netdev_to_pf(struct net_device *netdev) 657 { 658 struct ice_netdev_priv *np = netdev_priv(netdev); 659 660 return np->vsi->back; 661 } 662 663 static inline bool ice_is_xdp_ena_vsi(struct ice_vsi *vsi) 664 { 665 return !!vsi->xdp_prog; 666 } 667 668 static inline void ice_set_ring_xdp(struct ice_tx_ring *ring) 669 { 670 ring->flags |= ICE_TX_FLAGS_RING_XDP; 671 } 672 673 /** 674 * ice_xsk_pool - get XSK buffer pool bound to a ring 675 * @ring: Rx ring to use 676 * 677 * Returns a pointer to xdp_umem structure if there is a buffer pool present, 678 * NULL otherwise. 679 */ 680 static inline struct xsk_buff_pool *ice_xsk_pool(struct ice_rx_ring *ring) 681 { 682 struct ice_vsi *vsi = ring->vsi; 683 u16 qid = ring->q_index; 684 685 if (!ice_is_xdp_ena_vsi(vsi) || !test_bit(qid, vsi->af_xdp_zc_qps)) 686 return NULL; 687 688 return xsk_get_pool_from_qid(vsi->netdev, qid); 689 } 690 691 /** 692 * ice_tx_xsk_pool - get XSK buffer pool bound to a ring 693 * @ring: Tx ring to use 694 * 695 * Returns a pointer to xdp_umem structure if there is a buffer pool present, 696 * NULL otherwise. Tx equivalent of ice_xsk_pool. 697 */ 698 static inline struct xsk_buff_pool *ice_tx_xsk_pool(struct ice_tx_ring *ring) 699 { 700 struct ice_vsi *vsi = ring->vsi; 701 u16 qid; 702 703 qid = ring->q_index - vsi->num_xdp_txq; 704 705 if (!ice_is_xdp_ena_vsi(vsi) || !test_bit(qid, vsi->af_xdp_zc_qps)) 706 return NULL; 707 708 return xsk_get_pool_from_qid(vsi->netdev, qid); 709 } 710 711 /** 712 * ice_get_main_vsi - Get the PF VSI 713 * @pf: PF instance 714 * 715 * returns pf->vsi[0], which by definition is the PF VSI 716 */ 717 static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf) 718 { 719 if (pf->vsi) 720 return pf->vsi[0]; 721 722 return NULL; 723 } 724 725 /** 726 * ice_get_netdev_priv_vsi - return VSI associated with netdev priv. 727 * @np: private netdev structure 728 */ 729 static inline struct ice_vsi *ice_get_netdev_priv_vsi(struct ice_netdev_priv *np) 730 { 731 /* In case of port representor return source port VSI. */ 732 if (np->repr) 733 return np->repr->src_vsi; 734 else 735 return np->vsi; 736 } 737 738 /** 739 * ice_get_ctrl_vsi - Get the control VSI 740 * @pf: PF instance 741 */ 742 static inline struct ice_vsi *ice_get_ctrl_vsi(struct ice_pf *pf) 743 { 744 /* if pf->ctrl_vsi_idx is ICE_NO_VSI, control VSI was not set up */ 745 if (!pf->vsi || pf->ctrl_vsi_idx == ICE_NO_VSI) 746 return NULL; 747 748 return pf->vsi[pf->ctrl_vsi_idx]; 749 } 750 751 /** 752 * ice_is_switchdev_running - check if switchdev is configured 753 * @pf: pointer to PF structure 754 * 755 * Returns true if eswitch mode is set to DEVLINK_ESWITCH_MODE_SWITCHDEV 756 * and switchdev is configured, false otherwise. 757 */ 758 static inline bool ice_is_switchdev_running(struct ice_pf *pf) 759 { 760 return pf->switchdev.is_running; 761 } 762 763 /** 764 * ice_set_sriov_cap - enable SRIOV in PF flags 765 * @pf: PF struct 766 */ 767 static inline void ice_set_sriov_cap(struct ice_pf *pf) 768 { 769 if (pf->hw.func_caps.common_cap.sr_iov_1_1) 770 set_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags); 771 } 772 773 /** 774 * ice_clear_sriov_cap - disable SRIOV in PF flags 775 * @pf: PF struct 776 */ 777 static inline void ice_clear_sriov_cap(struct ice_pf *pf) 778 { 779 clear_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags); 780 } 781 782 #define ICE_FD_STAT_CTR_BLOCK_COUNT 256 783 #define ICE_FD_STAT_PF_IDX(base_idx) \ 784 ((base_idx) * ICE_FD_STAT_CTR_BLOCK_COUNT) 785 #define ICE_FD_SB_STAT_IDX(base_idx) ICE_FD_STAT_PF_IDX(base_idx) 786 787 /** 788 * ice_is_adq_active - any active ADQs 789 * @pf: pointer to PF 790 * 791 * This function returns true if there are any ADQs configured (which is 792 * determined by looking at VSI type (which should be VSI_PF), numtc, and 793 * TC_MQPRIO flag) otherwise return false 794 */ 795 static inline bool ice_is_adq_active(struct ice_pf *pf) 796 { 797 struct ice_vsi *vsi; 798 799 vsi = ice_get_main_vsi(pf); 800 if (!vsi) 801 return false; 802 803 /* is ADQ configured */ 804 if (vsi->tc_cfg.numtc > ICE_CHNL_START_TC && 805 test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) 806 return true; 807 808 return false; 809 } 810 811 bool netif_is_ice(struct net_device *dev); 812 int ice_vsi_setup_tx_rings(struct ice_vsi *vsi); 813 int ice_vsi_setup_rx_rings(struct ice_vsi *vsi); 814 int ice_vsi_open_ctrl(struct ice_vsi *vsi); 815 int ice_vsi_open(struct ice_vsi *vsi); 816 void ice_set_ethtool_ops(struct net_device *netdev); 817 void ice_set_ethtool_repr_ops(struct net_device *netdev); 818 void ice_set_ethtool_safe_mode_ops(struct net_device *netdev); 819 u16 ice_get_avail_txq_count(struct ice_pf *pf); 820 u16 ice_get_avail_rxq_count(struct ice_pf *pf); 821 int ice_vsi_recfg_qs(struct ice_vsi *vsi, int new_rx, int new_tx); 822 void ice_update_vsi_stats(struct ice_vsi *vsi); 823 void ice_update_pf_stats(struct ice_pf *pf); 824 int ice_up(struct ice_vsi *vsi); 825 int ice_down(struct ice_vsi *vsi); 826 int ice_vsi_cfg(struct ice_vsi *vsi); 827 struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi); 828 int ice_vsi_determine_xdp_res(struct ice_vsi *vsi); 829 int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog); 830 int ice_destroy_xdp_rings(struct ice_vsi *vsi); 831 int 832 ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames, 833 u32 flags); 834 int ice_set_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size); 835 int ice_get_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size); 836 int ice_set_rss_key(struct ice_vsi *vsi, u8 *seed); 837 int ice_get_rss_key(struct ice_vsi *vsi, u8 *seed); 838 void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size); 839 int ice_schedule_reset(struct ice_pf *pf, enum ice_reset_req reset); 840 void ice_print_link_msg(struct ice_vsi *vsi, bool isup); 841 int ice_plug_aux_dev(struct ice_pf *pf); 842 void ice_unplug_aux_dev(struct ice_pf *pf); 843 int ice_init_rdma(struct ice_pf *pf); 844 const char *ice_stat_str(enum ice_status stat_err); 845 const char *ice_aq_str(enum ice_aq_err aq_err); 846 bool ice_is_wol_supported(struct ice_hw *hw); 847 int 848 ice_fdir_write_fltr(struct ice_pf *pf, struct ice_fdir_fltr *input, bool add, 849 bool is_tun); 850 void ice_vsi_manage_fdir(struct ice_vsi *vsi, bool ena); 851 int ice_add_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd); 852 int ice_del_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd); 853 int ice_get_ethtool_fdir_entry(struct ice_hw *hw, struct ethtool_rxnfc *cmd); 854 int 855 ice_get_fdir_fltr_ids(struct ice_hw *hw, struct ethtool_rxnfc *cmd, 856 u32 *rule_locs); 857 void ice_fdir_release_flows(struct ice_hw *hw); 858 void ice_fdir_replay_flows(struct ice_hw *hw); 859 void ice_fdir_replay_fltrs(struct ice_pf *pf); 860 int ice_fdir_create_dflt_rules(struct ice_pf *pf); 861 int ice_aq_wait_for_event(struct ice_pf *pf, u16 opcode, unsigned long timeout, 862 struct ice_rq_event_info *event); 863 int ice_open(struct net_device *netdev); 864 int ice_open_internal(struct net_device *netdev); 865 int ice_stop(struct net_device *netdev); 866 void ice_service_task_schedule(struct ice_pf *pf); 867 868 /** 869 * ice_set_rdma_cap - enable RDMA support 870 * @pf: PF struct 871 */ 872 static inline void ice_set_rdma_cap(struct ice_pf *pf) 873 { 874 if (pf->hw.func_caps.common_cap.rdma && pf->num_rdma_msix) { 875 set_bit(ICE_FLAG_RDMA_ENA, pf->flags); 876 set_bit(ICE_FLAG_AUX_ENA, pf->flags); 877 ice_plug_aux_dev(pf); 878 } 879 } 880 881 /** 882 * ice_clear_rdma_cap - disable RDMA support 883 * @pf: PF struct 884 */ 885 static inline void ice_clear_rdma_cap(struct ice_pf *pf) 886 { 887 ice_unplug_aux_dev(pf); 888 clear_bit(ICE_FLAG_RDMA_ENA, pf->flags); 889 clear_bit(ICE_FLAG_AUX_ENA, pf->flags); 890 } 891 #endif /* _ICE_H_ */ 892