1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2018, Intel Corporation. */ 3 4 #ifndef _ICE_H_ 5 #define _ICE_H_ 6 7 #include <linux/types.h> 8 #include <linux/errno.h> 9 #include <linux/kernel.h> 10 #include <linux/module.h> 11 #include <linux/firmware.h> 12 #include <linux/netdevice.h> 13 #include <linux/compiler.h> 14 #include <linux/etherdevice.h> 15 #include <linux/skbuff.h> 16 #include <linux/cpumask.h> 17 #include <linux/rtnetlink.h> 18 #include <linux/if_vlan.h> 19 #include <linux/dma-mapping.h> 20 #include <linux/pci.h> 21 #include <linux/workqueue.h> 22 #include <linux/wait.h> 23 #include <linux/interrupt.h> 24 #include <linux/ethtool.h> 25 #include <linux/timer.h> 26 #include <linux/delay.h> 27 #include <linux/bitmap.h> 28 #include <linux/log2.h> 29 #include <linux/ip.h> 30 #include <linux/sctp.h> 31 #include <linux/ipv6.h> 32 #include <linux/pkt_sched.h> 33 #include <linux/if_bridge.h> 34 #include <linux/ctype.h> 35 #include <linux/linkmode.h> 36 #include <linux/bpf.h> 37 #include <linux/btf.h> 38 #include <linux/auxiliary_bus.h> 39 #include <linux/avf/virtchnl.h> 40 #include <linux/cpu_rmap.h> 41 #include <linux/dim.h> 42 #include <linux/gnss.h> 43 #include <net/pkt_cls.h> 44 #include <net/pkt_sched.h> 45 #include <net/tc_act/tc_mirred.h> 46 #include <net/tc_act/tc_gact.h> 47 #include <net/ip.h> 48 #include <net/devlink.h> 49 #include <net/ipv6.h> 50 #include <net/xdp_sock.h> 51 #include <net/xdp_sock_drv.h> 52 #include <net/geneve.h> 53 #include <net/gre.h> 54 #include <net/udp_tunnel.h> 55 #include <net/vxlan.h> 56 #include <net/gtp.h> 57 #include <linux/ppp_defs.h> 58 #include "ice_devids.h" 59 #include "ice_type.h" 60 #include "ice_txrx.h" 61 #include "ice_dcb.h" 62 #include "ice_switch.h" 63 #include "ice_common.h" 64 #include "ice_flow.h" 65 #include "ice_sched.h" 66 #include "ice_idc_int.h" 67 #include "ice_sriov.h" 68 #include "ice_vf_mbx.h" 69 #include "ice_ptp.h" 70 #include "ice_tspll.h" 71 #include "ice_fdir.h" 72 #include "ice_xsk.h" 73 #include "ice_arfs.h" 74 #include "ice_repr.h" 75 #include "ice_eswitch.h" 76 #include "ice_lag.h" 77 #include "ice_vsi_vlan_ops.h" 78 #include "ice_gnss.h" 79 #include "ice_irq.h" 80 #include "ice_dpll.h" 81 #include "ice_adapter.h" 82 #include "devlink/health.h" 83 84 #define ICE_BAR0 0 85 #define ICE_REQ_DESC_MULTIPLE 32 86 #define ICE_MIN_NUM_DESC 64 87 #define ICE_MAX_NUM_DESC_E810 8160 88 #define ICE_MAX_NUM_DESC_E830 8096 89 #define ICE_MAX_NUM_DESC_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? \ 90 ICE_MAX_NUM_DESC_E830 : \ 91 ICE_MAX_NUM_DESC_E810) 92 #define ICE_DFLT_MIN_RX_DESC 512 93 #define ICE_DFLT_NUM_TX_DESC 256 94 #define ICE_DFLT_NUM_RX_DESC 2048 95 96 #define ICE_DFLT_TRAFFIC_CLASS BIT(0) 97 #define ICE_INT_NAME_STR_LEN (IFNAMSIZ + 16) 98 #define ICE_AQ_LEN 192 99 #define ICE_MBXSQ_LEN 64 100 #define ICE_SBQ_LEN 64 101 #define ICE_MIN_LAN_TXRX_MSIX 1 102 #define ICE_MIN_LAN_OICR_MSIX 1 103 #define ICE_MIN_MSIX (ICE_MIN_LAN_TXRX_MSIX + ICE_MIN_LAN_OICR_MSIX) 104 #define ICE_FDIR_MSIX 2 105 #define ICE_NO_VSI 0xffff 106 #define ICE_VSI_MAP_CONTIG 0 107 #define ICE_VSI_MAP_SCATTER 1 108 #define ICE_MAX_SCATTER_TXQS 16 109 #define ICE_MAX_SCATTER_RXQS 16 110 #define ICE_Q_WAIT_RETRY_LIMIT 10 111 #define ICE_Q_WAIT_MAX_RETRY (5 * ICE_Q_WAIT_RETRY_LIMIT) 112 #define ICE_MAX_LG_RSS_QS 256 113 #define ICE_INVAL_Q_INDEX 0xffff 114 115 #define ICE_MAX_RXQS_PER_TC 256 /* Used when setting VSI context per TC Rx queues */ 116 117 #define ICE_CHNL_START_TC 1 118 119 #define ICE_MAX_RESET_WAIT 20 120 121 #define ICE_VSIQF_HKEY_ARRAY_SIZE ((VSIQF_HKEY_MAX_INDEX + 1) * 4) 122 123 #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK) 124 125 #define ICE_MAX_MTU (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD) 126 127 #define ICE_MAX_TSO_SIZE 131072 128 129 #define ICE_UP_TABLE_TRANSLATE(val, i) \ 130 (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \ 131 ICE_AQ_VSI_UP_TABLE_UP##i##_M) 132 133 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i])) 134 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i])) 135 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i])) 136 #define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i])) 137 138 /* Minimum BW limit is 500 Kbps for any scheduler node */ 139 #define ICE_MIN_BW_LIMIT 500 140 /* User can specify BW in either Kbit/Mbit/Gbit and OS converts it in bytes. 141 * use it to convert user specified BW limit into Kbps 142 */ 143 #define ICE_BW_KBPS_DIVISOR 125 144 145 /* Default recipes have priority 4 and below, hence priority values between 5..7 146 * can be used as filter priority for advanced switch filter (advanced switch 147 * filters need new recipe to be created for specified extraction sequence 148 * because default recipe extraction sequence does not represent custom 149 * extraction) 150 */ 151 #define ICE_SWITCH_FLTR_PRIO_QUEUE 7 152 /* prio 6 is reserved for future use (e.g. switch filter with L3 fields + 153 * (Optional: IP TOS/TTL) + L4 fields + (optionally: TCP fields such as 154 * SYN/FIN/RST)) 155 */ 156 #define ICE_SWITCH_FLTR_PRIO_RSVD 6 157 #define ICE_SWITCH_FLTR_PRIO_VSI 5 158 #define ICE_SWITCH_FLTR_PRIO_QGRP ICE_SWITCH_FLTR_PRIO_VSI 159 160 /* Macro for each VSI in a PF */ 161 #define ice_for_each_vsi(pf, i) \ 162 for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++) 163 164 /* Macros for each Tx/Xdp/Rx ring in a VSI */ 165 #define ice_for_each_txq(vsi, i) \ 166 for ((i) = 0; (i) < (vsi)->num_txq; (i)++) 167 168 #define ice_for_each_xdp_txq(vsi, i) \ 169 for ((i) = 0; (i) < (vsi)->num_xdp_txq; (i)++) 170 171 #define ice_for_each_rxq(vsi, i) \ 172 for ((i) = 0; (i) < (vsi)->num_rxq; (i)++) 173 174 /* Macros for each allocated Tx/Rx ring whether used or not in a VSI */ 175 #define ice_for_each_alloc_txq(vsi, i) \ 176 for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++) 177 178 #define ice_for_each_alloc_rxq(vsi, i) \ 179 for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++) 180 181 #define ice_for_each_q_vector(vsi, i) \ 182 for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++) 183 184 #define ice_for_each_chnl_tc(i) \ 185 for ((i) = ICE_CHNL_START_TC; (i) < ICE_CHNL_MAX_TC; (i)++) 186 187 #define ICE_UCAST_PROMISC_BITS ICE_PROMISC_UCAST_RX 188 189 #define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_RX | \ 190 ICE_PROMISC_VLAN_RX) 191 192 #define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX) 193 194 #define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \ 195 ICE_PROMISC_MCAST_RX | \ 196 ICE_PROMISC_VLAN_TX | \ 197 ICE_PROMISC_VLAN_RX) 198 199 #define ice_pf_to_dev(pf) (&((pf)->pdev->dev)) 200 201 enum ice_feature { 202 ICE_F_DSCP, 203 ICE_F_PHY_RCLK, 204 ICE_F_SMA_CTRL, 205 ICE_F_CGU, 206 ICE_F_GNSS, 207 ICE_F_TXTIME, 208 ICE_F_GCS, 209 ICE_F_ROCE_LAG, 210 ICE_F_SRIOV_LAG, 211 ICE_F_SRIOV_AA_LAG, 212 ICE_F_MBX_LIMIT, 213 ICE_F_MAX 214 }; 215 216 DECLARE_STATIC_KEY_FALSE(ice_xdp_locking_key); 217 218 struct ice_channel { 219 struct list_head list; 220 u8 type; 221 u16 sw_id; 222 u16 base_q; 223 u16 num_rxq; 224 u16 num_txq; 225 u16 vsi_num; 226 u8 ena_tc; 227 struct ice_aqc_vsi_props info; 228 u64 max_tx_rate; 229 u64 min_tx_rate; 230 atomic_t num_sb_fltr; 231 struct ice_vsi *ch_vsi; 232 }; 233 234 struct ice_txq_meta { 235 u32 q_teid; /* Tx-scheduler element identifier */ 236 u16 q_id; /* Entry in VSI's txq_map bitmap */ 237 u16 q_handle; /* Relative index of Tx queue within TC */ 238 u16 vsi_idx; /* VSI index that Tx queue belongs to */ 239 u8 tc; /* TC number that Tx queue belongs to */ 240 }; 241 242 struct ice_tc_info { 243 u16 qoffset; 244 u16 qcount_tx; 245 u16 qcount_rx; 246 u8 netdev_tc; 247 }; 248 249 struct ice_tc_cfg { 250 u8 numtc; /* Total number of enabled TCs */ 251 u16 ena_tc; /* Tx map */ 252 struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS]; 253 }; 254 255 struct ice_qs_cfg { 256 struct mutex *qs_mutex; /* will be assigned to &pf->avail_q_mutex */ 257 unsigned long *pf_map; 258 unsigned long pf_map_size; 259 unsigned int q_count; 260 unsigned int scatter_count; 261 u16 *vsi_map; 262 u16 vsi_map_offset; 263 u8 mapping_mode; 264 }; 265 266 struct ice_sw { 267 struct ice_pf *pf; 268 u16 sw_id; /* switch ID for this switch */ 269 u16 bridge_mode; /* VEB/VEPA/Port Virtualizer */ 270 }; 271 272 enum ice_pf_state { 273 ICE_TESTING, 274 ICE_DOWN, 275 ICE_NEEDS_RESTART, 276 ICE_PREPARED_FOR_RESET, /* set by driver when prepared */ 277 ICE_RESET_OICR_RECV, /* set by driver after rcv reset OICR */ 278 ICE_PFR_REQ, /* set by driver */ 279 ICE_CORER_REQ, /* set by driver */ 280 ICE_GLOBR_REQ, /* set by driver */ 281 ICE_CORER_RECV, /* set by OICR handler */ 282 ICE_GLOBR_RECV, /* set by OICR handler */ 283 ICE_EMPR_RECV, /* set by OICR handler */ 284 ICE_SUSPENDED, /* set on module remove path */ 285 ICE_RESET_FAILED, /* set by reset/rebuild */ 286 /* When checking for the PF to be in a nominal operating state, the 287 * bits that are grouped at the beginning of the list need to be 288 * checked. Bits occurring before ICE_STATE_NOMINAL_CHECK_BITS will 289 * be checked. If you need to add a bit into consideration for nominal 290 * operating state, it must be added before 291 * ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position 292 * without appropriate consideration. 293 */ 294 ICE_STATE_NOMINAL_CHECK_BITS, 295 ICE_ADMINQ_EVENT_PENDING, 296 ICE_MAILBOXQ_EVENT_PENDING, 297 ICE_SIDEBANDQ_EVENT_PENDING, 298 ICE_MDD_EVENT_PENDING, 299 ICE_VFLR_EVENT_PENDING, 300 ICE_FLTR_OVERFLOW_PROMISC, 301 ICE_VF_DIS, 302 ICE_CFG_BUSY, 303 ICE_SERVICE_SCHED, 304 ICE_SERVICE_DIS, 305 ICE_FD_FLUSH_REQ, 306 ICE_OICR_INTR_DIS, /* Global OICR interrupt disabled */ 307 ICE_MDD_VF_PRINT_PENDING, /* set when MDD event handle */ 308 ICE_VF_RESETS_DISABLED, /* disable resets during ice_remove */ 309 ICE_LINK_DEFAULT_OVERRIDE_PENDING, 310 ICE_PHY_INIT_COMPLETE, 311 ICE_FD_VF_FLUSH_CTX, /* set at FD Rx IRQ or timeout */ 312 ICE_AUX_ERR_PENDING, 313 ICE_STATE_NBITS /* must be last */ 314 }; 315 316 enum ice_vsi_state { 317 ICE_VSI_DOWN, 318 ICE_VSI_NEEDS_RESTART, 319 ICE_VSI_NETDEV_ALLOCD, 320 ICE_VSI_NETDEV_REGISTERED, 321 ICE_VSI_UMAC_FLTR_CHANGED, 322 ICE_VSI_MMAC_FLTR_CHANGED, 323 ICE_VSI_PROMISC_CHANGED, 324 ICE_VSI_REBUILD_PENDING, 325 ICE_VSI_STATE_NBITS /* must be last */ 326 }; 327 328 struct ice_vsi_stats { 329 struct ice_ring_stats **tx_ring_stats; /* Tx ring stats array */ 330 struct ice_ring_stats **rx_ring_stats; /* Rx ring stats array */ 331 }; 332 333 /* struct that defines a VSI, associated with a dev */ 334 struct ice_vsi { 335 struct net_device *netdev; 336 struct ice_sw *vsw; /* switch this VSI is on */ 337 struct ice_pf *back; /* back pointer to PF */ 338 struct ice_rx_ring **rx_rings; /* Rx ring array */ 339 struct ice_tx_ring **tx_rings; /* Tx ring array */ 340 struct ice_q_vector **q_vectors; /* q_vector array */ 341 342 irqreturn_t (*irq_handler)(int irq, void *data); 343 344 u64 tx_linearize; 345 DECLARE_BITMAP(state, ICE_VSI_STATE_NBITS); 346 unsigned int current_netdev_flags; 347 u32 tx_restart; 348 u32 tx_busy; 349 u32 rx_buf_failed; 350 u32 rx_page_failed; 351 u16 num_q_vectors; 352 /* tell if only dynamic irq allocation is allowed */ 353 bool irq_dyn_alloc; 354 355 u16 vsi_num; /* HW (absolute) index of this VSI */ 356 u16 idx; /* software index in pf->vsi[] */ 357 358 u16 num_gfltr; 359 u16 num_bfltr; 360 361 /* RSS config */ 362 u16 rss_table_size; /* HW RSS table size */ 363 u16 rss_size; /* Allocated RSS queues */ 364 u8 rss_hfunc; /* User configured hash type */ 365 u8 *rss_hkey_user; /* User configured hash keys */ 366 u8 *rss_lut_user; /* User configured lookup table entries */ 367 u8 rss_lut_type; /* used to configure Get/Set RSS LUT AQ call */ 368 369 /* aRFS members only allocated for the PF VSI */ 370 #define ICE_MAX_ARFS_LIST 1024 371 #define ICE_ARFS_LST_MASK (ICE_MAX_ARFS_LIST - 1) 372 struct hlist_head *arfs_fltr_list; 373 struct ice_arfs_active_fltr_cntrs *arfs_fltr_cntrs; 374 spinlock_t arfs_lock; /* protects aRFS hash table and filter state */ 375 atomic_t *arfs_last_fltr_id; 376 377 struct ice_aqc_vsi_props info; /* VSI properties */ 378 struct ice_vsi_vlan_info vlan_info; /* vlan config to be restored */ 379 380 /* VSI stats */ 381 struct rtnl_link_stats64 net_stats; 382 struct rtnl_link_stats64 net_stats_prev; 383 struct ice_eth_stats eth_stats; 384 struct ice_eth_stats eth_stats_prev; 385 386 struct list_head tmp_sync_list; /* MAC filters to be synced */ 387 struct list_head tmp_unsync_list; /* MAC filters to be unsynced */ 388 389 u8 irqs_ready:1; 390 u8 current_isup:1; /* Sync 'link up' logging */ 391 u8 stat_offsets_loaded:1; 392 struct ice_vsi_vlan_ops inner_vlan_ops; 393 struct ice_vsi_vlan_ops outer_vlan_ops; 394 u16 num_vlan; 395 396 /* queue information */ 397 u8 tx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 398 u8 rx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 399 u16 *txq_map; /* index in pf->avail_txqs */ 400 u16 *rxq_map; /* index in pf->avail_rxqs */ 401 u16 alloc_txq; /* Allocated Tx queues */ 402 u16 num_txq; /* Used Tx queues */ 403 u16 alloc_rxq; /* Allocated Rx queues */ 404 u16 num_rxq; /* Used Rx queues */ 405 u16 req_txq; /* User requested Tx queues */ 406 u16 req_rxq; /* User requested Rx queues */ 407 u16 num_rx_desc; 408 u16 num_tx_desc; 409 struct ice_tc_cfg tc_cfg; 410 struct bpf_prog *xdp_prog; 411 struct ice_tx_ring **xdp_rings; /* XDP ring array */ 412 u16 num_xdp_txq; /* Used XDP queues */ 413 u8 xdp_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 414 struct mutex xdp_state_lock; 415 416 struct net_device **target_netdevs; 417 418 struct tc_mqprio_qopt_offload mqprio_qopt; /* queue parameters */ 419 420 /* Channel Specific Fields */ 421 struct ice_vsi *tc_map_vsi[ICE_CHNL_MAX_TC]; 422 u16 cnt_q_avail; 423 u16 next_base_q; /* next queue to be used for channel setup */ 424 struct list_head ch_list; 425 u16 num_chnl_rxq; 426 u16 num_chnl_txq; 427 u16 ch_rss_size; 428 u16 num_chnl_fltr; 429 /* store away rss size info before configuring ADQ channels so that, 430 * it can be used after tc-qdisc delete, to get back RSS setting as 431 * they were before 432 */ 433 u16 orig_rss_size; 434 /* this keeps tracks of all enabled TC with and without DCB 435 * and inclusive of ADQ, vsi->mqprio_opt keeps track of queue 436 * information 437 */ 438 u8 all_numtc; 439 u16 all_enatc; 440 441 /* store away TC info, to be used for rebuild logic */ 442 u8 old_numtc; 443 u16 old_ena_tc; 444 445 /* setup back reference, to which aggregator node this VSI 446 * corresponds to 447 */ 448 struct ice_agg_node *agg_node; 449 450 struct_group_tagged(ice_vsi_cfg_params, params, 451 struct ice_port_info *port_info; /* back pointer to port_info */ 452 struct ice_channel *ch; /* VSI's channel structure, may be NULL */ 453 union { 454 /* VF associated with this VSI, may be NULL */ 455 struct ice_vf *vf; 456 /* SF associated with this VSI, may be NULL */ 457 struct ice_dynamic_port *sf; 458 }; 459 u32 flags; /* VSI flags used for rebuild and configuration */ 460 enum ice_vsi_type type; /* the type of the VSI */ 461 ); 462 } ____cacheline_internodealigned_in_smp; 463 464 /* struct that defines an interrupt vector */ 465 struct ice_q_vector { 466 struct ice_vsi *vsi; 467 468 u16 v_idx; /* index in the vsi->q_vector array. */ 469 u16 reg_idx; /* PF relative register index */ 470 u8 num_ring_rx; /* total number of Rx rings in vector */ 471 u8 num_ring_tx; /* total number of Tx rings in vector */ 472 u8 wb_on_itr:1; /* if true, WB on ITR is enabled */ 473 /* in usecs, need to use ice_intrl_to_usecs_reg() before writing this 474 * value to the device 475 */ 476 u8 intrl; 477 478 struct napi_struct napi; 479 480 struct ice_ring_container rx; 481 struct ice_ring_container tx; 482 483 struct ice_channel *ch; 484 485 char name[ICE_INT_NAME_STR_LEN]; 486 487 u16 total_events; /* net_dim(): number of interrupts processed */ 488 u16 vf_reg_idx; /* VF relative register index */ 489 struct msi_map irq; 490 } ____cacheline_internodealigned_in_smp; 491 492 enum ice_pf_flags { 493 ICE_FLAG_FLTR_SYNC, 494 ICE_FLAG_RDMA_ENA, 495 ICE_FLAG_RSS_ENA, 496 ICE_FLAG_SRIOV_ENA, 497 ICE_FLAG_SRIOV_CAPABLE, 498 ICE_FLAG_DCB_CAPABLE, 499 ICE_FLAG_DCB_ENA, 500 ICE_FLAG_FD_ENA, 501 ICE_FLAG_PTP_SUPPORTED, /* PTP is supported by NVM */ 502 ICE_FLAG_ADV_FEATURES, 503 ICE_FLAG_TC_MQPRIO, /* support for Multi queue TC */ 504 ICE_FLAG_CLS_FLOWER, 505 ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA, 506 ICE_FLAG_TOTAL_PORT_SHUTDOWN_ENA, 507 ICE_FLAG_NO_MEDIA, 508 ICE_FLAG_FW_LLDP_AGENT, 509 ICE_FLAG_MOD_POWER_UNSUPPORTED, 510 ICE_FLAG_PHY_FW_LOAD_FAILED, 511 ICE_FLAG_ETHTOOL_CTXT, /* set when ethtool holds RTNL lock */ 512 ICE_FLAG_LEGACY_RX, 513 ICE_FLAG_VF_TRUE_PROMISC_ENA, 514 ICE_FLAG_MDD_AUTO_RESET_VF, 515 ICE_FLAG_VF_VLAN_PRUNING, 516 ICE_FLAG_LINK_LENIENT_MODE_ENA, 517 ICE_FLAG_PLUG_AUX_DEV, 518 ICE_FLAG_UNPLUG_AUX_DEV, 519 ICE_FLAG_AUX_DEV_CREATED, 520 ICE_FLAG_MTU_CHANGED, 521 ICE_FLAG_GNSS, /* GNSS successfully initialized */ 522 ICE_FLAG_DPLL, /* SyncE/PTP dplls initialized */ 523 ICE_FLAG_LLDP_AQ_FLTR, 524 ICE_PF_FLAGS_NBITS /* must be last */ 525 }; 526 527 enum ice_misc_thread_tasks { 528 ICE_MISC_THREAD_TX_TSTAMP, 529 ICE_MISC_THREAD_NBITS /* must be last */ 530 }; 531 532 struct ice_eswitch { 533 struct ice_vsi *uplink_vsi; 534 struct ice_esw_br_offloads *br_offloads; 535 struct xarray reprs; 536 bool is_running; 537 }; 538 539 struct ice_agg_node { 540 u32 agg_id; 541 #define ICE_MAX_VSIS_IN_AGG_NODE 64 542 u32 num_vsis; 543 u8 valid; 544 }; 545 546 struct ice_pf_msix { 547 u32 cur; 548 u32 min; 549 u32 max; 550 u32 total; 551 u32 rest; 552 }; 553 554 struct ice_pf { 555 struct pci_dev *pdev; 556 struct ice_adapter *adapter; 557 558 struct devlink_region *nvm_region; 559 struct devlink_region *sram_region; 560 struct devlink_region *devcaps_region; 561 562 /* devlink port data */ 563 struct devlink_port devlink_port; 564 565 /* OS reserved IRQ details */ 566 struct ice_irq_tracker irq_tracker; 567 struct ice_virt_irq_tracker virt_irq_tracker; 568 569 u16 ctrl_vsi_idx; /* control VSI index in pf->vsi array */ 570 571 struct ice_vsi **vsi; /* VSIs created by the driver */ 572 struct ice_vsi_stats **vsi_stats; 573 struct ice_sw *first_sw; /* first switch created by firmware */ 574 u16 eswitch_mode; /* current mode of eswitch */ 575 struct dentry *ice_debugfs_pf; 576 struct ice_vfs vfs; 577 DECLARE_BITMAP(features, ICE_F_MAX); 578 DECLARE_BITMAP(state, ICE_STATE_NBITS); 579 DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS); 580 DECLARE_BITMAP(misc_thread, ICE_MISC_THREAD_NBITS); 581 unsigned long *avail_txqs; /* bitmap to track PF Tx queue usage */ 582 unsigned long *avail_rxqs; /* bitmap to track PF Rx queue usage */ 583 unsigned long *txtime_txqs; /* bitmap to track PF Tx Time queue */ 584 unsigned long serv_tmr_period; 585 unsigned long serv_tmr_prev; 586 struct timer_list serv_tmr; 587 struct work_struct serv_task; 588 struct mutex avail_q_mutex; /* protects access to avail_[rx|tx]qs */ 589 struct mutex sw_mutex; /* lock for protecting VSI alloc flow */ 590 struct mutex tc_mutex; /* lock to protect TC changes */ 591 struct mutex adev_mutex; /* lock to protect aux device access */ 592 struct mutex lag_mutex; /* protect ice_lag struct in PF */ 593 u32 msg_enable; 594 struct ice_ptp ptp; 595 struct gnss_serial *gnss_serial; 596 struct gnss_device *gnss_dev; 597 u16 num_rdma_msix; /* Total MSIX vectors for RDMA driver */ 598 599 /* spinlock to protect the AdminQ wait list */ 600 spinlock_t aq_wait_lock; 601 struct hlist_head aq_wait_list; 602 wait_queue_head_t aq_wait_queue; 603 bool fw_emp_reset_disabled; 604 605 wait_queue_head_t reset_wait_queue; 606 607 u32 hw_csum_rx_error; 608 u32 hw_rx_eipe_error; 609 u32 oicr_err_reg; 610 struct msi_map oicr_irq; /* Other interrupt cause MSIX vector */ 611 struct msi_map ll_ts_irq; /* LL_TS interrupt MSIX vector */ 612 u16 max_pf_txqs; /* Total Tx queues PF wide */ 613 u16 max_pf_rxqs; /* Total Rx queues PF wide */ 614 struct ice_pf_msix msix; 615 u16 num_lan_tx; /* num LAN Tx queues setup */ 616 u16 num_lan_rx; /* num LAN Rx queues setup */ 617 u16 next_vsi; /* Next free slot in pf->vsi[] - 0-based! */ 618 u16 num_alloc_vsi; 619 u16 corer_count; /* Core reset count */ 620 u16 globr_count; /* Global reset count */ 621 u16 empr_count; /* EMP reset count */ 622 u16 pfr_count; /* PF reset count */ 623 u32 link_down_events; 624 625 u8 wol_ena : 1; /* software state of WoL */ 626 u32 wakeup_reason; /* last wakeup reason */ 627 struct ice_hw_port_stats stats; 628 struct ice_hw_port_stats stats_prev; 629 struct ice_hw hw; 630 u8 stat_prev_loaded:1; /* has previous stats been loaded */ 631 u16 dcbx_cap; 632 u32 tx_timeout_count; 633 unsigned long tx_timeout_last_recovery; 634 u32 tx_timeout_recovery_level; 635 char int_name[ICE_INT_NAME_STR_LEN]; 636 char int_name_ll_ts[ICE_INT_NAME_STR_LEN]; 637 int aux_idx; 638 u32 sw_int_count; 639 /* count of tc_flower filters specific to channel (aka where filter 640 * action is "hw_tc <tc_num>") 641 */ 642 u16 num_dmac_chnl_fltrs; 643 struct hlist_head tc_flower_fltr_list; 644 645 u64 supported_rxdids; 646 647 __le64 nvm_phy_type_lo; /* NVM PHY type low */ 648 __le64 nvm_phy_type_hi; /* NVM PHY type high */ 649 struct ice_link_default_override_tlv link_dflt_override; 650 struct ice_lag *lag; /* Link Aggregation information */ 651 652 struct ice_eswitch eswitch; 653 struct ice_esw_br_port *br_port; 654 655 struct xarray dyn_ports; 656 struct xarray sf_nums; 657 658 #define ICE_INVALID_AGG_NODE_ID 0 659 #define ICE_PF_AGG_NODE_ID_START 1 660 #define ICE_MAX_PF_AGG_NODES 32 661 struct ice_agg_node pf_agg_node[ICE_MAX_PF_AGG_NODES]; 662 #define ICE_VF_AGG_NODE_ID_START 65 663 #define ICE_MAX_VF_AGG_NODES 32 664 struct ice_agg_node vf_agg_node[ICE_MAX_VF_AGG_NODES]; 665 struct ice_dplls dplls; 666 struct device *hwmon_dev; 667 struct ice_health health_reporters; 668 struct iidc_rdma_core_dev_info *cdev_info; 669 670 u8 num_quanta_prof_used; 671 }; 672 673 extern struct workqueue_struct *ice_lag_wq; 674 675 struct ice_netdev_priv { 676 struct ice_vsi *vsi; 677 struct ice_repr *repr; 678 /* indirect block callbacks on registered higher level devices 679 * (e.g. tunnel devices) 680 * 681 * tc_indr_block_cb_priv_list is used to look up indirect callback 682 * private data 683 */ 684 struct list_head tc_indr_block_priv_list; 685 }; 686 687 /** 688 * ice_vector_ch_enabled 689 * @qv: pointer to q_vector, can be NULL 690 * 691 * This function returns true if vector is channel enabled otherwise false 692 */ 693 static inline bool ice_vector_ch_enabled(struct ice_q_vector *qv) 694 { 695 return !!qv->ch; /* Enable it to run with TC */ 696 } 697 698 /** 699 * ice_ptp_pf_handles_tx_interrupt - Check if PF handles Tx interrupt 700 * @pf: Board private structure 701 * 702 * Return true if this PF should respond to the Tx timestamp interrupt 703 * indication in the miscellaneous OICR interrupt handler. 704 */ 705 static inline bool ice_ptp_pf_handles_tx_interrupt(struct ice_pf *pf) 706 { 707 return pf->ptp.tx_interrupt_mode != ICE_PTP_TX_INTERRUPT_NONE; 708 } 709 710 /** 711 * ice_irq_dynamic_ena - Enable default interrupt generation settings 712 * @hw: pointer to HW struct 713 * @vsi: pointer to VSI struct, can be NULL 714 * @q_vector: pointer to q_vector, can be NULL 715 */ 716 static inline void 717 ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi, 718 struct ice_q_vector *q_vector) 719 { 720 u32 vector = (vsi && q_vector) ? q_vector->reg_idx : 721 ((struct ice_pf *)hw->back)->oicr_irq.index; 722 int itr = ICE_ITR_NONE; 723 u32 val; 724 725 /* clear the PBA here, as this function is meant to clean out all 726 * previous interrupts and enable the interrupt 727 */ 728 val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M | 729 (itr << GLINT_DYN_CTL_ITR_INDX_S); 730 if (vsi) 731 if (test_bit(ICE_VSI_DOWN, vsi->state)) 732 return; 733 wr32(hw, GLINT_DYN_CTL(vector), val); 734 } 735 736 /** 737 * ice_netdev_to_pf - Retrieve the PF struct associated with a netdev 738 * @netdev: pointer to the netdev struct 739 */ 740 static inline struct ice_pf *ice_netdev_to_pf(struct net_device *netdev) 741 { 742 struct ice_netdev_priv *np = netdev_priv(netdev); 743 744 return np->vsi->back; 745 } 746 747 static inline bool ice_is_xdp_ena_vsi(struct ice_vsi *vsi) 748 { 749 return !!READ_ONCE(vsi->xdp_prog); 750 } 751 752 static inline void ice_set_ring_xdp(struct ice_tx_ring *ring) 753 { 754 ring->flags |= ICE_TX_FLAGS_RING_XDP; 755 } 756 757 /** 758 * ice_is_txtime_ena - check if Tx Time is enabled on the Tx ring 759 * @ring: pointer to Tx ring 760 * 761 * Return: true if the Tx ring has Tx Time enabled, false otherwise. 762 */ 763 static inline bool ice_is_txtime_ena(const struct ice_tx_ring *ring) 764 { 765 struct ice_vsi *vsi = ring->vsi; 766 struct ice_pf *pf = vsi->back; 767 768 return test_bit(ring->q_index, pf->txtime_txqs); 769 } 770 771 /** 772 * ice_is_txtime_cfg - check if Tx Time is configured on the Tx ring 773 * @ring: pointer to Tx ring 774 * 775 * Return: true if the Tx ring is configured for Tx ring, false otherwise. 776 */ 777 static inline bool ice_is_txtime_cfg(const struct ice_tx_ring *ring) 778 { 779 return !!(ring->flags & ICE_TX_FLAGS_TXTIME); 780 } 781 782 /** 783 * ice_get_xp_from_qid - get ZC XSK buffer pool bound to a queue ID 784 * @vsi: pointer to VSI 785 * @qid: index of a queue to look at XSK buff pool presence 786 * 787 * Return: A pointer to xsk_buff_pool structure if there is a buffer pool 788 * attached and configured as zero-copy, NULL otherwise. 789 */ 790 static inline struct xsk_buff_pool *ice_get_xp_from_qid(struct ice_vsi *vsi, 791 u16 qid) 792 { 793 struct xsk_buff_pool *pool = xsk_get_pool_from_qid(vsi->netdev, qid); 794 795 if (!ice_is_xdp_ena_vsi(vsi)) 796 return NULL; 797 798 return (pool && pool->dev) ? pool : NULL; 799 } 800 801 /** 802 * ice_rx_xsk_pool - assign XSK buff pool to Rx ring 803 * @ring: Rx ring to use 804 * 805 * Sets XSK buff pool pointer on Rx ring. 806 */ 807 static inline void ice_rx_xsk_pool(struct ice_rx_ring *ring) 808 { 809 struct ice_vsi *vsi = ring->vsi; 810 u16 qid = ring->q_index; 811 812 WRITE_ONCE(ring->xsk_pool, ice_get_xp_from_qid(vsi, qid)); 813 } 814 815 /** 816 * ice_tx_xsk_pool - assign XSK buff pool to XDP ring 817 * @vsi: pointer to VSI 818 * @qid: index of a queue to look at XSK buff pool presence 819 * 820 * Sets XSK buff pool pointer on XDP ring. 821 * 822 * XDP ring is picked from Rx ring, whereas Rx ring is picked based on provided 823 * queue id. Reason for doing so is that queue vectors might have assigned more 824 * than one XDP ring, e.g. when user reduced the queue count on netdev; Rx ring 825 * carries a pointer to one of these XDP rings for its own purposes, such as 826 * handling XDP_TX action, therefore we can piggyback here on the 827 * rx_ring->xdp_ring assignment that was done during XDP rings initialization. 828 */ 829 static inline void ice_tx_xsk_pool(struct ice_vsi *vsi, u16 qid) 830 { 831 struct ice_tx_ring *ring; 832 833 ring = vsi->rx_rings[qid]->xdp_ring; 834 if (!ring) 835 return; 836 837 WRITE_ONCE(ring->xsk_pool, ice_get_xp_from_qid(vsi, qid)); 838 } 839 840 /** 841 * ice_get_main_vsi - Get the PF VSI 842 * @pf: PF instance 843 * 844 * returns pf->vsi[0], which by definition is the PF VSI 845 */ 846 static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf) 847 { 848 if (pf->vsi) 849 return pf->vsi[0]; 850 851 return NULL; 852 } 853 854 /** 855 * ice_get_netdev_priv_vsi - return VSI associated with netdev priv. 856 * @np: private netdev structure 857 */ 858 static inline struct ice_vsi *ice_get_netdev_priv_vsi(struct ice_netdev_priv *np) 859 { 860 /* In case of port representor return source port VSI. */ 861 if (np->repr) 862 return np->repr->src_vsi; 863 else 864 return np->vsi; 865 } 866 867 /** 868 * ice_get_ctrl_vsi - Get the control VSI 869 * @pf: PF instance 870 */ 871 static inline struct ice_vsi *ice_get_ctrl_vsi(struct ice_pf *pf) 872 { 873 /* if pf->ctrl_vsi_idx is ICE_NO_VSI, control VSI was not set up */ 874 if (!pf->vsi || pf->ctrl_vsi_idx == ICE_NO_VSI) 875 return NULL; 876 877 return pf->vsi[pf->ctrl_vsi_idx]; 878 } 879 880 /** 881 * ice_find_vsi - Find the VSI from VSI ID 882 * @pf: The PF pointer to search in 883 * @vsi_num: The VSI ID to search for 884 */ 885 static inline struct ice_vsi *ice_find_vsi(struct ice_pf *pf, u16 vsi_num) 886 { 887 int i; 888 889 ice_for_each_vsi(pf, i) 890 if (pf->vsi[i] && pf->vsi[i]->vsi_num == vsi_num) 891 return pf->vsi[i]; 892 return NULL; 893 } 894 895 /** 896 * ice_is_switchdev_running - check if switchdev is configured 897 * @pf: pointer to PF structure 898 * 899 * Returns true if eswitch mode is set to DEVLINK_ESWITCH_MODE_SWITCHDEV 900 * and switchdev is configured, false otherwise. 901 */ 902 static inline bool ice_is_switchdev_running(struct ice_pf *pf) 903 { 904 return pf->eswitch.is_running; 905 } 906 907 #define ICE_FD_STAT_CTR_BLOCK_COUNT 256 908 #define ICE_FD_STAT_PF_IDX(base_idx) \ 909 ((base_idx) * ICE_FD_STAT_CTR_BLOCK_COUNT) 910 #define ICE_FD_SB_STAT_IDX(base_idx) ICE_FD_STAT_PF_IDX(base_idx) 911 #define ICE_FD_STAT_CH 1 912 #define ICE_FD_CH_STAT_IDX(base_idx) \ 913 (ICE_FD_STAT_PF_IDX(base_idx) + ICE_FD_STAT_CH) 914 915 /** 916 * ice_is_adq_active - any active ADQs 917 * @pf: pointer to PF 918 * 919 * This function returns true if there are any ADQs configured (which is 920 * determined by looking at VSI type (which should be VSI_PF), numtc, and 921 * TC_MQPRIO flag) otherwise return false 922 */ 923 static inline bool ice_is_adq_active(struct ice_pf *pf) 924 { 925 struct ice_vsi *vsi; 926 927 vsi = ice_get_main_vsi(pf); 928 if (!vsi) 929 return false; 930 931 /* is ADQ configured */ 932 if (vsi->tc_cfg.numtc > ICE_CHNL_START_TC && 933 test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) 934 return true; 935 936 return false; 937 } 938 939 int ice_debugfs_pf_init(struct ice_pf *pf); 940 void ice_debugfs_pf_deinit(struct ice_pf *pf); 941 void ice_debugfs_init(void); 942 void ice_debugfs_exit(void); 943 944 bool netif_is_ice(const struct net_device *dev); 945 int ice_vsi_setup_tx_rings(struct ice_vsi *vsi); 946 int ice_vsi_setup_rx_rings(struct ice_vsi *vsi); 947 int ice_vsi_open_ctrl(struct ice_vsi *vsi); 948 int ice_vsi_open(struct ice_vsi *vsi); 949 void ice_set_ethtool_ops(struct net_device *netdev); 950 void ice_set_ethtool_repr_ops(struct net_device *netdev); 951 void ice_set_ethtool_safe_mode_ops(struct net_device *netdev); 952 void ice_set_ethtool_sf_ops(struct net_device *netdev); 953 u16 ice_get_avail_txq_count(struct ice_pf *pf); 954 u16 ice_get_avail_rxq_count(struct ice_pf *pf); 955 int ice_vsi_recfg_qs(struct ice_vsi *vsi, int new_rx, int new_tx, bool locked); 956 void ice_update_vsi_stats(struct ice_vsi *vsi); 957 void ice_update_pf_stats(struct ice_pf *pf); 958 void 959 ice_fetch_u64_stats_per_ring(struct u64_stats_sync *syncp, 960 struct ice_q_stats stats, u64 *pkts, u64 *bytes); 961 int ice_up(struct ice_vsi *vsi); 962 int ice_down(struct ice_vsi *vsi); 963 int ice_down_up(struct ice_vsi *vsi); 964 int ice_vsi_cfg_lan(struct ice_vsi *vsi); 965 struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi); 966 967 enum ice_xdp_cfg { 968 ICE_XDP_CFG_FULL, /* Fully apply new config in .ndo_bpf() */ 969 ICE_XDP_CFG_PART, /* Save/use part of config in VSI rebuild */ 970 }; 971 972 int ice_vsi_determine_xdp_res(struct ice_vsi *vsi); 973 int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog, 974 enum ice_xdp_cfg cfg_type); 975 int ice_destroy_xdp_rings(struct ice_vsi *vsi, enum ice_xdp_cfg cfg_type); 976 void ice_map_xdp_rings(struct ice_vsi *vsi); 977 int 978 ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames, 979 u32 flags); 980 int ice_set_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size); 981 int ice_get_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size); 982 int ice_set_rss_key(struct ice_vsi *vsi, u8 *seed); 983 int ice_get_rss_key(struct ice_vsi *vsi, u8 *seed); 984 int ice_set_rss_hfunc(struct ice_vsi *vsi, u8 hfunc); 985 void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size); 986 int ice_schedule_reset(struct ice_pf *pf, enum ice_reset_req reset); 987 void ice_print_link_msg(struct ice_vsi *vsi, bool isup); 988 int ice_plug_aux_dev(struct ice_pf *pf); 989 void ice_unplug_aux_dev(struct ice_pf *pf); 990 int ice_init_rdma(struct ice_pf *pf); 991 void ice_deinit_rdma(struct ice_pf *pf); 992 bool ice_is_wol_supported(struct ice_hw *hw); 993 void ice_fdir_del_all_fltrs(struct ice_vsi *vsi); 994 int 995 ice_fdir_write_fltr(struct ice_pf *pf, struct ice_fdir_fltr *input, bool add, 996 bool is_tun); 997 void ice_vsi_manage_fdir(struct ice_vsi *vsi, bool ena); 998 int ice_add_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd); 999 int ice_del_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd); 1000 int ice_get_ethtool_fdir_entry(struct ice_hw *hw, struct ethtool_rxnfc *cmd); 1001 int 1002 ice_get_fdir_fltr_ids(struct ice_hw *hw, struct ethtool_rxnfc *cmd, 1003 u32 *rule_locs); 1004 void ice_fdir_rem_adq_chnl(struct ice_hw *hw, u16 vsi_idx); 1005 void ice_fdir_release_flows(struct ice_hw *hw); 1006 void ice_fdir_replay_flows(struct ice_hw *hw); 1007 void ice_fdir_replay_fltrs(struct ice_pf *pf); 1008 int ice_fdir_create_dflt_rules(struct ice_pf *pf); 1009 1010 enum ice_aq_task_state { 1011 ICE_AQ_TASK_NOT_PREPARED, 1012 ICE_AQ_TASK_WAITING, 1013 ICE_AQ_TASK_COMPLETE, 1014 ICE_AQ_TASK_CANCELED, 1015 }; 1016 1017 struct ice_aq_task { 1018 struct hlist_node entry; 1019 struct ice_rq_event_info event; 1020 enum ice_aq_task_state state; 1021 u16 opcode; 1022 }; 1023 1024 void ice_aq_prep_for_event(struct ice_pf *pf, struct ice_aq_task *task, 1025 u16 opcode); 1026 int ice_aq_wait_for_event(struct ice_pf *pf, struct ice_aq_task *task, 1027 unsigned long timeout); 1028 int ice_open(struct net_device *netdev); 1029 int ice_open_internal(struct net_device *netdev); 1030 int ice_stop(struct net_device *netdev); 1031 void ice_service_task_schedule(struct ice_pf *pf); 1032 int ice_load(struct ice_pf *pf); 1033 void ice_unload(struct ice_pf *pf); 1034 void ice_adv_lnk_speed_maps_init(void); 1035 int ice_init_dev(struct ice_pf *pf); 1036 void ice_deinit_dev(struct ice_pf *pf); 1037 int ice_change_mtu(struct net_device *netdev, int new_mtu); 1038 void ice_tx_timeout(struct net_device *netdev, unsigned int txqueue); 1039 int ice_xdp(struct net_device *dev, struct netdev_bpf *xdp); 1040 void ice_set_netdev_features(struct net_device *netdev); 1041 int ice_vlan_rx_add_vid(struct net_device *netdev, __be16 proto, u16 vid); 1042 int ice_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto, u16 vid); 1043 void ice_get_stats64(struct net_device *netdev, 1044 struct rtnl_link_stats64 *stats); 1045 1046 /** 1047 * ice_set_rdma_cap - enable RDMA support 1048 * @pf: PF struct 1049 */ 1050 static inline void ice_set_rdma_cap(struct ice_pf *pf) 1051 { 1052 if (pf->hw.func_caps.common_cap.rdma && pf->num_rdma_msix) { 1053 set_bit(ICE_FLAG_RDMA_ENA, pf->flags); 1054 set_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags); 1055 } 1056 } 1057 1058 /** 1059 * ice_clear_rdma_cap - disable RDMA support 1060 * @pf: PF struct 1061 */ 1062 static inline void ice_clear_rdma_cap(struct ice_pf *pf) 1063 { 1064 /* defer unplug to service task to avoid RTNL lock and 1065 * clear PLUG bit so that pending plugs don't interfere 1066 */ 1067 clear_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags); 1068 set_bit(ICE_FLAG_UNPLUG_AUX_DEV, pf->flags); 1069 clear_bit(ICE_FLAG_RDMA_ENA, pf->flags); 1070 } 1071 1072 extern const struct xdp_metadata_ops ice_xdp_md_ops; 1073 1074 /** 1075 * ice_is_dual - Check if given config is multi-NAC 1076 * @hw: pointer to HW structure 1077 * 1078 * Return: true if the device is running in mutli-NAC (Network 1079 * Acceleration Complex) configuration variant, false otherwise 1080 * (always false for non-E825 devices). 1081 */ 1082 static inline bool ice_is_dual(struct ice_hw *hw) 1083 { 1084 return hw->mac_type == ICE_MAC_GENERIC_3K_E825 && 1085 (hw->dev_caps.nac_topo.mode & ICE_NAC_TOPO_DUAL_M); 1086 } 1087 1088 /** 1089 * ice_is_primary - Check if given device belongs to the primary complex 1090 * @hw: pointer to HW structure 1091 * 1092 * Check if given PF/HW is running on primary complex in multi-NAC 1093 * configuration. 1094 * 1095 * Return: true if the device is dual, false otherwise (always true 1096 * for non-E825 devices). 1097 */ 1098 static inline bool ice_is_primary(struct ice_hw *hw) 1099 { 1100 return hw->mac_type != ICE_MAC_GENERIC_3K_E825 || 1101 !ice_is_dual(hw) || 1102 (hw->dev_caps.nac_topo.mode & ICE_NAC_TOPO_PRIMARY_M); 1103 } 1104 1105 /** 1106 * ice_pf_src_tmr_owned - Check if a primary timer is owned by PF 1107 * @pf: pointer to PF structure 1108 * 1109 * Return: true if PF owns primary timer, false otherwise. 1110 */ 1111 static inline bool ice_pf_src_tmr_owned(struct ice_pf *pf) 1112 { 1113 return pf->hw.func_caps.ts_func_info.src_tmr_owned && 1114 ice_is_primary(&pf->hw); 1115 } 1116 1117 /** 1118 * ice_get_primary_hw - Get pointer to primary ice_hw structure 1119 * @pf: pointer to PF structure 1120 * 1121 * Return: A pointer to ice_hw structure with access to timesync 1122 * register space. 1123 */ 1124 static inline struct ice_hw *ice_get_primary_hw(struct ice_pf *pf) 1125 { 1126 if (!pf->adapter->ctrl_pf) 1127 return &pf->hw; 1128 else 1129 return &pf->adapter->ctrl_pf->hw; 1130 } 1131 #endif /* _ICE_H_ */ 1132