1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2018, Intel Corporation. */ 3 4 #ifndef _ICE_H_ 5 #define _ICE_H_ 6 7 #include <linux/types.h> 8 #include <linux/errno.h> 9 #include <linux/kernel.h> 10 #include <linux/module.h> 11 #include <linux/firmware.h> 12 #include <linux/netdevice.h> 13 #include <linux/compiler.h> 14 #include <linux/etherdevice.h> 15 #include <linux/skbuff.h> 16 #include <linux/cpumask.h> 17 #include <linux/rtnetlink.h> 18 #include <linux/if_vlan.h> 19 #include <linux/dma-mapping.h> 20 #include <linux/pci.h> 21 #include <linux/workqueue.h> 22 #include <linux/wait.h> 23 #include <linux/aer.h> 24 #include <linux/interrupt.h> 25 #include <linux/ethtool.h> 26 #include <linux/timer.h> 27 #include <linux/delay.h> 28 #include <linux/bitmap.h> 29 #include <linux/log2.h> 30 #include <linux/ip.h> 31 #include <linux/sctp.h> 32 #include <linux/ipv6.h> 33 #include <linux/pkt_sched.h> 34 #include <linux/if_bridge.h> 35 #include <linux/ctype.h> 36 #include <linux/bpf.h> 37 #include <linux/btf.h> 38 #include <linux/auxiliary_bus.h> 39 #include <linux/avf/virtchnl.h> 40 #include <linux/cpu_rmap.h> 41 #include <linux/dim.h> 42 #include <net/pkt_cls.h> 43 #include <net/tc_act/tc_mirred.h> 44 #include <net/tc_act/tc_gact.h> 45 #include <net/ip.h> 46 #include <net/devlink.h> 47 #include <net/ipv6.h> 48 #include <net/xdp_sock.h> 49 #include <net/xdp_sock_drv.h> 50 #include <net/geneve.h> 51 #include <net/gre.h> 52 #include <net/udp_tunnel.h> 53 #include <net/vxlan.h> 54 #if IS_ENABLED(CONFIG_DCB) 55 #include <scsi/iscsi_proto.h> 56 #endif /* CONFIG_DCB */ 57 #include "ice_devids.h" 58 #include "ice_type.h" 59 #include "ice_txrx.h" 60 #include "ice_dcb.h" 61 #include "ice_switch.h" 62 #include "ice_common.h" 63 #include "ice_flow.h" 64 #include "ice_sched.h" 65 #include "ice_idc_int.h" 66 #include "ice_virtchnl_pf.h" 67 #include "ice_sriov.h" 68 #include "ice_ptp.h" 69 #include "ice_fdir.h" 70 #include "ice_xsk.h" 71 #include "ice_arfs.h" 72 #include "ice_repr.h" 73 #include "ice_eswitch.h" 74 #include "ice_lag.h" 75 #include "ice_vsi_vlan_ops.h" 76 77 #define ICE_BAR0 0 78 #define ICE_REQ_DESC_MULTIPLE 32 79 #define ICE_MIN_NUM_DESC 64 80 #define ICE_MAX_NUM_DESC 8160 81 #define ICE_DFLT_MIN_RX_DESC 512 82 #define ICE_DFLT_NUM_TX_DESC 256 83 #define ICE_DFLT_NUM_RX_DESC 2048 84 85 #define ICE_DFLT_TRAFFIC_CLASS BIT(0) 86 #define ICE_INT_NAME_STR_LEN (IFNAMSIZ + 16) 87 #define ICE_AQ_LEN 192 88 #define ICE_MBXSQ_LEN 64 89 #define ICE_SBQ_LEN 64 90 #define ICE_MIN_LAN_TXRX_MSIX 1 91 #define ICE_MIN_LAN_OICR_MSIX 1 92 #define ICE_MIN_MSIX (ICE_MIN_LAN_TXRX_MSIX + ICE_MIN_LAN_OICR_MSIX) 93 #define ICE_FDIR_MSIX 2 94 #define ICE_RDMA_NUM_AEQ_MSIX 4 95 #define ICE_MIN_RDMA_MSIX 2 96 #define ICE_ESWITCH_MSIX 1 97 #define ICE_NO_VSI 0xffff 98 #define ICE_VSI_MAP_CONTIG 0 99 #define ICE_VSI_MAP_SCATTER 1 100 #define ICE_MAX_SCATTER_TXQS 16 101 #define ICE_MAX_SCATTER_RXQS 16 102 #define ICE_Q_WAIT_RETRY_LIMIT 10 103 #define ICE_Q_WAIT_MAX_RETRY (5 * ICE_Q_WAIT_RETRY_LIMIT) 104 #define ICE_MAX_LG_RSS_QS 256 105 #define ICE_RES_VALID_BIT 0x8000 106 #define ICE_RES_MISC_VEC_ID (ICE_RES_VALID_BIT - 1) 107 #define ICE_RES_RDMA_VEC_ID (ICE_RES_MISC_VEC_ID - 1) 108 /* All VF control VSIs share the same IRQ, so assign a unique ID for them */ 109 #define ICE_RES_VF_CTRL_VEC_ID (ICE_RES_RDMA_VEC_ID - 1) 110 #define ICE_INVAL_Q_INDEX 0xffff 111 #define ICE_INVAL_VFID 256 112 113 #define ICE_MAX_RXQS_PER_TC 256 /* Used when setting VSI context per TC Rx queues */ 114 115 #define ICE_CHNL_START_TC 1 116 117 #define ICE_MAX_RESET_WAIT 20 118 119 #define ICE_VSIQF_HKEY_ARRAY_SIZE ((VSIQF_HKEY_MAX_INDEX + 1) * 4) 120 121 #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK) 122 123 #define ICE_MAX_MTU (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD) 124 125 #define ICE_UP_TABLE_TRANSLATE(val, i) \ 126 (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \ 127 ICE_AQ_VSI_UP_TABLE_UP##i##_M) 128 129 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i])) 130 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i])) 131 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i])) 132 #define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i])) 133 134 /* Minimum BW limit is 500 Kbps for any scheduler node */ 135 #define ICE_MIN_BW_LIMIT 500 136 /* User can specify BW in either Kbit/Mbit/Gbit and OS converts it in bytes. 137 * use it to convert user specified BW limit into Kbps 138 */ 139 #define ICE_BW_KBPS_DIVISOR 125 140 141 /* Macro for each VSI in a PF */ 142 #define ice_for_each_vsi(pf, i) \ 143 for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++) 144 145 /* Macros for each Tx/Xdp/Rx ring in a VSI */ 146 #define ice_for_each_txq(vsi, i) \ 147 for ((i) = 0; (i) < (vsi)->num_txq; (i)++) 148 149 #define ice_for_each_xdp_txq(vsi, i) \ 150 for ((i) = 0; (i) < (vsi)->num_xdp_txq; (i)++) 151 152 #define ice_for_each_rxq(vsi, i) \ 153 for ((i) = 0; (i) < (vsi)->num_rxq; (i)++) 154 155 /* Macros for each allocated Tx/Rx ring whether used or not in a VSI */ 156 #define ice_for_each_alloc_txq(vsi, i) \ 157 for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++) 158 159 #define ice_for_each_alloc_rxq(vsi, i) \ 160 for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++) 161 162 #define ice_for_each_q_vector(vsi, i) \ 163 for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++) 164 165 #define ice_for_each_chnl_tc(i) \ 166 for ((i) = ICE_CHNL_START_TC; (i) < ICE_CHNL_MAX_TC; (i)++) 167 168 #define ICE_UCAST_PROMISC_BITS (ICE_PROMISC_UCAST_TX | ICE_PROMISC_UCAST_RX) 169 170 #define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_TX | \ 171 ICE_PROMISC_UCAST_RX | \ 172 ICE_PROMISC_VLAN_TX | \ 173 ICE_PROMISC_VLAN_RX) 174 175 #define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX) 176 177 #define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \ 178 ICE_PROMISC_MCAST_RX | \ 179 ICE_PROMISC_VLAN_TX | \ 180 ICE_PROMISC_VLAN_RX) 181 182 #define ice_pf_to_dev(pf) (&((pf)->pdev->dev)) 183 184 enum ice_feature { 185 ICE_F_DSCP, 186 ICE_F_SMA_CTRL, 187 ICE_F_MAX 188 }; 189 190 DECLARE_STATIC_KEY_FALSE(ice_xdp_locking_key); 191 192 struct ice_channel { 193 struct list_head list; 194 u8 type; 195 u16 sw_id; 196 u16 base_q; 197 u16 num_rxq; 198 u16 num_txq; 199 u16 vsi_num; 200 u8 ena_tc; 201 struct ice_aqc_vsi_props info; 202 u64 max_tx_rate; 203 u64 min_tx_rate; 204 atomic_t num_sb_fltr; 205 struct ice_vsi *ch_vsi; 206 }; 207 208 struct ice_txq_meta { 209 u32 q_teid; /* Tx-scheduler element identifier */ 210 u16 q_id; /* Entry in VSI's txq_map bitmap */ 211 u16 q_handle; /* Relative index of Tx queue within TC */ 212 u16 vsi_idx; /* VSI index that Tx queue belongs to */ 213 u8 tc; /* TC number that Tx queue belongs to */ 214 }; 215 216 struct ice_tc_info { 217 u16 qoffset; 218 u16 qcount_tx; 219 u16 qcount_rx; 220 u8 netdev_tc; 221 }; 222 223 struct ice_tc_cfg { 224 u8 numtc; /* Total number of enabled TCs */ 225 u16 ena_tc; /* Tx map */ 226 struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS]; 227 }; 228 229 struct ice_res_tracker { 230 u16 num_entries; 231 u16 end; 232 u16 list[]; 233 }; 234 235 struct ice_qs_cfg { 236 struct mutex *qs_mutex; /* will be assigned to &pf->avail_q_mutex */ 237 unsigned long *pf_map; 238 unsigned long pf_map_size; 239 unsigned int q_count; 240 unsigned int scatter_count; 241 u16 *vsi_map; 242 u16 vsi_map_offset; 243 u8 mapping_mode; 244 }; 245 246 struct ice_sw { 247 struct ice_pf *pf; 248 u16 sw_id; /* switch ID for this switch */ 249 u16 bridge_mode; /* VEB/VEPA/Port Virtualizer */ 250 struct ice_vsi *dflt_vsi; /* default VSI for this switch */ 251 u8 dflt_vsi_ena:1; /* true if above dflt_vsi is enabled */ 252 }; 253 254 enum ice_pf_state { 255 ICE_TESTING, 256 ICE_DOWN, 257 ICE_NEEDS_RESTART, 258 ICE_PREPARED_FOR_RESET, /* set by driver when prepared */ 259 ICE_RESET_OICR_RECV, /* set by driver after rcv reset OICR */ 260 ICE_PFR_REQ, /* set by driver */ 261 ICE_CORER_REQ, /* set by driver */ 262 ICE_GLOBR_REQ, /* set by driver */ 263 ICE_CORER_RECV, /* set by OICR handler */ 264 ICE_GLOBR_RECV, /* set by OICR handler */ 265 ICE_EMPR_RECV, /* set by OICR handler */ 266 ICE_SUSPENDED, /* set on module remove path */ 267 ICE_RESET_FAILED, /* set by reset/rebuild */ 268 /* When checking for the PF to be in a nominal operating state, the 269 * bits that are grouped at the beginning of the list need to be 270 * checked. Bits occurring before ICE_STATE_NOMINAL_CHECK_BITS will 271 * be checked. If you need to add a bit into consideration for nominal 272 * operating state, it must be added before 273 * ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position 274 * without appropriate consideration. 275 */ 276 ICE_STATE_NOMINAL_CHECK_BITS, 277 ICE_ADMINQ_EVENT_PENDING, 278 ICE_MAILBOXQ_EVENT_PENDING, 279 ICE_SIDEBANDQ_EVENT_PENDING, 280 ICE_MDD_EVENT_PENDING, 281 ICE_VFLR_EVENT_PENDING, 282 ICE_FLTR_OVERFLOW_PROMISC, 283 ICE_VF_DIS, 284 ICE_CFG_BUSY, 285 ICE_SERVICE_SCHED, 286 ICE_SERVICE_DIS, 287 ICE_FD_FLUSH_REQ, 288 ICE_OICR_INTR_DIS, /* Global OICR interrupt disabled */ 289 ICE_MDD_VF_PRINT_PENDING, /* set when MDD event handle */ 290 ICE_VF_RESETS_DISABLED, /* disable resets during ice_remove */ 291 ICE_LINK_DEFAULT_OVERRIDE_PENDING, 292 ICE_PHY_INIT_COMPLETE, 293 ICE_FD_VF_FLUSH_CTX, /* set at FD Rx IRQ or timeout */ 294 ICE_STATE_NBITS /* must be last */ 295 }; 296 297 enum ice_vsi_state { 298 ICE_VSI_DOWN, 299 ICE_VSI_NEEDS_RESTART, 300 ICE_VSI_NETDEV_ALLOCD, 301 ICE_VSI_NETDEV_REGISTERED, 302 ICE_VSI_UMAC_FLTR_CHANGED, 303 ICE_VSI_MMAC_FLTR_CHANGED, 304 ICE_VSI_VLAN_FLTR_CHANGED, 305 ICE_VSI_PROMISC_CHANGED, 306 ICE_VSI_STATE_NBITS /* must be last */ 307 }; 308 309 /* struct that defines a VSI, associated with a dev */ 310 struct ice_vsi { 311 struct net_device *netdev; 312 struct ice_sw *vsw; /* switch this VSI is on */ 313 struct ice_pf *back; /* back pointer to PF */ 314 struct ice_port_info *port_info; /* back pointer to port_info */ 315 struct ice_rx_ring **rx_rings; /* Rx ring array */ 316 struct ice_tx_ring **tx_rings; /* Tx ring array */ 317 struct ice_q_vector **q_vectors; /* q_vector array */ 318 319 irqreturn_t (*irq_handler)(int irq, void *data); 320 321 u64 tx_linearize; 322 DECLARE_BITMAP(state, ICE_VSI_STATE_NBITS); 323 unsigned int current_netdev_flags; 324 u32 tx_restart; 325 u32 tx_busy; 326 u32 rx_buf_failed; 327 u32 rx_page_failed; 328 u16 num_q_vectors; 329 u16 base_vector; /* IRQ base for OS reserved vectors */ 330 enum ice_vsi_type type; 331 u16 vsi_num; /* HW (absolute) index of this VSI */ 332 u16 idx; /* software index in pf->vsi[] */ 333 334 s16 vf_id; /* VF ID for SR-IOV VSIs */ 335 336 u16 ethtype; /* Ethernet protocol for pause frame */ 337 u16 num_gfltr; 338 u16 num_bfltr; 339 340 /* RSS config */ 341 u16 rss_table_size; /* HW RSS table size */ 342 u16 rss_size; /* Allocated RSS queues */ 343 u8 *rss_hkey_user; /* User configured hash keys */ 344 u8 *rss_lut_user; /* User configured lookup table entries */ 345 u8 rss_lut_type; /* used to configure Get/Set RSS LUT AQ call */ 346 347 /* aRFS members only allocated for the PF VSI */ 348 #define ICE_MAX_ARFS_LIST 1024 349 #define ICE_ARFS_LST_MASK (ICE_MAX_ARFS_LIST - 1) 350 struct hlist_head *arfs_fltr_list; 351 struct ice_arfs_active_fltr_cntrs *arfs_fltr_cntrs; 352 spinlock_t arfs_lock; /* protects aRFS hash table and filter state */ 353 atomic_t *arfs_last_fltr_id; 354 355 u16 max_frame; 356 u16 rx_buf_len; 357 358 struct ice_aqc_vsi_props info; /* VSI properties */ 359 360 /* VSI stats */ 361 struct rtnl_link_stats64 net_stats; 362 struct ice_eth_stats eth_stats; 363 struct ice_eth_stats eth_stats_prev; 364 365 struct list_head tmp_sync_list; /* MAC filters to be synced */ 366 struct list_head tmp_unsync_list; /* MAC filters to be unsynced */ 367 368 u8 irqs_ready:1; 369 u8 current_isup:1; /* Sync 'link up' logging */ 370 u8 stat_offsets_loaded:1; 371 struct ice_vsi_vlan_ops inner_vlan_ops; 372 struct ice_vsi_vlan_ops outer_vlan_ops; 373 u16 num_vlan; 374 375 /* queue information */ 376 u8 tx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 377 u8 rx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 378 u16 *txq_map; /* index in pf->avail_txqs */ 379 u16 *rxq_map; /* index in pf->avail_rxqs */ 380 u16 alloc_txq; /* Allocated Tx queues */ 381 u16 num_txq; /* Used Tx queues */ 382 u16 alloc_rxq; /* Allocated Rx queues */ 383 u16 num_rxq; /* Used Rx queues */ 384 u16 req_txq; /* User requested Tx queues */ 385 u16 req_rxq; /* User requested Rx queues */ 386 u16 num_rx_desc; 387 u16 num_tx_desc; 388 u16 qset_handle[ICE_MAX_TRAFFIC_CLASS]; 389 struct ice_tc_cfg tc_cfg; 390 struct bpf_prog *xdp_prog; 391 struct ice_tx_ring **xdp_rings; /* XDP ring array */ 392 unsigned long *af_xdp_zc_qps; /* tracks AF_XDP ZC enabled qps */ 393 u16 num_xdp_txq; /* Used XDP queues */ 394 u8 xdp_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 395 396 struct net_device **target_netdevs; 397 398 struct tc_mqprio_qopt_offload mqprio_qopt; /* queue parameters */ 399 400 /* Channel Specific Fields */ 401 struct ice_vsi *tc_map_vsi[ICE_CHNL_MAX_TC]; 402 u16 cnt_q_avail; 403 u16 next_base_q; /* next queue to be used for channel setup */ 404 struct list_head ch_list; 405 u16 num_chnl_rxq; 406 u16 num_chnl_txq; 407 u16 ch_rss_size; 408 u16 num_chnl_fltr; 409 /* store away rss size info before configuring ADQ channels so that, 410 * it can be used after tc-qdisc delete, to get back RSS setting as 411 * they were before 412 */ 413 u16 orig_rss_size; 414 /* this keeps tracks of all enabled TC with and without DCB 415 * and inclusive of ADQ, vsi->mqprio_opt keeps track of queue 416 * information 417 */ 418 u8 all_numtc; 419 u16 all_enatc; 420 421 /* store away TC info, to be used for rebuild logic */ 422 u8 old_numtc; 423 u16 old_ena_tc; 424 425 struct ice_channel *ch; 426 427 /* setup back reference, to which aggregator node this VSI 428 * corresponds to 429 */ 430 struct ice_agg_node *agg_node; 431 } ____cacheline_internodealigned_in_smp; 432 433 /* struct that defines an interrupt vector */ 434 struct ice_q_vector { 435 struct ice_vsi *vsi; 436 437 u16 v_idx; /* index in the vsi->q_vector array. */ 438 u16 reg_idx; 439 u8 num_ring_rx; /* total number of Rx rings in vector */ 440 u8 num_ring_tx; /* total number of Tx rings in vector */ 441 u8 wb_on_itr:1; /* if true, WB on ITR is enabled */ 442 /* in usecs, need to use ice_intrl_to_usecs_reg() before writing this 443 * value to the device 444 */ 445 u8 intrl; 446 447 struct napi_struct napi; 448 449 struct ice_ring_container rx; 450 struct ice_ring_container tx; 451 452 cpumask_t affinity_mask; 453 struct irq_affinity_notify affinity_notify; 454 455 struct ice_channel *ch; 456 457 char name[ICE_INT_NAME_STR_LEN]; 458 459 u16 total_events; /* net_dim(): number of interrupts processed */ 460 } ____cacheline_internodealigned_in_smp; 461 462 enum ice_pf_flags { 463 ICE_FLAG_FLTR_SYNC, 464 ICE_FLAG_RDMA_ENA, 465 ICE_FLAG_RSS_ENA, 466 ICE_FLAG_SRIOV_ENA, 467 ICE_FLAG_SRIOV_CAPABLE, 468 ICE_FLAG_DCB_CAPABLE, 469 ICE_FLAG_DCB_ENA, 470 ICE_FLAG_FD_ENA, 471 ICE_FLAG_PTP_SUPPORTED, /* PTP is supported by NVM */ 472 ICE_FLAG_PTP, /* PTP is enabled by software */ 473 ICE_FLAG_ADV_FEATURES, 474 ICE_FLAG_TC_MQPRIO, /* support for Multi queue TC */ 475 ICE_FLAG_CLS_FLOWER, 476 ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA, 477 ICE_FLAG_TOTAL_PORT_SHUTDOWN_ENA, 478 ICE_FLAG_NO_MEDIA, 479 ICE_FLAG_FW_LLDP_AGENT, 480 ICE_FLAG_MOD_POWER_UNSUPPORTED, 481 ICE_FLAG_PHY_FW_LOAD_FAILED, 482 ICE_FLAG_ETHTOOL_CTXT, /* set when ethtool holds RTNL lock */ 483 ICE_FLAG_LEGACY_RX, 484 ICE_FLAG_VF_TRUE_PROMISC_ENA, 485 ICE_FLAG_MDD_AUTO_RESET_VF, 486 ICE_FLAG_VF_VLAN_PRUNING, 487 ICE_FLAG_LINK_LENIENT_MODE_ENA, 488 ICE_FLAG_PLUG_AUX_DEV, 489 ICE_PF_FLAGS_NBITS /* must be last */ 490 }; 491 492 struct ice_switchdev_info { 493 struct ice_vsi *control_vsi; 494 struct ice_vsi *uplink_vsi; 495 bool is_running; 496 }; 497 498 struct ice_agg_node { 499 u32 agg_id; 500 #define ICE_MAX_VSIS_IN_AGG_NODE 64 501 u32 num_vsis; 502 u8 valid; 503 }; 504 505 struct ice_pf { 506 struct pci_dev *pdev; 507 508 struct devlink_region *nvm_region; 509 struct devlink_region *sram_region; 510 struct devlink_region *devcaps_region; 511 512 /* devlink port data */ 513 struct devlink_port devlink_port; 514 515 /* OS reserved IRQ details */ 516 struct msix_entry *msix_entries; 517 struct ice_res_tracker *irq_tracker; 518 /* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the 519 * number of MSIX vectors needed for all SR-IOV VFs from the number of 520 * MSIX vectors allowed on this PF. 521 */ 522 u16 sriov_base_vector; 523 524 u16 ctrl_vsi_idx; /* control VSI index in pf->vsi array */ 525 526 struct ice_vsi **vsi; /* VSIs created by the driver */ 527 struct ice_sw *first_sw; /* first switch created by firmware */ 528 u16 eswitch_mode; /* current mode of eswitch */ 529 /* Virtchnl/SR-IOV config info */ 530 struct ice_vf *vf; 531 u16 num_alloc_vfs; /* actual number of VFs allocated */ 532 u16 num_vfs_supported; /* num VFs supported for this PF */ 533 u16 num_qps_per_vf; 534 u16 num_msix_per_vf; 535 /* used to ratelimit the MDD event logging */ 536 unsigned long last_printed_mdd_jiffies; 537 DECLARE_BITMAP(malvfs, ICE_MAX_VF_COUNT); 538 DECLARE_BITMAP(features, ICE_F_MAX); 539 DECLARE_BITMAP(state, ICE_STATE_NBITS); 540 DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS); 541 unsigned long *avail_txqs; /* bitmap to track PF Tx queue usage */ 542 unsigned long *avail_rxqs; /* bitmap to track PF Rx queue usage */ 543 unsigned long serv_tmr_period; 544 unsigned long serv_tmr_prev; 545 struct timer_list serv_tmr; 546 struct work_struct serv_task; 547 struct mutex avail_q_mutex; /* protects access to avail_[rx|tx]qs */ 548 struct mutex sw_mutex; /* lock for protecting VSI alloc flow */ 549 struct mutex tc_mutex; /* lock to protect TC changes */ 550 u32 msg_enable; 551 struct ice_ptp ptp; 552 u16 num_rdma_msix; /* Total MSIX vectors for RDMA driver */ 553 u16 rdma_base_vector; 554 555 /* spinlock to protect the AdminQ wait list */ 556 spinlock_t aq_wait_lock; 557 struct hlist_head aq_wait_list; 558 wait_queue_head_t aq_wait_queue; 559 bool fw_emp_reset_disabled; 560 561 wait_queue_head_t reset_wait_queue; 562 563 u32 hw_csum_rx_error; 564 u16 oicr_idx; /* Other interrupt cause MSIX vector index */ 565 u16 num_avail_sw_msix; /* remaining MSIX SW vectors left unclaimed */ 566 u16 max_pf_txqs; /* Total Tx queues PF wide */ 567 u16 max_pf_rxqs; /* Total Rx queues PF wide */ 568 u16 num_lan_msix; /* Total MSIX vectors for base driver */ 569 u16 num_lan_tx; /* num LAN Tx queues setup */ 570 u16 num_lan_rx; /* num LAN Rx queues setup */ 571 u16 next_vsi; /* Next free slot in pf->vsi[] - 0-based! */ 572 u16 num_alloc_vsi; 573 u16 corer_count; /* Core reset count */ 574 u16 globr_count; /* Global reset count */ 575 u16 empr_count; /* EMP reset count */ 576 u16 pfr_count; /* PF reset count */ 577 578 u8 wol_ena : 1; /* software state of WoL */ 579 u32 wakeup_reason; /* last wakeup reason */ 580 struct ice_hw_port_stats stats; 581 struct ice_hw_port_stats stats_prev; 582 struct ice_hw hw; 583 u8 stat_prev_loaded:1; /* has previous stats been loaded */ 584 u8 rdma_mode; 585 u16 dcbx_cap; 586 u32 tx_timeout_count; 587 unsigned long tx_timeout_last_recovery; 588 u32 tx_timeout_recovery_level; 589 char int_name[ICE_INT_NAME_STR_LEN]; 590 struct auxiliary_device *adev; 591 int aux_idx; 592 u32 sw_int_count; 593 /* count of tc_flower filters specific to channel (aka where filter 594 * action is "hw_tc <tc_num>") 595 */ 596 u16 num_dmac_chnl_fltrs; 597 struct hlist_head tc_flower_fltr_list; 598 599 __le64 nvm_phy_type_lo; /* NVM PHY type low */ 600 __le64 nvm_phy_type_hi; /* NVM PHY type high */ 601 struct ice_link_default_override_tlv link_dflt_override; 602 struct ice_lag *lag; /* Link Aggregation information */ 603 604 struct ice_switchdev_info switchdev; 605 606 #define ICE_INVALID_AGG_NODE_ID 0 607 #define ICE_PF_AGG_NODE_ID_START 1 608 #define ICE_MAX_PF_AGG_NODES 32 609 struct ice_agg_node pf_agg_node[ICE_MAX_PF_AGG_NODES]; 610 #define ICE_VF_AGG_NODE_ID_START 65 611 #define ICE_MAX_VF_AGG_NODES 32 612 struct ice_agg_node vf_agg_node[ICE_MAX_VF_AGG_NODES]; 613 }; 614 615 struct ice_netdev_priv { 616 struct ice_vsi *vsi; 617 struct ice_repr *repr; 618 /* indirect block callbacks on registered higher level devices 619 * (e.g. tunnel devices) 620 * 621 * tc_indr_block_cb_priv_list is used to look up indirect callback 622 * private data 623 */ 624 struct list_head tc_indr_block_priv_list; 625 }; 626 627 /** 628 * ice_vector_ch_enabled 629 * @qv: pointer to q_vector, can be NULL 630 * 631 * This function returns true if vector is channel enabled otherwise false 632 */ 633 static inline bool ice_vector_ch_enabled(struct ice_q_vector *qv) 634 { 635 return !!qv->ch; /* Enable it to run with TC */ 636 } 637 638 /** 639 * ice_irq_dynamic_ena - Enable default interrupt generation settings 640 * @hw: pointer to HW struct 641 * @vsi: pointer to VSI struct, can be NULL 642 * @q_vector: pointer to q_vector, can be NULL 643 */ 644 static inline void 645 ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi, 646 struct ice_q_vector *q_vector) 647 { 648 u32 vector = (vsi && q_vector) ? q_vector->reg_idx : 649 ((struct ice_pf *)hw->back)->oicr_idx; 650 int itr = ICE_ITR_NONE; 651 u32 val; 652 653 /* clear the PBA here, as this function is meant to clean out all 654 * previous interrupts and enable the interrupt 655 */ 656 val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M | 657 (itr << GLINT_DYN_CTL_ITR_INDX_S); 658 if (vsi) 659 if (test_bit(ICE_VSI_DOWN, vsi->state)) 660 return; 661 wr32(hw, GLINT_DYN_CTL(vector), val); 662 } 663 664 /** 665 * ice_netdev_to_pf - Retrieve the PF struct associated with a netdev 666 * @netdev: pointer to the netdev struct 667 */ 668 static inline struct ice_pf *ice_netdev_to_pf(struct net_device *netdev) 669 { 670 struct ice_netdev_priv *np = netdev_priv(netdev); 671 672 return np->vsi->back; 673 } 674 675 static inline bool ice_is_xdp_ena_vsi(struct ice_vsi *vsi) 676 { 677 return !!vsi->xdp_prog; 678 } 679 680 static inline void ice_set_ring_xdp(struct ice_tx_ring *ring) 681 { 682 ring->flags |= ICE_TX_FLAGS_RING_XDP; 683 } 684 685 /** 686 * ice_xsk_pool - get XSK buffer pool bound to a ring 687 * @ring: Rx ring to use 688 * 689 * Returns a pointer to xdp_umem structure if there is a buffer pool present, 690 * NULL otherwise. 691 */ 692 static inline struct xsk_buff_pool *ice_xsk_pool(struct ice_rx_ring *ring) 693 { 694 struct ice_vsi *vsi = ring->vsi; 695 u16 qid = ring->q_index; 696 697 if (!ice_is_xdp_ena_vsi(vsi) || !test_bit(qid, vsi->af_xdp_zc_qps)) 698 return NULL; 699 700 return xsk_get_pool_from_qid(vsi->netdev, qid); 701 } 702 703 /** 704 * ice_tx_xsk_pool - get XSK buffer pool bound to a ring 705 * @ring: Tx ring to use 706 * 707 * Returns a pointer to xdp_umem structure if there is a buffer pool present, 708 * NULL otherwise. Tx equivalent of ice_xsk_pool. 709 */ 710 static inline struct xsk_buff_pool *ice_tx_xsk_pool(struct ice_tx_ring *ring) 711 { 712 struct ice_vsi *vsi = ring->vsi; 713 u16 qid; 714 715 qid = ring->q_index - vsi->num_xdp_txq; 716 717 if (!ice_is_xdp_ena_vsi(vsi) || !test_bit(qid, vsi->af_xdp_zc_qps)) 718 return NULL; 719 720 return xsk_get_pool_from_qid(vsi->netdev, qid); 721 } 722 723 /** 724 * ice_get_main_vsi - Get the PF VSI 725 * @pf: PF instance 726 * 727 * returns pf->vsi[0], which by definition is the PF VSI 728 */ 729 static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf) 730 { 731 if (pf->vsi) 732 return pf->vsi[0]; 733 734 return NULL; 735 } 736 737 /** 738 * ice_get_netdev_priv_vsi - return VSI associated with netdev priv. 739 * @np: private netdev structure 740 */ 741 static inline struct ice_vsi *ice_get_netdev_priv_vsi(struct ice_netdev_priv *np) 742 { 743 /* In case of port representor return source port VSI. */ 744 if (np->repr) 745 return np->repr->src_vsi; 746 else 747 return np->vsi; 748 } 749 750 /** 751 * ice_get_ctrl_vsi - Get the control VSI 752 * @pf: PF instance 753 */ 754 static inline struct ice_vsi *ice_get_ctrl_vsi(struct ice_pf *pf) 755 { 756 /* if pf->ctrl_vsi_idx is ICE_NO_VSI, control VSI was not set up */ 757 if (!pf->vsi || pf->ctrl_vsi_idx == ICE_NO_VSI) 758 return NULL; 759 760 return pf->vsi[pf->ctrl_vsi_idx]; 761 } 762 763 /** 764 * ice_is_switchdev_running - check if switchdev is configured 765 * @pf: pointer to PF structure 766 * 767 * Returns true if eswitch mode is set to DEVLINK_ESWITCH_MODE_SWITCHDEV 768 * and switchdev is configured, false otherwise. 769 */ 770 static inline bool ice_is_switchdev_running(struct ice_pf *pf) 771 { 772 return pf->switchdev.is_running; 773 } 774 775 /** 776 * ice_set_sriov_cap - enable SRIOV in PF flags 777 * @pf: PF struct 778 */ 779 static inline void ice_set_sriov_cap(struct ice_pf *pf) 780 { 781 if (pf->hw.func_caps.common_cap.sr_iov_1_1) 782 set_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags); 783 } 784 785 /** 786 * ice_clear_sriov_cap - disable SRIOV in PF flags 787 * @pf: PF struct 788 */ 789 static inline void ice_clear_sriov_cap(struct ice_pf *pf) 790 { 791 clear_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags); 792 } 793 794 #define ICE_FD_STAT_CTR_BLOCK_COUNT 256 795 #define ICE_FD_STAT_PF_IDX(base_idx) \ 796 ((base_idx) * ICE_FD_STAT_CTR_BLOCK_COUNT) 797 #define ICE_FD_SB_STAT_IDX(base_idx) ICE_FD_STAT_PF_IDX(base_idx) 798 #define ICE_FD_STAT_CH 1 799 #define ICE_FD_CH_STAT_IDX(base_idx) \ 800 (ICE_FD_STAT_PF_IDX(base_idx) + ICE_FD_STAT_CH) 801 802 /** 803 * ice_is_adq_active - any active ADQs 804 * @pf: pointer to PF 805 * 806 * This function returns true if there are any ADQs configured (which is 807 * determined by looking at VSI type (which should be VSI_PF), numtc, and 808 * TC_MQPRIO flag) otherwise return false 809 */ 810 static inline bool ice_is_adq_active(struct ice_pf *pf) 811 { 812 struct ice_vsi *vsi; 813 814 vsi = ice_get_main_vsi(pf); 815 if (!vsi) 816 return false; 817 818 /* is ADQ configured */ 819 if (vsi->tc_cfg.numtc > ICE_CHNL_START_TC && 820 test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) 821 return true; 822 823 return false; 824 } 825 826 bool netif_is_ice(struct net_device *dev); 827 int ice_vsi_setup_tx_rings(struct ice_vsi *vsi); 828 int ice_vsi_setup_rx_rings(struct ice_vsi *vsi); 829 int ice_vsi_open_ctrl(struct ice_vsi *vsi); 830 int ice_vsi_open(struct ice_vsi *vsi); 831 void ice_set_ethtool_ops(struct net_device *netdev); 832 void ice_set_ethtool_repr_ops(struct net_device *netdev); 833 void ice_set_ethtool_safe_mode_ops(struct net_device *netdev); 834 u16 ice_get_avail_txq_count(struct ice_pf *pf); 835 u16 ice_get_avail_rxq_count(struct ice_pf *pf); 836 int ice_vsi_recfg_qs(struct ice_vsi *vsi, int new_rx, int new_tx); 837 void ice_update_vsi_stats(struct ice_vsi *vsi); 838 void ice_update_pf_stats(struct ice_pf *pf); 839 int ice_up(struct ice_vsi *vsi); 840 int ice_down(struct ice_vsi *vsi); 841 int ice_vsi_cfg(struct ice_vsi *vsi); 842 struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi); 843 int ice_vsi_determine_xdp_res(struct ice_vsi *vsi); 844 int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog); 845 int ice_destroy_xdp_rings(struct ice_vsi *vsi); 846 int 847 ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames, 848 u32 flags); 849 int ice_set_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size); 850 int ice_get_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size); 851 int ice_set_rss_key(struct ice_vsi *vsi, u8 *seed); 852 int ice_get_rss_key(struct ice_vsi *vsi, u8 *seed); 853 void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size); 854 int ice_schedule_reset(struct ice_pf *pf, enum ice_reset_req reset); 855 void ice_print_link_msg(struct ice_vsi *vsi, bool isup); 856 int ice_plug_aux_dev(struct ice_pf *pf); 857 void ice_unplug_aux_dev(struct ice_pf *pf); 858 int ice_init_rdma(struct ice_pf *pf); 859 const char *ice_aq_str(enum ice_aq_err aq_err); 860 bool ice_is_wol_supported(struct ice_hw *hw); 861 void ice_fdir_del_all_fltrs(struct ice_vsi *vsi); 862 int 863 ice_fdir_write_fltr(struct ice_pf *pf, struct ice_fdir_fltr *input, bool add, 864 bool is_tun); 865 void ice_vsi_manage_fdir(struct ice_vsi *vsi, bool ena); 866 int ice_add_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd); 867 int ice_del_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd); 868 int ice_get_ethtool_fdir_entry(struct ice_hw *hw, struct ethtool_rxnfc *cmd); 869 int 870 ice_get_fdir_fltr_ids(struct ice_hw *hw, struct ethtool_rxnfc *cmd, 871 u32 *rule_locs); 872 void ice_fdir_rem_adq_chnl(struct ice_hw *hw, u16 vsi_idx); 873 void ice_fdir_release_flows(struct ice_hw *hw); 874 void ice_fdir_replay_flows(struct ice_hw *hw); 875 void ice_fdir_replay_fltrs(struct ice_pf *pf); 876 int ice_fdir_create_dflt_rules(struct ice_pf *pf); 877 int ice_aq_wait_for_event(struct ice_pf *pf, u16 opcode, unsigned long timeout, 878 struct ice_rq_event_info *event); 879 int ice_open(struct net_device *netdev); 880 int ice_open_internal(struct net_device *netdev); 881 int ice_stop(struct net_device *netdev); 882 void ice_service_task_schedule(struct ice_pf *pf); 883 884 /** 885 * ice_set_rdma_cap - enable RDMA support 886 * @pf: PF struct 887 */ 888 static inline void ice_set_rdma_cap(struct ice_pf *pf) 889 { 890 if (pf->hw.func_caps.common_cap.rdma && pf->num_rdma_msix) { 891 set_bit(ICE_FLAG_RDMA_ENA, pf->flags); 892 set_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags); 893 } 894 } 895 896 /** 897 * ice_clear_rdma_cap - disable RDMA support 898 * @pf: PF struct 899 */ 900 static inline void ice_clear_rdma_cap(struct ice_pf *pf) 901 { 902 ice_unplug_aux_dev(pf); 903 clear_bit(ICE_FLAG_RDMA_ENA, pf->flags); 904 } 905 #endif /* _ICE_H_ */ 906