1 /******************************************************************************* 2 * 3 * Intel Ethernet Controller XL710 Family Linux Driver 4 * Copyright(c) 2013 - 2017 Intel Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 * You should have received a copy of the GNU General Public License along 16 * with this program. If not, see <http://www.gnu.org/licenses/>. 17 * 18 * The full GNU General Public License is included in this distribution in 19 * the file called "COPYING". 20 * 21 * Contact Information: 22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 24 * 25 ******************************************************************************/ 26 27 #include <linux/etherdevice.h> 28 #include <linux/of_net.h> 29 #include <linux/pci.h> 30 #include <linux/bpf.h> 31 32 /* Local includes */ 33 #include "i40e.h" 34 #include "i40e_diag.h" 35 #include <net/udp_tunnel.h> 36 /* All i40e tracepoints are defined by the include below, which 37 * must be included exactly once across the whole kernel with 38 * CREATE_TRACE_POINTS defined 39 */ 40 #define CREATE_TRACE_POINTS 41 #include "i40e_trace.h" 42 43 const char i40e_driver_name[] = "i40e"; 44 static const char i40e_driver_string[] = 45 "Intel(R) Ethernet Connection XL710 Network Driver"; 46 47 #define DRV_KERN "-k" 48 49 #define DRV_VERSION_MAJOR 2 50 #define DRV_VERSION_MINOR 1 51 #define DRV_VERSION_BUILD 14 52 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \ 53 __stringify(DRV_VERSION_MINOR) "." \ 54 __stringify(DRV_VERSION_BUILD) DRV_KERN 55 const char i40e_driver_version_str[] = DRV_VERSION; 56 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation."; 57 58 /* a bit of forward declarations */ 59 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi); 60 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired); 61 static int i40e_add_vsi(struct i40e_vsi *vsi); 62 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi); 63 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit); 64 static int i40e_setup_misc_vector(struct i40e_pf *pf); 65 static void i40e_determine_queue_usage(struct i40e_pf *pf); 66 static int i40e_setup_pf_filter_control(struct i40e_pf *pf); 67 static void i40e_prep_for_reset(struct i40e_pf *pf, bool lock_acquired); 68 static int i40e_reset(struct i40e_pf *pf); 69 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired); 70 static void i40e_fdir_sb_setup(struct i40e_pf *pf); 71 static int i40e_veb_get_bw_info(struct i40e_veb *veb); 72 73 /* i40e_pci_tbl - PCI Device ID Table 74 * 75 * Last entry must be all 0s 76 * 77 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, 78 * Class, Class Mask, private data (not used) } 79 */ 80 static const struct pci_device_id i40e_pci_tbl[] = { 81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0}, 82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0}, 83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0}, 84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0}, 85 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0}, 86 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0}, 87 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0}, 88 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0}, 89 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0}, 90 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0}, 91 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0}, 92 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0}, 93 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0}, 94 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0}, 95 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_I_X722), 0}, 96 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0}, 97 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0}, 98 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_B), 0}, 99 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_SFP28), 0}, 100 /* required last entry */ 101 {0, } 102 }; 103 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl); 104 105 #define I40E_MAX_VF_COUNT 128 106 static int debug = -1; 107 module_param(debug, uint, 0); 108 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all), Debug mask (0x8XXXXXXX)"); 109 110 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>"); 111 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver"); 112 MODULE_LICENSE("GPL"); 113 MODULE_VERSION(DRV_VERSION); 114 115 static struct workqueue_struct *i40e_wq; 116 117 /** 118 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code 119 * @hw: pointer to the HW structure 120 * @mem: ptr to mem struct to fill out 121 * @size: size of memory requested 122 * @alignment: what to align the allocation to 123 **/ 124 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem, 125 u64 size, u32 alignment) 126 { 127 struct i40e_pf *pf = (struct i40e_pf *)hw->back; 128 129 mem->size = ALIGN(size, alignment); 130 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size, 131 &mem->pa, GFP_KERNEL); 132 if (!mem->va) 133 return -ENOMEM; 134 135 return 0; 136 } 137 138 /** 139 * i40e_free_dma_mem_d - OS specific memory free for shared code 140 * @hw: pointer to the HW structure 141 * @mem: ptr to mem struct to free 142 **/ 143 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem) 144 { 145 struct i40e_pf *pf = (struct i40e_pf *)hw->back; 146 147 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa); 148 mem->va = NULL; 149 mem->pa = 0; 150 mem->size = 0; 151 152 return 0; 153 } 154 155 /** 156 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code 157 * @hw: pointer to the HW structure 158 * @mem: ptr to mem struct to fill out 159 * @size: size of memory requested 160 **/ 161 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem, 162 u32 size) 163 { 164 mem->size = size; 165 mem->va = kzalloc(size, GFP_KERNEL); 166 167 if (!mem->va) 168 return -ENOMEM; 169 170 return 0; 171 } 172 173 /** 174 * i40e_free_virt_mem_d - OS specific memory free for shared code 175 * @hw: pointer to the HW structure 176 * @mem: ptr to mem struct to free 177 **/ 178 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem) 179 { 180 /* it's ok to kfree a NULL pointer */ 181 kfree(mem->va); 182 mem->va = NULL; 183 mem->size = 0; 184 185 return 0; 186 } 187 188 /** 189 * i40e_get_lump - find a lump of free generic resource 190 * @pf: board private structure 191 * @pile: the pile of resource to search 192 * @needed: the number of items needed 193 * @id: an owner id to stick on the items assigned 194 * 195 * Returns the base item index of the lump, or negative for error 196 * 197 * The search_hint trick and lack of advanced fit-finding only work 198 * because we're highly likely to have all the same size lump requests. 199 * Linear search time and any fragmentation should be minimal. 200 **/ 201 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile, 202 u16 needed, u16 id) 203 { 204 int ret = -ENOMEM; 205 int i, j; 206 207 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) { 208 dev_info(&pf->pdev->dev, 209 "param err: pile=%p needed=%d id=0x%04x\n", 210 pile, needed, id); 211 return -EINVAL; 212 } 213 214 /* start the linear search with an imperfect hint */ 215 i = pile->search_hint; 216 while (i < pile->num_entries) { 217 /* skip already allocated entries */ 218 if (pile->list[i] & I40E_PILE_VALID_BIT) { 219 i++; 220 continue; 221 } 222 223 /* do we have enough in this lump? */ 224 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) { 225 if (pile->list[i+j] & I40E_PILE_VALID_BIT) 226 break; 227 } 228 229 if (j == needed) { 230 /* there was enough, so assign it to the requestor */ 231 for (j = 0; j < needed; j++) 232 pile->list[i+j] = id | I40E_PILE_VALID_BIT; 233 ret = i; 234 pile->search_hint = i + j; 235 break; 236 } 237 238 /* not enough, so skip over it and continue looking */ 239 i += j; 240 } 241 242 return ret; 243 } 244 245 /** 246 * i40e_put_lump - return a lump of generic resource 247 * @pile: the pile of resource to search 248 * @index: the base item index 249 * @id: the owner id of the items assigned 250 * 251 * Returns the count of items in the lump 252 **/ 253 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id) 254 { 255 int valid_id = (id | I40E_PILE_VALID_BIT); 256 int count = 0; 257 int i; 258 259 if (!pile || index >= pile->num_entries) 260 return -EINVAL; 261 262 for (i = index; 263 i < pile->num_entries && pile->list[i] == valid_id; 264 i++) { 265 pile->list[i] = 0; 266 count++; 267 } 268 269 if (count && index < pile->search_hint) 270 pile->search_hint = index; 271 272 return count; 273 } 274 275 /** 276 * i40e_find_vsi_from_id - searches for the vsi with the given id 277 * @pf - the pf structure to search for the vsi 278 * @id - id of the vsi it is searching for 279 **/ 280 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id) 281 { 282 int i; 283 284 for (i = 0; i < pf->num_alloc_vsi; i++) 285 if (pf->vsi[i] && (pf->vsi[i]->id == id)) 286 return pf->vsi[i]; 287 288 return NULL; 289 } 290 291 /** 292 * i40e_service_event_schedule - Schedule the service task to wake up 293 * @pf: board private structure 294 * 295 * If not already scheduled, this puts the task into the work queue 296 **/ 297 void i40e_service_event_schedule(struct i40e_pf *pf) 298 { 299 if (!test_bit(__I40E_DOWN, pf->state) && 300 !test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) 301 queue_work(i40e_wq, &pf->service_task); 302 } 303 304 /** 305 * i40e_tx_timeout - Respond to a Tx Hang 306 * @netdev: network interface device structure 307 * 308 * If any port has noticed a Tx timeout, it is likely that the whole 309 * device is munged, not just the one netdev port, so go for the full 310 * reset. 311 **/ 312 static void i40e_tx_timeout(struct net_device *netdev) 313 { 314 struct i40e_netdev_priv *np = netdev_priv(netdev); 315 struct i40e_vsi *vsi = np->vsi; 316 struct i40e_pf *pf = vsi->back; 317 struct i40e_ring *tx_ring = NULL; 318 unsigned int i, hung_queue = 0; 319 u32 head, val; 320 321 pf->tx_timeout_count++; 322 323 /* find the stopped queue the same way the stack does */ 324 for (i = 0; i < netdev->num_tx_queues; i++) { 325 struct netdev_queue *q; 326 unsigned long trans_start; 327 328 q = netdev_get_tx_queue(netdev, i); 329 trans_start = q->trans_start; 330 if (netif_xmit_stopped(q) && 331 time_after(jiffies, 332 (trans_start + netdev->watchdog_timeo))) { 333 hung_queue = i; 334 break; 335 } 336 } 337 338 if (i == netdev->num_tx_queues) { 339 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n"); 340 } else { 341 /* now that we have an index, find the tx_ring struct */ 342 for (i = 0; i < vsi->num_queue_pairs; i++) { 343 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) { 344 if (hung_queue == 345 vsi->tx_rings[i]->queue_index) { 346 tx_ring = vsi->tx_rings[i]; 347 break; 348 } 349 } 350 } 351 } 352 353 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20))) 354 pf->tx_timeout_recovery_level = 1; /* reset after some time */ 355 else if (time_before(jiffies, 356 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo))) 357 return; /* don't do any new action before the next timeout */ 358 359 if (tx_ring) { 360 head = i40e_get_head(tx_ring); 361 /* Read interrupt register */ 362 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 363 val = rd32(&pf->hw, 364 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx + 365 tx_ring->vsi->base_vector - 1)); 366 else 367 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0); 368 369 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n", 370 vsi->seid, hung_queue, tx_ring->next_to_clean, 371 head, tx_ring->next_to_use, 372 readl(tx_ring->tail), val); 373 } 374 375 pf->tx_timeout_last_recovery = jiffies; 376 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n", 377 pf->tx_timeout_recovery_level, hung_queue); 378 379 switch (pf->tx_timeout_recovery_level) { 380 case 1: 381 set_bit(__I40E_PF_RESET_REQUESTED, pf->state); 382 break; 383 case 2: 384 set_bit(__I40E_CORE_RESET_REQUESTED, pf->state); 385 break; 386 case 3: 387 set_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state); 388 break; 389 default: 390 netdev_err(netdev, "tx_timeout recovery unsuccessful\n"); 391 break; 392 } 393 394 i40e_service_event_schedule(pf); 395 pf->tx_timeout_recovery_level++; 396 } 397 398 /** 399 * i40e_get_vsi_stats_struct - Get System Network Statistics 400 * @vsi: the VSI we care about 401 * 402 * Returns the address of the device statistics structure. 403 * The statistics are actually updated from the service task. 404 **/ 405 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi) 406 { 407 return &vsi->net_stats; 408 } 409 410 /** 411 * i40e_get_netdev_stats_struct_tx - populate stats from a Tx ring 412 * @ring: Tx ring to get statistics from 413 * @stats: statistics entry to be updated 414 **/ 415 static void i40e_get_netdev_stats_struct_tx(struct i40e_ring *ring, 416 struct rtnl_link_stats64 *stats) 417 { 418 u64 bytes, packets; 419 unsigned int start; 420 421 do { 422 start = u64_stats_fetch_begin_irq(&ring->syncp); 423 packets = ring->stats.packets; 424 bytes = ring->stats.bytes; 425 } while (u64_stats_fetch_retry_irq(&ring->syncp, start)); 426 427 stats->tx_packets += packets; 428 stats->tx_bytes += bytes; 429 } 430 431 /** 432 * i40e_get_netdev_stats_struct - Get statistics for netdev interface 433 * @netdev: network interface device structure 434 * 435 * Returns the address of the device statistics structure. 436 * The statistics are actually updated from the service task. 437 **/ 438 static void i40e_get_netdev_stats_struct(struct net_device *netdev, 439 struct rtnl_link_stats64 *stats) 440 { 441 struct i40e_netdev_priv *np = netdev_priv(netdev); 442 struct i40e_ring *tx_ring, *rx_ring; 443 struct i40e_vsi *vsi = np->vsi; 444 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi); 445 int i; 446 447 if (test_bit(__I40E_VSI_DOWN, vsi->state)) 448 return; 449 450 if (!vsi->tx_rings) 451 return; 452 453 rcu_read_lock(); 454 for (i = 0; i < vsi->num_queue_pairs; i++) { 455 u64 bytes, packets; 456 unsigned int start; 457 458 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]); 459 if (!tx_ring) 460 continue; 461 i40e_get_netdev_stats_struct_tx(tx_ring, stats); 462 463 rx_ring = &tx_ring[1]; 464 465 do { 466 start = u64_stats_fetch_begin_irq(&rx_ring->syncp); 467 packets = rx_ring->stats.packets; 468 bytes = rx_ring->stats.bytes; 469 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start)); 470 471 stats->rx_packets += packets; 472 stats->rx_bytes += bytes; 473 474 if (i40e_enabled_xdp_vsi(vsi)) 475 i40e_get_netdev_stats_struct_tx(&rx_ring[1], stats); 476 } 477 rcu_read_unlock(); 478 479 /* following stats updated by i40e_watchdog_subtask() */ 480 stats->multicast = vsi_stats->multicast; 481 stats->tx_errors = vsi_stats->tx_errors; 482 stats->tx_dropped = vsi_stats->tx_dropped; 483 stats->rx_errors = vsi_stats->rx_errors; 484 stats->rx_dropped = vsi_stats->rx_dropped; 485 stats->rx_crc_errors = vsi_stats->rx_crc_errors; 486 stats->rx_length_errors = vsi_stats->rx_length_errors; 487 } 488 489 /** 490 * i40e_vsi_reset_stats - Resets all stats of the given vsi 491 * @vsi: the VSI to have its stats reset 492 **/ 493 void i40e_vsi_reset_stats(struct i40e_vsi *vsi) 494 { 495 struct rtnl_link_stats64 *ns; 496 int i; 497 498 if (!vsi) 499 return; 500 501 ns = i40e_get_vsi_stats_struct(vsi); 502 memset(ns, 0, sizeof(*ns)); 503 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets)); 504 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats)); 505 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets)); 506 if (vsi->rx_rings && vsi->rx_rings[0]) { 507 for (i = 0; i < vsi->num_queue_pairs; i++) { 508 memset(&vsi->rx_rings[i]->stats, 0, 509 sizeof(vsi->rx_rings[i]->stats)); 510 memset(&vsi->rx_rings[i]->rx_stats, 0, 511 sizeof(vsi->rx_rings[i]->rx_stats)); 512 memset(&vsi->tx_rings[i]->stats, 0, 513 sizeof(vsi->tx_rings[i]->stats)); 514 memset(&vsi->tx_rings[i]->tx_stats, 0, 515 sizeof(vsi->tx_rings[i]->tx_stats)); 516 } 517 } 518 vsi->stat_offsets_loaded = false; 519 } 520 521 /** 522 * i40e_pf_reset_stats - Reset all of the stats for the given PF 523 * @pf: the PF to be reset 524 **/ 525 void i40e_pf_reset_stats(struct i40e_pf *pf) 526 { 527 int i; 528 529 memset(&pf->stats, 0, sizeof(pf->stats)); 530 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets)); 531 pf->stat_offsets_loaded = false; 532 533 for (i = 0; i < I40E_MAX_VEB; i++) { 534 if (pf->veb[i]) { 535 memset(&pf->veb[i]->stats, 0, 536 sizeof(pf->veb[i]->stats)); 537 memset(&pf->veb[i]->stats_offsets, 0, 538 sizeof(pf->veb[i]->stats_offsets)); 539 pf->veb[i]->stat_offsets_loaded = false; 540 } 541 } 542 pf->hw_csum_rx_error = 0; 543 } 544 545 /** 546 * i40e_stat_update48 - read and update a 48 bit stat from the chip 547 * @hw: ptr to the hardware info 548 * @hireg: the high 32 bit reg to read 549 * @loreg: the low 32 bit reg to read 550 * @offset_loaded: has the initial offset been loaded yet 551 * @offset: ptr to current offset value 552 * @stat: ptr to the stat 553 * 554 * Since the device stats are not reset at PFReset, they likely will not 555 * be zeroed when the driver starts. We'll save the first values read 556 * and use them as offsets to be subtracted from the raw values in order 557 * to report stats that count from zero. In the process, we also manage 558 * the potential roll-over. 559 **/ 560 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg, 561 bool offset_loaded, u64 *offset, u64 *stat) 562 { 563 u64 new_data; 564 565 if (hw->device_id == I40E_DEV_ID_QEMU) { 566 new_data = rd32(hw, loreg); 567 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32; 568 } else { 569 new_data = rd64(hw, loreg); 570 } 571 if (!offset_loaded) 572 *offset = new_data; 573 if (likely(new_data >= *offset)) 574 *stat = new_data - *offset; 575 else 576 *stat = (new_data + BIT_ULL(48)) - *offset; 577 *stat &= 0xFFFFFFFFFFFFULL; 578 } 579 580 /** 581 * i40e_stat_update32 - read and update a 32 bit stat from the chip 582 * @hw: ptr to the hardware info 583 * @reg: the hw reg to read 584 * @offset_loaded: has the initial offset been loaded yet 585 * @offset: ptr to current offset value 586 * @stat: ptr to the stat 587 **/ 588 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg, 589 bool offset_loaded, u64 *offset, u64 *stat) 590 { 591 u32 new_data; 592 593 new_data = rd32(hw, reg); 594 if (!offset_loaded) 595 *offset = new_data; 596 if (likely(new_data >= *offset)) 597 *stat = (u32)(new_data - *offset); 598 else 599 *stat = (u32)((new_data + BIT_ULL(32)) - *offset); 600 } 601 602 /** 603 * i40e_stat_update_and_clear32 - read and clear hw reg, update a 32 bit stat 604 * @hw: ptr to the hardware info 605 * @reg: the hw reg to read and clear 606 * @stat: ptr to the stat 607 **/ 608 static void i40e_stat_update_and_clear32(struct i40e_hw *hw, u32 reg, u64 *stat) 609 { 610 u32 new_data = rd32(hw, reg); 611 612 wr32(hw, reg, 1); /* must write a nonzero value to clear register */ 613 *stat += new_data; 614 } 615 616 /** 617 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters. 618 * @vsi: the VSI to be updated 619 **/ 620 void i40e_update_eth_stats(struct i40e_vsi *vsi) 621 { 622 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx); 623 struct i40e_pf *pf = vsi->back; 624 struct i40e_hw *hw = &pf->hw; 625 struct i40e_eth_stats *oes; 626 struct i40e_eth_stats *es; /* device's eth stats */ 627 628 es = &vsi->eth_stats; 629 oes = &vsi->eth_stats_offsets; 630 631 /* Gather up the stats that the hw collects */ 632 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx), 633 vsi->stat_offsets_loaded, 634 &oes->tx_errors, &es->tx_errors); 635 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx), 636 vsi->stat_offsets_loaded, 637 &oes->rx_discards, &es->rx_discards); 638 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx), 639 vsi->stat_offsets_loaded, 640 &oes->rx_unknown_protocol, &es->rx_unknown_protocol); 641 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx), 642 vsi->stat_offsets_loaded, 643 &oes->tx_errors, &es->tx_errors); 644 645 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx), 646 I40E_GLV_GORCL(stat_idx), 647 vsi->stat_offsets_loaded, 648 &oes->rx_bytes, &es->rx_bytes); 649 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx), 650 I40E_GLV_UPRCL(stat_idx), 651 vsi->stat_offsets_loaded, 652 &oes->rx_unicast, &es->rx_unicast); 653 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx), 654 I40E_GLV_MPRCL(stat_idx), 655 vsi->stat_offsets_loaded, 656 &oes->rx_multicast, &es->rx_multicast); 657 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx), 658 I40E_GLV_BPRCL(stat_idx), 659 vsi->stat_offsets_loaded, 660 &oes->rx_broadcast, &es->rx_broadcast); 661 662 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx), 663 I40E_GLV_GOTCL(stat_idx), 664 vsi->stat_offsets_loaded, 665 &oes->tx_bytes, &es->tx_bytes); 666 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx), 667 I40E_GLV_UPTCL(stat_idx), 668 vsi->stat_offsets_loaded, 669 &oes->tx_unicast, &es->tx_unicast); 670 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx), 671 I40E_GLV_MPTCL(stat_idx), 672 vsi->stat_offsets_loaded, 673 &oes->tx_multicast, &es->tx_multicast); 674 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx), 675 I40E_GLV_BPTCL(stat_idx), 676 vsi->stat_offsets_loaded, 677 &oes->tx_broadcast, &es->tx_broadcast); 678 vsi->stat_offsets_loaded = true; 679 } 680 681 /** 682 * i40e_update_veb_stats - Update Switch component statistics 683 * @veb: the VEB being updated 684 **/ 685 static void i40e_update_veb_stats(struct i40e_veb *veb) 686 { 687 struct i40e_pf *pf = veb->pf; 688 struct i40e_hw *hw = &pf->hw; 689 struct i40e_eth_stats *oes; 690 struct i40e_eth_stats *es; /* device's eth stats */ 691 struct i40e_veb_tc_stats *veb_oes; 692 struct i40e_veb_tc_stats *veb_es; 693 int i, idx = 0; 694 695 idx = veb->stats_idx; 696 es = &veb->stats; 697 oes = &veb->stats_offsets; 698 veb_es = &veb->tc_stats; 699 veb_oes = &veb->tc_stats_offsets; 700 701 /* Gather up the stats that the hw collects */ 702 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx), 703 veb->stat_offsets_loaded, 704 &oes->tx_discards, &es->tx_discards); 705 if (hw->revision_id > 0) 706 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx), 707 veb->stat_offsets_loaded, 708 &oes->rx_unknown_protocol, 709 &es->rx_unknown_protocol); 710 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx), 711 veb->stat_offsets_loaded, 712 &oes->rx_bytes, &es->rx_bytes); 713 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx), 714 veb->stat_offsets_loaded, 715 &oes->rx_unicast, &es->rx_unicast); 716 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx), 717 veb->stat_offsets_loaded, 718 &oes->rx_multicast, &es->rx_multicast); 719 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx), 720 veb->stat_offsets_loaded, 721 &oes->rx_broadcast, &es->rx_broadcast); 722 723 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx), 724 veb->stat_offsets_loaded, 725 &oes->tx_bytes, &es->tx_bytes); 726 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx), 727 veb->stat_offsets_loaded, 728 &oes->tx_unicast, &es->tx_unicast); 729 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx), 730 veb->stat_offsets_loaded, 731 &oes->tx_multicast, &es->tx_multicast); 732 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx), 733 veb->stat_offsets_loaded, 734 &oes->tx_broadcast, &es->tx_broadcast); 735 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 736 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx), 737 I40E_GLVEBTC_RPCL(i, idx), 738 veb->stat_offsets_loaded, 739 &veb_oes->tc_rx_packets[i], 740 &veb_es->tc_rx_packets[i]); 741 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx), 742 I40E_GLVEBTC_RBCL(i, idx), 743 veb->stat_offsets_loaded, 744 &veb_oes->tc_rx_bytes[i], 745 &veb_es->tc_rx_bytes[i]); 746 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx), 747 I40E_GLVEBTC_TPCL(i, idx), 748 veb->stat_offsets_loaded, 749 &veb_oes->tc_tx_packets[i], 750 &veb_es->tc_tx_packets[i]); 751 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx), 752 I40E_GLVEBTC_TBCL(i, idx), 753 veb->stat_offsets_loaded, 754 &veb_oes->tc_tx_bytes[i], 755 &veb_es->tc_tx_bytes[i]); 756 } 757 veb->stat_offsets_loaded = true; 758 } 759 760 /** 761 * i40e_update_vsi_stats - Update the vsi statistics counters. 762 * @vsi: the VSI to be updated 763 * 764 * There are a few instances where we store the same stat in a 765 * couple of different structs. This is partly because we have 766 * the netdev stats that need to be filled out, which is slightly 767 * different from the "eth_stats" defined by the chip and used in 768 * VF communications. We sort it out here. 769 **/ 770 static void i40e_update_vsi_stats(struct i40e_vsi *vsi) 771 { 772 struct i40e_pf *pf = vsi->back; 773 struct rtnl_link_stats64 *ons; 774 struct rtnl_link_stats64 *ns; /* netdev stats */ 775 struct i40e_eth_stats *oes; 776 struct i40e_eth_stats *es; /* device's eth stats */ 777 u32 tx_restart, tx_busy; 778 struct i40e_ring *p; 779 u32 rx_page, rx_buf; 780 u64 bytes, packets; 781 unsigned int start; 782 u64 tx_linearize; 783 u64 tx_force_wb; 784 u64 rx_p, rx_b; 785 u64 tx_p, tx_b; 786 u16 q; 787 788 if (test_bit(__I40E_VSI_DOWN, vsi->state) || 789 test_bit(__I40E_CONFIG_BUSY, pf->state)) 790 return; 791 792 ns = i40e_get_vsi_stats_struct(vsi); 793 ons = &vsi->net_stats_offsets; 794 es = &vsi->eth_stats; 795 oes = &vsi->eth_stats_offsets; 796 797 /* Gather up the netdev and vsi stats that the driver collects 798 * on the fly during packet processing 799 */ 800 rx_b = rx_p = 0; 801 tx_b = tx_p = 0; 802 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0; 803 rx_page = 0; 804 rx_buf = 0; 805 rcu_read_lock(); 806 for (q = 0; q < vsi->num_queue_pairs; q++) { 807 /* locate Tx ring */ 808 p = ACCESS_ONCE(vsi->tx_rings[q]); 809 810 do { 811 start = u64_stats_fetch_begin_irq(&p->syncp); 812 packets = p->stats.packets; 813 bytes = p->stats.bytes; 814 } while (u64_stats_fetch_retry_irq(&p->syncp, start)); 815 tx_b += bytes; 816 tx_p += packets; 817 tx_restart += p->tx_stats.restart_queue; 818 tx_busy += p->tx_stats.tx_busy; 819 tx_linearize += p->tx_stats.tx_linearize; 820 tx_force_wb += p->tx_stats.tx_force_wb; 821 822 /* Rx queue is part of the same block as Tx queue */ 823 p = &p[1]; 824 do { 825 start = u64_stats_fetch_begin_irq(&p->syncp); 826 packets = p->stats.packets; 827 bytes = p->stats.bytes; 828 } while (u64_stats_fetch_retry_irq(&p->syncp, start)); 829 rx_b += bytes; 830 rx_p += packets; 831 rx_buf += p->rx_stats.alloc_buff_failed; 832 rx_page += p->rx_stats.alloc_page_failed; 833 } 834 rcu_read_unlock(); 835 vsi->tx_restart = tx_restart; 836 vsi->tx_busy = tx_busy; 837 vsi->tx_linearize = tx_linearize; 838 vsi->tx_force_wb = tx_force_wb; 839 vsi->rx_page_failed = rx_page; 840 vsi->rx_buf_failed = rx_buf; 841 842 ns->rx_packets = rx_p; 843 ns->rx_bytes = rx_b; 844 ns->tx_packets = tx_p; 845 ns->tx_bytes = tx_b; 846 847 /* update netdev stats from eth stats */ 848 i40e_update_eth_stats(vsi); 849 ons->tx_errors = oes->tx_errors; 850 ns->tx_errors = es->tx_errors; 851 ons->multicast = oes->rx_multicast; 852 ns->multicast = es->rx_multicast; 853 ons->rx_dropped = oes->rx_discards; 854 ns->rx_dropped = es->rx_discards; 855 ons->tx_dropped = oes->tx_discards; 856 ns->tx_dropped = es->tx_discards; 857 858 /* pull in a couple PF stats if this is the main vsi */ 859 if (vsi == pf->vsi[pf->lan_vsi]) { 860 ns->rx_crc_errors = pf->stats.crc_errors; 861 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes; 862 ns->rx_length_errors = pf->stats.rx_length_errors; 863 } 864 } 865 866 /** 867 * i40e_update_pf_stats - Update the PF statistics counters. 868 * @pf: the PF to be updated 869 **/ 870 static void i40e_update_pf_stats(struct i40e_pf *pf) 871 { 872 struct i40e_hw_port_stats *osd = &pf->stats_offsets; 873 struct i40e_hw_port_stats *nsd = &pf->stats; 874 struct i40e_hw *hw = &pf->hw; 875 u32 val; 876 int i; 877 878 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port), 879 I40E_GLPRT_GORCL(hw->port), 880 pf->stat_offsets_loaded, 881 &osd->eth.rx_bytes, &nsd->eth.rx_bytes); 882 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port), 883 I40E_GLPRT_GOTCL(hw->port), 884 pf->stat_offsets_loaded, 885 &osd->eth.tx_bytes, &nsd->eth.tx_bytes); 886 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port), 887 pf->stat_offsets_loaded, 888 &osd->eth.rx_discards, 889 &nsd->eth.rx_discards); 890 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port), 891 I40E_GLPRT_UPRCL(hw->port), 892 pf->stat_offsets_loaded, 893 &osd->eth.rx_unicast, 894 &nsd->eth.rx_unicast); 895 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port), 896 I40E_GLPRT_MPRCL(hw->port), 897 pf->stat_offsets_loaded, 898 &osd->eth.rx_multicast, 899 &nsd->eth.rx_multicast); 900 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port), 901 I40E_GLPRT_BPRCL(hw->port), 902 pf->stat_offsets_loaded, 903 &osd->eth.rx_broadcast, 904 &nsd->eth.rx_broadcast); 905 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port), 906 I40E_GLPRT_UPTCL(hw->port), 907 pf->stat_offsets_loaded, 908 &osd->eth.tx_unicast, 909 &nsd->eth.tx_unicast); 910 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port), 911 I40E_GLPRT_MPTCL(hw->port), 912 pf->stat_offsets_loaded, 913 &osd->eth.tx_multicast, 914 &nsd->eth.tx_multicast); 915 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port), 916 I40E_GLPRT_BPTCL(hw->port), 917 pf->stat_offsets_loaded, 918 &osd->eth.tx_broadcast, 919 &nsd->eth.tx_broadcast); 920 921 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port), 922 pf->stat_offsets_loaded, 923 &osd->tx_dropped_link_down, 924 &nsd->tx_dropped_link_down); 925 926 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port), 927 pf->stat_offsets_loaded, 928 &osd->crc_errors, &nsd->crc_errors); 929 930 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port), 931 pf->stat_offsets_loaded, 932 &osd->illegal_bytes, &nsd->illegal_bytes); 933 934 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port), 935 pf->stat_offsets_loaded, 936 &osd->mac_local_faults, 937 &nsd->mac_local_faults); 938 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port), 939 pf->stat_offsets_loaded, 940 &osd->mac_remote_faults, 941 &nsd->mac_remote_faults); 942 943 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port), 944 pf->stat_offsets_loaded, 945 &osd->rx_length_errors, 946 &nsd->rx_length_errors); 947 948 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port), 949 pf->stat_offsets_loaded, 950 &osd->link_xon_rx, &nsd->link_xon_rx); 951 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port), 952 pf->stat_offsets_loaded, 953 &osd->link_xon_tx, &nsd->link_xon_tx); 954 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port), 955 pf->stat_offsets_loaded, 956 &osd->link_xoff_rx, &nsd->link_xoff_rx); 957 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port), 958 pf->stat_offsets_loaded, 959 &osd->link_xoff_tx, &nsd->link_xoff_tx); 960 961 for (i = 0; i < 8; i++) { 962 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i), 963 pf->stat_offsets_loaded, 964 &osd->priority_xoff_rx[i], 965 &nsd->priority_xoff_rx[i]); 966 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i), 967 pf->stat_offsets_loaded, 968 &osd->priority_xon_rx[i], 969 &nsd->priority_xon_rx[i]); 970 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i), 971 pf->stat_offsets_loaded, 972 &osd->priority_xon_tx[i], 973 &nsd->priority_xon_tx[i]); 974 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i), 975 pf->stat_offsets_loaded, 976 &osd->priority_xoff_tx[i], 977 &nsd->priority_xoff_tx[i]); 978 i40e_stat_update32(hw, 979 I40E_GLPRT_RXON2OFFCNT(hw->port, i), 980 pf->stat_offsets_loaded, 981 &osd->priority_xon_2_xoff[i], 982 &nsd->priority_xon_2_xoff[i]); 983 } 984 985 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port), 986 I40E_GLPRT_PRC64L(hw->port), 987 pf->stat_offsets_loaded, 988 &osd->rx_size_64, &nsd->rx_size_64); 989 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port), 990 I40E_GLPRT_PRC127L(hw->port), 991 pf->stat_offsets_loaded, 992 &osd->rx_size_127, &nsd->rx_size_127); 993 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port), 994 I40E_GLPRT_PRC255L(hw->port), 995 pf->stat_offsets_loaded, 996 &osd->rx_size_255, &nsd->rx_size_255); 997 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port), 998 I40E_GLPRT_PRC511L(hw->port), 999 pf->stat_offsets_loaded, 1000 &osd->rx_size_511, &nsd->rx_size_511); 1001 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port), 1002 I40E_GLPRT_PRC1023L(hw->port), 1003 pf->stat_offsets_loaded, 1004 &osd->rx_size_1023, &nsd->rx_size_1023); 1005 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port), 1006 I40E_GLPRT_PRC1522L(hw->port), 1007 pf->stat_offsets_loaded, 1008 &osd->rx_size_1522, &nsd->rx_size_1522); 1009 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port), 1010 I40E_GLPRT_PRC9522L(hw->port), 1011 pf->stat_offsets_loaded, 1012 &osd->rx_size_big, &nsd->rx_size_big); 1013 1014 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port), 1015 I40E_GLPRT_PTC64L(hw->port), 1016 pf->stat_offsets_loaded, 1017 &osd->tx_size_64, &nsd->tx_size_64); 1018 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port), 1019 I40E_GLPRT_PTC127L(hw->port), 1020 pf->stat_offsets_loaded, 1021 &osd->tx_size_127, &nsd->tx_size_127); 1022 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port), 1023 I40E_GLPRT_PTC255L(hw->port), 1024 pf->stat_offsets_loaded, 1025 &osd->tx_size_255, &nsd->tx_size_255); 1026 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port), 1027 I40E_GLPRT_PTC511L(hw->port), 1028 pf->stat_offsets_loaded, 1029 &osd->tx_size_511, &nsd->tx_size_511); 1030 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port), 1031 I40E_GLPRT_PTC1023L(hw->port), 1032 pf->stat_offsets_loaded, 1033 &osd->tx_size_1023, &nsd->tx_size_1023); 1034 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port), 1035 I40E_GLPRT_PTC1522L(hw->port), 1036 pf->stat_offsets_loaded, 1037 &osd->tx_size_1522, &nsd->tx_size_1522); 1038 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port), 1039 I40E_GLPRT_PTC9522L(hw->port), 1040 pf->stat_offsets_loaded, 1041 &osd->tx_size_big, &nsd->tx_size_big); 1042 1043 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port), 1044 pf->stat_offsets_loaded, 1045 &osd->rx_undersize, &nsd->rx_undersize); 1046 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port), 1047 pf->stat_offsets_loaded, 1048 &osd->rx_fragments, &nsd->rx_fragments); 1049 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port), 1050 pf->stat_offsets_loaded, 1051 &osd->rx_oversize, &nsd->rx_oversize); 1052 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port), 1053 pf->stat_offsets_loaded, 1054 &osd->rx_jabber, &nsd->rx_jabber); 1055 1056 /* FDIR stats */ 1057 i40e_stat_update_and_clear32(hw, 1058 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(hw->pf_id)), 1059 &nsd->fd_atr_match); 1060 i40e_stat_update_and_clear32(hw, 1061 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(hw->pf_id)), 1062 &nsd->fd_sb_match); 1063 i40e_stat_update_and_clear32(hw, 1064 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(hw->pf_id)), 1065 &nsd->fd_atr_tunnel_match); 1066 1067 val = rd32(hw, I40E_PRTPM_EEE_STAT); 1068 nsd->tx_lpi_status = 1069 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >> 1070 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT; 1071 nsd->rx_lpi_status = 1072 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >> 1073 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT; 1074 i40e_stat_update32(hw, I40E_PRTPM_TLPIC, 1075 pf->stat_offsets_loaded, 1076 &osd->tx_lpi_count, &nsd->tx_lpi_count); 1077 i40e_stat_update32(hw, I40E_PRTPM_RLPIC, 1078 pf->stat_offsets_loaded, 1079 &osd->rx_lpi_count, &nsd->rx_lpi_count); 1080 1081 if (pf->flags & I40E_FLAG_FD_SB_ENABLED && 1082 !(pf->flags & I40E_FLAG_FD_SB_AUTO_DISABLED)) 1083 nsd->fd_sb_status = true; 1084 else 1085 nsd->fd_sb_status = false; 1086 1087 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED && 1088 !(pf->flags & I40E_FLAG_FD_ATR_AUTO_DISABLED)) 1089 nsd->fd_atr_status = true; 1090 else 1091 nsd->fd_atr_status = false; 1092 1093 pf->stat_offsets_loaded = true; 1094 } 1095 1096 /** 1097 * i40e_update_stats - Update the various statistics counters. 1098 * @vsi: the VSI to be updated 1099 * 1100 * Update the various stats for this VSI and its related entities. 1101 **/ 1102 void i40e_update_stats(struct i40e_vsi *vsi) 1103 { 1104 struct i40e_pf *pf = vsi->back; 1105 1106 if (vsi == pf->vsi[pf->lan_vsi]) 1107 i40e_update_pf_stats(pf); 1108 1109 i40e_update_vsi_stats(vsi); 1110 } 1111 1112 /** 1113 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter 1114 * @vsi: the VSI to be searched 1115 * @macaddr: the MAC address 1116 * @vlan: the vlan 1117 * 1118 * Returns ptr to the filter object or NULL 1119 **/ 1120 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi, 1121 const u8 *macaddr, s16 vlan) 1122 { 1123 struct i40e_mac_filter *f; 1124 u64 key; 1125 1126 if (!vsi || !macaddr) 1127 return NULL; 1128 1129 key = i40e_addr_to_hkey(macaddr); 1130 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) { 1131 if ((ether_addr_equal(macaddr, f->macaddr)) && 1132 (vlan == f->vlan)) 1133 return f; 1134 } 1135 return NULL; 1136 } 1137 1138 /** 1139 * i40e_find_mac - Find a mac addr in the macvlan filters list 1140 * @vsi: the VSI to be searched 1141 * @macaddr: the MAC address we are searching for 1142 * 1143 * Returns the first filter with the provided MAC address or NULL if 1144 * MAC address was not found 1145 **/ 1146 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, const u8 *macaddr) 1147 { 1148 struct i40e_mac_filter *f; 1149 u64 key; 1150 1151 if (!vsi || !macaddr) 1152 return NULL; 1153 1154 key = i40e_addr_to_hkey(macaddr); 1155 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) { 1156 if ((ether_addr_equal(macaddr, f->macaddr))) 1157 return f; 1158 } 1159 return NULL; 1160 } 1161 1162 /** 1163 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode 1164 * @vsi: the VSI to be searched 1165 * 1166 * Returns true if VSI is in vlan mode or false otherwise 1167 **/ 1168 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi) 1169 { 1170 /* If we have a PVID, always operate in VLAN mode */ 1171 if (vsi->info.pvid) 1172 return true; 1173 1174 /* We need to operate in VLAN mode whenever we have any filters with 1175 * a VLAN other than I40E_VLAN_ALL. We could check the table each 1176 * time, incurring search cost repeatedly. However, we can notice two 1177 * things: 1178 * 1179 * 1) the only place where we can gain a VLAN filter is in 1180 * i40e_add_filter. 1181 * 1182 * 2) the only place where filters are actually removed is in 1183 * i40e_sync_filters_subtask. 1184 * 1185 * Thus, we can simply use a boolean value, has_vlan_filters which we 1186 * will set to true when we add a VLAN filter in i40e_add_filter. Then 1187 * we have to perform the full search after deleting filters in 1188 * i40e_sync_filters_subtask, but we already have to search 1189 * filters here and can perform the check at the same time. This 1190 * results in avoiding embedding a loop for VLAN mode inside another 1191 * loop over all the filters, and should maintain correctness as noted 1192 * above. 1193 */ 1194 return vsi->has_vlan_filter; 1195 } 1196 1197 /** 1198 * i40e_correct_mac_vlan_filters - Correct non-VLAN filters if necessary 1199 * @vsi: the VSI to configure 1200 * @tmp_add_list: list of filters ready to be added 1201 * @tmp_del_list: list of filters ready to be deleted 1202 * @vlan_filters: the number of active VLAN filters 1203 * 1204 * Update VLAN=0 and VLAN=-1 (I40E_VLAN_ANY) filters properly so that they 1205 * behave as expected. If we have any active VLAN filters remaining or about 1206 * to be added then we need to update non-VLAN filters to be marked as VLAN=0 1207 * so that they only match against untagged traffic. If we no longer have any 1208 * active VLAN filters, we need to make all non-VLAN filters marked as VLAN=-1 1209 * so that they match against both tagged and untagged traffic. In this way, 1210 * we ensure that we correctly receive the desired traffic. This ensures that 1211 * when we have an active VLAN we will receive only untagged traffic and 1212 * traffic matching active VLANs. If we have no active VLANs then we will 1213 * operate in non-VLAN mode and receive all traffic, tagged or untagged. 1214 * 1215 * Finally, in a similar fashion, this function also corrects filters when 1216 * there is an active PVID assigned to this VSI. 1217 * 1218 * In case of memory allocation failure return -ENOMEM. Otherwise, return 0. 1219 * 1220 * This function is only expected to be called from within 1221 * i40e_sync_vsi_filters. 1222 * 1223 * NOTE: This function expects to be called while under the 1224 * mac_filter_hash_lock 1225 */ 1226 static int i40e_correct_mac_vlan_filters(struct i40e_vsi *vsi, 1227 struct hlist_head *tmp_add_list, 1228 struct hlist_head *tmp_del_list, 1229 int vlan_filters) 1230 { 1231 s16 pvid = le16_to_cpu(vsi->info.pvid); 1232 struct i40e_mac_filter *f, *add_head; 1233 struct i40e_new_mac_filter *new; 1234 struct hlist_node *h; 1235 int bkt, new_vlan; 1236 1237 /* To determine if a particular filter needs to be replaced we 1238 * have the three following conditions: 1239 * 1240 * a) if we have a PVID assigned, then all filters which are 1241 * not marked as VLAN=PVID must be replaced with filters that 1242 * are. 1243 * b) otherwise, if we have any active VLANS, all filters 1244 * which are marked as VLAN=-1 must be replaced with 1245 * filters marked as VLAN=0 1246 * c) finally, if we do not have any active VLANS, all filters 1247 * which are marked as VLAN=0 must be replaced with filters 1248 * marked as VLAN=-1 1249 */ 1250 1251 /* Update the filters about to be added in place */ 1252 hlist_for_each_entry(new, tmp_add_list, hlist) { 1253 if (pvid && new->f->vlan != pvid) 1254 new->f->vlan = pvid; 1255 else if (vlan_filters && new->f->vlan == I40E_VLAN_ANY) 1256 new->f->vlan = 0; 1257 else if (!vlan_filters && new->f->vlan == 0) 1258 new->f->vlan = I40E_VLAN_ANY; 1259 } 1260 1261 /* Update the remaining active filters */ 1262 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) { 1263 /* Combine the checks for whether a filter needs to be changed 1264 * and then determine the new VLAN inside the if block, in 1265 * order to avoid duplicating code for adding the new filter 1266 * then deleting the old filter. 1267 */ 1268 if ((pvid && f->vlan != pvid) || 1269 (vlan_filters && f->vlan == I40E_VLAN_ANY) || 1270 (!vlan_filters && f->vlan == 0)) { 1271 /* Determine the new vlan we will be adding */ 1272 if (pvid) 1273 new_vlan = pvid; 1274 else if (vlan_filters) 1275 new_vlan = 0; 1276 else 1277 new_vlan = I40E_VLAN_ANY; 1278 1279 /* Create the new filter */ 1280 add_head = i40e_add_filter(vsi, f->macaddr, new_vlan); 1281 if (!add_head) 1282 return -ENOMEM; 1283 1284 /* Create a temporary i40e_new_mac_filter */ 1285 new = kzalloc(sizeof(*new), GFP_ATOMIC); 1286 if (!new) 1287 return -ENOMEM; 1288 1289 new->f = add_head; 1290 new->state = add_head->state; 1291 1292 /* Add the new filter to the tmp list */ 1293 hlist_add_head(&new->hlist, tmp_add_list); 1294 1295 /* Put the original filter into the delete list */ 1296 f->state = I40E_FILTER_REMOVE; 1297 hash_del(&f->hlist); 1298 hlist_add_head(&f->hlist, tmp_del_list); 1299 } 1300 } 1301 1302 vsi->has_vlan_filter = !!vlan_filters; 1303 1304 return 0; 1305 } 1306 1307 /** 1308 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM 1309 * @vsi: the PF Main VSI - inappropriate for any other VSI 1310 * @macaddr: the MAC address 1311 * 1312 * Remove whatever filter the firmware set up so the driver can manage 1313 * its own filtering intelligently. 1314 **/ 1315 static void i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr) 1316 { 1317 struct i40e_aqc_remove_macvlan_element_data element; 1318 struct i40e_pf *pf = vsi->back; 1319 1320 /* Only appropriate for the PF main VSI */ 1321 if (vsi->type != I40E_VSI_MAIN) 1322 return; 1323 1324 memset(&element, 0, sizeof(element)); 1325 ether_addr_copy(element.mac_addr, macaddr); 1326 element.vlan_tag = 0; 1327 /* Ignore error returns, some firmware does it this way... */ 1328 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH; 1329 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL); 1330 1331 memset(&element, 0, sizeof(element)); 1332 ether_addr_copy(element.mac_addr, macaddr); 1333 element.vlan_tag = 0; 1334 /* ...and some firmware does it this way. */ 1335 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH | 1336 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN; 1337 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL); 1338 } 1339 1340 /** 1341 * i40e_add_filter - Add a mac/vlan filter to the VSI 1342 * @vsi: the VSI to be searched 1343 * @macaddr: the MAC address 1344 * @vlan: the vlan 1345 * 1346 * Returns ptr to the filter object or NULL when no memory available. 1347 * 1348 * NOTE: This function is expected to be called with mac_filter_hash_lock 1349 * being held. 1350 **/ 1351 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi, 1352 const u8 *macaddr, s16 vlan) 1353 { 1354 struct i40e_mac_filter *f; 1355 u64 key; 1356 1357 if (!vsi || !macaddr) 1358 return NULL; 1359 1360 f = i40e_find_filter(vsi, macaddr, vlan); 1361 if (!f) { 1362 f = kzalloc(sizeof(*f), GFP_ATOMIC); 1363 if (!f) 1364 return NULL; 1365 1366 /* Update the boolean indicating if we need to function in 1367 * VLAN mode. 1368 */ 1369 if (vlan >= 0) 1370 vsi->has_vlan_filter = true; 1371 1372 ether_addr_copy(f->macaddr, macaddr); 1373 f->vlan = vlan; 1374 /* If we're in overflow promisc mode, set the state directly 1375 * to failed, so we don't bother to try sending the filter 1376 * to the hardware. 1377 */ 1378 if (test_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state)) 1379 f->state = I40E_FILTER_FAILED; 1380 else 1381 f->state = I40E_FILTER_NEW; 1382 INIT_HLIST_NODE(&f->hlist); 1383 1384 key = i40e_addr_to_hkey(macaddr); 1385 hash_add(vsi->mac_filter_hash, &f->hlist, key); 1386 1387 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 1388 vsi->back->flags |= I40E_FLAG_FILTER_SYNC; 1389 } 1390 1391 /* If we're asked to add a filter that has been marked for removal, it 1392 * is safe to simply restore it to active state. __i40e_del_filter 1393 * will have simply deleted any filters which were previously marked 1394 * NEW or FAILED, so if it is currently marked REMOVE it must have 1395 * previously been ACTIVE. Since we haven't yet run the sync filters 1396 * task, just restore this filter to the ACTIVE state so that the 1397 * sync task leaves it in place 1398 */ 1399 if (f->state == I40E_FILTER_REMOVE) 1400 f->state = I40E_FILTER_ACTIVE; 1401 1402 return f; 1403 } 1404 1405 /** 1406 * __i40e_del_filter - Remove a specific filter from the VSI 1407 * @vsi: VSI to remove from 1408 * @f: the filter to remove from the list 1409 * 1410 * This function should be called instead of i40e_del_filter only if you know 1411 * the exact filter you will remove already, such as via i40e_find_filter or 1412 * i40e_find_mac. 1413 * 1414 * NOTE: This function is expected to be called with mac_filter_hash_lock 1415 * being held. 1416 * ANOTHER NOTE: This function MUST be called from within the context of 1417 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe() 1418 * instead of list_for_each_entry(). 1419 **/ 1420 void __i40e_del_filter(struct i40e_vsi *vsi, struct i40e_mac_filter *f) 1421 { 1422 if (!f) 1423 return; 1424 1425 /* If the filter was never added to firmware then we can just delete it 1426 * directly and we don't want to set the status to remove or else an 1427 * admin queue command will unnecessarily fire. 1428 */ 1429 if ((f->state == I40E_FILTER_FAILED) || 1430 (f->state == I40E_FILTER_NEW)) { 1431 hash_del(&f->hlist); 1432 kfree(f); 1433 } else { 1434 f->state = I40E_FILTER_REMOVE; 1435 } 1436 1437 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 1438 vsi->back->flags |= I40E_FLAG_FILTER_SYNC; 1439 } 1440 1441 /** 1442 * i40e_del_filter - Remove a MAC/VLAN filter from the VSI 1443 * @vsi: the VSI to be searched 1444 * @macaddr: the MAC address 1445 * @vlan: the VLAN 1446 * 1447 * NOTE: This function is expected to be called with mac_filter_hash_lock 1448 * being held. 1449 * ANOTHER NOTE: This function MUST be called from within the context of 1450 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe() 1451 * instead of list_for_each_entry(). 1452 **/ 1453 void i40e_del_filter(struct i40e_vsi *vsi, const u8 *macaddr, s16 vlan) 1454 { 1455 struct i40e_mac_filter *f; 1456 1457 if (!vsi || !macaddr) 1458 return; 1459 1460 f = i40e_find_filter(vsi, macaddr, vlan); 1461 __i40e_del_filter(vsi, f); 1462 } 1463 1464 /** 1465 * i40e_add_mac_filter - Add a MAC filter for all active VLANs 1466 * @vsi: the VSI to be searched 1467 * @macaddr: the mac address to be filtered 1468 * 1469 * If we're not in VLAN mode, just add the filter to I40E_VLAN_ANY. Otherwise, 1470 * go through all the macvlan filters and add a macvlan filter for each 1471 * unique vlan that already exists. If a PVID has been assigned, instead only 1472 * add the macaddr to that VLAN. 1473 * 1474 * Returns last filter added on success, else NULL 1475 **/ 1476 struct i40e_mac_filter *i40e_add_mac_filter(struct i40e_vsi *vsi, 1477 const u8 *macaddr) 1478 { 1479 struct i40e_mac_filter *f, *add = NULL; 1480 struct hlist_node *h; 1481 int bkt; 1482 1483 if (vsi->info.pvid) 1484 return i40e_add_filter(vsi, macaddr, 1485 le16_to_cpu(vsi->info.pvid)); 1486 1487 if (!i40e_is_vsi_in_vlan(vsi)) 1488 return i40e_add_filter(vsi, macaddr, I40E_VLAN_ANY); 1489 1490 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) { 1491 if (f->state == I40E_FILTER_REMOVE) 1492 continue; 1493 add = i40e_add_filter(vsi, macaddr, f->vlan); 1494 if (!add) 1495 return NULL; 1496 } 1497 1498 return add; 1499 } 1500 1501 /** 1502 * i40e_del_mac_filter - Remove a MAC filter from all VLANs 1503 * @vsi: the VSI to be searched 1504 * @macaddr: the mac address to be removed 1505 * 1506 * Removes a given MAC address from a VSI regardless of what VLAN it has been 1507 * associated with. 1508 * 1509 * Returns 0 for success, or error 1510 **/ 1511 int i40e_del_mac_filter(struct i40e_vsi *vsi, const u8 *macaddr) 1512 { 1513 struct i40e_mac_filter *f; 1514 struct hlist_node *h; 1515 bool found = false; 1516 int bkt; 1517 1518 WARN(!spin_is_locked(&vsi->mac_filter_hash_lock), 1519 "Missing mac_filter_hash_lock\n"); 1520 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) { 1521 if (ether_addr_equal(macaddr, f->macaddr)) { 1522 __i40e_del_filter(vsi, f); 1523 found = true; 1524 } 1525 } 1526 1527 if (found) 1528 return 0; 1529 else 1530 return -ENOENT; 1531 } 1532 1533 /** 1534 * i40e_set_mac - NDO callback to set mac address 1535 * @netdev: network interface device structure 1536 * @p: pointer to an address structure 1537 * 1538 * Returns 0 on success, negative on failure 1539 **/ 1540 static int i40e_set_mac(struct net_device *netdev, void *p) 1541 { 1542 struct i40e_netdev_priv *np = netdev_priv(netdev); 1543 struct i40e_vsi *vsi = np->vsi; 1544 struct i40e_pf *pf = vsi->back; 1545 struct i40e_hw *hw = &pf->hw; 1546 struct sockaddr *addr = p; 1547 1548 if (!is_valid_ether_addr(addr->sa_data)) 1549 return -EADDRNOTAVAIL; 1550 1551 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) { 1552 netdev_info(netdev, "already using mac address %pM\n", 1553 addr->sa_data); 1554 return 0; 1555 } 1556 1557 if (test_bit(__I40E_VSI_DOWN, vsi->back->state) || 1558 test_bit(__I40E_RESET_RECOVERY_PENDING, vsi->back->state)) 1559 return -EADDRNOTAVAIL; 1560 1561 if (ether_addr_equal(hw->mac.addr, addr->sa_data)) 1562 netdev_info(netdev, "returning to hw mac address %pM\n", 1563 hw->mac.addr); 1564 else 1565 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data); 1566 1567 spin_lock_bh(&vsi->mac_filter_hash_lock); 1568 i40e_del_mac_filter(vsi, netdev->dev_addr); 1569 i40e_add_mac_filter(vsi, addr->sa_data); 1570 spin_unlock_bh(&vsi->mac_filter_hash_lock); 1571 ether_addr_copy(netdev->dev_addr, addr->sa_data); 1572 if (vsi->type == I40E_VSI_MAIN) { 1573 i40e_status ret; 1574 1575 ret = i40e_aq_mac_address_write(&vsi->back->hw, 1576 I40E_AQC_WRITE_TYPE_LAA_WOL, 1577 addr->sa_data, NULL); 1578 if (ret) 1579 netdev_info(netdev, "Ignoring error from firmware on LAA update, status %s, AQ ret %s\n", 1580 i40e_stat_str(hw, ret), 1581 i40e_aq_str(hw, hw->aq.asq_last_status)); 1582 } 1583 1584 /* schedule our worker thread which will take care of 1585 * applying the new filter changes 1586 */ 1587 i40e_service_event_schedule(vsi->back); 1588 return 0; 1589 } 1590 1591 /** 1592 * i40e_config_rss_aq - Prepare for RSS using AQ commands 1593 * @vsi: vsi structure 1594 * @seed: RSS hash seed 1595 **/ 1596 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed, 1597 u8 *lut, u16 lut_size) 1598 { 1599 struct i40e_pf *pf = vsi->back; 1600 struct i40e_hw *hw = &pf->hw; 1601 int ret = 0; 1602 1603 if (seed) { 1604 struct i40e_aqc_get_set_rss_key_data *seed_dw = 1605 (struct i40e_aqc_get_set_rss_key_data *)seed; 1606 ret = i40e_aq_set_rss_key(hw, vsi->id, seed_dw); 1607 if (ret) { 1608 dev_info(&pf->pdev->dev, 1609 "Cannot set RSS key, err %s aq_err %s\n", 1610 i40e_stat_str(hw, ret), 1611 i40e_aq_str(hw, hw->aq.asq_last_status)); 1612 return ret; 1613 } 1614 } 1615 if (lut) { 1616 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false; 1617 1618 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size); 1619 if (ret) { 1620 dev_info(&pf->pdev->dev, 1621 "Cannot set RSS lut, err %s aq_err %s\n", 1622 i40e_stat_str(hw, ret), 1623 i40e_aq_str(hw, hw->aq.asq_last_status)); 1624 return ret; 1625 } 1626 } 1627 return ret; 1628 } 1629 1630 /** 1631 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used 1632 * @vsi: VSI structure 1633 **/ 1634 static int i40e_vsi_config_rss(struct i40e_vsi *vsi) 1635 { 1636 struct i40e_pf *pf = vsi->back; 1637 u8 seed[I40E_HKEY_ARRAY_SIZE]; 1638 u8 *lut; 1639 int ret; 1640 1641 if (!(pf->hw_features & I40E_HW_RSS_AQ_CAPABLE)) 1642 return 0; 1643 if (!vsi->rss_size) 1644 vsi->rss_size = min_t(int, pf->alloc_rss_size, 1645 vsi->num_queue_pairs); 1646 if (!vsi->rss_size) 1647 return -EINVAL; 1648 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL); 1649 if (!lut) 1650 return -ENOMEM; 1651 1652 /* Use the user configured hash keys and lookup table if there is one, 1653 * otherwise use default 1654 */ 1655 if (vsi->rss_lut_user) 1656 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size); 1657 else 1658 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size); 1659 if (vsi->rss_hkey_user) 1660 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE); 1661 else 1662 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE); 1663 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size); 1664 kfree(lut); 1665 return ret; 1666 } 1667 1668 /** 1669 * i40e_vsi_setup_queue_map_mqprio - Prepares mqprio based tc_config 1670 * @vsi: the VSI being configured, 1671 * @ctxt: VSI context structure 1672 * @enabled_tc: number of traffic classes to enable 1673 * 1674 * Prepares VSI tc_config to have queue configurations based on MQPRIO options. 1675 **/ 1676 static int i40e_vsi_setup_queue_map_mqprio(struct i40e_vsi *vsi, 1677 struct i40e_vsi_context *ctxt, 1678 u8 enabled_tc) 1679 { 1680 u16 qcount = 0, max_qcount, qmap, sections = 0; 1681 int i, override_q, pow, num_qps, ret; 1682 u8 netdev_tc = 0, offset = 0; 1683 1684 if (vsi->type != I40E_VSI_MAIN) 1685 return -EINVAL; 1686 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID; 1687 sections |= I40E_AQ_VSI_PROP_SCHED_VALID; 1688 vsi->tc_config.numtc = vsi->mqprio_qopt.qopt.num_tc; 1689 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1; 1690 num_qps = vsi->mqprio_qopt.qopt.count[0]; 1691 1692 /* find the next higher power-of-2 of num queue pairs */ 1693 pow = ilog2(num_qps); 1694 if (!is_power_of_2(num_qps)) 1695 pow++; 1696 qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) | 1697 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT); 1698 1699 /* Setup queue offset/count for all TCs for given VSI */ 1700 max_qcount = vsi->mqprio_qopt.qopt.count[0]; 1701 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 1702 /* See if the given TC is enabled for the given VSI */ 1703 if (vsi->tc_config.enabled_tc & BIT(i)) { 1704 offset = vsi->mqprio_qopt.qopt.offset[i]; 1705 qcount = vsi->mqprio_qopt.qopt.count[i]; 1706 if (qcount > max_qcount) 1707 max_qcount = qcount; 1708 vsi->tc_config.tc_info[i].qoffset = offset; 1709 vsi->tc_config.tc_info[i].qcount = qcount; 1710 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++; 1711 } else { 1712 /* TC is not enabled so set the offset to 1713 * default queue and allocate one queue 1714 * for the given TC. 1715 */ 1716 vsi->tc_config.tc_info[i].qoffset = 0; 1717 vsi->tc_config.tc_info[i].qcount = 1; 1718 vsi->tc_config.tc_info[i].netdev_tc = 0; 1719 } 1720 } 1721 1722 /* Set actual Tx/Rx queue pairs */ 1723 vsi->num_queue_pairs = offset + qcount; 1724 1725 /* Setup queue TC[0].qmap for given VSI context */ 1726 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap); 1727 ctxt->info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG); 1728 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue); 1729 ctxt->info.valid_sections |= cpu_to_le16(sections); 1730 1731 /* Reconfigure RSS for main VSI with max queue count */ 1732 vsi->rss_size = max_qcount; 1733 ret = i40e_vsi_config_rss(vsi); 1734 if (ret) { 1735 dev_info(&vsi->back->pdev->dev, 1736 "Failed to reconfig rss for num_queues (%u)\n", 1737 max_qcount); 1738 return ret; 1739 } 1740 vsi->reconfig_rss = true; 1741 dev_dbg(&vsi->back->pdev->dev, 1742 "Reconfigured rss with num_queues (%u)\n", max_qcount); 1743 1744 /* Find queue count available for channel VSIs and starting offset 1745 * for channel VSIs 1746 */ 1747 override_q = vsi->mqprio_qopt.qopt.count[0]; 1748 if (override_q && override_q < vsi->num_queue_pairs) { 1749 vsi->cnt_q_avail = vsi->num_queue_pairs - override_q; 1750 vsi->next_base_queue = override_q; 1751 } 1752 return 0; 1753 } 1754 1755 /** 1756 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc 1757 * @vsi: the VSI being setup 1758 * @ctxt: VSI context structure 1759 * @enabled_tc: Enabled TCs bitmap 1760 * @is_add: True if called before Add VSI 1761 * 1762 * Setup VSI queue mapping for enabled traffic classes. 1763 **/ 1764 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi, 1765 struct i40e_vsi_context *ctxt, 1766 u8 enabled_tc, 1767 bool is_add) 1768 { 1769 struct i40e_pf *pf = vsi->back; 1770 u16 sections = 0; 1771 u8 netdev_tc = 0; 1772 u16 numtc = 0; 1773 u16 qcount; 1774 u8 offset; 1775 u16 qmap; 1776 int i; 1777 u16 num_tc_qps = 0; 1778 1779 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID; 1780 offset = 0; 1781 1782 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) { 1783 /* Find numtc from enabled TC bitmap */ 1784 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 1785 if (enabled_tc & BIT(i)) /* TC is enabled */ 1786 numtc++; 1787 } 1788 if (!numtc) { 1789 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n"); 1790 numtc = 1; 1791 } 1792 } else { 1793 /* At least TC0 is enabled in non-DCB, non-MQPRIO case */ 1794 numtc = 1; 1795 } 1796 1797 vsi->tc_config.numtc = numtc; 1798 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1; 1799 /* Number of queues per enabled TC */ 1800 qcount = vsi->alloc_queue_pairs; 1801 1802 num_tc_qps = qcount / numtc; 1803 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf)); 1804 1805 /* Setup queue offset/count for all TCs for given VSI */ 1806 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 1807 /* See if the given TC is enabled for the given VSI */ 1808 if (vsi->tc_config.enabled_tc & BIT(i)) { 1809 /* TC is enabled */ 1810 int pow, num_qps; 1811 1812 switch (vsi->type) { 1813 case I40E_VSI_MAIN: 1814 qcount = min_t(int, pf->alloc_rss_size, 1815 num_tc_qps); 1816 break; 1817 case I40E_VSI_FDIR: 1818 case I40E_VSI_SRIOV: 1819 case I40E_VSI_VMDQ2: 1820 default: 1821 qcount = num_tc_qps; 1822 WARN_ON(i != 0); 1823 break; 1824 } 1825 vsi->tc_config.tc_info[i].qoffset = offset; 1826 vsi->tc_config.tc_info[i].qcount = qcount; 1827 1828 /* find the next higher power-of-2 of num queue pairs */ 1829 num_qps = qcount; 1830 pow = 0; 1831 while (num_qps && (BIT_ULL(pow) < qcount)) { 1832 pow++; 1833 num_qps >>= 1; 1834 } 1835 1836 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++; 1837 qmap = 1838 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) | 1839 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT); 1840 1841 offset += qcount; 1842 } else { 1843 /* TC is not enabled so set the offset to 1844 * default queue and allocate one queue 1845 * for the given TC. 1846 */ 1847 vsi->tc_config.tc_info[i].qoffset = 0; 1848 vsi->tc_config.tc_info[i].qcount = 1; 1849 vsi->tc_config.tc_info[i].netdev_tc = 0; 1850 1851 qmap = 0; 1852 } 1853 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap); 1854 } 1855 1856 /* Set actual Tx/Rx queue pairs */ 1857 vsi->num_queue_pairs = offset; 1858 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) { 1859 if (vsi->req_queue_pairs > 0) 1860 vsi->num_queue_pairs = vsi->req_queue_pairs; 1861 else if (pf->flags & I40E_FLAG_MSIX_ENABLED) 1862 vsi->num_queue_pairs = pf->num_lan_msix; 1863 } 1864 1865 /* Scheduler section valid can only be set for ADD VSI */ 1866 if (is_add) { 1867 sections |= I40E_AQ_VSI_PROP_SCHED_VALID; 1868 1869 ctxt->info.up_enable_bits = enabled_tc; 1870 } 1871 if (vsi->type == I40E_VSI_SRIOV) { 1872 ctxt->info.mapping_flags |= 1873 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG); 1874 for (i = 0; i < vsi->num_queue_pairs; i++) 1875 ctxt->info.queue_mapping[i] = 1876 cpu_to_le16(vsi->base_queue + i); 1877 } else { 1878 ctxt->info.mapping_flags |= 1879 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG); 1880 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue); 1881 } 1882 ctxt->info.valid_sections |= cpu_to_le16(sections); 1883 } 1884 1885 /** 1886 * i40e_addr_sync - Callback for dev_(mc|uc)_sync to add address 1887 * @netdev: the netdevice 1888 * @addr: address to add 1889 * 1890 * Called by __dev_(mc|uc)_sync when an address needs to be added. We call 1891 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock. 1892 */ 1893 static int i40e_addr_sync(struct net_device *netdev, const u8 *addr) 1894 { 1895 struct i40e_netdev_priv *np = netdev_priv(netdev); 1896 struct i40e_vsi *vsi = np->vsi; 1897 1898 if (i40e_add_mac_filter(vsi, addr)) 1899 return 0; 1900 else 1901 return -ENOMEM; 1902 } 1903 1904 /** 1905 * i40e_addr_unsync - Callback for dev_(mc|uc)_sync to remove address 1906 * @netdev: the netdevice 1907 * @addr: address to add 1908 * 1909 * Called by __dev_(mc|uc)_sync when an address needs to be removed. We call 1910 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock. 1911 */ 1912 static int i40e_addr_unsync(struct net_device *netdev, const u8 *addr) 1913 { 1914 struct i40e_netdev_priv *np = netdev_priv(netdev); 1915 struct i40e_vsi *vsi = np->vsi; 1916 1917 i40e_del_mac_filter(vsi, addr); 1918 1919 return 0; 1920 } 1921 1922 /** 1923 * i40e_set_rx_mode - NDO callback to set the netdev filters 1924 * @netdev: network interface device structure 1925 **/ 1926 static void i40e_set_rx_mode(struct net_device *netdev) 1927 { 1928 struct i40e_netdev_priv *np = netdev_priv(netdev); 1929 struct i40e_vsi *vsi = np->vsi; 1930 1931 spin_lock_bh(&vsi->mac_filter_hash_lock); 1932 1933 __dev_uc_sync(netdev, i40e_addr_sync, i40e_addr_unsync); 1934 __dev_mc_sync(netdev, i40e_addr_sync, i40e_addr_unsync); 1935 1936 spin_unlock_bh(&vsi->mac_filter_hash_lock); 1937 1938 /* check for other flag changes */ 1939 if (vsi->current_netdev_flags != vsi->netdev->flags) { 1940 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 1941 vsi->back->flags |= I40E_FLAG_FILTER_SYNC; 1942 } 1943 } 1944 1945 /** 1946 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries 1947 * @vsi: Pointer to VSI struct 1948 * @from: Pointer to list which contains MAC filter entries - changes to 1949 * those entries needs to be undone. 1950 * 1951 * MAC filter entries from this list were slated for deletion. 1952 **/ 1953 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi, 1954 struct hlist_head *from) 1955 { 1956 struct i40e_mac_filter *f; 1957 struct hlist_node *h; 1958 1959 hlist_for_each_entry_safe(f, h, from, hlist) { 1960 u64 key = i40e_addr_to_hkey(f->macaddr); 1961 1962 /* Move the element back into MAC filter list*/ 1963 hlist_del(&f->hlist); 1964 hash_add(vsi->mac_filter_hash, &f->hlist, key); 1965 } 1966 } 1967 1968 /** 1969 * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries 1970 * @vsi: Pointer to vsi struct 1971 * @from: Pointer to list which contains MAC filter entries - changes to 1972 * those entries needs to be undone. 1973 * 1974 * MAC filter entries from this list were slated for addition. 1975 **/ 1976 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi, 1977 struct hlist_head *from) 1978 { 1979 struct i40e_new_mac_filter *new; 1980 struct hlist_node *h; 1981 1982 hlist_for_each_entry_safe(new, h, from, hlist) { 1983 /* We can simply free the wrapper structure */ 1984 hlist_del(&new->hlist); 1985 kfree(new); 1986 } 1987 } 1988 1989 /** 1990 * i40e_next_entry - Get the next non-broadcast filter from a list 1991 * @next: pointer to filter in list 1992 * 1993 * Returns the next non-broadcast filter in the list. Required so that we 1994 * ignore broadcast filters within the list, since these are not handled via 1995 * the normal firmware update path. 1996 */ 1997 static 1998 struct i40e_new_mac_filter *i40e_next_filter(struct i40e_new_mac_filter *next) 1999 { 2000 hlist_for_each_entry_continue(next, hlist) { 2001 if (!is_broadcast_ether_addr(next->f->macaddr)) 2002 return next; 2003 } 2004 2005 return NULL; 2006 } 2007 2008 /** 2009 * i40e_update_filter_state - Update filter state based on return data 2010 * from firmware 2011 * @count: Number of filters added 2012 * @add_list: return data from fw 2013 * @head: pointer to first filter in current batch 2014 * 2015 * MAC filter entries from list were slated to be added to device. Returns 2016 * number of successful filters. Note that 0 does NOT mean success! 2017 **/ 2018 static int 2019 i40e_update_filter_state(int count, 2020 struct i40e_aqc_add_macvlan_element_data *add_list, 2021 struct i40e_new_mac_filter *add_head) 2022 { 2023 int retval = 0; 2024 int i; 2025 2026 for (i = 0; i < count; i++) { 2027 /* Always check status of each filter. We don't need to check 2028 * the firmware return status because we pre-set the filter 2029 * status to I40E_AQC_MM_ERR_NO_RES when sending the filter 2030 * request to the adminq. Thus, if it no longer matches then 2031 * we know the filter is active. 2032 */ 2033 if (add_list[i].match_method == I40E_AQC_MM_ERR_NO_RES) { 2034 add_head->state = I40E_FILTER_FAILED; 2035 } else { 2036 add_head->state = I40E_FILTER_ACTIVE; 2037 retval++; 2038 } 2039 2040 add_head = i40e_next_filter(add_head); 2041 if (!add_head) 2042 break; 2043 } 2044 2045 return retval; 2046 } 2047 2048 /** 2049 * i40e_aqc_del_filters - Request firmware to delete a set of filters 2050 * @vsi: ptr to the VSI 2051 * @vsi_name: name to display in messages 2052 * @list: the list of filters to send to firmware 2053 * @num_del: the number of filters to delete 2054 * @retval: Set to -EIO on failure to delete 2055 * 2056 * Send a request to firmware via AdminQ to delete a set of filters. Uses 2057 * *retval instead of a return value so that success does not force ret_val to 2058 * be set to 0. This ensures that a sequence of calls to this function 2059 * preserve the previous value of *retval on successful delete. 2060 */ 2061 static 2062 void i40e_aqc_del_filters(struct i40e_vsi *vsi, const char *vsi_name, 2063 struct i40e_aqc_remove_macvlan_element_data *list, 2064 int num_del, int *retval) 2065 { 2066 struct i40e_hw *hw = &vsi->back->hw; 2067 i40e_status aq_ret; 2068 int aq_err; 2069 2070 aq_ret = i40e_aq_remove_macvlan(hw, vsi->seid, list, num_del, NULL); 2071 aq_err = hw->aq.asq_last_status; 2072 2073 /* Explicitly ignore and do not report when firmware returns ENOENT */ 2074 if (aq_ret && !(aq_err == I40E_AQ_RC_ENOENT)) { 2075 *retval = -EIO; 2076 dev_info(&vsi->back->pdev->dev, 2077 "ignoring delete macvlan error on %s, err %s, aq_err %s\n", 2078 vsi_name, i40e_stat_str(hw, aq_ret), 2079 i40e_aq_str(hw, aq_err)); 2080 } 2081 } 2082 2083 /** 2084 * i40e_aqc_add_filters - Request firmware to add a set of filters 2085 * @vsi: ptr to the VSI 2086 * @vsi_name: name to display in messages 2087 * @list: the list of filters to send to firmware 2088 * @add_head: Position in the add hlist 2089 * @num_add: the number of filters to add 2090 * @promisc_change: set to true on exit if promiscuous mode was forced on 2091 * 2092 * Send a request to firmware via AdminQ to add a chunk of filters. Will set 2093 * promisc_changed to true if the firmware has run out of space for more 2094 * filters. 2095 */ 2096 static 2097 void i40e_aqc_add_filters(struct i40e_vsi *vsi, const char *vsi_name, 2098 struct i40e_aqc_add_macvlan_element_data *list, 2099 struct i40e_new_mac_filter *add_head, 2100 int num_add, bool *promisc_changed) 2101 { 2102 struct i40e_hw *hw = &vsi->back->hw; 2103 int aq_err, fcnt; 2104 2105 i40e_aq_add_macvlan(hw, vsi->seid, list, num_add, NULL); 2106 aq_err = hw->aq.asq_last_status; 2107 fcnt = i40e_update_filter_state(num_add, list, add_head); 2108 2109 if (fcnt != num_add) { 2110 *promisc_changed = true; 2111 set_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state); 2112 dev_warn(&vsi->back->pdev->dev, 2113 "Error %s adding RX filters on %s, promiscuous mode forced on\n", 2114 i40e_aq_str(hw, aq_err), 2115 vsi_name); 2116 } 2117 } 2118 2119 /** 2120 * i40e_aqc_broadcast_filter - Set promiscuous broadcast flags 2121 * @vsi: pointer to the VSI 2122 * @f: filter data 2123 * 2124 * This function sets or clears the promiscuous broadcast flags for VLAN 2125 * filters in order to properly receive broadcast frames. Assumes that only 2126 * broadcast filters are passed. 2127 * 2128 * Returns status indicating success or failure; 2129 **/ 2130 static i40e_status 2131 i40e_aqc_broadcast_filter(struct i40e_vsi *vsi, const char *vsi_name, 2132 struct i40e_mac_filter *f) 2133 { 2134 bool enable = f->state == I40E_FILTER_NEW; 2135 struct i40e_hw *hw = &vsi->back->hw; 2136 i40e_status aq_ret; 2137 2138 if (f->vlan == I40E_VLAN_ANY) { 2139 aq_ret = i40e_aq_set_vsi_broadcast(hw, 2140 vsi->seid, 2141 enable, 2142 NULL); 2143 } else { 2144 aq_ret = i40e_aq_set_vsi_bc_promisc_on_vlan(hw, 2145 vsi->seid, 2146 enable, 2147 f->vlan, 2148 NULL); 2149 } 2150 2151 if (aq_ret) 2152 dev_warn(&vsi->back->pdev->dev, 2153 "Error %s setting broadcast promiscuous mode on %s\n", 2154 i40e_aq_str(hw, hw->aq.asq_last_status), 2155 vsi_name); 2156 2157 return aq_ret; 2158 } 2159 2160 /** 2161 * i40e_sync_vsi_filters - Update the VSI filter list to the HW 2162 * @vsi: ptr to the VSI 2163 * 2164 * Push any outstanding VSI filter changes through the AdminQ. 2165 * 2166 * Returns 0 or error value 2167 **/ 2168 int i40e_sync_vsi_filters(struct i40e_vsi *vsi) 2169 { 2170 struct hlist_head tmp_add_list, tmp_del_list; 2171 struct i40e_mac_filter *f; 2172 struct i40e_new_mac_filter *new, *add_head = NULL; 2173 struct i40e_hw *hw = &vsi->back->hw; 2174 unsigned int failed_filters = 0; 2175 unsigned int vlan_filters = 0; 2176 bool promisc_changed = false; 2177 char vsi_name[16] = "PF"; 2178 int filter_list_len = 0; 2179 i40e_status aq_ret = 0; 2180 u32 changed_flags = 0; 2181 struct hlist_node *h; 2182 struct i40e_pf *pf; 2183 int num_add = 0; 2184 int num_del = 0; 2185 int retval = 0; 2186 u16 cmd_flags; 2187 int list_size; 2188 int bkt; 2189 2190 /* empty array typed pointers, kcalloc later */ 2191 struct i40e_aqc_add_macvlan_element_data *add_list; 2192 struct i40e_aqc_remove_macvlan_element_data *del_list; 2193 2194 while (test_and_set_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state)) 2195 usleep_range(1000, 2000); 2196 pf = vsi->back; 2197 2198 if (vsi->netdev) { 2199 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags; 2200 vsi->current_netdev_flags = vsi->netdev->flags; 2201 } 2202 2203 INIT_HLIST_HEAD(&tmp_add_list); 2204 INIT_HLIST_HEAD(&tmp_del_list); 2205 2206 if (vsi->type == I40E_VSI_SRIOV) 2207 snprintf(vsi_name, sizeof(vsi_name) - 1, "VF %d", vsi->vf_id); 2208 else if (vsi->type != I40E_VSI_MAIN) 2209 snprintf(vsi_name, sizeof(vsi_name) - 1, "vsi %d", vsi->seid); 2210 2211 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) { 2212 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED; 2213 2214 spin_lock_bh(&vsi->mac_filter_hash_lock); 2215 /* Create a list of filters to delete. */ 2216 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) { 2217 if (f->state == I40E_FILTER_REMOVE) { 2218 /* Move the element into temporary del_list */ 2219 hash_del(&f->hlist); 2220 hlist_add_head(&f->hlist, &tmp_del_list); 2221 2222 /* Avoid counting removed filters */ 2223 continue; 2224 } 2225 if (f->state == I40E_FILTER_NEW) { 2226 /* Create a temporary i40e_new_mac_filter */ 2227 new = kzalloc(sizeof(*new), GFP_ATOMIC); 2228 if (!new) 2229 goto err_no_memory_locked; 2230 2231 /* Store pointer to the real filter */ 2232 new->f = f; 2233 new->state = f->state; 2234 2235 /* Add it to the hash list */ 2236 hlist_add_head(&new->hlist, &tmp_add_list); 2237 } 2238 2239 /* Count the number of active (current and new) VLAN 2240 * filters we have now. Does not count filters which 2241 * are marked for deletion. 2242 */ 2243 if (f->vlan > 0) 2244 vlan_filters++; 2245 } 2246 2247 retval = i40e_correct_mac_vlan_filters(vsi, 2248 &tmp_add_list, 2249 &tmp_del_list, 2250 vlan_filters); 2251 if (retval) 2252 goto err_no_memory_locked; 2253 2254 spin_unlock_bh(&vsi->mac_filter_hash_lock); 2255 } 2256 2257 /* Now process 'del_list' outside the lock */ 2258 if (!hlist_empty(&tmp_del_list)) { 2259 filter_list_len = hw->aq.asq_buf_size / 2260 sizeof(struct i40e_aqc_remove_macvlan_element_data); 2261 list_size = filter_list_len * 2262 sizeof(struct i40e_aqc_remove_macvlan_element_data); 2263 del_list = kzalloc(list_size, GFP_ATOMIC); 2264 if (!del_list) 2265 goto err_no_memory; 2266 2267 hlist_for_each_entry_safe(f, h, &tmp_del_list, hlist) { 2268 cmd_flags = 0; 2269 2270 /* handle broadcast filters by updating the broadcast 2271 * promiscuous flag and release filter list. 2272 */ 2273 if (is_broadcast_ether_addr(f->macaddr)) { 2274 i40e_aqc_broadcast_filter(vsi, vsi_name, f); 2275 2276 hlist_del(&f->hlist); 2277 kfree(f); 2278 continue; 2279 } 2280 2281 /* add to delete list */ 2282 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr); 2283 if (f->vlan == I40E_VLAN_ANY) { 2284 del_list[num_del].vlan_tag = 0; 2285 cmd_flags |= I40E_AQC_MACVLAN_DEL_IGNORE_VLAN; 2286 } else { 2287 del_list[num_del].vlan_tag = 2288 cpu_to_le16((u16)(f->vlan)); 2289 } 2290 2291 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH; 2292 del_list[num_del].flags = cmd_flags; 2293 num_del++; 2294 2295 /* flush a full buffer */ 2296 if (num_del == filter_list_len) { 2297 i40e_aqc_del_filters(vsi, vsi_name, del_list, 2298 num_del, &retval); 2299 memset(del_list, 0, list_size); 2300 num_del = 0; 2301 } 2302 /* Release memory for MAC filter entries which were 2303 * synced up with HW. 2304 */ 2305 hlist_del(&f->hlist); 2306 kfree(f); 2307 } 2308 2309 if (num_del) { 2310 i40e_aqc_del_filters(vsi, vsi_name, del_list, 2311 num_del, &retval); 2312 } 2313 2314 kfree(del_list); 2315 del_list = NULL; 2316 } 2317 2318 if (!hlist_empty(&tmp_add_list)) { 2319 /* Do all the adds now. */ 2320 filter_list_len = hw->aq.asq_buf_size / 2321 sizeof(struct i40e_aqc_add_macvlan_element_data); 2322 list_size = filter_list_len * 2323 sizeof(struct i40e_aqc_add_macvlan_element_data); 2324 add_list = kzalloc(list_size, GFP_ATOMIC); 2325 if (!add_list) 2326 goto err_no_memory; 2327 2328 num_add = 0; 2329 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) { 2330 if (test_bit(__I40E_VSI_OVERFLOW_PROMISC, 2331 vsi->state)) { 2332 new->state = I40E_FILTER_FAILED; 2333 continue; 2334 } 2335 2336 /* handle broadcast filters by updating the broadcast 2337 * promiscuous flag instead of adding a MAC filter. 2338 */ 2339 if (is_broadcast_ether_addr(new->f->macaddr)) { 2340 if (i40e_aqc_broadcast_filter(vsi, vsi_name, 2341 new->f)) 2342 new->state = I40E_FILTER_FAILED; 2343 else 2344 new->state = I40E_FILTER_ACTIVE; 2345 continue; 2346 } 2347 2348 /* add to add array */ 2349 if (num_add == 0) 2350 add_head = new; 2351 cmd_flags = 0; 2352 ether_addr_copy(add_list[num_add].mac_addr, 2353 new->f->macaddr); 2354 if (new->f->vlan == I40E_VLAN_ANY) { 2355 add_list[num_add].vlan_tag = 0; 2356 cmd_flags |= I40E_AQC_MACVLAN_ADD_IGNORE_VLAN; 2357 } else { 2358 add_list[num_add].vlan_tag = 2359 cpu_to_le16((u16)(new->f->vlan)); 2360 } 2361 add_list[num_add].queue_number = 0; 2362 /* set invalid match method for later detection */ 2363 add_list[num_add].match_method = I40E_AQC_MM_ERR_NO_RES; 2364 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH; 2365 add_list[num_add].flags = cpu_to_le16(cmd_flags); 2366 num_add++; 2367 2368 /* flush a full buffer */ 2369 if (num_add == filter_list_len) { 2370 i40e_aqc_add_filters(vsi, vsi_name, add_list, 2371 add_head, num_add, 2372 &promisc_changed); 2373 memset(add_list, 0, list_size); 2374 num_add = 0; 2375 } 2376 } 2377 if (num_add) { 2378 i40e_aqc_add_filters(vsi, vsi_name, add_list, add_head, 2379 num_add, &promisc_changed); 2380 } 2381 /* Now move all of the filters from the temp add list back to 2382 * the VSI's list. 2383 */ 2384 spin_lock_bh(&vsi->mac_filter_hash_lock); 2385 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) { 2386 /* Only update the state if we're still NEW */ 2387 if (new->f->state == I40E_FILTER_NEW) 2388 new->f->state = new->state; 2389 hlist_del(&new->hlist); 2390 kfree(new); 2391 } 2392 spin_unlock_bh(&vsi->mac_filter_hash_lock); 2393 kfree(add_list); 2394 add_list = NULL; 2395 } 2396 2397 /* Determine the number of active and failed filters. */ 2398 spin_lock_bh(&vsi->mac_filter_hash_lock); 2399 vsi->active_filters = 0; 2400 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) { 2401 if (f->state == I40E_FILTER_ACTIVE) 2402 vsi->active_filters++; 2403 else if (f->state == I40E_FILTER_FAILED) 2404 failed_filters++; 2405 } 2406 spin_unlock_bh(&vsi->mac_filter_hash_lock); 2407 2408 /* If promiscuous mode has changed, we need to calculate a new 2409 * threshold for when we are safe to exit 2410 */ 2411 if (promisc_changed) 2412 vsi->promisc_threshold = (vsi->active_filters * 3) / 4; 2413 2414 /* Check if we are able to exit overflow promiscuous mode. We can 2415 * safely exit if we didn't just enter, we no longer have any failed 2416 * filters, and we have reduced filters below the threshold value. 2417 */ 2418 if (test_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state) && 2419 !promisc_changed && !failed_filters && 2420 (vsi->active_filters < vsi->promisc_threshold)) { 2421 dev_info(&pf->pdev->dev, 2422 "filter logjam cleared on %s, leaving overflow promiscuous mode\n", 2423 vsi_name); 2424 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state); 2425 promisc_changed = true; 2426 vsi->promisc_threshold = 0; 2427 } 2428 2429 /* if the VF is not trusted do not do promisc */ 2430 if ((vsi->type == I40E_VSI_SRIOV) && !pf->vf[vsi->vf_id].trusted) { 2431 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state); 2432 goto out; 2433 } 2434 2435 /* check for changes in promiscuous modes */ 2436 if (changed_flags & IFF_ALLMULTI) { 2437 bool cur_multipromisc; 2438 2439 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI); 2440 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw, 2441 vsi->seid, 2442 cur_multipromisc, 2443 NULL); 2444 if (aq_ret) { 2445 retval = i40e_aq_rc_to_posix(aq_ret, 2446 hw->aq.asq_last_status); 2447 dev_info(&pf->pdev->dev, 2448 "set multi promisc failed on %s, err %s aq_err %s\n", 2449 vsi_name, 2450 i40e_stat_str(hw, aq_ret), 2451 i40e_aq_str(hw, hw->aq.asq_last_status)); 2452 } 2453 } 2454 2455 if ((changed_flags & IFF_PROMISC) || promisc_changed) { 2456 bool cur_promisc; 2457 2458 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) || 2459 test_bit(__I40E_VSI_OVERFLOW_PROMISC, 2460 vsi->state)); 2461 if ((vsi->type == I40E_VSI_MAIN) && 2462 (pf->lan_veb != I40E_NO_VEB) && 2463 !(pf->flags & I40E_FLAG_MFP_ENABLED)) { 2464 /* set defport ON for Main VSI instead of true promisc 2465 * this way we will get all unicast/multicast and VLAN 2466 * promisc behavior but will not get VF or VMDq traffic 2467 * replicated on the Main VSI. 2468 */ 2469 if (pf->cur_promisc != cur_promisc) { 2470 pf->cur_promisc = cur_promisc; 2471 if (cur_promisc) 2472 aq_ret = 2473 i40e_aq_set_default_vsi(hw, 2474 vsi->seid, 2475 NULL); 2476 else 2477 aq_ret = 2478 i40e_aq_clear_default_vsi(hw, 2479 vsi->seid, 2480 NULL); 2481 if (aq_ret) { 2482 retval = i40e_aq_rc_to_posix(aq_ret, 2483 hw->aq.asq_last_status); 2484 dev_info(&pf->pdev->dev, 2485 "Set default VSI failed on %s, err %s, aq_err %s\n", 2486 vsi_name, 2487 i40e_stat_str(hw, aq_ret), 2488 i40e_aq_str(hw, 2489 hw->aq.asq_last_status)); 2490 } 2491 } 2492 } else { 2493 aq_ret = i40e_aq_set_vsi_unicast_promiscuous( 2494 hw, 2495 vsi->seid, 2496 cur_promisc, NULL, 2497 true); 2498 if (aq_ret) { 2499 retval = 2500 i40e_aq_rc_to_posix(aq_ret, 2501 hw->aq.asq_last_status); 2502 dev_info(&pf->pdev->dev, 2503 "set unicast promisc failed on %s, err %s, aq_err %s\n", 2504 vsi_name, 2505 i40e_stat_str(hw, aq_ret), 2506 i40e_aq_str(hw, 2507 hw->aq.asq_last_status)); 2508 } 2509 aq_ret = i40e_aq_set_vsi_multicast_promiscuous( 2510 hw, 2511 vsi->seid, 2512 cur_promisc, NULL); 2513 if (aq_ret) { 2514 retval = 2515 i40e_aq_rc_to_posix(aq_ret, 2516 hw->aq.asq_last_status); 2517 dev_info(&pf->pdev->dev, 2518 "set multicast promisc failed on %s, err %s, aq_err %s\n", 2519 vsi_name, 2520 i40e_stat_str(hw, aq_ret), 2521 i40e_aq_str(hw, 2522 hw->aq.asq_last_status)); 2523 } 2524 } 2525 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw, 2526 vsi->seid, 2527 cur_promisc, NULL); 2528 if (aq_ret) { 2529 retval = i40e_aq_rc_to_posix(aq_ret, 2530 pf->hw.aq.asq_last_status); 2531 dev_info(&pf->pdev->dev, 2532 "set brdcast promisc failed, err %s, aq_err %s\n", 2533 i40e_stat_str(hw, aq_ret), 2534 i40e_aq_str(hw, 2535 hw->aq.asq_last_status)); 2536 } 2537 } 2538 out: 2539 /* if something went wrong then set the changed flag so we try again */ 2540 if (retval) 2541 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 2542 2543 clear_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state); 2544 return retval; 2545 2546 err_no_memory: 2547 /* Restore elements on the temporary add and delete lists */ 2548 spin_lock_bh(&vsi->mac_filter_hash_lock); 2549 err_no_memory_locked: 2550 i40e_undo_del_filter_entries(vsi, &tmp_del_list); 2551 i40e_undo_add_filter_entries(vsi, &tmp_add_list); 2552 spin_unlock_bh(&vsi->mac_filter_hash_lock); 2553 2554 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 2555 clear_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state); 2556 return -ENOMEM; 2557 } 2558 2559 /** 2560 * i40e_sync_filters_subtask - Sync the VSI filter list with HW 2561 * @pf: board private structure 2562 **/ 2563 static void i40e_sync_filters_subtask(struct i40e_pf *pf) 2564 { 2565 int v; 2566 2567 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC)) 2568 return; 2569 pf->flags &= ~I40E_FLAG_FILTER_SYNC; 2570 2571 for (v = 0; v < pf->num_alloc_vsi; v++) { 2572 if (pf->vsi[v] && 2573 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) { 2574 int ret = i40e_sync_vsi_filters(pf->vsi[v]); 2575 2576 if (ret) { 2577 /* come back and try again later */ 2578 pf->flags |= I40E_FLAG_FILTER_SYNC; 2579 break; 2580 } 2581 } 2582 } 2583 } 2584 2585 /** 2586 * i40e_max_xdp_frame_size - returns the maximum allowed frame size for XDP 2587 * @vsi: the vsi 2588 **/ 2589 static int i40e_max_xdp_frame_size(struct i40e_vsi *vsi) 2590 { 2591 if (PAGE_SIZE >= 8192 || (vsi->back->flags & I40E_FLAG_LEGACY_RX)) 2592 return I40E_RXBUFFER_2048; 2593 else 2594 return I40E_RXBUFFER_3072; 2595 } 2596 2597 /** 2598 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit 2599 * @netdev: network interface device structure 2600 * @new_mtu: new value for maximum frame size 2601 * 2602 * Returns 0 on success, negative on failure 2603 **/ 2604 static int i40e_change_mtu(struct net_device *netdev, int new_mtu) 2605 { 2606 struct i40e_netdev_priv *np = netdev_priv(netdev); 2607 struct i40e_vsi *vsi = np->vsi; 2608 struct i40e_pf *pf = vsi->back; 2609 2610 if (i40e_enabled_xdp_vsi(vsi)) { 2611 int frame_size = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; 2612 2613 if (frame_size > i40e_max_xdp_frame_size(vsi)) 2614 return -EINVAL; 2615 } 2616 2617 netdev_info(netdev, "changing MTU from %d to %d\n", 2618 netdev->mtu, new_mtu); 2619 netdev->mtu = new_mtu; 2620 if (netif_running(netdev)) 2621 i40e_vsi_reinit_locked(vsi); 2622 pf->flags |= (I40E_FLAG_SERVICE_CLIENT_REQUESTED | 2623 I40E_FLAG_CLIENT_L2_CHANGE); 2624 return 0; 2625 } 2626 2627 /** 2628 * i40e_ioctl - Access the hwtstamp interface 2629 * @netdev: network interface device structure 2630 * @ifr: interface request data 2631 * @cmd: ioctl command 2632 **/ 2633 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 2634 { 2635 struct i40e_netdev_priv *np = netdev_priv(netdev); 2636 struct i40e_pf *pf = np->vsi->back; 2637 2638 switch (cmd) { 2639 case SIOCGHWTSTAMP: 2640 return i40e_ptp_get_ts_config(pf, ifr); 2641 case SIOCSHWTSTAMP: 2642 return i40e_ptp_set_ts_config(pf, ifr); 2643 default: 2644 return -EOPNOTSUPP; 2645 } 2646 } 2647 2648 /** 2649 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI 2650 * @vsi: the vsi being adjusted 2651 **/ 2652 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi) 2653 { 2654 struct i40e_vsi_context ctxt; 2655 i40e_status ret; 2656 2657 if ((vsi->info.valid_sections & 2658 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) && 2659 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0)) 2660 return; /* already enabled */ 2661 2662 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); 2663 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL | 2664 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH; 2665 2666 ctxt.seid = vsi->seid; 2667 ctxt.info = vsi->info; 2668 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 2669 if (ret) { 2670 dev_info(&vsi->back->pdev->dev, 2671 "update vlan stripping failed, err %s aq_err %s\n", 2672 i40e_stat_str(&vsi->back->hw, ret), 2673 i40e_aq_str(&vsi->back->hw, 2674 vsi->back->hw.aq.asq_last_status)); 2675 } 2676 } 2677 2678 /** 2679 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI 2680 * @vsi: the vsi being adjusted 2681 **/ 2682 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi) 2683 { 2684 struct i40e_vsi_context ctxt; 2685 i40e_status ret; 2686 2687 if ((vsi->info.valid_sections & 2688 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) && 2689 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) == 2690 I40E_AQ_VSI_PVLAN_EMOD_MASK)) 2691 return; /* already disabled */ 2692 2693 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); 2694 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL | 2695 I40E_AQ_VSI_PVLAN_EMOD_NOTHING; 2696 2697 ctxt.seid = vsi->seid; 2698 ctxt.info = vsi->info; 2699 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 2700 if (ret) { 2701 dev_info(&vsi->back->pdev->dev, 2702 "update vlan stripping failed, err %s aq_err %s\n", 2703 i40e_stat_str(&vsi->back->hw, ret), 2704 i40e_aq_str(&vsi->back->hw, 2705 vsi->back->hw.aq.asq_last_status)); 2706 } 2707 } 2708 2709 /** 2710 * i40e_vlan_rx_register - Setup or shutdown vlan offload 2711 * @netdev: network interface to be adjusted 2712 * @features: netdev features to test if VLAN offload is enabled or not 2713 **/ 2714 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features) 2715 { 2716 struct i40e_netdev_priv *np = netdev_priv(netdev); 2717 struct i40e_vsi *vsi = np->vsi; 2718 2719 if (features & NETIF_F_HW_VLAN_CTAG_RX) 2720 i40e_vlan_stripping_enable(vsi); 2721 else 2722 i40e_vlan_stripping_disable(vsi); 2723 } 2724 2725 /** 2726 * i40e_add_vlan_all_mac - Add a MAC/VLAN filter for each existing MAC address 2727 * @vsi: the vsi being configured 2728 * @vid: vlan id to be added (0 = untagged only , -1 = any) 2729 * 2730 * This is a helper function for adding a new MAC/VLAN filter with the 2731 * specified VLAN for each existing MAC address already in the hash table. 2732 * This function does *not* perform any accounting to update filters based on 2733 * VLAN mode. 2734 * 2735 * NOTE: this function expects to be called while under the 2736 * mac_filter_hash_lock 2737 **/ 2738 int i40e_add_vlan_all_mac(struct i40e_vsi *vsi, s16 vid) 2739 { 2740 struct i40e_mac_filter *f, *add_f; 2741 struct hlist_node *h; 2742 int bkt; 2743 2744 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) { 2745 if (f->state == I40E_FILTER_REMOVE) 2746 continue; 2747 add_f = i40e_add_filter(vsi, f->macaddr, vid); 2748 if (!add_f) { 2749 dev_info(&vsi->back->pdev->dev, 2750 "Could not add vlan filter %d for %pM\n", 2751 vid, f->macaddr); 2752 return -ENOMEM; 2753 } 2754 } 2755 2756 return 0; 2757 } 2758 2759 /** 2760 * i40e_vsi_add_vlan - Add VSI membership for given VLAN 2761 * @vsi: the VSI being configured 2762 * @vid: VLAN id to be added 2763 **/ 2764 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, u16 vid) 2765 { 2766 int err; 2767 2768 if (vsi->info.pvid) 2769 return -EINVAL; 2770 2771 /* The network stack will attempt to add VID=0, with the intention to 2772 * receive priority tagged packets with a VLAN of 0. Our HW receives 2773 * these packets by default when configured to receive untagged 2774 * packets, so we don't need to add a filter for this case. 2775 * Additionally, HW interprets adding a VID=0 filter as meaning to 2776 * receive *only* tagged traffic and stops receiving untagged traffic. 2777 * Thus, we do not want to actually add a filter for VID=0 2778 */ 2779 if (!vid) 2780 return 0; 2781 2782 /* Locked once because all functions invoked below iterates list*/ 2783 spin_lock_bh(&vsi->mac_filter_hash_lock); 2784 err = i40e_add_vlan_all_mac(vsi, vid); 2785 spin_unlock_bh(&vsi->mac_filter_hash_lock); 2786 if (err) 2787 return err; 2788 2789 /* schedule our worker thread which will take care of 2790 * applying the new filter changes 2791 */ 2792 i40e_service_event_schedule(vsi->back); 2793 return 0; 2794 } 2795 2796 /** 2797 * i40e_rm_vlan_all_mac - Remove MAC/VLAN pair for all MAC with the given VLAN 2798 * @vsi: the vsi being configured 2799 * @vid: vlan id to be removed (0 = untagged only , -1 = any) 2800 * 2801 * This function should be used to remove all VLAN filters which match the 2802 * given VID. It does not schedule the service event and does not take the 2803 * mac_filter_hash_lock so it may be combined with other operations under 2804 * a single invocation of the mac_filter_hash_lock. 2805 * 2806 * NOTE: this function expects to be called while under the 2807 * mac_filter_hash_lock 2808 */ 2809 void i40e_rm_vlan_all_mac(struct i40e_vsi *vsi, s16 vid) 2810 { 2811 struct i40e_mac_filter *f; 2812 struct hlist_node *h; 2813 int bkt; 2814 2815 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) { 2816 if (f->vlan == vid) 2817 __i40e_del_filter(vsi, f); 2818 } 2819 } 2820 2821 /** 2822 * i40e_vsi_kill_vlan - Remove VSI membership for given VLAN 2823 * @vsi: the VSI being configured 2824 * @vid: VLAN id to be removed 2825 **/ 2826 void i40e_vsi_kill_vlan(struct i40e_vsi *vsi, u16 vid) 2827 { 2828 if (!vid || vsi->info.pvid) 2829 return; 2830 2831 spin_lock_bh(&vsi->mac_filter_hash_lock); 2832 i40e_rm_vlan_all_mac(vsi, vid); 2833 spin_unlock_bh(&vsi->mac_filter_hash_lock); 2834 2835 /* schedule our worker thread which will take care of 2836 * applying the new filter changes 2837 */ 2838 i40e_service_event_schedule(vsi->back); 2839 } 2840 2841 /** 2842 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload 2843 * @netdev: network interface to be adjusted 2844 * @vid: vlan id to be added 2845 * 2846 * net_device_ops implementation for adding vlan ids 2847 **/ 2848 static int i40e_vlan_rx_add_vid(struct net_device *netdev, 2849 __always_unused __be16 proto, u16 vid) 2850 { 2851 struct i40e_netdev_priv *np = netdev_priv(netdev); 2852 struct i40e_vsi *vsi = np->vsi; 2853 int ret = 0; 2854 2855 if (vid >= VLAN_N_VID) 2856 return -EINVAL; 2857 2858 ret = i40e_vsi_add_vlan(vsi, vid); 2859 if (!ret) 2860 set_bit(vid, vsi->active_vlans); 2861 2862 return ret; 2863 } 2864 2865 /** 2866 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload 2867 * @netdev: network interface to be adjusted 2868 * @vid: vlan id to be removed 2869 * 2870 * net_device_ops implementation for removing vlan ids 2871 **/ 2872 static int i40e_vlan_rx_kill_vid(struct net_device *netdev, 2873 __always_unused __be16 proto, u16 vid) 2874 { 2875 struct i40e_netdev_priv *np = netdev_priv(netdev); 2876 struct i40e_vsi *vsi = np->vsi; 2877 2878 /* return code is ignored as there is nothing a user 2879 * can do about failure to remove and a log message was 2880 * already printed from the other function 2881 */ 2882 i40e_vsi_kill_vlan(vsi, vid); 2883 2884 clear_bit(vid, vsi->active_vlans); 2885 2886 return 0; 2887 } 2888 2889 /** 2890 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up 2891 * @vsi: the vsi being brought back up 2892 **/ 2893 static void i40e_restore_vlan(struct i40e_vsi *vsi) 2894 { 2895 u16 vid; 2896 2897 if (!vsi->netdev) 2898 return; 2899 2900 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features); 2901 2902 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID) 2903 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q), 2904 vid); 2905 } 2906 2907 /** 2908 * i40e_vsi_add_pvid - Add pvid for the VSI 2909 * @vsi: the vsi being adjusted 2910 * @vid: the vlan id to set as a PVID 2911 **/ 2912 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid) 2913 { 2914 struct i40e_vsi_context ctxt; 2915 i40e_status ret; 2916 2917 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); 2918 vsi->info.pvid = cpu_to_le16(vid); 2919 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED | 2920 I40E_AQ_VSI_PVLAN_INSERT_PVID | 2921 I40E_AQ_VSI_PVLAN_EMOD_STR; 2922 2923 ctxt.seid = vsi->seid; 2924 ctxt.info = vsi->info; 2925 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 2926 if (ret) { 2927 dev_info(&vsi->back->pdev->dev, 2928 "add pvid failed, err %s aq_err %s\n", 2929 i40e_stat_str(&vsi->back->hw, ret), 2930 i40e_aq_str(&vsi->back->hw, 2931 vsi->back->hw.aq.asq_last_status)); 2932 return -ENOENT; 2933 } 2934 2935 return 0; 2936 } 2937 2938 /** 2939 * i40e_vsi_remove_pvid - Remove the pvid from the VSI 2940 * @vsi: the vsi being adjusted 2941 * 2942 * Just use the vlan_rx_register() service to put it back to normal 2943 **/ 2944 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi) 2945 { 2946 i40e_vlan_stripping_disable(vsi); 2947 2948 vsi->info.pvid = 0; 2949 } 2950 2951 /** 2952 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources 2953 * @vsi: ptr to the VSI 2954 * 2955 * If this function returns with an error, then it's possible one or 2956 * more of the rings is populated (while the rest are not). It is the 2957 * callers duty to clean those orphaned rings. 2958 * 2959 * Return 0 on success, negative on failure 2960 **/ 2961 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi) 2962 { 2963 int i, err = 0; 2964 2965 for (i = 0; i < vsi->num_queue_pairs && !err; i++) 2966 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]); 2967 2968 if (!i40e_enabled_xdp_vsi(vsi)) 2969 return err; 2970 2971 for (i = 0; i < vsi->num_queue_pairs && !err; i++) 2972 err = i40e_setup_tx_descriptors(vsi->xdp_rings[i]); 2973 2974 return err; 2975 } 2976 2977 /** 2978 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues 2979 * @vsi: ptr to the VSI 2980 * 2981 * Free VSI's transmit software resources 2982 **/ 2983 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi) 2984 { 2985 int i; 2986 2987 if (vsi->tx_rings) { 2988 for (i = 0; i < vsi->num_queue_pairs; i++) 2989 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) 2990 i40e_free_tx_resources(vsi->tx_rings[i]); 2991 } 2992 2993 if (vsi->xdp_rings) { 2994 for (i = 0; i < vsi->num_queue_pairs; i++) 2995 if (vsi->xdp_rings[i] && vsi->xdp_rings[i]->desc) 2996 i40e_free_tx_resources(vsi->xdp_rings[i]); 2997 } 2998 } 2999 3000 /** 3001 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources 3002 * @vsi: ptr to the VSI 3003 * 3004 * If this function returns with an error, then it's possible one or 3005 * more of the rings is populated (while the rest are not). It is the 3006 * callers duty to clean those orphaned rings. 3007 * 3008 * Return 0 on success, negative on failure 3009 **/ 3010 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi) 3011 { 3012 int i, err = 0; 3013 3014 for (i = 0; i < vsi->num_queue_pairs && !err; i++) 3015 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]); 3016 return err; 3017 } 3018 3019 /** 3020 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues 3021 * @vsi: ptr to the VSI 3022 * 3023 * Free all receive software resources 3024 **/ 3025 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi) 3026 { 3027 int i; 3028 3029 if (!vsi->rx_rings) 3030 return; 3031 3032 for (i = 0; i < vsi->num_queue_pairs; i++) 3033 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc) 3034 i40e_free_rx_resources(vsi->rx_rings[i]); 3035 } 3036 3037 /** 3038 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring 3039 * @ring: The Tx ring to configure 3040 * 3041 * This enables/disables XPS for a given Tx descriptor ring 3042 * based on the TCs enabled for the VSI that ring belongs to. 3043 **/ 3044 static void i40e_config_xps_tx_ring(struct i40e_ring *ring) 3045 { 3046 int cpu; 3047 3048 if (!ring->q_vector || !ring->netdev || ring->ch) 3049 return; 3050 3051 /* We only initialize XPS once, so as not to overwrite user settings */ 3052 if (test_and_set_bit(__I40E_TX_XPS_INIT_DONE, ring->state)) 3053 return; 3054 3055 cpu = cpumask_local_spread(ring->q_vector->v_idx, -1); 3056 netif_set_xps_queue(ring->netdev, get_cpu_mask(cpu), 3057 ring->queue_index); 3058 } 3059 3060 /** 3061 * i40e_configure_tx_ring - Configure a transmit ring context and rest 3062 * @ring: The Tx ring to configure 3063 * 3064 * Configure the Tx descriptor ring in the HMC context. 3065 **/ 3066 static int i40e_configure_tx_ring(struct i40e_ring *ring) 3067 { 3068 struct i40e_vsi *vsi = ring->vsi; 3069 u16 pf_q = vsi->base_queue + ring->queue_index; 3070 struct i40e_hw *hw = &vsi->back->hw; 3071 struct i40e_hmc_obj_txq tx_ctx; 3072 i40e_status err = 0; 3073 u32 qtx_ctl = 0; 3074 3075 /* some ATR related tx ring init */ 3076 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) { 3077 ring->atr_sample_rate = vsi->back->atr_sample_rate; 3078 ring->atr_count = 0; 3079 } else { 3080 ring->atr_sample_rate = 0; 3081 } 3082 3083 /* configure XPS */ 3084 i40e_config_xps_tx_ring(ring); 3085 3086 /* clear the context structure first */ 3087 memset(&tx_ctx, 0, sizeof(tx_ctx)); 3088 3089 tx_ctx.new_context = 1; 3090 tx_ctx.base = (ring->dma / 128); 3091 tx_ctx.qlen = ring->count; 3092 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED | 3093 I40E_FLAG_FD_ATR_ENABLED)); 3094 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP); 3095 /* FDIR VSI tx ring can still use RS bit and writebacks */ 3096 if (vsi->type != I40E_VSI_FDIR) 3097 tx_ctx.head_wb_ena = 1; 3098 tx_ctx.head_wb_addr = ring->dma + 3099 (ring->count * sizeof(struct i40e_tx_desc)); 3100 3101 /* As part of VSI creation/update, FW allocates certain 3102 * Tx arbitration queue sets for each TC enabled for 3103 * the VSI. The FW returns the handles to these queue 3104 * sets as part of the response buffer to Add VSI, 3105 * Update VSI, etc. AQ commands. It is expected that 3106 * these queue set handles be associated with the Tx 3107 * queues by the driver as part of the TX queue context 3108 * initialization. This has to be done regardless of 3109 * DCB as by default everything is mapped to TC0. 3110 */ 3111 3112 if (ring->ch) 3113 tx_ctx.rdylist = 3114 le16_to_cpu(ring->ch->info.qs_handle[ring->dcb_tc]); 3115 3116 else 3117 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]); 3118 3119 tx_ctx.rdylist_act = 0; 3120 3121 /* clear the context in the HMC */ 3122 err = i40e_clear_lan_tx_queue_context(hw, pf_q); 3123 if (err) { 3124 dev_info(&vsi->back->pdev->dev, 3125 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n", 3126 ring->queue_index, pf_q, err); 3127 return -ENOMEM; 3128 } 3129 3130 /* set the context in the HMC */ 3131 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx); 3132 if (err) { 3133 dev_info(&vsi->back->pdev->dev, 3134 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n", 3135 ring->queue_index, pf_q, err); 3136 return -ENOMEM; 3137 } 3138 3139 /* Now associate this queue with this PCI function */ 3140 if (ring->ch) { 3141 if (ring->ch->type == I40E_VSI_VMDQ2) 3142 qtx_ctl = I40E_QTX_CTL_VM_QUEUE; 3143 else 3144 return -EINVAL; 3145 3146 qtx_ctl |= (ring->ch->vsi_number << 3147 I40E_QTX_CTL_VFVM_INDX_SHIFT) & 3148 I40E_QTX_CTL_VFVM_INDX_MASK; 3149 } else { 3150 if (vsi->type == I40E_VSI_VMDQ2) { 3151 qtx_ctl = I40E_QTX_CTL_VM_QUEUE; 3152 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) & 3153 I40E_QTX_CTL_VFVM_INDX_MASK; 3154 } else { 3155 qtx_ctl = I40E_QTX_CTL_PF_QUEUE; 3156 } 3157 } 3158 3159 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) & 3160 I40E_QTX_CTL_PF_INDX_MASK); 3161 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl); 3162 i40e_flush(hw); 3163 3164 /* cache tail off for easier writes later */ 3165 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q); 3166 3167 return 0; 3168 } 3169 3170 /** 3171 * i40e_configure_rx_ring - Configure a receive ring context 3172 * @ring: The Rx ring to configure 3173 * 3174 * Configure the Rx descriptor ring in the HMC context. 3175 **/ 3176 static int i40e_configure_rx_ring(struct i40e_ring *ring) 3177 { 3178 struct i40e_vsi *vsi = ring->vsi; 3179 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len; 3180 u16 pf_q = vsi->base_queue + ring->queue_index; 3181 struct i40e_hw *hw = &vsi->back->hw; 3182 struct i40e_hmc_obj_rxq rx_ctx; 3183 i40e_status err = 0; 3184 3185 bitmap_zero(ring->state, __I40E_RING_STATE_NBITS); 3186 3187 /* clear the context structure first */ 3188 memset(&rx_ctx, 0, sizeof(rx_ctx)); 3189 3190 ring->rx_buf_len = vsi->rx_buf_len; 3191 3192 rx_ctx.dbuff = DIV_ROUND_UP(ring->rx_buf_len, 3193 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT)); 3194 3195 rx_ctx.base = (ring->dma / 128); 3196 rx_ctx.qlen = ring->count; 3197 3198 /* use 32 byte descriptors */ 3199 rx_ctx.dsize = 1; 3200 3201 /* descriptor type is always zero 3202 * rx_ctx.dtype = 0; 3203 */ 3204 rx_ctx.hsplit_0 = 0; 3205 3206 rx_ctx.rxmax = min_t(u16, vsi->max_frame, chain_len * ring->rx_buf_len); 3207 if (hw->revision_id == 0) 3208 rx_ctx.lrxqthresh = 0; 3209 else 3210 rx_ctx.lrxqthresh = 1; 3211 rx_ctx.crcstrip = 1; 3212 rx_ctx.l2tsel = 1; 3213 /* this controls whether VLAN is stripped from inner headers */ 3214 rx_ctx.showiv = 0; 3215 /* set the prefena field to 1 because the manual says to */ 3216 rx_ctx.prefena = 1; 3217 3218 /* clear the context in the HMC */ 3219 err = i40e_clear_lan_rx_queue_context(hw, pf_q); 3220 if (err) { 3221 dev_info(&vsi->back->pdev->dev, 3222 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n", 3223 ring->queue_index, pf_q, err); 3224 return -ENOMEM; 3225 } 3226 3227 /* set the context in the HMC */ 3228 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx); 3229 if (err) { 3230 dev_info(&vsi->back->pdev->dev, 3231 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n", 3232 ring->queue_index, pf_q, err); 3233 return -ENOMEM; 3234 } 3235 3236 /* configure Rx buffer alignment */ 3237 if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX)) 3238 clear_ring_build_skb_enabled(ring); 3239 else 3240 set_ring_build_skb_enabled(ring); 3241 3242 /* cache tail for quicker writes, and clear the reg before use */ 3243 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q); 3244 writel(0, ring->tail); 3245 3246 i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring)); 3247 3248 return 0; 3249 } 3250 3251 /** 3252 * i40e_vsi_configure_tx - Configure the VSI for Tx 3253 * @vsi: VSI structure describing this set of rings and resources 3254 * 3255 * Configure the Tx VSI for operation. 3256 **/ 3257 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi) 3258 { 3259 int err = 0; 3260 u16 i; 3261 3262 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++) 3263 err = i40e_configure_tx_ring(vsi->tx_rings[i]); 3264 3265 if (!i40e_enabled_xdp_vsi(vsi)) 3266 return err; 3267 3268 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++) 3269 err = i40e_configure_tx_ring(vsi->xdp_rings[i]); 3270 3271 return err; 3272 } 3273 3274 /** 3275 * i40e_vsi_configure_rx - Configure the VSI for Rx 3276 * @vsi: the VSI being configured 3277 * 3278 * Configure the Rx VSI for operation. 3279 **/ 3280 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi) 3281 { 3282 int err = 0; 3283 u16 i; 3284 3285 if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX)) { 3286 vsi->max_frame = I40E_MAX_RXBUFFER; 3287 vsi->rx_buf_len = I40E_RXBUFFER_2048; 3288 #if (PAGE_SIZE < 8192) 3289 } else if (!I40E_2K_TOO_SMALL_WITH_PADDING && 3290 (vsi->netdev->mtu <= ETH_DATA_LEN)) { 3291 vsi->max_frame = I40E_RXBUFFER_1536 - NET_IP_ALIGN; 3292 vsi->rx_buf_len = I40E_RXBUFFER_1536 - NET_IP_ALIGN; 3293 #endif 3294 } else { 3295 vsi->max_frame = I40E_MAX_RXBUFFER; 3296 vsi->rx_buf_len = (PAGE_SIZE < 8192) ? I40E_RXBUFFER_3072 : 3297 I40E_RXBUFFER_2048; 3298 } 3299 3300 /* set up individual rings */ 3301 for (i = 0; i < vsi->num_queue_pairs && !err; i++) 3302 err = i40e_configure_rx_ring(vsi->rx_rings[i]); 3303 3304 return err; 3305 } 3306 3307 /** 3308 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC 3309 * @vsi: ptr to the VSI 3310 **/ 3311 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi) 3312 { 3313 struct i40e_ring *tx_ring, *rx_ring; 3314 u16 qoffset, qcount; 3315 int i, n; 3316 3317 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) { 3318 /* Reset the TC information */ 3319 for (i = 0; i < vsi->num_queue_pairs; i++) { 3320 rx_ring = vsi->rx_rings[i]; 3321 tx_ring = vsi->tx_rings[i]; 3322 rx_ring->dcb_tc = 0; 3323 tx_ring->dcb_tc = 0; 3324 } 3325 return; 3326 } 3327 3328 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) { 3329 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n))) 3330 continue; 3331 3332 qoffset = vsi->tc_config.tc_info[n].qoffset; 3333 qcount = vsi->tc_config.tc_info[n].qcount; 3334 for (i = qoffset; i < (qoffset + qcount); i++) { 3335 rx_ring = vsi->rx_rings[i]; 3336 tx_ring = vsi->tx_rings[i]; 3337 rx_ring->dcb_tc = n; 3338 tx_ring->dcb_tc = n; 3339 } 3340 } 3341 } 3342 3343 /** 3344 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI 3345 * @vsi: ptr to the VSI 3346 **/ 3347 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi) 3348 { 3349 if (vsi->netdev) 3350 i40e_set_rx_mode(vsi->netdev); 3351 } 3352 3353 /** 3354 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters 3355 * @vsi: Pointer to the targeted VSI 3356 * 3357 * This function replays the hlist on the hw where all the SB Flow Director 3358 * filters were saved. 3359 **/ 3360 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi) 3361 { 3362 struct i40e_fdir_filter *filter; 3363 struct i40e_pf *pf = vsi->back; 3364 struct hlist_node *node; 3365 3366 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 3367 return; 3368 3369 /* Reset FDir counters as we're replaying all existing filters */ 3370 pf->fd_tcp4_filter_cnt = 0; 3371 pf->fd_udp4_filter_cnt = 0; 3372 pf->fd_sctp4_filter_cnt = 0; 3373 pf->fd_ip4_filter_cnt = 0; 3374 3375 hlist_for_each_entry_safe(filter, node, 3376 &pf->fdir_filter_list, fdir_node) { 3377 i40e_add_del_fdir(vsi, filter, true); 3378 } 3379 } 3380 3381 /** 3382 * i40e_vsi_configure - Set up the VSI for action 3383 * @vsi: the VSI being configured 3384 **/ 3385 static int i40e_vsi_configure(struct i40e_vsi *vsi) 3386 { 3387 int err; 3388 3389 i40e_set_vsi_rx_mode(vsi); 3390 i40e_restore_vlan(vsi); 3391 i40e_vsi_config_dcb_rings(vsi); 3392 err = i40e_vsi_configure_tx(vsi); 3393 if (!err) 3394 err = i40e_vsi_configure_rx(vsi); 3395 3396 return err; 3397 } 3398 3399 /** 3400 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW 3401 * @vsi: the VSI being configured 3402 **/ 3403 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi) 3404 { 3405 bool has_xdp = i40e_enabled_xdp_vsi(vsi); 3406 struct i40e_pf *pf = vsi->back; 3407 struct i40e_hw *hw = &pf->hw; 3408 u16 vector; 3409 int i, q; 3410 u32 qp; 3411 3412 /* The interrupt indexing is offset by 1 in the PFINT_ITRn 3413 * and PFINT_LNKLSTn registers, e.g.: 3414 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts) 3415 */ 3416 qp = vsi->base_queue; 3417 vector = vsi->base_vector; 3418 for (i = 0; i < vsi->num_q_vectors; i++, vector++) { 3419 struct i40e_q_vector *q_vector = vsi->q_vectors[i]; 3420 3421 q_vector->itr_countdown = ITR_COUNTDOWN_START; 3422 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[i]->rx_itr_setting); 3423 q_vector->rx.latency_range = I40E_LOW_LATENCY; 3424 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1), 3425 q_vector->rx.itr); 3426 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[i]->tx_itr_setting); 3427 q_vector->tx.latency_range = I40E_LOW_LATENCY; 3428 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1), 3429 q_vector->tx.itr); 3430 wr32(hw, I40E_PFINT_RATEN(vector - 1), 3431 i40e_intrl_usec_to_reg(vsi->int_rate_limit)); 3432 3433 /* Linked list for the queuepairs assigned to this vector */ 3434 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp); 3435 for (q = 0; q < q_vector->num_ringpairs; q++) { 3436 u32 nextqp = has_xdp ? qp + vsi->alloc_queue_pairs : qp; 3437 u32 val; 3438 3439 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK | 3440 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) | 3441 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) | 3442 (nextqp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) | 3443 (I40E_QUEUE_TYPE_TX << 3444 I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT); 3445 3446 wr32(hw, I40E_QINT_RQCTL(qp), val); 3447 3448 if (has_xdp) { 3449 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK | 3450 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) | 3451 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) | 3452 (qp << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) | 3453 (I40E_QUEUE_TYPE_TX << 3454 I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT); 3455 3456 wr32(hw, I40E_QINT_TQCTL(nextqp), val); 3457 } 3458 3459 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK | 3460 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) | 3461 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) | 3462 ((qp + 1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) | 3463 (I40E_QUEUE_TYPE_RX << 3464 I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT); 3465 3466 /* Terminate the linked list */ 3467 if (q == (q_vector->num_ringpairs - 1)) 3468 val |= (I40E_QUEUE_END_OF_LIST << 3469 I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT); 3470 3471 wr32(hw, I40E_QINT_TQCTL(qp), val); 3472 qp++; 3473 } 3474 } 3475 3476 i40e_flush(hw); 3477 } 3478 3479 /** 3480 * i40e_enable_misc_int_causes - enable the non-queue interrupts 3481 * @hw: ptr to the hardware info 3482 **/ 3483 static void i40e_enable_misc_int_causes(struct i40e_pf *pf) 3484 { 3485 struct i40e_hw *hw = &pf->hw; 3486 u32 val; 3487 3488 /* clear things first */ 3489 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */ 3490 rd32(hw, I40E_PFINT_ICR0); /* read to clear */ 3491 3492 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK | 3493 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK | 3494 I40E_PFINT_ICR0_ENA_GRST_MASK | 3495 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK | 3496 I40E_PFINT_ICR0_ENA_GPIO_MASK | 3497 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK | 3498 I40E_PFINT_ICR0_ENA_VFLR_MASK | 3499 I40E_PFINT_ICR0_ENA_ADMINQ_MASK; 3500 3501 if (pf->flags & I40E_FLAG_IWARP_ENABLED) 3502 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK; 3503 3504 if (pf->flags & I40E_FLAG_PTP) 3505 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK; 3506 3507 wr32(hw, I40E_PFINT_ICR0_ENA, val); 3508 3509 /* SW_ITR_IDX = 0, but don't change INTENA */ 3510 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK | 3511 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK); 3512 3513 /* OTHER_ITR_IDX = 0 */ 3514 wr32(hw, I40E_PFINT_STAT_CTL0, 0); 3515 } 3516 3517 /** 3518 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW 3519 * @vsi: the VSI being configured 3520 **/ 3521 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi) 3522 { 3523 u32 nextqp = i40e_enabled_xdp_vsi(vsi) ? vsi->alloc_queue_pairs : 0; 3524 struct i40e_q_vector *q_vector = vsi->q_vectors[0]; 3525 struct i40e_pf *pf = vsi->back; 3526 struct i40e_hw *hw = &pf->hw; 3527 u32 val; 3528 3529 /* set the ITR configuration */ 3530 q_vector->itr_countdown = ITR_COUNTDOWN_START; 3531 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[0]->rx_itr_setting); 3532 q_vector->rx.latency_range = I40E_LOW_LATENCY; 3533 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr); 3534 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[0]->tx_itr_setting); 3535 q_vector->tx.latency_range = I40E_LOW_LATENCY; 3536 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr); 3537 3538 i40e_enable_misc_int_causes(pf); 3539 3540 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */ 3541 wr32(hw, I40E_PFINT_LNKLST0, 0); 3542 3543 /* Associate the queue pair to the vector and enable the queue int */ 3544 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK | 3545 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) | 3546 (nextqp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)| 3547 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT); 3548 3549 wr32(hw, I40E_QINT_RQCTL(0), val); 3550 3551 if (i40e_enabled_xdp_vsi(vsi)) { 3552 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK | 3553 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT)| 3554 (I40E_QUEUE_TYPE_TX 3555 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT); 3556 3557 wr32(hw, I40E_QINT_TQCTL(nextqp), val); 3558 } 3559 3560 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK | 3561 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) | 3562 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT); 3563 3564 wr32(hw, I40E_QINT_TQCTL(0), val); 3565 i40e_flush(hw); 3566 } 3567 3568 /** 3569 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0 3570 * @pf: board private structure 3571 **/ 3572 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf) 3573 { 3574 struct i40e_hw *hw = &pf->hw; 3575 3576 wr32(hw, I40E_PFINT_DYN_CTL0, 3577 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT); 3578 i40e_flush(hw); 3579 } 3580 3581 /** 3582 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0 3583 * @pf: board private structure 3584 **/ 3585 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf) 3586 { 3587 struct i40e_hw *hw = &pf->hw; 3588 u32 val; 3589 3590 val = I40E_PFINT_DYN_CTL0_INTENA_MASK | 3591 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK | 3592 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT); 3593 3594 wr32(hw, I40E_PFINT_DYN_CTL0, val); 3595 i40e_flush(hw); 3596 } 3597 3598 /** 3599 * i40e_msix_clean_rings - MSIX mode Interrupt Handler 3600 * @irq: interrupt number 3601 * @data: pointer to a q_vector 3602 **/ 3603 static irqreturn_t i40e_msix_clean_rings(int irq, void *data) 3604 { 3605 struct i40e_q_vector *q_vector = data; 3606 3607 if (!q_vector->tx.ring && !q_vector->rx.ring) 3608 return IRQ_HANDLED; 3609 3610 napi_schedule_irqoff(&q_vector->napi); 3611 3612 return IRQ_HANDLED; 3613 } 3614 3615 /** 3616 * i40e_irq_affinity_notify - Callback for affinity changes 3617 * @notify: context as to what irq was changed 3618 * @mask: the new affinity mask 3619 * 3620 * This is a callback function used by the irq_set_affinity_notifier function 3621 * so that we may register to receive changes to the irq affinity masks. 3622 **/ 3623 static void i40e_irq_affinity_notify(struct irq_affinity_notify *notify, 3624 const cpumask_t *mask) 3625 { 3626 struct i40e_q_vector *q_vector = 3627 container_of(notify, struct i40e_q_vector, affinity_notify); 3628 3629 cpumask_copy(&q_vector->affinity_mask, mask); 3630 } 3631 3632 /** 3633 * i40e_irq_affinity_release - Callback for affinity notifier release 3634 * @ref: internal core kernel usage 3635 * 3636 * This is a callback function used by the irq_set_affinity_notifier function 3637 * to inform the current notification subscriber that they will no longer 3638 * receive notifications. 3639 **/ 3640 static void i40e_irq_affinity_release(struct kref *ref) {} 3641 3642 /** 3643 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts 3644 * @vsi: the VSI being configured 3645 * @basename: name for the vector 3646 * 3647 * Allocates MSI-X vectors and requests interrupts from the kernel. 3648 **/ 3649 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename) 3650 { 3651 int q_vectors = vsi->num_q_vectors; 3652 struct i40e_pf *pf = vsi->back; 3653 int base = vsi->base_vector; 3654 int rx_int_idx = 0; 3655 int tx_int_idx = 0; 3656 int vector, err; 3657 int irq_num; 3658 int cpu; 3659 3660 for (vector = 0; vector < q_vectors; vector++) { 3661 struct i40e_q_vector *q_vector = vsi->q_vectors[vector]; 3662 3663 irq_num = pf->msix_entries[base + vector].vector; 3664 3665 if (q_vector->tx.ring && q_vector->rx.ring) { 3666 snprintf(q_vector->name, sizeof(q_vector->name) - 1, 3667 "%s-%s-%d", basename, "TxRx", rx_int_idx++); 3668 tx_int_idx++; 3669 } else if (q_vector->rx.ring) { 3670 snprintf(q_vector->name, sizeof(q_vector->name) - 1, 3671 "%s-%s-%d", basename, "rx", rx_int_idx++); 3672 } else if (q_vector->tx.ring) { 3673 snprintf(q_vector->name, sizeof(q_vector->name) - 1, 3674 "%s-%s-%d", basename, "tx", tx_int_idx++); 3675 } else { 3676 /* skip this unused q_vector */ 3677 continue; 3678 } 3679 err = request_irq(irq_num, 3680 vsi->irq_handler, 3681 0, 3682 q_vector->name, 3683 q_vector); 3684 if (err) { 3685 dev_info(&pf->pdev->dev, 3686 "MSIX request_irq failed, error: %d\n", err); 3687 goto free_queue_irqs; 3688 } 3689 3690 /* register for affinity change notifications */ 3691 q_vector->affinity_notify.notify = i40e_irq_affinity_notify; 3692 q_vector->affinity_notify.release = i40e_irq_affinity_release; 3693 irq_set_affinity_notifier(irq_num, &q_vector->affinity_notify); 3694 /* Spread affinity hints out across online CPUs. 3695 * 3696 * get_cpu_mask returns a static constant mask with 3697 * a permanent lifetime so it's ok to pass to 3698 * irq_set_affinity_hint without making a copy. 3699 */ 3700 cpu = cpumask_local_spread(q_vector->v_idx, -1); 3701 irq_set_affinity_hint(irq_num, get_cpu_mask(cpu)); 3702 } 3703 3704 vsi->irqs_ready = true; 3705 return 0; 3706 3707 free_queue_irqs: 3708 while (vector) { 3709 vector--; 3710 irq_num = pf->msix_entries[base + vector].vector; 3711 irq_set_affinity_notifier(irq_num, NULL); 3712 irq_set_affinity_hint(irq_num, NULL); 3713 free_irq(irq_num, &vsi->q_vectors[vector]); 3714 } 3715 return err; 3716 } 3717 3718 /** 3719 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI 3720 * @vsi: the VSI being un-configured 3721 **/ 3722 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi) 3723 { 3724 struct i40e_pf *pf = vsi->back; 3725 struct i40e_hw *hw = &pf->hw; 3726 int base = vsi->base_vector; 3727 int i; 3728 3729 /* disable interrupt causation from each queue */ 3730 for (i = 0; i < vsi->num_queue_pairs; i++) { 3731 u32 val; 3732 3733 val = rd32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx)); 3734 val &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK; 3735 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), val); 3736 3737 val = rd32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx)); 3738 val &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK; 3739 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), val); 3740 3741 if (!i40e_enabled_xdp_vsi(vsi)) 3742 continue; 3743 wr32(hw, I40E_QINT_TQCTL(vsi->xdp_rings[i]->reg_idx), 0); 3744 } 3745 3746 /* disable each interrupt */ 3747 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 3748 for (i = vsi->base_vector; 3749 i < (vsi->num_q_vectors + vsi->base_vector); i++) 3750 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0); 3751 3752 i40e_flush(hw); 3753 for (i = 0; i < vsi->num_q_vectors; i++) 3754 synchronize_irq(pf->msix_entries[i + base].vector); 3755 } else { 3756 /* Legacy and MSI mode - this stops all interrupt handling */ 3757 wr32(hw, I40E_PFINT_ICR0_ENA, 0); 3758 wr32(hw, I40E_PFINT_DYN_CTL0, 0); 3759 i40e_flush(hw); 3760 synchronize_irq(pf->pdev->irq); 3761 } 3762 } 3763 3764 /** 3765 * i40e_vsi_enable_irq - Enable IRQ for the given VSI 3766 * @vsi: the VSI being configured 3767 **/ 3768 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi) 3769 { 3770 struct i40e_pf *pf = vsi->back; 3771 int i; 3772 3773 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 3774 for (i = 0; i < vsi->num_q_vectors; i++) 3775 i40e_irq_dynamic_enable(vsi, i); 3776 } else { 3777 i40e_irq_dynamic_enable_icr0(pf); 3778 } 3779 3780 i40e_flush(&pf->hw); 3781 return 0; 3782 } 3783 3784 /** 3785 * i40e_free_misc_vector - Free the vector that handles non-queue events 3786 * @pf: board private structure 3787 **/ 3788 static void i40e_free_misc_vector(struct i40e_pf *pf) 3789 { 3790 /* Disable ICR 0 */ 3791 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0); 3792 i40e_flush(&pf->hw); 3793 3794 if (pf->flags & I40E_FLAG_MSIX_ENABLED && pf->msix_entries) { 3795 synchronize_irq(pf->msix_entries[0].vector); 3796 free_irq(pf->msix_entries[0].vector, pf); 3797 clear_bit(__I40E_MISC_IRQ_REQUESTED, pf->state); 3798 } 3799 } 3800 3801 /** 3802 * i40e_intr - MSI/Legacy and non-queue interrupt handler 3803 * @irq: interrupt number 3804 * @data: pointer to a q_vector 3805 * 3806 * This is the handler used for all MSI/Legacy interrupts, and deals 3807 * with both queue and non-queue interrupts. This is also used in 3808 * MSIX mode to handle the non-queue interrupts. 3809 **/ 3810 static irqreturn_t i40e_intr(int irq, void *data) 3811 { 3812 struct i40e_pf *pf = (struct i40e_pf *)data; 3813 struct i40e_hw *hw = &pf->hw; 3814 irqreturn_t ret = IRQ_NONE; 3815 u32 icr0, icr0_remaining; 3816 u32 val, ena_mask; 3817 3818 icr0 = rd32(hw, I40E_PFINT_ICR0); 3819 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA); 3820 3821 /* if sharing a legacy IRQ, we might get called w/o an intr pending */ 3822 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0) 3823 goto enable_intr; 3824 3825 /* if interrupt but no bits showing, must be SWINT */ 3826 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) || 3827 (icr0 & I40E_PFINT_ICR0_SWINT_MASK)) 3828 pf->sw_int_count++; 3829 3830 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) && 3831 (icr0 & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) { 3832 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK; 3833 dev_dbg(&pf->pdev->dev, "cleared PE_CRITERR\n"); 3834 set_bit(__I40E_CORE_RESET_REQUESTED, pf->state); 3835 } 3836 3837 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */ 3838 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) { 3839 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 3840 struct i40e_q_vector *q_vector = vsi->q_vectors[0]; 3841 3842 /* We do not have a way to disarm Queue causes while leaving 3843 * interrupt enabled for all other causes, ideally 3844 * interrupt should be disabled while we are in NAPI but 3845 * this is not a performance path and napi_schedule() 3846 * can deal with rescheduling. 3847 */ 3848 if (!test_bit(__I40E_DOWN, pf->state)) 3849 napi_schedule_irqoff(&q_vector->napi); 3850 } 3851 3852 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) { 3853 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK; 3854 set_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state); 3855 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n"); 3856 } 3857 3858 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) { 3859 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK; 3860 set_bit(__I40E_MDD_EVENT_PENDING, pf->state); 3861 } 3862 3863 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) { 3864 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK; 3865 set_bit(__I40E_VFLR_EVENT_PENDING, pf->state); 3866 } 3867 3868 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) { 3869 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) 3870 set_bit(__I40E_RESET_INTR_RECEIVED, pf->state); 3871 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK; 3872 val = rd32(hw, I40E_GLGEN_RSTAT); 3873 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK) 3874 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT; 3875 if (val == I40E_RESET_CORER) { 3876 pf->corer_count++; 3877 } else if (val == I40E_RESET_GLOBR) { 3878 pf->globr_count++; 3879 } else if (val == I40E_RESET_EMPR) { 3880 pf->empr_count++; 3881 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state); 3882 } 3883 } 3884 3885 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) { 3886 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK; 3887 dev_info(&pf->pdev->dev, "HMC error interrupt\n"); 3888 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n", 3889 rd32(hw, I40E_PFHMC_ERRORINFO), 3890 rd32(hw, I40E_PFHMC_ERRORDATA)); 3891 } 3892 3893 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) { 3894 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0); 3895 3896 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) { 3897 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK; 3898 i40e_ptp_tx_hwtstamp(pf); 3899 } 3900 } 3901 3902 /* If a critical error is pending we have no choice but to reset the 3903 * device. 3904 * Report and mask out any remaining unexpected interrupts. 3905 */ 3906 icr0_remaining = icr0 & ena_mask; 3907 if (icr0_remaining) { 3908 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n", 3909 icr0_remaining); 3910 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) || 3911 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) || 3912 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) { 3913 dev_info(&pf->pdev->dev, "device will be reset\n"); 3914 set_bit(__I40E_PF_RESET_REQUESTED, pf->state); 3915 i40e_service_event_schedule(pf); 3916 } 3917 ena_mask &= ~icr0_remaining; 3918 } 3919 ret = IRQ_HANDLED; 3920 3921 enable_intr: 3922 /* re-enable interrupt causes */ 3923 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask); 3924 if (!test_bit(__I40E_DOWN, pf->state)) { 3925 i40e_service_event_schedule(pf); 3926 i40e_irq_dynamic_enable_icr0(pf); 3927 } 3928 3929 return ret; 3930 } 3931 3932 /** 3933 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes 3934 * @tx_ring: tx ring to clean 3935 * @budget: how many cleans we're allowed 3936 * 3937 * Returns true if there's any budget left (e.g. the clean is finished) 3938 **/ 3939 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget) 3940 { 3941 struct i40e_vsi *vsi = tx_ring->vsi; 3942 u16 i = tx_ring->next_to_clean; 3943 struct i40e_tx_buffer *tx_buf; 3944 struct i40e_tx_desc *tx_desc; 3945 3946 tx_buf = &tx_ring->tx_bi[i]; 3947 tx_desc = I40E_TX_DESC(tx_ring, i); 3948 i -= tx_ring->count; 3949 3950 do { 3951 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch; 3952 3953 /* if next_to_watch is not set then there is no work pending */ 3954 if (!eop_desc) 3955 break; 3956 3957 /* prevent any other reads prior to eop_desc */ 3958 read_barrier_depends(); 3959 3960 /* if the descriptor isn't done, no work yet to do */ 3961 if (!(eop_desc->cmd_type_offset_bsz & 3962 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE))) 3963 break; 3964 3965 /* clear next_to_watch to prevent false hangs */ 3966 tx_buf->next_to_watch = NULL; 3967 3968 tx_desc->buffer_addr = 0; 3969 tx_desc->cmd_type_offset_bsz = 0; 3970 /* move past filter desc */ 3971 tx_buf++; 3972 tx_desc++; 3973 i++; 3974 if (unlikely(!i)) { 3975 i -= tx_ring->count; 3976 tx_buf = tx_ring->tx_bi; 3977 tx_desc = I40E_TX_DESC(tx_ring, 0); 3978 } 3979 /* unmap skb header data */ 3980 dma_unmap_single(tx_ring->dev, 3981 dma_unmap_addr(tx_buf, dma), 3982 dma_unmap_len(tx_buf, len), 3983 DMA_TO_DEVICE); 3984 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB) 3985 kfree(tx_buf->raw_buf); 3986 3987 tx_buf->raw_buf = NULL; 3988 tx_buf->tx_flags = 0; 3989 tx_buf->next_to_watch = NULL; 3990 dma_unmap_len_set(tx_buf, len, 0); 3991 tx_desc->buffer_addr = 0; 3992 tx_desc->cmd_type_offset_bsz = 0; 3993 3994 /* move us past the eop_desc for start of next FD desc */ 3995 tx_buf++; 3996 tx_desc++; 3997 i++; 3998 if (unlikely(!i)) { 3999 i -= tx_ring->count; 4000 tx_buf = tx_ring->tx_bi; 4001 tx_desc = I40E_TX_DESC(tx_ring, 0); 4002 } 4003 4004 /* update budget accounting */ 4005 budget--; 4006 } while (likely(budget)); 4007 4008 i += tx_ring->count; 4009 tx_ring->next_to_clean = i; 4010 4011 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) 4012 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx); 4013 4014 return budget > 0; 4015 } 4016 4017 /** 4018 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring 4019 * @irq: interrupt number 4020 * @data: pointer to a q_vector 4021 **/ 4022 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data) 4023 { 4024 struct i40e_q_vector *q_vector = data; 4025 struct i40e_vsi *vsi; 4026 4027 if (!q_vector->tx.ring) 4028 return IRQ_HANDLED; 4029 4030 vsi = q_vector->tx.ring->vsi; 4031 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit); 4032 4033 return IRQ_HANDLED; 4034 } 4035 4036 /** 4037 * i40e_map_vector_to_qp - Assigns the queue pair to the vector 4038 * @vsi: the VSI being configured 4039 * @v_idx: vector index 4040 * @qp_idx: queue pair index 4041 **/ 4042 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx) 4043 { 4044 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx]; 4045 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx]; 4046 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx]; 4047 4048 tx_ring->q_vector = q_vector; 4049 tx_ring->next = q_vector->tx.ring; 4050 q_vector->tx.ring = tx_ring; 4051 q_vector->tx.count++; 4052 4053 /* Place XDP Tx ring in the same q_vector ring list as regular Tx */ 4054 if (i40e_enabled_xdp_vsi(vsi)) { 4055 struct i40e_ring *xdp_ring = vsi->xdp_rings[qp_idx]; 4056 4057 xdp_ring->q_vector = q_vector; 4058 xdp_ring->next = q_vector->tx.ring; 4059 q_vector->tx.ring = xdp_ring; 4060 q_vector->tx.count++; 4061 } 4062 4063 rx_ring->q_vector = q_vector; 4064 rx_ring->next = q_vector->rx.ring; 4065 q_vector->rx.ring = rx_ring; 4066 q_vector->rx.count++; 4067 } 4068 4069 /** 4070 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors 4071 * @vsi: the VSI being configured 4072 * 4073 * This function maps descriptor rings to the queue-specific vectors 4074 * we were allotted through the MSI-X enabling code. Ideally, we'd have 4075 * one vector per queue pair, but on a constrained vector budget, we 4076 * group the queue pairs as "efficiently" as possible. 4077 **/ 4078 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi) 4079 { 4080 int qp_remaining = vsi->num_queue_pairs; 4081 int q_vectors = vsi->num_q_vectors; 4082 int num_ringpairs; 4083 int v_start = 0; 4084 int qp_idx = 0; 4085 4086 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to 4087 * group them so there are multiple queues per vector. 4088 * It is also important to go through all the vectors available to be 4089 * sure that if we don't use all the vectors, that the remaining vectors 4090 * are cleared. This is especially important when decreasing the 4091 * number of queues in use. 4092 */ 4093 for (; v_start < q_vectors; v_start++) { 4094 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start]; 4095 4096 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start); 4097 4098 q_vector->num_ringpairs = num_ringpairs; 4099 4100 q_vector->rx.count = 0; 4101 q_vector->tx.count = 0; 4102 q_vector->rx.ring = NULL; 4103 q_vector->tx.ring = NULL; 4104 4105 while (num_ringpairs--) { 4106 i40e_map_vector_to_qp(vsi, v_start, qp_idx); 4107 qp_idx++; 4108 qp_remaining--; 4109 } 4110 } 4111 } 4112 4113 /** 4114 * i40e_vsi_request_irq - Request IRQ from the OS 4115 * @vsi: the VSI being configured 4116 * @basename: name for the vector 4117 **/ 4118 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename) 4119 { 4120 struct i40e_pf *pf = vsi->back; 4121 int err; 4122 4123 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 4124 err = i40e_vsi_request_irq_msix(vsi, basename); 4125 else if (pf->flags & I40E_FLAG_MSI_ENABLED) 4126 err = request_irq(pf->pdev->irq, i40e_intr, 0, 4127 pf->int_name, pf); 4128 else 4129 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED, 4130 pf->int_name, pf); 4131 4132 if (err) 4133 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err); 4134 4135 return err; 4136 } 4137 4138 #ifdef CONFIG_NET_POLL_CONTROLLER 4139 /** 4140 * i40e_netpoll - A Polling 'interrupt' handler 4141 * @netdev: network interface device structure 4142 * 4143 * This is used by netconsole to send skbs without having to re-enable 4144 * interrupts. It's not called while the normal interrupt routine is executing. 4145 **/ 4146 static void i40e_netpoll(struct net_device *netdev) 4147 { 4148 struct i40e_netdev_priv *np = netdev_priv(netdev); 4149 struct i40e_vsi *vsi = np->vsi; 4150 struct i40e_pf *pf = vsi->back; 4151 int i; 4152 4153 /* if interface is down do nothing */ 4154 if (test_bit(__I40E_VSI_DOWN, vsi->state)) 4155 return; 4156 4157 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 4158 for (i = 0; i < vsi->num_q_vectors; i++) 4159 i40e_msix_clean_rings(0, vsi->q_vectors[i]); 4160 } else { 4161 i40e_intr(pf->pdev->irq, netdev); 4162 } 4163 } 4164 #endif 4165 4166 #define I40E_QTX_ENA_WAIT_COUNT 50 4167 4168 /** 4169 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled 4170 * @pf: the PF being configured 4171 * @pf_q: the PF queue 4172 * @enable: enable or disable state of the queue 4173 * 4174 * This routine will wait for the given Tx queue of the PF to reach the 4175 * enabled or disabled state. 4176 * Returns -ETIMEDOUT in case of failing to reach the requested state after 4177 * multiple retries; else will return 0 in case of success. 4178 **/ 4179 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable) 4180 { 4181 int i; 4182 u32 tx_reg; 4183 4184 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) { 4185 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q)); 4186 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) 4187 break; 4188 4189 usleep_range(10, 20); 4190 } 4191 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT) 4192 return -ETIMEDOUT; 4193 4194 return 0; 4195 } 4196 4197 /** 4198 * i40e_control_tx_q - Start or stop a particular Tx queue 4199 * @pf: the PF structure 4200 * @pf_q: the PF queue to configure 4201 * @enable: start or stop the queue 4202 * 4203 * This function enables or disables a single queue. Note that any delay 4204 * required after the operation is expected to be handled by the caller of 4205 * this function. 4206 **/ 4207 static void i40e_control_tx_q(struct i40e_pf *pf, int pf_q, bool enable) 4208 { 4209 struct i40e_hw *hw = &pf->hw; 4210 u32 tx_reg; 4211 int i; 4212 4213 /* warn the TX unit of coming changes */ 4214 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable); 4215 if (!enable) 4216 usleep_range(10, 20); 4217 4218 for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) { 4219 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q)); 4220 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) == 4221 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1)) 4222 break; 4223 usleep_range(1000, 2000); 4224 } 4225 4226 /* Skip if the queue is already in the requested state */ 4227 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) 4228 return; 4229 4230 /* turn on/off the queue */ 4231 if (enable) { 4232 wr32(hw, I40E_QTX_HEAD(pf_q), 0); 4233 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK; 4234 } else { 4235 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK; 4236 } 4237 4238 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg); 4239 } 4240 4241 /** 4242 * i40e_control_wait_tx_q - Start/stop Tx queue and wait for completion 4243 * @seid: VSI SEID 4244 * @pf: the PF structure 4245 * @pf_q: the PF queue to configure 4246 * @is_xdp: true if the queue is used for XDP 4247 * @enable: start or stop the queue 4248 **/ 4249 static int i40e_control_wait_tx_q(int seid, struct i40e_pf *pf, int pf_q, 4250 bool is_xdp, bool enable) 4251 { 4252 int ret; 4253 4254 i40e_control_tx_q(pf, pf_q, enable); 4255 4256 /* wait for the change to finish */ 4257 ret = i40e_pf_txq_wait(pf, pf_q, enable); 4258 if (ret) { 4259 dev_info(&pf->pdev->dev, 4260 "VSI seid %d %sTx ring %d %sable timeout\n", 4261 seid, (is_xdp ? "XDP " : ""), pf_q, 4262 (enable ? "en" : "dis")); 4263 } 4264 4265 return ret; 4266 } 4267 4268 /** 4269 * i40e_vsi_control_tx - Start or stop a VSI's rings 4270 * @vsi: the VSI being configured 4271 * @enable: start or stop the rings 4272 **/ 4273 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable) 4274 { 4275 struct i40e_pf *pf = vsi->back; 4276 int i, pf_q, ret = 0; 4277 4278 pf_q = vsi->base_queue; 4279 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { 4280 ret = i40e_control_wait_tx_q(vsi->seid, pf, 4281 pf_q, 4282 false /*is xdp*/, enable); 4283 if (ret) 4284 break; 4285 4286 if (!i40e_enabled_xdp_vsi(vsi)) 4287 continue; 4288 4289 ret = i40e_control_wait_tx_q(vsi->seid, pf, 4290 pf_q + vsi->alloc_queue_pairs, 4291 true /*is xdp*/, enable); 4292 if (ret) 4293 break; 4294 } 4295 4296 return ret; 4297 } 4298 4299 /** 4300 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled 4301 * @pf: the PF being configured 4302 * @pf_q: the PF queue 4303 * @enable: enable or disable state of the queue 4304 * 4305 * This routine will wait for the given Rx queue of the PF to reach the 4306 * enabled or disabled state. 4307 * Returns -ETIMEDOUT in case of failing to reach the requested state after 4308 * multiple retries; else will return 0 in case of success. 4309 **/ 4310 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable) 4311 { 4312 int i; 4313 u32 rx_reg; 4314 4315 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) { 4316 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q)); 4317 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) 4318 break; 4319 4320 usleep_range(10, 20); 4321 } 4322 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT) 4323 return -ETIMEDOUT; 4324 4325 return 0; 4326 } 4327 4328 /** 4329 * i40e_control_rx_q - Start or stop a particular Rx queue 4330 * @pf: the PF structure 4331 * @pf_q: the PF queue to configure 4332 * @enable: start or stop the queue 4333 * 4334 * This function enables or disables a single queue. Note that any delay 4335 * required after the operation is expected to be handled by the caller of 4336 * this function. 4337 **/ 4338 static void i40e_control_rx_q(struct i40e_pf *pf, int pf_q, bool enable) 4339 { 4340 struct i40e_hw *hw = &pf->hw; 4341 u32 rx_reg; 4342 int i; 4343 4344 for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) { 4345 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q)); 4346 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) == 4347 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1)) 4348 break; 4349 usleep_range(1000, 2000); 4350 } 4351 4352 /* Skip if the queue is already in the requested state */ 4353 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) 4354 return; 4355 4356 /* turn on/off the queue */ 4357 if (enable) 4358 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK; 4359 else 4360 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK; 4361 4362 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg); 4363 } 4364 4365 /** 4366 * i40e_vsi_control_rx - Start or stop a VSI's rings 4367 * @vsi: the VSI being configured 4368 * @enable: start or stop the rings 4369 **/ 4370 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable) 4371 { 4372 struct i40e_pf *pf = vsi->back; 4373 int i, pf_q, ret = 0; 4374 4375 pf_q = vsi->base_queue; 4376 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { 4377 i40e_control_rx_q(pf, pf_q, enable); 4378 4379 /* wait for the change to finish */ 4380 ret = i40e_pf_rxq_wait(pf, pf_q, enable); 4381 if (ret) { 4382 dev_info(&pf->pdev->dev, 4383 "VSI seid %d Rx ring %d %sable timeout\n", 4384 vsi->seid, pf_q, (enable ? "en" : "dis")); 4385 break; 4386 } 4387 } 4388 4389 /* Due to HW errata, on Rx disable only, the register can indicate done 4390 * before it really is. Needs 50ms to be sure 4391 */ 4392 if (!enable) 4393 mdelay(50); 4394 4395 return ret; 4396 } 4397 4398 /** 4399 * i40e_vsi_start_rings - Start a VSI's rings 4400 * @vsi: the VSI being configured 4401 **/ 4402 int i40e_vsi_start_rings(struct i40e_vsi *vsi) 4403 { 4404 int ret = 0; 4405 4406 /* do rx first for enable and last for disable */ 4407 ret = i40e_vsi_control_rx(vsi, true); 4408 if (ret) 4409 return ret; 4410 ret = i40e_vsi_control_tx(vsi, true); 4411 4412 return ret; 4413 } 4414 4415 /** 4416 * i40e_vsi_stop_rings - Stop a VSI's rings 4417 * @vsi: the VSI being configured 4418 **/ 4419 void i40e_vsi_stop_rings(struct i40e_vsi *vsi) 4420 { 4421 /* When port TX is suspended, don't wait */ 4422 if (test_bit(__I40E_PORT_SUSPENDED, vsi->back->state)) 4423 return i40e_vsi_stop_rings_no_wait(vsi); 4424 4425 /* do rx first for enable and last for disable 4426 * Ignore return value, we need to shutdown whatever we can 4427 */ 4428 i40e_vsi_control_tx(vsi, false); 4429 i40e_vsi_control_rx(vsi, false); 4430 } 4431 4432 /** 4433 * i40e_vsi_stop_rings_no_wait - Stop a VSI's rings and do not delay 4434 * @vsi: the VSI being shutdown 4435 * 4436 * This function stops all the rings for a VSI but does not delay to verify 4437 * that rings have been disabled. It is expected that the caller is shutting 4438 * down multiple VSIs at once and will delay together for all the VSIs after 4439 * initiating the shutdown. This is particularly useful for shutting down lots 4440 * of VFs together. Otherwise, a large delay can be incurred while configuring 4441 * each VSI in serial. 4442 **/ 4443 void i40e_vsi_stop_rings_no_wait(struct i40e_vsi *vsi) 4444 { 4445 struct i40e_pf *pf = vsi->back; 4446 int i, pf_q; 4447 4448 pf_q = vsi->base_queue; 4449 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { 4450 i40e_control_tx_q(pf, pf_q, false); 4451 i40e_control_rx_q(pf, pf_q, false); 4452 } 4453 } 4454 4455 /** 4456 * i40e_vsi_free_irq - Free the irq association with the OS 4457 * @vsi: the VSI being configured 4458 **/ 4459 static void i40e_vsi_free_irq(struct i40e_vsi *vsi) 4460 { 4461 struct i40e_pf *pf = vsi->back; 4462 struct i40e_hw *hw = &pf->hw; 4463 int base = vsi->base_vector; 4464 u32 val, qp; 4465 int i; 4466 4467 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 4468 if (!vsi->q_vectors) 4469 return; 4470 4471 if (!vsi->irqs_ready) 4472 return; 4473 4474 vsi->irqs_ready = false; 4475 for (i = 0; i < vsi->num_q_vectors; i++) { 4476 int irq_num; 4477 u16 vector; 4478 4479 vector = i + base; 4480 irq_num = pf->msix_entries[vector].vector; 4481 4482 /* free only the irqs that were actually requested */ 4483 if (!vsi->q_vectors[i] || 4484 !vsi->q_vectors[i]->num_ringpairs) 4485 continue; 4486 4487 /* clear the affinity notifier in the IRQ descriptor */ 4488 irq_set_affinity_notifier(irq_num, NULL); 4489 /* remove our suggested affinity mask for this IRQ */ 4490 irq_set_affinity_hint(irq_num, NULL); 4491 synchronize_irq(irq_num); 4492 free_irq(irq_num, vsi->q_vectors[i]); 4493 4494 /* Tear down the interrupt queue link list 4495 * 4496 * We know that they come in pairs and always 4497 * the Rx first, then the Tx. To clear the 4498 * link list, stick the EOL value into the 4499 * next_q field of the registers. 4500 */ 4501 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1)); 4502 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK) 4503 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; 4504 val |= I40E_QUEUE_END_OF_LIST 4505 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; 4506 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val); 4507 4508 while (qp != I40E_QUEUE_END_OF_LIST) { 4509 u32 next; 4510 4511 val = rd32(hw, I40E_QINT_RQCTL(qp)); 4512 4513 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK | 4514 I40E_QINT_RQCTL_MSIX0_INDX_MASK | 4515 I40E_QINT_RQCTL_CAUSE_ENA_MASK | 4516 I40E_QINT_RQCTL_INTEVENT_MASK); 4517 4518 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK | 4519 I40E_QINT_RQCTL_NEXTQ_INDX_MASK); 4520 4521 wr32(hw, I40E_QINT_RQCTL(qp), val); 4522 4523 val = rd32(hw, I40E_QINT_TQCTL(qp)); 4524 4525 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK) 4526 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT; 4527 4528 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK | 4529 I40E_QINT_TQCTL_MSIX0_INDX_MASK | 4530 I40E_QINT_TQCTL_CAUSE_ENA_MASK | 4531 I40E_QINT_TQCTL_INTEVENT_MASK); 4532 4533 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK | 4534 I40E_QINT_TQCTL_NEXTQ_INDX_MASK); 4535 4536 wr32(hw, I40E_QINT_TQCTL(qp), val); 4537 qp = next; 4538 } 4539 } 4540 } else { 4541 free_irq(pf->pdev->irq, pf); 4542 4543 val = rd32(hw, I40E_PFINT_LNKLST0); 4544 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK) 4545 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; 4546 val |= I40E_QUEUE_END_OF_LIST 4547 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT; 4548 wr32(hw, I40E_PFINT_LNKLST0, val); 4549 4550 val = rd32(hw, I40E_QINT_RQCTL(qp)); 4551 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK | 4552 I40E_QINT_RQCTL_MSIX0_INDX_MASK | 4553 I40E_QINT_RQCTL_CAUSE_ENA_MASK | 4554 I40E_QINT_RQCTL_INTEVENT_MASK); 4555 4556 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK | 4557 I40E_QINT_RQCTL_NEXTQ_INDX_MASK); 4558 4559 wr32(hw, I40E_QINT_RQCTL(qp), val); 4560 4561 val = rd32(hw, I40E_QINT_TQCTL(qp)); 4562 4563 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK | 4564 I40E_QINT_TQCTL_MSIX0_INDX_MASK | 4565 I40E_QINT_TQCTL_CAUSE_ENA_MASK | 4566 I40E_QINT_TQCTL_INTEVENT_MASK); 4567 4568 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK | 4569 I40E_QINT_TQCTL_NEXTQ_INDX_MASK); 4570 4571 wr32(hw, I40E_QINT_TQCTL(qp), val); 4572 } 4573 } 4574 4575 /** 4576 * i40e_free_q_vector - Free memory allocated for specific interrupt vector 4577 * @vsi: the VSI being configured 4578 * @v_idx: Index of vector to be freed 4579 * 4580 * This function frees the memory allocated to the q_vector. In addition if 4581 * NAPI is enabled it will delete any references to the NAPI struct prior 4582 * to freeing the q_vector. 4583 **/ 4584 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx) 4585 { 4586 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx]; 4587 struct i40e_ring *ring; 4588 4589 if (!q_vector) 4590 return; 4591 4592 /* disassociate q_vector from rings */ 4593 i40e_for_each_ring(ring, q_vector->tx) 4594 ring->q_vector = NULL; 4595 4596 i40e_for_each_ring(ring, q_vector->rx) 4597 ring->q_vector = NULL; 4598 4599 /* only VSI w/ an associated netdev is set up w/ NAPI */ 4600 if (vsi->netdev) 4601 netif_napi_del(&q_vector->napi); 4602 4603 vsi->q_vectors[v_idx] = NULL; 4604 4605 kfree_rcu(q_vector, rcu); 4606 } 4607 4608 /** 4609 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors 4610 * @vsi: the VSI being un-configured 4611 * 4612 * This frees the memory allocated to the q_vectors and 4613 * deletes references to the NAPI struct. 4614 **/ 4615 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi) 4616 { 4617 int v_idx; 4618 4619 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++) 4620 i40e_free_q_vector(vsi, v_idx); 4621 } 4622 4623 /** 4624 * i40e_reset_interrupt_capability - Disable interrupt setup in OS 4625 * @pf: board private structure 4626 **/ 4627 static void i40e_reset_interrupt_capability(struct i40e_pf *pf) 4628 { 4629 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */ 4630 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 4631 pci_disable_msix(pf->pdev); 4632 kfree(pf->msix_entries); 4633 pf->msix_entries = NULL; 4634 kfree(pf->irq_pile); 4635 pf->irq_pile = NULL; 4636 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) { 4637 pci_disable_msi(pf->pdev); 4638 } 4639 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED); 4640 } 4641 4642 /** 4643 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings 4644 * @pf: board private structure 4645 * 4646 * We go through and clear interrupt specific resources and reset the structure 4647 * to pre-load conditions 4648 **/ 4649 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf) 4650 { 4651 int i; 4652 4653 i40e_free_misc_vector(pf); 4654 4655 i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector, 4656 I40E_IWARP_IRQ_PILE_ID); 4657 4658 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1); 4659 for (i = 0; i < pf->num_alloc_vsi; i++) 4660 if (pf->vsi[i]) 4661 i40e_vsi_free_q_vectors(pf->vsi[i]); 4662 i40e_reset_interrupt_capability(pf); 4663 } 4664 4665 /** 4666 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI 4667 * @vsi: the VSI being configured 4668 **/ 4669 static void i40e_napi_enable_all(struct i40e_vsi *vsi) 4670 { 4671 int q_idx; 4672 4673 if (!vsi->netdev) 4674 return; 4675 4676 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) { 4677 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx]; 4678 4679 if (q_vector->rx.ring || q_vector->tx.ring) 4680 napi_enable(&q_vector->napi); 4681 } 4682 } 4683 4684 /** 4685 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI 4686 * @vsi: the VSI being configured 4687 **/ 4688 static void i40e_napi_disable_all(struct i40e_vsi *vsi) 4689 { 4690 int q_idx; 4691 4692 if (!vsi->netdev) 4693 return; 4694 4695 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) { 4696 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx]; 4697 4698 if (q_vector->rx.ring || q_vector->tx.ring) 4699 napi_disable(&q_vector->napi); 4700 } 4701 } 4702 4703 /** 4704 * i40e_vsi_close - Shut down a VSI 4705 * @vsi: the vsi to be quelled 4706 **/ 4707 static void i40e_vsi_close(struct i40e_vsi *vsi) 4708 { 4709 struct i40e_pf *pf = vsi->back; 4710 if (!test_and_set_bit(__I40E_VSI_DOWN, vsi->state)) 4711 i40e_down(vsi); 4712 i40e_vsi_free_irq(vsi); 4713 i40e_vsi_free_tx_resources(vsi); 4714 i40e_vsi_free_rx_resources(vsi); 4715 vsi->current_netdev_flags = 0; 4716 pf->flags |= I40E_FLAG_SERVICE_CLIENT_REQUESTED; 4717 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) 4718 pf->flags |= I40E_FLAG_CLIENT_RESET; 4719 } 4720 4721 /** 4722 * i40e_quiesce_vsi - Pause a given VSI 4723 * @vsi: the VSI being paused 4724 **/ 4725 static void i40e_quiesce_vsi(struct i40e_vsi *vsi) 4726 { 4727 if (test_bit(__I40E_VSI_DOWN, vsi->state)) 4728 return; 4729 4730 set_bit(__I40E_VSI_NEEDS_RESTART, vsi->state); 4731 if (vsi->netdev && netif_running(vsi->netdev)) 4732 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev); 4733 else 4734 i40e_vsi_close(vsi); 4735 } 4736 4737 /** 4738 * i40e_unquiesce_vsi - Resume a given VSI 4739 * @vsi: the VSI being resumed 4740 **/ 4741 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi) 4742 { 4743 if (!test_and_clear_bit(__I40E_VSI_NEEDS_RESTART, vsi->state)) 4744 return; 4745 4746 if (vsi->netdev && netif_running(vsi->netdev)) 4747 vsi->netdev->netdev_ops->ndo_open(vsi->netdev); 4748 else 4749 i40e_vsi_open(vsi); /* this clears the DOWN bit */ 4750 } 4751 4752 /** 4753 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF 4754 * @pf: the PF 4755 **/ 4756 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf) 4757 { 4758 int v; 4759 4760 for (v = 0; v < pf->num_alloc_vsi; v++) { 4761 if (pf->vsi[v]) 4762 i40e_quiesce_vsi(pf->vsi[v]); 4763 } 4764 } 4765 4766 /** 4767 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF 4768 * @pf: the PF 4769 **/ 4770 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf) 4771 { 4772 int v; 4773 4774 for (v = 0; v < pf->num_alloc_vsi; v++) { 4775 if (pf->vsi[v]) 4776 i40e_unquiesce_vsi(pf->vsi[v]); 4777 } 4778 } 4779 4780 /** 4781 * i40e_vsi_wait_queues_disabled - Wait for VSI's queues to be disabled 4782 * @vsi: the VSI being configured 4783 * 4784 * Wait until all queues on a given VSI have been disabled. 4785 **/ 4786 int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi) 4787 { 4788 struct i40e_pf *pf = vsi->back; 4789 int i, pf_q, ret; 4790 4791 pf_q = vsi->base_queue; 4792 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { 4793 /* Check and wait for the Tx queue */ 4794 ret = i40e_pf_txq_wait(pf, pf_q, false); 4795 if (ret) { 4796 dev_info(&pf->pdev->dev, 4797 "VSI seid %d Tx ring %d disable timeout\n", 4798 vsi->seid, pf_q); 4799 return ret; 4800 } 4801 4802 if (!i40e_enabled_xdp_vsi(vsi)) 4803 goto wait_rx; 4804 4805 /* Check and wait for the XDP Tx queue */ 4806 ret = i40e_pf_txq_wait(pf, pf_q + vsi->alloc_queue_pairs, 4807 false); 4808 if (ret) { 4809 dev_info(&pf->pdev->dev, 4810 "VSI seid %d XDP Tx ring %d disable timeout\n", 4811 vsi->seid, pf_q); 4812 return ret; 4813 } 4814 wait_rx: 4815 /* Check and wait for the Rx queue */ 4816 ret = i40e_pf_rxq_wait(pf, pf_q, false); 4817 if (ret) { 4818 dev_info(&pf->pdev->dev, 4819 "VSI seid %d Rx ring %d disable timeout\n", 4820 vsi->seid, pf_q); 4821 return ret; 4822 } 4823 } 4824 4825 return 0; 4826 } 4827 4828 #ifdef CONFIG_I40E_DCB 4829 /** 4830 * i40e_pf_wait_queues_disabled - Wait for all queues of PF VSIs to be disabled 4831 * @pf: the PF 4832 * 4833 * This function waits for the queues to be in disabled state for all the 4834 * VSIs that are managed by this PF. 4835 **/ 4836 static int i40e_pf_wait_queues_disabled(struct i40e_pf *pf) 4837 { 4838 int v, ret = 0; 4839 4840 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { 4841 if (pf->vsi[v]) { 4842 ret = i40e_vsi_wait_queues_disabled(pf->vsi[v]); 4843 if (ret) 4844 break; 4845 } 4846 } 4847 4848 return ret; 4849 } 4850 4851 #endif 4852 4853 /** 4854 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue 4855 * @q_idx: TX queue number 4856 * @vsi: Pointer to VSI struct 4857 * 4858 * This function checks specified queue for given VSI. Detects hung condition. 4859 * We proactively detect hung TX queues by checking if interrupts are disabled 4860 * but there are pending descriptors. If it appears hung, attempt to recover 4861 * by triggering a SW interrupt. 4862 **/ 4863 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi) 4864 { 4865 struct i40e_ring *tx_ring = NULL; 4866 struct i40e_pf *pf; 4867 u32 val, tx_pending; 4868 int i; 4869 4870 pf = vsi->back; 4871 4872 /* now that we have an index, find the tx_ring struct */ 4873 for (i = 0; i < vsi->num_queue_pairs; i++) { 4874 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) { 4875 if (q_idx == vsi->tx_rings[i]->queue_index) { 4876 tx_ring = vsi->tx_rings[i]; 4877 break; 4878 } 4879 } 4880 } 4881 4882 if (!tx_ring) 4883 return; 4884 4885 /* Read interrupt register */ 4886 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 4887 val = rd32(&pf->hw, 4888 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx + 4889 tx_ring->vsi->base_vector - 1)); 4890 else 4891 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0); 4892 4893 tx_pending = i40e_get_tx_pending(tx_ring); 4894 4895 /* Interrupts are disabled and TX pending is non-zero, 4896 * trigger the SW interrupt (don't wait). Worst case 4897 * there will be one extra interrupt which may result 4898 * into not cleaning any queues because queues are cleaned. 4899 */ 4900 if (tx_pending && (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))) 4901 i40e_force_wb(vsi, tx_ring->q_vector); 4902 } 4903 4904 /** 4905 * i40e_detect_recover_hung - Function to detect and recover hung_queues 4906 * @pf: pointer to PF struct 4907 * 4908 * LAN VSI has netdev and netdev has TX queues. This function is to check 4909 * each of those TX queues if they are hung, trigger recovery by issuing 4910 * SW interrupt. 4911 **/ 4912 static void i40e_detect_recover_hung(struct i40e_pf *pf) 4913 { 4914 struct net_device *netdev; 4915 struct i40e_vsi *vsi; 4916 unsigned int i; 4917 4918 /* Only for LAN VSI */ 4919 vsi = pf->vsi[pf->lan_vsi]; 4920 4921 if (!vsi) 4922 return; 4923 4924 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */ 4925 if (test_bit(__I40E_VSI_DOWN, vsi->back->state) || 4926 test_bit(__I40E_RESET_RECOVERY_PENDING, vsi->back->state)) 4927 return; 4928 4929 /* Make sure type is MAIN VSI */ 4930 if (vsi->type != I40E_VSI_MAIN) 4931 return; 4932 4933 netdev = vsi->netdev; 4934 if (!netdev) 4935 return; 4936 4937 /* Bail out if netif_carrier is not OK */ 4938 if (!netif_carrier_ok(netdev)) 4939 return; 4940 4941 /* Go thru' TX queues for netdev */ 4942 for (i = 0; i < netdev->num_tx_queues; i++) { 4943 struct netdev_queue *q; 4944 4945 q = netdev_get_tx_queue(netdev, i); 4946 if (q) 4947 i40e_detect_recover_hung_queue(i, vsi); 4948 } 4949 } 4950 4951 /** 4952 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP 4953 * @pf: pointer to PF 4954 * 4955 * Get TC map for ISCSI PF type that will include iSCSI TC 4956 * and LAN TC. 4957 **/ 4958 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf) 4959 { 4960 struct i40e_dcb_app_priority_table app; 4961 struct i40e_hw *hw = &pf->hw; 4962 u8 enabled_tc = 1; /* TC0 is always enabled */ 4963 u8 tc, i; 4964 /* Get the iSCSI APP TLV */ 4965 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config; 4966 4967 for (i = 0; i < dcbcfg->numapps; i++) { 4968 app = dcbcfg->app[i]; 4969 if (app.selector == I40E_APP_SEL_TCPIP && 4970 app.protocolid == I40E_APP_PROTOID_ISCSI) { 4971 tc = dcbcfg->etscfg.prioritytable[app.priority]; 4972 enabled_tc |= BIT(tc); 4973 break; 4974 } 4975 } 4976 4977 return enabled_tc; 4978 } 4979 4980 /** 4981 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config 4982 * @dcbcfg: the corresponding DCBx configuration structure 4983 * 4984 * Return the number of TCs from given DCBx configuration 4985 **/ 4986 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg) 4987 { 4988 int i, tc_unused = 0; 4989 u8 num_tc = 0; 4990 u8 ret = 0; 4991 4992 /* Scan the ETS Config Priority Table to find 4993 * traffic class enabled for a given priority 4994 * and create a bitmask of enabled TCs 4995 */ 4996 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) 4997 num_tc |= BIT(dcbcfg->etscfg.prioritytable[i]); 4998 4999 /* Now scan the bitmask to check for 5000 * contiguous TCs starting with TC0 5001 */ 5002 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 5003 if (num_tc & BIT(i)) { 5004 if (!tc_unused) { 5005 ret++; 5006 } else { 5007 pr_err("Non-contiguous TC - Disabling DCB\n"); 5008 return 1; 5009 } 5010 } else { 5011 tc_unused = 1; 5012 } 5013 } 5014 5015 /* There is always at least TC0 */ 5016 if (!ret) 5017 ret = 1; 5018 5019 return ret; 5020 } 5021 5022 /** 5023 * i40e_dcb_get_enabled_tc - Get enabled traffic classes 5024 * @dcbcfg: the corresponding DCBx configuration structure 5025 * 5026 * Query the current DCB configuration and return the number of 5027 * traffic classes enabled from the given DCBX config 5028 **/ 5029 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg) 5030 { 5031 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg); 5032 u8 enabled_tc = 1; 5033 u8 i; 5034 5035 for (i = 0; i < num_tc; i++) 5036 enabled_tc |= BIT(i); 5037 5038 return enabled_tc; 5039 } 5040 5041 /** 5042 * i40e_mqprio_get_enabled_tc - Get enabled traffic classes 5043 * @pf: PF being queried 5044 * 5045 * Query the current MQPRIO configuration and return the number of 5046 * traffic classes enabled. 5047 **/ 5048 static u8 i40e_mqprio_get_enabled_tc(struct i40e_pf *pf) 5049 { 5050 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 5051 u8 num_tc = vsi->mqprio_qopt.qopt.num_tc; 5052 u8 enabled_tc = 1, i; 5053 5054 for (i = 1; i < num_tc; i++) 5055 enabled_tc |= BIT(i); 5056 return enabled_tc; 5057 } 5058 5059 /** 5060 * i40e_pf_get_num_tc - Get enabled traffic classes for PF 5061 * @pf: PF being queried 5062 * 5063 * Return number of traffic classes enabled for the given PF 5064 **/ 5065 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf) 5066 { 5067 struct i40e_hw *hw = &pf->hw; 5068 u8 i, enabled_tc = 1; 5069 u8 num_tc = 0; 5070 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config; 5071 5072 if (pf->flags & I40E_FLAG_TC_MQPRIO) 5073 return pf->vsi[pf->lan_vsi]->mqprio_qopt.qopt.num_tc; 5074 5075 /* If neither MQPRIO nor DCB is enabled, then always use single TC */ 5076 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) 5077 return 1; 5078 5079 /* SFP mode will be enabled for all TCs on port */ 5080 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) 5081 return i40e_dcb_get_num_tc(dcbcfg); 5082 5083 /* MFP mode return count of enabled TCs for this PF */ 5084 if (pf->hw.func_caps.iscsi) 5085 enabled_tc = i40e_get_iscsi_tc_map(pf); 5086 else 5087 return 1; /* Only TC0 */ 5088 5089 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 5090 if (enabled_tc & BIT(i)) 5091 num_tc++; 5092 } 5093 return num_tc; 5094 } 5095 5096 /** 5097 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes 5098 * @pf: PF being queried 5099 * 5100 * Return a bitmap for enabled traffic classes for this PF. 5101 **/ 5102 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf) 5103 { 5104 if (pf->flags & I40E_FLAG_TC_MQPRIO) 5105 return i40e_mqprio_get_enabled_tc(pf); 5106 5107 /* If neither MQPRIO nor DCB is enabled for this PF then just return 5108 * default TC 5109 */ 5110 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) 5111 return I40E_DEFAULT_TRAFFIC_CLASS; 5112 5113 /* SFP mode we want PF to be enabled for all TCs */ 5114 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) 5115 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config); 5116 5117 /* MFP enabled and iSCSI PF type */ 5118 if (pf->hw.func_caps.iscsi) 5119 return i40e_get_iscsi_tc_map(pf); 5120 else 5121 return I40E_DEFAULT_TRAFFIC_CLASS; 5122 } 5123 5124 /** 5125 * i40e_vsi_get_bw_info - Query VSI BW Information 5126 * @vsi: the VSI being queried 5127 * 5128 * Returns 0 on success, negative value on failure 5129 **/ 5130 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi) 5131 { 5132 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0}; 5133 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0}; 5134 struct i40e_pf *pf = vsi->back; 5135 struct i40e_hw *hw = &pf->hw; 5136 i40e_status ret; 5137 u32 tc_bw_max; 5138 int i; 5139 5140 /* Get the VSI level BW configuration */ 5141 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL); 5142 if (ret) { 5143 dev_info(&pf->pdev->dev, 5144 "couldn't get PF vsi bw config, err %s aq_err %s\n", 5145 i40e_stat_str(&pf->hw, ret), 5146 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 5147 return -EINVAL; 5148 } 5149 5150 /* Get the VSI level BW configuration per TC */ 5151 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config, 5152 NULL); 5153 if (ret) { 5154 dev_info(&pf->pdev->dev, 5155 "couldn't get PF vsi ets bw config, err %s aq_err %s\n", 5156 i40e_stat_str(&pf->hw, ret), 5157 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 5158 return -EINVAL; 5159 } 5160 5161 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) { 5162 dev_info(&pf->pdev->dev, 5163 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n", 5164 bw_config.tc_valid_bits, 5165 bw_ets_config.tc_valid_bits); 5166 /* Still continuing */ 5167 } 5168 5169 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit); 5170 vsi->bw_max_quanta = bw_config.max_bw; 5171 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) | 5172 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16); 5173 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 5174 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i]; 5175 vsi->bw_ets_limit_credits[i] = 5176 le16_to_cpu(bw_ets_config.credits[i]); 5177 /* 3 bits out of 4 for each TC */ 5178 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7); 5179 } 5180 5181 return 0; 5182 } 5183 5184 /** 5185 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC 5186 * @vsi: the VSI being configured 5187 * @enabled_tc: TC bitmap 5188 * @bw_credits: BW shared credits per TC 5189 * 5190 * Returns 0 on success, negative value on failure 5191 **/ 5192 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc, 5193 u8 *bw_share) 5194 { 5195 struct i40e_aqc_configure_vsi_tc_bw_data bw_data; 5196 i40e_status ret; 5197 int i; 5198 5199 if (vsi->back->flags & I40E_FLAG_TC_MQPRIO) 5200 return 0; 5201 if (!vsi->mqprio_qopt.qopt.hw) { 5202 ret = i40e_set_bw_limit(vsi, vsi->seid, 0); 5203 if (ret) 5204 dev_info(&vsi->back->pdev->dev, 5205 "Failed to reset tx rate for vsi->seid %u\n", 5206 vsi->seid); 5207 return ret; 5208 } 5209 bw_data.tc_valid_bits = enabled_tc; 5210 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 5211 bw_data.tc_bw_credits[i] = bw_share[i]; 5212 5213 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data, 5214 NULL); 5215 if (ret) { 5216 dev_info(&vsi->back->pdev->dev, 5217 "AQ command Config VSI BW allocation per TC failed = %d\n", 5218 vsi->back->hw.aq.asq_last_status); 5219 return -EINVAL; 5220 } 5221 5222 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 5223 vsi->info.qs_handle[i] = bw_data.qs_handles[i]; 5224 5225 return 0; 5226 } 5227 5228 /** 5229 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration 5230 * @vsi: the VSI being configured 5231 * @enabled_tc: TC map to be enabled 5232 * 5233 **/ 5234 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc) 5235 { 5236 struct net_device *netdev = vsi->netdev; 5237 struct i40e_pf *pf = vsi->back; 5238 struct i40e_hw *hw = &pf->hw; 5239 u8 netdev_tc = 0; 5240 int i; 5241 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config; 5242 5243 if (!netdev) 5244 return; 5245 5246 if (!enabled_tc) { 5247 netdev_reset_tc(netdev); 5248 return; 5249 } 5250 5251 /* Set up actual enabled TCs on the VSI */ 5252 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc)) 5253 return; 5254 5255 /* set per TC queues for the VSI */ 5256 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 5257 /* Only set TC queues for enabled tcs 5258 * 5259 * e.g. For a VSI that has TC0 and TC3 enabled the 5260 * enabled_tc bitmap would be 0x00001001; the driver 5261 * will set the numtc for netdev as 2 that will be 5262 * referenced by the netdev layer as TC 0 and 1. 5263 */ 5264 if (vsi->tc_config.enabled_tc & BIT(i)) 5265 netdev_set_tc_queue(netdev, 5266 vsi->tc_config.tc_info[i].netdev_tc, 5267 vsi->tc_config.tc_info[i].qcount, 5268 vsi->tc_config.tc_info[i].qoffset); 5269 } 5270 5271 if (pf->flags & I40E_FLAG_TC_MQPRIO) 5272 return; 5273 5274 /* Assign UP2TC map for the VSI */ 5275 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 5276 /* Get the actual TC# for the UP */ 5277 u8 ets_tc = dcbcfg->etscfg.prioritytable[i]; 5278 /* Get the mapped netdev TC# for the UP */ 5279 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc; 5280 netdev_set_prio_tc_map(netdev, i, netdev_tc); 5281 } 5282 } 5283 5284 /** 5285 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map 5286 * @vsi: the VSI being configured 5287 * @ctxt: the ctxt buffer returned from AQ VSI update param command 5288 **/ 5289 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi, 5290 struct i40e_vsi_context *ctxt) 5291 { 5292 /* copy just the sections touched not the entire info 5293 * since not all sections are valid as returned by 5294 * update vsi params 5295 */ 5296 vsi->info.mapping_flags = ctxt->info.mapping_flags; 5297 memcpy(&vsi->info.queue_mapping, 5298 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping)); 5299 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping, 5300 sizeof(vsi->info.tc_mapping)); 5301 } 5302 5303 /** 5304 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map 5305 * @vsi: VSI to be configured 5306 * @enabled_tc: TC bitmap 5307 * 5308 * This configures a particular VSI for TCs that are mapped to the 5309 * given TC bitmap. It uses default bandwidth share for TCs across 5310 * VSIs to configure TC for a particular VSI. 5311 * 5312 * NOTE: 5313 * It is expected that the VSI queues have been quisced before calling 5314 * this function. 5315 **/ 5316 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc) 5317 { 5318 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0}; 5319 struct i40e_vsi_context ctxt; 5320 int ret = 0; 5321 int i; 5322 5323 /* Check if enabled_tc is same as existing or new TCs */ 5324 if (vsi->tc_config.enabled_tc == enabled_tc && 5325 vsi->mqprio_qopt.mode != TC_MQPRIO_MODE_CHANNEL) 5326 return ret; 5327 5328 /* Enable ETS TCs with equal BW Share for now across all VSIs */ 5329 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 5330 if (enabled_tc & BIT(i)) 5331 bw_share[i] = 1; 5332 } 5333 5334 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share); 5335 if (ret) { 5336 dev_info(&vsi->back->pdev->dev, 5337 "Failed configuring TC map %d for VSI %d\n", 5338 enabled_tc, vsi->seid); 5339 goto out; 5340 } 5341 5342 /* Update Queue Pairs Mapping for currently enabled UPs */ 5343 ctxt.seid = vsi->seid; 5344 ctxt.pf_num = vsi->back->hw.pf_id; 5345 ctxt.vf_num = 0; 5346 ctxt.uplink_seid = vsi->uplink_seid; 5347 ctxt.info = vsi->info; 5348 if (vsi->back->flags & I40E_FLAG_TC_MQPRIO) { 5349 ret = i40e_vsi_setup_queue_map_mqprio(vsi, &ctxt, enabled_tc); 5350 if (ret) 5351 goto out; 5352 } else { 5353 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false); 5354 } 5355 5356 /* On destroying the qdisc, reset vsi->rss_size, as number of enabled 5357 * queues changed. 5358 */ 5359 if (!vsi->mqprio_qopt.qopt.hw && vsi->reconfig_rss) { 5360 vsi->rss_size = min_t(int, vsi->back->alloc_rss_size, 5361 vsi->num_queue_pairs); 5362 ret = i40e_vsi_config_rss(vsi); 5363 if (ret) { 5364 dev_info(&vsi->back->pdev->dev, 5365 "Failed to reconfig rss for num_queues\n"); 5366 return ret; 5367 } 5368 vsi->reconfig_rss = false; 5369 } 5370 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) { 5371 ctxt.info.valid_sections |= 5372 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID); 5373 ctxt.info.queueing_opt_flags |= I40E_AQ_VSI_QUE_OPT_TCP_ENA; 5374 } 5375 5376 /* Update the VSI after updating the VSI queue-mapping 5377 * information 5378 */ 5379 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 5380 if (ret) { 5381 dev_info(&vsi->back->pdev->dev, 5382 "Update vsi tc config failed, err %s aq_err %s\n", 5383 i40e_stat_str(&vsi->back->hw, ret), 5384 i40e_aq_str(&vsi->back->hw, 5385 vsi->back->hw.aq.asq_last_status)); 5386 goto out; 5387 } 5388 /* update the local VSI info with updated queue map */ 5389 i40e_vsi_update_queue_map(vsi, &ctxt); 5390 vsi->info.valid_sections = 0; 5391 5392 /* Update current VSI BW information */ 5393 ret = i40e_vsi_get_bw_info(vsi); 5394 if (ret) { 5395 dev_info(&vsi->back->pdev->dev, 5396 "Failed updating vsi bw info, err %s aq_err %s\n", 5397 i40e_stat_str(&vsi->back->hw, ret), 5398 i40e_aq_str(&vsi->back->hw, 5399 vsi->back->hw.aq.asq_last_status)); 5400 goto out; 5401 } 5402 5403 /* Update the netdev TC setup */ 5404 i40e_vsi_config_netdev_tc(vsi, enabled_tc); 5405 out: 5406 return ret; 5407 } 5408 5409 /** 5410 * i40e_get_link_speed - Returns link speed for the interface 5411 * @vsi: VSI to be configured 5412 * 5413 **/ 5414 int i40e_get_link_speed(struct i40e_vsi *vsi) 5415 { 5416 struct i40e_pf *pf = vsi->back; 5417 5418 switch (pf->hw.phy.link_info.link_speed) { 5419 case I40E_LINK_SPEED_40GB: 5420 return 40000; 5421 case I40E_LINK_SPEED_25GB: 5422 return 25000; 5423 case I40E_LINK_SPEED_20GB: 5424 return 20000; 5425 case I40E_LINK_SPEED_10GB: 5426 return 10000; 5427 case I40E_LINK_SPEED_1GB: 5428 return 1000; 5429 default: 5430 return -EINVAL; 5431 } 5432 } 5433 5434 /** 5435 * i40e_set_bw_limit - setup BW limit for Tx traffic based on max_tx_rate 5436 * @vsi: VSI to be configured 5437 * @seid: seid of the channel/VSI 5438 * @max_tx_rate: max TX rate to be configured as BW limit 5439 * 5440 * Helper function to set BW limit for a given VSI 5441 **/ 5442 int i40e_set_bw_limit(struct i40e_vsi *vsi, u16 seid, u64 max_tx_rate) 5443 { 5444 struct i40e_pf *pf = vsi->back; 5445 u64 credits = 0; 5446 int speed = 0; 5447 int ret = 0; 5448 5449 speed = i40e_get_link_speed(vsi); 5450 if (max_tx_rate > speed) { 5451 dev_err(&pf->pdev->dev, 5452 "Invalid max tx rate %llu specified for VSI seid %d.", 5453 max_tx_rate, seid); 5454 return -EINVAL; 5455 } 5456 if (max_tx_rate && max_tx_rate < 50) { 5457 dev_warn(&pf->pdev->dev, 5458 "Setting max tx rate to minimum usable value of 50Mbps.\n"); 5459 max_tx_rate = 50; 5460 } 5461 5462 /* Tx rate credits are in values of 50Mbps, 0 is disabled */ 5463 credits = max_tx_rate; 5464 do_div(credits, I40E_BW_CREDIT_DIVISOR); 5465 ret = i40e_aq_config_vsi_bw_limit(&pf->hw, seid, credits, 5466 I40E_MAX_BW_INACTIVE_ACCUM, NULL); 5467 if (ret) 5468 dev_err(&pf->pdev->dev, 5469 "Failed set tx rate (%llu Mbps) for vsi->seid %u, err %s aq_err %s\n", 5470 max_tx_rate, seid, i40e_stat_str(&pf->hw, ret), 5471 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 5472 return ret; 5473 } 5474 5475 /** 5476 * i40e_remove_queue_channels - Remove queue channels for the TCs 5477 * @vsi: VSI to be configured 5478 * 5479 * Remove queue channels for the TCs 5480 **/ 5481 static void i40e_remove_queue_channels(struct i40e_vsi *vsi) 5482 { 5483 struct i40e_channel *ch, *ch_tmp; 5484 int ret, i; 5485 5486 /* Reset rss size that was stored when reconfiguring rss for 5487 * channel VSIs with non-power-of-2 queue count. 5488 */ 5489 vsi->current_rss_size = 0; 5490 5491 /* perform cleanup for channels if they exist */ 5492 if (list_empty(&vsi->ch_list)) 5493 return; 5494 5495 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) { 5496 struct i40e_vsi *p_vsi; 5497 5498 list_del(&ch->list); 5499 p_vsi = ch->parent_vsi; 5500 if (!p_vsi || !ch->initialized) { 5501 kfree(ch); 5502 continue; 5503 } 5504 /* Reset queue contexts */ 5505 for (i = 0; i < ch->num_queue_pairs; i++) { 5506 struct i40e_ring *tx_ring, *rx_ring; 5507 u16 pf_q; 5508 5509 pf_q = ch->base_queue + i; 5510 tx_ring = vsi->tx_rings[pf_q]; 5511 tx_ring->ch = NULL; 5512 5513 rx_ring = vsi->rx_rings[pf_q]; 5514 rx_ring->ch = NULL; 5515 } 5516 5517 /* Reset BW configured for this VSI via mqprio */ 5518 ret = i40e_set_bw_limit(vsi, ch->seid, 0); 5519 if (ret) 5520 dev_info(&vsi->back->pdev->dev, 5521 "Failed to reset tx rate for ch->seid %u\n", 5522 ch->seid); 5523 5524 /* delete VSI from FW */ 5525 ret = i40e_aq_delete_element(&vsi->back->hw, ch->seid, 5526 NULL); 5527 if (ret) 5528 dev_err(&vsi->back->pdev->dev, 5529 "unable to remove channel (%d) for parent VSI(%d)\n", 5530 ch->seid, p_vsi->seid); 5531 kfree(ch); 5532 } 5533 INIT_LIST_HEAD(&vsi->ch_list); 5534 } 5535 5536 /** 5537 * i40e_is_any_channel - channel exist or not 5538 * @vsi: ptr to VSI to which channels are associated with 5539 * 5540 * Returns true or false if channel(s) exist for associated VSI or not 5541 **/ 5542 static bool i40e_is_any_channel(struct i40e_vsi *vsi) 5543 { 5544 struct i40e_channel *ch, *ch_tmp; 5545 5546 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) { 5547 if (ch->initialized) 5548 return true; 5549 } 5550 5551 return false; 5552 } 5553 5554 /** 5555 * i40e_get_max_queues_for_channel 5556 * @vsi: ptr to VSI to which channels are associated with 5557 * 5558 * Helper function which returns max value among the queue counts set on the 5559 * channels/TCs created. 5560 **/ 5561 static int i40e_get_max_queues_for_channel(struct i40e_vsi *vsi) 5562 { 5563 struct i40e_channel *ch, *ch_tmp; 5564 int max = 0; 5565 5566 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) { 5567 if (!ch->initialized) 5568 continue; 5569 if (ch->num_queue_pairs > max) 5570 max = ch->num_queue_pairs; 5571 } 5572 5573 return max; 5574 } 5575 5576 /** 5577 * i40e_validate_num_queues - validate num_queues w.r.t channel 5578 * @pf: ptr to PF device 5579 * @num_queues: number of queues 5580 * @vsi: the parent VSI 5581 * @reconfig_rss: indicates should the RSS be reconfigured or not 5582 * 5583 * This function validates number of queues in the context of new channel 5584 * which is being established and determines if RSS should be reconfigured 5585 * or not for parent VSI. 5586 **/ 5587 static int i40e_validate_num_queues(struct i40e_pf *pf, int num_queues, 5588 struct i40e_vsi *vsi, bool *reconfig_rss) 5589 { 5590 int max_ch_queues; 5591 5592 if (!reconfig_rss) 5593 return -EINVAL; 5594 5595 *reconfig_rss = false; 5596 5597 if (num_queues > I40E_MAX_QUEUES_PER_CH) { 5598 dev_err(&pf->pdev->dev, 5599 "Failed to create VMDq VSI. User requested num_queues (%d) > I40E_MAX_QUEUES_PER_VSI (%u)\n", 5600 num_queues, I40E_MAX_QUEUES_PER_CH); 5601 return -EINVAL; 5602 } 5603 5604 if (vsi->current_rss_size) { 5605 if (num_queues > vsi->current_rss_size) { 5606 dev_dbg(&pf->pdev->dev, 5607 "Error: num_queues (%d) > vsi's current_size(%d)\n", 5608 num_queues, vsi->current_rss_size); 5609 return -EINVAL; 5610 } else if ((num_queues < vsi->current_rss_size) && 5611 (!is_power_of_2(num_queues))) { 5612 dev_dbg(&pf->pdev->dev, 5613 "Error: num_queues (%d) < vsi's current_size(%d), but not power of 2\n", 5614 num_queues, vsi->current_rss_size); 5615 return -EINVAL; 5616 } 5617 } 5618 5619 if (!is_power_of_2(num_queues)) { 5620 /* Find the max num_queues configured for channel if channel 5621 * exist. 5622 * if channel exist, then enforce 'num_queues' to be more than 5623 * max ever queues configured for channel. 5624 */ 5625 max_ch_queues = i40e_get_max_queues_for_channel(vsi); 5626 if (num_queues < max_ch_queues) { 5627 dev_dbg(&pf->pdev->dev, 5628 "Error: num_queues (%d) < max queues configured for channel(%d)\n", 5629 num_queues, max_ch_queues); 5630 return -EINVAL; 5631 } 5632 *reconfig_rss = true; 5633 } 5634 5635 return 0; 5636 } 5637 5638 /** 5639 * i40e_vsi_reconfig_rss - reconfig RSS based on specified rss_size 5640 * @vsi: the VSI being setup 5641 * @rss_size: size of RSS, accordingly LUT gets reprogrammed 5642 * 5643 * This function reconfigures RSS by reprogramming LUTs using 'rss_size' 5644 **/ 5645 static int i40e_vsi_reconfig_rss(struct i40e_vsi *vsi, u16 rss_size) 5646 { 5647 struct i40e_pf *pf = vsi->back; 5648 u8 seed[I40E_HKEY_ARRAY_SIZE]; 5649 struct i40e_hw *hw = &pf->hw; 5650 int local_rss_size; 5651 u8 *lut; 5652 int ret; 5653 5654 if (!vsi->rss_size) 5655 return -EINVAL; 5656 5657 if (rss_size > vsi->rss_size) 5658 return -EINVAL; 5659 5660 local_rss_size = min_t(int, vsi->rss_size, rss_size); 5661 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL); 5662 if (!lut) 5663 return -ENOMEM; 5664 5665 /* Ignoring user configured lut if there is one */ 5666 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, local_rss_size); 5667 5668 /* Use user configured hash key if there is one, otherwise 5669 * use default. 5670 */ 5671 if (vsi->rss_hkey_user) 5672 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE); 5673 else 5674 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE); 5675 5676 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size); 5677 if (ret) { 5678 dev_info(&pf->pdev->dev, 5679 "Cannot set RSS lut, err %s aq_err %s\n", 5680 i40e_stat_str(hw, ret), 5681 i40e_aq_str(hw, hw->aq.asq_last_status)); 5682 kfree(lut); 5683 return ret; 5684 } 5685 kfree(lut); 5686 5687 /* Do the update w.r.t. storing rss_size */ 5688 if (!vsi->orig_rss_size) 5689 vsi->orig_rss_size = vsi->rss_size; 5690 vsi->current_rss_size = local_rss_size; 5691 5692 return ret; 5693 } 5694 5695 /** 5696 * i40e_channel_setup_queue_map - Setup a channel queue map 5697 * @pf: ptr to PF device 5698 * @vsi: the VSI being setup 5699 * @ctxt: VSI context structure 5700 * @ch: ptr to channel structure 5701 * 5702 * Setup queue map for a specific channel 5703 **/ 5704 static void i40e_channel_setup_queue_map(struct i40e_pf *pf, 5705 struct i40e_vsi_context *ctxt, 5706 struct i40e_channel *ch) 5707 { 5708 u16 qcount, qmap, sections = 0; 5709 u8 offset = 0; 5710 int pow; 5711 5712 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID; 5713 sections |= I40E_AQ_VSI_PROP_SCHED_VALID; 5714 5715 qcount = min_t(int, ch->num_queue_pairs, pf->num_lan_msix); 5716 ch->num_queue_pairs = qcount; 5717 5718 /* find the next higher power-of-2 of num queue pairs */ 5719 pow = ilog2(qcount); 5720 if (!is_power_of_2(qcount)) 5721 pow++; 5722 5723 qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) | 5724 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT); 5725 5726 /* Setup queue TC[0].qmap for given VSI context */ 5727 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap); 5728 5729 ctxt->info.up_enable_bits = 0x1; /* TC0 enabled */ 5730 ctxt->info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG); 5731 ctxt->info.queue_mapping[0] = cpu_to_le16(ch->base_queue); 5732 ctxt->info.valid_sections |= cpu_to_le16(sections); 5733 } 5734 5735 /** 5736 * i40e_add_channel - add a channel by adding VSI 5737 * @pf: ptr to PF device 5738 * @uplink_seid: underlying HW switching element (VEB) ID 5739 * @ch: ptr to channel structure 5740 * 5741 * Add a channel (VSI) using add_vsi and queue_map 5742 **/ 5743 static int i40e_add_channel(struct i40e_pf *pf, u16 uplink_seid, 5744 struct i40e_channel *ch) 5745 { 5746 struct i40e_hw *hw = &pf->hw; 5747 struct i40e_vsi_context ctxt; 5748 u8 enabled_tc = 0x1; /* TC0 enabled */ 5749 int ret; 5750 5751 if (ch->type != I40E_VSI_VMDQ2) { 5752 dev_info(&pf->pdev->dev, 5753 "add new vsi failed, ch->type %d\n", ch->type); 5754 return -EINVAL; 5755 } 5756 5757 memset(&ctxt, 0, sizeof(ctxt)); 5758 ctxt.pf_num = hw->pf_id; 5759 ctxt.vf_num = 0; 5760 ctxt.uplink_seid = uplink_seid; 5761 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL; 5762 if (ch->type == I40E_VSI_VMDQ2) 5763 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2; 5764 5765 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED) { 5766 ctxt.info.valid_sections |= 5767 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 5768 ctxt.info.switch_id = 5769 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 5770 } 5771 5772 /* Set queue map for a given VSI context */ 5773 i40e_channel_setup_queue_map(pf, &ctxt, ch); 5774 5775 /* Now time to create VSI */ 5776 ret = i40e_aq_add_vsi(hw, &ctxt, NULL); 5777 if (ret) { 5778 dev_info(&pf->pdev->dev, 5779 "add new vsi failed, err %s aq_err %s\n", 5780 i40e_stat_str(&pf->hw, ret), 5781 i40e_aq_str(&pf->hw, 5782 pf->hw.aq.asq_last_status)); 5783 return -ENOENT; 5784 } 5785 5786 /* Success, update channel */ 5787 ch->enabled_tc = enabled_tc; 5788 ch->seid = ctxt.seid; 5789 ch->vsi_number = ctxt.vsi_number; 5790 ch->stat_counter_idx = cpu_to_le16(ctxt.info.stat_counter_idx); 5791 5792 /* copy just the sections touched not the entire info 5793 * since not all sections are valid as returned by 5794 * update vsi params 5795 */ 5796 ch->info.mapping_flags = ctxt.info.mapping_flags; 5797 memcpy(&ch->info.queue_mapping, 5798 &ctxt.info.queue_mapping, sizeof(ctxt.info.queue_mapping)); 5799 memcpy(&ch->info.tc_mapping, ctxt.info.tc_mapping, 5800 sizeof(ctxt.info.tc_mapping)); 5801 5802 return 0; 5803 } 5804 5805 static int i40e_channel_config_bw(struct i40e_vsi *vsi, struct i40e_channel *ch, 5806 u8 *bw_share) 5807 { 5808 struct i40e_aqc_configure_vsi_tc_bw_data bw_data; 5809 i40e_status ret; 5810 int i; 5811 5812 bw_data.tc_valid_bits = ch->enabled_tc; 5813 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 5814 bw_data.tc_bw_credits[i] = bw_share[i]; 5815 5816 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, ch->seid, 5817 &bw_data, NULL); 5818 if (ret) { 5819 dev_info(&vsi->back->pdev->dev, 5820 "Config VSI BW allocation per TC failed, aq_err: %d for new_vsi->seid %u\n", 5821 vsi->back->hw.aq.asq_last_status, ch->seid); 5822 return -EINVAL; 5823 } 5824 5825 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 5826 ch->info.qs_handle[i] = bw_data.qs_handles[i]; 5827 5828 return 0; 5829 } 5830 5831 /** 5832 * i40e_channel_config_tx_ring - config TX ring associated with new channel 5833 * @pf: ptr to PF device 5834 * @vsi: the VSI being setup 5835 * @ch: ptr to channel structure 5836 * 5837 * Configure TX rings associated with channel (VSI) since queues are being 5838 * from parent VSI. 5839 **/ 5840 static int i40e_channel_config_tx_ring(struct i40e_pf *pf, 5841 struct i40e_vsi *vsi, 5842 struct i40e_channel *ch) 5843 { 5844 i40e_status ret; 5845 int i; 5846 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0}; 5847 5848 /* Enable ETS TCs with equal BW Share for now across all VSIs */ 5849 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 5850 if (ch->enabled_tc & BIT(i)) 5851 bw_share[i] = 1; 5852 } 5853 5854 /* configure BW for new VSI */ 5855 ret = i40e_channel_config_bw(vsi, ch, bw_share); 5856 if (ret) { 5857 dev_info(&vsi->back->pdev->dev, 5858 "Failed configuring TC map %d for channel (seid %u)\n", 5859 ch->enabled_tc, ch->seid); 5860 return ret; 5861 } 5862 5863 for (i = 0; i < ch->num_queue_pairs; i++) { 5864 struct i40e_ring *tx_ring, *rx_ring; 5865 u16 pf_q; 5866 5867 pf_q = ch->base_queue + i; 5868 5869 /* Get to TX ring ptr of main VSI, for re-setup TX queue 5870 * context 5871 */ 5872 tx_ring = vsi->tx_rings[pf_q]; 5873 tx_ring->ch = ch; 5874 5875 /* Get the RX ring ptr */ 5876 rx_ring = vsi->rx_rings[pf_q]; 5877 rx_ring->ch = ch; 5878 } 5879 5880 return 0; 5881 } 5882 5883 /** 5884 * i40e_setup_hw_channel - setup new channel 5885 * @pf: ptr to PF device 5886 * @vsi: the VSI being setup 5887 * @ch: ptr to channel structure 5888 * @uplink_seid: underlying HW switching element (VEB) ID 5889 * @type: type of channel to be created (VMDq2/VF) 5890 * 5891 * Setup new channel (VSI) based on specified type (VMDq2/VF) 5892 * and configures TX rings accordingly 5893 **/ 5894 static inline int i40e_setup_hw_channel(struct i40e_pf *pf, 5895 struct i40e_vsi *vsi, 5896 struct i40e_channel *ch, 5897 u16 uplink_seid, u8 type) 5898 { 5899 int ret; 5900 5901 ch->initialized = false; 5902 ch->base_queue = vsi->next_base_queue; 5903 ch->type = type; 5904 5905 /* Proceed with creation of channel (VMDq2) VSI */ 5906 ret = i40e_add_channel(pf, uplink_seid, ch); 5907 if (ret) { 5908 dev_info(&pf->pdev->dev, 5909 "failed to add_channel using uplink_seid %u\n", 5910 uplink_seid); 5911 return ret; 5912 } 5913 5914 /* Mark the successful creation of channel */ 5915 ch->initialized = true; 5916 5917 /* Reconfigure TX queues using QTX_CTL register */ 5918 ret = i40e_channel_config_tx_ring(pf, vsi, ch); 5919 if (ret) { 5920 dev_info(&pf->pdev->dev, 5921 "failed to configure TX rings for channel %u\n", 5922 ch->seid); 5923 return ret; 5924 } 5925 5926 /* update 'next_base_queue' */ 5927 vsi->next_base_queue = vsi->next_base_queue + ch->num_queue_pairs; 5928 dev_dbg(&pf->pdev->dev, 5929 "Added channel: vsi_seid %u, vsi_number %u, stat_counter_idx %u, num_queue_pairs %u, pf->next_base_queue %d\n", 5930 ch->seid, ch->vsi_number, ch->stat_counter_idx, 5931 ch->num_queue_pairs, 5932 vsi->next_base_queue); 5933 return ret; 5934 } 5935 5936 /** 5937 * i40e_setup_channel - setup new channel using uplink element 5938 * @pf: ptr to PF device 5939 * @type: type of channel to be created (VMDq2/VF) 5940 * @uplink_seid: underlying HW switching element (VEB) ID 5941 * @ch: ptr to channel structure 5942 * 5943 * Setup new channel (VSI) based on specified type (VMDq2/VF) 5944 * and uplink switching element (uplink_seid) 5945 **/ 5946 static bool i40e_setup_channel(struct i40e_pf *pf, struct i40e_vsi *vsi, 5947 struct i40e_channel *ch) 5948 { 5949 u8 vsi_type; 5950 u16 seid; 5951 int ret; 5952 5953 if (vsi->type == I40E_VSI_MAIN) { 5954 vsi_type = I40E_VSI_VMDQ2; 5955 } else { 5956 dev_err(&pf->pdev->dev, "unsupported parent vsi type(%d)\n", 5957 vsi->type); 5958 return false; 5959 } 5960 5961 /* underlying switching element */ 5962 seid = pf->vsi[pf->lan_vsi]->uplink_seid; 5963 5964 /* create channel (VSI), configure TX rings */ 5965 ret = i40e_setup_hw_channel(pf, vsi, ch, seid, vsi_type); 5966 if (ret) { 5967 dev_err(&pf->pdev->dev, "failed to setup hw_channel\n"); 5968 return false; 5969 } 5970 5971 return ch->initialized ? true : false; 5972 } 5973 5974 /** 5975 * i40e_create_queue_channel - function to create channel 5976 * @vsi: VSI to be configured 5977 * @ch: ptr to channel (it contains channel specific params) 5978 * 5979 * This function creates channel (VSI) using num_queues specified by user, 5980 * reconfigs RSS if needed. 5981 **/ 5982 int i40e_create_queue_channel(struct i40e_vsi *vsi, 5983 struct i40e_channel *ch) 5984 { 5985 struct i40e_pf *pf = vsi->back; 5986 bool reconfig_rss; 5987 int err; 5988 5989 if (!ch) 5990 return -EINVAL; 5991 5992 if (!ch->num_queue_pairs) { 5993 dev_err(&pf->pdev->dev, "Invalid num_queues requested: %d\n", 5994 ch->num_queue_pairs); 5995 return -EINVAL; 5996 } 5997 5998 /* validate user requested num_queues for channel */ 5999 err = i40e_validate_num_queues(pf, ch->num_queue_pairs, vsi, 6000 &reconfig_rss); 6001 if (err) { 6002 dev_info(&pf->pdev->dev, "Failed to validate num_queues (%d)\n", 6003 ch->num_queue_pairs); 6004 return -EINVAL; 6005 } 6006 6007 /* By default we are in VEPA mode, if this is the first VF/VMDq 6008 * VSI to be added switch to VEB mode. 6009 */ 6010 if ((!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) || 6011 (!i40e_is_any_channel(vsi))) { 6012 if (!is_power_of_2(vsi->tc_config.tc_info[0].qcount)) { 6013 dev_dbg(&pf->pdev->dev, 6014 "Failed to create channel. Override queues (%u) not power of 2\n", 6015 vsi->tc_config.tc_info[0].qcount); 6016 return -EINVAL; 6017 } 6018 6019 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) { 6020 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED; 6021 6022 if (vsi->type == I40E_VSI_MAIN) { 6023 if (pf->flags & I40E_FLAG_TC_MQPRIO) 6024 i40e_do_reset(pf, I40E_PF_RESET_FLAG, 6025 true); 6026 else 6027 i40e_do_reset_safe(pf, 6028 I40E_PF_RESET_FLAG); 6029 } 6030 } 6031 /* now onwards for main VSI, number of queues will be value 6032 * of TC0's queue count 6033 */ 6034 } 6035 6036 /* By this time, vsi->cnt_q_avail shall be set to non-zero and 6037 * it should be more than num_queues 6038 */ 6039 if (!vsi->cnt_q_avail || vsi->cnt_q_avail < ch->num_queue_pairs) { 6040 dev_dbg(&pf->pdev->dev, 6041 "Error: cnt_q_avail (%u) less than num_queues %d\n", 6042 vsi->cnt_q_avail, ch->num_queue_pairs); 6043 return -EINVAL; 6044 } 6045 6046 /* reconfig_rss only if vsi type is MAIN_VSI */ 6047 if (reconfig_rss && (vsi->type == I40E_VSI_MAIN)) { 6048 err = i40e_vsi_reconfig_rss(vsi, ch->num_queue_pairs); 6049 if (err) { 6050 dev_info(&pf->pdev->dev, 6051 "Error: unable to reconfig rss for num_queues (%u)\n", 6052 ch->num_queue_pairs); 6053 return -EINVAL; 6054 } 6055 } 6056 6057 if (!i40e_setup_channel(pf, vsi, ch)) { 6058 dev_info(&pf->pdev->dev, "Failed to setup channel\n"); 6059 return -EINVAL; 6060 } 6061 6062 dev_info(&pf->pdev->dev, 6063 "Setup channel (id:%u) utilizing num_queues %d\n", 6064 ch->seid, ch->num_queue_pairs); 6065 6066 /* configure VSI for BW limit */ 6067 if (ch->max_tx_rate) { 6068 u64 credits = ch->max_tx_rate; 6069 6070 if (i40e_set_bw_limit(vsi, ch->seid, ch->max_tx_rate)) 6071 return -EINVAL; 6072 6073 do_div(credits, I40E_BW_CREDIT_DIVISOR); 6074 dev_dbg(&pf->pdev->dev, 6075 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n", 6076 ch->max_tx_rate, 6077 credits, 6078 ch->seid); 6079 } 6080 6081 /* in case of VF, this will be main SRIOV VSI */ 6082 ch->parent_vsi = vsi; 6083 6084 /* and update main_vsi's count for queue_available to use */ 6085 vsi->cnt_q_avail -= ch->num_queue_pairs; 6086 6087 return 0; 6088 } 6089 6090 /** 6091 * i40e_configure_queue_channels - Add queue channel for the given TCs 6092 * @vsi: VSI to be configured 6093 * 6094 * Configures queue channel mapping to the given TCs 6095 **/ 6096 static int i40e_configure_queue_channels(struct i40e_vsi *vsi) 6097 { 6098 struct i40e_channel *ch; 6099 u64 max_rate = 0; 6100 int ret = 0, i; 6101 6102 /* Create app vsi with the TCs. Main VSI with TC0 is already set up */ 6103 for (i = 1; i < I40E_MAX_TRAFFIC_CLASS; i++) { 6104 if (vsi->tc_config.enabled_tc & BIT(i)) { 6105 ch = kzalloc(sizeof(*ch), GFP_KERNEL); 6106 if (!ch) { 6107 ret = -ENOMEM; 6108 goto err_free; 6109 } 6110 6111 INIT_LIST_HEAD(&ch->list); 6112 ch->num_queue_pairs = 6113 vsi->tc_config.tc_info[i].qcount; 6114 ch->base_queue = 6115 vsi->tc_config.tc_info[i].qoffset; 6116 6117 /* Bandwidth limit through tc interface is in bytes/s, 6118 * change to Mbit/s 6119 */ 6120 max_rate = vsi->mqprio_qopt.max_rate[i]; 6121 do_div(max_rate, I40E_BW_MBPS_DIVISOR); 6122 ch->max_tx_rate = max_rate; 6123 6124 list_add_tail(&ch->list, &vsi->ch_list); 6125 6126 ret = i40e_create_queue_channel(vsi, ch); 6127 if (ret) { 6128 dev_err(&vsi->back->pdev->dev, 6129 "Failed creating queue channel with TC%d: queues %d\n", 6130 i, ch->num_queue_pairs); 6131 goto err_free; 6132 } 6133 } 6134 } 6135 return ret; 6136 6137 err_free: 6138 i40e_remove_queue_channels(vsi); 6139 return ret; 6140 } 6141 6142 /** 6143 * i40e_veb_config_tc - Configure TCs for given VEB 6144 * @veb: given VEB 6145 * @enabled_tc: TC bitmap 6146 * 6147 * Configures given TC bitmap for VEB (switching) element 6148 **/ 6149 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc) 6150 { 6151 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0}; 6152 struct i40e_pf *pf = veb->pf; 6153 int ret = 0; 6154 int i; 6155 6156 /* No TCs or already enabled TCs just return */ 6157 if (!enabled_tc || veb->enabled_tc == enabled_tc) 6158 return ret; 6159 6160 bw_data.tc_valid_bits = enabled_tc; 6161 /* bw_data.absolute_credits is not set (relative) */ 6162 6163 /* Enable ETS TCs with equal BW Share for now */ 6164 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 6165 if (enabled_tc & BIT(i)) 6166 bw_data.tc_bw_share_credits[i] = 1; 6167 } 6168 6169 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid, 6170 &bw_data, NULL); 6171 if (ret) { 6172 dev_info(&pf->pdev->dev, 6173 "VEB bw config failed, err %s aq_err %s\n", 6174 i40e_stat_str(&pf->hw, ret), 6175 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 6176 goto out; 6177 } 6178 6179 /* Update the BW information */ 6180 ret = i40e_veb_get_bw_info(veb); 6181 if (ret) { 6182 dev_info(&pf->pdev->dev, 6183 "Failed getting veb bw config, err %s aq_err %s\n", 6184 i40e_stat_str(&pf->hw, ret), 6185 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 6186 } 6187 6188 out: 6189 return ret; 6190 } 6191 6192 #ifdef CONFIG_I40E_DCB 6193 /** 6194 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs 6195 * @pf: PF struct 6196 * 6197 * Reconfigure VEB/VSIs on a given PF; it is assumed that 6198 * the caller would've quiesce all the VSIs before calling 6199 * this function 6200 **/ 6201 static void i40e_dcb_reconfigure(struct i40e_pf *pf) 6202 { 6203 u8 tc_map = 0; 6204 int ret; 6205 u8 v; 6206 6207 /* Enable the TCs available on PF to all VEBs */ 6208 tc_map = i40e_pf_get_tc_map(pf); 6209 for (v = 0; v < I40E_MAX_VEB; v++) { 6210 if (!pf->veb[v]) 6211 continue; 6212 ret = i40e_veb_config_tc(pf->veb[v], tc_map); 6213 if (ret) { 6214 dev_info(&pf->pdev->dev, 6215 "Failed configuring TC for VEB seid=%d\n", 6216 pf->veb[v]->seid); 6217 /* Will try to configure as many components */ 6218 } 6219 } 6220 6221 /* Update each VSI */ 6222 for (v = 0; v < pf->num_alloc_vsi; v++) { 6223 if (!pf->vsi[v]) 6224 continue; 6225 6226 /* - Enable all TCs for the LAN VSI 6227 * - For all others keep them at TC0 for now 6228 */ 6229 if (v == pf->lan_vsi) 6230 tc_map = i40e_pf_get_tc_map(pf); 6231 else 6232 tc_map = I40E_DEFAULT_TRAFFIC_CLASS; 6233 6234 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map); 6235 if (ret) { 6236 dev_info(&pf->pdev->dev, 6237 "Failed configuring TC for VSI seid=%d\n", 6238 pf->vsi[v]->seid); 6239 /* Will try to configure as many components */ 6240 } else { 6241 /* Re-configure VSI vectors based on updated TC map */ 6242 i40e_vsi_map_rings_to_vectors(pf->vsi[v]); 6243 if (pf->vsi[v]->netdev) 6244 i40e_dcbnl_set_all(pf->vsi[v]); 6245 } 6246 } 6247 } 6248 6249 /** 6250 * i40e_resume_port_tx - Resume port Tx 6251 * @pf: PF struct 6252 * 6253 * Resume a port's Tx and issue a PF reset in case of failure to 6254 * resume. 6255 **/ 6256 static int i40e_resume_port_tx(struct i40e_pf *pf) 6257 { 6258 struct i40e_hw *hw = &pf->hw; 6259 int ret; 6260 6261 ret = i40e_aq_resume_port_tx(hw, NULL); 6262 if (ret) { 6263 dev_info(&pf->pdev->dev, 6264 "Resume Port Tx failed, err %s aq_err %s\n", 6265 i40e_stat_str(&pf->hw, ret), 6266 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 6267 /* Schedule PF reset to recover */ 6268 set_bit(__I40E_PF_RESET_REQUESTED, pf->state); 6269 i40e_service_event_schedule(pf); 6270 } 6271 6272 return ret; 6273 } 6274 6275 /** 6276 * i40e_init_pf_dcb - Initialize DCB configuration 6277 * @pf: PF being configured 6278 * 6279 * Query the current DCB configuration and cache it 6280 * in the hardware structure 6281 **/ 6282 static int i40e_init_pf_dcb(struct i40e_pf *pf) 6283 { 6284 struct i40e_hw *hw = &pf->hw; 6285 int err = 0; 6286 6287 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */ 6288 if (pf->hw_features & I40E_HW_NO_DCB_SUPPORT) 6289 goto out; 6290 6291 /* Get the initial DCB configuration */ 6292 err = i40e_init_dcb(hw); 6293 if (!err) { 6294 /* Device/Function is not DCBX capable */ 6295 if ((!hw->func_caps.dcb) || 6296 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) { 6297 dev_info(&pf->pdev->dev, 6298 "DCBX offload is not supported or is disabled for this PF.\n"); 6299 } else { 6300 /* When status is not DISABLED then DCBX in FW */ 6301 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED | 6302 DCB_CAP_DCBX_VER_IEEE; 6303 6304 pf->flags |= I40E_FLAG_DCB_CAPABLE; 6305 /* Enable DCB tagging only when more than one TC 6306 * or explicitly disable if only one TC 6307 */ 6308 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1) 6309 pf->flags |= I40E_FLAG_DCB_ENABLED; 6310 else 6311 pf->flags &= ~I40E_FLAG_DCB_ENABLED; 6312 dev_dbg(&pf->pdev->dev, 6313 "DCBX offload is supported for this PF.\n"); 6314 } 6315 } else { 6316 dev_info(&pf->pdev->dev, 6317 "Query for DCB configuration failed, err %s aq_err %s\n", 6318 i40e_stat_str(&pf->hw, err), 6319 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 6320 } 6321 6322 out: 6323 return err; 6324 } 6325 #endif /* CONFIG_I40E_DCB */ 6326 #define SPEED_SIZE 14 6327 #define FC_SIZE 8 6328 /** 6329 * i40e_print_link_message - print link up or down 6330 * @vsi: the VSI for which link needs a message 6331 */ 6332 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup) 6333 { 6334 enum i40e_aq_link_speed new_speed; 6335 struct i40e_pf *pf = vsi->back; 6336 char *speed = "Unknown"; 6337 char *fc = "Unknown"; 6338 char *fec = ""; 6339 char *req_fec = ""; 6340 char *an = ""; 6341 6342 new_speed = pf->hw.phy.link_info.link_speed; 6343 6344 if ((vsi->current_isup == isup) && (vsi->current_speed == new_speed)) 6345 return; 6346 vsi->current_isup = isup; 6347 vsi->current_speed = new_speed; 6348 if (!isup) { 6349 netdev_info(vsi->netdev, "NIC Link is Down\n"); 6350 return; 6351 } 6352 6353 /* Warn user if link speed on NPAR enabled partition is not at 6354 * least 10GB 6355 */ 6356 if (pf->hw.func_caps.npar_enable && 6357 (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB || 6358 pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB)) 6359 netdev_warn(vsi->netdev, 6360 "The partition detected link speed that is less than 10Gbps\n"); 6361 6362 switch (pf->hw.phy.link_info.link_speed) { 6363 case I40E_LINK_SPEED_40GB: 6364 speed = "40 G"; 6365 break; 6366 case I40E_LINK_SPEED_20GB: 6367 speed = "20 G"; 6368 break; 6369 case I40E_LINK_SPEED_25GB: 6370 speed = "25 G"; 6371 break; 6372 case I40E_LINK_SPEED_10GB: 6373 speed = "10 G"; 6374 break; 6375 case I40E_LINK_SPEED_1GB: 6376 speed = "1000 M"; 6377 break; 6378 case I40E_LINK_SPEED_100MB: 6379 speed = "100 M"; 6380 break; 6381 default: 6382 break; 6383 } 6384 6385 switch (pf->hw.fc.current_mode) { 6386 case I40E_FC_FULL: 6387 fc = "RX/TX"; 6388 break; 6389 case I40E_FC_TX_PAUSE: 6390 fc = "TX"; 6391 break; 6392 case I40E_FC_RX_PAUSE: 6393 fc = "RX"; 6394 break; 6395 default: 6396 fc = "None"; 6397 break; 6398 } 6399 6400 if (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_25GB) { 6401 req_fec = ", Requested FEC: None"; 6402 fec = ", FEC: None"; 6403 an = ", Autoneg: False"; 6404 6405 if (pf->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED) 6406 an = ", Autoneg: True"; 6407 6408 if (pf->hw.phy.link_info.fec_info & 6409 I40E_AQ_CONFIG_FEC_KR_ENA) 6410 fec = ", FEC: CL74 FC-FEC/BASE-R"; 6411 else if (pf->hw.phy.link_info.fec_info & 6412 I40E_AQ_CONFIG_FEC_RS_ENA) 6413 fec = ", FEC: CL108 RS-FEC"; 6414 6415 /* 'CL108 RS-FEC' should be displayed when RS is requested, or 6416 * both RS and FC are requested 6417 */ 6418 if (vsi->back->hw.phy.link_info.req_fec_info & 6419 (I40E_AQ_REQUEST_FEC_KR | I40E_AQ_REQUEST_FEC_RS)) { 6420 if (vsi->back->hw.phy.link_info.req_fec_info & 6421 I40E_AQ_REQUEST_FEC_RS) 6422 req_fec = ", Requested FEC: CL108 RS-FEC"; 6423 else 6424 req_fec = ", Requested FEC: CL74 FC-FEC/BASE-R"; 6425 } 6426 } 6427 6428 netdev_info(vsi->netdev, "NIC Link is Up, %sbps Full Duplex%s%s%s, Flow Control: %s\n", 6429 speed, req_fec, fec, an, fc); 6430 } 6431 6432 /** 6433 * i40e_up_complete - Finish the last steps of bringing up a connection 6434 * @vsi: the VSI being configured 6435 **/ 6436 static int i40e_up_complete(struct i40e_vsi *vsi) 6437 { 6438 struct i40e_pf *pf = vsi->back; 6439 int err; 6440 6441 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 6442 i40e_vsi_configure_msix(vsi); 6443 else 6444 i40e_configure_msi_and_legacy(vsi); 6445 6446 /* start rings */ 6447 err = i40e_vsi_start_rings(vsi); 6448 if (err) 6449 return err; 6450 6451 clear_bit(__I40E_VSI_DOWN, vsi->state); 6452 i40e_napi_enable_all(vsi); 6453 i40e_vsi_enable_irq(vsi); 6454 6455 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) && 6456 (vsi->netdev)) { 6457 i40e_print_link_message(vsi, true); 6458 netif_tx_start_all_queues(vsi->netdev); 6459 netif_carrier_on(vsi->netdev); 6460 } 6461 6462 /* replay FDIR SB filters */ 6463 if (vsi->type == I40E_VSI_FDIR) { 6464 /* reset fd counters */ 6465 pf->fd_add_err = 0; 6466 pf->fd_atr_cnt = 0; 6467 i40e_fdir_filter_restore(vsi); 6468 } 6469 6470 /* On the next run of the service_task, notify any clients of the new 6471 * opened netdev 6472 */ 6473 pf->flags |= I40E_FLAG_SERVICE_CLIENT_REQUESTED; 6474 i40e_service_event_schedule(pf); 6475 6476 return 0; 6477 } 6478 6479 /** 6480 * i40e_vsi_reinit_locked - Reset the VSI 6481 * @vsi: the VSI being configured 6482 * 6483 * Rebuild the ring structs after some configuration 6484 * has changed, e.g. MTU size. 6485 **/ 6486 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi) 6487 { 6488 struct i40e_pf *pf = vsi->back; 6489 6490 WARN_ON(in_interrupt()); 6491 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) 6492 usleep_range(1000, 2000); 6493 i40e_down(vsi); 6494 6495 i40e_up(vsi); 6496 clear_bit(__I40E_CONFIG_BUSY, pf->state); 6497 } 6498 6499 /** 6500 * i40e_up - Bring the connection back up after being down 6501 * @vsi: the VSI being configured 6502 **/ 6503 int i40e_up(struct i40e_vsi *vsi) 6504 { 6505 int err; 6506 6507 err = i40e_vsi_configure(vsi); 6508 if (!err) 6509 err = i40e_up_complete(vsi); 6510 6511 return err; 6512 } 6513 6514 /** 6515 * i40e_down - Shutdown the connection processing 6516 * @vsi: the VSI being stopped 6517 **/ 6518 void i40e_down(struct i40e_vsi *vsi) 6519 { 6520 int i; 6521 6522 /* It is assumed that the caller of this function 6523 * sets the vsi->state __I40E_VSI_DOWN bit. 6524 */ 6525 if (vsi->netdev) { 6526 netif_carrier_off(vsi->netdev); 6527 netif_tx_disable(vsi->netdev); 6528 } 6529 i40e_vsi_disable_irq(vsi); 6530 i40e_vsi_stop_rings(vsi); 6531 i40e_napi_disable_all(vsi); 6532 6533 for (i = 0; i < vsi->num_queue_pairs; i++) { 6534 i40e_clean_tx_ring(vsi->tx_rings[i]); 6535 if (i40e_enabled_xdp_vsi(vsi)) 6536 i40e_clean_tx_ring(vsi->xdp_rings[i]); 6537 i40e_clean_rx_ring(vsi->rx_rings[i]); 6538 } 6539 6540 } 6541 6542 /** 6543 * i40e_validate_mqprio_qopt- validate queue mapping info 6544 * @vsi: the VSI being configured 6545 * @mqprio_qopt: queue parametrs 6546 **/ 6547 static int i40e_validate_mqprio_qopt(struct i40e_vsi *vsi, 6548 struct tc_mqprio_qopt_offload *mqprio_qopt) 6549 { 6550 u64 sum_max_rate = 0; 6551 u64 max_rate = 0; 6552 int i; 6553 6554 if (mqprio_qopt->qopt.offset[0] != 0 || 6555 mqprio_qopt->qopt.num_tc < 1 || 6556 mqprio_qopt->qopt.num_tc > I40E_MAX_TRAFFIC_CLASS) 6557 return -EINVAL; 6558 for (i = 0; ; i++) { 6559 if (!mqprio_qopt->qopt.count[i]) 6560 return -EINVAL; 6561 if (mqprio_qopt->min_rate[i]) { 6562 dev_err(&vsi->back->pdev->dev, 6563 "Invalid min tx rate (greater than 0) specified\n"); 6564 return -EINVAL; 6565 } 6566 max_rate = mqprio_qopt->max_rate[i]; 6567 do_div(max_rate, I40E_BW_MBPS_DIVISOR); 6568 sum_max_rate += max_rate; 6569 6570 if (i >= mqprio_qopt->qopt.num_tc - 1) 6571 break; 6572 if (mqprio_qopt->qopt.offset[i + 1] != 6573 (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i])) 6574 return -EINVAL; 6575 } 6576 if (vsi->num_queue_pairs < 6577 (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i])) { 6578 return -EINVAL; 6579 } 6580 if (sum_max_rate > i40e_get_link_speed(vsi)) { 6581 dev_err(&vsi->back->pdev->dev, 6582 "Invalid max tx rate specified\n"); 6583 return -EINVAL; 6584 } 6585 return 0; 6586 } 6587 6588 /** 6589 * i40e_vsi_set_default_tc_config - set default values for tc configuration 6590 * @vsi: the VSI being configured 6591 **/ 6592 static void i40e_vsi_set_default_tc_config(struct i40e_vsi *vsi) 6593 { 6594 u16 qcount; 6595 int i; 6596 6597 /* Only TC0 is enabled */ 6598 vsi->tc_config.numtc = 1; 6599 vsi->tc_config.enabled_tc = 1; 6600 qcount = min_t(int, vsi->alloc_queue_pairs, 6601 i40e_pf_get_max_q_per_tc(vsi->back)); 6602 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 6603 /* For the TC that is not enabled set the offset to to default 6604 * queue and allocate one queue for the given TC. 6605 */ 6606 vsi->tc_config.tc_info[i].qoffset = 0; 6607 if (i == 0) 6608 vsi->tc_config.tc_info[i].qcount = qcount; 6609 else 6610 vsi->tc_config.tc_info[i].qcount = 1; 6611 vsi->tc_config.tc_info[i].netdev_tc = 0; 6612 } 6613 } 6614 6615 /** 6616 * i40e_setup_tc - configure multiple traffic classes 6617 * @netdev: net device to configure 6618 * @type_data: tc offload data 6619 **/ 6620 static int i40e_setup_tc(struct net_device *netdev, void *type_data) 6621 { 6622 struct tc_mqprio_qopt_offload *mqprio_qopt = type_data; 6623 struct i40e_netdev_priv *np = netdev_priv(netdev); 6624 struct i40e_vsi *vsi = np->vsi; 6625 struct i40e_pf *pf = vsi->back; 6626 u8 enabled_tc = 0, num_tc, hw; 6627 bool need_reset = false; 6628 int ret = -EINVAL; 6629 u16 mode; 6630 int i; 6631 6632 num_tc = mqprio_qopt->qopt.num_tc; 6633 hw = mqprio_qopt->qopt.hw; 6634 mode = mqprio_qopt->mode; 6635 if (!hw) { 6636 pf->flags &= ~I40E_FLAG_TC_MQPRIO; 6637 memcpy(&vsi->mqprio_qopt, mqprio_qopt, sizeof(*mqprio_qopt)); 6638 goto config_tc; 6639 } 6640 6641 /* Check if MFP enabled */ 6642 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 6643 netdev_info(netdev, 6644 "Configuring TC not supported in MFP mode\n"); 6645 return ret; 6646 } 6647 switch (mode) { 6648 case TC_MQPRIO_MODE_DCB: 6649 pf->flags &= ~I40E_FLAG_TC_MQPRIO; 6650 6651 /* Check if DCB enabled to continue */ 6652 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) { 6653 netdev_info(netdev, 6654 "DCB is not enabled for adapter\n"); 6655 return ret; 6656 } 6657 6658 /* Check whether tc count is within enabled limit */ 6659 if (num_tc > i40e_pf_get_num_tc(pf)) { 6660 netdev_info(netdev, 6661 "TC count greater than enabled on link for adapter\n"); 6662 return ret; 6663 } 6664 break; 6665 case TC_MQPRIO_MODE_CHANNEL: 6666 if (pf->flags & I40E_FLAG_DCB_ENABLED) { 6667 netdev_info(netdev, 6668 "Full offload of TC Mqprio options is not supported when DCB is enabled\n"); 6669 return ret; 6670 } 6671 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) 6672 return ret; 6673 ret = i40e_validate_mqprio_qopt(vsi, mqprio_qopt); 6674 if (ret) 6675 return ret; 6676 memcpy(&vsi->mqprio_qopt, mqprio_qopt, 6677 sizeof(*mqprio_qopt)); 6678 pf->flags |= I40E_FLAG_TC_MQPRIO; 6679 pf->flags &= ~I40E_FLAG_DCB_ENABLED; 6680 break; 6681 default: 6682 return -EINVAL; 6683 } 6684 6685 config_tc: 6686 /* Generate TC map for number of tc requested */ 6687 for (i = 0; i < num_tc; i++) 6688 enabled_tc |= BIT(i); 6689 6690 /* Requesting same TC configuration as already enabled */ 6691 if (enabled_tc == vsi->tc_config.enabled_tc && 6692 mode != TC_MQPRIO_MODE_CHANNEL) 6693 return 0; 6694 6695 /* Quiesce VSI queues */ 6696 i40e_quiesce_vsi(vsi); 6697 6698 if (!hw && !(pf->flags & I40E_FLAG_TC_MQPRIO)) 6699 i40e_remove_queue_channels(vsi); 6700 6701 /* Configure VSI for enabled TCs */ 6702 ret = i40e_vsi_config_tc(vsi, enabled_tc); 6703 if (ret) { 6704 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n", 6705 vsi->seid); 6706 need_reset = true; 6707 goto exit; 6708 } 6709 6710 if (pf->flags & I40E_FLAG_TC_MQPRIO) { 6711 if (vsi->mqprio_qopt.max_rate[0]) { 6712 u64 max_tx_rate = vsi->mqprio_qopt.max_rate[0]; 6713 6714 do_div(max_tx_rate, I40E_BW_MBPS_DIVISOR); 6715 ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate); 6716 if (!ret) { 6717 u64 credits = max_tx_rate; 6718 6719 do_div(credits, I40E_BW_CREDIT_DIVISOR); 6720 dev_dbg(&vsi->back->pdev->dev, 6721 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n", 6722 max_tx_rate, 6723 credits, 6724 vsi->seid); 6725 } else { 6726 need_reset = true; 6727 goto exit; 6728 } 6729 } 6730 ret = i40e_configure_queue_channels(vsi); 6731 if (ret) { 6732 netdev_info(netdev, 6733 "Failed configuring queue channels\n"); 6734 need_reset = true; 6735 goto exit; 6736 } 6737 } 6738 6739 exit: 6740 /* Reset the configuration data to defaults, only TC0 is enabled */ 6741 if (need_reset) { 6742 i40e_vsi_set_default_tc_config(vsi); 6743 need_reset = false; 6744 } 6745 6746 /* Unquiesce VSI */ 6747 i40e_unquiesce_vsi(vsi); 6748 return ret; 6749 } 6750 6751 static int __i40e_setup_tc(struct net_device *netdev, enum tc_setup_type type, 6752 void *type_data) 6753 { 6754 if (type != TC_SETUP_MQPRIO) 6755 return -EOPNOTSUPP; 6756 6757 return i40e_setup_tc(netdev, type_data); 6758 } 6759 6760 /** 6761 * i40e_open - Called when a network interface is made active 6762 * @netdev: network interface device structure 6763 * 6764 * The open entry point is called when a network interface is made 6765 * active by the system (IFF_UP). At this point all resources needed 6766 * for transmit and receive operations are allocated, the interrupt 6767 * handler is registered with the OS, the netdev watchdog subtask is 6768 * enabled, and the stack is notified that the interface is ready. 6769 * 6770 * Returns 0 on success, negative value on failure 6771 **/ 6772 int i40e_open(struct net_device *netdev) 6773 { 6774 struct i40e_netdev_priv *np = netdev_priv(netdev); 6775 struct i40e_vsi *vsi = np->vsi; 6776 struct i40e_pf *pf = vsi->back; 6777 int err; 6778 6779 /* disallow open during test or if eeprom is broken */ 6780 if (test_bit(__I40E_TESTING, pf->state) || 6781 test_bit(__I40E_BAD_EEPROM, pf->state)) 6782 return -EBUSY; 6783 6784 netif_carrier_off(netdev); 6785 6786 err = i40e_vsi_open(vsi); 6787 if (err) 6788 return err; 6789 6790 /* configure global TSO hardware offload settings */ 6791 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH | 6792 TCP_FLAG_FIN) >> 16); 6793 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH | 6794 TCP_FLAG_FIN | 6795 TCP_FLAG_CWR) >> 16); 6796 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16); 6797 6798 udp_tunnel_get_rx_info(netdev); 6799 6800 return 0; 6801 } 6802 6803 /** 6804 * i40e_vsi_open - 6805 * @vsi: the VSI to open 6806 * 6807 * Finish initialization of the VSI. 6808 * 6809 * Returns 0 on success, negative value on failure 6810 * 6811 * Note: expects to be called while under rtnl_lock() 6812 **/ 6813 int i40e_vsi_open(struct i40e_vsi *vsi) 6814 { 6815 struct i40e_pf *pf = vsi->back; 6816 char int_name[I40E_INT_NAME_STR_LEN]; 6817 int err; 6818 6819 /* allocate descriptors */ 6820 err = i40e_vsi_setup_tx_resources(vsi); 6821 if (err) 6822 goto err_setup_tx; 6823 err = i40e_vsi_setup_rx_resources(vsi); 6824 if (err) 6825 goto err_setup_rx; 6826 6827 err = i40e_vsi_configure(vsi); 6828 if (err) 6829 goto err_setup_rx; 6830 6831 if (vsi->netdev) { 6832 snprintf(int_name, sizeof(int_name) - 1, "%s-%s", 6833 dev_driver_string(&pf->pdev->dev), vsi->netdev->name); 6834 err = i40e_vsi_request_irq(vsi, int_name); 6835 if (err) 6836 goto err_setup_rx; 6837 6838 /* Notify the stack of the actual queue counts. */ 6839 err = netif_set_real_num_tx_queues(vsi->netdev, 6840 vsi->num_queue_pairs); 6841 if (err) 6842 goto err_set_queues; 6843 6844 err = netif_set_real_num_rx_queues(vsi->netdev, 6845 vsi->num_queue_pairs); 6846 if (err) 6847 goto err_set_queues; 6848 6849 } else if (vsi->type == I40E_VSI_FDIR) { 6850 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir", 6851 dev_driver_string(&pf->pdev->dev), 6852 dev_name(&pf->pdev->dev)); 6853 err = i40e_vsi_request_irq(vsi, int_name); 6854 6855 } else { 6856 err = -EINVAL; 6857 goto err_setup_rx; 6858 } 6859 6860 err = i40e_up_complete(vsi); 6861 if (err) 6862 goto err_up_complete; 6863 6864 return 0; 6865 6866 err_up_complete: 6867 i40e_down(vsi); 6868 err_set_queues: 6869 i40e_vsi_free_irq(vsi); 6870 err_setup_rx: 6871 i40e_vsi_free_rx_resources(vsi); 6872 err_setup_tx: 6873 i40e_vsi_free_tx_resources(vsi); 6874 if (vsi == pf->vsi[pf->lan_vsi]) 6875 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true); 6876 6877 return err; 6878 } 6879 6880 /** 6881 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting 6882 * @pf: Pointer to PF 6883 * 6884 * This function destroys the hlist where all the Flow Director 6885 * filters were saved. 6886 **/ 6887 static void i40e_fdir_filter_exit(struct i40e_pf *pf) 6888 { 6889 struct i40e_fdir_filter *filter; 6890 struct i40e_flex_pit *pit_entry, *tmp; 6891 struct hlist_node *node2; 6892 6893 hlist_for_each_entry_safe(filter, node2, 6894 &pf->fdir_filter_list, fdir_node) { 6895 hlist_del(&filter->fdir_node); 6896 kfree(filter); 6897 } 6898 6899 list_for_each_entry_safe(pit_entry, tmp, &pf->l3_flex_pit_list, list) { 6900 list_del(&pit_entry->list); 6901 kfree(pit_entry); 6902 } 6903 INIT_LIST_HEAD(&pf->l3_flex_pit_list); 6904 6905 list_for_each_entry_safe(pit_entry, tmp, &pf->l4_flex_pit_list, list) { 6906 list_del(&pit_entry->list); 6907 kfree(pit_entry); 6908 } 6909 INIT_LIST_HEAD(&pf->l4_flex_pit_list); 6910 6911 pf->fdir_pf_active_filters = 0; 6912 pf->fd_tcp4_filter_cnt = 0; 6913 pf->fd_udp4_filter_cnt = 0; 6914 pf->fd_sctp4_filter_cnt = 0; 6915 pf->fd_ip4_filter_cnt = 0; 6916 6917 /* Reprogram the default input set for TCP/IPv4 */ 6918 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP, 6919 I40E_L3_SRC_MASK | I40E_L3_DST_MASK | 6920 I40E_L4_SRC_MASK | I40E_L4_DST_MASK); 6921 6922 /* Reprogram the default input set for UDP/IPv4 */ 6923 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_UDP, 6924 I40E_L3_SRC_MASK | I40E_L3_DST_MASK | 6925 I40E_L4_SRC_MASK | I40E_L4_DST_MASK); 6926 6927 /* Reprogram the default input set for SCTP/IPv4 */ 6928 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_SCTP, 6929 I40E_L3_SRC_MASK | I40E_L3_DST_MASK | 6930 I40E_L4_SRC_MASK | I40E_L4_DST_MASK); 6931 6932 /* Reprogram the default input set for Other/IPv4 */ 6933 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_OTHER, 6934 I40E_L3_SRC_MASK | I40E_L3_DST_MASK); 6935 } 6936 6937 /** 6938 * i40e_close - Disables a network interface 6939 * @netdev: network interface device structure 6940 * 6941 * The close entry point is called when an interface is de-activated 6942 * by the OS. The hardware is still under the driver's control, but 6943 * this netdev interface is disabled. 6944 * 6945 * Returns 0, this is not allowed to fail 6946 **/ 6947 int i40e_close(struct net_device *netdev) 6948 { 6949 struct i40e_netdev_priv *np = netdev_priv(netdev); 6950 struct i40e_vsi *vsi = np->vsi; 6951 6952 i40e_vsi_close(vsi); 6953 6954 return 0; 6955 } 6956 6957 /** 6958 * i40e_do_reset - Start a PF or Core Reset sequence 6959 * @pf: board private structure 6960 * @reset_flags: which reset is requested 6961 * @lock_acquired: indicates whether or not the lock has been acquired 6962 * before this function was called. 6963 * 6964 * The essential difference in resets is that the PF Reset 6965 * doesn't clear the packet buffers, doesn't reset the PE 6966 * firmware, and doesn't bother the other PFs on the chip. 6967 **/ 6968 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags, bool lock_acquired) 6969 { 6970 u32 val; 6971 6972 WARN_ON(in_interrupt()); 6973 6974 6975 /* do the biggest reset indicated */ 6976 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) { 6977 6978 /* Request a Global Reset 6979 * 6980 * This will start the chip's countdown to the actual full 6981 * chip reset event, and a warning interrupt to be sent 6982 * to all PFs, including the requestor. Our handler 6983 * for the warning interrupt will deal with the shutdown 6984 * and recovery of the switch setup. 6985 */ 6986 dev_dbg(&pf->pdev->dev, "GlobalR requested\n"); 6987 val = rd32(&pf->hw, I40E_GLGEN_RTRIG); 6988 val |= I40E_GLGEN_RTRIG_GLOBR_MASK; 6989 wr32(&pf->hw, I40E_GLGEN_RTRIG, val); 6990 6991 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) { 6992 6993 /* Request a Core Reset 6994 * 6995 * Same as Global Reset, except does *not* include the MAC/PHY 6996 */ 6997 dev_dbg(&pf->pdev->dev, "CoreR requested\n"); 6998 val = rd32(&pf->hw, I40E_GLGEN_RTRIG); 6999 val |= I40E_GLGEN_RTRIG_CORER_MASK; 7000 wr32(&pf->hw, I40E_GLGEN_RTRIG, val); 7001 i40e_flush(&pf->hw); 7002 7003 } else if (reset_flags & I40E_PF_RESET_FLAG) { 7004 7005 /* Request a PF Reset 7006 * 7007 * Resets only the PF-specific registers 7008 * 7009 * This goes directly to the tear-down and rebuild of 7010 * the switch, since we need to do all the recovery as 7011 * for the Core Reset. 7012 */ 7013 dev_dbg(&pf->pdev->dev, "PFR requested\n"); 7014 i40e_handle_reset_warning(pf, lock_acquired); 7015 7016 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) { 7017 int v; 7018 7019 /* Find the VSI(s) that requested a re-init */ 7020 dev_info(&pf->pdev->dev, 7021 "VSI reinit requested\n"); 7022 for (v = 0; v < pf->num_alloc_vsi; v++) { 7023 struct i40e_vsi *vsi = pf->vsi[v]; 7024 7025 if (vsi != NULL && 7026 test_and_clear_bit(__I40E_VSI_REINIT_REQUESTED, 7027 vsi->state)) 7028 i40e_vsi_reinit_locked(pf->vsi[v]); 7029 } 7030 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) { 7031 int v; 7032 7033 /* Find the VSI(s) that needs to be brought down */ 7034 dev_info(&pf->pdev->dev, "VSI down requested\n"); 7035 for (v = 0; v < pf->num_alloc_vsi; v++) { 7036 struct i40e_vsi *vsi = pf->vsi[v]; 7037 7038 if (vsi != NULL && 7039 test_and_clear_bit(__I40E_VSI_DOWN_REQUESTED, 7040 vsi->state)) { 7041 set_bit(__I40E_VSI_DOWN, vsi->state); 7042 i40e_down(vsi); 7043 } 7044 } 7045 } else { 7046 dev_info(&pf->pdev->dev, 7047 "bad reset request 0x%08x\n", reset_flags); 7048 } 7049 } 7050 7051 #ifdef CONFIG_I40E_DCB 7052 /** 7053 * i40e_dcb_need_reconfig - Check if DCB needs reconfig 7054 * @pf: board private structure 7055 * @old_cfg: current DCB config 7056 * @new_cfg: new DCB config 7057 **/ 7058 bool i40e_dcb_need_reconfig(struct i40e_pf *pf, 7059 struct i40e_dcbx_config *old_cfg, 7060 struct i40e_dcbx_config *new_cfg) 7061 { 7062 bool need_reconfig = false; 7063 7064 /* Check if ETS configuration has changed */ 7065 if (memcmp(&new_cfg->etscfg, 7066 &old_cfg->etscfg, 7067 sizeof(new_cfg->etscfg))) { 7068 /* If Priority Table has changed reconfig is needed */ 7069 if (memcmp(&new_cfg->etscfg.prioritytable, 7070 &old_cfg->etscfg.prioritytable, 7071 sizeof(new_cfg->etscfg.prioritytable))) { 7072 need_reconfig = true; 7073 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n"); 7074 } 7075 7076 if (memcmp(&new_cfg->etscfg.tcbwtable, 7077 &old_cfg->etscfg.tcbwtable, 7078 sizeof(new_cfg->etscfg.tcbwtable))) 7079 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n"); 7080 7081 if (memcmp(&new_cfg->etscfg.tsatable, 7082 &old_cfg->etscfg.tsatable, 7083 sizeof(new_cfg->etscfg.tsatable))) 7084 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n"); 7085 } 7086 7087 /* Check if PFC configuration has changed */ 7088 if (memcmp(&new_cfg->pfc, 7089 &old_cfg->pfc, 7090 sizeof(new_cfg->pfc))) { 7091 need_reconfig = true; 7092 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n"); 7093 } 7094 7095 /* Check if APP Table has changed */ 7096 if (memcmp(&new_cfg->app, 7097 &old_cfg->app, 7098 sizeof(new_cfg->app))) { 7099 need_reconfig = true; 7100 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n"); 7101 } 7102 7103 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig); 7104 return need_reconfig; 7105 } 7106 7107 /** 7108 * i40e_handle_lldp_event - Handle LLDP Change MIB event 7109 * @pf: board private structure 7110 * @e: event info posted on ARQ 7111 **/ 7112 static int i40e_handle_lldp_event(struct i40e_pf *pf, 7113 struct i40e_arq_event_info *e) 7114 { 7115 struct i40e_aqc_lldp_get_mib *mib = 7116 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw; 7117 struct i40e_hw *hw = &pf->hw; 7118 struct i40e_dcbx_config tmp_dcbx_cfg; 7119 bool need_reconfig = false; 7120 int ret = 0; 7121 u8 type; 7122 7123 /* Not DCB capable or capability disabled */ 7124 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE)) 7125 return ret; 7126 7127 /* Ignore if event is not for Nearest Bridge */ 7128 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT) 7129 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK); 7130 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type); 7131 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE) 7132 return ret; 7133 7134 /* Check MIB Type and return if event for Remote MIB update */ 7135 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK; 7136 dev_dbg(&pf->pdev->dev, 7137 "LLDP event mib type %s\n", type ? "remote" : "local"); 7138 if (type == I40E_AQ_LLDP_MIB_REMOTE) { 7139 /* Update the remote cached instance and return */ 7140 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE, 7141 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE, 7142 &hw->remote_dcbx_config); 7143 goto exit; 7144 } 7145 7146 /* Store the old configuration */ 7147 tmp_dcbx_cfg = hw->local_dcbx_config; 7148 7149 /* Reset the old DCBx configuration data */ 7150 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config)); 7151 /* Get updated DCBX data from firmware */ 7152 ret = i40e_get_dcb_config(&pf->hw); 7153 if (ret) { 7154 dev_info(&pf->pdev->dev, 7155 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n", 7156 i40e_stat_str(&pf->hw, ret), 7157 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 7158 goto exit; 7159 } 7160 7161 /* No change detected in DCBX configs */ 7162 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config, 7163 sizeof(tmp_dcbx_cfg))) { 7164 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n"); 7165 goto exit; 7166 } 7167 7168 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg, 7169 &hw->local_dcbx_config); 7170 7171 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config); 7172 7173 if (!need_reconfig) 7174 goto exit; 7175 7176 /* Enable DCB tagging only when more than one TC */ 7177 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1) 7178 pf->flags |= I40E_FLAG_DCB_ENABLED; 7179 else 7180 pf->flags &= ~I40E_FLAG_DCB_ENABLED; 7181 7182 set_bit(__I40E_PORT_SUSPENDED, pf->state); 7183 /* Reconfiguration needed quiesce all VSIs */ 7184 i40e_pf_quiesce_all_vsi(pf); 7185 7186 /* Changes in configuration update VEB/VSI */ 7187 i40e_dcb_reconfigure(pf); 7188 7189 ret = i40e_resume_port_tx(pf); 7190 7191 clear_bit(__I40E_PORT_SUSPENDED, pf->state); 7192 /* In case of error no point in resuming VSIs */ 7193 if (ret) 7194 goto exit; 7195 7196 /* Wait for the PF's queues to be disabled */ 7197 ret = i40e_pf_wait_queues_disabled(pf); 7198 if (ret) { 7199 /* Schedule PF reset to recover */ 7200 set_bit(__I40E_PF_RESET_REQUESTED, pf->state); 7201 i40e_service_event_schedule(pf); 7202 } else { 7203 i40e_pf_unquiesce_all_vsi(pf); 7204 pf->flags |= (I40E_FLAG_SERVICE_CLIENT_REQUESTED | 7205 I40E_FLAG_CLIENT_L2_CHANGE); 7206 } 7207 7208 exit: 7209 return ret; 7210 } 7211 #endif /* CONFIG_I40E_DCB */ 7212 7213 /** 7214 * i40e_do_reset_safe - Protected reset path for userland calls. 7215 * @pf: board private structure 7216 * @reset_flags: which reset is requested 7217 * 7218 **/ 7219 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags) 7220 { 7221 rtnl_lock(); 7222 i40e_do_reset(pf, reset_flags, true); 7223 rtnl_unlock(); 7224 } 7225 7226 /** 7227 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event 7228 * @pf: board private structure 7229 * @e: event info posted on ARQ 7230 * 7231 * Handler for LAN Queue Overflow Event generated by the firmware for PF 7232 * and VF queues 7233 **/ 7234 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf, 7235 struct i40e_arq_event_info *e) 7236 { 7237 struct i40e_aqc_lan_overflow *data = 7238 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw; 7239 u32 queue = le32_to_cpu(data->prtdcb_rupto); 7240 u32 qtx_ctl = le32_to_cpu(data->otx_ctl); 7241 struct i40e_hw *hw = &pf->hw; 7242 struct i40e_vf *vf; 7243 u16 vf_id; 7244 7245 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n", 7246 queue, qtx_ctl); 7247 7248 /* Queue belongs to VF, find the VF and issue VF reset */ 7249 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK) 7250 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) { 7251 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK) 7252 >> I40E_QTX_CTL_VFVM_INDX_SHIFT); 7253 vf_id -= hw->func_caps.vf_base_id; 7254 vf = &pf->vf[vf_id]; 7255 i40e_vc_notify_vf_reset(vf); 7256 /* Allow VF to process pending reset notification */ 7257 msleep(20); 7258 i40e_reset_vf(vf, false); 7259 } 7260 } 7261 7262 /** 7263 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters 7264 * @pf: board private structure 7265 **/ 7266 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf) 7267 { 7268 u32 val, fcnt_prog; 7269 7270 val = rd32(&pf->hw, I40E_PFQF_FDSTAT); 7271 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK); 7272 return fcnt_prog; 7273 } 7274 7275 /** 7276 * i40e_get_current_fd_count - Get total FD filters programmed for this PF 7277 * @pf: board private structure 7278 **/ 7279 u32 i40e_get_current_fd_count(struct i40e_pf *pf) 7280 { 7281 u32 val, fcnt_prog; 7282 7283 val = rd32(&pf->hw, I40E_PFQF_FDSTAT); 7284 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) + 7285 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >> 7286 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT); 7287 return fcnt_prog; 7288 } 7289 7290 /** 7291 * i40e_get_global_fd_count - Get total FD filters programmed on device 7292 * @pf: board private structure 7293 **/ 7294 u32 i40e_get_global_fd_count(struct i40e_pf *pf) 7295 { 7296 u32 val, fcnt_prog; 7297 7298 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0); 7299 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) + 7300 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >> 7301 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT); 7302 return fcnt_prog; 7303 } 7304 7305 /** 7306 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled 7307 * @pf: board private structure 7308 **/ 7309 void i40e_fdir_check_and_reenable(struct i40e_pf *pf) 7310 { 7311 struct i40e_fdir_filter *filter; 7312 u32 fcnt_prog, fcnt_avail; 7313 struct hlist_node *node; 7314 7315 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 7316 return; 7317 7318 /* Check if we have enough room to re-enable FDir SB capability. */ 7319 fcnt_prog = i40e_get_global_fd_count(pf); 7320 fcnt_avail = pf->fdir_pf_filter_count; 7321 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) || 7322 (pf->fd_add_err == 0) || 7323 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) { 7324 if (pf->flags & I40E_FLAG_FD_SB_AUTO_DISABLED) { 7325 pf->flags &= ~I40E_FLAG_FD_SB_AUTO_DISABLED; 7326 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) && 7327 (I40E_DEBUG_FD & pf->hw.debug_mask)) 7328 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n"); 7329 } 7330 } 7331 7332 /* We should wait for even more space before re-enabling ATR. 7333 * Additionally, we cannot enable ATR as long as we still have TCP SB 7334 * rules active. 7335 */ 7336 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) && 7337 (pf->fd_tcp4_filter_cnt == 0)) { 7338 if (pf->flags & I40E_FLAG_FD_ATR_AUTO_DISABLED) { 7339 pf->flags &= ~I40E_FLAG_FD_ATR_AUTO_DISABLED; 7340 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) && 7341 (I40E_DEBUG_FD & pf->hw.debug_mask)) 7342 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table and there are no conflicting ntuple rules\n"); 7343 } 7344 } 7345 7346 /* if hw had a problem adding a filter, delete it */ 7347 if (pf->fd_inv > 0) { 7348 hlist_for_each_entry_safe(filter, node, 7349 &pf->fdir_filter_list, fdir_node) { 7350 if (filter->fd_id == pf->fd_inv) { 7351 hlist_del(&filter->fdir_node); 7352 kfree(filter); 7353 pf->fdir_pf_active_filters--; 7354 pf->fd_inv = 0; 7355 } 7356 } 7357 } 7358 } 7359 7360 #define I40E_MIN_FD_FLUSH_INTERVAL 10 7361 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30 7362 /** 7363 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB 7364 * @pf: board private structure 7365 **/ 7366 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf) 7367 { 7368 unsigned long min_flush_time; 7369 int flush_wait_retry = 50; 7370 bool disable_atr = false; 7371 int fd_room; 7372 int reg; 7373 7374 if (!time_after(jiffies, pf->fd_flush_timestamp + 7375 (I40E_MIN_FD_FLUSH_INTERVAL * HZ))) 7376 return; 7377 7378 /* If the flush is happening too quick and we have mostly SB rules we 7379 * should not re-enable ATR for some time. 7380 */ 7381 min_flush_time = pf->fd_flush_timestamp + 7382 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ); 7383 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters; 7384 7385 if (!(time_after(jiffies, min_flush_time)) && 7386 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) { 7387 if (I40E_DEBUG_FD & pf->hw.debug_mask) 7388 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n"); 7389 disable_atr = true; 7390 } 7391 7392 pf->fd_flush_timestamp = jiffies; 7393 pf->flags |= I40E_FLAG_FD_ATR_AUTO_DISABLED; 7394 /* flush all filters */ 7395 wr32(&pf->hw, I40E_PFQF_CTL_1, 7396 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK); 7397 i40e_flush(&pf->hw); 7398 pf->fd_flush_cnt++; 7399 pf->fd_add_err = 0; 7400 do { 7401 /* Check FD flush status every 5-6msec */ 7402 usleep_range(5000, 6000); 7403 reg = rd32(&pf->hw, I40E_PFQF_CTL_1); 7404 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK)) 7405 break; 7406 } while (flush_wait_retry--); 7407 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) { 7408 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n"); 7409 } else { 7410 /* replay sideband filters */ 7411 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]); 7412 if (!disable_atr && !pf->fd_tcp4_filter_cnt) 7413 pf->flags &= ~I40E_FLAG_FD_ATR_AUTO_DISABLED; 7414 clear_bit(__I40E_FD_FLUSH_REQUESTED, pf->state); 7415 if (I40E_DEBUG_FD & pf->hw.debug_mask) 7416 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n"); 7417 } 7418 } 7419 7420 /** 7421 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed 7422 * @pf: board private structure 7423 **/ 7424 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf) 7425 { 7426 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters; 7427 } 7428 7429 /* We can see up to 256 filter programming desc in transit if the filters are 7430 * being applied really fast; before we see the first 7431 * filter miss error on Rx queue 0. Accumulating enough error messages before 7432 * reacting will make sure we don't cause flush too often. 7433 */ 7434 #define I40E_MAX_FD_PROGRAM_ERROR 256 7435 7436 /** 7437 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table 7438 * @pf: board private structure 7439 **/ 7440 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf) 7441 { 7442 7443 /* if interface is down do nothing */ 7444 if (test_bit(__I40E_DOWN, pf->state)) 7445 return; 7446 7447 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 7448 i40e_fdir_flush_and_replay(pf); 7449 7450 i40e_fdir_check_and_reenable(pf); 7451 7452 } 7453 7454 /** 7455 * i40e_vsi_link_event - notify VSI of a link event 7456 * @vsi: vsi to be notified 7457 * @link_up: link up or down 7458 **/ 7459 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up) 7460 { 7461 if (!vsi || test_bit(__I40E_VSI_DOWN, vsi->state)) 7462 return; 7463 7464 switch (vsi->type) { 7465 case I40E_VSI_MAIN: 7466 if (!vsi->netdev || !vsi->netdev_registered) 7467 break; 7468 7469 if (link_up) { 7470 netif_carrier_on(vsi->netdev); 7471 netif_tx_wake_all_queues(vsi->netdev); 7472 } else { 7473 netif_carrier_off(vsi->netdev); 7474 netif_tx_stop_all_queues(vsi->netdev); 7475 } 7476 break; 7477 7478 case I40E_VSI_SRIOV: 7479 case I40E_VSI_VMDQ2: 7480 case I40E_VSI_CTRL: 7481 case I40E_VSI_IWARP: 7482 case I40E_VSI_MIRROR: 7483 default: 7484 /* there is no notification for other VSIs */ 7485 break; 7486 } 7487 } 7488 7489 /** 7490 * i40e_veb_link_event - notify elements on the veb of a link event 7491 * @veb: veb to be notified 7492 * @link_up: link up or down 7493 **/ 7494 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up) 7495 { 7496 struct i40e_pf *pf; 7497 int i; 7498 7499 if (!veb || !veb->pf) 7500 return; 7501 pf = veb->pf; 7502 7503 /* depth first... */ 7504 for (i = 0; i < I40E_MAX_VEB; i++) 7505 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid)) 7506 i40e_veb_link_event(pf->veb[i], link_up); 7507 7508 /* ... now the local VSIs */ 7509 for (i = 0; i < pf->num_alloc_vsi; i++) 7510 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid)) 7511 i40e_vsi_link_event(pf->vsi[i], link_up); 7512 } 7513 7514 /** 7515 * i40e_link_event - Update netif_carrier status 7516 * @pf: board private structure 7517 **/ 7518 static void i40e_link_event(struct i40e_pf *pf) 7519 { 7520 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 7521 u8 new_link_speed, old_link_speed; 7522 i40e_status status; 7523 bool new_link, old_link; 7524 7525 /* save off old link status information */ 7526 pf->hw.phy.link_info_old = pf->hw.phy.link_info; 7527 7528 /* set this to force the get_link_status call to refresh state */ 7529 pf->hw.phy.get_link_info = true; 7530 7531 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP); 7532 7533 status = i40e_get_link_status(&pf->hw, &new_link); 7534 7535 /* On success, disable temp link polling */ 7536 if (status == I40E_SUCCESS) { 7537 if (pf->flags & I40E_FLAG_TEMP_LINK_POLLING) 7538 pf->flags &= ~I40E_FLAG_TEMP_LINK_POLLING; 7539 } else { 7540 /* Enable link polling temporarily until i40e_get_link_status 7541 * returns I40E_SUCCESS 7542 */ 7543 pf->flags |= I40E_FLAG_TEMP_LINK_POLLING; 7544 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n", 7545 status); 7546 return; 7547 } 7548 7549 old_link_speed = pf->hw.phy.link_info_old.link_speed; 7550 new_link_speed = pf->hw.phy.link_info.link_speed; 7551 7552 if (new_link == old_link && 7553 new_link_speed == old_link_speed && 7554 (test_bit(__I40E_VSI_DOWN, vsi->state) || 7555 new_link == netif_carrier_ok(vsi->netdev))) 7556 return; 7557 7558 i40e_print_link_message(vsi, new_link); 7559 7560 /* Notify the base of the switch tree connected to 7561 * the link. Floating VEBs are not notified. 7562 */ 7563 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb]) 7564 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link); 7565 else 7566 i40e_vsi_link_event(vsi, new_link); 7567 7568 if (pf->vf) 7569 i40e_vc_notify_link_state(pf); 7570 7571 if (pf->flags & I40E_FLAG_PTP) 7572 i40e_ptp_set_increment(pf); 7573 } 7574 7575 /** 7576 * i40e_watchdog_subtask - periodic checks not using event driven response 7577 * @pf: board private structure 7578 **/ 7579 static void i40e_watchdog_subtask(struct i40e_pf *pf) 7580 { 7581 int i; 7582 7583 /* if interface is down do nothing */ 7584 if (test_bit(__I40E_DOWN, pf->state) || 7585 test_bit(__I40E_CONFIG_BUSY, pf->state)) 7586 return; 7587 7588 /* make sure we don't do these things too often */ 7589 if (time_before(jiffies, (pf->service_timer_previous + 7590 pf->service_timer_period))) 7591 return; 7592 pf->service_timer_previous = jiffies; 7593 7594 if ((pf->flags & I40E_FLAG_LINK_POLLING_ENABLED) || 7595 (pf->flags & I40E_FLAG_TEMP_LINK_POLLING)) 7596 i40e_link_event(pf); 7597 7598 /* Update the stats for active netdevs so the network stack 7599 * can look at updated numbers whenever it cares to 7600 */ 7601 for (i = 0; i < pf->num_alloc_vsi; i++) 7602 if (pf->vsi[i] && pf->vsi[i]->netdev) 7603 i40e_update_stats(pf->vsi[i]); 7604 7605 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) { 7606 /* Update the stats for the active switching components */ 7607 for (i = 0; i < I40E_MAX_VEB; i++) 7608 if (pf->veb[i]) 7609 i40e_update_veb_stats(pf->veb[i]); 7610 } 7611 7612 i40e_ptp_rx_hang(pf); 7613 i40e_ptp_tx_hang(pf); 7614 } 7615 7616 /** 7617 * i40e_reset_subtask - Set up for resetting the device and driver 7618 * @pf: board private structure 7619 **/ 7620 static void i40e_reset_subtask(struct i40e_pf *pf) 7621 { 7622 u32 reset_flags = 0; 7623 7624 if (test_bit(__I40E_REINIT_REQUESTED, pf->state)) { 7625 reset_flags |= BIT(__I40E_REINIT_REQUESTED); 7626 clear_bit(__I40E_REINIT_REQUESTED, pf->state); 7627 } 7628 if (test_bit(__I40E_PF_RESET_REQUESTED, pf->state)) { 7629 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED); 7630 clear_bit(__I40E_PF_RESET_REQUESTED, pf->state); 7631 } 7632 if (test_bit(__I40E_CORE_RESET_REQUESTED, pf->state)) { 7633 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED); 7634 clear_bit(__I40E_CORE_RESET_REQUESTED, pf->state); 7635 } 7636 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state)) { 7637 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED); 7638 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state); 7639 } 7640 if (test_bit(__I40E_DOWN_REQUESTED, pf->state)) { 7641 reset_flags |= BIT(__I40E_DOWN_REQUESTED); 7642 clear_bit(__I40E_DOWN_REQUESTED, pf->state); 7643 } 7644 7645 /* If there's a recovery already waiting, it takes 7646 * precedence before starting a new reset sequence. 7647 */ 7648 if (test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) { 7649 i40e_prep_for_reset(pf, false); 7650 i40e_reset(pf); 7651 i40e_rebuild(pf, false, false); 7652 } 7653 7654 /* If we're already down or resetting, just bail */ 7655 if (reset_flags && 7656 !test_bit(__I40E_DOWN, pf->state) && 7657 !test_bit(__I40E_CONFIG_BUSY, pf->state)) { 7658 i40e_do_reset(pf, reset_flags, false); 7659 } 7660 } 7661 7662 /** 7663 * i40e_handle_link_event - Handle link event 7664 * @pf: board private structure 7665 * @e: event info posted on ARQ 7666 **/ 7667 static void i40e_handle_link_event(struct i40e_pf *pf, 7668 struct i40e_arq_event_info *e) 7669 { 7670 struct i40e_aqc_get_link_status *status = 7671 (struct i40e_aqc_get_link_status *)&e->desc.params.raw; 7672 7673 /* Do a new status request to re-enable LSE reporting 7674 * and load new status information into the hw struct 7675 * This completely ignores any state information 7676 * in the ARQ event info, instead choosing to always 7677 * issue the AQ update link status command. 7678 */ 7679 i40e_link_event(pf); 7680 7681 /* Check if module meets thermal requirements */ 7682 if (status->phy_type == I40E_PHY_TYPE_NOT_SUPPORTED_HIGH_TEMP) { 7683 dev_err(&pf->pdev->dev, 7684 "Rx/Tx is disabled on this device because the module does not meet thermal requirements.\n"); 7685 dev_err(&pf->pdev->dev, 7686 "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n"); 7687 } else { 7688 /* check for unqualified module, if link is down, suppress 7689 * the message if link was forced to be down. 7690 */ 7691 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) && 7692 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) && 7693 (!(status->link_info & I40E_AQ_LINK_UP)) && 7694 (!(pf->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED))) { 7695 dev_err(&pf->pdev->dev, 7696 "Rx/Tx is disabled on this device because an unsupported SFP module type was detected.\n"); 7697 dev_err(&pf->pdev->dev, 7698 "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n"); 7699 } 7700 } 7701 } 7702 7703 /** 7704 * i40e_clean_adminq_subtask - Clean the AdminQ rings 7705 * @pf: board private structure 7706 **/ 7707 static void i40e_clean_adminq_subtask(struct i40e_pf *pf) 7708 { 7709 struct i40e_arq_event_info event; 7710 struct i40e_hw *hw = &pf->hw; 7711 u16 pending, i = 0; 7712 i40e_status ret; 7713 u16 opcode; 7714 u32 oldval; 7715 u32 val; 7716 7717 /* Do not run clean AQ when PF reset fails */ 7718 if (test_bit(__I40E_RESET_FAILED, pf->state)) 7719 return; 7720 7721 /* check for error indications */ 7722 val = rd32(&pf->hw, pf->hw.aq.arq.len); 7723 oldval = val; 7724 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) { 7725 if (hw->debug_mask & I40E_DEBUG_AQ) 7726 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n"); 7727 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK; 7728 } 7729 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) { 7730 if (hw->debug_mask & I40E_DEBUG_AQ) 7731 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n"); 7732 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK; 7733 pf->arq_overflows++; 7734 } 7735 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) { 7736 if (hw->debug_mask & I40E_DEBUG_AQ) 7737 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n"); 7738 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK; 7739 } 7740 if (oldval != val) 7741 wr32(&pf->hw, pf->hw.aq.arq.len, val); 7742 7743 val = rd32(&pf->hw, pf->hw.aq.asq.len); 7744 oldval = val; 7745 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) { 7746 if (pf->hw.debug_mask & I40E_DEBUG_AQ) 7747 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n"); 7748 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK; 7749 } 7750 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) { 7751 if (pf->hw.debug_mask & I40E_DEBUG_AQ) 7752 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n"); 7753 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK; 7754 } 7755 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) { 7756 if (pf->hw.debug_mask & I40E_DEBUG_AQ) 7757 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n"); 7758 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK; 7759 } 7760 if (oldval != val) 7761 wr32(&pf->hw, pf->hw.aq.asq.len, val); 7762 7763 event.buf_len = I40E_MAX_AQ_BUF_SIZE; 7764 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL); 7765 if (!event.msg_buf) 7766 return; 7767 7768 do { 7769 ret = i40e_clean_arq_element(hw, &event, &pending); 7770 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK) 7771 break; 7772 else if (ret) { 7773 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret); 7774 break; 7775 } 7776 7777 opcode = le16_to_cpu(event.desc.opcode); 7778 switch (opcode) { 7779 7780 case i40e_aqc_opc_get_link_status: 7781 i40e_handle_link_event(pf, &event); 7782 break; 7783 case i40e_aqc_opc_send_msg_to_pf: 7784 ret = i40e_vc_process_vf_msg(pf, 7785 le16_to_cpu(event.desc.retval), 7786 le32_to_cpu(event.desc.cookie_high), 7787 le32_to_cpu(event.desc.cookie_low), 7788 event.msg_buf, 7789 event.msg_len); 7790 break; 7791 case i40e_aqc_opc_lldp_update_mib: 7792 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n"); 7793 #ifdef CONFIG_I40E_DCB 7794 rtnl_lock(); 7795 ret = i40e_handle_lldp_event(pf, &event); 7796 rtnl_unlock(); 7797 #endif /* CONFIG_I40E_DCB */ 7798 break; 7799 case i40e_aqc_opc_event_lan_overflow: 7800 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n"); 7801 i40e_handle_lan_overflow_event(pf, &event); 7802 break; 7803 case i40e_aqc_opc_send_msg_to_peer: 7804 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n"); 7805 break; 7806 case i40e_aqc_opc_nvm_erase: 7807 case i40e_aqc_opc_nvm_update: 7808 case i40e_aqc_opc_oem_post_update: 7809 i40e_debug(&pf->hw, I40E_DEBUG_NVM, 7810 "ARQ NVM operation 0x%04x completed\n", 7811 opcode); 7812 break; 7813 default: 7814 dev_info(&pf->pdev->dev, 7815 "ARQ: Unknown event 0x%04x ignored\n", 7816 opcode); 7817 break; 7818 } 7819 } while (i++ < pf->adminq_work_limit); 7820 7821 if (i < pf->adminq_work_limit) 7822 clear_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state); 7823 7824 /* re-enable Admin queue interrupt cause */ 7825 val = rd32(hw, I40E_PFINT_ICR0_ENA); 7826 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK; 7827 wr32(hw, I40E_PFINT_ICR0_ENA, val); 7828 i40e_flush(hw); 7829 7830 kfree(event.msg_buf); 7831 } 7832 7833 /** 7834 * i40e_verify_eeprom - make sure eeprom is good to use 7835 * @pf: board private structure 7836 **/ 7837 static void i40e_verify_eeprom(struct i40e_pf *pf) 7838 { 7839 int err; 7840 7841 err = i40e_diag_eeprom_test(&pf->hw); 7842 if (err) { 7843 /* retry in case of garbage read */ 7844 err = i40e_diag_eeprom_test(&pf->hw); 7845 if (err) { 7846 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n", 7847 err); 7848 set_bit(__I40E_BAD_EEPROM, pf->state); 7849 } 7850 } 7851 7852 if (!err && test_bit(__I40E_BAD_EEPROM, pf->state)) { 7853 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n"); 7854 clear_bit(__I40E_BAD_EEPROM, pf->state); 7855 } 7856 } 7857 7858 /** 7859 * i40e_enable_pf_switch_lb 7860 * @pf: pointer to the PF structure 7861 * 7862 * enable switch loop back or die - no point in a return value 7863 **/ 7864 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf) 7865 { 7866 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 7867 struct i40e_vsi_context ctxt; 7868 int ret; 7869 7870 ctxt.seid = pf->main_vsi_seid; 7871 ctxt.pf_num = pf->hw.pf_id; 7872 ctxt.vf_num = 0; 7873 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL); 7874 if (ret) { 7875 dev_info(&pf->pdev->dev, 7876 "couldn't get PF vsi config, err %s aq_err %s\n", 7877 i40e_stat_str(&pf->hw, ret), 7878 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 7879 return; 7880 } 7881 ctxt.flags = I40E_AQ_VSI_TYPE_PF; 7882 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 7883 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 7884 7885 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 7886 if (ret) { 7887 dev_info(&pf->pdev->dev, 7888 "update vsi switch failed, err %s aq_err %s\n", 7889 i40e_stat_str(&pf->hw, ret), 7890 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 7891 } 7892 } 7893 7894 /** 7895 * i40e_disable_pf_switch_lb 7896 * @pf: pointer to the PF structure 7897 * 7898 * disable switch loop back or die - no point in a return value 7899 **/ 7900 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf) 7901 { 7902 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 7903 struct i40e_vsi_context ctxt; 7904 int ret; 7905 7906 ctxt.seid = pf->main_vsi_seid; 7907 ctxt.pf_num = pf->hw.pf_id; 7908 ctxt.vf_num = 0; 7909 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL); 7910 if (ret) { 7911 dev_info(&pf->pdev->dev, 7912 "couldn't get PF vsi config, err %s aq_err %s\n", 7913 i40e_stat_str(&pf->hw, ret), 7914 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 7915 return; 7916 } 7917 ctxt.flags = I40E_AQ_VSI_TYPE_PF; 7918 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 7919 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 7920 7921 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); 7922 if (ret) { 7923 dev_info(&pf->pdev->dev, 7924 "update vsi switch failed, err %s aq_err %s\n", 7925 i40e_stat_str(&pf->hw, ret), 7926 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 7927 } 7928 } 7929 7930 /** 7931 * i40e_config_bridge_mode - Configure the HW bridge mode 7932 * @veb: pointer to the bridge instance 7933 * 7934 * Configure the loop back mode for the LAN VSI that is downlink to the 7935 * specified HW bridge instance. It is expected this function is called 7936 * when a new HW bridge is instantiated. 7937 **/ 7938 static void i40e_config_bridge_mode(struct i40e_veb *veb) 7939 { 7940 struct i40e_pf *pf = veb->pf; 7941 7942 if (pf->hw.debug_mask & I40E_DEBUG_LAN) 7943 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n", 7944 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB"); 7945 if (veb->bridge_mode & BRIDGE_MODE_VEPA) 7946 i40e_disable_pf_switch_lb(pf); 7947 else 7948 i40e_enable_pf_switch_lb(pf); 7949 } 7950 7951 /** 7952 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it 7953 * @veb: pointer to the VEB instance 7954 * 7955 * This is a recursive function that first builds the attached VSIs then 7956 * recurses in to build the next layer of VEB. We track the connections 7957 * through our own index numbers because the seid's from the HW could 7958 * change across the reset. 7959 **/ 7960 static int i40e_reconstitute_veb(struct i40e_veb *veb) 7961 { 7962 struct i40e_vsi *ctl_vsi = NULL; 7963 struct i40e_pf *pf = veb->pf; 7964 int v, veb_idx; 7965 int ret; 7966 7967 /* build VSI that owns this VEB, temporarily attached to base VEB */ 7968 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) { 7969 if (pf->vsi[v] && 7970 pf->vsi[v]->veb_idx == veb->idx && 7971 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) { 7972 ctl_vsi = pf->vsi[v]; 7973 break; 7974 } 7975 } 7976 if (!ctl_vsi) { 7977 dev_info(&pf->pdev->dev, 7978 "missing owner VSI for veb_idx %d\n", veb->idx); 7979 ret = -ENOENT; 7980 goto end_reconstitute; 7981 } 7982 if (ctl_vsi != pf->vsi[pf->lan_vsi]) 7983 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid; 7984 ret = i40e_add_vsi(ctl_vsi); 7985 if (ret) { 7986 dev_info(&pf->pdev->dev, 7987 "rebuild of veb_idx %d owner VSI failed: %d\n", 7988 veb->idx, ret); 7989 goto end_reconstitute; 7990 } 7991 i40e_vsi_reset_stats(ctl_vsi); 7992 7993 /* create the VEB in the switch and move the VSI onto the VEB */ 7994 ret = i40e_add_veb(veb, ctl_vsi); 7995 if (ret) 7996 goto end_reconstitute; 7997 7998 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED) 7999 veb->bridge_mode = BRIDGE_MODE_VEB; 8000 else 8001 veb->bridge_mode = BRIDGE_MODE_VEPA; 8002 i40e_config_bridge_mode(veb); 8003 8004 /* create the remaining VSIs attached to this VEB */ 8005 for (v = 0; v < pf->num_alloc_vsi; v++) { 8006 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi) 8007 continue; 8008 8009 if (pf->vsi[v]->veb_idx == veb->idx) { 8010 struct i40e_vsi *vsi = pf->vsi[v]; 8011 8012 vsi->uplink_seid = veb->seid; 8013 ret = i40e_add_vsi(vsi); 8014 if (ret) { 8015 dev_info(&pf->pdev->dev, 8016 "rebuild of vsi_idx %d failed: %d\n", 8017 v, ret); 8018 goto end_reconstitute; 8019 } 8020 i40e_vsi_reset_stats(vsi); 8021 } 8022 } 8023 8024 /* create any VEBs attached to this VEB - RECURSION */ 8025 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) { 8026 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) { 8027 pf->veb[veb_idx]->uplink_seid = veb->seid; 8028 ret = i40e_reconstitute_veb(pf->veb[veb_idx]); 8029 if (ret) 8030 break; 8031 } 8032 } 8033 8034 end_reconstitute: 8035 return ret; 8036 } 8037 8038 /** 8039 * i40e_get_capabilities - get info about the HW 8040 * @pf: the PF struct 8041 **/ 8042 static int i40e_get_capabilities(struct i40e_pf *pf) 8043 { 8044 struct i40e_aqc_list_capabilities_element_resp *cap_buf; 8045 u16 data_size; 8046 int buf_len; 8047 int err; 8048 8049 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp); 8050 do { 8051 cap_buf = kzalloc(buf_len, GFP_KERNEL); 8052 if (!cap_buf) 8053 return -ENOMEM; 8054 8055 /* this loads the data into the hw struct for us */ 8056 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len, 8057 &data_size, 8058 i40e_aqc_opc_list_func_capabilities, 8059 NULL); 8060 /* data loaded, buffer no longer needed */ 8061 kfree(cap_buf); 8062 8063 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) { 8064 /* retry with a larger buffer */ 8065 buf_len = data_size; 8066 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) { 8067 dev_info(&pf->pdev->dev, 8068 "capability discovery failed, err %s aq_err %s\n", 8069 i40e_stat_str(&pf->hw, err), 8070 i40e_aq_str(&pf->hw, 8071 pf->hw.aq.asq_last_status)); 8072 return -ENODEV; 8073 } 8074 } while (err); 8075 8076 if (pf->hw.debug_mask & I40E_DEBUG_USER) 8077 dev_info(&pf->pdev->dev, 8078 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n", 8079 pf->hw.pf_id, pf->hw.func_caps.num_vfs, 8080 pf->hw.func_caps.num_msix_vectors, 8081 pf->hw.func_caps.num_msix_vectors_vf, 8082 pf->hw.func_caps.fd_filters_guaranteed, 8083 pf->hw.func_caps.fd_filters_best_effort, 8084 pf->hw.func_caps.num_tx_qp, 8085 pf->hw.func_caps.num_vsis); 8086 8087 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \ 8088 + pf->hw.func_caps.num_vfs) 8089 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) { 8090 dev_info(&pf->pdev->dev, 8091 "got num_vsis %d, setting num_vsis to %d\n", 8092 pf->hw.func_caps.num_vsis, DEF_NUM_VSI); 8093 pf->hw.func_caps.num_vsis = DEF_NUM_VSI; 8094 } 8095 8096 return 0; 8097 } 8098 8099 static int i40e_vsi_clear(struct i40e_vsi *vsi); 8100 8101 /** 8102 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband 8103 * @pf: board private structure 8104 **/ 8105 static void i40e_fdir_sb_setup(struct i40e_pf *pf) 8106 { 8107 struct i40e_vsi *vsi; 8108 8109 /* quick workaround for an NVM issue that leaves a critical register 8110 * uninitialized 8111 */ 8112 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) { 8113 static const u32 hkey[] = { 8114 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36, 8115 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb, 8116 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21, 8117 0x95b3a76d}; 8118 int i; 8119 8120 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++) 8121 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]); 8122 } 8123 8124 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 8125 return; 8126 8127 /* find existing VSI and see if it needs configuring */ 8128 vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR); 8129 8130 /* create a new VSI if none exists */ 8131 if (!vsi) { 8132 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR, 8133 pf->vsi[pf->lan_vsi]->seid, 0); 8134 if (!vsi) { 8135 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n"); 8136 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; 8137 return; 8138 } 8139 } 8140 8141 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring); 8142 } 8143 8144 /** 8145 * i40e_fdir_teardown - release the Flow Director resources 8146 * @pf: board private structure 8147 **/ 8148 static void i40e_fdir_teardown(struct i40e_pf *pf) 8149 { 8150 struct i40e_vsi *vsi; 8151 8152 i40e_fdir_filter_exit(pf); 8153 vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR); 8154 if (vsi) 8155 i40e_vsi_release(vsi); 8156 } 8157 8158 /** 8159 * i40e_rebuild_channels - Rebuilds channel VSIs if they existed before reset 8160 * @vsi: PF main vsi 8161 * 8162 * Rebuilds channel VSIs if they existed before reset 8163 **/ 8164 static int i40e_rebuild_channels(struct i40e_vsi *vsi) 8165 { 8166 struct i40e_channel *ch, *ch_tmp; 8167 i40e_status ret; 8168 8169 if (list_empty(&vsi->ch_list)) 8170 return 0; 8171 8172 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) { 8173 if (!ch->initialized) 8174 break; 8175 /* Proceed with creation of channel (VMDq2) VSI */ 8176 ret = i40e_add_channel(vsi->back, vsi->uplink_seid, ch); 8177 if (ret) { 8178 dev_info(&vsi->back->pdev->dev, 8179 "failed to rebuild channels using uplink_seid %u\n", 8180 vsi->uplink_seid); 8181 return ret; 8182 } 8183 if (ch->max_tx_rate) { 8184 u64 credits = ch->max_tx_rate; 8185 8186 if (i40e_set_bw_limit(vsi, ch->seid, 8187 ch->max_tx_rate)) 8188 return -EINVAL; 8189 8190 do_div(credits, I40E_BW_CREDIT_DIVISOR); 8191 dev_dbg(&vsi->back->pdev->dev, 8192 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n", 8193 ch->max_tx_rate, 8194 credits, 8195 ch->seid); 8196 } 8197 } 8198 return 0; 8199 } 8200 8201 /** 8202 * i40e_prep_for_reset - prep for the core to reset 8203 * @pf: board private structure 8204 * @lock_acquired: indicates whether or not the lock has been acquired 8205 * before this function was called. 8206 * 8207 * Close up the VFs and other things in prep for PF Reset. 8208 **/ 8209 static void i40e_prep_for_reset(struct i40e_pf *pf, bool lock_acquired) 8210 { 8211 struct i40e_hw *hw = &pf->hw; 8212 i40e_status ret = 0; 8213 u32 v; 8214 8215 clear_bit(__I40E_RESET_INTR_RECEIVED, pf->state); 8216 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) 8217 return; 8218 if (i40e_check_asq_alive(&pf->hw)) 8219 i40e_vc_notify_reset(pf); 8220 8221 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n"); 8222 8223 /* quiesce the VSIs and their queues that are not already DOWN */ 8224 /* pf_quiesce_all_vsi modifies netdev structures -rtnl_lock needed */ 8225 if (!lock_acquired) 8226 rtnl_lock(); 8227 i40e_pf_quiesce_all_vsi(pf); 8228 if (!lock_acquired) 8229 rtnl_unlock(); 8230 8231 for (v = 0; v < pf->num_alloc_vsi; v++) { 8232 if (pf->vsi[v]) 8233 pf->vsi[v]->seid = 0; 8234 } 8235 8236 i40e_shutdown_adminq(&pf->hw); 8237 8238 /* call shutdown HMC */ 8239 if (hw->hmc.hmc_obj) { 8240 ret = i40e_shutdown_lan_hmc(hw); 8241 if (ret) 8242 dev_warn(&pf->pdev->dev, 8243 "shutdown_lan_hmc failed: %d\n", ret); 8244 } 8245 } 8246 8247 /** 8248 * i40e_send_version - update firmware with driver version 8249 * @pf: PF struct 8250 */ 8251 static void i40e_send_version(struct i40e_pf *pf) 8252 { 8253 struct i40e_driver_version dv; 8254 8255 dv.major_version = DRV_VERSION_MAJOR; 8256 dv.minor_version = DRV_VERSION_MINOR; 8257 dv.build_version = DRV_VERSION_BUILD; 8258 dv.subbuild_version = 0; 8259 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string)); 8260 i40e_aq_send_driver_version(&pf->hw, &dv, NULL); 8261 } 8262 8263 /** 8264 * i40e_get_oem_version - get OEM specific version information 8265 * @hw: pointer to the hardware structure 8266 **/ 8267 static void i40e_get_oem_version(struct i40e_hw *hw) 8268 { 8269 u16 block_offset = 0xffff; 8270 u16 block_length = 0; 8271 u16 capabilities = 0; 8272 u16 gen_snap = 0; 8273 u16 release = 0; 8274 8275 #define I40E_SR_NVM_OEM_VERSION_PTR 0x1B 8276 #define I40E_NVM_OEM_LENGTH_OFFSET 0x00 8277 #define I40E_NVM_OEM_CAPABILITIES_OFFSET 0x01 8278 #define I40E_NVM_OEM_GEN_OFFSET 0x02 8279 #define I40E_NVM_OEM_RELEASE_OFFSET 0x03 8280 #define I40E_NVM_OEM_CAPABILITIES_MASK 0x000F 8281 #define I40E_NVM_OEM_LENGTH 3 8282 8283 /* Check if pointer to OEM version block is valid. */ 8284 i40e_read_nvm_word(hw, I40E_SR_NVM_OEM_VERSION_PTR, &block_offset); 8285 if (block_offset == 0xffff) 8286 return; 8287 8288 /* Check if OEM version block has correct length. */ 8289 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_LENGTH_OFFSET, 8290 &block_length); 8291 if (block_length < I40E_NVM_OEM_LENGTH) 8292 return; 8293 8294 /* Check if OEM version format is as expected. */ 8295 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_CAPABILITIES_OFFSET, 8296 &capabilities); 8297 if ((capabilities & I40E_NVM_OEM_CAPABILITIES_MASK) != 0) 8298 return; 8299 8300 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_GEN_OFFSET, 8301 &gen_snap); 8302 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_RELEASE_OFFSET, 8303 &release); 8304 hw->nvm.oem_ver = (gen_snap << I40E_OEM_SNAP_SHIFT) | release; 8305 hw->nvm.eetrack = I40E_OEM_EETRACK_ID; 8306 } 8307 8308 /** 8309 * i40e_reset - wait for core reset to finish reset, reset pf if corer not seen 8310 * @pf: board private structure 8311 **/ 8312 static int i40e_reset(struct i40e_pf *pf) 8313 { 8314 struct i40e_hw *hw = &pf->hw; 8315 i40e_status ret; 8316 8317 ret = i40e_pf_reset(hw); 8318 if (ret) { 8319 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret); 8320 set_bit(__I40E_RESET_FAILED, pf->state); 8321 clear_bit(__I40E_RESET_RECOVERY_PENDING, pf->state); 8322 } else { 8323 pf->pfr_count++; 8324 } 8325 return ret; 8326 } 8327 8328 /** 8329 * i40e_rebuild - rebuild using a saved config 8330 * @pf: board private structure 8331 * @reinit: if the Main VSI needs to re-initialized. 8332 * @lock_acquired: indicates whether or not the lock has been acquired 8333 * before this function was called. 8334 **/ 8335 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired) 8336 { 8337 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 8338 struct i40e_hw *hw = &pf->hw; 8339 u8 set_fc_aq_fail = 0; 8340 i40e_status ret; 8341 u32 val; 8342 int v; 8343 8344 if (test_bit(__I40E_DOWN, pf->state)) 8345 goto clear_recovery; 8346 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n"); 8347 8348 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */ 8349 ret = i40e_init_adminq(&pf->hw); 8350 if (ret) { 8351 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n", 8352 i40e_stat_str(&pf->hw, ret), 8353 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 8354 goto clear_recovery; 8355 } 8356 i40e_get_oem_version(&pf->hw); 8357 8358 /* re-verify the eeprom if we just had an EMP reset */ 8359 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state)) 8360 i40e_verify_eeprom(pf); 8361 8362 i40e_clear_pxe_mode(hw); 8363 ret = i40e_get_capabilities(pf); 8364 if (ret) 8365 goto end_core_reset; 8366 8367 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp, 8368 hw->func_caps.num_rx_qp, 0, 0); 8369 if (ret) { 8370 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret); 8371 goto end_core_reset; 8372 } 8373 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY); 8374 if (ret) { 8375 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret); 8376 goto end_core_reset; 8377 } 8378 8379 #ifdef CONFIG_I40E_DCB 8380 ret = i40e_init_pf_dcb(pf); 8381 if (ret) { 8382 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret); 8383 pf->flags &= ~I40E_FLAG_DCB_CAPABLE; 8384 /* Continue without DCB enabled */ 8385 } 8386 #endif /* CONFIG_I40E_DCB */ 8387 /* do basic switch setup */ 8388 if (!lock_acquired) 8389 rtnl_lock(); 8390 ret = i40e_setup_pf_switch(pf, reinit); 8391 if (ret) 8392 goto end_unlock; 8393 8394 /* The driver only wants link up/down and module qualification 8395 * reports from firmware. Note the negative logic. 8396 */ 8397 ret = i40e_aq_set_phy_int_mask(&pf->hw, 8398 ~(I40E_AQ_EVENT_LINK_UPDOWN | 8399 I40E_AQ_EVENT_MEDIA_NA | 8400 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL); 8401 if (ret) 8402 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n", 8403 i40e_stat_str(&pf->hw, ret), 8404 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 8405 8406 /* make sure our flow control settings are restored */ 8407 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true); 8408 if (ret) 8409 dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n", 8410 i40e_stat_str(&pf->hw, ret), 8411 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 8412 8413 /* Rebuild the VSIs and VEBs that existed before reset. 8414 * They are still in our local switch element arrays, so only 8415 * need to rebuild the switch model in the HW. 8416 * 8417 * If there were VEBs but the reconstitution failed, we'll try 8418 * try to recover minimal use by getting the basic PF VSI working. 8419 */ 8420 if (vsi->uplink_seid != pf->mac_seid) { 8421 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n"); 8422 /* find the one VEB connected to the MAC, and find orphans */ 8423 for (v = 0; v < I40E_MAX_VEB; v++) { 8424 if (!pf->veb[v]) 8425 continue; 8426 8427 if (pf->veb[v]->uplink_seid == pf->mac_seid || 8428 pf->veb[v]->uplink_seid == 0) { 8429 ret = i40e_reconstitute_veb(pf->veb[v]); 8430 8431 if (!ret) 8432 continue; 8433 8434 /* If Main VEB failed, we're in deep doodoo, 8435 * so give up rebuilding the switch and set up 8436 * for minimal rebuild of PF VSI. 8437 * If orphan failed, we'll report the error 8438 * but try to keep going. 8439 */ 8440 if (pf->veb[v]->uplink_seid == pf->mac_seid) { 8441 dev_info(&pf->pdev->dev, 8442 "rebuild of switch failed: %d, will try to set up simple PF connection\n", 8443 ret); 8444 vsi->uplink_seid = pf->mac_seid; 8445 break; 8446 } else if (pf->veb[v]->uplink_seid == 0) { 8447 dev_info(&pf->pdev->dev, 8448 "rebuild of orphan VEB failed: %d\n", 8449 ret); 8450 } 8451 } 8452 } 8453 } 8454 8455 if (vsi->uplink_seid == pf->mac_seid) { 8456 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n"); 8457 /* no VEB, so rebuild only the Main VSI */ 8458 ret = i40e_add_vsi(vsi); 8459 if (ret) { 8460 dev_info(&pf->pdev->dev, 8461 "rebuild of Main VSI failed: %d\n", ret); 8462 goto end_unlock; 8463 } 8464 } 8465 8466 if (vsi->mqprio_qopt.max_rate[0]) { 8467 u64 max_tx_rate = vsi->mqprio_qopt.max_rate[0]; 8468 u64 credits = 0; 8469 8470 do_div(max_tx_rate, I40E_BW_MBPS_DIVISOR); 8471 ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate); 8472 if (ret) 8473 goto end_unlock; 8474 8475 credits = max_tx_rate; 8476 do_div(credits, I40E_BW_CREDIT_DIVISOR); 8477 dev_dbg(&vsi->back->pdev->dev, 8478 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n", 8479 max_tx_rate, 8480 credits, 8481 vsi->seid); 8482 } 8483 8484 /* PF Main VSI is rebuild by now, go ahead and rebuild channel VSIs 8485 * for this main VSI if they exist 8486 */ 8487 ret = i40e_rebuild_channels(vsi); 8488 if (ret) 8489 goto end_unlock; 8490 8491 /* Reconfigure hardware for allowing smaller MSS in the case 8492 * of TSO, so that we avoid the MDD being fired and causing 8493 * a reset in the case of small MSS+TSO. 8494 */ 8495 #define I40E_REG_MSS 0x000E64DC 8496 #define I40E_REG_MSS_MIN_MASK 0x3FF0000 8497 #define I40E_64BYTE_MSS 0x400000 8498 val = rd32(hw, I40E_REG_MSS); 8499 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) { 8500 val &= ~I40E_REG_MSS_MIN_MASK; 8501 val |= I40E_64BYTE_MSS; 8502 wr32(hw, I40E_REG_MSS, val); 8503 } 8504 8505 if (pf->hw_features & I40E_HW_RESTART_AUTONEG) { 8506 msleep(75); 8507 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL); 8508 if (ret) 8509 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n", 8510 i40e_stat_str(&pf->hw, ret), 8511 i40e_aq_str(&pf->hw, 8512 pf->hw.aq.asq_last_status)); 8513 } 8514 /* reinit the misc interrupt */ 8515 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 8516 ret = i40e_setup_misc_vector(pf); 8517 8518 /* Add a filter to drop all Flow control frames from any VSI from being 8519 * transmitted. By doing so we stop a malicious VF from sending out 8520 * PAUSE or PFC frames and potentially controlling traffic for other 8521 * PF/VF VSIs. 8522 * The FW can still send Flow control frames if enabled. 8523 */ 8524 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw, 8525 pf->main_vsi_seid); 8526 8527 /* restart the VSIs that were rebuilt and running before the reset */ 8528 i40e_pf_unquiesce_all_vsi(pf); 8529 8530 /* Release the RTNL lock before we start resetting VFs */ 8531 if (!lock_acquired) 8532 rtnl_unlock(); 8533 8534 i40e_reset_all_vfs(pf, true); 8535 8536 /* tell the firmware that we're starting */ 8537 i40e_send_version(pf); 8538 8539 /* We've already released the lock, so don't do it again */ 8540 goto end_core_reset; 8541 8542 end_unlock: 8543 if (!lock_acquired) 8544 rtnl_unlock(); 8545 end_core_reset: 8546 clear_bit(__I40E_RESET_FAILED, pf->state); 8547 clear_recovery: 8548 clear_bit(__I40E_RESET_RECOVERY_PENDING, pf->state); 8549 } 8550 8551 /** 8552 * i40e_reset_and_rebuild - reset and rebuild using a saved config 8553 * @pf: board private structure 8554 * @reinit: if the Main VSI needs to re-initialized. 8555 * @lock_acquired: indicates whether or not the lock has been acquired 8556 * before this function was called. 8557 **/ 8558 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit, 8559 bool lock_acquired) 8560 { 8561 int ret; 8562 /* Now we wait for GRST to settle out. 8563 * We don't have to delete the VEBs or VSIs from the hw switch 8564 * because the reset will make them disappear. 8565 */ 8566 ret = i40e_reset(pf); 8567 if (!ret) 8568 i40e_rebuild(pf, reinit, lock_acquired); 8569 } 8570 8571 /** 8572 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild 8573 * @pf: board private structure 8574 * 8575 * Close up the VFs and other things in prep for a Core Reset, 8576 * then get ready to rebuild the world. 8577 * @lock_acquired: indicates whether or not the lock has been acquired 8578 * before this function was called. 8579 **/ 8580 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired) 8581 { 8582 i40e_prep_for_reset(pf, lock_acquired); 8583 i40e_reset_and_rebuild(pf, false, lock_acquired); 8584 } 8585 8586 /** 8587 * i40e_handle_mdd_event 8588 * @pf: pointer to the PF structure 8589 * 8590 * Called from the MDD irq handler to identify possibly malicious vfs 8591 **/ 8592 static void i40e_handle_mdd_event(struct i40e_pf *pf) 8593 { 8594 struct i40e_hw *hw = &pf->hw; 8595 bool mdd_detected = false; 8596 bool pf_mdd_detected = false; 8597 struct i40e_vf *vf; 8598 u32 reg; 8599 int i; 8600 8601 if (!test_bit(__I40E_MDD_EVENT_PENDING, pf->state)) 8602 return; 8603 8604 /* find what triggered the MDD event */ 8605 reg = rd32(hw, I40E_GL_MDET_TX); 8606 if (reg & I40E_GL_MDET_TX_VALID_MASK) { 8607 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >> 8608 I40E_GL_MDET_TX_PF_NUM_SHIFT; 8609 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >> 8610 I40E_GL_MDET_TX_VF_NUM_SHIFT; 8611 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >> 8612 I40E_GL_MDET_TX_EVENT_SHIFT; 8613 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >> 8614 I40E_GL_MDET_TX_QUEUE_SHIFT) - 8615 pf->hw.func_caps.base_queue; 8616 if (netif_msg_tx_err(pf)) 8617 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n", 8618 event, queue, pf_num, vf_num); 8619 wr32(hw, I40E_GL_MDET_TX, 0xffffffff); 8620 mdd_detected = true; 8621 } 8622 reg = rd32(hw, I40E_GL_MDET_RX); 8623 if (reg & I40E_GL_MDET_RX_VALID_MASK) { 8624 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >> 8625 I40E_GL_MDET_RX_FUNCTION_SHIFT; 8626 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >> 8627 I40E_GL_MDET_RX_EVENT_SHIFT; 8628 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >> 8629 I40E_GL_MDET_RX_QUEUE_SHIFT) - 8630 pf->hw.func_caps.base_queue; 8631 if (netif_msg_rx_err(pf)) 8632 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n", 8633 event, queue, func); 8634 wr32(hw, I40E_GL_MDET_RX, 0xffffffff); 8635 mdd_detected = true; 8636 } 8637 8638 if (mdd_detected) { 8639 reg = rd32(hw, I40E_PF_MDET_TX); 8640 if (reg & I40E_PF_MDET_TX_VALID_MASK) { 8641 wr32(hw, I40E_PF_MDET_TX, 0xFFFF); 8642 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n"); 8643 pf_mdd_detected = true; 8644 } 8645 reg = rd32(hw, I40E_PF_MDET_RX); 8646 if (reg & I40E_PF_MDET_RX_VALID_MASK) { 8647 wr32(hw, I40E_PF_MDET_RX, 0xFFFF); 8648 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n"); 8649 pf_mdd_detected = true; 8650 } 8651 /* Queue belongs to the PF, initiate a reset */ 8652 if (pf_mdd_detected) { 8653 set_bit(__I40E_PF_RESET_REQUESTED, pf->state); 8654 i40e_service_event_schedule(pf); 8655 } 8656 } 8657 8658 /* see if one of the VFs needs its hand slapped */ 8659 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) { 8660 vf = &(pf->vf[i]); 8661 reg = rd32(hw, I40E_VP_MDET_TX(i)); 8662 if (reg & I40E_VP_MDET_TX_VALID_MASK) { 8663 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF); 8664 vf->num_mdd_events++; 8665 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n", 8666 i); 8667 } 8668 8669 reg = rd32(hw, I40E_VP_MDET_RX(i)); 8670 if (reg & I40E_VP_MDET_RX_VALID_MASK) { 8671 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF); 8672 vf->num_mdd_events++; 8673 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n", 8674 i); 8675 } 8676 8677 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) { 8678 dev_info(&pf->pdev->dev, 8679 "Too many MDD events on VF %d, disabled\n", i); 8680 dev_info(&pf->pdev->dev, 8681 "Use PF Control I/F to re-enable the VF\n"); 8682 set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states); 8683 } 8684 } 8685 8686 /* re-enable mdd interrupt cause */ 8687 clear_bit(__I40E_MDD_EVENT_PENDING, pf->state); 8688 reg = rd32(hw, I40E_PFINT_ICR0_ENA); 8689 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK; 8690 wr32(hw, I40E_PFINT_ICR0_ENA, reg); 8691 i40e_flush(hw); 8692 } 8693 8694 static const char *i40e_tunnel_name(struct i40e_udp_port_config *port) 8695 { 8696 switch (port->type) { 8697 case UDP_TUNNEL_TYPE_VXLAN: 8698 return "vxlan"; 8699 case UDP_TUNNEL_TYPE_GENEVE: 8700 return "geneve"; 8701 default: 8702 return "unknown"; 8703 } 8704 } 8705 8706 /** 8707 * i40e_sync_udp_filters - Trigger a sync event for existing UDP filters 8708 * @pf: board private structure 8709 **/ 8710 static void i40e_sync_udp_filters(struct i40e_pf *pf) 8711 { 8712 int i; 8713 8714 /* loop through and set pending bit for all active UDP filters */ 8715 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) { 8716 if (pf->udp_ports[i].port) 8717 pf->pending_udp_bitmap |= BIT_ULL(i); 8718 } 8719 8720 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC; 8721 } 8722 8723 /** 8724 * i40e_sync_udp_filters_subtask - Sync the VSI filter list with HW 8725 * @pf: board private structure 8726 **/ 8727 static void i40e_sync_udp_filters_subtask(struct i40e_pf *pf) 8728 { 8729 struct i40e_hw *hw = &pf->hw; 8730 i40e_status ret; 8731 u16 port; 8732 int i; 8733 8734 if (!(pf->flags & I40E_FLAG_UDP_FILTER_SYNC)) 8735 return; 8736 8737 pf->flags &= ~I40E_FLAG_UDP_FILTER_SYNC; 8738 8739 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) { 8740 if (pf->pending_udp_bitmap & BIT_ULL(i)) { 8741 pf->pending_udp_bitmap &= ~BIT_ULL(i); 8742 port = pf->udp_ports[i].port; 8743 if (port) 8744 ret = i40e_aq_add_udp_tunnel(hw, port, 8745 pf->udp_ports[i].type, 8746 NULL, NULL); 8747 else 8748 ret = i40e_aq_del_udp_tunnel(hw, i, NULL); 8749 8750 if (ret) { 8751 dev_info(&pf->pdev->dev, 8752 "%s %s port %d, index %d failed, err %s aq_err %s\n", 8753 i40e_tunnel_name(&pf->udp_ports[i]), 8754 port ? "add" : "delete", 8755 port, i, 8756 i40e_stat_str(&pf->hw, ret), 8757 i40e_aq_str(&pf->hw, 8758 pf->hw.aq.asq_last_status)); 8759 pf->udp_ports[i].port = 0; 8760 } 8761 } 8762 } 8763 } 8764 8765 /** 8766 * i40e_service_task - Run the driver's async subtasks 8767 * @work: pointer to work_struct containing our data 8768 **/ 8769 static void i40e_service_task(struct work_struct *work) 8770 { 8771 struct i40e_pf *pf = container_of(work, 8772 struct i40e_pf, 8773 service_task); 8774 unsigned long start_time = jiffies; 8775 8776 /* don't bother with service tasks if a reset is in progress */ 8777 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) 8778 return; 8779 8780 if (test_and_set_bit(__I40E_SERVICE_SCHED, pf->state)) 8781 return; 8782 8783 i40e_detect_recover_hung(pf); 8784 i40e_sync_filters_subtask(pf); 8785 i40e_reset_subtask(pf); 8786 i40e_handle_mdd_event(pf); 8787 i40e_vc_process_vflr_event(pf); 8788 i40e_watchdog_subtask(pf); 8789 i40e_fdir_reinit_subtask(pf); 8790 if (pf->flags & I40E_FLAG_CLIENT_RESET) { 8791 /* Client subtask will reopen next time through. */ 8792 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], true); 8793 pf->flags &= ~I40E_FLAG_CLIENT_RESET; 8794 } else { 8795 i40e_client_subtask(pf); 8796 if (pf->flags & I40E_FLAG_CLIENT_L2_CHANGE) { 8797 i40e_notify_client_of_l2_param_changes( 8798 pf->vsi[pf->lan_vsi]); 8799 pf->flags &= ~I40E_FLAG_CLIENT_L2_CHANGE; 8800 } 8801 } 8802 i40e_sync_filters_subtask(pf); 8803 i40e_sync_udp_filters_subtask(pf); 8804 i40e_clean_adminq_subtask(pf); 8805 8806 /* flush memory to make sure state is correct before next watchdog */ 8807 smp_mb__before_atomic(); 8808 clear_bit(__I40E_SERVICE_SCHED, pf->state); 8809 8810 /* If the tasks have taken longer than one timer cycle or there 8811 * is more work to be done, reschedule the service task now 8812 * rather than wait for the timer to tick again. 8813 */ 8814 if (time_after(jiffies, (start_time + pf->service_timer_period)) || 8815 test_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state) || 8816 test_bit(__I40E_MDD_EVENT_PENDING, pf->state) || 8817 test_bit(__I40E_VFLR_EVENT_PENDING, pf->state)) 8818 i40e_service_event_schedule(pf); 8819 } 8820 8821 /** 8822 * i40e_service_timer - timer callback 8823 * @data: pointer to PF struct 8824 **/ 8825 static void i40e_service_timer(struct timer_list *t) 8826 { 8827 struct i40e_pf *pf = from_timer(pf, t, service_timer); 8828 8829 mod_timer(&pf->service_timer, 8830 round_jiffies(jiffies + pf->service_timer_period)); 8831 i40e_service_event_schedule(pf); 8832 } 8833 8834 /** 8835 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI 8836 * @vsi: the VSI being configured 8837 **/ 8838 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi) 8839 { 8840 struct i40e_pf *pf = vsi->back; 8841 8842 switch (vsi->type) { 8843 case I40E_VSI_MAIN: 8844 vsi->alloc_queue_pairs = pf->num_lan_qps; 8845 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, 8846 I40E_REQ_DESCRIPTOR_MULTIPLE); 8847 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 8848 vsi->num_q_vectors = pf->num_lan_msix; 8849 else 8850 vsi->num_q_vectors = 1; 8851 8852 break; 8853 8854 case I40E_VSI_FDIR: 8855 vsi->alloc_queue_pairs = 1; 8856 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT, 8857 I40E_REQ_DESCRIPTOR_MULTIPLE); 8858 vsi->num_q_vectors = pf->num_fdsb_msix; 8859 break; 8860 8861 case I40E_VSI_VMDQ2: 8862 vsi->alloc_queue_pairs = pf->num_vmdq_qps; 8863 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, 8864 I40E_REQ_DESCRIPTOR_MULTIPLE); 8865 vsi->num_q_vectors = pf->num_vmdq_msix; 8866 break; 8867 8868 case I40E_VSI_SRIOV: 8869 vsi->alloc_queue_pairs = pf->num_vf_qps; 8870 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, 8871 I40E_REQ_DESCRIPTOR_MULTIPLE); 8872 break; 8873 8874 default: 8875 WARN_ON(1); 8876 return -ENODATA; 8877 } 8878 8879 return 0; 8880 } 8881 8882 /** 8883 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi 8884 * @vsi: VSI pointer 8885 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated. 8886 * 8887 * On error: returns error code (negative) 8888 * On success: returns 0 8889 **/ 8890 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors) 8891 { 8892 struct i40e_ring **next_rings; 8893 int size; 8894 int ret = 0; 8895 8896 /* allocate memory for both Tx, XDP Tx and Rx ring pointers */ 8897 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 8898 (i40e_enabled_xdp_vsi(vsi) ? 3 : 2); 8899 vsi->tx_rings = kzalloc(size, GFP_KERNEL); 8900 if (!vsi->tx_rings) 8901 return -ENOMEM; 8902 next_rings = vsi->tx_rings + vsi->alloc_queue_pairs; 8903 if (i40e_enabled_xdp_vsi(vsi)) { 8904 vsi->xdp_rings = next_rings; 8905 next_rings += vsi->alloc_queue_pairs; 8906 } 8907 vsi->rx_rings = next_rings; 8908 8909 if (alloc_qvectors) { 8910 /* allocate memory for q_vector pointers */ 8911 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors; 8912 vsi->q_vectors = kzalloc(size, GFP_KERNEL); 8913 if (!vsi->q_vectors) { 8914 ret = -ENOMEM; 8915 goto err_vectors; 8916 } 8917 } 8918 return ret; 8919 8920 err_vectors: 8921 kfree(vsi->tx_rings); 8922 return ret; 8923 } 8924 8925 /** 8926 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF 8927 * @pf: board private structure 8928 * @type: type of VSI 8929 * 8930 * On error: returns error code (negative) 8931 * On success: returns vsi index in PF (positive) 8932 **/ 8933 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type) 8934 { 8935 int ret = -ENODEV; 8936 struct i40e_vsi *vsi; 8937 int vsi_idx; 8938 int i; 8939 8940 /* Need to protect the allocation of the VSIs at the PF level */ 8941 mutex_lock(&pf->switch_mutex); 8942 8943 /* VSI list may be fragmented if VSI creation/destruction has 8944 * been happening. We can afford to do a quick scan to look 8945 * for any free VSIs in the list. 8946 * 8947 * find next empty vsi slot, looping back around if necessary 8948 */ 8949 i = pf->next_vsi; 8950 while (i < pf->num_alloc_vsi && pf->vsi[i]) 8951 i++; 8952 if (i >= pf->num_alloc_vsi) { 8953 i = 0; 8954 while (i < pf->next_vsi && pf->vsi[i]) 8955 i++; 8956 } 8957 8958 if (i < pf->num_alloc_vsi && !pf->vsi[i]) { 8959 vsi_idx = i; /* Found one! */ 8960 } else { 8961 ret = -ENODEV; 8962 goto unlock_pf; /* out of VSI slots! */ 8963 } 8964 pf->next_vsi = ++i; 8965 8966 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL); 8967 if (!vsi) { 8968 ret = -ENOMEM; 8969 goto unlock_pf; 8970 } 8971 vsi->type = type; 8972 vsi->back = pf; 8973 set_bit(__I40E_VSI_DOWN, vsi->state); 8974 vsi->flags = 0; 8975 vsi->idx = vsi_idx; 8976 vsi->int_rate_limit = 0; 8977 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ? 8978 pf->rss_table_size : 64; 8979 vsi->netdev_registered = false; 8980 vsi->work_limit = I40E_DEFAULT_IRQ_WORK; 8981 hash_init(vsi->mac_filter_hash); 8982 vsi->irqs_ready = false; 8983 8984 ret = i40e_set_num_rings_in_vsi(vsi); 8985 if (ret) 8986 goto err_rings; 8987 8988 ret = i40e_vsi_alloc_arrays(vsi, true); 8989 if (ret) 8990 goto err_rings; 8991 8992 /* Setup default MSIX irq handler for VSI */ 8993 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings); 8994 8995 /* Initialize VSI lock */ 8996 spin_lock_init(&vsi->mac_filter_hash_lock); 8997 pf->vsi[vsi_idx] = vsi; 8998 ret = vsi_idx; 8999 goto unlock_pf; 9000 9001 err_rings: 9002 pf->next_vsi = i - 1; 9003 kfree(vsi); 9004 unlock_pf: 9005 mutex_unlock(&pf->switch_mutex); 9006 return ret; 9007 } 9008 9009 /** 9010 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI 9011 * @type: VSI pointer 9012 * @free_qvectors: a bool to specify if q_vectors need to be freed. 9013 * 9014 * On error: returns error code (negative) 9015 * On success: returns 0 9016 **/ 9017 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors) 9018 { 9019 /* free the ring and vector containers */ 9020 if (free_qvectors) { 9021 kfree(vsi->q_vectors); 9022 vsi->q_vectors = NULL; 9023 } 9024 kfree(vsi->tx_rings); 9025 vsi->tx_rings = NULL; 9026 vsi->rx_rings = NULL; 9027 vsi->xdp_rings = NULL; 9028 } 9029 9030 /** 9031 * i40e_clear_rss_config_user - clear the user configured RSS hash keys 9032 * and lookup table 9033 * @vsi: Pointer to VSI structure 9034 */ 9035 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi) 9036 { 9037 if (!vsi) 9038 return; 9039 9040 kfree(vsi->rss_hkey_user); 9041 vsi->rss_hkey_user = NULL; 9042 9043 kfree(vsi->rss_lut_user); 9044 vsi->rss_lut_user = NULL; 9045 } 9046 9047 /** 9048 * i40e_vsi_clear - Deallocate the VSI provided 9049 * @vsi: the VSI being un-configured 9050 **/ 9051 static int i40e_vsi_clear(struct i40e_vsi *vsi) 9052 { 9053 struct i40e_pf *pf; 9054 9055 if (!vsi) 9056 return 0; 9057 9058 if (!vsi->back) 9059 goto free_vsi; 9060 pf = vsi->back; 9061 9062 mutex_lock(&pf->switch_mutex); 9063 if (!pf->vsi[vsi->idx]) { 9064 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n", 9065 vsi->idx, vsi->idx, vsi, vsi->type); 9066 goto unlock_vsi; 9067 } 9068 9069 if (pf->vsi[vsi->idx] != vsi) { 9070 dev_err(&pf->pdev->dev, 9071 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n", 9072 pf->vsi[vsi->idx]->idx, 9073 pf->vsi[vsi->idx], 9074 pf->vsi[vsi->idx]->type, 9075 vsi->idx, vsi, vsi->type); 9076 goto unlock_vsi; 9077 } 9078 9079 /* updates the PF for this cleared vsi */ 9080 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx); 9081 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx); 9082 9083 i40e_vsi_free_arrays(vsi, true); 9084 i40e_clear_rss_config_user(vsi); 9085 9086 pf->vsi[vsi->idx] = NULL; 9087 if (vsi->idx < pf->next_vsi) 9088 pf->next_vsi = vsi->idx; 9089 9090 unlock_vsi: 9091 mutex_unlock(&pf->switch_mutex); 9092 free_vsi: 9093 kfree(vsi); 9094 9095 return 0; 9096 } 9097 9098 /** 9099 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI 9100 * @vsi: the VSI being cleaned 9101 **/ 9102 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi) 9103 { 9104 int i; 9105 9106 if (vsi->tx_rings && vsi->tx_rings[0]) { 9107 for (i = 0; i < vsi->alloc_queue_pairs; i++) { 9108 kfree_rcu(vsi->tx_rings[i], rcu); 9109 vsi->tx_rings[i] = NULL; 9110 vsi->rx_rings[i] = NULL; 9111 if (vsi->xdp_rings) 9112 vsi->xdp_rings[i] = NULL; 9113 } 9114 } 9115 } 9116 9117 /** 9118 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI 9119 * @vsi: the VSI being configured 9120 **/ 9121 static int i40e_alloc_rings(struct i40e_vsi *vsi) 9122 { 9123 int i, qpv = i40e_enabled_xdp_vsi(vsi) ? 3 : 2; 9124 struct i40e_pf *pf = vsi->back; 9125 struct i40e_ring *ring; 9126 9127 /* Set basic values in the rings to be used later during open() */ 9128 for (i = 0; i < vsi->alloc_queue_pairs; i++) { 9129 /* allocate space for both Tx and Rx in one shot */ 9130 ring = kcalloc(qpv, sizeof(struct i40e_ring), GFP_KERNEL); 9131 if (!ring) 9132 goto err_out; 9133 9134 ring->queue_index = i; 9135 ring->reg_idx = vsi->base_queue + i; 9136 ring->ring_active = false; 9137 ring->vsi = vsi; 9138 ring->netdev = vsi->netdev; 9139 ring->dev = &pf->pdev->dev; 9140 ring->count = vsi->num_desc; 9141 ring->size = 0; 9142 ring->dcb_tc = 0; 9143 if (vsi->back->hw_features & I40E_HW_WB_ON_ITR_CAPABLE) 9144 ring->flags = I40E_TXR_FLAGS_WB_ON_ITR; 9145 ring->tx_itr_setting = pf->tx_itr_default; 9146 vsi->tx_rings[i] = ring++; 9147 9148 if (!i40e_enabled_xdp_vsi(vsi)) 9149 goto setup_rx; 9150 9151 ring->queue_index = vsi->alloc_queue_pairs + i; 9152 ring->reg_idx = vsi->base_queue + ring->queue_index; 9153 ring->ring_active = false; 9154 ring->vsi = vsi; 9155 ring->netdev = NULL; 9156 ring->dev = &pf->pdev->dev; 9157 ring->count = vsi->num_desc; 9158 ring->size = 0; 9159 ring->dcb_tc = 0; 9160 if (vsi->back->hw_features & I40E_HW_WB_ON_ITR_CAPABLE) 9161 ring->flags = I40E_TXR_FLAGS_WB_ON_ITR; 9162 set_ring_xdp(ring); 9163 ring->tx_itr_setting = pf->tx_itr_default; 9164 vsi->xdp_rings[i] = ring++; 9165 9166 setup_rx: 9167 ring->queue_index = i; 9168 ring->reg_idx = vsi->base_queue + i; 9169 ring->ring_active = false; 9170 ring->vsi = vsi; 9171 ring->netdev = vsi->netdev; 9172 ring->dev = &pf->pdev->dev; 9173 ring->count = vsi->num_desc; 9174 ring->size = 0; 9175 ring->dcb_tc = 0; 9176 ring->rx_itr_setting = pf->rx_itr_default; 9177 vsi->rx_rings[i] = ring; 9178 } 9179 9180 return 0; 9181 9182 err_out: 9183 i40e_vsi_clear_rings(vsi); 9184 return -ENOMEM; 9185 } 9186 9187 /** 9188 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel 9189 * @pf: board private structure 9190 * @vectors: the number of MSI-X vectors to request 9191 * 9192 * Returns the number of vectors reserved, or error 9193 **/ 9194 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors) 9195 { 9196 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries, 9197 I40E_MIN_MSIX, vectors); 9198 if (vectors < 0) { 9199 dev_info(&pf->pdev->dev, 9200 "MSI-X vector reservation failed: %d\n", vectors); 9201 vectors = 0; 9202 } 9203 9204 return vectors; 9205 } 9206 9207 /** 9208 * i40e_init_msix - Setup the MSIX capability 9209 * @pf: board private structure 9210 * 9211 * Work with the OS to set up the MSIX vectors needed. 9212 * 9213 * Returns the number of vectors reserved or negative on failure 9214 **/ 9215 static int i40e_init_msix(struct i40e_pf *pf) 9216 { 9217 struct i40e_hw *hw = &pf->hw; 9218 int cpus, extra_vectors; 9219 int vectors_left; 9220 int v_budget, i; 9221 int v_actual; 9222 int iwarp_requested = 0; 9223 9224 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) 9225 return -ENODEV; 9226 9227 /* The number of vectors we'll request will be comprised of: 9228 * - Add 1 for "other" cause for Admin Queue events, etc. 9229 * - The number of LAN queue pairs 9230 * - Queues being used for RSS. 9231 * We don't need as many as max_rss_size vectors. 9232 * use rss_size instead in the calculation since that 9233 * is governed by number of cpus in the system. 9234 * - assumes symmetric Tx/Rx pairing 9235 * - The number of VMDq pairs 9236 * - The CPU count within the NUMA node if iWARP is enabled 9237 * Once we count this up, try the request. 9238 * 9239 * If we can't get what we want, we'll simplify to nearly nothing 9240 * and try again. If that still fails, we punt. 9241 */ 9242 vectors_left = hw->func_caps.num_msix_vectors; 9243 v_budget = 0; 9244 9245 /* reserve one vector for miscellaneous handler */ 9246 if (vectors_left) { 9247 v_budget++; 9248 vectors_left--; 9249 } 9250 9251 /* reserve some vectors for the main PF traffic queues. Initially we 9252 * only reserve at most 50% of the available vectors, in the case that 9253 * the number of online CPUs is large. This ensures that we can enable 9254 * extra features as well. Once we've enabled the other features, we 9255 * will use any remaining vectors to reach as close as we can to the 9256 * number of online CPUs. 9257 */ 9258 cpus = num_online_cpus(); 9259 pf->num_lan_msix = min_t(int, cpus, vectors_left / 2); 9260 vectors_left -= pf->num_lan_msix; 9261 9262 /* reserve one vector for sideband flow director */ 9263 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { 9264 if (vectors_left) { 9265 pf->num_fdsb_msix = 1; 9266 v_budget++; 9267 vectors_left--; 9268 } else { 9269 pf->num_fdsb_msix = 0; 9270 } 9271 } 9272 9273 /* can we reserve enough for iWARP? */ 9274 if (pf->flags & I40E_FLAG_IWARP_ENABLED) { 9275 iwarp_requested = pf->num_iwarp_msix; 9276 9277 if (!vectors_left) 9278 pf->num_iwarp_msix = 0; 9279 else if (vectors_left < pf->num_iwarp_msix) 9280 pf->num_iwarp_msix = 1; 9281 v_budget += pf->num_iwarp_msix; 9282 vectors_left -= pf->num_iwarp_msix; 9283 } 9284 9285 /* any vectors left over go for VMDq support */ 9286 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) { 9287 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps; 9288 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted); 9289 9290 if (!vectors_left) { 9291 pf->num_vmdq_msix = 0; 9292 pf->num_vmdq_qps = 0; 9293 } else { 9294 /* if we're short on vectors for what's desired, we limit 9295 * the queues per vmdq. If this is still more than are 9296 * available, the user will need to change the number of 9297 * queues/vectors used by the PF later with the ethtool 9298 * channels command 9299 */ 9300 if (vmdq_vecs < vmdq_vecs_wanted) 9301 pf->num_vmdq_qps = 1; 9302 pf->num_vmdq_msix = pf->num_vmdq_qps; 9303 9304 v_budget += vmdq_vecs; 9305 vectors_left -= vmdq_vecs; 9306 } 9307 } 9308 9309 /* On systems with a large number of SMP cores, we previously limited 9310 * the number of vectors for num_lan_msix to be at most 50% of the 9311 * available vectors, to allow for other features. Now, we add back 9312 * the remaining vectors. However, we ensure that the total 9313 * num_lan_msix will not exceed num_online_cpus(). To do this, we 9314 * calculate the number of vectors we can add without going over the 9315 * cap of CPUs. For systems with a small number of CPUs this will be 9316 * zero. 9317 */ 9318 extra_vectors = min_t(int, cpus - pf->num_lan_msix, vectors_left); 9319 pf->num_lan_msix += extra_vectors; 9320 vectors_left -= extra_vectors; 9321 9322 WARN(vectors_left < 0, 9323 "Calculation of remaining vectors underflowed. This is an accounting bug when determining total MSI-X vectors.\n"); 9324 9325 v_budget += pf->num_lan_msix; 9326 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry), 9327 GFP_KERNEL); 9328 if (!pf->msix_entries) 9329 return -ENOMEM; 9330 9331 for (i = 0; i < v_budget; i++) 9332 pf->msix_entries[i].entry = i; 9333 v_actual = i40e_reserve_msix_vectors(pf, v_budget); 9334 9335 if (v_actual < I40E_MIN_MSIX) { 9336 pf->flags &= ~I40E_FLAG_MSIX_ENABLED; 9337 kfree(pf->msix_entries); 9338 pf->msix_entries = NULL; 9339 pci_disable_msix(pf->pdev); 9340 return -ENODEV; 9341 9342 } else if (v_actual == I40E_MIN_MSIX) { 9343 /* Adjust for minimal MSIX use */ 9344 pf->num_vmdq_vsis = 0; 9345 pf->num_vmdq_qps = 0; 9346 pf->num_lan_qps = 1; 9347 pf->num_lan_msix = 1; 9348 9349 } else if (!vectors_left) { 9350 /* If we have limited resources, we will start with no vectors 9351 * for the special features and then allocate vectors to some 9352 * of these features based on the policy and at the end disable 9353 * the features that did not get any vectors. 9354 */ 9355 int vec; 9356 9357 dev_info(&pf->pdev->dev, 9358 "MSI-X vector limit reached, attempting to redistribute vectors\n"); 9359 /* reserve the misc vector */ 9360 vec = v_actual - 1; 9361 9362 /* Scale vector usage down */ 9363 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */ 9364 pf->num_vmdq_vsis = 1; 9365 pf->num_vmdq_qps = 1; 9366 9367 /* partition out the remaining vectors */ 9368 switch (vec) { 9369 case 2: 9370 pf->num_lan_msix = 1; 9371 break; 9372 case 3: 9373 if (pf->flags & I40E_FLAG_IWARP_ENABLED) { 9374 pf->num_lan_msix = 1; 9375 pf->num_iwarp_msix = 1; 9376 } else { 9377 pf->num_lan_msix = 2; 9378 } 9379 break; 9380 default: 9381 if (pf->flags & I40E_FLAG_IWARP_ENABLED) { 9382 pf->num_iwarp_msix = min_t(int, (vec / 3), 9383 iwarp_requested); 9384 pf->num_vmdq_vsis = min_t(int, (vec / 3), 9385 I40E_DEFAULT_NUM_VMDQ_VSI); 9386 } else { 9387 pf->num_vmdq_vsis = min_t(int, (vec / 2), 9388 I40E_DEFAULT_NUM_VMDQ_VSI); 9389 } 9390 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { 9391 pf->num_fdsb_msix = 1; 9392 vec--; 9393 } 9394 pf->num_lan_msix = min_t(int, 9395 (vec - (pf->num_iwarp_msix + pf->num_vmdq_vsis)), 9396 pf->num_lan_msix); 9397 pf->num_lan_qps = pf->num_lan_msix; 9398 break; 9399 } 9400 } 9401 9402 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) && 9403 (pf->num_fdsb_msix == 0)) { 9404 dev_info(&pf->pdev->dev, "Sideband Flowdir disabled, not enough MSI-X vectors\n"); 9405 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; 9406 } 9407 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) && 9408 (pf->num_vmdq_msix == 0)) { 9409 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n"); 9410 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED; 9411 } 9412 9413 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) && 9414 (pf->num_iwarp_msix == 0)) { 9415 dev_info(&pf->pdev->dev, "IWARP disabled, not enough MSI-X vectors\n"); 9416 pf->flags &= ~I40E_FLAG_IWARP_ENABLED; 9417 } 9418 i40e_debug(&pf->hw, I40E_DEBUG_INIT, 9419 "MSI-X vector distribution: PF %d, VMDq %d, FDSB %d, iWARP %d\n", 9420 pf->num_lan_msix, 9421 pf->num_vmdq_msix * pf->num_vmdq_vsis, 9422 pf->num_fdsb_msix, 9423 pf->num_iwarp_msix); 9424 9425 return v_actual; 9426 } 9427 9428 /** 9429 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector 9430 * @vsi: the VSI being configured 9431 * @v_idx: index of the vector in the vsi struct 9432 * @cpu: cpu to be used on affinity_mask 9433 * 9434 * We allocate one q_vector. If allocation fails we return -ENOMEM. 9435 **/ 9436 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx, int cpu) 9437 { 9438 struct i40e_q_vector *q_vector; 9439 9440 /* allocate q_vector */ 9441 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL); 9442 if (!q_vector) 9443 return -ENOMEM; 9444 9445 q_vector->vsi = vsi; 9446 q_vector->v_idx = v_idx; 9447 cpumask_copy(&q_vector->affinity_mask, cpu_possible_mask); 9448 9449 if (vsi->netdev) 9450 netif_napi_add(vsi->netdev, &q_vector->napi, 9451 i40e_napi_poll, NAPI_POLL_WEIGHT); 9452 9453 q_vector->rx.latency_range = I40E_LOW_LATENCY; 9454 q_vector->tx.latency_range = I40E_LOW_LATENCY; 9455 9456 /* tie q_vector and vsi together */ 9457 vsi->q_vectors[v_idx] = q_vector; 9458 9459 return 0; 9460 } 9461 9462 /** 9463 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors 9464 * @vsi: the VSI being configured 9465 * 9466 * We allocate one q_vector per queue interrupt. If allocation fails we 9467 * return -ENOMEM. 9468 **/ 9469 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi) 9470 { 9471 struct i40e_pf *pf = vsi->back; 9472 int err, v_idx, num_q_vectors, current_cpu; 9473 9474 /* if not MSIX, give the one vector only to the LAN VSI */ 9475 if (pf->flags & I40E_FLAG_MSIX_ENABLED) 9476 num_q_vectors = vsi->num_q_vectors; 9477 else if (vsi == pf->vsi[pf->lan_vsi]) 9478 num_q_vectors = 1; 9479 else 9480 return -EINVAL; 9481 9482 current_cpu = cpumask_first(cpu_online_mask); 9483 9484 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) { 9485 err = i40e_vsi_alloc_q_vector(vsi, v_idx, current_cpu); 9486 if (err) 9487 goto err_out; 9488 current_cpu = cpumask_next(current_cpu, cpu_online_mask); 9489 if (unlikely(current_cpu >= nr_cpu_ids)) 9490 current_cpu = cpumask_first(cpu_online_mask); 9491 } 9492 9493 return 0; 9494 9495 err_out: 9496 while (v_idx--) 9497 i40e_free_q_vector(vsi, v_idx); 9498 9499 return err; 9500 } 9501 9502 /** 9503 * i40e_init_interrupt_scheme - Determine proper interrupt scheme 9504 * @pf: board private structure to initialize 9505 **/ 9506 static int i40e_init_interrupt_scheme(struct i40e_pf *pf) 9507 { 9508 int vectors = 0; 9509 ssize_t size; 9510 9511 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 9512 vectors = i40e_init_msix(pf); 9513 if (vectors < 0) { 9514 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | 9515 I40E_FLAG_IWARP_ENABLED | 9516 I40E_FLAG_RSS_ENABLED | 9517 I40E_FLAG_DCB_CAPABLE | 9518 I40E_FLAG_DCB_ENABLED | 9519 I40E_FLAG_SRIOV_ENABLED | 9520 I40E_FLAG_FD_SB_ENABLED | 9521 I40E_FLAG_FD_ATR_ENABLED | 9522 I40E_FLAG_VMDQ_ENABLED); 9523 9524 /* rework the queue expectations without MSIX */ 9525 i40e_determine_queue_usage(pf); 9526 } 9527 } 9528 9529 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) && 9530 (pf->flags & I40E_FLAG_MSI_ENABLED)) { 9531 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n"); 9532 vectors = pci_enable_msi(pf->pdev); 9533 if (vectors < 0) { 9534 dev_info(&pf->pdev->dev, "MSI init failed - %d\n", 9535 vectors); 9536 pf->flags &= ~I40E_FLAG_MSI_ENABLED; 9537 } 9538 vectors = 1; /* one MSI or Legacy vector */ 9539 } 9540 9541 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED))) 9542 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n"); 9543 9544 /* set up vector assignment tracking */ 9545 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors); 9546 pf->irq_pile = kzalloc(size, GFP_KERNEL); 9547 if (!pf->irq_pile) { 9548 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n"); 9549 return -ENOMEM; 9550 } 9551 pf->irq_pile->num_entries = vectors; 9552 pf->irq_pile->search_hint = 0; 9553 9554 /* track first vector for misc interrupts, ignore return */ 9555 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1); 9556 9557 return 0; 9558 } 9559 9560 #ifdef CONFIG_PM 9561 /** 9562 * i40e_restore_interrupt_scheme - Restore the interrupt scheme 9563 * @pf: private board data structure 9564 * 9565 * Restore the interrupt scheme that was cleared when we suspended the 9566 * device. This should be called during resume to re-allocate the q_vectors 9567 * and reacquire IRQs. 9568 */ 9569 static int i40e_restore_interrupt_scheme(struct i40e_pf *pf) 9570 { 9571 int err, i; 9572 9573 /* We cleared the MSI and MSI-X flags when disabling the old interrupt 9574 * scheme. We need to re-enabled them here in order to attempt to 9575 * re-acquire the MSI or MSI-X vectors 9576 */ 9577 pf->flags |= (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED); 9578 9579 err = i40e_init_interrupt_scheme(pf); 9580 if (err) 9581 return err; 9582 9583 /* Now that we've re-acquired IRQs, we need to remap the vectors and 9584 * rings together again. 9585 */ 9586 for (i = 0; i < pf->num_alloc_vsi; i++) { 9587 if (pf->vsi[i]) { 9588 err = i40e_vsi_alloc_q_vectors(pf->vsi[i]); 9589 if (err) 9590 goto err_unwind; 9591 i40e_vsi_map_rings_to_vectors(pf->vsi[i]); 9592 } 9593 } 9594 9595 err = i40e_setup_misc_vector(pf); 9596 if (err) 9597 goto err_unwind; 9598 9599 return 0; 9600 9601 err_unwind: 9602 while (i--) { 9603 if (pf->vsi[i]) 9604 i40e_vsi_free_q_vectors(pf->vsi[i]); 9605 } 9606 9607 return err; 9608 } 9609 #endif /* CONFIG_PM */ 9610 9611 /** 9612 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events 9613 * @pf: board private structure 9614 * 9615 * This sets up the handler for MSIX 0, which is used to manage the 9616 * non-queue interrupts, e.g. AdminQ and errors. This is not used 9617 * when in MSI or Legacy interrupt mode. 9618 **/ 9619 static int i40e_setup_misc_vector(struct i40e_pf *pf) 9620 { 9621 struct i40e_hw *hw = &pf->hw; 9622 int err = 0; 9623 9624 /* Only request the IRQ once, the first time through. */ 9625 if (!test_and_set_bit(__I40E_MISC_IRQ_REQUESTED, pf->state)) { 9626 err = request_irq(pf->msix_entries[0].vector, 9627 i40e_intr, 0, pf->int_name, pf); 9628 if (err) { 9629 clear_bit(__I40E_MISC_IRQ_REQUESTED, pf->state); 9630 dev_info(&pf->pdev->dev, 9631 "request_irq for %s failed: %d\n", 9632 pf->int_name, err); 9633 return -EFAULT; 9634 } 9635 } 9636 9637 i40e_enable_misc_int_causes(pf); 9638 9639 /* associate no queues to the misc vector */ 9640 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST); 9641 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K); 9642 9643 i40e_flush(hw); 9644 9645 i40e_irq_dynamic_enable_icr0(pf); 9646 9647 return err; 9648 } 9649 9650 /** 9651 * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands 9652 * @vsi: Pointer to vsi structure 9653 * @seed: Buffter to store the hash keys 9654 * @lut: Buffer to store the lookup table entries 9655 * @lut_size: Size of buffer to store the lookup table entries 9656 * 9657 * Return 0 on success, negative on failure 9658 */ 9659 static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed, 9660 u8 *lut, u16 lut_size) 9661 { 9662 struct i40e_pf *pf = vsi->back; 9663 struct i40e_hw *hw = &pf->hw; 9664 int ret = 0; 9665 9666 if (seed) { 9667 ret = i40e_aq_get_rss_key(hw, vsi->id, 9668 (struct i40e_aqc_get_set_rss_key_data *)seed); 9669 if (ret) { 9670 dev_info(&pf->pdev->dev, 9671 "Cannot get RSS key, err %s aq_err %s\n", 9672 i40e_stat_str(&pf->hw, ret), 9673 i40e_aq_str(&pf->hw, 9674 pf->hw.aq.asq_last_status)); 9675 return ret; 9676 } 9677 } 9678 9679 if (lut) { 9680 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false; 9681 9682 ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size); 9683 if (ret) { 9684 dev_info(&pf->pdev->dev, 9685 "Cannot get RSS lut, err %s aq_err %s\n", 9686 i40e_stat_str(&pf->hw, ret), 9687 i40e_aq_str(&pf->hw, 9688 pf->hw.aq.asq_last_status)); 9689 return ret; 9690 } 9691 } 9692 9693 return ret; 9694 } 9695 9696 /** 9697 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers 9698 * @vsi: Pointer to vsi structure 9699 * @seed: RSS hash seed 9700 * @lut: Lookup table 9701 * @lut_size: Lookup table size 9702 * 9703 * Returns 0 on success, negative on failure 9704 **/ 9705 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed, 9706 const u8 *lut, u16 lut_size) 9707 { 9708 struct i40e_pf *pf = vsi->back; 9709 struct i40e_hw *hw = &pf->hw; 9710 u16 vf_id = vsi->vf_id; 9711 u8 i; 9712 9713 /* Fill out hash function seed */ 9714 if (seed) { 9715 u32 *seed_dw = (u32 *)seed; 9716 9717 if (vsi->type == I40E_VSI_MAIN) { 9718 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++) 9719 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]); 9720 } else if (vsi->type == I40E_VSI_SRIOV) { 9721 for (i = 0; i <= I40E_VFQF_HKEY1_MAX_INDEX; i++) 9722 wr32(hw, I40E_VFQF_HKEY1(i, vf_id), seed_dw[i]); 9723 } else { 9724 dev_err(&pf->pdev->dev, "Cannot set RSS seed - invalid VSI type\n"); 9725 } 9726 } 9727 9728 if (lut) { 9729 u32 *lut_dw = (u32 *)lut; 9730 9731 if (vsi->type == I40E_VSI_MAIN) { 9732 if (lut_size != I40E_HLUT_ARRAY_SIZE) 9733 return -EINVAL; 9734 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++) 9735 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]); 9736 } else if (vsi->type == I40E_VSI_SRIOV) { 9737 if (lut_size != I40E_VF_HLUT_ARRAY_SIZE) 9738 return -EINVAL; 9739 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++) 9740 wr32(hw, I40E_VFQF_HLUT1(i, vf_id), lut_dw[i]); 9741 } else { 9742 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n"); 9743 } 9744 } 9745 i40e_flush(hw); 9746 9747 return 0; 9748 } 9749 9750 /** 9751 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers 9752 * @vsi: Pointer to VSI structure 9753 * @seed: Buffer to store the keys 9754 * @lut: Buffer to store the lookup table entries 9755 * @lut_size: Size of buffer to store the lookup table entries 9756 * 9757 * Returns 0 on success, negative on failure 9758 */ 9759 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed, 9760 u8 *lut, u16 lut_size) 9761 { 9762 struct i40e_pf *pf = vsi->back; 9763 struct i40e_hw *hw = &pf->hw; 9764 u16 i; 9765 9766 if (seed) { 9767 u32 *seed_dw = (u32 *)seed; 9768 9769 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++) 9770 seed_dw[i] = i40e_read_rx_ctl(hw, I40E_PFQF_HKEY(i)); 9771 } 9772 if (lut) { 9773 u32 *lut_dw = (u32 *)lut; 9774 9775 if (lut_size != I40E_HLUT_ARRAY_SIZE) 9776 return -EINVAL; 9777 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++) 9778 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i)); 9779 } 9780 9781 return 0; 9782 } 9783 9784 /** 9785 * i40e_config_rss - Configure RSS keys and lut 9786 * @vsi: Pointer to VSI structure 9787 * @seed: RSS hash seed 9788 * @lut: Lookup table 9789 * @lut_size: Lookup table size 9790 * 9791 * Returns 0 on success, negative on failure 9792 */ 9793 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size) 9794 { 9795 struct i40e_pf *pf = vsi->back; 9796 9797 if (pf->hw_features & I40E_HW_RSS_AQ_CAPABLE) 9798 return i40e_config_rss_aq(vsi, seed, lut, lut_size); 9799 else 9800 return i40e_config_rss_reg(vsi, seed, lut, lut_size); 9801 } 9802 9803 /** 9804 * i40e_get_rss - Get RSS keys and lut 9805 * @vsi: Pointer to VSI structure 9806 * @seed: Buffer to store the keys 9807 * @lut: Buffer to store the lookup table entries 9808 * lut_size: Size of buffer to store the lookup table entries 9809 * 9810 * Returns 0 on success, negative on failure 9811 */ 9812 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size) 9813 { 9814 struct i40e_pf *pf = vsi->back; 9815 9816 if (pf->hw_features & I40E_HW_RSS_AQ_CAPABLE) 9817 return i40e_get_rss_aq(vsi, seed, lut, lut_size); 9818 else 9819 return i40e_get_rss_reg(vsi, seed, lut, lut_size); 9820 } 9821 9822 /** 9823 * i40e_fill_rss_lut - Fill the RSS lookup table with default values 9824 * @pf: Pointer to board private structure 9825 * @lut: Lookup table 9826 * @rss_table_size: Lookup table size 9827 * @rss_size: Range of queue number for hashing 9828 */ 9829 void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut, 9830 u16 rss_table_size, u16 rss_size) 9831 { 9832 u16 i; 9833 9834 for (i = 0; i < rss_table_size; i++) 9835 lut[i] = i % rss_size; 9836 } 9837 9838 /** 9839 * i40e_pf_config_rss - Prepare for RSS if used 9840 * @pf: board private structure 9841 **/ 9842 static int i40e_pf_config_rss(struct i40e_pf *pf) 9843 { 9844 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 9845 u8 seed[I40E_HKEY_ARRAY_SIZE]; 9846 u8 *lut; 9847 struct i40e_hw *hw = &pf->hw; 9848 u32 reg_val; 9849 u64 hena; 9850 int ret; 9851 9852 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */ 9853 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) | 9854 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32); 9855 hena |= i40e_pf_get_default_rss_hena(pf); 9856 9857 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena); 9858 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32)); 9859 9860 /* Determine the RSS table size based on the hardware capabilities */ 9861 reg_val = i40e_read_rx_ctl(hw, I40E_PFQF_CTL_0); 9862 reg_val = (pf->rss_table_size == 512) ? 9863 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) : 9864 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512); 9865 i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, reg_val); 9866 9867 /* Determine the RSS size of the VSI */ 9868 if (!vsi->rss_size) { 9869 u16 qcount; 9870 9871 qcount = vsi->num_queue_pairs / vsi->tc_config.numtc; 9872 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount); 9873 } 9874 if (!vsi->rss_size) 9875 return -EINVAL; 9876 9877 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL); 9878 if (!lut) 9879 return -ENOMEM; 9880 9881 /* Use user configured lut if there is one, otherwise use default */ 9882 if (vsi->rss_lut_user) 9883 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size); 9884 else 9885 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size); 9886 9887 /* Use user configured hash key if there is one, otherwise 9888 * use default. 9889 */ 9890 if (vsi->rss_hkey_user) 9891 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE); 9892 else 9893 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE); 9894 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size); 9895 kfree(lut); 9896 9897 return ret; 9898 } 9899 9900 /** 9901 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild 9902 * @pf: board private structure 9903 * @queue_count: the requested queue count for rss. 9904 * 9905 * returns 0 if rss is not enabled, if enabled returns the final rss queue 9906 * count which may be different from the requested queue count. 9907 * Note: expects to be called while under rtnl_lock() 9908 **/ 9909 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count) 9910 { 9911 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 9912 int new_rss_size; 9913 9914 if (!(pf->flags & I40E_FLAG_RSS_ENABLED)) 9915 return 0; 9916 9917 new_rss_size = min_t(int, queue_count, pf->rss_size_max); 9918 9919 if (queue_count != vsi->num_queue_pairs) { 9920 u16 qcount; 9921 9922 vsi->req_queue_pairs = queue_count; 9923 i40e_prep_for_reset(pf, true); 9924 9925 pf->alloc_rss_size = new_rss_size; 9926 9927 i40e_reset_and_rebuild(pf, true, true); 9928 9929 /* Discard the user configured hash keys and lut, if less 9930 * queues are enabled. 9931 */ 9932 if (queue_count < vsi->rss_size) { 9933 i40e_clear_rss_config_user(vsi); 9934 dev_dbg(&pf->pdev->dev, 9935 "discard user configured hash keys and lut\n"); 9936 } 9937 9938 /* Reset vsi->rss_size, as number of enabled queues changed */ 9939 qcount = vsi->num_queue_pairs / vsi->tc_config.numtc; 9940 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount); 9941 9942 i40e_pf_config_rss(pf); 9943 } 9944 dev_info(&pf->pdev->dev, "User requested queue count/HW max RSS count: %d/%d\n", 9945 vsi->req_queue_pairs, pf->rss_size_max); 9946 return pf->alloc_rss_size; 9947 } 9948 9949 /** 9950 * i40e_get_partition_bw_setting - Retrieve BW settings for this PF partition 9951 * @pf: board private structure 9952 **/ 9953 i40e_status i40e_get_partition_bw_setting(struct i40e_pf *pf) 9954 { 9955 i40e_status status; 9956 bool min_valid, max_valid; 9957 u32 max_bw, min_bw; 9958 9959 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw, 9960 &min_valid, &max_valid); 9961 9962 if (!status) { 9963 if (min_valid) 9964 pf->min_bw = min_bw; 9965 if (max_valid) 9966 pf->max_bw = max_bw; 9967 } 9968 9969 return status; 9970 } 9971 9972 /** 9973 * i40e_set_partition_bw_setting - Set BW settings for this PF partition 9974 * @pf: board private structure 9975 **/ 9976 i40e_status i40e_set_partition_bw_setting(struct i40e_pf *pf) 9977 { 9978 struct i40e_aqc_configure_partition_bw_data bw_data; 9979 i40e_status status; 9980 9981 /* Set the valid bit for this PF */ 9982 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id)); 9983 bw_data.max_bw[pf->hw.pf_id] = pf->max_bw & I40E_ALT_BW_VALUE_MASK; 9984 bw_data.min_bw[pf->hw.pf_id] = pf->min_bw & I40E_ALT_BW_VALUE_MASK; 9985 9986 /* Set the new bandwidths */ 9987 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL); 9988 9989 return status; 9990 } 9991 9992 /** 9993 * i40e_commit_partition_bw_setting - Commit BW settings for this PF partition 9994 * @pf: board private structure 9995 **/ 9996 i40e_status i40e_commit_partition_bw_setting(struct i40e_pf *pf) 9997 { 9998 /* Commit temporary BW setting to permanent NVM image */ 9999 enum i40e_admin_queue_err last_aq_status; 10000 i40e_status ret; 10001 u16 nvm_word; 10002 10003 if (pf->hw.partition_id != 1) { 10004 dev_info(&pf->pdev->dev, 10005 "Commit BW only works on partition 1! This is partition %d", 10006 pf->hw.partition_id); 10007 ret = I40E_NOT_SUPPORTED; 10008 goto bw_commit_out; 10009 } 10010 10011 /* Acquire NVM for read access */ 10012 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ); 10013 last_aq_status = pf->hw.aq.asq_last_status; 10014 if (ret) { 10015 dev_info(&pf->pdev->dev, 10016 "Cannot acquire NVM for read access, err %s aq_err %s\n", 10017 i40e_stat_str(&pf->hw, ret), 10018 i40e_aq_str(&pf->hw, last_aq_status)); 10019 goto bw_commit_out; 10020 } 10021 10022 /* Read word 0x10 of NVM - SW compatibility word 1 */ 10023 ret = i40e_aq_read_nvm(&pf->hw, 10024 I40E_SR_NVM_CONTROL_WORD, 10025 0x10, sizeof(nvm_word), &nvm_word, 10026 false, NULL); 10027 /* Save off last admin queue command status before releasing 10028 * the NVM 10029 */ 10030 last_aq_status = pf->hw.aq.asq_last_status; 10031 i40e_release_nvm(&pf->hw); 10032 if (ret) { 10033 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n", 10034 i40e_stat_str(&pf->hw, ret), 10035 i40e_aq_str(&pf->hw, last_aq_status)); 10036 goto bw_commit_out; 10037 } 10038 10039 /* Wait a bit for NVM release to complete */ 10040 msleep(50); 10041 10042 /* Acquire NVM for write access */ 10043 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE); 10044 last_aq_status = pf->hw.aq.asq_last_status; 10045 if (ret) { 10046 dev_info(&pf->pdev->dev, 10047 "Cannot acquire NVM for write access, err %s aq_err %s\n", 10048 i40e_stat_str(&pf->hw, ret), 10049 i40e_aq_str(&pf->hw, last_aq_status)); 10050 goto bw_commit_out; 10051 } 10052 /* Write it back out unchanged to initiate update NVM, 10053 * which will force a write of the shadow (alt) RAM to 10054 * the NVM - thus storing the bandwidth values permanently. 10055 */ 10056 ret = i40e_aq_update_nvm(&pf->hw, 10057 I40E_SR_NVM_CONTROL_WORD, 10058 0x10, sizeof(nvm_word), 10059 &nvm_word, true, NULL); 10060 /* Save off last admin queue command status before releasing 10061 * the NVM 10062 */ 10063 last_aq_status = pf->hw.aq.asq_last_status; 10064 i40e_release_nvm(&pf->hw); 10065 if (ret) 10066 dev_info(&pf->pdev->dev, 10067 "BW settings NOT SAVED, err %s aq_err %s\n", 10068 i40e_stat_str(&pf->hw, ret), 10069 i40e_aq_str(&pf->hw, last_aq_status)); 10070 bw_commit_out: 10071 10072 return ret; 10073 } 10074 10075 /** 10076 * i40e_sw_init - Initialize general software structures (struct i40e_pf) 10077 * @pf: board private structure to initialize 10078 * 10079 * i40e_sw_init initializes the Adapter private data structure. 10080 * Fields are initialized based on PCI device information and 10081 * OS network device settings (MTU size). 10082 **/ 10083 static int i40e_sw_init(struct i40e_pf *pf) 10084 { 10085 int err = 0; 10086 int size; 10087 10088 /* Set default capability flags */ 10089 pf->flags = I40E_FLAG_RX_CSUM_ENABLED | 10090 I40E_FLAG_MSI_ENABLED | 10091 I40E_FLAG_MSIX_ENABLED; 10092 10093 /* Set default ITR */ 10094 pf->rx_itr_default = I40E_ITR_RX_DEF; 10095 pf->tx_itr_default = I40E_ITR_TX_DEF; 10096 10097 /* Depending on PF configurations, it is possible that the RSS 10098 * maximum might end up larger than the available queues 10099 */ 10100 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width); 10101 pf->alloc_rss_size = 1; 10102 pf->rss_table_size = pf->hw.func_caps.rss_table_size; 10103 pf->rss_size_max = min_t(int, pf->rss_size_max, 10104 pf->hw.func_caps.num_tx_qp); 10105 if (pf->hw.func_caps.rss) { 10106 pf->flags |= I40E_FLAG_RSS_ENABLED; 10107 pf->alloc_rss_size = min_t(int, pf->rss_size_max, 10108 num_online_cpus()); 10109 } 10110 10111 /* MFP mode enabled */ 10112 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) { 10113 pf->flags |= I40E_FLAG_MFP_ENABLED; 10114 dev_info(&pf->pdev->dev, "MFP mode Enabled\n"); 10115 if (i40e_get_partition_bw_setting(pf)) { 10116 dev_warn(&pf->pdev->dev, 10117 "Could not get partition bw settings\n"); 10118 } else { 10119 dev_info(&pf->pdev->dev, 10120 "Partition BW Min = %8.8x, Max = %8.8x\n", 10121 pf->min_bw, pf->max_bw); 10122 10123 /* nudge the Tx scheduler */ 10124 i40e_set_partition_bw_setting(pf); 10125 } 10126 } 10127 10128 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) || 10129 (pf->hw.func_caps.fd_filters_best_effort > 0)) { 10130 pf->flags |= I40E_FLAG_FD_ATR_ENABLED; 10131 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE; 10132 if (pf->flags & I40E_FLAG_MFP_ENABLED && 10133 pf->hw.num_partitions > 1) 10134 dev_info(&pf->pdev->dev, 10135 "Flow Director Sideband mode Disabled in MFP mode\n"); 10136 else 10137 pf->flags |= I40E_FLAG_FD_SB_ENABLED; 10138 pf->fdir_pf_filter_count = 10139 pf->hw.func_caps.fd_filters_guaranteed; 10140 pf->hw.fdir_shared_filter_count = 10141 pf->hw.func_caps.fd_filters_best_effort; 10142 } 10143 10144 if (pf->hw.mac.type == I40E_MAC_X722) { 10145 pf->hw_features |= (I40E_HW_RSS_AQ_CAPABLE | 10146 I40E_HW_128_QP_RSS_CAPABLE | 10147 I40E_HW_ATR_EVICT_CAPABLE | 10148 I40E_HW_WB_ON_ITR_CAPABLE | 10149 I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE | 10150 I40E_HW_NO_PCI_LINK_CHECK | 10151 I40E_HW_USE_SET_LLDP_MIB | 10152 I40E_HW_GENEVE_OFFLOAD_CAPABLE | 10153 I40E_HW_PTP_L4_CAPABLE | 10154 I40E_HW_WOL_MC_MAGIC_PKT_WAKE | 10155 I40E_HW_OUTER_UDP_CSUM_CAPABLE); 10156 10157 #define I40E_FDEVICT_PCTYPE_DEFAULT 0xc03 10158 if (rd32(&pf->hw, I40E_GLQF_FDEVICTENA(1)) != 10159 I40E_FDEVICT_PCTYPE_DEFAULT) { 10160 dev_warn(&pf->pdev->dev, 10161 "FD EVICT PCTYPES are not right, disable FD HW EVICT\n"); 10162 pf->hw_features &= ~I40E_HW_ATR_EVICT_CAPABLE; 10163 } 10164 } else if ((pf->hw.aq.api_maj_ver > 1) || 10165 ((pf->hw.aq.api_maj_ver == 1) && 10166 (pf->hw.aq.api_min_ver > 4))) { 10167 /* Supported in FW API version higher than 1.4 */ 10168 pf->hw_features |= I40E_HW_GENEVE_OFFLOAD_CAPABLE; 10169 } 10170 10171 /* Enable HW ATR eviction if possible */ 10172 if (pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE) 10173 pf->flags |= I40E_FLAG_HW_ATR_EVICT_ENABLED; 10174 10175 if ((pf->hw.mac.type == I40E_MAC_XL710) && 10176 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) || 10177 (pf->hw.aq.fw_maj_ver < 4))) { 10178 pf->hw_features |= I40E_HW_RESTART_AUTONEG; 10179 /* No DCB support for FW < v4.33 */ 10180 pf->hw_features |= I40E_HW_NO_DCB_SUPPORT; 10181 } 10182 10183 /* Disable FW LLDP if FW < v4.3 */ 10184 if ((pf->hw.mac.type == I40E_MAC_XL710) && 10185 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) || 10186 (pf->hw.aq.fw_maj_ver < 4))) 10187 pf->hw_features |= I40E_HW_STOP_FW_LLDP; 10188 10189 /* Use the FW Set LLDP MIB API if FW > v4.40 */ 10190 if ((pf->hw.mac.type == I40E_MAC_XL710) && 10191 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver >= 40)) || 10192 (pf->hw.aq.fw_maj_ver >= 5))) 10193 pf->hw_features |= I40E_HW_USE_SET_LLDP_MIB; 10194 10195 /* Enable PTP L4 if FW > v6.0 */ 10196 if (pf->hw.mac.type == I40E_MAC_XL710 && 10197 pf->hw.aq.fw_maj_ver >= 6) 10198 pf->hw_features |= I40E_HW_PTP_L4_CAPABLE; 10199 10200 if (pf->hw.func_caps.vmdq) { 10201 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI; 10202 pf->flags |= I40E_FLAG_VMDQ_ENABLED; 10203 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf); 10204 } 10205 10206 if (pf->hw.func_caps.iwarp) { 10207 pf->flags |= I40E_FLAG_IWARP_ENABLED; 10208 /* IWARP needs one extra vector for CQP just like MISC.*/ 10209 pf->num_iwarp_msix = (int)num_online_cpus() + 1; 10210 } 10211 10212 #ifdef CONFIG_PCI_IOV 10213 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) { 10214 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF; 10215 pf->flags |= I40E_FLAG_SRIOV_ENABLED; 10216 pf->num_req_vfs = min_t(int, 10217 pf->hw.func_caps.num_vfs, 10218 I40E_MAX_VF_COUNT); 10219 } 10220 #endif /* CONFIG_PCI_IOV */ 10221 pf->eeprom_version = 0xDEAD; 10222 pf->lan_veb = I40E_NO_VEB; 10223 pf->lan_vsi = I40E_NO_VSI; 10224 10225 /* By default FW has this off for performance reasons */ 10226 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED; 10227 10228 /* set up queue assignment tracking */ 10229 size = sizeof(struct i40e_lump_tracking) 10230 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp); 10231 pf->qp_pile = kzalloc(size, GFP_KERNEL); 10232 if (!pf->qp_pile) { 10233 err = -ENOMEM; 10234 goto sw_init_done; 10235 } 10236 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp; 10237 pf->qp_pile->search_hint = 0; 10238 10239 pf->tx_timeout_recovery_level = 1; 10240 10241 mutex_init(&pf->switch_mutex); 10242 10243 sw_init_done: 10244 return err; 10245 } 10246 10247 /** 10248 * i40e_set_ntuple - set the ntuple feature flag and take action 10249 * @pf: board private structure to initialize 10250 * @features: the feature set that the stack is suggesting 10251 * 10252 * returns a bool to indicate if reset needs to happen 10253 **/ 10254 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features) 10255 { 10256 bool need_reset = false; 10257 10258 /* Check if Flow Director n-tuple support was enabled or disabled. If 10259 * the state changed, we need to reset. 10260 */ 10261 if (features & NETIF_F_NTUPLE) { 10262 /* Enable filters and mark for reset */ 10263 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 10264 need_reset = true; 10265 /* enable FD_SB only if there is MSI-X vector */ 10266 if (pf->num_fdsb_msix > 0) 10267 pf->flags |= I40E_FLAG_FD_SB_ENABLED; 10268 } else { 10269 /* turn off filters, mark for reset and clear SW filter list */ 10270 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { 10271 need_reset = true; 10272 i40e_fdir_filter_exit(pf); 10273 } 10274 pf->flags &= ~(I40E_FLAG_FD_SB_ENABLED | 10275 I40E_FLAG_FD_SB_AUTO_DISABLED); 10276 /* reset fd counters */ 10277 pf->fd_add_err = 0; 10278 pf->fd_atr_cnt = 0; 10279 /* if ATR was auto disabled it can be re-enabled. */ 10280 if (pf->flags & I40E_FLAG_FD_ATR_AUTO_DISABLED) { 10281 pf->flags &= ~I40E_FLAG_FD_ATR_AUTO_DISABLED; 10282 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) && 10283 (I40E_DEBUG_FD & pf->hw.debug_mask)) 10284 dev_info(&pf->pdev->dev, "ATR re-enabled.\n"); 10285 } 10286 } 10287 return need_reset; 10288 } 10289 10290 /** 10291 * i40e_clear_rss_lut - clear the rx hash lookup table 10292 * @vsi: the VSI being configured 10293 **/ 10294 static void i40e_clear_rss_lut(struct i40e_vsi *vsi) 10295 { 10296 struct i40e_pf *pf = vsi->back; 10297 struct i40e_hw *hw = &pf->hw; 10298 u16 vf_id = vsi->vf_id; 10299 u8 i; 10300 10301 if (vsi->type == I40E_VSI_MAIN) { 10302 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++) 10303 wr32(hw, I40E_PFQF_HLUT(i), 0); 10304 } else if (vsi->type == I40E_VSI_SRIOV) { 10305 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++) 10306 i40e_write_rx_ctl(hw, I40E_VFQF_HLUT1(i, vf_id), 0); 10307 } else { 10308 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n"); 10309 } 10310 } 10311 10312 /** 10313 * i40e_set_features - set the netdev feature flags 10314 * @netdev: ptr to the netdev being adjusted 10315 * @features: the feature set that the stack is suggesting 10316 * Note: expects to be called while under rtnl_lock() 10317 **/ 10318 static int i40e_set_features(struct net_device *netdev, 10319 netdev_features_t features) 10320 { 10321 struct i40e_netdev_priv *np = netdev_priv(netdev); 10322 struct i40e_vsi *vsi = np->vsi; 10323 struct i40e_pf *pf = vsi->back; 10324 bool need_reset; 10325 10326 if (features & NETIF_F_RXHASH && !(netdev->features & NETIF_F_RXHASH)) 10327 i40e_pf_config_rss(pf); 10328 else if (!(features & NETIF_F_RXHASH) && 10329 netdev->features & NETIF_F_RXHASH) 10330 i40e_clear_rss_lut(vsi); 10331 10332 if (features & NETIF_F_HW_VLAN_CTAG_RX) 10333 i40e_vlan_stripping_enable(vsi); 10334 else 10335 i40e_vlan_stripping_disable(vsi); 10336 10337 need_reset = i40e_set_ntuple(pf, features); 10338 10339 if (need_reset) 10340 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true); 10341 10342 return 0; 10343 } 10344 10345 /** 10346 * i40e_get_udp_port_idx - Lookup a possibly offloaded for Rx UDP port 10347 * @pf: board private structure 10348 * @port: The UDP port to look up 10349 * 10350 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found 10351 **/ 10352 static u8 i40e_get_udp_port_idx(struct i40e_pf *pf, u16 port) 10353 { 10354 u8 i; 10355 10356 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) { 10357 if (pf->udp_ports[i].port == port) 10358 return i; 10359 } 10360 10361 return i; 10362 } 10363 10364 /** 10365 * i40e_udp_tunnel_add - Get notifications about UDP tunnel ports that come up 10366 * @netdev: This physical port's netdev 10367 * @ti: Tunnel endpoint information 10368 **/ 10369 static void i40e_udp_tunnel_add(struct net_device *netdev, 10370 struct udp_tunnel_info *ti) 10371 { 10372 struct i40e_netdev_priv *np = netdev_priv(netdev); 10373 struct i40e_vsi *vsi = np->vsi; 10374 struct i40e_pf *pf = vsi->back; 10375 u16 port = ntohs(ti->port); 10376 u8 next_idx; 10377 u8 idx; 10378 10379 idx = i40e_get_udp_port_idx(pf, port); 10380 10381 /* Check if port already exists */ 10382 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) { 10383 netdev_info(netdev, "port %d already offloaded\n", port); 10384 return; 10385 } 10386 10387 /* Now check if there is space to add the new port */ 10388 next_idx = i40e_get_udp_port_idx(pf, 0); 10389 10390 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) { 10391 netdev_info(netdev, "maximum number of offloaded UDP ports reached, not adding port %d\n", 10392 port); 10393 return; 10394 } 10395 10396 switch (ti->type) { 10397 case UDP_TUNNEL_TYPE_VXLAN: 10398 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_VXLAN; 10399 break; 10400 case UDP_TUNNEL_TYPE_GENEVE: 10401 if (!(pf->hw_features & I40E_HW_GENEVE_OFFLOAD_CAPABLE)) 10402 return; 10403 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_NGE; 10404 break; 10405 default: 10406 return; 10407 } 10408 10409 /* New port: add it and mark its index in the bitmap */ 10410 pf->udp_ports[next_idx].port = port; 10411 pf->pending_udp_bitmap |= BIT_ULL(next_idx); 10412 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC; 10413 } 10414 10415 /** 10416 * i40e_udp_tunnel_del - Get notifications about UDP tunnel ports that go away 10417 * @netdev: This physical port's netdev 10418 * @ti: Tunnel endpoint information 10419 **/ 10420 static void i40e_udp_tunnel_del(struct net_device *netdev, 10421 struct udp_tunnel_info *ti) 10422 { 10423 struct i40e_netdev_priv *np = netdev_priv(netdev); 10424 struct i40e_vsi *vsi = np->vsi; 10425 struct i40e_pf *pf = vsi->back; 10426 u16 port = ntohs(ti->port); 10427 u8 idx; 10428 10429 idx = i40e_get_udp_port_idx(pf, port); 10430 10431 /* Check if port already exists */ 10432 if (idx >= I40E_MAX_PF_UDP_OFFLOAD_PORTS) 10433 goto not_found; 10434 10435 switch (ti->type) { 10436 case UDP_TUNNEL_TYPE_VXLAN: 10437 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_VXLAN) 10438 goto not_found; 10439 break; 10440 case UDP_TUNNEL_TYPE_GENEVE: 10441 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_NGE) 10442 goto not_found; 10443 break; 10444 default: 10445 goto not_found; 10446 } 10447 10448 /* if port exists, set it to 0 (mark for deletion) 10449 * and make it pending 10450 */ 10451 pf->udp_ports[idx].port = 0; 10452 pf->pending_udp_bitmap |= BIT_ULL(idx); 10453 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC; 10454 10455 return; 10456 not_found: 10457 netdev_warn(netdev, "UDP port %d was not found, not deleting\n", 10458 port); 10459 } 10460 10461 static int i40e_get_phys_port_id(struct net_device *netdev, 10462 struct netdev_phys_item_id *ppid) 10463 { 10464 struct i40e_netdev_priv *np = netdev_priv(netdev); 10465 struct i40e_pf *pf = np->vsi->back; 10466 struct i40e_hw *hw = &pf->hw; 10467 10468 if (!(pf->hw_features & I40E_HW_PORT_ID_VALID)) 10469 return -EOPNOTSUPP; 10470 10471 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id)); 10472 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len); 10473 10474 return 0; 10475 } 10476 10477 /** 10478 * i40e_ndo_fdb_add - add an entry to the hardware database 10479 * @ndm: the input from the stack 10480 * @tb: pointer to array of nladdr (unused) 10481 * @dev: the net device pointer 10482 * @addr: the MAC address entry being added 10483 * @flags: instructions from stack about fdb operation 10484 */ 10485 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[], 10486 struct net_device *dev, 10487 const unsigned char *addr, u16 vid, 10488 u16 flags) 10489 { 10490 struct i40e_netdev_priv *np = netdev_priv(dev); 10491 struct i40e_pf *pf = np->vsi->back; 10492 int err = 0; 10493 10494 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED)) 10495 return -EOPNOTSUPP; 10496 10497 if (vid) { 10498 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name); 10499 return -EINVAL; 10500 } 10501 10502 /* Hardware does not support aging addresses so if a 10503 * ndm_state is given only allow permanent addresses 10504 */ 10505 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) { 10506 netdev_info(dev, "FDB only supports static addresses\n"); 10507 return -EINVAL; 10508 } 10509 10510 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) 10511 err = dev_uc_add_excl(dev, addr); 10512 else if (is_multicast_ether_addr(addr)) 10513 err = dev_mc_add_excl(dev, addr); 10514 else 10515 err = -EINVAL; 10516 10517 /* Only return duplicate errors if NLM_F_EXCL is set */ 10518 if (err == -EEXIST && !(flags & NLM_F_EXCL)) 10519 err = 0; 10520 10521 return err; 10522 } 10523 10524 /** 10525 * i40e_ndo_bridge_setlink - Set the hardware bridge mode 10526 * @dev: the netdev being configured 10527 * @nlh: RTNL message 10528 * 10529 * Inserts a new hardware bridge if not already created and 10530 * enables the bridging mode requested (VEB or VEPA). If the 10531 * hardware bridge has already been inserted and the request 10532 * is to change the mode then that requires a PF reset to 10533 * allow rebuild of the components with required hardware 10534 * bridge mode enabled. 10535 * 10536 * Note: expects to be called while under rtnl_lock() 10537 **/ 10538 static int i40e_ndo_bridge_setlink(struct net_device *dev, 10539 struct nlmsghdr *nlh, 10540 u16 flags) 10541 { 10542 struct i40e_netdev_priv *np = netdev_priv(dev); 10543 struct i40e_vsi *vsi = np->vsi; 10544 struct i40e_pf *pf = vsi->back; 10545 struct i40e_veb *veb = NULL; 10546 struct nlattr *attr, *br_spec; 10547 int i, rem; 10548 10549 /* Only for PF VSI for now */ 10550 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) 10551 return -EOPNOTSUPP; 10552 10553 /* Find the HW bridge for PF VSI */ 10554 for (i = 0; i < I40E_MAX_VEB && !veb; i++) { 10555 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid) 10556 veb = pf->veb[i]; 10557 } 10558 10559 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC); 10560 10561 nla_for_each_nested(attr, br_spec, rem) { 10562 __u16 mode; 10563 10564 if (nla_type(attr) != IFLA_BRIDGE_MODE) 10565 continue; 10566 10567 mode = nla_get_u16(attr); 10568 if ((mode != BRIDGE_MODE_VEPA) && 10569 (mode != BRIDGE_MODE_VEB)) 10570 return -EINVAL; 10571 10572 /* Insert a new HW bridge */ 10573 if (!veb) { 10574 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid, 10575 vsi->tc_config.enabled_tc); 10576 if (veb) { 10577 veb->bridge_mode = mode; 10578 i40e_config_bridge_mode(veb); 10579 } else { 10580 /* No Bridge HW offload available */ 10581 return -ENOENT; 10582 } 10583 break; 10584 } else if (mode != veb->bridge_mode) { 10585 /* Existing HW bridge but different mode needs reset */ 10586 veb->bridge_mode = mode; 10587 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */ 10588 if (mode == BRIDGE_MODE_VEB) 10589 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED; 10590 else 10591 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED; 10592 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true); 10593 break; 10594 } 10595 } 10596 10597 return 0; 10598 } 10599 10600 /** 10601 * i40e_ndo_bridge_getlink - Get the hardware bridge mode 10602 * @skb: skb buff 10603 * @pid: process id 10604 * @seq: RTNL message seq # 10605 * @dev: the netdev being configured 10606 * @filter_mask: unused 10607 * @nlflags: netlink flags passed in 10608 * 10609 * Return the mode in which the hardware bridge is operating in 10610 * i.e VEB or VEPA. 10611 **/ 10612 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq, 10613 struct net_device *dev, 10614 u32 __always_unused filter_mask, 10615 int nlflags) 10616 { 10617 struct i40e_netdev_priv *np = netdev_priv(dev); 10618 struct i40e_vsi *vsi = np->vsi; 10619 struct i40e_pf *pf = vsi->back; 10620 struct i40e_veb *veb = NULL; 10621 int i; 10622 10623 /* Only for PF VSI for now */ 10624 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) 10625 return -EOPNOTSUPP; 10626 10627 /* Find the HW bridge for the PF VSI */ 10628 for (i = 0; i < I40E_MAX_VEB && !veb; i++) { 10629 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid) 10630 veb = pf->veb[i]; 10631 } 10632 10633 if (!veb) 10634 return 0; 10635 10636 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode, 10637 0, 0, nlflags, filter_mask, NULL); 10638 } 10639 10640 /** 10641 * i40e_features_check - Validate encapsulated packet conforms to limits 10642 * @skb: skb buff 10643 * @dev: This physical port's netdev 10644 * @features: Offload features that the stack believes apply 10645 **/ 10646 static netdev_features_t i40e_features_check(struct sk_buff *skb, 10647 struct net_device *dev, 10648 netdev_features_t features) 10649 { 10650 size_t len; 10651 10652 /* No point in doing any of this if neither checksum nor GSO are 10653 * being requested for this frame. We can rule out both by just 10654 * checking for CHECKSUM_PARTIAL 10655 */ 10656 if (skb->ip_summed != CHECKSUM_PARTIAL) 10657 return features; 10658 10659 /* We cannot support GSO if the MSS is going to be less than 10660 * 64 bytes. If it is then we need to drop support for GSO. 10661 */ 10662 if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_size < 64)) 10663 features &= ~NETIF_F_GSO_MASK; 10664 10665 /* MACLEN can support at most 63 words */ 10666 len = skb_network_header(skb) - skb->data; 10667 if (len & ~(63 * 2)) 10668 goto out_err; 10669 10670 /* IPLEN and EIPLEN can support at most 127 dwords */ 10671 len = skb_transport_header(skb) - skb_network_header(skb); 10672 if (len & ~(127 * 4)) 10673 goto out_err; 10674 10675 if (skb->encapsulation) { 10676 /* L4TUNLEN can support 127 words */ 10677 len = skb_inner_network_header(skb) - skb_transport_header(skb); 10678 if (len & ~(127 * 2)) 10679 goto out_err; 10680 10681 /* IPLEN can support at most 127 dwords */ 10682 len = skb_inner_transport_header(skb) - 10683 skb_inner_network_header(skb); 10684 if (len & ~(127 * 4)) 10685 goto out_err; 10686 } 10687 10688 /* No need to validate L4LEN as TCP is the only protocol with a 10689 * a flexible value and we support all possible values supported 10690 * by TCP, which is at most 15 dwords 10691 */ 10692 10693 return features; 10694 out_err: 10695 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK); 10696 } 10697 10698 /** 10699 * i40e_xdp_setup - add/remove an XDP program 10700 * @vsi: VSI to changed 10701 * @prog: XDP program 10702 **/ 10703 static int i40e_xdp_setup(struct i40e_vsi *vsi, 10704 struct bpf_prog *prog) 10705 { 10706 int frame_size = vsi->netdev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; 10707 struct i40e_pf *pf = vsi->back; 10708 struct bpf_prog *old_prog; 10709 bool need_reset; 10710 int i; 10711 10712 /* Don't allow frames that span over multiple buffers */ 10713 if (frame_size > vsi->rx_buf_len) 10714 return -EINVAL; 10715 10716 if (!i40e_enabled_xdp_vsi(vsi) && !prog) 10717 return 0; 10718 10719 /* When turning XDP on->off/off->on we reset and rebuild the rings. */ 10720 need_reset = (i40e_enabled_xdp_vsi(vsi) != !!prog); 10721 10722 if (need_reset) 10723 i40e_prep_for_reset(pf, true); 10724 10725 old_prog = xchg(&vsi->xdp_prog, prog); 10726 10727 if (need_reset) 10728 i40e_reset_and_rebuild(pf, true, true); 10729 10730 for (i = 0; i < vsi->num_queue_pairs; i++) 10731 WRITE_ONCE(vsi->rx_rings[i]->xdp_prog, vsi->xdp_prog); 10732 10733 if (old_prog) 10734 bpf_prog_put(old_prog); 10735 10736 return 0; 10737 } 10738 10739 /** 10740 * i40e_xdp - implements ndo_xdp for i40e 10741 * @dev: netdevice 10742 * @xdp: XDP command 10743 **/ 10744 static int i40e_xdp(struct net_device *dev, 10745 struct netdev_xdp *xdp) 10746 { 10747 struct i40e_netdev_priv *np = netdev_priv(dev); 10748 struct i40e_vsi *vsi = np->vsi; 10749 10750 if (vsi->type != I40E_VSI_MAIN) 10751 return -EINVAL; 10752 10753 switch (xdp->command) { 10754 case XDP_SETUP_PROG: 10755 return i40e_xdp_setup(vsi, xdp->prog); 10756 case XDP_QUERY_PROG: 10757 xdp->prog_attached = i40e_enabled_xdp_vsi(vsi); 10758 xdp->prog_id = vsi->xdp_prog ? vsi->xdp_prog->aux->id : 0; 10759 return 0; 10760 default: 10761 return -EINVAL; 10762 } 10763 } 10764 10765 static const struct net_device_ops i40e_netdev_ops = { 10766 .ndo_open = i40e_open, 10767 .ndo_stop = i40e_close, 10768 .ndo_start_xmit = i40e_lan_xmit_frame, 10769 .ndo_get_stats64 = i40e_get_netdev_stats_struct, 10770 .ndo_set_rx_mode = i40e_set_rx_mode, 10771 .ndo_validate_addr = eth_validate_addr, 10772 .ndo_set_mac_address = i40e_set_mac, 10773 .ndo_change_mtu = i40e_change_mtu, 10774 .ndo_do_ioctl = i40e_ioctl, 10775 .ndo_tx_timeout = i40e_tx_timeout, 10776 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid, 10777 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid, 10778 #ifdef CONFIG_NET_POLL_CONTROLLER 10779 .ndo_poll_controller = i40e_netpoll, 10780 #endif 10781 .ndo_setup_tc = __i40e_setup_tc, 10782 .ndo_set_features = i40e_set_features, 10783 .ndo_set_vf_mac = i40e_ndo_set_vf_mac, 10784 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan, 10785 .ndo_set_vf_rate = i40e_ndo_set_vf_bw, 10786 .ndo_get_vf_config = i40e_ndo_get_vf_config, 10787 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state, 10788 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk, 10789 .ndo_set_vf_trust = i40e_ndo_set_vf_trust, 10790 .ndo_udp_tunnel_add = i40e_udp_tunnel_add, 10791 .ndo_udp_tunnel_del = i40e_udp_tunnel_del, 10792 .ndo_get_phys_port_id = i40e_get_phys_port_id, 10793 .ndo_fdb_add = i40e_ndo_fdb_add, 10794 .ndo_features_check = i40e_features_check, 10795 .ndo_bridge_getlink = i40e_ndo_bridge_getlink, 10796 .ndo_bridge_setlink = i40e_ndo_bridge_setlink, 10797 .ndo_xdp = i40e_xdp, 10798 }; 10799 10800 /** 10801 * i40e_config_netdev - Setup the netdev flags 10802 * @vsi: the VSI being configured 10803 * 10804 * Returns 0 on success, negative value on failure 10805 **/ 10806 static int i40e_config_netdev(struct i40e_vsi *vsi) 10807 { 10808 struct i40e_pf *pf = vsi->back; 10809 struct i40e_hw *hw = &pf->hw; 10810 struct i40e_netdev_priv *np; 10811 struct net_device *netdev; 10812 u8 broadcast[ETH_ALEN]; 10813 u8 mac_addr[ETH_ALEN]; 10814 int etherdev_size; 10815 netdev_features_t hw_enc_features; 10816 netdev_features_t hw_features; 10817 10818 etherdev_size = sizeof(struct i40e_netdev_priv); 10819 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs); 10820 if (!netdev) 10821 return -ENOMEM; 10822 10823 vsi->netdev = netdev; 10824 np = netdev_priv(netdev); 10825 np->vsi = vsi; 10826 10827 hw_enc_features = NETIF_F_SG | 10828 NETIF_F_IP_CSUM | 10829 NETIF_F_IPV6_CSUM | 10830 NETIF_F_HIGHDMA | 10831 NETIF_F_SOFT_FEATURES | 10832 NETIF_F_TSO | 10833 NETIF_F_TSO_ECN | 10834 NETIF_F_TSO6 | 10835 NETIF_F_GSO_GRE | 10836 NETIF_F_GSO_GRE_CSUM | 10837 NETIF_F_GSO_PARTIAL | 10838 NETIF_F_GSO_UDP_TUNNEL | 10839 NETIF_F_GSO_UDP_TUNNEL_CSUM | 10840 NETIF_F_SCTP_CRC | 10841 NETIF_F_RXHASH | 10842 NETIF_F_RXCSUM | 10843 0; 10844 10845 if (!(pf->hw_features & I40E_HW_OUTER_UDP_CSUM_CAPABLE)) 10846 netdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM; 10847 10848 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM; 10849 10850 netdev->hw_enc_features |= hw_enc_features; 10851 10852 /* record features VLANs can make use of */ 10853 netdev->vlan_features |= hw_enc_features | NETIF_F_TSO_MANGLEID; 10854 10855 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) 10856 netdev->hw_features |= NETIF_F_NTUPLE; 10857 hw_features = hw_enc_features | 10858 NETIF_F_HW_VLAN_CTAG_TX | 10859 NETIF_F_HW_VLAN_CTAG_RX; 10860 10861 netdev->hw_features |= hw_features; 10862 10863 netdev->features |= hw_features | NETIF_F_HW_VLAN_CTAG_FILTER; 10864 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID; 10865 10866 if (vsi->type == I40E_VSI_MAIN) { 10867 SET_NETDEV_DEV(netdev, &pf->pdev->dev); 10868 ether_addr_copy(mac_addr, hw->mac.perm_addr); 10869 /* The following steps are necessary for two reasons. First, 10870 * some older NVM configurations load a default MAC-VLAN 10871 * filter that will accept any tagged packet, and we want to 10872 * replace this with a normal filter. Additionally, it is 10873 * possible our MAC address was provided by the platform using 10874 * Open Firmware or similar. 10875 * 10876 * Thus, we need to remove the default filter and install one 10877 * specific to the MAC address. 10878 */ 10879 i40e_rm_default_mac_filter(vsi, mac_addr); 10880 spin_lock_bh(&vsi->mac_filter_hash_lock); 10881 i40e_add_mac_filter(vsi, mac_addr); 10882 spin_unlock_bh(&vsi->mac_filter_hash_lock); 10883 } else { 10884 /* Relate the VSI_VMDQ name to the VSI_MAIN name. Note that we 10885 * are still limited by IFNAMSIZ, but we're adding 'v%d\0' to 10886 * the end, which is 4 bytes long, so force truncation of the 10887 * original name by IFNAMSIZ - 4 10888 */ 10889 snprintf(netdev->name, IFNAMSIZ, "%.*sv%%d", 10890 IFNAMSIZ - 4, 10891 pf->vsi[pf->lan_vsi]->netdev->name); 10892 random_ether_addr(mac_addr); 10893 10894 spin_lock_bh(&vsi->mac_filter_hash_lock); 10895 i40e_add_mac_filter(vsi, mac_addr); 10896 spin_unlock_bh(&vsi->mac_filter_hash_lock); 10897 } 10898 10899 /* Add the broadcast filter so that we initially will receive 10900 * broadcast packets. Note that when a new VLAN is first added the 10901 * driver will convert all filters marked I40E_VLAN_ANY into VLAN 10902 * specific filters as part of transitioning into "vlan" operation. 10903 * When more VLANs are added, the driver will copy each existing MAC 10904 * filter and add it for the new VLAN. 10905 * 10906 * Broadcast filters are handled specially by 10907 * i40e_sync_filters_subtask, as the driver must to set the broadcast 10908 * promiscuous bit instead of adding this directly as a MAC/VLAN 10909 * filter. The subtask will update the correct broadcast promiscuous 10910 * bits as VLANs become active or inactive. 10911 */ 10912 eth_broadcast_addr(broadcast); 10913 spin_lock_bh(&vsi->mac_filter_hash_lock); 10914 i40e_add_mac_filter(vsi, broadcast); 10915 spin_unlock_bh(&vsi->mac_filter_hash_lock); 10916 10917 ether_addr_copy(netdev->dev_addr, mac_addr); 10918 ether_addr_copy(netdev->perm_addr, mac_addr); 10919 10920 netdev->priv_flags |= IFF_UNICAST_FLT; 10921 netdev->priv_flags |= IFF_SUPP_NOFCS; 10922 /* Setup netdev TC information */ 10923 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc); 10924 10925 netdev->netdev_ops = &i40e_netdev_ops; 10926 netdev->watchdog_timeo = 5 * HZ; 10927 i40e_set_ethtool_ops(netdev); 10928 10929 /* MTU range: 68 - 9706 */ 10930 netdev->min_mtu = ETH_MIN_MTU; 10931 netdev->max_mtu = I40E_MAX_RXBUFFER - I40E_PACKET_HDR_PAD; 10932 10933 return 0; 10934 } 10935 10936 /** 10937 * i40e_vsi_delete - Delete a VSI from the switch 10938 * @vsi: the VSI being removed 10939 * 10940 * Returns 0 on success, negative value on failure 10941 **/ 10942 static void i40e_vsi_delete(struct i40e_vsi *vsi) 10943 { 10944 /* remove default VSI is not allowed */ 10945 if (vsi == vsi->back->vsi[vsi->back->lan_vsi]) 10946 return; 10947 10948 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL); 10949 } 10950 10951 /** 10952 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB 10953 * @vsi: the VSI being queried 10954 * 10955 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode 10956 **/ 10957 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi) 10958 { 10959 struct i40e_veb *veb; 10960 struct i40e_pf *pf = vsi->back; 10961 10962 /* Uplink is not a bridge so default to VEB */ 10963 if (vsi->veb_idx == I40E_NO_VEB) 10964 return 1; 10965 10966 veb = pf->veb[vsi->veb_idx]; 10967 if (!veb) { 10968 dev_info(&pf->pdev->dev, 10969 "There is no veb associated with the bridge\n"); 10970 return -ENOENT; 10971 } 10972 10973 /* Uplink is a bridge in VEPA mode */ 10974 if (veb->bridge_mode & BRIDGE_MODE_VEPA) { 10975 return 0; 10976 } else { 10977 /* Uplink is a bridge in VEB mode */ 10978 return 1; 10979 } 10980 10981 /* VEPA is now default bridge, so return 0 */ 10982 return 0; 10983 } 10984 10985 /** 10986 * i40e_add_vsi - Add a VSI to the switch 10987 * @vsi: the VSI being configured 10988 * 10989 * This initializes a VSI context depending on the VSI type to be added and 10990 * passes it down to the add_vsi aq command. 10991 **/ 10992 static int i40e_add_vsi(struct i40e_vsi *vsi) 10993 { 10994 int ret = -ENODEV; 10995 struct i40e_pf *pf = vsi->back; 10996 struct i40e_hw *hw = &pf->hw; 10997 struct i40e_vsi_context ctxt; 10998 struct i40e_mac_filter *f; 10999 struct hlist_node *h; 11000 int bkt; 11001 11002 u8 enabled_tc = 0x1; /* TC0 enabled */ 11003 int f_count = 0; 11004 11005 memset(&ctxt, 0, sizeof(ctxt)); 11006 switch (vsi->type) { 11007 case I40E_VSI_MAIN: 11008 /* The PF's main VSI is already setup as part of the 11009 * device initialization, so we'll not bother with 11010 * the add_vsi call, but we will retrieve the current 11011 * VSI context. 11012 */ 11013 ctxt.seid = pf->main_vsi_seid; 11014 ctxt.pf_num = pf->hw.pf_id; 11015 ctxt.vf_num = 0; 11016 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL); 11017 ctxt.flags = I40E_AQ_VSI_TYPE_PF; 11018 if (ret) { 11019 dev_info(&pf->pdev->dev, 11020 "couldn't get PF vsi config, err %s aq_err %s\n", 11021 i40e_stat_str(&pf->hw, ret), 11022 i40e_aq_str(&pf->hw, 11023 pf->hw.aq.asq_last_status)); 11024 return -ENOENT; 11025 } 11026 vsi->info = ctxt.info; 11027 vsi->info.valid_sections = 0; 11028 11029 vsi->seid = ctxt.seid; 11030 vsi->id = ctxt.vsi_number; 11031 11032 enabled_tc = i40e_pf_get_tc_map(pf); 11033 11034 /* Source pruning is enabled by default, so the flag is 11035 * negative logic - if it's set, we need to fiddle with 11036 * the VSI to disable source pruning. 11037 */ 11038 if (pf->flags & I40E_FLAG_SOURCE_PRUNING_DISABLED) { 11039 memset(&ctxt, 0, sizeof(ctxt)); 11040 ctxt.seid = pf->main_vsi_seid; 11041 ctxt.pf_num = pf->hw.pf_id; 11042 ctxt.vf_num = 0; 11043 ctxt.info.valid_sections |= 11044 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 11045 ctxt.info.switch_id = 11046 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_LOCAL_LB); 11047 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL); 11048 if (ret) { 11049 dev_info(&pf->pdev->dev, 11050 "update vsi failed, err %s aq_err %s\n", 11051 i40e_stat_str(&pf->hw, ret), 11052 i40e_aq_str(&pf->hw, 11053 pf->hw.aq.asq_last_status)); 11054 ret = -ENOENT; 11055 goto err; 11056 } 11057 } 11058 11059 /* MFP mode setup queue map and update VSI */ 11060 if ((pf->flags & I40E_FLAG_MFP_ENABLED) && 11061 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */ 11062 memset(&ctxt, 0, sizeof(ctxt)); 11063 ctxt.seid = pf->main_vsi_seid; 11064 ctxt.pf_num = pf->hw.pf_id; 11065 ctxt.vf_num = 0; 11066 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false); 11067 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL); 11068 if (ret) { 11069 dev_info(&pf->pdev->dev, 11070 "update vsi failed, err %s aq_err %s\n", 11071 i40e_stat_str(&pf->hw, ret), 11072 i40e_aq_str(&pf->hw, 11073 pf->hw.aq.asq_last_status)); 11074 ret = -ENOENT; 11075 goto err; 11076 } 11077 /* update the local VSI info queue map */ 11078 i40e_vsi_update_queue_map(vsi, &ctxt); 11079 vsi->info.valid_sections = 0; 11080 } else { 11081 /* Default/Main VSI is only enabled for TC0 11082 * reconfigure it to enable all TCs that are 11083 * available on the port in SFP mode. 11084 * For MFP case the iSCSI PF would use this 11085 * flow to enable LAN+iSCSI TC. 11086 */ 11087 ret = i40e_vsi_config_tc(vsi, enabled_tc); 11088 if (ret) { 11089 /* Single TC condition is not fatal, 11090 * message and continue 11091 */ 11092 dev_info(&pf->pdev->dev, 11093 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n", 11094 enabled_tc, 11095 i40e_stat_str(&pf->hw, ret), 11096 i40e_aq_str(&pf->hw, 11097 pf->hw.aq.asq_last_status)); 11098 } 11099 } 11100 break; 11101 11102 case I40E_VSI_FDIR: 11103 ctxt.pf_num = hw->pf_id; 11104 ctxt.vf_num = 0; 11105 ctxt.uplink_seid = vsi->uplink_seid; 11106 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL; 11107 ctxt.flags = I40E_AQ_VSI_TYPE_PF; 11108 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) && 11109 (i40e_is_vsi_uplink_mode_veb(vsi))) { 11110 ctxt.info.valid_sections |= 11111 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 11112 ctxt.info.switch_id = 11113 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 11114 } 11115 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); 11116 break; 11117 11118 case I40E_VSI_VMDQ2: 11119 ctxt.pf_num = hw->pf_id; 11120 ctxt.vf_num = 0; 11121 ctxt.uplink_seid = vsi->uplink_seid; 11122 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL; 11123 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2; 11124 11125 /* This VSI is connected to VEB so the switch_id 11126 * should be set to zero by default. 11127 */ 11128 if (i40e_is_vsi_uplink_mode_veb(vsi)) { 11129 ctxt.info.valid_sections |= 11130 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 11131 ctxt.info.switch_id = 11132 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 11133 } 11134 11135 /* Setup the VSI tx/rx queue map for TC0 only for now */ 11136 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); 11137 break; 11138 11139 case I40E_VSI_SRIOV: 11140 ctxt.pf_num = hw->pf_id; 11141 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id; 11142 ctxt.uplink_seid = vsi->uplink_seid; 11143 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL; 11144 ctxt.flags = I40E_AQ_VSI_TYPE_VF; 11145 11146 /* This VSI is connected to VEB so the switch_id 11147 * should be set to zero by default. 11148 */ 11149 if (i40e_is_vsi_uplink_mode_veb(vsi)) { 11150 ctxt.info.valid_sections |= 11151 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); 11152 ctxt.info.switch_id = 11153 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); 11154 } 11155 11156 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) { 11157 ctxt.info.valid_sections |= 11158 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID); 11159 ctxt.info.queueing_opt_flags |= 11160 (I40E_AQ_VSI_QUE_OPT_TCP_ENA | 11161 I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI); 11162 } 11163 11164 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); 11165 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL; 11166 if (pf->vf[vsi->vf_id].spoofchk) { 11167 ctxt.info.valid_sections |= 11168 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID); 11169 ctxt.info.sec_flags |= 11170 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK | 11171 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK); 11172 } 11173 /* Setup the VSI tx/rx queue map for TC0 only for now */ 11174 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); 11175 break; 11176 11177 case I40E_VSI_IWARP: 11178 /* send down message to iWARP */ 11179 break; 11180 11181 default: 11182 return -ENODEV; 11183 } 11184 11185 if (vsi->type != I40E_VSI_MAIN) { 11186 ret = i40e_aq_add_vsi(hw, &ctxt, NULL); 11187 if (ret) { 11188 dev_info(&vsi->back->pdev->dev, 11189 "add vsi failed, err %s aq_err %s\n", 11190 i40e_stat_str(&pf->hw, ret), 11191 i40e_aq_str(&pf->hw, 11192 pf->hw.aq.asq_last_status)); 11193 ret = -ENOENT; 11194 goto err; 11195 } 11196 vsi->info = ctxt.info; 11197 vsi->info.valid_sections = 0; 11198 vsi->seid = ctxt.seid; 11199 vsi->id = ctxt.vsi_number; 11200 } 11201 11202 vsi->active_filters = 0; 11203 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state); 11204 spin_lock_bh(&vsi->mac_filter_hash_lock); 11205 /* If macvlan filters already exist, force them to get loaded */ 11206 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) { 11207 f->state = I40E_FILTER_NEW; 11208 f_count++; 11209 } 11210 spin_unlock_bh(&vsi->mac_filter_hash_lock); 11211 11212 if (f_count) { 11213 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; 11214 pf->flags |= I40E_FLAG_FILTER_SYNC; 11215 } 11216 11217 /* Update VSI BW information */ 11218 ret = i40e_vsi_get_bw_info(vsi); 11219 if (ret) { 11220 dev_info(&pf->pdev->dev, 11221 "couldn't get vsi bw info, err %s aq_err %s\n", 11222 i40e_stat_str(&pf->hw, ret), 11223 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 11224 /* VSI is already added so not tearing that up */ 11225 ret = 0; 11226 } 11227 11228 err: 11229 return ret; 11230 } 11231 11232 /** 11233 * i40e_vsi_release - Delete a VSI and free its resources 11234 * @vsi: the VSI being removed 11235 * 11236 * Returns 0 on success or < 0 on error 11237 **/ 11238 int i40e_vsi_release(struct i40e_vsi *vsi) 11239 { 11240 struct i40e_mac_filter *f; 11241 struct hlist_node *h; 11242 struct i40e_veb *veb = NULL; 11243 struct i40e_pf *pf; 11244 u16 uplink_seid; 11245 int i, n, bkt; 11246 11247 pf = vsi->back; 11248 11249 /* release of a VEB-owner or last VSI is not allowed */ 11250 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) { 11251 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n", 11252 vsi->seid, vsi->uplink_seid); 11253 return -ENODEV; 11254 } 11255 if (vsi == pf->vsi[pf->lan_vsi] && 11256 !test_bit(__I40E_DOWN, pf->state)) { 11257 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n"); 11258 return -ENODEV; 11259 } 11260 11261 uplink_seid = vsi->uplink_seid; 11262 if (vsi->type != I40E_VSI_SRIOV) { 11263 if (vsi->netdev_registered) { 11264 vsi->netdev_registered = false; 11265 if (vsi->netdev) { 11266 /* results in a call to i40e_close() */ 11267 unregister_netdev(vsi->netdev); 11268 } 11269 } else { 11270 i40e_vsi_close(vsi); 11271 } 11272 i40e_vsi_disable_irq(vsi); 11273 } 11274 11275 spin_lock_bh(&vsi->mac_filter_hash_lock); 11276 11277 /* clear the sync flag on all filters */ 11278 if (vsi->netdev) { 11279 __dev_uc_unsync(vsi->netdev, NULL); 11280 __dev_mc_unsync(vsi->netdev, NULL); 11281 } 11282 11283 /* make sure any remaining filters are marked for deletion */ 11284 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) 11285 __i40e_del_filter(vsi, f); 11286 11287 spin_unlock_bh(&vsi->mac_filter_hash_lock); 11288 11289 i40e_sync_vsi_filters(vsi); 11290 11291 i40e_vsi_delete(vsi); 11292 i40e_vsi_free_q_vectors(vsi); 11293 if (vsi->netdev) { 11294 free_netdev(vsi->netdev); 11295 vsi->netdev = NULL; 11296 } 11297 i40e_vsi_clear_rings(vsi); 11298 i40e_vsi_clear(vsi); 11299 11300 /* If this was the last thing on the VEB, except for the 11301 * controlling VSI, remove the VEB, which puts the controlling 11302 * VSI onto the next level down in the switch. 11303 * 11304 * Well, okay, there's one more exception here: don't remove 11305 * the orphan VEBs yet. We'll wait for an explicit remove request 11306 * from up the network stack. 11307 */ 11308 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) { 11309 if (pf->vsi[i] && 11310 pf->vsi[i]->uplink_seid == uplink_seid && 11311 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) { 11312 n++; /* count the VSIs */ 11313 } 11314 } 11315 for (i = 0; i < I40E_MAX_VEB; i++) { 11316 if (!pf->veb[i]) 11317 continue; 11318 if (pf->veb[i]->uplink_seid == uplink_seid) 11319 n++; /* count the VEBs */ 11320 if (pf->veb[i]->seid == uplink_seid) 11321 veb = pf->veb[i]; 11322 } 11323 if (n == 0 && veb && veb->uplink_seid != 0) 11324 i40e_veb_release(veb); 11325 11326 return 0; 11327 } 11328 11329 /** 11330 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI 11331 * @vsi: ptr to the VSI 11332 * 11333 * This should only be called after i40e_vsi_mem_alloc() which allocates the 11334 * corresponding SW VSI structure and initializes num_queue_pairs for the 11335 * newly allocated VSI. 11336 * 11337 * Returns 0 on success or negative on failure 11338 **/ 11339 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi) 11340 { 11341 int ret = -ENOENT; 11342 struct i40e_pf *pf = vsi->back; 11343 11344 if (vsi->q_vectors[0]) { 11345 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n", 11346 vsi->seid); 11347 return -EEXIST; 11348 } 11349 11350 if (vsi->base_vector) { 11351 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n", 11352 vsi->seid, vsi->base_vector); 11353 return -EEXIST; 11354 } 11355 11356 ret = i40e_vsi_alloc_q_vectors(vsi); 11357 if (ret) { 11358 dev_info(&pf->pdev->dev, 11359 "failed to allocate %d q_vector for VSI %d, ret=%d\n", 11360 vsi->num_q_vectors, vsi->seid, ret); 11361 vsi->num_q_vectors = 0; 11362 goto vector_setup_out; 11363 } 11364 11365 /* In Legacy mode, we do not have to get any other vector since we 11366 * piggyback on the misc/ICR0 for queue interrupts. 11367 */ 11368 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) 11369 return ret; 11370 if (vsi->num_q_vectors) 11371 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile, 11372 vsi->num_q_vectors, vsi->idx); 11373 if (vsi->base_vector < 0) { 11374 dev_info(&pf->pdev->dev, 11375 "failed to get tracking for %d vectors for VSI %d, err=%d\n", 11376 vsi->num_q_vectors, vsi->seid, vsi->base_vector); 11377 i40e_vsi_free_q_vectors(vsi); 11378 ret = -ENOENT; 11379 goto vector_setup_out; 11380 } 11381 11382 vector_setup_out: 11383 return ret; 11384 } 11385 11386 /** 11387 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI 11388 * @vsi: pointer to the vsi. 11389 * 11390 * This re-allocates a vsi's queue resources. 11391 * 11392 * Returns pointer to the successfully allocated and configured VSI sw struct 11393 * on success, otherwise returns NULL on failure. 11394 **/ 11395 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi) 11396 { 11397 u16 alloc_queue_pairs; 11398 struct i40e_pf *pf; 11399 u8 enabled_tc; 11400 int ret; 11401 11402 if (!vsi) 11403 return NULL; 11404 11405 pf = vsi->back; 11406 11407 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx); 11408 i40e_vsi_clear_rings(vsi); 11409 11410 i40e_vsi_free_arrays(vsi, false); 11411 i40e_set_num_rings_in_vsi(vsi); 11412 ret = i40e_vsi_alloc_arrays(vsi, false); 11413 if (ret) 11414 goto err_vsi; 11415 11416 alloc_queue_pairs = vsi->alloc_queue_pairs * 11417 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1); 11418 11419 ret = i40e_get_lump(pf, pf->qp_pile, alloc_queue_pairs, vsi->idx); 11420 if (ret < 0) { 11421 dev_info(&pf->pdev->dev, 11422 "failed to get tracking for %d queues for VSI %d err %d\n", 11423 alloc_queue_pairs, vsi->seid, ret); 11424 goto err_vsi; 11425 } 11426 vsi->base_queue = ret; 11427 11428 /* Update the FW view of the VSI. Force a reset of TC and queue 11429 * layout configurations. 11430 */ 11431 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc; 11432 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0; 11433 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid; 11434 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc); 11435 if (vsi->type == I40E_VSI_MAIN) 11436 i40e_rm_default_mac_filter(vsi, pf->hw.mac.perm_addr); 11437 11438 /* assign it some queues */ 11439 ret = i40e_alloc_rings(vsi); 11440 if (ret) 11441 goto err_rings; 11442 11443 /* map all of the rings to the q_vectors */ 11444 i40e_vsi_map_rings_to_vectors(vsi); 11445 return vsi; 11446 11447 err_rings: 11448 i40e_vsi_free_q_vectors(vsi); 11449 if (vsi->netdev_registered) { 11450 vsi->netdev_registered = false; 11451 unregister_netdev(vsi->netdev); 11452 free_netdev(vsi->netdev); 11453 vsi->netdev = NULL; 11454 } 11455 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL); 11456 err_vsi: 11457 i40e_vsi_clear(vsi); 11458 return NULL; 11459 } 11460 11461 /** 11462 * i40e_vsi_setup - Set up a VSI by a given type 11463 * @pf: board private structure 11464 * @type: VSI type 11465 * @uplink_seid: the switch element to link to 11466 * @param1: usage depends upon VSI type. For VF types, indicates VF id 11467 * 11468 * This allocates the sw VSI structure and its queue resources, then add a VSI 11469 * to the identified VEB. 11470 * 11471 * Returns pointer to the successfully allocated and configure VSI sw struct on 11472 * success, otherwise returns NULL on failure. 11473 **/ 11474 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type, 11475 u16 uplink_seid, u32 param1) 11476 { 11477 struct i40e_vsi *vsi = NULL; 11478 struct i40e_veb *veb = NULL; 11479 u16 alloc_queue_pairs; 11480 int ret, i; 11481 int v_idx; 11482 11483 /* The requested uplink_seid must be either 11484 * - the PF's port seid 11485 * no VEB is needed because this is the PF 11486 * or this is a Flow Director special case VSI 11487 * - seid of an existing VEB 11488 * - seid of a VSI that owns an existing VEB 11489 * - seid of a VSI that doesn't own a VEB 11490 * a new VEB is created and the VSI becomes the owner 11491 * - seid of the PF VSI, which is what creates the first VEB 11492 * this is a special case of the previous 11493 * 11494 * Find which uplink_seid we were given and create a new VEB if needed 11495 */ 11496 for (i = 0; i < I40E_MAX_VEB; i++) { 11497 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) { 11498 veb = pf->veb[i]; 11499 break; 11500 } 11501 } 11502 11503 if (!veb && uplink_seid != pf->mac_seid) { 11504 11505 for (i = 0; i < pf->num_alloc_vsi; i++) { 11506 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) { 11507 vsi = pf->vsi[i]; 11508 break; 11509 } 11510 } 11511 if (!vsi) { 11512 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n", 11513 uplink_seid); 11514 return NULL; 11515 } 11516 11517 if (vsi->uplink_seid == pf->mac_seid) 11518 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid, 11519 vsi->tc_config.enabled_tc); 11520 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) 11521 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid, 11522 vsi->tc_config.enabled_tc); 11523 if (veb) { 11524 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) { 11525 dev_info(&vsi->back->pdev->dev, 11526 "New VSI creation error, uplink seid of LAN VSI expected.\n"); 11527 return NULL; 11528 } 11529 /* We come up by default in VEPA mode if SRIOV is not 11530 * already enabled, in which case we can't force VEPA 11531 * mode. 11532 */ 11533 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) { 11534 veb->bridge_mode = BRIDGE_MODE_VEPA; 11535 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED; 11536 } 11537 i40e_config_bridge_mode(veb); 11538 } 11539 for (i = 0; i < I40E_MAX_VEB && !veb; i++) { 11540 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid) 11541 veb = pf->veb[i]; 11542 } 11543 if (!veb) { 11544 dev_info(&pf->pdev->dev, "couldn't add VEB\n"); 11545 return NULL; 11546 } 11547 11548 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER; 11549 uplink_seid = veb->seid; 11550 } 11551 11552 /* get vsi sw struct */ 11553 v_idx = i40e_vsi_mem_alloc(pf, type); 11554 if (v_idx < 0) 11555 goto err_alloc; 11556 vsi = pf->vsi[v_idx]; 11557 if (!vsi) 11558 goto err_alloc; 11559 vsi->type = type; 11560 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB); 11561 11562 if (type == I40E_VSI_MAIN) 11563 pf->lan_vsi = v_idx; 11564 else if (type == I40E_VSI_SRIOV) 11565 vsi->vf_id = param1; 11566 /* assign it some queues */ 11567 alloc_queue_pairs = vsi->alloc_queue_pairs * 11568 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1); 11569 11570 ret = i40e_get_lump(pf, pf->qp_pile, alloc_queue_pairs, vsi->idx); 11571 if (ret < 0) { 11572 dev_info(&pf->pdev->dev, 11573 "failed to get tracking for %d queues for VSI %d err=%d\n", 11574 alloc_queue_pairs, vsi->seid, ret); 11575 goto err_vsi; 11576 } 11577 vsi->base_queue = ret; 11578 11579 /* get a VSI from the hardware */ 11580 vsi->uplink_seid = uplink_seid; 11581 ret = i40e_add_vsi(vsi); 11582 if (ret) 11583 goto err_vsi; 11584 11585 switch (vsi->type) { 11586 /* setup the netdev if needed */ 11587 case I40E_VSI_MAIN: 11588 case I40E_VSI_VMDQ2: 11589 ret = i40e_config_netdev(vsi); 11590 if (ret) 11591 goto err_netdev; 11592 ret = register_netdev(vsi->netdev); 11593 if (ret) 11594 goto err_netdev; 11595 vsi->netdev_registered = true; 11596 netif_carrier_off(vsi->netdev); 11597 #ifdef CONFIG_I40E_DCB 11598 /* Setup DCB netlink interface */ 11599 i40e_dcbnl_setup(vsi); 11600 #endif /* CONFIG_I40E_DCB */ 11601 /* fall through */ 11602 11603 case I40E_VSI_FDIR: 11604 /* set up vectors and rings if needed */ 11605 ret = i40e_vsi_setup_vectors(vsi); 11606 if (ret) 11607 goto err_msix; 11608 11609 ret = i40e_alloc_rings(vsi); 11610 if (ret) 11611 goto err_rings; 11612 11613 /* map all of the rings to the q_vectors */ 11614 i40e_vsi_map_rings_to_vectors(vsi); 11615 11616 i40e_vsi_reset_stats(vsi); 11617 break; 11618 11619 default: 11620 /* no netdev or rings for the other VSI types */ 11621 break; 11622 } 11623 11624 if ((pf->hw_features & I40E_HW_RSS_AQ_CAPABLE) && 11625 (vsi->type == I40E_VSI_VMDQ2)) { 11626 ret = i40e_vsi_config_rss(vsi); 11627 } 11628 return vsi; 11629 11630 err_rings: 11631 i40e_vsi_free_q_vectors(vsi); 11632 err_msix: 11633 if (vsi->netdev_registered) { 11634 vsi->netdev_registered = false; 11635 unregister_netdev(vsi->netdev); 11636 free_netdev(vsi->netdev); 11637 vsi->netdev = NULL; 11638 } 11639 err_netdev: 11640 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL); 11641 err_vsi: 11642 i40e_vsi_clear(vsi); 11643 err_alloc: 11644 return NULL; 11645 } 11646 11647 /** 11648 * i40e_veb_get_bw_info - Query VEB BW information 11649 * @veb: the veb to query 11650 * 11651 * Query the Tx scheduler BW configuration data for given VEB 11652 **/ 11653 static int i40e_veb_get_bw_info(struct i40e_veb *veb) 11654 { 11655 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data; 11656 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data; 11657 struct i40e_pf *pf = veb->pf; 11658 struct i40e_hw *hw = &pf->hw; 11659 u32 tc_bw_max; 11660 int ret = 0; 11661 int i; 11662 11663 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid, 11664 &bw_data, NULL); 11665 if (ret) { 11666 dev_info(&pf->pdev->dev, 11667 "query veb bw config failed, err %s aq_err %s\n", 11668 i40e_stat_str(&pf->hw, ret), 11669 i40e_aq_str(&pf->hw, hw->aq.asq_last_status)); 11670 goto out; 11671 } 11672 11673 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid, 11674 &ets_data, NULL); 11675 if (ret) { 11676 dev_info(&pf->pdev->dev, 11677 "query veb bw ets config failed, err %s aq_err %s\n", 11678 i40e_stat_str(&pf->hw, ret), 11679 i40e_aq_str(&pf->hw, hw->aq.asq_last_status)); 11680 goto out; 11681 } 11682 11683 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit); 11684 veb->bw_max_quanta = ets_data.tc_bw_max; 11685 veb->is_abs_credits = bw_data.absolute_credits_enable; 11686 veb->enabled_tc = ets_data.tc_valid_bits; 11687 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) | 11688 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16); 11689 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 11690 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i]; 11691 veb->bw_tc_limit_credits[i] = 11692 le16_to_cpu(bw_data.tc_bw_limits[i]); 11693 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7); 11694 } 11695 11696 out: 11697 return ret; 11698 } 11699 11700 /** 11701 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF 11702 * @pf: board private structure 11703 * 11704 * On error: returns error code (negative) 11705 * On success: returns vsi index in PF (positive) 11706 **/ 11707 static int i40e_veb_mem_alloc(struct i40e_pf *pf) 11708 { 11709 int ret = -ENOENT; 11710 struct i40e_veb *veb; 11711 int i; 11712 11713 /* Need to protect the allocation of switch elements at the PF level */ 11714 mutex_lock(&pf->switch_mutex); 11715 11716 /* VEB list may be fragmented if VEB creation/destruction has 11717 * been happening. We can afford to do a quick scan to look 11718 * for any free slots in the list. 11719 * 11720 * find next empty veb slot, looping back around if necessary 11721 */ 11722 i = 0; 11723 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL)) 11724 i++; 11725 if (i >= I40E_MAX_VEB) { 11726 ret = -ENOMEM; 11727 goto err_alloc_veb; /* out of VEB slots! */ 11728 } 11729 11730 veb = kzalloc(sizeof(*veb), GFP_KERNEL); 11731 if (!veb) { 11732 ret = -ENOMEM; 11733 goto err_alloc_veb; 11734 } 11735 veb->pf = pf; 11736 veb->idx = i; 11737 veb->enabled_tc = 1; 11738 11739 pf->veb[i] = veb; 11740 ret = i; 11741 err_alloc_veb: 11742 mutex_unlock(&pf->switch_mutex); 11743 return ret; 11744 } 11745 11746 /** 11747 * i40e_switch_branch_release - Delete a branch of the switch tree 11748 * @branch: where to start deleting 11749 * 11750 * This uses recursion to find the tips of the branch to be 11751 * removed, deleting until we get back to and can delete this VEB. 11752 **/ 11753 static void i40e_switch_branch_release(struct i40e_veb *branch) 11754 { 11755 struct i40e_pf *pf = branch->pf; 11756 u16 branch_seid = branch->seid; 11757 u16 veb_idx = branch->idx; 11758 int i; 11759 11760 /* release any VEBs on this VEB - RECURSION */ 11761 for (i = 0; i < I40E_MAX_VEB; i++) { 11762 if (!pf->veb[i]) 11763 continue; 11764 if (pf->veb[i]->uplink_seid == branch->seid) 11765 i40e_switch_branch_release(pf->veb[i]); 11766 } 11767 11768 /* Release the VSIs on this VEB, but not the owner VSI. 11769 * 11770 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing 11771 * the VEB itself, so don't use (*branch) after this loop. 11772 */ 11773 for (i = 0; i < pf->num_alloc_vsi; i++) { 11774 if (!pf->vsi[i]) 11775 continue; 11776 if (pf->vsi[i]->uplink_seid == branch_seid && 11777 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) { 11778 i40e_vsi_release(pf->vsi[i]); 11779 } 11780 } 11781 11782 /* There's one corner case where the VEB might not have been 11783 * removed, so double check it here and remove it if needed. 11784 * This case happens if the veb was created from the debugfs 11785 * commands and no VSIs were added to it. 11786 */ 11787 if (pf->veb[veb_idx]) 11788 i40e_veb_release(pf->veb[veb_idx]); 11789 } 11790 11791 /** 11792 * i40e_veb_clear - remove veb struct 11793 * @veb: the veb to remove 11794 **/ 11795 static void i40e_veb_clear(struct i40e_veb *veb) 11796 { 11797 if (!veb) 11798 return; 11799 11800 if (veb->pf) { 11801 struct i40e_pf *pf = veb->pf; 11802 11803 mutex_lock(&pf->switch_mutex); 11804 if (pf->veb[veb->idx] == veb) 11805 pf->veb[veb->idx] = NULL; 11806 mutex_unlock(&pf->switch_mutex); 11807 } 11808 11809 kfree(veb); 11810 } 11811 11812 /** 11813 * i40e_veb_release - Delete a VEB and free its resources 11814 * @veb: the VEB being removed 11815 **/ 11816 void i40e_veb_release(struct i40e_veb *veb) 11817 { 11818 struct i40e_vsi *vsi = NULL; 11819 struct i40e_pf *pf; 11820 int i, n = 0; 11821 11822 pf = veb->pf; 11823 11824 /* find the remaining VSI and check for extras */ 11825 for (i = 0; i < pf->num_alloc_vsi; i++) { 11826 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) { 11827 n++; 11828 vsi = pf->vsi[i]; 11829 } 11830 } 11831 if (n != 1) { 11832 dev_info(&pf->pdev->dev, 11833 "can't remove VEB %d with %d VSIs left\n", 11834 veb->seid, n); 11835 return; 11836 } 11837 11838 /* move the remaining VSI to uplink veb */ 11839 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER; 11840 if (veb->uplink_seid) { 11841 vsi->uplink_seid = veb->uplink_seid; 11842 if (veb->uplink_seid == pf->mac_seid) 11843 vsi->veb_idx = I40E_NO_VEB; 11844 else 11845 vsi->veb_idx = veb->veb_idx; 11846 } else { 11847 /* floating VEB */ 11848 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid; 11849 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx; 11850 } 11851 11852 i40e_aq_delete_element(&pf->hw, veb->seid, NULL); 11853 i40e_veb_clear(veb); 11854 } 11855 11856 /** 11857 * i40e_add_veb - create the VEB in the switch 11858 * @veb: the VEB to be instantiated 11859 * @vsi: the controlling VSI 11860 **/ 11861 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi) 11862 { 11863 struct i40e_pf *pf = veb->pf; 11864 bool enable_stats = !!(pf->flags & I40E_FLAG_VEB_STATS_ENABLED); 11865 int ret; 11866 11867 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid, 11868 veb->enabled_tc, false, 11869 &veb->seid, enable_stats, NULL); 11870 11871 /* get a VEB from the hardware */ 11872 if (ret) { 11873 dev_info(&pf->pdev->dev, 11874 "couldn't add VEB, err %s aq_err %s\n", 11875 i40e_stat_str(&pf->hw, ret), 11876 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 11877 return -EPERM; 11878 } 11879 11880 /* get statistics counter */ 11881 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL, 11882 &veb->stats_idx, NULL, NULL, NULL); 11883 if (ret) { 11884 dev_info(&pf->pdev->dev, 11885 "couldn't get VEB statistics idx, err %s aq_err %s\n", 11886 i40e_stat_str(&pf->hw, ret), 11887 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 11888 return -EPERM; 11889 } 11890 ret = i40e_veb_get_bw_info(veb); 11891 if (ret) { 11892 dev_info(&pf->pdev->dev, 11893 "couldn't get VEB bw info, err %s aq_err %s\n", 11894 i40e_stat_str(&pf->hw, ret), 11895 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 11896 i40e_aq_delete_element(&pf->hw, veb->seid, NULL); 11897 return -ENOENT; 11898 } 11899 11900 vsi->uplink_seid = veb->seid; 11901 vsi->veb_idx = veb->idx; 11902 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER; 11903 11904 return 0; 11905 } 11906 11907 /** 11908 * i40e_veb_setup - Set up a VEB 11909 * @pf: board private structure 11910 * @flags: VEB setup flags 11911 * @uplink_seid: the switch element to link to 11912 * @vsi_seid: the initial VSI seid 11913 * @enabled_tc: Enabled TC bit-map 11914 * 11915 * This allocates the sw VEB structure and links it into the switch 11916 * It is possible and legal for this to be a duplicate of an already 11917 * existing VEB. It is also possible for both uplink and vsi seids 11918 * to be zero, in order to create a floating VEB. 11919 * 11920 * Returns pointer to the successfully allocated VEB sw struct on 11921 * success, otherwise returns NULL on failure. 11922 **/ 11923 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, 11924 u16 uplink_seid, u16 vsi_seid, 11925 u8 enabled_tc) 11926 { 11927 struct i40e_veb *veb, *uplink_veb = NULL; 11928 int vsi_idx, veb_idx; 11929 int ret; 11930 11931 /* if one seid is 0, the other must be 0 to create a floating relay */ 11932 if ((uplink_seid == 0 || vsi_seid == 0) && 11933 (uplink_seid + vsi_seid != 0)) { 11934 dev_info(&pf->pdev->dev, 11935 "one, not both seid's are 0: uplink=%d vsi=%d\n", 11936 uplink_seid, vsi_seid); 11937 return NULL; 11938 } 11939 11940 /* make sure there is such a vsi and uplink */ 11941 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++) 11942 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid) 11943 break; 11944 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) { 11945 dev_info(&pf->pdev->dev, "vsi seid %d not found\n", 11946 vsi_seid); 11947 return NULL; 11948 } 11949 11950 if (uplink_seid && uplink_seid != pf->mac_seid) { 11951 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) { 11952 if (pf->veb[veb_idx] && 11953 pf->veb[veb_idx]->seid == uplink_seid) { 11954 uplink_veb = pf->veb[veb_idx]; 11955 break; 11956 } 11957 } 11958 if (!uplink_veb) { 11959 dev_info(&pf->pdev->dev, 11960 "uplink seid %d not found\n", uplink_seid); 11961 return NULL; 11962 } 11963 } 11964 11965 /* get veb sw struct */ 11966 veb_idx = i40e_veb_mem_alloc(pf); 11967 if (veb_idx < 0) 11968 goto err_alloc; 11969 veb = pf->veb[veb_idx]; 11970 veb->flags = flags; 11971 veb->uplink_seid = uplink_seid; 11972 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB); 11973 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1); 11974 11975 /* create the VEB in the switch */ 11976 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]); 11977 if (ret) 11978 goto err_veb; 11979 if (vsi_idx == pf->lan_vsi) 11980 pf->lan_veb = veb->idx; 11981 11982 return veb; 11983 11984 err_veb: 11985 i40e_veb_clear(veb); 11986 err_alloc: 11987 return NULL; 11988 } 11989 11990 /** 11991 * i40e_setup_pf_switch_element - set PF vars based on switch type 11992 * @pf: board private structure 11993 * @ele: element we are building info from 11994 * @num_reported: total number of elements 11995 * @printconfig: should we print the contents 11996 * 11997 * helper function to assist in extracting a few useful SEID values. 11998 **/ 11999 static void i40e_setup_pf_switch_element(struct i40e_pf *pf, 12000 struct i40e_aqc_switch_config_element_resp *ele, 12001 u16 num_reported, bool printconfig) 12002 { 12003 u16 downlink_seid = le16_to_cpu(ele->downlink_seid); 12004 u16 uplink_seid = le16_to_cpu(ele->uplink_seid); 12005 u8 element_type = ele->element_type; 12006 u16 seid = le16_to_cpu(ele->seid); 12007 12008 if (printconfig) 12009 dev_info(&pf->pdev->dev, 12010 "type=%d seid=%d uplink=%d downlink=%d\n", 12011 element_type, seid, uplink_seid, downlink_seid); 12012 12013 switch (element_type) { 12014 case I40E_SWITCH_ELEMENT_TYPE_MAC: 12015 pf->mac_seid = seid; 12016 break; 12017 case I40E_SWITCH_ELEMENT_TYPE_VEB: 12018 /* Main VEB? */ 12019 if (uplink_seid != pf->mac_seid) 12020 break; 12021 if (pf->lan_veb == I40E_NO_VEB) { 12022 int v; 12023 12024 /* find existing or else empty VEB */ 12025 for (v = 0; v < I40E_MAX_VEB; v++) { 12026 if (pf->veb[v] && (pf->veb[v]->seid == seid)) { 12027 pf->lan_veb = v; 12028 break; 12029 } 12030 } 12031 if (pf->lan_veb == I40E_NO_VEB) { 12032 v = i40e_veb_mem_alloc(pf); 12033 if (v < 0) 12034 break; 12035 pf->lan_veb = v; 12036 } 12037 } 12038 12039 pf->veb[pf->lan_veb]->seid = seid; 12040 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid; 12041 pf->veb[pf->lan_veb]->pf = pf; 12042 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB; 12043 break; 12044 case I40E_SWITCH_ELEMENT_TYPE_VSI: 12045 if (num_reported != 1) 12046 break; 12047 /* This is immediately after a reset so we can assume this is 12048 * the PF's VSI 12049 */ 12050 pf->mac_seid = uplink_seid; 12051 pf->pf_seid = downlink_seid; 12052 pf->main_vsi_seid = seid; 12053 if (printconfig) 12054 dev_info(&pf->pdev->dev, 12055 "pf_seid=%d main_vsi_seid=%d\n", 12056 pf->pf_seid, pf->main_vsi_seid); 12057 break; 12058 case I40E_SWITCH_ELEMENT_TYPE_PF: 12059 case I40E_SWITCH_ELEMENT_TYPE_VF: 12060 case I40E_SWITCH_ELEMENT_TYPE_EMP: 12061 case I40E_SWITCH_ELEMENT_TYPE_BMC: 12062 case I40E_SWITCH_ELEMENT_TYPE_PE: 12063 case I40E_SWITCH_ELEMENT_TYPE_PA: 12064 /* ignore these for now */ 12065 break; 12066 default: 12067 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n", 12068 element_type, seid); 12069 break; 12070 } 12071 } 12072 12073 /** 12074 * i40e_fetch_switch_configuration - Get switch config from firmware 12075 * @pf: board private structure 12076 * @printconfig: should we print the contents 12077 * 12078 * Get the current switch configuration from the device and 12079 * extract a few useful SEID values. 12080 **/ 12081 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig) 12082 { 12083 struct i40e_aqc_get_switch_config_resp *sw_config; 12084 u16 next_seid = 0; 12085 int ret = 0; 12086 u8 *aq_buf; 12087 int i; 12088 12089 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL); 12090 if (!aq_buf) 12091 return -ENOMEM; 12092 12093 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf; 12094 do { 12095 u16 num_reported, num_total; 12096 12097 ret = i40e_aq_get_switch_config(&pf->hw, sw_config, 12098 I40E_AQ_LARGE_BUF, 12099 &next_seid, NULL); 12100 if (ret) { 12101 dev_info(&pf->pdev->dev, 12102 "get switch config failed err %s aq_err %s\n", 12103 i40e_stat_str(&pf->hw, ret), 12104 i40e_aq_str(&pf->hw, 12105 pf->hw.aq.asq_last_status)); 12106 kfree(aq_buf); 12107 return -ENOENT; 12108 } 12109 12110 num_reported = le16_to_cpu(sw_config->header.num_reported); 12111 num_total = le16_to_cpu(sw_config->header.num_total); 12112 12113 if (printconfig) 12114 dev_info(&pf->pdev->dev, 12115 "header: %d reported %d total\n", 12116 num_reported, num_total); 12117 12118 for (i = 0; i < num_reported; i++) { 12119 struct i40e_aqc_switch_config_element_resp *ele = 12120 &sw_config->element[i]; 12121 12122 i40e_setup_pf_switch_element(pf, ele, num_reported, 12123 printconfig); 12124 } 12125 } while (next_seid != 0); 12126 12127 kfree(aq_buf); 12128 return ret; 12129 } 12130 12131 /** 12132 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset 12133 * @pf: board private structure 12134 * @reinit: if the Main VSI needs to re-initialized. 12135 * 12136 * Returns 0 on success, negative value on failure 12137 **/ 12138 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit) 12139 { 12140 u16 flags = 0; 12141 int ret; 12142 12143 /* find out what's out there already */ 12144 ret = i40e_fetch_switch_configuration(pf, false); 12145 if (ret) { 12146 dev_info(&pf->pdev->dev, 12147 "couldn't fetch switch config, err %s aq_err %s\n", 12148 i40e_stat_str(&pf->hw, ret), 12149 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 12150 return ret; 12151 } 12152 i40e_pf_reset_stats(pf); 12153 12154 /* set the switch config bit for the whole device to 12155 * support limited promisc or true promisc 12156 * when user requests promisc. The default is limited 12157 * promisc. 12158 */ 12159 12160 if ((pf->hw.pf_id == 0) && 12161 !(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) 12162 flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 12163 12164 if (pf->hw.pf_id == 0) { 12165 u16 valid_flags; 12166 12167 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 12168 ret = i40e_aq_set_switch_config(&pf->hw, flags, valid_flags, 12169 NULL); 12170 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) { 12171 dev_info(&pf->pdev->dev, 12172 "couldn't set switch config bits, err %s aq_err %s\n", 12173 i40e_stat_str(&pf->hw, ret), 12174 i40e_aq_str(&pf->hw, 12175 pf->hw.aq.asq_last_status)); 12176 /* not a fatal problem, just keep going */ 12177 } 12178 } 12179 12180 /* first time setup */ 12181 if (pf->lan_vsi == I40E_NO_VSI || reinit) { 12182 struct i40e_vsi *vsi = NULL; 12183 u16 uplink_seid; 12184 12185 /* Set up the PF VSI associated with the PF's main VSI 12186 * that is already in the HW switch 12187 */ 12188 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb]) 12189 uplink_seid = pf->veb[pf->lan_veb]->seid; 12190 else 12191 uplink_seid = pf->mac_seid; 12192 if (pf->lan_vsi == I40E_NO_VSI) 12193 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0); 12194 else if (reinit) 12195 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]); 12196 if (!vsi) { 12197 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n"); 12198 i40e_fdir_teardown(pf); 12199 return -EAGAIN; 12200 } 12201 } else { 12202 /* force a reset of TC and queue layout configurations */ 12203 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc; 12204 12205 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0; 12206 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid; 12207 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc); 12208 } 12209 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]); 12210 12211 i40e_fdir_sb_setup(pf); 12212 12213 /* Setup static PF queue filter control settings */ 12214 ret = i40e_setup_pf_filter_control(pf); 12215 if (ret) { 12216 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n", 12217 ret); 12218 /* Failure here should not stop continuing other steps */ 12219 } 12220 12221 /* enable RSS in the HW, even for only one queue, as the stack can use 12222 * the hash 12223 */ 12224 if ((pf->flags & I40E_FLAG_RSS_ENABLED)) 12225 i40e_pf_config_rss(pf); 12226 12227 /* fill in link information and enable LSE reporting */ 12228 i40e_link_event(pf); 12229 12230 /* Initialize user-specific link properties */ 12231 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info & 12232 I40E_AQ_AN_COMPLETED) ? true : false); 12233 12234 i40e_ptp_init(pf); 12235 12236 /* repopulate tunnel port filters */ 12237 i40e_sync_udp_filters(pf); 12238 12239 return ret; 12240 } 12241 12242 /** 12243 * i40e_determine_queue_usage - Work out queue distribution 12244 * @pf: board private structure 12245 **/ 12246 static void i40e_determine_queue_usage(struct i40e_pf *pf) 12247 { 12248 int queues_left; 12249 int q_max; 12250 12251 pf->num_lan_qps = 0; 12252 12253 /* Find the max queues to be put into basic use. We'll always be 12254 * using TC0, whether or not DCB is running, and TC0 will get the 12255 * big RSS set. 12256 */ 12257 queues_left = pf->hw.func_caps.num_tx_qp; 12258 12259 if ((queues_left == 1) || 12260 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) { 12261 /* one qp for PF, no queues for anything else */ 12262 queues_left = 0; 12263 pf->alloc_rss_size = pf->num_lan_qps = 1; 12264 12265 /* make sure all the fancies are disabled */ 12266 pf->flags &= ~(I40E_FLAG_RSS_ENABLED | 12267 I40E_FLAG_IWARP_ENABLED | 12268 I40E_FLAG_FD_SB_ENABLED | 12269 I40E_FLAG_FD_ATR_ENABLED | 12270 I40E_FLAG_DCB_CAPABLE | 12271 I40E_FLAG_DCB_ENABLED | 12272 I40E_FLAG_SRIOV_ENABLED | 12273 I40E_FLAG_VMDQ_ENABLED); 12274 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED | 12275 I40E_FLAG_FD_SB_ENABLED | 12276 I40E_FLAG_FD_ATR_ENABLED | 12277 I40E_FLAG_DCB_CAPABLE))) { 12278 /* one qp for PF */ 12279 pf->alloc_rss_size = pf->num_lan_qps = 1; 12280 queues_left -= pf->num_lan_qps; 12281 12282 pf->flags &= ~(I40E_FLAG_RSS_ENABLED | 12283 I40E_FLAG_IWARP_ENABLED | 12284 I40E_FLAG_FD_SB_ENABLED | 12285 I40E_FLAG_FD_ATR_ENABLED | 12286 I40E_FLAG_DCB_ENABLED | 12287 I40E_FLAG_VMDQ_ENABLED); 12288 } else { 12289 /* Not enough queues for all TCs */ 12290 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) && 12291 (queues_left < I40E_MAX_TRAFFIC_CLASS)) { 12292 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE | 12293 I40E_FLAG_DCB_ENABLED); 12294 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n"); 12295 } 12296 12297 /* limit lan qps to the smaller of qps, cpus or msix */ 12298 q_max = max_t(int, pf->rss_size_max, num_online_cpus()); 12299 q_max = min_t(int, q_max, pf->hw.func_caps.num_tx_qp); 12300 q_max = min_t(int, q_max, pf->hw.func_caps.num_msix_vectors); 12301 pf->num_lan_qps = q_max; 12302 12303 queues_left -= pf->num_lan_qps; 12304 } 12305 12306 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { 12307 if (queues_left > 1) { 12308 queues_left -= 1; /* save 1 queue for FD */ 12309 } else { 12310 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; 12311 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n"); 12312 } 12313 } 12314 12315 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) && 12316 pf->num_vf_qps && pf->num_req_vfs && queues_left) { 12317 pf->num_req_vfs = min_t(int, pf->num_req_vfs, 12318 (queues_left / pf->num_vf_qps)); 12319 queues_left -= (pf->num_req_vfs * pf->num_vf_qps); 12320 } 12321 12322 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) && 12323 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) { 12324 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis, 12325 (queues_left / pf->num_vmdq_qps)); 12326 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps); 12327 } 12328 12329 pf->queues_left = queues_left; 12330 dev_dbg(&pf->pdev->dev, 12331 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n", 12332 pf->hw.func_caps.num_tx_qp, 12333 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED), 12334 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs, 12335 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps, 12336 queues_left); 12337 } 12338 12339 /** 12340 * i40e_setup_pf_filter_control - Setup PF static filter control 12341 * @pf: PF to be setup 12342 * 12343 * i40e_setup_pf_filter_control sets up a PF's initial filter control 12344 * settings. If PE/FCoE are enabled then it will also set the per PF 12345 * based filter sizes required for them. It also enables Flow director, 12346 * ethertype and macvlan type filter settings for the pf. 12347 * 12348 * Returns 0 on success, negative on failure 12349 **/ 12350 static int i40e_setup_pf_filter_control(struct i40e_pf *pf) 12351 { 12352 struct i40e_filter_control_settings *settings = &pf->filter_settings; 12353 12354 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128; 12355 12356 /* Flow Director is enabled */ 12357 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)) 12358 settings->enable_fdir = true; 12359 12360 /* Ethtype and MACVLAN filters enabled for PF */ 12361 settings->enable_ethtype = true; 12362 settings->enable_macvlan = true; 12363 12364 if (i40e_set_filter_control(&pf->hw, settings)) 12365 return -ENOENT; 12366 12367 return 0; 12368 } 12369 12370 #define INFO_STRING_LEN 255 12371 #define REMAIN(__x) (INFO_STRING_LEN - (__x)) 12372 static void i40e_print_features(struct i40e_pf *pf) 12373 { 12374 struct i40e_hw *hw = &pf->hw; 12375 char *buf; 12376 int i; 12377 12378 buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL); 12379 if (!buf) 12380 return; 12381 12382 i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id); 12383 #ifdef CONFIG_PCI_IOV 12384 i += snprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs); 12385 #endif 12386 i += snprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d", 12387 pf->hw.func_caps.num_vsis, 12388 pf->vsi[pf->lan_vsi]->num_queue_pairs); 12389 if (pf->flags & I40E_FLAG_RSS_ENABLED) 12390 i += snprintf(&buf[i], REMAIN(i), " RSS"); 12391 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED) 12392 i += snprintf(&buf[i], REMAIN(i), " FD_ATR"); 12393 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { 12394 i += snprintf(&buf[i], REMAIN(i), " FD_SB"); 12395 i += snprintf(&buf[i], REMAIN(i), " NTUPLE"); 12396 } 12397 if (pf->flags & I40E_FLAG_DCB_CAPABLE) 12398 i += snprintf(&buf[i], REMAIN(i), " DCB"); 12399 i += snprintf(&buf[i], REMAIN(i), " VxLAN"); 12400 i += snprintf(&buf[i], REMAIN(i), " Geneve"); 12401 if (pf->flags & I40E_FLAG_PTP) 12402 i += snprintf(&buf[i], REMAIN(i), " PTP"); 12403 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED) 12404 i += snprintf(&buf[i], REMAIN(i), " VEB"); 12405 else 12406 i += snprintf(&buf[i], REMAIN(i), " VEPA"); 12407 12408 dev_info(&pf->pdev->dev, "%s\n", buf); 12409 kfree(buf); 12410 WARN_ON(i > INFO_STRING_LEN); 12411 } 12412 12413 /** 12414 * i40e_get_platform_mac_addr - get platform-specific MAC address 12415 * @pdev: PCI device information struct 12416 * @pf: board private structure 12417 * 12418 * Look up the MAC address for the device. First we'll try 12419 * eth_platform_get_mac_address, which will check Open Firmware, or arch 12420 * specific fallback. Otherwise, we'll default to the stored value in 12421 * firmware. 12422 **/ 12423 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf) 12424 { 12425 if (eth_platform_get_mac_address(&pdev->dev, pf->hw.mac.addr)) 12426 i40e_get_mac_addr(&pf->hw, pf->hw.mac.addr); 12427 } 12428 12429 /** 12430 * i40e_probe - Device initialization routine 12431 * @pdev: PCI device information struct 12432 * @ent: entry in i40e_pci_tbl 12433 * 12434 * i40e_probe initializes a PF identified by a pci_dev structure. 12435 * The OS initialization, configuring of the PF private structure, 12436 * and a hardware reset occur. 12437 * 12438 * Returns 0 on success, negative on failure 12439 **/ 12440 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 12441 { 12442 struct i40e_aq_get_phy_abilities_resp abilities; 12443 struct i40e_pf *pf; 12444 struct i40e_hw *hw; 12445 static u16 pfs_found; 12446 u16 wol_nvm_bits; 12447 u16 link_status; 12448 int err; 12449 u32 val; 12450 u32 i; 12451 u8 set_fc_aq_fail; 12452 12453 err = pci_enable_device_mem(pdev); 12454 if (err) 12455 return err; 12456 12457 /* set up for high or low dma */ 12458 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 12459 if (err) { 12460 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 12461 if (err) { 12462 dev_err(&pdev->dev, 12463 "DMA configuration failed: 0x%x\n", err); 12464 goto err_dma; 12465 } 12466 } 12467 12468 /* set up pci connections */ 12469 err = pci_request_mem_regions(pdev, i40e_driver_name); 12470 if (err) { 12471 dev_info(&pdev->dev, 12472 "pci_request_selected_regions failed %d\n", err); 12473 goto err_pci_reg; 12474 } 12475 12476 pci_enable_pcie_error_reporting(pdev); 12477 pci_set_master(pdev); 12478 12479 /* Now that we have a PCI connection, we need to do the 12480 * low level device setup. This is primarily setting up 12481 * the Admin Queue structures and then querying for the 12482 * device's current profile information. 12483 */ 12484 pf = kzalloc(sizeof(*pf), GFP_KERNEL); 12485 if (!pf) { 12486 err = -ENOMEM; 12487 goto err_pf_alloc; 12488 } 12489 pf->next_vsi = 0; 12490 pf->pdev = pdev; 12491 set_bit(__I40E_DOWN, pf->state); 12492 12493 hw = &pf->hw; 12494 hw->back = pf; 12495 12496 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0), 12497 I40E_MAX_CSR_SPACE); 12498 12499 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len); 12500 if (!hw->hw_addr) { 12501 err = -EIO; 12502 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n", 12503 (unsigned int)pci_resource_start(pdev, 0), 12504 pf->ioremap_len, err); 12505 goto err_ioremap; 12506 } 12507 hw->vendor_id = pdev->vendor; 12508 hw->device_id = pdev->device; 12509 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id); 12510 hw->subsystem_vendor_id = pdev->subsystem_vendor; 12511 hw->subsystem_device_id = pdev->subsystem_device; 12512 hw->bus.device = PCI_SLOT(pdev->devfn); 12513 hw->bus.func = PCI_FUNC(pdev->devfn); 12514 hw->bus.bus_id = pdev->bus->number; 12515 pf->instance = pfs_found; 12516 12517 /* Select something other than the 802.1ad ethertype for the 12518 * switch to use internally and drop on ingress. 12519 */ 12520 hw->switch_tag = 0xffff; 12521 hw->first_tag = ETH_P_8021AD; 12522 hw->second_tag = ETH_P_8021Q; 12523 12524 INIT_LIST_HEAD(&pf->l3_flex_pit_list); 12525 INIT_LIST_HEAD(&pf->l4_flex_pit_list); 12526 12527 /* set up the locks for the AQ, do this only once in probe 12528 * and destroy them only once in remove 12529 */ 12530 mutex_init(&hw->aq.asq_mutex); 12531 mutex_init(&hw->aq.arq_mutex); 12532 12533 pf->msg_enable = netif_msg_init(debug, 12534 NETIF_MSG_DRV | 12535 NETIF_MSG_PROBE | 12536 NETIF_MSG_LINK); 12537 if (debug < -1) 12538 pf->hw.debug_mask = debug; 12539 12540 /* do a special CORER for clearing PXE mode once at init */ 12541 if (hw->revision_id == 0 && 12542 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) { 12543 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK); 12544 i40e_flush(hw); 12545 msleep(200); 12546 pf->corer_count++; 12547 12548 i40e_clear_pxe_mode(hw); 12549 } 12550 12551 /* Reset here to make sure all is clean and to define PF 'n' */ 12552 i40e_clear_hw(hw); 12553 err = i40e_pf_reset(hw); 12554 if (err) { 12555 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err); 12556 goto err_pf_reset; 12557 } 12558 pf->pfr_count++; 12559 12560 hw->aq.num_arq_entries = I40E_AQ_LEN; 12561 hw->aq.num_asq_entries = I40E_AQ_LEN; 12562 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE; 12563 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE; 12564 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT; 12565 12566 snprintf(pf->int_name, sizeof(pf->int_name) - 1, 12567 "%s-%s:misc", 12568 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev)); 12569 12570 err = i40e_init_shared_code(hw); 12571 if (err) { 12572 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n", 12573 err); 12574 goto err_pf_reset; 12575 } 12576 12577 /* set up a default setting for link flow control */ 12578 pf->hw.fc.requested_mode = I40E_FC_NONE; 12579 12580 err = i40e_init_adminq(hw); 12581 if (err) { 12582 if (err == I40E_ERR_FIRMWARE_API_VERSION) 12583 dev_info(&pdev->dev, 12584 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n"); 12585 else 12586 dev_info(&pdev->dev, 12587 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n"); 12588 12589 goto err_pf_reset; 12590 } 12591 i40e_get_oem_version(hw); 12592 12593 /* provide nvm, fw, api versions */ 12594 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s\n", 12595 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build, 12596 hw->aq.api_maj_ver, hw->aq.api_min_ver, 12597 i40e_nvm_version_str(hw)); 12598 12599 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR && 12600 hw->aq.api_min_ver > I40E_FW_MINOR_VERSION(hw)) 12601 dev_info(&pdev->dev, 12602 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n"); 12603 else if (hw->aq.api_maj_ver == 1 && hw->aq.api_min_ver < 4) 12604 dev_info(&pdev->dev, 12605 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n"); 12606 12607 i40e_verify_eeprom(pf); 12608 12609 /* Rev 0 hardware was never productized */ 12610 if (hw->revision_id < 1) 12611 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n"); 12612 12613 i40e_clear_pxe_mode(hw); 12614 err = i40e_get_capabilities(pf); 12615 if (err) 12616 goto err_adminq_setup; 12617 12618 err = i40e_sw_init(pf); 12619 if (err) { 12620 dev_info(&pdev->dev, "sw_init failed: %d\n", err); 12621 goto err_sw_init; 12622 } 12623 12624 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp, 12625 hw->func_caps.num_rx_qp, 0, 0); 12626 if (err) { 12627 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err); 12628 goto err_init_lan_hmc; 12629 } 12630 12631 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY); 12632 if (err) { 12633 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err); 12634 err = -ENOENT; 12635 goto err_configure_lan_hmc; 12636 } 12637 12638 /* Disable LLDP for NICs that have firmware versions lower than v4.3. 12639 * Ignore error return codes because if it was already disabled via 12640 * hardware settings this will fail 12641 */ 12642 if (pf->hw_features & I40E_HW_STOP_FW_LLDP) { 12643 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n"); 12644 i40e_aq_stop_lldp(hw, true, NULL); 12645 } 12646 12647 /* allow a platform config to override the HW addr */ 12648 i40e_get_platform_mac_addr(pdev, pf); 12649 12650 if (!is_valid_ether_addr(hw->mac.addr)) { 12651 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr); 12652 err = -EIO; 12653 goto err_mac_addr; 12654 } 12655 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr); 12656 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr); 12657 i40e_get_port_mac_addr(hw, hw->mac.port_addr); 12658 if (is_valid_ether_addr(hw->mac.port_addr)) 12659 pf->hw_features |= I40E_HW_PORT_ID_VALID; 12660 12661 pci_set_drvdata(pdev, pf); 12662 pci_save_state(pdev); 12663 #ifdef CONFIG_I40E_DCB 12664 err = i40e_init_pf_dcb(pf); 12665 if (err) { 12666 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err); 12667 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE | I40E_FLAG_DCB_ENABLED); 12668 /* Continue without DCB enabled */ 12669 } 12670 #endif /* CONFIG_I40E_DCB */ 12671 12672 /* set up periodic task facility */ 12673 timer_setup(&pf->service_timer, i40e_service_timer, 0); 12674 pf->service_timer_period = HZ; 12675 12676 INIT_WORK(&pf->service_task, i40e_service_task); 12677 clear_bit(__I40E_SERVICE_SCHED, pf->state); 12678 12679 /* NVM bit on means WoL disabled for the port */ 12680 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 12681 if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1) 12682 pf->wol_en = false; 12683 else 12684 pf->wol_en = true; 12685 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en); 12686 12687 /* set up the main switch operations */ 12688 i40e_determine_queue_usage(pf); 12689 err = i40e_init_interrupt_scheme(pf); 12690 if (err) 12691 goto err_switch_setup; 12692 12693 /* The number of VSIs reported by the FW is the minimum guaranteed 12694 * to us; HW supports far more and we share the remaining pool with 12695 * the other PFs. We allocate space for more than the guarantee with 12696 * the understanding that we might not get them all later. 12697 */ 12698 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC) 12699 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC; 12700 else 12701 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis; 12702 12703 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */ 12704 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *), 12705 GFP_KERNEL); 12706 if (!pf->vsi) { 12707 err = -ENOMEM; 12708 goto err_switch_setup; 12709 } 12710 12711 #ifdef CONFIG_PCI_IOV 12712 /* prep for VF support */ 12713 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) && 12714 (pf->flags & I40E_FLAG_MSIX_ENABLED) && 12715 !test_bit(__I40E_BAD_EEPROM, pf->state)) { 12716 if (pci_num_vf(pdev)) 12717 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED; 12718 } 12719 #endif 12720 err = i40e_setup_pf_switch(pf, false); 12721 if (err) { 12722 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err); 12723 goto err_vsis; 12724 } 12725 INIT_LIST_HEAD(&pf->vsi[pf->lan_vsi]->ch_list); 12726 12727 /* Make sure flow control is set according to current settings */ 12728 err = i40e_set_fc(hw, &set_fc_aq_fail, true); 12729 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_GET) 12730 dev_dbg(&pf->pdev->dev, 12731 "Set fc with err %s aq_err %s on get_phy_cap\n", 12732 i40e_stat_str(hw, err), 12733 i40e_aq_str(hw, hw->aq.asq_last_status)); 12734 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_SET) 12735 dev_dbg(&pf->pdev->dev, 12736 "Set fc with err %s aq_err %s on set_phy_config\n", 12737 i40e_stat_str(hw, err), 12738 i40e_aq_str(hw, hw->aq.asq_last_status)); 12739 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_UPDATE) 12740 dev_dbg(&pf->pdev->dev, 12741 "Set fc with err %s aq_err %s on get_link_info\n", 12742 i40e_stat_str(hw, err), 12743 i40e_aq_str(hw, hw->aq.asq_last_status)); 12744 12745 /* if FDIR VSI was set up, start it now */ 12746 for (i = 0; i < pf->num_alloc_vsi; i++) { 12747 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) { 12748 i40e_vsi_open(pf->vsi[i]); 12749 break; 12750 } 12751 } 12752 12753 /* The driver only wants link up/down and module qualification 12754 * reports from firmware. Note the negative logic. 12755 */ 12756 err = i40e_aq_set_phy_int_mask(&pf->hw, 12757 ~(I40E_AQ_EVENT_LINK_UPDOWN | 12758 I40E_AQ_EVENT_MEDIA_NA | 12759 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL); 12760 if (err) 12761 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n", 12762 i40e_stat_str(&pf->hw, err), 12763 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 12764 12765 /* Reconfigure hardware for allowing smaller MSS in the case 12766 * of TSO, so that we avoid the MDD being fired and causing 12767 * a reset in the case of small MSS+TSO. 12768 */ 12769 val = rd32(hw, I40E_REG_MSS); 12770 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) { 12771 val &= ~I40E_REG_MSS_MIN_MASK; 12772 val |= I40E_64BYTE_MSS; 12773 wr32(hw, I40E_REG_MSS, val); 12774 } 12775 12776 if (pf->hw_features & I40E_HW_RESTART_AUTONEG) { 12777 msleep(75); 12778 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL); 12779 if (err) 12780 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n", 12781 i40e_stat_str(&pf->hw, err), 12782 i40e_aq_str(&pf->hw, 12783 pf->hw.aq.asq_last_status)); 12784 } 12785 /* The main driver is (mostly) up and happy. We need to set this state 12786 * before setting up the misc vector or we get a race and the vector 12787 * ends up disabled forever. 12788 */ 12789 clear_bit(__I40E_DOWN, pf->state); 12790 12791 /* In case of MSIX we are going to setup the misc vector right here 12792 * to handle admin queue events etc. In case of legacy and MSI 12793 * the misc functionality and queue processing is combined in 12794 * the same vector and that gets setup at open. 12795 */ 12796 if (pf->flags & I40E_FLAG_MSIX_ENABLED) { 12797 err = i40e_setup_misc_vector(pf); 12798 if (err) { 12799 dev_info(&pdev->dev, 12800 "setup of misc vector failed: %d\n", err); 12801 goto err_vsis; 12802 } 12803 } 12804 12805 #ifdef CONFIG_PCI_IOV 12806 /* prep for VF support */ 12807 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) && 12808 (pf->flags & I40E_FLAG_MSIX_ENABLED) && 12809 !test_bit(__I40E_BAD_EEPROM, pf->state)) { 12810 /* disable link interrupts for VFs */ 12811 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM); 12812 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK; 12813 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val); 12814 i40e_flush(hw); 12815 12816 if (pci_num_vf(pdev)) { 12817 dev_info(&pdev->dev, 12818 "Active VFs found, allocating resources.\n"); 12819 err = i40e_alloc_vfs(pf, pci_num_vf(pdev)); 12820 if (err) 12821 dev_info(&pdev->dev, 12822 "Error %d allocating resources for existing VFs\n", 12823 err); 12824 } 12825 } 12826 #endif /* CONFIG_PCI_IOV */ 12827 12828 if (pf->flags & I40E_FLAG_IWARP_ENABLED) { 12829 pf->iwarp_base_vector = i40e_get_lump(pf, pf->irq_pile, 12830 pf->num_iwarp_msix, 12831 I40E_IWARP_IRQ_PILE_ID); 12832 if (pf->iwarp_base_vector < 0) { 12833 dev_info(&pdev->dev, 12834 "failed to get tracking for %d vectors for IWARP err=%d\n", 12835 pf->num_iwarp_msix, pf->iwarp_base_vector); 12836 pf->flags &= ~I40E_FLAG_IWARP_ENABLED; 12837 } 12838 } 12839 12840 i40e_dbg_pf_init(pf); 12841 12842 /* tell the firmware that we're starting */ 12843 i40e_send_version(pf); 12844 12845 /* since everything's happy, start the service_task timer */ 12846 mod_timer(&pf->service_timer, 12847 round_jiffies(jiffies + pf->service_timer_period)); 12848 12849 /* add this PF to client device list and launch a client service task */ 12850 if (pf->flags & I40E_FLAG_IWARP_ENABLED) { 12851 err = i40e_lan_add_device(pf); 12852 if (err) 12853 dev_info(&pdev->dev, "Failed to add PF to client API service list: %d\n", 12854 err); 12855 } 12856 12857 #define PCI_SPEED_SIZE 8 12858 #define PCI_WIDTH_SIZE 8 12859 /* Devices on the IOSF bus do not have this information 12860 * and will report PCI Gen 1 x 1 by default so don't bother 12861 * checking them. 12862 */ 12863 if (!(pf->hw_features & I40E_HW_NO_PCI_LINK_CHECK)) { 12864 char speed[PCI_SPEED_SIZE] = "Unknown"; 12865 char width[PCI_WIDTH_SIZE] = "Unknown"; 12866 12867 /* Get the negotiated link width and speed from PCI config 12868 * space 12869 */ 12870 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, 12871 &link_status); 12872 12873 i40e_set_pci_config_data(hw, link_status); 12874 12875 switch (hw->bus.speed) { 12876 case i40e_bus_speed_8000: 12877 strncpy(speed, "8.0", PCI_SPEED_SIZE); break; 12878 case i40e_bus_speed_5000: 12879 strncpy(speed, "5.0", PCI_SPEED_SIZE); break; 12880 case i40e_bus_speed_2500: 12881 strncpy(speed, "2.5", PCI_SPEED_SIZE); break; 12882 default: 12883 break; 12884 } 12885 switch (hw->bus.width) { 12886 case i40e_bus_width_pcie_x8: 12887 strncpy(width, "8", PCI_WIDTH_SIZE); break; 12888 case i40e_bus_width_pcie_x4: 12889 strncpy(width, "4", PCI_WIDTH_SIZE); break; 12890 case i40e_bus_width_pcie_x2: 12891 strncpy(width, "2", PCI_WIDTH_SIZE); break; 12892 case i40e_bus_width_pcie_x1: 12893 strncpy(width, "1", PCI_WIDTH_SIZE); break; 12894 default: 12895 break; 12896 } 12897 12898 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n", 12899 speed, width); 12900 12901 if (hw->bus.width < i40e_bus_width_pcie_x8 || 12902 hw->bus.speed < i40e_bus_speed_8000) { 12903 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n"); 12904 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n"); 12905 } 12906 } 12907 12908 /* get the requested speeds from the fw */ 12909 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL); 12910 if (err) 12911 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n", 12912 i40e_stat_str(&pf->hw, err), 12913 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 12914 pf->hw.phy.link_info.requested_speeds = abilities.link_speed; 12915 12916 /* get the supported phy types from the fw */ 12917 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL); 12918 if (err) 12919 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n", 12920 i40e_stat_str(&pf->hw, err), 12921 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); 12922 12923 /* Add a filter to drop all Flow control frames from any VSI from being 12924 * transmitted. By doing so we stop a malicious VF from sending out 12925 * PAUSE or PFC frames and potentially controlling traffic for other 12926 * PF/VF VSIs. 12927 * The FW can still send Flow control frames if enabled. 12928 */ 12929 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw, 12930 pf->main_vsi_seid); 12931 12932 if ((pf->hw.device_id == I40E_DEV_ID_10G_BASE_T) || 12933 (pf->hw.device_id == I40E_DEV_ID_10G_BASE_T4)) 12934 pf->hw_features |= I40E_HW_PHY_CONTROLS_LEDS; 12935 if (pf->hw.device_id == I40E_DEV_ID_SFP_I_X722) 12936 pf->hw_features |= I40E_HW_HAVE_CRT_RETIMER; 12937 /* print a string summarizing features */ 12938 i40e_print_features(pf); 12939 12940 return 0; 12941 12942 /* Unwind what we've done if something failed in the setup */ 12943 err_vsis: 12944 set_bit(__I40E_DOWN, pf->state); 12945 i40e_clear_interrupt_scheme(pf); 12946 kfree(pf->vsi); 12947 err_switch_setup: 12948 i40e_reset_interrupt_capability(pf); 12949 del_timer_sync(&pf->service_timer); 12950 err_mac_addr: 12951 err_configure_lan_hmc: 12952 (void)i40e_shutdown_lan_hmc(hw); 12953 err_init_lan_hmc: 12954 kfree(pf->qp_pile); 12955 err_sw_init: 12956 err_adminq_setup: 12957 err_pf_reset: 12958 iounmap(hw->hw_addr); 12959 err_ioremap: 12960 kfree(pf); 12961 err_pf_alloc: 12962 pci_disable_pcie_error_reporting(pdev); 12963 pci_release_mem_regions(pdev); 12964 err_pci_reg: 12965 err_dma: 12966 pci_disable_device(pdev); 12967 return err; 12968 } 12969 12970 /** 12971 * i40e_remove - Device removal routine 12972 * @pdev: PCI device information struct 12973 * 12974 * i40e_remove is called by the PCI subsystem to alert the driver 12975 * that is should release a PCI device. This could be caused by a 12976 * Hot-Plug event, or because the driver is going to be removed from 12977 * memory. 12978 **/ 12979 static void i40e_remove(struct pci_dev *pdev) 12980 { 12981 struct i40e_pf *pf = pci_get_drvdata(pdev); 12982 struct i40e_hw *hw = &pf->hw; 12983 i40e_status ret_code; 12984 int i; 12985 12986 i40e_dbg_pf_exit(pf); 12987 12988 i40e_ptp_stop(pf); 12989 12990 /* Disable RSS in hw */ 12991 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0); 12992 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0); 12993 12994 /* no more scheduling of any task */ 12995 set_bit(__I40E_SUSPENDED, pf->state); 12996 set_bit(__I40E_DOWN, pf->state); 12997 if (pf->service_timer.function) 12998 del_timer_sync(&pf->service_timer); 12999 if (pf->service_task.func) 13000 cancel_work_sync(&pf->service_task); 13001 13002 /* Client close must be called explicitly here because the timer 13003 * has been stopped. 13004 */ 13005 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false); 13006 13007 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) { 13008 i40e_free_vfs(pf); 13009 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED; 13010 } 13011 13012 i40e_fdir_teardown(pf); 13013 13014 /* If there is a switch structure or any orphans, remove them. 13015 * This will leave only the PF's VSI remaining. 13016 */ 13017 for (i = 0; i < I40E_MAX_VEB; i++) { 13018 if (!pf->veb[i]) 13019 continue; 13020 13021 if (pf->veb[i]->uplink_seid == pf->mac_seid || 13022 pf->veb[i]->uplink_seid == 0) 13023 i40e_switch_branch_release(pf->veb[i]); 13024 } 13025 13026 /* Now we can shutdown the PF's VSI, just before we kill 13027 * adminq and hmc. 13028 */ 13029 if (pf->vsi[pf->lan_vsi]) 13030 i40e_vsi_release(pf->vsi[pf->lan_vsi]); 13031 13032 /* remove attached clients */ 13033 if (pf->flags & I40E_FLAG_IWARP_ENABLED) { 13034 ret_code = i40e_lan_del_device(pf); 13035 if (ret_code) 13036 dev_warn(&pdev->dev, "Failed to delete client device: %d\n", 13037 ret_code); 13038 } 13039 13040 /* shutdown and destroy the HMC */ 13041 if (hw->hmc.hmc_obj) { 13042 ret_code = i40e_shutdown_lan_hmc(hw); 13043 if (ret_code) 13044 dev_warn(&pdev->dev, 13045 "Failed to destroy the HMC resources: %d\n", 13046 ret_code); 13047 } 13048 13049 /* shutdown the adminq */ 13050 i40e_shutdown_adminq(hw); 13051 13052 /* destroy the locks only once, here */ 13053 mutex_destroy(&hw->aq.arq_mutex); 13054 mutex_destroy(&hw->aq.asq_mutex); 13055 13056 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */ 13057 i40e_clear_interrupt_scheme(pf); 13058 for (i = 0; i < pf->num_alloc_vsi; i++) { 13059 if (pf->vsi[i]) { 13060 i40e_vsi_clear_rings(pf->vsi[i]); 13061 i40e_vsi_clear(pf->vsi[i]); 13062 pf->vsi[i] = NULL; 13063 } 13064 } 13065 13066 for (i = 0; i < I40E_MAX_VEB; i++) { 13067 kfree(pf->veb[i]); 13068 pf->veb[i] = NULL; 13069 } 13070 13071 kfree(pf->qp_pile); 13072 kfree(pf->vsi); 13073 13074 iounmap(hw->hw_addr); 13075 kfree(pf); 13076 pci_release_mem_regions(pdev); 13077 13078 pci_disable_pcie_error_reporting(pdev); 13079 pci_disable_device(pdev); 13080 } 13081 13082 /** 13083 * i40e_pci_error_detected - warning that something funky happened in PCI land 13084 * @pdev: PCI device information struct 13085 * 13086 * Called to warn that something happened and the error handling steps 13087 * are in progress. Allows the driver to quiesce things, be ready for 13088 * remediation. 13089 **/ 13090 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev, 13091 enum pci_channel_state error) 13092 { 13093 struct i40e_pf *pf = pci_get_drvdata(pdev); 13094 13095 dev_info(&pdev->dev, "%s: error %d\n", __func__, error); 13096 13097 if (!pf) { 13098 dev_info(&pdev->dev, 13099 "Cannot recover - error happened during device probe\n"); 13100 return PCI_ERS_RESULT_DISCONNECT; 13101 } 13102 13103 /* shutdown all operations */ 13104 if (!test_bit(__I40E_SUSPENDED, pf->state)) 13105 i40e_prep_for_reset(pf, false); 13106 13107 /* Request a slot reset */ 13108 return PCI_ERS_RESULT_NEED_RESET; 13109 } 13110 13111 /** 13112 * i40e_pci_error_slot_reset - a PCI slot reset just happened 13113 * @pdev: PCI device information struct 13114 * 13115 * Called to find if the driver can work with the device now that 13116 * the pci slot has been reset. If a basic connection seems good 13117 * (registers are readable and have sane content) then return a 13118 * happy little PCI_ERS_RESULT_xxx. 13119 **/ 13120 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev) 13121 { 13122 struct i40e_pf *pf = pci_get_drvdata(pdev); 13123 pci_ers_result_t result; 13124 int err; 13125 u32 reg; 13126 13127 dev_dbg(&pdev->dev, "%s\n", __func__); 13128 if (pci_enable_device_mem(pdev)) { 13129 dev_info(&pdev->dev, 13130 "Cannot re-enable PCI device after reset.\n"); 13131 result = PCI_ERS_RESULT_DISCONNECT; 13132 } else { 13133 pci_set_master(pdev); 13134 pci_restore_state(pdev); 13135 pci_save_state(pdev); 13136 pci_wake_from_d3(pdev, false); 13137 13138 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG); 13139 if (reg == 0) 13140 result = PCI_ERS_RESULT_RECOVERED; 13141 else 13142 result = PCI_ERS_RESULT_DISCONNECT; 13143 } 13144 13145 err = pci_cleanup_aer_uncorrect_error_status(pdev); 13146 if (err) { 13147 dev_info(&pdev->dev, 13148 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n", 13149 err); 13150 /* non-fatal, continue */ 13151 } 13152 13153 return result; 13154 } 13155 13156 /** 13157 * i40e_pci_error_reset_prepare - prepare device driver for pci reset 13158 * @pdev: PCI device information struct 13159 */ 13160 static void i40e_pci_error_reset_prepare(struct pci_dev *pdev) 13161 { 13162 struct i40e_pf *pf = pci_get_drvdata(pdev); 13163 13164 i40e_prep_for_reset(pf, false); 13165 } 13166 13167 /** 13168 * i40e_pci_error_reset_done - pci reset done, device driver reset can begin 13169 * @pdev: PCI device information struct 13170 */ 13171 static void i40e_pci_error_reset_done(struct pci_dev *pdev) 13172 { 13173 struct i40e_pf *pf = pci_get_drvdata(pdev); 13174 13175 i40e_reset_and_rebuild(pf, false, false); 13176 } 13177 13178 /** 13179 * i40e_pci_error_resume - restart operations after PCI error recovery 13180 * @pdev: PCI device information struct 13181 * 13182 * Called to allow the driver to bring things back up after PCI error 13183 * and/or reset recovery has finished. 13184 **/ 13185 static void i40e_pci_error_resume(struct pci_dev *pdev) 13186 { 13187 struct i40e_pf *pf = pci_get_drvdata(pdev); 13188 13189 dev_dbg(&pdev->dev, "%s\n", __func__); 13190 if (test_bit(__I40E_SUSPENDED, pf->state)) 13191 return; 13192 13193 i40e_handle_reset_warning(pf, false); 13194 } 13195 13196 /** 13197 * i40e_enable_mc_magic_wake - enable multicast magic packet wake up 13198 * using the mac_address_write admin q function 13199 * @pf: pointer to i40e_pf struct 13200 **/ 13201 static void i40e_enable_mc_magic_wake(struct i40e_pf *pf) 13202 { 13203 struct i40e_hw *hw = &pf->hw; 13204 i40e_status ret; 13205 u8 mac_addr[6]; 13206 u16 flags = 0; 13207 13208 /* Get current MAC address in case it's an LAA */ 13209 if (pf->vsi[pf->lan_vsi] && pf->vsi[pf->lan_vsi]->netdev) { 13210 ether_addr_copy(mac_addr, 13211 pf->vsi[pf->lan_vsi]->netdev->dev_addr); 13212 } else { 13213 dev_err(&pf->pdev->dev, 13214 "Failed to retrieve MAC address; using default\n"); 13215 ether_addr_copy(mac_addr, hw->mac.addr); 13216 } 13217 13218 /* The FW expects the mac address write cmd to first be called with 13219 * one of these flags before calling it again with the multicast 13220 * enable flags. 13221 */ 13222 flags = I40E_AQC_WRITE_TYPE_LAA_WOL; 13223 13224 if (hw->func_caps.flex10_enable && hw->partition_id != 1) 13225 flags = I40E_AQC_WRITE_TYPE_LAA_ONLY; 13226 13227 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL); 13228 if (ret) { 13229 dev_err(&pf->pdev->dev, 13230 "Failed to update MAC address registers; cannot enable Multicast Magic packet wake up"); 13231 return; 13232 } 13233 13234 flags = I40E_AQC_MC_MAG_EN 13235 | I40E_AQC_WOL_PRESERVE_ON_PFR 13236 | I40E_AQC_WRITE_TYPE_UPDATE_MC_MAG; 13237 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL); 13238 if (ret) 13239 dev_err(&pf->pdev->dev, 13240 "Failed to enable Multicast Magic Packet wake up\n"); 13241 } 13242 13243 /** 13244 * i40e_shutdown - PCI callback for shutting down 13245 * @pdev: PCI device information struct 13246 **/ 13247 static void i40e_shutdown(struct pci_dev *pdev) 13248 { 13249 struct i40e_pf *pf = pci_get_drvdata(pdev); 13250 struct i40e_hw *hw = &pf->hw; 13251 13252 set_bit(__I40E_SUSPENDED, pf->state); 13253 set_bit(__I40E_DOWN, pf->state); 13254 rtnl_lock(); 13255 i40e_prep_for_reset(pf, true); 13256 rtnl_unlock(); 13257 13258 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0)); 13259 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0)); 13260 13261 del_timer_sync(&pf->service_timer); 13262 cancel_work_sync(&pf->service_task); 13263 i40e_fdir_teardown(pf); 13264 13265 /* Client close must be called explicitly here because the timer 13266 * has been stopped. 13267 */ 13268 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false); 13269 13270 if (pf->wol_en && (pf->hw_features & I40E_HW_WOL_MC_MAGIC_PKT_WAKE)) 13271 i40e_enable_mc_magic_wake(pf); 13272 13273 i40e_prep_for_reset(pf, false); 13274 13275 wr32(hw, I40E_PFPM_APM, 13276 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0)); 13277 wr32(hw, I40E_PFPM_WUFC, 13278 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0)); 13279 13280 i40e_clear_interrupt_scheme(pf); 13281 13282 if (system_state == SYSTEM_POWER_OFF) { 13283 pci_wake_from_d3(pdev, pf->wol_en); 13284 pci_set_power_state(pdev, PCI_D3hot); 13285 } 13286 } 13287 13288 #ifdef CONFIG_PM 13289 /** 13290 * i40e_suspend - PM callback for moving to D3 13291 * @dev: generic device information structure 13292 **/ 13293 static int i40e_suspend(struct device *dev) 13294 { 13295 struct pci_dev *pdev = to_pci_dev(dev); 13296 struct i40e_pf *pf = pci_get_drvdata(pdev); 13297 struct i40e_hw *hw = &pf->hw; 13298 13299 /* If we're already suspended, then there is nothing to do */ 13300 if (test_and_set_bit(__I40E_SUSPENDED, pf->state)) 13301 return 0; 13302 13303 set_bit(__I40E_DOWN, pf->state); 13304 13305 /* Ensure service task will not be running */ 13306 del_timer_sync(&pf->service_timer); 13307 cancel_work_sync(&pf->service_task); 13308 13309 if (pf->wol_en && (pf->hw_features & I40E_HW_WOL_MC_MAGIC_PKT_WAKE)) 13310 i40e_enable_mc_magic_wake(pf); 13311 13312 i40e_prep_for_reset(pf, false); 13313 13314 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0)); 13315 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0)); 13316 13317 /* Clear the interrupt scheme and release our IRQs so that the system 13318 * can safely hibernate even when there are a large number of CPUs. 13319 * Otherwise hibernation might fail when mapping all the vectors back 13320 * to CPU0. 13321 */ 13322 i40e_clear_interrupt_scheme(pf); 13323 13324 return 0; 13325 } 13326 13327 /** 13328 * i40e_resume - PM callback for waking up from D3 13329 * @dev: generic device information structure 13330 **/ 13331 static int i40e_resume(struct device *dev) 13332 { 13333 struct pci_dev *pdev = to_pci_dev(dev); 13334 struct i40e_pf *pf = pci_get_drvdata(pdev); 13335 int err; 13336 13337 /* If we're not suspended, then there is nothing to do */ 13338 if (!test_bit(__I40E_SUSPENDED, pf->state)) 13339 return 0; 13340 13341 /* We cleared the interrupt scheme when we suspended, so we need to 13342 * restore it now to resume device functionality. 13343 */ 13344 err = i40e_restore_interrupt_scheme(pf); 13345 if (err) { 13346 dev_err(&pdev->dev, "Cannot restore interrupt scheme: %d\n", 13347 err); 13348 } 13349 13350 clear_bit(__I40E_DOWN, pf->state); 13351 i40e_reset_and_rebuild(pf, false, false); 13352 13353 /* Clear suspended state last after everything is recovered */ 13354 clear_bit(__I40E_SUSPENDED, pf->state); 13355 13356 /* Restart the service task */ 13357 mod_timer(&pf->service_timer, 13358 round_jiffies(jiffies + pf->service_timer_period)); 13359 13360 return 0; 13361 } 13362 13363 #endif /* CONFIG_PM */ 13364 13365 static const struct pci_error_handlers i40e_err_handler = { 13366 .error_detected = i40e_pci_error_detected, 13367 .slot_reset = i40e_pci_error_slot_reset, 13368 .reset_prepare = i40e_pci_error_reset_prepare, 13369 .reset_done = i40e_pci_error_reset_done, 13370 .resume = i40e_pci_error_resume, 13371 }; 13372 13373 static SIMPLE_DEV_PM_OPS(i40e_pm_ops, i40e_suspend, i40e_resume); 13374 13375 static struct pci_driver i40e_driver = { 13376 .name = i40e_driver_name, 13377 .id_table = i40e_pci_tbl, 13378 .probe = i40e_probe, 13379 .remove = i40e_remove, 13380 #ifdef CONFIG_PM 13381 .driver = { 13382 .pm = &i40e_pm_ops, 13383 }, 13384 #endif /* CONFIG_PM */ 13385 .shutdown = i40e_shutdown, 13386 .err_handler = &i40e_err_handler, 13387 .sriov_configure = i40e_pci_sriov_configure, 13388 }; 13389 13390 /** 13391 * i40e_init_module - Driver registration routine 13392 * 13393 * i40e_init_module is the first routine called when the driver is 13394 * loaded. All it does is register with the PCI subsystem. 13395 **/ 13396 static int __init i40e_init_module(void) 13397 { 13398 pr_info("%s: %s - version %s\n", i40e_driver_name, 13399 i40e_driver_string, i40e_driver_version_str); 13400 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright); 13401 13402 /* There is no need to throttle the number of active tasks because 13403 * each device limits its own task using a state bit for scheduling 13404 * the service task, and the device tasks do not interfere with each 13405 * other, so we don't set a max task limit. We must set WQ_MEM_RECLAIM 13406 * since we need to be able to guarantee forward progress even under 13407 * memory pressure. 13408 */ 13409 i40e_wq = alloc_workqueue("%s", WQ_MEM_RECLAIM, 0, i40e_driver_name); 13410 if (!i40e_wq) { 13411 pr_err("%s: Failed to create workqueue\n", i40e_driver_name); 13412 return -ENOMEM; 13413 } 13414 13415 i40e_dbg_init(); 13416 return pci_register_driver(&i40e_driver); 13417 } 13418 module_init(i40e_init_module); 13419 13420 /** 13421 * i40e_exit_module - Driver exit cleanup routine 13422 * 13423 * i40e_exit_module is called just before the driver is removed 13424 * from memory. 13425 **/ 13426 static void __exit i40e_exit_module(void) 13427 { 13428 pci_unregister_driver(&i40e_driver); 13429 destroy_workqueue(i40e_wq); 13430 i40e_dbg_exit(); 13431 } 13432 module_exit(i40e_exit_module); 13433