1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 2013 - 2018 Intel Corporation. */ 3 4 /* ethtool support for i40e */ 5 6 #include "i40e.h" 7 #include "i40e_diag.h" 8 9 #include "i40e_ethtool_stats.h" 10 11 #define I40E_PF_STAT(_name, _stat) \ 12 I40E_STAT(struct i40e_pf, _name, _stat) 13 #define I40E_VSI_STAT(_name, _stat) \ 14 I40E_STAT(struct i40e_vsi, _name, _stat) 15 #define I40E_VEB_STAT(_name, _stat) \ 16 I40E_STAT(struct i40e_veb, _name, _stat) 17 #define I40E_PFC_STAT(_name, _stat) \ 18 I40E_STAT(struct i40e_pfc_stats, _name, _stat) 19 #define I40E_QUEUE_STAT(_name, _stat) \ 20 I40E_STAT(struct i40e_ring, _name, _stat) 21 22 static const struct i40e_stats i40e_gstrings_net_stats[] = { 23 I40E_NETDEV_STAT(rx_packets), 24 I40E_NETDEV_STAT(tx_packets), 25 I40E_NETDEV_STAT(rx_bytes), 26 I40E_NETDEV_STAT(tx_bytes), 27 I40E_NETDEV_STAT(rx_errors), 28 I40E_NETDEV_STAT(tx_errors), 29 I40E_NETDEV_STAT(rx_dropped), 30 I40E_NETDEV_STAT(tx_dropped), 31 I40E_NETDEV_STAT(collisions), 32 I40E_NETDEV_STAT(rx_length_errors), 33 I40E_NETDEV_STAT(rx_crc_errors), 34 }; 35 36 static const struct i40e_stats i40e_gstrings_veb_stats[] = { 37 I40E_VEB_STAT("veb.rx_bytes", stats.rx_bytes), 38 I40E_VEB_STAT("veb.tx_bytes", stats.tx_bytes), 39 I40E_VEB_STAT("veb.rx_unicast", stats.rx_unicast), 40 I40E_VEB_STAT("veb.tx_unicast", stats.tx_unicast), 41 I40E_VEB_STAT("veb.rx_multicast", stats.rx_multicast), 42 I40E_VEB_STAT("veb.tx_multicast", stats.tx_multicast), 43 I40E_VEB_STAT("veb.rx_broadcast", stats.rx_broadcast), 44 I40E_VEB_STAT("veb.tx_broadcast", stats.tx_broadcast), 45 I40E_VEB_STAT("veb.rx_discards", stats.rx_discards), 46 I40E_VEB_STAT("veb.tx_discards", stats.tx_discards), 47 I40E_VEB_STAT("veb.tx_errors", stats.tx_errors), 48 I40E_VEB_STAT("veb.rx_unknown_protocol", stats.rx_unknown_protocol), 49 }; 50 51 static const struct i40e_stats i40e_gstrings_veb_tc_stats[] = { 52 I40E_VEB_STAT("veb.tc_%u_tx_packets", tc_stats.tc_tx_packets), 53 I40E_VEB_STAT("veb.tc_%u_tx_bytes", tc_stats.tc_tx_bytes), 54 I40E_VEB_STAT("veb.tc_%u_rx_packets", tc_stats.tc_rx_packets), 55 I40E_VEB_STAT("veb.tc_%u_rx_bytes", tc_stats.tc_rx_bytes), 56 }; 57 58 static const struct i40e_stats i40e_gstrings_misc_stats[] = { 59 I40E_VSI_STAT("rx_unicast", eth_stats.rx_unicast), 60 I40E_VSI_STAT("tx_unicast", eth_stats.tx_unicast), 61 I40E_VSI_STAT("rx_multicast", eth_stats.rx_multicast), 62 I40E_VSI_STAT("tx_multicast", eth_stats.tx_multicast), 63 I40E_VSI_STAT("rx_broadcast", eth_stats.rx_broadcast), 64 I40E_VSI_STAT("tx_broadcast", eth_stats.tx_broadcast), 65 I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol), 66 I40E_VSI_STAT("tx_linearize", tx_linearize), 67 I40E_VSI_STAT("tx_force_wb", tx_force_wb), 68 I40E_VSI_STAT("tx_busy", tx_busy), 69 I40E_VSI_STAT("rx_alloc_fail", rx_buf_failed), 70 I40E_VSI_STAT("rx_pg_alloc_fail", rx_page_failed), 71 }; 72 73 /* These PF_STATs might look like duplicates of some NETDEV_STATs, 74 * but they are separate. This device supports Virtualization, and 75 * as such might have several netdevs supporting VMDq and FCoE going 76 * through a single port. The NETDEV_STATs are for individual netdevs 77 * seen at the top of the stack, and the PF_STATs are for the physical 78 * function at the bottom of the stack hosting those netdevs. 79 * 80 * The PF_STATs are appended to the netdev stats only when ethtool -S 81 * is queried on the base PF netdev, not on the VMDq or FCoE netdev. 82 */ 83 static const struct i40e_stats i40e_gstrings_stats[] = { 84 I40E_PF_STAT("port.rx_bytes", stats.eth.rx_bytes), 85 I40E_PF_STAT("port.tx_bytes", stats.eth.tx_bytes), 86 I40E_PF_STAT("port.rx_unicast", stats.eth.rx_unicast), 87 I40E_PF_STAT("port.tx_unicast", stats.eth.tx_unicast), 88 I40E_PF_STAT("port.rx_multicast", stats.eth.rx_multicast), 89 I40E_PF_STAT("port.tx_multicast", stats.eth.tx_multicast), 90 I40E_PF_STAT("port.rx_broadcast", stats.eth.rx_broadcast), 91 I40E_PF_STAT("port.tx_broadcast", stats.eth.tx_broadcast), 92 I40E_PF_STAT("port.tx_errors", stats.eth.tx_errors), 93 I40E_PF_STAT("port.rx_dropped", stats.eth.rx_discards), 94 I40E_PF_STAT("port.tx_dropped_link_down", stats.tx_dropped_link_down), 95 I40E_PF_STAT("port.rx_crc_errors", stats.crc_errors), 96 I40E_PF_STAT("port.illegal_bytes", stats.illegal_bytes), 97 I40E_PF_STAT("port.mac_local_faults", stats.mac_local_faults), 98 I40E_PF_STAT("port.mac_remote_faults", stats.mac_remote_faults), 99 I40E_PF_STAT("port.tx_timeout", tx_timeout_count), 100 I40E_PF_STAT("port.rx_csum_bad", hw_csum_rx_error), 101 I40E_PF_STAT("port.rx_length_errors", stats.rx_length_errors), 102 I40E_PF_STAT("port.link_xon_rx", stats.link_xon_rx), 103 I40E_PF_STAT("port.link_xoff_rx", stats.link_xoff_rx), 104 I40E_PF_STAT("port.link_xon_tx", stats.link_xon_tx), 105 I40E_PF_STAT("port.link_xoff_tx", stats.link_xoff_tx), 106 I40E_PF_STAT("port.rx_size_64", stats.rx_size_64), 107 I40E_PF_STAT("port.rx_size_127", stats.rx_size_127), 108 I40E_PF_STAT("port.rx_size_255", stats.rx_size_255), 109 I40E_PF_STAT("port.rx_size_511", stats.rx_size_511), 110 I40E_PF_STAT("port.rx_size_1023", stats.rx_size_1023), 111 I40E_PF_STAT("port.rx_size_1522", stats.rx_size_1522), 112 I40E_PF_STAT("port.rx_size_big", stats.rx_size_big), 113 I40E_PF_STAT("port.tx_size_64", stats.tx_size_64), 114 I40E_PF_STAT("port.tx_size_127", stats.tx_size_127), 115 I40E_PF_STAT("port.tx_size_255", stats.tx_size_255), 116 I40E_PF_STAT("port.tx_size_511", stats.tx_size_511), 117 I40E_PF_STAT("port.tx_size_1023", stats.tx_size_1023), 118 I40E_PF_STAT("port.tx_size_1522", stats.tx_size_1522), 119 I40E_PF_STAT("port.tx_size_big", stats.tx_size_big), 120 I40E_PF_STAT("port.rx_undersize", stats.rx_undersize), 121 I40E_PF_STAT("port.rx_fragments", stats.rx_fragments), 122 I40E_PF_STAT("port.rx_oversize", stats.rx_oversize), 123 I40E_PF_STAT("port.rx_jabber", stats.rx_jabber), 124 I40E_PF_STAT("port.VF_admin_queue_requests", vf_aq_requests), 125 I40E_PF_STAT("port.arq_overflows", arq_overflows), 126 I40E_PF_STAT("port.tx_hwtstamp_timeouts", tx_hwtstamp_timeouts), 127 I40E_PF_STAT("port.rx_hwtstamp_cleared", rx_hwtstamp_cleared), 128 I40E_PF_STAT("port.tx_hwtstamp_skipped", tx_hwtstamp_skipped), 129 I40E_PF_STAT("port.fdir_flush_cnt", fd_flush_cnt), 130 I40E_PF_STAT("port.fdir_atr_match", stats.fd_atr_match), 131 I40E_PF_STAT("port.fdir_atr_tunnel_match", stats.fd_atr_tunnel_match), 132 I40E_PF_STAT("port.fdir_atr_status", stats.fd_atr_status), 133 I40E_PF_STAT("port.fdir_sb_match", stats.fd_sb_match), 134 I40E_PF_STAT("port.fdir_sb_status", stats.fd_sb_status), 135 136 /* LPI stats */ 137 I40E_PF_STAT("port.tx_lpi_status", stats.tx_lpi_status), 138 I40E_PF_STAT("port.rx_lpi_status", stats.rx_lpi_status), 139 I40E_PF_STAT("port.tx_lpi_count", stats.tx_lpi_count), 140 I40E_PF_STAT("port.rx_lpi_count", stats.rx_lpi_count), 141 }; 142 143 struct i40e_pfc_stats { 144 u64 priority_xon_rx; 145 u64 priority_xoff_rx; 146 u64 priority_xon_tx; 147 u64 priority_xoff_tx; 148 u64 priority_xon_2_xoff; 149 }; 150 151 static const struct i40e_stats i40e_gstrings_pfc_stats[] = { 152 I40E_PFC_STAT("port.tx_priority_%u_xon_tx", priority_xon_tx), 153 I40E_PFC_STAT("port.tx_priority_%u_xoff_tx", priority_xoff_tx), 154 I40E_PFC_STAT("port.rx_priority_%u_xon_rx", priority_xon_rx), 155 I40E_PFC_STAT("port.rx_priority_%u_xoff_rx", priority_xoff_rx), 156 I40E_PFC_STAT("port.rx_priority_%u_xon_2_xoff", priority_xon_2_xoff), 157 }; 158 159 #define I40E_NETDEV_STATS_LEN ARRAY_SIZE(i40e_gstrings_net_stats) 160 161 #define I40E_MISC_STATS_LEN ARRAY_SIZE(i40e_gstrings_misc_stats) 162 163 #define I40E_VSI_STATS_LEN (I40E_NETDEV_STATS_LEN + I40E_MISC_STATS_LEN) 164 165 #define I40E_PFC_STATS_LEN (ARRAY_SIZE(i40e_gstrings_pfc_stats) * \ 166 I40E_MAX_USER_PRIORITY) 167 168 #define I40E_VEB_STATS_LEN (ARRAY_SIZE(i40e_gstrings_veb_stats) + \ 169 (ARRAY_SIZE(i40e_gstrings_veb_tc_stats) * \ 170 I40E_MAX_TRAFFIC_CLASS)) 171 172 #define I40E_GLOBAL_STATS_LEN ARRAY_SIZE(i40e_gstrings_stats) 173 174 #define I40E_PF_STATS_LEN (I40E_GLOBAL_STATS_LEN + \ 175 I40E_PFC_STATS_LEN + \ 176 I40E_VEB_STATS_LEN + \ 177 I40E_VSI_STATS_LEN) 178 179 /* Length of stats for a single queue */ 180 #define I40E_QUEUE_STATS_LEN ARRAY_SIZE(i40e_gstrings_queue_stats) 181 182 enum i40e_ethtool_test_id { 183 I40E_ETH_TEST_REG = 0, 184 I40E_ETH_TEST_EEPROM, 185 I40E_ETH_TEST_INTR, 186 I40E_ETH_TEST_LINK, 187 }; 188 189 static const char i40e_gstrings_test[][ETH_GSTRING_LEN] = { 190 "Register test (offline)", 191 "Eeprom test (offline)", 192 "Interrupt test (offline)", 193 "Link test (on/offline)" 194 }; 195 196 #define I40E_TEST_LEN (sizeof(i40e_gstrings_test) / ETH_GSTRING_LEN) 197 198 struct i40e_priv_flags { 199 char flag_string[ETH_GSTRING_LEN]; 200 u64 flag; 201 bool read_only; 202 }; 203 204 #define I40E_PRIV_FLAG(_name, _flag, _read_only) { \ 205 .flag_string = _name, \ 206 .flag = _flag, \ 207 .read_only = _read_only, \ 208 } 209 210 static const struct i40e_priv_flags i40e_gstrings_priv_flags[] = { 211 /* NOTE: MFP setting cannot be changed */ 212 I40E_PRIV_FLAG("MFP", I40E_FLAG_MFP_ENABLED, 1), 213 I40E_PRIV_FLAG("LinkPolling", I40E_FLAG_LINK_POLLING_ENABLED, 0), 214 I40E_PRIV_FLAG("flow-director-atr", I40E_FLAG_FD_ATR_ENABLED, 0), 215 I40E_PRIV_FLAG("veb-stats", I40E_FLAG_VEB_STATS_ENABLED, 0), 216 I40E_PRIV_FLAG("hw-atr-eviction", I40E_FLAG_HW_ATR_EVICT_ENABLED, 0), 217 I40E_PRIV_FLAG("link-down-on-close", 218 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED, 0), 219 I40E_PRIV_FLAG("legacy-rx", I40E_FLAG_LEGACY_RX, 0), 220 I40E_PRIV_FLAG("disable-source-pruning", 221 I40E_FLAG_SOURCE_PRUNING_DISABLED, 0), 222 I40E_PRIV_FLAG("disable-fw-lldp", I40E_FLAG_DISABLE_FW_LLDP, 0), 223 }; 224 225 #define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gstrings_priv_flags) 226 227 /* Private flags with a global effect, restricted to PF 0 */ 228 static const struct i40e_priv_flags i40e_gl_gstrings_priv_flags[] = { 229 I40E_PRIV_FLAG("vf-true-promisc-support", 230 I40E_FLAG_TRUE_PROMISC_SUPPORT, 0), 231 }; 232 233 #define I40E_GL_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gl_gstrings_priv_flags) 234 235 /** 236 * i40e_partition_setting_complaint - generic complaint for MFP restriction 237 * @pf: the PF struct 238 **/ 239 static void i40e_partition_setting_complaint(struct i40e_pf *pf) 240 { 241 dev_info(&pf->pdev->dev, 242 "The link settings are allowed to be changed only from the first partition of a given port. Please switch to the first partition in order to change the setting.\n"); 243 } 244 245 /** 246 * i40e_phy_type_to_ethtool - convert the phy_types to ethtool link modes 247 * @pf: PF struct with phy_types 248 * @ks: ethtool link ksettings struct to fill out 249 * 250 **/ 251 static void i40e_phy_type_to_ethtool(struct i40e_pf *pf, 252 struct ethtool_link_ksettings *ks) 253 { 254 struct i40e_link_status *hw_link_info = &pf->hw.phy.link_info; 255 u64 phy_types = pf->hw.phy.phy_types; 256 257 ethtool_link_ksettings_zero_link_mode(ks, supported); 258 ethtool_link_ksettings_zero_link_mode(ks, advertising); 259 260 if (phy_types & I40E_CAP_PHY_TYPE_SGMII) { 261 ethtool_link_ksettings_add_link_mode(ks, supported, 262 1000baseT_Full); 263 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 264 ethtool_link_ksettings_add_link_mode(ks, advertising, 265 1000baseT_Full); 266 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) { 267 ethtool_link_ksettings_add_link_mode(ks, supported, 268 100baseT_Full); 269 ethtool_link_ksettings_add_link_mode(ks, advertising, 270 100baseT_Full); 271 } 272 } 273 if (phy_types & I40E_CAP_PHY_TYPE_XAUI || 274 phy_types & I40E_CAP_PHY_TYPE_XFI || 275 phy_types & I40E_CAP_PHY_TYPE_SFI || 276 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SFPP_CU || 277 phy_types & I40E_CAP_PHY_TYPE_10GBASE_AOC) { 278 ethtool_link_ksettings_add_link_mode(ks, supported, 279 10000baseT_Full); 280 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 281 ethtool_link_ksettings_add_link_mode(ks, advertising, 282 10000baseT_Full); 283 } 284 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_T) { 285 ethtool_link_ksettings_add_link_mode(ks, supported, 286 10000baseT_Full); 287 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 288 ethtool_link_ksettings_add_link_mode(ks, advertising, 289 10000baseT_Full); 290 } 291 if (phy_types & I40E_CAP_PHY_TYPE_XLAUI || 292 phy_types & I40E_CAP_PHY_TYPE_XLPPI || 293 phy_types & I40E_CAP_PHY_TYPE_40GBASE_AOC) 294 ethtool_link_ksettings_add_link_mode(ks, supported, 295 40000baseCR4_Full); 296 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU || 297 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4) { 298 ethtool_link_ksettings_add_link_mode(ks, supported, 299 40000baseCR4_Full); 300 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_40GB) 301 ethtool_link_ksettings_add_link_mode(ks, advertising, 302 40000baseCR4_Full); 303 } 304 if (phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) { 305 ethtool_link_ksettings_add_link_mode(ks, supported, 306 100baseT_Full); 307 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 308 ethtool_link_ksettings_add_link_mode(ks, advertising, 309 100baseT_Full); 310 } 311 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_T) { 312 ethtool_link_ksettings_add_link_mode(ks, supported, 313 1000baseT_Full); 314 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 315 ethtool_link_ksettings_add_link_mode(ks, advertising, 316 1000baseT_Full); 317 } 318 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_SR4) 319 ethtool_link_ksettings_add_link_mode(ks, supported, 320 40000baseSR4_Full); 321 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_LR4) 322 ethtool_link_ksettings_add_link_mode(ks, supported, 323 40000baseLR4_Full); 324 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4) { 325 ethtool_link_ksettings_add_link_mode(ks, supported, 326 40000baseLR4_Full); 327 ethtool_link_ksettings_add_link_mode(ks, advertising, 328 40000baseLR4_Full); 329 } 330 if (phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2) { 331 ethtool_link_ksettings_add_link_mode(ks, supported, 332 20000baseKR2_Full); 333 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_20GB) 334 ethtool_link_ksettings_add_link_mode(ks, advertising, 335 20000baseKR2_Full); 336 } 337 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4) { 338 ethtool_link_ksettings_add_link_mode(ks, supported, 339 10000baseKX4_Full); 340 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 341 ethtool_link_ksettings_add_link_mode(ks, advertising, 342 10000baseKX4_Full); 343 } 344 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR && 345 !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) { 346 ethtool_link_ksettings_add_link_mode(ks, supported, 347 10000baseKR_Full); 348 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 349 ethtool_link_ksettings_add_link_mode(ks, advertising, 350 10000baseKR_Full); 351 } 352 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX && 353 !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) { 354 ethtool_link_ksettings_add_link_mode(ks, supported, 355 1000baseKX_Full); 356 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 357 ethtool_link_ksettings_add_link_mode(ks, advertising, 358 1000baseKX_Full); 359 } 360 /* need to add 25G PHY types */ 361 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR) { 362 ethtool_link_ksettings_add_link_mode(ks, supported, 363 25000baseKR_Full); 364 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 365 ethtool_link_ksettings_add_link_mode(ks, advertising, 366 25000baseKR_Full); 367 } 368 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR) { 369 ethtool_link_ksettings_add_link_mode(ks, supported, 370 25000baseCR_Full); 371 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 372 ethtool_link_ksettings_add_link_mode(ks, advertising, 373 25000baseCR_Full); 374 } 375 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 376 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR) { 377 ethtool_link_ksettings_add_link_mode(ks, supported, 378 25000baseSR_Full); 379 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 380 ethtool_link_ksettings_add_link_mode(ks, advertising, 381 25000baseSR_Full); 382 } 383 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_AOC || 384 phy_types & I40E_CAP_PHY_TYPE_25GBASE_ACC) { 385 ethtool_link_ksettings_add_link_mode(ks, supported, 386 25000baseCR_Full); 387 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 388 ethtool_link_ksettings_add_link_mode(ks, advertising, 389 25000baseCR_Full); 390 } 391 /* need to add new 10G PHY types */ 392 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 || 393 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU) { 394 ethtool_link_ksettings_add_link_mode(ks, supported, 395 10000baseCR_Full); 396 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 397 ethtool_link_ksettings_add_link_mode(ks, advertising, 398 10000baseCR_Full); 399 } 400 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR) { 401 ethtool_link_ksettings_add_link_mode(ks, supported, 402 10000baseSR_Full); 403 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 404 ethtool_link_ksettings_add_link_mode(ks, advertising, 405 10000baseSR_Full); 406 } 407 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR) { 408 ethtool_link_ksettings_add_link_mode(ks, supported, 409 10000baseLR_Full); 410 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 411 ethtool_link_ksettings_add_link_mode(ks, advertising, 412 10000baseLR_Full); 413 } 414 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX || 415 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX || 416 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL) { 417 ethtool_link_ksettings_add_link_mode(ks, supported, 418 1000baseX_Full); 419 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 420 ethtool_link_ksettings_add_link_mode(ks, advertising, 421 1000baseX_Full); 422 } 423 /* Autoneg PHY types */ 424 if (phy_types & I40E_CAP_PHY_TYPE_SGMII || 425 phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4 || 426 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU || 427 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4 || 428 phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 429 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR || 430 phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR || 431 phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR || 432 phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2 || 433 phy_types & I40E_CAP_PHY_TYPE_10GBASE_T || 434 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR || 435 phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR || 436 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4 || 437 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR || 438 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU || 439 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 || 440 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL || 441 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T || 442 phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX || 443 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX || 444 phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX || 445 phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) { 446 ethtool_link_ksettings_add_link_mode(ks, supported, 447 Autoneg); 448 ethtool_link_ksettings_add_link_mode(ks, advertising, 449 Autoneg); 450 } 451 } 452 453 /** 454 * i40e_get_settings_link_up - Get the Link settings for when link is up 455 * @hw: hw structure 456 * @ks: ethtool ksettings to fill in 457 * @netdev: network interface device structure 458 * @pf: pointer to physical function struct 459 **/ 460 static void i40e_get_settings_link_up(struct i40e_hw *hw, 461 struct ethtool_link_ksettings *ks, 462 struct net_device *netdev, 463 struct i40e_pf *pf) 464 { 465 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 466 struct ethtool_link_ksettings cap_ksettings; 467 u32 link_speed = hw_link_info->link_speed; 468 469 /* Initialize supported and advertised settings based on phy settings */ 470 switch (hw_link_info->phy_type) { 471 case I40E_PHY_TYPE_40GBASE_CR4: 472 case I40E_PHY_TYPE_40GBASE_CR4_CU: 473 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 474 ethtool_link_ksettings_add_link_mode(ks, supported, 475 40000baseCR4_Full); 476 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 477 ethtool_link_ksettings_add_link_mode(ks, advertising, 478 40000baseCR4_Full); 479 break; 480 case I40E_PHY_TYPE_XLAUI: 481 case I40E_PHY_TYPE_XLPPI: 482 case I40E_PHY_TYPE_40GBASE_AOC: 483 ethtool_link_ksettings_add_link_mode(ks, supported, 484 40000baseCR4_Full); 485 break; 486 case I40E_PHY_TYPE_40GBASE_SR4: 487 ethtool_link_ksettings_add_link_mode(ks, supported, 488 40000baseSR4_Full); 489 break; 490 case I40E_PHY_TYPE_40GBASE_LR4: 491 ethtool_link_ksettings_add_link_mode(ks, supported, 492 40000baseLR4_Full); 493 break; 494 case I40E_PHY_TYPE_25GBASE_SR: 495 case I40E_PHY_TYPE_25GBASE_LR: 496 case I40E_PHY_TYPE_10GBASE_SR: 497 case I40E_PHY_TYPE_10GBASE_LR: 498 case I40E_PHY_TYPE_1000BASE_SX: 499 case I40E_PHY_TYPE_1000BASE_LX: 500 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 501 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 502 ethtool_link_ksettings_add_link_mode(ks, supported, 503 25000baseSR_Full); 504 ethtool_link_ksettings_add_link_mode(ks, advertising, 505 25000baseSR_Full); 506 ethtool_link_ksettings_add_link_mode(ks, supported, 507 10000baseSR_Full); 508 ethtool_link_ksettings_add_link_mode(ks, advertising, 509 10000baseSR_Full); 510 ethtool_link_ksettings_add_link_mode(ks, supported, 511 10000baseLR_Full); 512 ethtool_link_ksettings_add_link_mode(ks, advertising, 513 10000baseLR_Full); 514 ethtool_link_ksettings_add_link_mode(ks, supported, 515 1000baseX_Full); 516 ethtool_link_ksettings_add_link_mode(ks, advertising, 517 1000baseX_Full); 518 ethtool_link_ksettings_add_link_mode(ks, supported, 519 10000baseT_Full); 520 if (hw_link_info->module_type[2] & 521 I40E_MODULE_TYPE_1000BASE_SX || 522 hw_link_info->module_type[2] & 523 I40E_MODULE_TYPE_1000BASE_LX) { 524 ethtool_link_ksettings_add_link_mode(ks, supported, 525 1000baseT_Full); 526 if (hw_link_info->requested_speeds & 527 I40E_LINK_SPEED_1GB) 528 ethtool_link_ksettings_add_link_mode( 529 ks, advertising, 1000baseT_Full); 530 } 531 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 532 ethtool_link_ksettings_add_link_mode(ks, advertising, 533 10000baseT_Full); 534 break; 535 case I40E_PHY_TYPE_10GBASE_T: 536 case I40E_PHY_TYPE_1000BASE_T: 537 case I40E_PHY_TYPE_100BASE_TX: 538 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 539 ethtool_link_ksettings_add_link_mode(ks, supported, 540 10000baseT_Full); 541 ethtool_link_ksettings_add_link_mode(ks, supported, 542 1000baseT_Full); 543 ethtool_link_ksettings_add_link_mode(ks, supported, 544 100baseT_Full); 545 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 546 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 547 ethtool_link_ksettings_add_link_mode(ks, advertising, 548 10000baseT_Full); 549 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 550 ethtool_link_ksettings_add_link_mode(ks, advertising, 551 1000baseT_Full); 552 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 553 ethtool_link_ksettings_add_link_mode(ks, advertising, 554 100baseT_Full); 555 break; 556 case I40E_PHY_TYPE_1000BASE_T_OPTICAL: 557 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 558 ethtool_link_ksettings_add_link_mode(ks, supported, 559 1000baseT_Full); 560 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 561 ethtool_link_ksettings_add_link_mode(ks, advertising, 562 1000baseT_Full); 563 break; 564 case I40E_PHY_TYPE_10GBASE_CR1_CU: 565 case I40E_PHY_TYPE_10GBASE_CR1: 566 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 567 ethtool_link_ksettings_add_link_mode(ks, supported, 568 10000baseT_Full); 569 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 570 ethtool_link_ksettings_add_link_mode(ks, advertising, 571 10000baseT_Full); 572 break; 573 case I40E_PHY_TYPE_XAUI: 574 case I40E_PHY_TYPE_XFI: 575 case I40E_PHY_TYPE_SFI: 576 case I40E_PHY_TYPE_10GBASE_SFPP_CU: 577 case I40E_PHY_TYPE_10GBASE_AOC: 578 ethtool_link_ksettings_add_link_mode(ks, supported, 579 10000baseT_Full); 580 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 581 ethtool_link_ksettings_add_link_mode(ks, advertising, 582 10000baseT_Full); 583 break; 584 case I40E_PHY_TYPE_SGMII: 585 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 586 ethtool_link_ksettings_add_link_mode(ks, supported, 587 1000baseT_Full); 588 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 589 ethtool_link_ksettings_add_link_mode(ks, advertising, 590 1000baseT_Full); 591 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) { 592 ethtool_link_ksettings_add_link_mode(ks, supported, 593 100baseT_Full); 594 if (hw_link_info->requested_speeds & 595 I40E_LINK_SPEED_100MB) 596 ethtool_link_ksettings_add_link_mode( 597 ks, advertising, 100baseT_Full); 598 } 599 break; 600 case I40E_PHY_TYPE_40GBASE_KR4: 601 case I40E_PHY_TYPE_25GBASE_KR: 602 case I40E_PHY_TYPE_20GBASE_KR2: 603 case I40E_PHY_TYPE_10GBASE_KR: 604 case I40E_PHY_TYPE_10GBASE_KX4: 605 case I40E_PHY_TYPE_1000BASE_KX: 606 ethtool_link_ksettings_add_link_mode(ks, supported, 607 40000baseKR4_Full); 608 ethtool_link_ksettings_add_link_mode(ks, supported, 609 25000baseKR_Full); 610 ethtool_link_ksettings_add_link_mode(ks, supported, 611 20000baseKR2_Full); 612 ethtool_link_ksettings_add_link_mode(ks, supported, 613 10000baseKR_Full); 614 ethtool_link_ksettings_add_link_mode(ks, supported, 615 10000baseKX4_Full); 616 ethtool_link_ksettings_add_link_mode(ks, supported, 617 1000baseKX_Full); 618 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 619 ethtool_link_ksettings_add_link_mode(ks, advertising, 620 40000baseKR4_Full); 621 ethtool_link_ksettings_add_link_mode(ks, advertising, 622 25000baseKR_Full); 623 ethtool_link_ksettings_add_link_mode(ks, advertising, 624 20000baseKR2_Full); 625 ethtool_link_ksettings_add_link_mode(ks, advertising, 626 10000baseKR_Full); 627 ethtool_link_ksettings_add_link_mode(ks, advertising, 628 10000baseKX4_Full); 629 ethtool_link_ksettings_add_link_mode(ks, advertising, 630 1000baseKX_Full); 631 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 632 break; 633 case I40E_PHY_TYPE_25GBASE_CR: 634 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 635 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 636 ethtool_link_ksettings_add_link_mode(ks, supported, 637 25000baseCR_Full); 638 ethtool_link_ksettings_add_link_mode(ks, advertising, 639 25000baseCR_Full); 640 break; 641 case I40E_PHY_TYPE_25GBASE_AOC: 642 case I40E_PHY_TYPE_25GBASE_ACC: 643 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 644 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 645 ethtool_link_ksettings_add_link_mode(ks, supported, 646 25000baseCR_Full); 647 648 ethtool_link_ksettings_add_link_mode(ks, advertising, 649 25000baseCR_Full); 650 ethtool_link_ksettings_add_link_mode(ks, supported, 651 10000baseCR_Full); 652 ethtool_link_ksettings_add_link_mode(ks, advertising, 653 10000baseCR_Full); 654 break; 655 default: 656 /* if we got here and link is up something bad is afoot */ 657 netdev_info(netdev, 658 "WARNING: Link is up but PHY type 0x%x is not recognized.\n", 659 hw_link_info->phy_type); 660 } 661 662 /* Now that we've worked out everything that could be supported by the 663 * current PHY type, get what is supported by the NVM and intersect 664 * them to get what is truly supported 665 */ 666 memset(&cap_ksettings, 0, sizeof(struct ethtool_link_ksettings)); 667 i40e_phy_type_to_ethtool(pf, &cap_ksettings); 668 ethtool_intersect_link_masks(ks, &cap_ksettings); 669 670 /* Set speed and duplex */ 671 switch (link_speed) { 672 case I40E_LINK_SPEED_40GB: 673 ks->base.speed = SPEED_40000; 674 break; 675 case I40E_LINK_SPEED_25GB: 676 ks->base.speed = SPEED_25000; 677 break; 678 case I40E_LINK_SPEED_20GB: 679 ks->base.speed = SPEED_20000; 680 break; 681 case I40E_LINK_SPEED_10GB: 682 ks->base.speed = SPEED_10000; 683 break; 684 case I40E_LINK_SPEED_1GB: 685 ks->base.speed = SPEED_1000; 686 break; 687 case I40E_LINK_SPEED_100MB: 688 ks->base.speed = SPEED_100; 689 break; 690 default: 691 break; 692 } 693 ks->base.duplex = DUPLEX_FULL; 694 } 695 696 /** 697 * i40e_get_settings_link_down - Get the Link settings for when link is down 698 * @hw: hw structure 699 * @ks: ethtool ksettings to fill in 700 * @pf: pointer to physical function struct 701 * 702 * Reports link settings that can be determined when link is down 703 **/ 704 static void i40e_get_settings_link_down(struct i40e_hw *hw, 705 struct ethtool_link_ksettings *ks, 706 struct i40e_pf *pf) 707 { 708 /* link is down and the driver needs to fall back on 709 * supported phy types to figure out what info to display 710 */ 711 i40e_phy_type_to_ethtool(pf, ks); 712 713 /* With no link speed and duplex are unknown */ 714 ks->base.speed = SPEED_UNKNOWN; 715 ks->base.duplex = DUPLEX_UNKNOWN; 716 } 717 718 /** 719 * i40e_get_link_ksettings - Get Link Speed and Duplex settings 720 * @netdev: network interface device structure 721 * @ks: ethtool ksettings 722 * 723 * Reports speed/duplex settings based on media_type 724 **/ 725 static int i40e_get_link_ksettings(struct net_device *netdev, 726 struct ethtool_link_ksettings *ks) 727 { 728 struct i40e_netdev_priv *np = netdev_priv(netdev); 729 struct i40e_pf *pf = np->vsi->back; 730 struct i40e_hw *hw = &pf->hw; 731 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 732 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 733 734 ethtool_link_ksettings_zero_link_mode(ks, supported); 735 ethtool_link_ksettings_zero_link_mode(ks, advertising); 736 737 if (link_up) 738 i40e_get_settings_link_up(hw, ks, netdev, pf); 739 else 740 i40e_get_settings_link_down(hw, ks, pf); 741 742 /* Now set the settings that don't rely on link being up/down */ 743 /* Set autoneg settings */ 744 ks->base.autoneg = ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 745 AUTONEG_ENABLE : AUTONEG_DISABLE); 746 747 /* Set media type settings */ 748 switch (hw->phy.media_type) { 749 case I40E_MEDIA_TYPE_BACKPLANE: 750 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 751 ethtool_link_ksettings_add_link_mode(ks, supported, Backplane); 752 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 753 ethtool_link_ksettings_add_link_mode(ks, advertising, 754 Backplane); 755 ks->base.port = PORT_NONE; 756 break; 757 case I40E_MEDIA_TYPE_BASET: 758 ethtool_link_ksettings_add_link_mode(ks, supported, TP); 759 ethtool_link_ksettings_add_link_mode(ks, advertising, TP); 760 ks->base.port = PORT_TP; 761 break; 762 case I40E_MEDIA_TYPE_DA: 763 case I40E_MEDIA_TYPE_CX4: 764 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE); 765 ethtool_link_ksettings_add_link_mode(ks, advertising, FIBRE); 766 ks->base.port = PORT_DA; 767 break; 768 case I40E_MEDIA_TYPE_FIBER: 769 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE); 770 ks->base.port = PORT_FIBRE; 771 break; 772 case I40E_MEDIA_TYPE_UNKNOWN: 773 default: 774 ks->base.port = PORT_OTHER; 775 break; 776 } 777 778 /* Set flow control settings */ 779 ethtool_link_ksettings_add_link_mode(ks, supported, Pause); 780 781 switch (hw->fc.requested_mode) { 782 case I40E_FC_FULL: 783 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause); 784 break; 785 case I40E_FC_TX_PAUSE: 786 ethtool_link_ksettings_add_link_mode(ks, advertising, 787 Asym_Pause); 788 break; 789 case I40E_FC_RX_PAUSE: 790 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause); 791 ethtool_link_ksettings_add_link_mode(ks, advertising, 792 Asym_Pause); 793 break; 794 default: 795 ethtool_link_ksettings_del_link_mode(ks, advertising, Pause); 796 ethtool_link_ksettings_del_link_mode(ks, advertising, 797 Asym_Pause); 798 break; 799 } 800 801 return 0; 802 } 803 804 /** 805 * i40e_set_link_ksettings - Set Speed and Duplex 806 * @netdev: network interface device structure 807 * @ks: ethtool ksettings 808 * 809 * Set speed/duplex per media_types advertised/forced 810 **/ 811 static int i40e_set_link_ksettings(struct net_device *netdev, 812 const struct ethtool_link_ksettings *ks) 813 { 814 struct i40e_netdev_priv *np = netdev_priv(netdev); 815 struct i40e_aq_get_phy_abilities_resp abilities; 816 struct ethtool_link_ksettings safe_ks; 817 struct ethtool_link_ksettings copy_ks; 818 struct i40e_aq_set_phy_config config; 819 struct i40e_pf *pf = np->vsi->back; 820 struct i40e_vsi *vsi = np->vsi; 821 struct i40e_hw *hw = &pf->hw; 822 bool autoneg_changed = false; 823 i40e_status status = 0; 824 int timeout = 50; 825 int err = 0; 826 u8 autoneg; 827 828 /* Changing port settings is not supported if this isn't the 829 * port's controlling PF 830 */ 831 if (hw->partition_id != 1) { 832 i40e_partition_setting_complaint(pf); 833 return -EOPNOTSUPP; 834 } 835 if (vsi != pf->vsi[pf->lan_vsi]) 836 return -EOPNOTSUPP; 837 if (hw->phy.media_type != I40E_MEDIA_TYPE_BASET && 838 hw->phy.media_type != I40E_MEDIA_TYPE_FIBER && 839 hw->phy.media_type != I40E_MEDIA_TYPE_BACKPLANE && 840 hw->phy.media_type != I40E_MEDIA_TYPE_DA && 841 hw->phy.link_info.link_info & I40E_AQ_LINK_UP) 842 return -EOPNOTSUPP; 843 if (hw->device_id == I40E_DEV_ID_KX_B || 844 hw->device_id == I40E_DEV_ID_KX_C || 845 hw->device_id == I40E_DEV_ID_20G_KR2 || 846 hw->device_id == I40E_DEV_ID_20G_KR2_A || 847 hw->device_id == I40E_DEV_ID_25G_B || 848 hw->device_id == I40E_DEV_ID_KX_X722) { 849 netdev_info(netdev, "Changing settings is not supported on backplane.\n"); 850 return -EOPNOTSUPP; 851 } 852 853 /* copy the ksettings to copy_ks to avoid modifying the origin */ 854 memcpy(©_ks, ks, sizeof(struct ethtool_link_ksettings)); 855 856 /* save autoneg out of ksettings */ 857 autoneg = copy_ks.base.autoneg; 858 859 /* get our own copy of the bits to check against */ 860 memset(&safe_ks, 0, sizeof(struct ethtool_link_ksettings)); 861 safe_ks.base.cmd = copy_ks.base.cmd; 862 safe_ks.base.link_mode_masks_nwords = 863 copy_ks.base.link_mode_masks_nwords; 864 i40e_get_link_ksettings(netdev, &safe_ks); 865 866 /* Get link modes supported by hardware and check against modes 867 * requested by the user. Return an error if unsupported mode was set. 868 */ 869 if (!bitmap_subset(copy_ks.link_modes.advertising, 870 safe_ks.link_modes.supported, 871 __ETHTOOL_LINK_MODE_MASK_NBITS)) 872 return -EINVAL; 873 874 /* set autoneg back to what it currently is */ 875 copy_ks.base.autoneg = safe_ks.base.autoneg; 876 877 /* If copy_ks.base and safe_ks.base are not the same now, then they are 878 * trying to set something that we do not support. 879 */ 880 if (memcmp(©_ks.base, &safe_ks.base, 881 sizeof(struct ethtool_link_settings))) 882 return -EOPNOTSUPP; 883 884 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) { 885 timeout--; 886 if (!timeout) 887 return -EBUSY; 888 usleep_range(1000, 2000); 889 } 890 891 /* Get the current phy config */ 892 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, 893 NULL); 894 if (status) { 895 err = -EAGAIN; 896 goto done; 897 } 898 899 /* Copy abilities to config in case autoneg is not 900 * set below 901 */ 902 memset(&config, 0, sizeof(struct i40e_aq_set_phy_config)); 903 config.abilities = abilities.abilities; 904 905 /* Check autoneg */ 906 if (autoneg == AUTONEG_ENABLE) { 907 /* If autoneg was not already enabled */ 908 if (!(hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED)) { 909 /* If autoneg is not supported, return error */ 910 if (!ethtool_link_ksettings_test_link_mode(&safe_ks, 911 supported, 912 Autoneg)) { 913 netdev_info(netdev, "Autoneg not supported on this phy\n"); 914 err = -EINVAL; 915 goto done; 916 } 917 /* Autoneg is allowed to change */ 918 config.abilities = abilities.abilities | 919 I40E_AQ_PHY_ENABLE_AN; 920 autoneg_changed = true; 921 } 922 } else { 923 /* If autoneg is currently enabled */ 924 if (hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED) { 925 /* If autoneg is supported 10GBASE_T is the only PHY 926 * that can disable it, so otherwise return error 927 */ 928 if (ethtool_link_ksettings_test_link_mode(&safe_ks, 929 supported, 930 Autoneg) && 931 hw->phy.link_info.phy_type != 932 I40E_PHY_TYPE_10GBASE_T) { 933 netdev_info(netdev, "Autoneg cannot be disabled on this phy\n"); 934 err = -EINVAL; 935 goto done; 936 } 937 /* Autoneg is allowed to change */ 938 config.abilities = abilities.abilities & 939 ~I40E_AQ_PHY_ENABLE_AN; 940 autoneg_changed = true; 941 } 942 } 943 944 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 945 100baseT_Full)) 946 config.link_speed |= I40E_LINK_SPEED_100MB; 947 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 948 1000baseT_Full) || 949 ethtool_link_ksettings_test_link_mode(ks, advertising, 950 1000baseX_Full) || 951 ethtool_link_ksettings_test_link_mode(ks, advertising, 952 1000baseKX_Full)) 953 config.link_speed |= I40E_LINK_SPEED_1GB; 954 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 955 10000baseT_Full) || 956 ethtool_link_ksettings_test_link_mode(ks, advertising, 957 10000baseKX4_Full) || 958 ethtool_link_ksettings_test_link_mode(ks, advertising, 959 10000baseKR_Full) || 960 ethtool_link_ksettings_test_link_mode(ks, advertising, 961 10000baseCR_Full) || 962 ethtool_link_ksettings_test_link_mode(ks, advertising, 963 10000baseSR_Full) || 964 ethtool_link_ksettings_test_link_mode(ks, advertising, 965 10000baseLR_Full)) 966 config.link_speed |= I40E_LINK_SPEED_10GB; 967 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 968 20000baseKR2_Full)) 969 config.link_speed |= I40E_LINK_SPEED_20GB; 970 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 971 25000baseCR_Full) || 972 ethtool_link_ksettings_test_link_mode(ks, advertising, 973 25000baseKR_Full) || 974 ethtool_link_ksettings_test_link_mode(ks, advertising, 975 25000baseSR_Full)) 976 config.link_speed |= I40E_LINK_SPEED_25GB; 977 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 978 40000baseKR4_Full) || 979 ethtool_link_ksettings_test_link_mode(ks, advertising, 980 40000baseCR4_Full) || 981 ethtool_link_ksettings_test_link_mode(ks, advertising, 982 40000baseSR4_Full) || 983 ethtool_link_ksettings_test_link_mode(ks, advertising, 984 40000baseLR4_Full)) 985 config.link_speed |= I40E_LINK_SPEED_40GB; 986 987 /* If speed didn't get set, set it to what it currently is. 988 * This is needed because if advertise is 0 (as it is when autoneg 989 * is disabled) then speed won't get set. 990 */ 991 if (!config.link_speed) 992 config.link_speed = abilities.link_speed; 993 if (autoneg_changed || abilities.link_speed != config.link_speed) { 994 /* copy over the rest of the abilities */ 995 config.phy_type = abilities.phy_type; 996 config.phy_type_ext = abilities.phy_type_ext; 997 config.eee_capability = abilities.eee_capability; 998 config.eeer = abilities.eeer_val; 999 config.low_power_ctrl = abilities.d3_lpan; 1000 config.fec_config = abilities.fec_cfg_curr_mod_ext_info & 1001 I40E_AQ_PHY_FEC_CONFIG_MASK; 1002 1003 /* save the requested speeds */ 1004 hw->phy.link_info.requested_speeds = config.link_speed; 1005 /* set link and auto negotiation so changes take effect */ 1006 config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK; 1007 /* If link is up put link down */ 1008 if (hw->phy.link_info.link_info & I40E_AQ_LINK_UP) { 1009 /* Tell the OS link is going down, the link will go 1010 * back up when fw says it is ready asynchronously 1011 */ 1012 i40e_print_link_message(vsi, false); 1013 netif_carrier_off(netdev); 1014 netif_tx_stop_all_queues(netdev); 1015 } 1016 1017 /* make the aq call */ 1018 status = i40e_aq_set_phy_config(hw, &config, NULL); 1019 if (status) { 1020 netdev_info(netdev, 1021 "Set phy config failed, err %s aq_err %s\n", 1022 i40e_stat_str(hw, status), 1023 i40e_aq_str(hw, hw->aq.asq_last_status)); 1024 err = -EAGAIN; 1025 goto done; 1026 } 1027 1028 status = i40e_update_link_info(hw); 1029 if (status) 1030 netdev_dbg(netdev, 1031 "Updating link info failed with err %s aq_err %s\n", 1032 i40e_stat_str(hw, status), 1033 i40e_aq_str(hw, hw->aq.asq_last_status)); 1034 1035 } else { 1036 netdev_info(netdev, "Nothing changed, exiting without setting anything.\n"); 1037 } 1038 1039 done: 1040 clear_bit(__I40E_CONFIG_BUSY, pf->state); 1041 1042 return err; 1043 } 1044 1045 static int i40e_nway_reset(struct net_device *netdev) 1046 { 1047 /* restart autonegotiation */ 1048 struct i40e_netdev_priv *np = netdev_priv(netdev); 1049 struct i40e_pf *pf = np->vsi->back; 1050 struct i40e_hw *hw = &pf->hw; 1051 bool link_up = hw->phy.link_info.link_info & I40E_AQ_LINK_UP; 1052 i40e_status ret = 0; 1053 1054 ret = i40e_aq_set_link_restart_an(hw, link_up, NULL); 1055 if (ret) { 1056 netdev_info(netdev, "link restart failed, err %s aq_err %s\n", 1057 i40e_stat_str(hw, ret), 1058 i40e_aq_str(hw, hw->aq.asq_last_status)); 1059 return -EIO; 1060 } 1061 1062 return 0; 1063 } 1064 1065 /** 1066 * i40e_get_pauseparam - Get Flow Control status 1067 * @netdev: netdevice structure 1068 * @pause: buffer to return pause parameters 1069 * 1070 * Return tx/rx-pause status 1071 **/ 1072 static void i40e_get_pauseparam(struct net_device *netdev, 1073 struct ethtool_pauseparam *pause) 1074 { 1075 struct i40e_netdev_priv *np = netdev_priv(netdev); 1076 struct i40e_pf *pf = np->vsi->back; 1077 struct i40e_hw *hw = &pf->hw; 1078 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 1079 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 1080 1081 pause->autoneg = 1082 ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 1083 AUTONEG_ENABLE : AUTONEG_DISABLE); 1084 1085 /* PFC enabled so report LFC as off */ 1086 if (dcbx_cfg->pfc.pfcenable) { 1087 pause->rx_pause = 0; 1088 pause->tx_pause = 0; 1089 return; 1090 } 1091 1092 if (hw->fc.current_mode == I40E_FC_RX_PAUSE) { 1093 pause->rx_pause = 1; 1094 } else if (hw->fc.current_mode == I40E_FC_TX_PAUSE) { 1095 pause->tx_pause = 1; 1096 } else if (hw->fc.current_mode == I40E_FC_FULL) { 1097 pause->rx_pause = 1; 1098 pause->tx_pause = 1; 1099 } 1100 } 1101 1102 /** 1103 * i40e_set_pauseparam - Set Flow Control parameter 1104 * @netdev: network interface device structure 1105 * @pause: return tx/rx flow control status 1106 **/ 1107 static int i40e_set_pauseparam(struct net_device *netdev, 1108 struct ethtool_pauseparam *pause) 1109 { 1110 struct i40e_netdev_priv *np = netdev_priv(netdev); 1111 struct i40e_pf *pf = np->vsi->back; 1112 struct i40e_vsi *vsi = np->vsi; 1113 struct i40e_hw *hw = &pf->hw; 1114 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 1115 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 1116 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 1117 i40e_status status; 1118 u8 aq_failures; 1119 int err = 0; 1120 1121 /* Changing the port's flow control is not supported if this isn't the 1122 * port's controlling PF 1123 */ 1124 if (hw->partition_id != 1) { 1125 i40e_partition_setting_complaint(pf); 1126 return -EOPNOTSUPP; 1127 } 1128 1129 if (vsi != pf->vsi[pf->lan_vsi]) 1130 return -EOPNOTSUPP; 1131 1132 if (pause->autoneg != ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 1133 AUTONEG_ENABLE : AUTONEG_DISABLE)) { 1134 netdev_info(netdev, "To change autoneg please use: ethtool -s <dev> autoneg <on|off>\n"); 1135 return -EOPNOTSUPP; 1136 } 1137 1138 /* If we have link and don't have autoneg */ 1139 if (!test_bit(__I40E_DOWN, pf->state) && 1140 !(hw_link_info->an_info & I40E_AQ_AN_COMPLETED)) { 1141 /* Send message that it might not necessarily work*/ 1142 netdev_info(netdev, "Autoneg did not complete so changing settings may not result in an actual change.\n"); 1143 } 1144 1145 if (dcbx_cfg->pfc.pfcenable) { 1146 netdev_info(netdev, 1147 "Priority flow control enabled. Cannot set link flow control.\n"); 1148 return -EOPNOTSUPP; 1149 } 1150 1151 if (pause->rx_pause && pause->tx_pause) 1152 hw->fc.requested_mode = I40E_FC_FULL; 1153 else if (pause->rx_pause && !pause->tx_pause) 1154 hw->fc.requested_mode = I40E_FC_RX_PAUSE; 1155 else if (!pause->rx_pause && pause->tx_pause) 1156 hw->fc.requested_mode = I40E_FC_TX_PAUSE; 1157 else if (!pause->rx_pause && !pause->tx_pause) 1158 hw->fc.requested_mode = I40E_FC_NONE; 1159 else 1160 return -EINVAL; 1161 1162 /* Tell the OS link is going down, the link will go back up when fw 1163 * says it is ready asynchronously 1164 */ 1165 i40e_print_link_message(vsi, false); 1166 netif_carrier_off(netdev); 1167 netif_tx_stop_all_queues(netdev); 1168 1169 /* Set the fc mode and only restart an if link is up*/ 1170 status = i40e_set_fc(hw, &aq_failures, link_up); 1171 1172 if (aq_failures & I40E_SET_FC_AQ_FAIL_GET) { 1173 netdev_info(netdev, "Set fc failed on the get_phy_capabilities call with err %s aq_err %s\n", 1174 i40e_stat_str(hw, status), 1175 i40e_aq_str(hw, hw->aq.asq_last_status)); 1176 err = -EAGAIN; 1177 } 1178 if (aq_failures & I40E_SET_FC_AQ_FAIL_SET) { 1179 netdev_info(netdev, "Set fc failed on the set_phy_config call with err %s aq_err %s\n", 1180 i40e_stat_str(hw, status), 1181 i40e_aq_str(hw, hw->aq.asq_last_status)); 1182 err = -EAGAIN; 1183 } 1184 if (aq_failures & I40E_SET_FC_AQ_FAIL_UPDATE) { 1185 netdev_info(netdev, "Set fc failed on the get_link_info call with err %s aq_err %s\n", 1186 i40e_stat_str(hw, status), 1187 i40e_aq_str(hw, hw->aq.asq_last_status)); 1188 err = -EAGAIN; 1189 } 1190 1191 if (!test_bit(__I40E_DOWN, pf->state)) { 1192 /* Give it a little more time to try to come back */ 1193 msleep(75); 1194 if (!test_bit(__I40E_DOWN, pf->state)) 1195 return i40e_nway_reset(netdev); 1196 } 1197 1198 return err; 1199 } 1200 1201 static u32 i40e_get_msglevel(struct net_device *netdev) 1202 { 1203 struct i40e_netdev_priv *np = netdev_priv(netdev); 1204 struct i40e_pf *pf = np->vsi->back; 1205 u32 debug_mask = pf->hw.debug_mask; 1206 1207 if (debug_mask) 1208 netdev_info(netdev, "i40e debug_mask: 0x%08X\n", debug_mask); 1209 1210 return pf->msg_enable; 1211 } 1212 1213 static void i40e_set_msglevel(struct net_device *netdev, u32 data) 1214 { 1215 struct i40e_netdev_priv *np = netdev_priv(netdev); 1216 struct i40e_pf *pf = np->vsi->back; 1217 1218 if (I40E_DEBUG_USER & data) 1219 pf->hw.debug_mask = data; 1220 else 1221 pf->msg_enable = data; 1222 } 1223 1224 static int i40e_get_regs_len(struct net_device *netdev) 1225 { 1226 int reg_count = 0; 1227 int i; 1228 1229 for (i = 0; i40e_reg_list[i].offset != 0; i++) 1230 reg_count += i40e_reg_list[i].elements; 1231 1232 return reg_count * sizeof(u32); 1233 } 1234 1235 static void i40e_get_regs(struct net_device *netdev, struct ethtool_regs *regs, 1236 void *p) 1237 { 1238 struct i40e_netdev_priv *np = netdev_priv(netdev); 1239 struct i40e_pf *pf = np->vsi->back; 1240 struct i40e_hw *hw = &pf->hw; 1241 u32 *reg_buf = p; 1242 unsigned int i, j, ri; 1243 u32 reg; 1244 1245 /* Tell ethtool which driver-version-specific regs output we have. 1246 * 1247 * At some point, if we have ethtool doing special formatting of 1248 * this data, it will rely on this version number to know how to 1249 * interpret things. Hence, this needs to be updated if/when the 1250 * diags register table is changed. 1251 */ 1252 regs->version = 1; 1253 1254 /* loop through the diags reg table for what to print */ 1255 ri = 0; 1256 for (i = 0; i40e_reg_list[i].offset != 0; i++) { 1257 for (j = 0; j < i40e_reg_list[i].elements; j++) { 1258 reg = i40e_reg_list[i].offset 1259 + (j * i40e_reg_list[i].stride); 1260 reg_buf[ri++] = rd32(hw, reg); 1261 } 1262 } 1263 1264 } 1265 1266 static int i40e_get_eeprom(struct net_device *netdev, 1267 struct ethtool_eeprom *eeprom, u8 *bytes) 1268 { 1269 struct i40e_netdev_priv *np = netdev_priv(netdev); 1270 struct i40e_hw *hw = &np->vsi->back->hw; 1271 struct i40e_pf *pf = np->vsi->back; 1272 int ret_val = 0, len, offset; 1273 u8 *eeprom_buff; 1274 u16 i, sectors; 1275 bool last; 1276 u32 magic; 1277 1278 #define I40E_NVM_SECTOR_SIZE 4096 1279 if (eeprom->len == 0) 1280 return -EINVAL; 1281 1282 /* check for NVMUpdate access method */ 1283 magic = hw->vendor_id | (hw->device_id << 16); 1284 if (eeprom->magic && eeprom->magic != magic) { 1285 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1286 int errno = 0; 1287 1288 /* make sure it is the right magic for NVMUpdate */ 1289 if ((eeprom->magic >> 16) != hw->device_id) 1290 errno = -EINVAL; 1291 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 1292 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 1293 errno = -EBUSY; 1294 else 1295 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1296 1297 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1298 dev_info(&pf->pdev->dev, 1299 "NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1300 ret_val, hw->aq.asq_last_status, errno, 1301 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1302 cmd->offset, cmd->data_size); 1303 1304 return errno; 1305 } 1306 1307 /* normal ethtool get_eeprom support */ 1308 eeprom->magic = hw->vendor_id | (hw->device_id << 16); 1309 1310 eeprom_buff = kzalloc(eeprom->len, GFP_KERNEL); 1311 if (!eeprom_buff) 1312 return -ENOMEM; 1313 1314 ret_val = i40e_acquire_nvm(hw, I40E_RESOURCE_READ); 1315 if (ret_val) { 1316 dev_info(&pf->pdev->dev, 1317 "Failed Acquiring NVM resource for read err=%d status=0x%x\n", 1318 ret_val, hw->aq.asq_last_status); 1319 goto free_buff; 1320 } 1321 1322 sectors = eeprom->len / I40E_NVM_SECTOR_SIZE; 1323 sectors += (eeprom->len % I40E_NVM_SECTOR_SIZE) ? 1 : 0; 1324 len = I40E_NVM_SECTOR_SIZE; 1325 last = false; 1326 for (i = 0; i < sectors; i++) { 1327 if (i == (sectors - 1)) { 1328 len = eeprom->len - (I40E_NVM_SECTOR_SIZE * i); 1329 last = true; 1330 } 1331 offset = eeprom->offset + (I40E_NVM_SECTOR_SIZE * i), 1332 ret_val = i40e_aq_read_nvm(hw, 0x0, offset, len, 1333 (u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i), 1334 last, NULL); 1335 if (ret_val && hw->aq.asq_last_status == I40E_AQ_RC_EPERM) { 1336 dev_info(&pf->pdev->dev, 1337 "read NVM failed, invalid offset 0x%x\n", 1338 offset); 1339 break; 1340 } else if (ret_val && 1341 hw->aq.asq_last_status == I40E_AQ_RC_EACCES) { 1342 dev_info(&pf->pdev->dev, 1343 "read NVM failed, access, offset 0x%x\n", 1344 offset); 1345 break; 1346 } else if (ret_val) { 1347 dev_info(&pf->pdev->dev, 1348 "read NVM failed offset %d err=%d status=0x%x\n", 1349 offset, ret_val, hw->aq.asq_last_status); 1350 break; 1351 } 1352 } 1353 1354 i40e_release_nvm(hw); 1355 memcpy(bytes, (u8 *)eeprom_buff, eeprom->len); 1356 free_buff: 1357 kfree(eeprom_buff); 1358 return ret_val; 1359 } 1360 1361 static int i40e_get_eeprom_len(struct net_device *netdev) 1362 { 1363 struct i40e_netdev_priv *np = netdev_priv(netdev); 1364 struct i40e_hw *hw = &np->vsi->back->hw; 1365 u32 val; 1366 1367 #define X722_EEPROM_SCOPE_LIMIT 0x5B9FFF 1368 if (hw->mac.type == I40E_MAC_X722) { 1369 val = X722_EEPROM_SCOPE_LIMIT + 1; 1370 return val; 1371 } 1372 val = (rd32(hw, I40E_GLPCI_LBARCTRL) 1373 & I40E_GLPCI_LBARCTRL_FL_SIZE_MASK) 1374 >> I40E_GLPCI_LBARCTRL_FL_SIZE_SHIFT; 1375 /* register returns value in power of 2, 64Kbyte chunks. */ 1376 val = (64 * 1024) * BIT(val); 1377 return val; 1378 } 1379 1380 static int i40e_set_eeprom(struct net_device *netdev, 1381 struct ethtool_eeprom *eeprom, u8 *bytes) 1382 { 1383 struct i40e_netdev_priv *np = netdev_priv(netdev); 1384 struct i40e_hw *hw = &np->vsi->back->hw; 1385 struct i40e_pf *pf = np->vsi->back; 1386 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1387 int ret_val = 0; 1388 int errno = 0; 1389 u32 magic; 1390 1391 /* normal ethtool set_eeprom is not supported */ 1392 magic = hw->vendor_id | (hw->device_id << 16); 1393 if (eeprom->magic == magic) 1394 errno = -EOPNOTSUPP; 1395 /* check for NVMUpdate access method */ 1396 else if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id) 1397 errno = -EINVAL; 1398 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 1399 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 1400 errno = -EBUSY; 1401 else 1402 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1403 1404 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1405 dev_info(&pf->pdev->dev, 1406 "NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1407 ret_val, hw->aq.asq_last_status, errno, 1408 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1409 cmd->offset, cmd->data_size); 1410 1411 return errno; 1412 } 1413 1414 static void i40e_get_drvinfo(struct net_device *netdev, 1415 struct ethtool_drvinfo *drvinfo) 1416 { 1417 struct i40e_netdev_priv *np = netdev_priv(netdev); 1418 struct i40e_vsi *vsi = np->vsi; 1419 struct i40e_pf *pf = vsi->back; 1420 1421 strlcpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver)); 1422 strlcpy(drvinfo->version, i40e_driver_version_str, 1423 sizeof(drvinfo->version)); 1424 strlcpy(drvinfo->fw_version, i40e_nvm_version_str(&pf->hw), 1425 sizeof(drvinfo->fw_version)); 1426 strlcpy(drvinfo->bus_info, pci_name(pf->pdev), 1427 sizeof(drvinfo->bus_info)); 1428 drvinfo->n_priv_flags = I40E_PRIV_FLAGS_STR_LEN; 1429 if (pf->hw.pf_id == 0) 1430 drvinfo->n_priv_flags += I40E_GL_PRIV_FLAGS_STR_LEN; 1431 } 1432 1433 static void i40e_get_ringparam(struct net_device *netdev, 1434 struct ethtool_ringparam *ring) 1435 { 1436 struct i40e_netdev_priv *np = netdev_priv(netdev); 1437 struct i40e_pf *pf = np->vsi->back; 1438 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 1439 1440 ring->rx_max_pending = I40E_MAX_NUM_DESCRIPTORS; 1441 ring->tx_max_pending = I40E_MAX_NUM_DESCRIPTORS; 1442 ring->rx_mini_max_pending = 0; 1443 ring->rx_jumbo_max_pending = 0; 1444 ring->rx_pending = vsi->rx_rings[0]->count; 1445 ring->tx_pending = vsi->tx_rings[0]->count; 1446 ring->rx_mini_pending = 0; 1447 ring->rx_jumbo_pending = 0; 1448 } 1449 1450 static bool i40e_active_tx_ring_index(struct i40e_vsi *vsi, u16 index) 1451 { 1452 if (i40e_enabled_xdp_vsi(vsi)) { 1453 return index < vsi->num_queue_pairs || 1454 (index >= vsi->alloc_queue_pairs && 1455 index < vsi->alloc_queue_pairs + vsi->num_queue_pairs); 1456 } 1457 1458 return index < vsi->num_queue_pairs; 1459 } 1460 1461 static int i40e_set_ringparam(struct net_device *netdev, 1462 struct ethtool_ringparam *ring) 1463 { 1464 struct i40e_ring *tx_rings = NULL, *rx_rings = NULL; 1465 struct i40e_netdev_priv *np = netdev_priv(netdev); 1466 struct i40e_hw *hw = &np->vsi->back->hw; 1467 struct i40e_vsi *vsi = np->vsi; 1468 struct i40e_pf *pf = vsi->back; 1469 u32 new_rx_count, new_tx_count; 1470 u16 tx_alloc_queue_pairs; 1471 int timeout = 50; 1472 int i, err = 0; 1473 1474 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) 1475 return -EINVAL; 1476 1477 if (ring->tx_pending > I40E_MAX_NUM_DESCRIPTORS || 1478 ring->tx_pending < I40E_MIN_NUM_DESCRIPTORS || 1479 ring->rx_pending > I40E_MAX_NUM_DESCRIPTORS || 1480 ring->rx_pending < I40E_MIN_NUM_DESCRIPTORS) { 1481 netdev_info(netdev, 1482 "Descriptors requested (Tx: %d / Rx: %d) out of range [%d-%d]\n", 1483 ring->tx_pending, ring->rx_pending, 1484 I40E_MIN_NUM_DESCRIPTORS, I40E_MAX_NUM_DESCRIPTORS); 1485 return -EINVAL; 1486 } 1487 1488 new_tx_count = ALIGN(ring->tx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 1489 new_rx_count = ALIGN(ring->rx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 1490 1491 /* if nothing to do return success */ 1492 if ((new_tx_count == vsi->tx_rings[0]->count) && 1493 (new_rx_count == vsi->rx_rings[0]->count)) 1494 return 0; 1495 1496 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) { 1497 timeout--; 1498 if (!timeout) 1499 return -EBUSY; 1500 usleep_range(1000, 2000); 1501 } 1502 1503 if (!netif_running(vsi->netdev)) { 1504 /* simple case - set for the next time the netdev is started */ 1505 for (i = 0; i < vsi->num_queue_pairs; i++) { 1506 vsi->tx_rings[i]->count = new_tx_count; 1507 vsi->rx_rings[i]->count = new_rx_count; 1508 if (i40e_enabled_xdp_vsi(vsi)) 1509 vsi->xdp_rings[i]->count = new_tx_count; 1510 } 1511 goto done; 1512 } 1513 1514 /* We can't just free everything and then setup again, 1515 * because the ISRs in MSI-X mode get passed pointers 1516 * to the Tx and Rx ring structs. 1517 */ 1518 1519 /* alloc updated Tx and XDP Tx resources */ 1520 tx_alloc_queue_pairs = vsi->alloc_queue_pairs * 1521 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1); 1522 if (new_tx_count != vsi->tx_rings[0]->count) { 1523 netdev_info(netdev, 1524 "Changing Tx descriptor count from %d to %d.\n", 1525 vsi->tx_rings[0]->count, new_tx_count); 1526 tx_rings = kcalloc(tx_alloc_queue_pairs, 1527 sizeof(struct i40e_ring), GFP_KERNEL); 1528 if (!tx_rings) { 1529 err = -ENOMEM; 1530 goto done; 1531 } 1532 1533 for (i = 0; i < tx_alloc_queue_pairs; i++) { 1534 if (!i40e_active_tx_ring_index(vsi, i)) 1535 continue; 1536 1537 tx_rings[i] = *vsi->tx_rings[i]; 1538 tx_rings[i].count = new_tx_count; 1539 /* the desc and bi pointers will be reallocated in the 1540 * setup call 1541 */ 1542 tx_rings[i].desc = NULL; 1543 tx_rings[i].rx_bi = NULL; 1544 err = i40e_setup_tx_descriptors(&tx_rings[i]); 1545 if (err) { 1546 while (i) { 1547 i--; 1548 if (!i40e_active_tx_ring_index(vsi, i)) 1549 continue; 1550 i40e_free_tx_resources(&tx_rings[i]); 1551 } 1552 kfree(tx_rings); 1553 tx_rings = NULL; 1554 1555 goto done; 1556 } 1557 } 1558 } 1559 1560 /* alloc updated Rx resources */ 1561 if (new_rx_count != vsi->rx_rings[0]->count) { 1562 netdev_info(netdev, 1563 "Changing Rx descriptor count from %d to %d\n", 1564 vsi->rx_rings[0]->count, new_rx_count); 1565 rx_rings = kcalloc(vsi->alloc_queue_pairs, 1566 sizeof(struct i40e_ring), GFP_KERNEL); 1567 if (!rx_rings) { 1568 err = -ENOMEM; 1569 goto free_tx; 1570 } 1571 1572 for (i = 0; i < vsi->num_queue_pairs; i++) { 1573 u16 unused; 1574 1575 /* clone ring and setup updated count */ 1576 rx_rings[i] = *vsi->rx_rings[i]; 1577 rx_rings[i].count = new_rx_count; 1578 /* the desc and bi pointers will be reallocated in the 1579 * setup call 1580 */ 1581 rx_rings[i].desc = NULL; 1582 rx_rings[i].rx_bi = NULL; 1583 /* Clear cloned XDP RX-queue info before setup call */ 1584 memset(&rx_rings[i].xdp_rxq, 0, sizeof(rx_rings[i].xdp_rxq)); 1585 /* this is to allow wr32 to have something to write to 1586 * during early allocation of Rx buffers 1587 */ 1588 rx_rings[i].tail = hw->hw_addr + I40E_PRTGEN_STATUS; 1589 err = i40e_setup_rx_descriptors(&rx_rings[i]); 1590 if (err) 1591 goto rx_unwind; 1592 1593 /* now allocate the Rx buffers to make sure the OS 1594 * has enough memory, any failure here means abort 1595 */ 1596 unused = I40E_DESC_UNUSED(&rx_rings[i]); 1597 err = i40e_alloc_rx_buffers(&rx_rings[i], unused); 1598 rx_unwind: 1599 if (err) { 1600 do { 1601 i40e_free_rx_resources(&rx_rings[i]); 1602 } while (i--); 1603 kfree(rx_rings); 1604 rx_rings = NULL; 1605 1606 goto free_tx; 1607 } 1608 } 1609 } 1610 1611 /* Bring interface down, copy in the new ring info, 1612 * then restore the interface 1613 */ 1614 i40e_down(vsi); 1615 1616 if (tx_rings) { 1617 for (i = 0; i < tx_alloc_queue_pairs; i++) { 1618 if (i40e_active_tx_ring_index(vsi, i)) { 1619 i40e_free_tx_resources(vsi->tx_rings[i]); 1620 *vsi->tx_rings[i] = tx_rings[i]; 1621 } 1622 } 1623 kfree(tx_rings); 1624 tx_rings = NULL; 1625 } 1626 1627 if (rx_rings) { 1628 for (i = 0; i < vsi->num_queue_pairs; i++) { 1629 i40e_free_rx_resources(vsi->rx_rings[i]); 1630 /* get the real tail offset */ 1631 rx_rings[i].tail = vsi->rx_rings[i]->tail; 1632 /* this is to fake out the allocation routine 1633 * into thinking it has to realloc everything 1634 * but the recycling logic will let us re-use 1635 * the buffers allocated above 1636 */ 1637 rx_rings[i].next_to_use = 0; 1638 rx_rings[i].next_to_clean = 0; 1639 rx_rings[i].next_to_alloc = 0; 1640 /* do a struct copy */ 1641 *vsi->rx_rings[i] = rx_rings[i]; 1642 } 1643 kfree(rx_rings); 1644 rx_rings = NULL; 1645 } 1646 1647 i40e_up(vsi); 1648 1649 free_tx: 1650 /* error cleanup if the Rx allocations failed after getting Tx */ 1651 if (tx_rings) { 1652 for (i = 0; i < tx_alloc_queue_pairs; i++) { 1653 if (i40e_active_tx_ring_index(vsi, i)) 1654 i40e_free_tx_resources(vsi->tx_rings[i]); 1655 } 1656 kfree(tx_rings); 1657 tx_rings = NULL; 1658 } 1659 1660 done: 1661 clear_bit(__I40E_CONFIG_BUSY, pf->state); 1662 1663 return err; 1664 } 1665 1666 /** 1667 * i40e_get_stats_count - return the stats count for a device 1668 * @netdev: the netdev to return the count for 1669 * 1670 * Returns the total number of statistics for this netdev. Note that even 1671 * though this is a function, it is required that the count for a specific 1672 * netdev must never change. Basing the count on static values such as the 1673 * maximum number of queues or the device type is ok. However, the API for 1674 * obtaining stats is *not* safe against changes based on non-static 1675 * values such as the *current* number of queues, or runtime flags. 1676 * 1677 * If a statistic is not always enabled, return it as part of the count 1678 * anyways, always return its string, and report its value as zero. 1679 **/ 1680 static int i40e_get_stats_count(struct net_device *netdev) 1681 { 1682 struct i40e_netdev_priv *np = netdev_priv(netdev); 1683 struct i40e_vsi *vsi = np->vsi; 1684 struct i40e_pf *pf = vsi->back; 1685 int stats_len; 1686 1687 if (vsi == pf->vsi[pf->lan_vsi] && pf->hw.partition_id == 1) 1688 stats_len = I40E_PF_STATS_LEN; 1689 else 1690 stats_len = I40E_VSI_STATS_LEN; 1691 1692 /* The number of stats reported for a given net_device must remain 1693 * constant throughout the life of that device. 1694 * 1695 * This is because the API for obtaining the size, strings, and stats 1696 * is spread out over three separate ethtool ioctls. There is no safe 1697 * way to lock the number of stats across these calls, so we must 1698 * assume that they will never change. 1699 * 1700 * Due to this, we report the maximum number of queues, even if not 1701 * every queue is currently configured. Since we always allocate 1702 * queues in pairs, we'll just use netdev->num_tx_queues * 2. This 1703 * works because the num_tx_queues is set at device creation and never 1704 * changes. 1705 */ 1706 stats_len += I40E_QUEUE_STATS_LEN * 2 * netdev->num_tx_queues; 1707 1708 return stats_len; 1709 } 1710 1711 static int i40e_get_sset_count(struct net_device *netdev, int sset) 1712 { 1713 struct i40e_netdev_priv *np = netdev_priv(netdev); 1714 struct i40e_vsi *vsi = np->vsi; 1715 struct i40e_pf *pf = vsi->back; 1716 1717 switch (sset) { 1718 case ETH_SS_TEST: 1719 return I40E_TEST_LEN; 1720 case ETH_SS_STATS: 1721 return i40e_get_stats_count(netdev); 1722 case ETH_SS_PRIV_FLAGS: 1723 return I40E_PRIV_FLAGS_STR_LEN + 1724 (pf->hw.pf_id == 0 ? I40E_GL_PRIV_FLAGS_STR_LEN : 0); 1725 default: 1726 return -EOPNOTSUPP; 1727 } 1728 } 1729 1730 /** 1731 * i40e_get_pfc_stats - copy HW PFC statistics to formatted structure 1732 * @pf: the PF device structure 1733 * @i: the priority value to copy 1734 * 1735 * The PFC stats are found as arrays in pf->stats, which is not easy to pass 1736 * into i40e_add_ethtool_stats. Produce a formatted i40e_pfc_stats structure 1737 * of the PFC stats for the given priority. 1738 **/ 1739 static inline struct i40e_pfc_stats 1740 i40e_get_pfc_stats(struct i40e_pf *pf, unsigned int i) 1741 { 1742 #define I40E_GET_PFC_STAT(stat, priority) \ 1743 .stat = pf->stats.stat[priority] 1744 1745 struct i40e_pfc_stats pfc = { 1746 I40E_GET_PFC_STAT(priority_xon_rx, i), 1747 I40E_GET_PFC_STAT(priority_xoff_rx, i), 1748 I40E_GET_PFC_STAT(priority_xon_tx, i), 1749 I40E_GET_PFC_STAT(priority_xoff_tx, i), 1750 I40E_GET_PFC_STAT(priority_xon_2_xoff, i), 1751 }; 1752 return pfc; 1753 } 1754 1755 /** 1756 * i40e_get_ethtool_stats - copy stat values into supplied buffer 1757 * @netdev: the netdev to collect stats for 1758 * @stats: ethtool stats command structure 1759 * @data: ethtool supplied buffer 1760 * 1761 * Copy the stats values for this netdev into the buffer. Expects data to be 1762 * pre-allocated to the size returned by i40e_get_stats_count.. Note that all 1763 * statistics must be copied in a static order, and the count must not change 1764 * for a given netdev. See i40e_get_stats_count for more details. 1765 * 1766 * If a statistic is not currently valid (such as a disabled queue), this 1767 * function reports its value as zero. 1768 **/ 1769 static void i40e_get_ethtool_stats(struct net_device *netdev, 1770 struct ethtool_stats *stats, u64 *data) 1771 { 1772 struct i40e_netdev_priv *np = netdev_priv(netdev); 1773 struct i40e_vsi *vsi = np->vsi; 1774 struct i40e_pf *pf = vsi->back; 1775 struct i40e_veb *veb = pf->veb[pf->lan_veb]; 1776 unsigned int i; 1777 bool veb_stats; 1778 u64 *p = data; 1779 1780 i40e_update_stats(vsi); 1781 1782 i40e_add_ethtool_stats(&data, i40e_get_vsi_stats_struct(vsi), 1783 i40e_gstrings_net_stats); 1784 1785 i40e_add_ethtool_stats(&data, vsi, i40e_gstrings_misc_stats); 1786 1787 rcu_read_lock(); 1788 for (i = 0; i < netdev->num_tx_queues; i++) { 1789 i40e_add_queue_stats(&data, READ_ONCE(vsi->tx_rings[i])); 1790 i40e_add_queue_stats(&data, READ_ONCE(vsi->rx_rings[i])); 1791 } 1792 rcu_read_unlock(); 1793 1794 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) 1795 goto check_data_pointer; 1796 1797 veb_stats = ((pf->lan_veb != I40E_NO_VEB) && 1798 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)); 1799 1800 /* If veb stats aren't enabled, pass NULL instead of the veb so that 1801 * we initialize stats to zero and update the data pointer 1802 * intelligently 1803 */ 1804 i40e_add_ethtool_stats(&data, veb_stats ? veb : NULL, 1805 i40e_gstrings_veb_stats); 1806 1807 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 1808 i40e_add_ethtool_stats(&data, veb_stats ? veb : NULL, 1809 i40e_gstrings_veb_tc_stats); 1810 1811 i40e_add_ethtool_stats(&data, pf, i40e_gstrings_stats); 1812 1813 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 1814 struct i40e_pfc_stats pfc = i40e_get_pfc_stats(pf, i); 1815 1816 i40e_add_ethtool_stats(&data, &pfc, i40e_gstrings_pfc_stats); 1817 } 1818 1819 check_data_pointer: 1820 WARN_ONCE(data - p != i40e_get_stats_count(netdev), 1821 "ethtool stats count mismatch!"); 1822 } 1823 1824 /** 1825 * i40e_get_stat_strings - copy stat strings into supplied buffer 1826 * @netdev: the netdev to collect strings for 1827 * @data: supplied buffer to copy strings into 1828 * 1829 * Copy the strings related to stats for this netdev. Expects data to be 1830 * pre-allocated with the size reported by i40e_get_stats_count. Note that the 1831 * strings must be copied in a static order and the total count must not 1832 * change for a given netdev. See i40e_get_stats_count for more details. 1833 **/ 1834 static void i40e_get_stat_strings(struct net_device *netdev, u8 *data) 1835 { 1836 struct i40e_netdev_priv *np = netdev_priv(netdev); 1837 struct i40e_vsi *vsi = np->vsi; 1838 struct i40e_pf *pf = vsi->back; 1839 unsigned int i; 1840 u8 *p = data; 1841 1842 i40e_add_stat_strings(&data, i40e_gstrings_net_stats); 1843 1844 i40e_add_stat_strings(&data, i40e_gstrings_misc_stats); 1845 1846 for (i = 0; i < netdev->num_tx_queues; i++) { 1847 i40e_add_stat_strings(&data, i40e_gstrings_queue_stats, 1848 "tx", i); 1849 i40e_add_stat_strings(&data, i40e_gstrings_queue_stats, 1850 "rx", i); 1851 } 1852 1853 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) 1854 return; 1855 1856 i40e_add_stat_strings(&data, i40e_gstrings_veb_stats); 1857 1858 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 1859 i40e_add_stat_strings(&data, i40e_gstrings_veb_tc_stats, i); 1860 1861 i40e_add_stat_strings(&data, i40e_gstrings_stats); 1862 1863 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) 1864 i40e_add_stat_strings(&data, i40e_gstrings_pfc_stats, i); 1865 1866 WARN_ONCE(data - p != i40e_get_stats_count(netdev) * ETH_GSTRING_LEN, 1867 "stat strings count mismatch!"); 1868 } 1869 1870 static void i40e_get_priv_flag_strings(struct net_device *netdev, u8 *data) 1871 { 1872 struct i40e_netdev_priv *np = netdev_priv(netdev); 1873 struct i40e_vsi *vsi = np->vsi; 1874 struct i40e_pf *pf = vsi->back; 1875 char *p = (char *)data; 1876 unsigned int i; 1877 1878 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 1879 snprintf(p, ETH_GSTRING_LEN, "%s", 1880 i40e_gstrings_priv_flags[i].flag_string); 1881 p += ETH_GSTRING_LEN; 1882 } 1883 if (pf->hw.pf_id != 0) 1884 return; 1885 for (i = 0; i < I40E_GL_PRIV_FLAGS_STR_LEN; i++) { 1886 snprintf(p, ETH_GSTRING_LEN, "%s", 1887 i40e_gl_gstrings_priv_flags[i].flag_string); 1888 p += ETH_GSTRING_LEN; 1889 } 1890 } 1891 1892 static void i40e_get_strings(struct net_device *netdev, u32 stringset, 1893 u8 *data) 1894 { 1895 switch (stringset) { 1896 case ETH_SS_TEST: 1897 memcpy(data, i40e_gstrings_test, 1898 I40E_TEST_LEN * ETH_GSTRING_LEN); 1899 break; 1900 case ETH_SS_STATS: 1901 i40e_get_stat_strings(netdev, data); 1902 break; 1903 case ETH_SS_PRIV_FLAGS: 1904 i40e_get_priv_flag_strings(netdev, data); 1905 break; 1906 default: 1907 break; 1908 } 1909 } 1910 1911 static int i40e_get_ts_info(struct net_device *dev, 1912 struct ethtool_ts_info *info) 1913 { 1914 struct i40e_pf *pf = i40e_netdev_to_pf(dev); 1915 1916 /* only report HW timestamping if PTP is enabled */ 1917 if (!(pf->flags & I40E_FLAG_PTP)) 1918 return ethtool_op_get_ts_info(dev, info); 1919 1920 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 1921 SOF_TIMESTAMPING_RX_SOFTWARE | 1922 SOF_TIMESTAMPING_SOFTWARE | 1923 SOF_TIMESTAMPING_TX_HARDWARE | 1924 SOF_TIMESTAMPING_RX_HARDWARE | 1925 SOF_TIMESTAMPING_RAW_HARDWARE; 1926 1927 if (pf->ptp_clock) 1928 info->phc_index = ptp_clock_index(pf->ptp_clock); 1929 else 1930 info->phc_index = -1; 1931 1932 info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON); 1933 1934 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) | 1935 BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) | 1936 BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) | 1937 BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ); 1938 1939 if (pf->hw_features & I40E_HW_PTP_L4_CAPABLE) 1940 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | 1941 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | 1942 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) | 1943 BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) | 1944 BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) | 1945 BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) | 1946 BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) | 1947 BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ); 1948 1949 return 0; 1950 } 1951 1952 static int i40e_link_test(struct net_device *netdev, u64 *data) 1953 { 1954 struct i40e_netdev_priv *np = netdev_priv(netdev); 1955 struct i40e_pf *pf = np->vsi->back; 1956 i40e_status status; 1957 bool link_up = false; 1958 1959 netif_info(pf, hw, netdev, "link test\n"); 1960 status = i40e_get_link_status(&pf->hw, &link_up); 1961 if (status) { 1962 netif_err(pf, drv, netdev, "link query timed out, please retry test\n"); 1963 *data = 1; 1964 return *data; 1965 } 1966 1967 if (link_up) 1968 *data = 0; 1969 else 1970 *data = 1; 1971 1972 return *data; 1973 } 1974 1975 static int i40e_reg_test(struct net_device *netdev, u64 *data) 1976 { 1977 struct i40e_netdev_priv *np = netdev_priv(netdev); 1978 struct i40e_pf *pf = np->vsi->back; 1979 1980 netif_info(pf, hw, netdev, "register test\n"); 1981 *data = i40e_diag_reg_test(&pf->hw); 1982 1983 return *data; 1984 } 1985 1986 static int i40e_eeprom_test(struct net_device *netdev, u64 *data) 1987 { 1988 struct i40e_netdev_priv *np = netdev_priv(netdev); 1989 struct i40e_pf *pf = np->vsi->back; 1990 1991 netif_info(pf, hw, netdev, "eeprom test\n"); 1992 *data = i40e_diag_eeprom_test(&pf->hw); 1993 1994 /* forcebly clear the NVM Update state machine */ 1995 pf->hw.nvmupd_state = I40E_NVMUPD_STATE_INIT; 1996 1997 return *data; 1998 } 1999 2000 static int i40e_intr_test(struct net_device *netdev, u64 *data) 2001 { 2002 struct i40e_netdev_priv *np = netdev_priv(netdev); 2003 struct i40e_pf *pf = np->vsi->back; 2004 u16 swc_old = pf->sw_int_count; 2005 2006 netif_info(pf, hw, netdev, "interrupt test\n"); 2007 wr32(&pf->hw, I40E_PFINT_DYN_CTL0, 2008 (I40E_PFINT_DYN_CTL0_INTENA_MASK | 2009 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK | 2010 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK | 2011 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK | 2012 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK)); 2013 usleep_range(1000, 2000); 2014 *data = (swc_old == pf->sw_int_count); 2015 2016 return *data; 2017 } 2018 2019 static inline bool i40e_active_vfs(struct i40e_pf *pf) 2020 { 2021 struct i40e_vf *vfs = pf->vf; 2022 int i; 2023 2024 for (i = 0; i < pf->num_alloc_vfs; i++) 2025 if (test_bit(I40E_VF_STATE_ACTIVE, &vfs[i].vf_states)) 2026 return true; 2027 return false; 2028 } 2029 2030 static inline bool i40e_active_vmdqs(struct i40e_pf *pf) 2031 { 2032 return !!i40e_find_vsi_by_type(pf, I40E_VSI_VMDQ2); 2033 } 2034 2035 static void i40e_diag_test(struct net_device *netdev, 2036 struct ethtool_test *eth_test, u64 *data) 2037 { 2038 struct i40e_netdev_priv *np = netdev_priv(netdev); 2039 bool if_running = netif_running(netdev); 2040 struct i40e_pf *pf = np->vsi->back; 2041 2042 if (eth_test->flags == ETH_TEST_FL_OFFLINE) { 2043 /* Offline tests */ 2044 netif_info(pf, drv, netdev, "offline testing starting\n"); 2045 2046 set_bit(__I40E_TESTING, pf->state); 2047 2048 if (i40e_active_vfs(pf) || i40e_active_vmdqs(pf)) { 2049 dev_warn(&pf->pdev->dev, 2050 "Please take active VFs and Netqueues offline and restart the adapter before running NIC diagnostics\n"); 2051 data[I40E_ETH_TEST_REG] = 1; 2052 data[I40E_ETH_TEST_EEPROM] = 1; 2053 data[I40E_ETH_TEST_INTR] = 1; 2054 data[I40E_ETH_TEST_LINK] = 1; 2055 eth_test->flags |= ETH_TEST_FL_FAILED; 2056 clear_bit(__I40E_TESTING, pf->state); 2057 goto skip_ol_tests; 2058 } 2059 2060 /* If the device is online then take it offline */ 2061 if (if_running) 2062 /* indicate we're in test mode */ 2063 i40e_close(netdev); 2064 else 2065 /* This reset does not affect link - if it is 2066 * changed to a type of reset that does affect 2067 * link then the following link test would have 2068 * to be moved to before the reset 2069 */ 2070 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 2071 2072 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 2073 eth_test->flags |= ETH_TEST_FL_FAILED; 2074 2075 if (i40e_eeprom_test(netdev, &data[I40E_ETH_TEST_EEPROM])) 2076 eth_test->flags |= ETH_TEST_FL_FAILED; 2077 2078 if (i40e_intr_test(netdev, &data[I40E_ETH_TEST_INTR])) 2079 eth_test->flags |= ETH_TEST_FL_FAILED; 2080 2081 /* run reg test last, a reset is required after it */ 2082 if (i40e_reg_test(netdev, &data[I40E_ETH_TEST_REG])) 2083 eth_test->flags |= ETH_TEST_FL_FAILED; 2084 2085 clear_bit(__I40E_TESTING, pf->state); 2086 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 2087 2088 if (if_running) 2089 i40e_open(netdev); 2090 } else { 2091 /* Online tests */ 2092 netif_info(pf, drv, netdev, "online testing starting\n"); 2093 2094 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 2095 eth_test->flags |= ETH_TEST_FL_FAILED; 2096 2097 /* Offline only tests, not run in online; pass by default */ 2098 data[I40E_ETH_TEST_REG] = 0; 2099 data[I40E_ETH_TEST_EEPROM] = 0; 2100 data[I40E_ETH_TEST_INTR] = 0; 2101 } 2102 2103 skip_ol_tests: 2104 2105 netif_info(pf, drv, netdev, "testing finished\n"); 2106 } 2107 2108 static void i40e_get_wol(struct net_device *netdev, 2109 struct ethtool_wolinfo *wol) 2110 { 2111 struct i40e_netdev_priv *np = netdev_priv(netdev); 2112 struct i40e_pf *pf = np->vsi->back; 2113 struct i40e_hw *hw = &pf->hw; 2114 u16 wol_nvm_bits; 2115 2116 /* NVM bit on means WoL disabled for the port */ 2117 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 2118 if ((BIT(hw->port) & wol_nvm_bits) || (hw->partition_id != 1)) { 2119 wol->supported = 0; 2120 wol->wolopts = 0; 2121 } else { 2122 wol->supported = WAKE_MAGIC; 2123 wol->wolopts = (pf->wol_en ? WAKE_MAGIC : 0); 2124 } 2125 } 2126 2127 /** 2128 * i40e_set_wol - set the WakeOnLAN configuration 2129 * @netdev: the netdev in question 2130 * @wol: the ethtool WoL setting data 2131 **/ 2132 static int i40e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) 2133 { 2134 struct i40e_netdev_priv *np = netdev_priv(netdev); 2135 struct i40e_pf *pf = np->vsi->back; 2136 struct i40e_vsi *vsi = np->vsi; 2137 struct i40e_hw *hw = &pf->hw; 2138 u16 wol_nvm_bits; 2139 2140 /* WoL not supported if this isn't the controlling PF on the port */ 2141 if (hw->partition_id != 1) { 2142 i40e_partition_setting_complaint(pf); 2143 return -EOPNOTSUPP; 2144 } 2145 2146 if (vsi != pf->vsi[pf->lan_vsi]) 2147 return -EOPNOTSUPP; 2148 2149 /* NVM bit on means WoL disabled for the port */ 2150 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 2151 if (BIT(hw->port) & wol_nvm_bits) 2152 return -EOPNOTSUPP; 2153 2154 /* only magic packet is supported */ 2155 if (wol->wolopts && (wol->wolopts != WAKE_MAGIC)) 2156 return -EOPNOTSUPP; 2157 2158 /* is this a new value? */ 2159 if (pf->wol_en != !!wol->wolopts) { 2160 pf->wol_en = !!wol->wolopts; 2161 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en); 2162 } 2163 2164 return 0; 2165 } 2166 2167 static int i40e_set_phys_id(struct net_device *netdev, 2168 enum ethtool_phys_id_state state) 2169 { 2170 struct i40e_netdev_priv *np = netdev_priv(netdev); 2171 i40e_status ret = 0; 2172 struct i40e_pf *pf = np->vsi->back; 2173 struct i40e_hw *hw = &pf->hw; 2174 int blink_freq = 2; 2175 u16 temp_status; 2176 2177 switch (state) { 2178 case ETHTOOL_ID_ACTIVE: 2179 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) { 2180 pf->led_status = i40e_led_get(hw); 2181 } else { 2182 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) 2183 i40e_aq_set_phy_debug(hw, I40E_PHY_DEBUG_ALL, 2184 NULL); 2185 ret = i40e_led_get_phy(hw, &temp_status, 2186 &pf->phy_led_val); 2187 pf->led_status = temp_status; 2188 } 2189 return blink_freq; 2190 case ETHTOOL_ID_ON: 2191 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) 2192 i40e_led_set(hw, 0xf, false); 2193 else 2194 ret = i40e_led_set_phy(hw, true, pf->led_status, 0); 2195 break; 2196 case ETHTOOL_ID_OFF: 2197 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) 2198 i40e_led_set(hw, 0x0, false); 2199 else 2200 ret = i40e_led_set_phy(hw, false, pf->led_status, 0); 2201 break; 2202 case ETHTOOL_ID_INACTIVE: 2203 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) { 2204 i40e_led_set(hw, pf->led_status, false); 2205 } else { 2206 ret = i40e_led_set_phy(hw, false, pf->led_status, 2207 (pf->phy_led_val | 2208 I40E_PHY_LED_MODE_ORIG)); 2209 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) 2210 i40e_aq_set_phy_debug(hw, 0, NULL); 2211 } 2212 break; 2213 default: 2214 break; 2215 } 2216 if (ret) 2217 return -ENOENT; 2218 else 2219 return 0; 2220 } 2221 2222 /* NOTE: i40e hardware uses a conversion factor of 2 for Interrupt 2223 * Throttle Rate (ITR) ie. ITR(1) = 2us ITR(10) = 20 us, and also 2224 * 125us (8000 interrupts per second) == ITR(62) 2225 */ 2226 2227 /** 2228 * __i40e_get_coalesce - get per-queue coalesce settings 2229 * @netdev: the netdev to check 2230 * @ec: ethtool coalesce data structure 2231 * @queue: which queue to pick 2232 * 2233 * Gets the per-queue settings for coalescence. Specifically Rx and Tx usecs 2234 * are per queue. If queue is <0 then we default to queue 0 as the 2235 * representative value. 2236 **/ 2237 static int __i40e_get_coalesce(struct net_device *netdev, 2238 struct ethtool_coalesce *ec, 2239 int queue) 2240 { 2241 struct i40e_netdev_priv *np = netdev_priv(netdev); 2242 struct i40e_ring *rx_ring, *tx_ring; 2243 struct i40e_vsi *vsi = np->vsi; 2244 2245 ec->tx_max_coalesced_frames_irq = vsi->work_limit; 2246 ec->rx_max_coalesced_frames_irq = vsi->work_limit; 2247 2248 /* rx and tx usecs has per queue value. If user doesn't specify the 2249 * queue, return queue 0's value to represent. 2250 */ 2251 if (queue < 0) 2252 queue = 0; 2253 else if (queue >= vsi->num_queue_pairs) 2254 return -EINVAL; 2255 2256 rx_ring = vsi->rx_rings[queue]; 2257 tx_ring = vsi->tx_rings[queue]; 2258 2259 if (ITR_IS_DYNAMIC(rx_ring->itr_setting)) 2260 ec->use_adaptive_rx_coalesce = 1; 2261 2262 if (ITR_IS_DYNAMIC(tx_ring->itr_setting)) 2263 ec->use_adaptive_tx_coalesce = 1; 2264 2265 ec->rx_coalesce_usecs = rx_ring->itr_setting & ~I40E_ITR_DYNAMIC; 2266 ec->tx_coalesce_usecs = tx_ring->itr_setting & ~I40E_ITR_DYNAMIC; 2267 2268 /* we use the _usecs_high to store/set the interrupt rate limit 2269 * that the hardware supports, that almost but not quite 2270 * fits the original intent of the ethtool variable, 2271 * the rx_coalesce_usecs_high limits total interrupts 2272 * per second from both tx/rx sources. 2273 */ 2274 ec->rx_coalesce_usecs_high = vsi->int_rate_limit; 2275 ec->tx_coalesce_usecs_high = vsi->int_rate_limit; 2276 2277 return 0; 2278 } 2279 2280 /** 2281 * i40e_get_coalesce - get a netdev's coalesce settings 2282 * @netdev: the netdev to check 2283 * @ec: ethtool coalesce data structure 2284 * 2285 * Gets the coalesce settings for a particular netdev. Note that if user has 2286 * modified per-queue settings, this only guarantees to represent queue 0. See 2287 * __i40e_get_coalesce for more details. 2288 **/ 2289 static int i40e_get_coalesce(struct net_device *netdev, 2290 struct ethtool_coalesce *ec) 2291 { 2292 return __i40e_get_coalesce(netdev, ec, -1); 2293 } 2294 2295 /** 2296 * i40e_get_per_queue_coalesce - gets coalesce settings for particular queue 2297 * @netdev: netdev structure 2298 * @ec: ethtool's coalesce settings 2299 * @queue: the particular queue to read 2300 * 2301 * Will read a specific queue's coalesce settings 2302 **/ 2303 static int i40e_get_per_queue_coalesce(struct net_device *netdev, u32 queue, 2304 struct ethtool_coalesce *ec) 2305 { 2306 return __i40e_get_coalesce(netdev, ec, queue); 2307 } 2308 2309 /** 2310 * i40e_set_itr_per_queue - set ITR values for specific queue 2311 * @vsi: the VSI to set values for 2312 * @ec: coalesce settings from ethtool 2313 * @queue: the queue to modify 2314 * 2315 * Change the ITR settings for a specific queue. 2316 **/ 2317 static void i40e_set_itr_per_queue(struct i40e_vsi *vsi, 2318 struct ethtool_coalesce *ec, 2319 int queue) 2320 { 2321 struct i40e_ring *rx_ring = vsi->rx_rings[queue]; 2322 struct i40e_ring *tx_ring = vsi->tx_rings[queue]; 2323 struct i40e_pf *pf = vsi->back; 2324 struct i40e_hw *hw = &pf->hw; 2325 struct i40e_q_vector *q_vector; 2326 u16 intrl; 2327 2328 intrl = i40e_intrl_usec_to_reg(vsi->int_rate_limit); 2329 2330 rx_ring->itr_setting = ITR_REG_ALIGN(ec->rx_coalesce_usecs); 2331 tx_ring->itr_setting = ITR_REG_ALIGN(ec->tx_coalesce_usecs); 2332 2333 if (ec->use_adaptive_rx_coalesce) 2334 rx_ring->itr_setting |= I40E_ITR_DYNAMIC; 2335 else 2336 rx_ring->itr_setting &= ~I40E_ITR_DYNAMIC; 2337 2338 if (ec->use_adaptive_tx_coalesce) 2339 tx_ring->itr_setting |= I40E_ITR_DYNAMIC; 2340 else 2341 tx_ring->itr_setting &= ~I40E_ITR_DYNAMIC; 2342 2343 q_vector = rx_ring->q_vector; 2344 q_vector->rx.target_itr = ITR_TO_REG(rx_ring->itr_setting); 2345 2346 q_vector = tx_ring->q_vector; 2347 q_vector->tx.target_itr = ITR_TO_REG(tx_ring->itr_setting); 2348 2349 /* The interrupt handler itself will take care of programming 2350 * the Tx and Rx ITR values based on the values we have entered 2351 * into the q_vector, no need to write the values now. 2352 */ 2353 2354 wr32(hw, I40E_PFINT_RATEN(q_vector->reg_idx), intrl); 2355 i40e_flush(hw); 2356 } 2357 2358 /** 2359 * __i40e_set_coalesce - set coalesce settings for particular queue 2360 * @netdev: the netdev to change 2361 * @ec: ethtool coalesce settings 2362 * @queue: the queue to change 2363 * 2364 * Sets the coalesce settings for a particular queue. 2365 **/ 2366 static int __i40e_set_coalesce(struct net_device *netdev, 2367 struct ethtool_coalesce *ec, 2368 int queue) 2369 { 2370 struct i40e_netdev_priv *np = netdev_priv(netdev); 2371 u16 intrl_reg, cur_rx_itr, cur_tx_itr; 2372 struct i40e_vsi *vsi = np->vsi; 2373 struct i40e_pf *pf = vsi->back; 2374 int i; 2375 2376 if (ec->tx_max_coalesced_frames_irq || ec->rx_max_coalesced_frames_irq) 2377 vsi->work_limit = ec->tx_max_coalesced_frames_irq; 2378 2379 if (queue < 0) { 2380 cur_rx_itr = vsi->rx_rings[0]->itr_setting; 2381 cur_tx_itr = vsi->tx_rings[0]->itr_setting; 2382 } else if (queue < vsi->num_queue_pairs) { 2383 cur_rx_itr = vsi->rx_rings[queue]->itr_setting; 2384 cur_tx_itr = vsi->tx_rings[queue]->itr_setting; 2385 } else { 2386 netif_info(pf, drv, netdev, "Invalid queue value, queue range is 0 - %d\n", 2387 vsi->num_queue_pairs - 1); 2388 return -EINVAL; 2389 } 2390 2391 cur_tx_itr &= ~I40E_ITR_DYNAMIC; 2392 cur_rx_itr &= ~I40E_ITR_DYNAMIC; 2393 2394 /* tx_coalesce_usecs_high is ignored, use rx-usecs-high instead */ 2395 if (ec->tx_coalesce_usecs_high != vsi->int_rate_limit) { 2396 netif_info(pf, drv, netdev, "tx-usecs-high is not used, please program rx-usecs-high\n"); 2397 return -EINVAL; 2398 } 2399 2400 if (ec->rx_coalesce_usecs_high > INTRL_REG_TO_USEC(I40E_MAX_INTRL)) { 2401 netif_info(pf, drv, netdev, "Invalid value, rx-usecs-high range is 0-%lu\n", 2402 INTRL_REG_TO_USEC(I40E_MAX_INTRL)); 2403 return -EINVAL; 2404 } 2405 2406 if (ec->rx_coalesce_usecs != cur_rx_itr && 2407 ec->use_adaptive_rx_coalesce) { 2408 netif_info(pf, drv, netdev, "RX interrupt moderation cannot be changed if adaptive-rx is enabled.\n"); 2409 return -EINVAL; 2410 } 2411 2412 if (ec->rx_coalesce_usecs > I40E_MAX_ITR) { 2413 netif_info(pf, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n"); 2414 return -EINVAL; 2415 } 2416 2417 if (ec->tx_coalesce_usecs != cur_tx_itr && 2418 ec->use_adaptive_tx_coalesce) { 2419 netif_info(pf, drv, netdev, "TX interrupt moderation cannot be changed if adaptive-tx is enabled.\n"); 2420 return -EINVAL; 2421 } 2422 2423 if (ec->tx_coalesce_usecs > I40E_MAX_ITR) { 2424 netif_info(pf, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n"); 2425 return -EINVAL; 2426 } 2427 2428 if (ec->use_adaptive_rx_coalesce && !cur_rx_itr) 2429 ec->rx_coalesce_usecs = I40E_MIN_ITR; 2430 2431 if (ec->use_adaptive_tx_coalesce && !cur_tx_itr) 2432 ec->tx_coalesce_usecs = I40E_MIN_ITR; 2433 2434 intrl_reg = i40e_intrl_usec_to_reg(ec->rx_coalesce_usecs_high); 2435 vsi->int_rate_limit = INTRL_REG_TO_USEC(intrl_reg); 2436 if (vsi->int_rate_limit != ec->rx_coalesce_usecs_high) { 2437 netif_info(pf, drv, netdev, "Interrupt rate limit rounded down to %d\n", 2438 vsi->int_rate_limit); 2439 } 2440 2441 /* rx and tx usecs has per queue value. If user doesn't specify the 2442 * queue, apply to all queues. 2443 */ 2444 if (queue < 0) { 2445 for (i = 0; i < vsi->num_queue_pairs; i++) 2446 i40e_set_itr_per_queue(vsi, ec, i); 2447 } else { 2448 i40e_set_itr_per_queue(vsi, ec, queue); 2449 } 2450 2451 return 0; 2452 } 2453 2454 /** 2455 * i40e_set_coalesce - set coalesce settings for every queue on the netdev 2456 * @netdev: the netdev to change 2457 * @ec: ethtool coalesce settings 2458 * 2459 * This will set each queue to the same coalesce settings. 2460 **/ 2461 static int i40e_set_coalesce(struct net_device *netdev, 2462 struct ethtool_coalesce *ec) 2463 { 2464 return __i40e_set_coalesce(netdev, ec, -1); 2465 } 2466 2467 /** 2468 * i40e_set_per_queue_coalesce - set specific queue's coalesce settings 2469 * @netdev: the netdev to change 2470 * @ec: ethtool's coalesce settings 2471 * @queue: the queue to change 2472 * 2473 * Sets the specified queue's coalesce settings. 2474 **/ 2475 static int i40e_set_per_queue_coalesce(struct net_device *netdev, u32 queue, 2476 struct ethtool_coalesce *ec) 2477 { 2478 return __i40e_set_coalesce(netdev, ec, queue); 2479 } 2480 2481 /** 2482 * i40e_get_rss_hash_opts - Get RSS hash Input Set for each flow type 2483 * @pf: pointer to the physical function struct 2484 * @cmd: ethtool rxnfc command 2485 * 2486 * Returns Success if the flow is supported, else Invalid Input. 2487 **/ 2488 static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd) 2489 { 2490 struct i40e_hw *hw = &pf->hw; 2491 u8 flow_pctype = 0; 2492 u64 i_set = 0; 2493 2494 cmd->data = 0; 2495 2496 switch (cmd->flow_type) { 2497 case TCP_V4_FLOW: 2498 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2499 break; 2500 case UDP_V4_FLOW: 2501 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2502 break; 2503 case TCP_V6_FLOW: 2504 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 2505 break; 2506 case UDP_V6_FLOW: 2507 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 2508 break; 2509 case SCTP_V4_FLOW: 2510 case AH_ESP_V4_FLOW: 2511 case AH_V4_FLOW: 2512 case ESP_V4_FLOW: 2513 case IPV4_FLOW: 2514 case SCTP_V6_FLOW: 2515 case AH_ESP_V6_FLOW: 2516 case AH_V6_FLOW: 2517 case ESP_V6_FLOW: 2518 case IPV6_FLOW: 2519 /* Default is src/dest for IP, no matter the L4 hashing */ 2520 cmd->data |= RXH_IP_SRC | RXH_IP_DST; 2521 break; 2522 default: 2523 return -EINVAL; 2524 } 2525 2526 /* Read flow based hash input set register */ 2527 if (flow_pctype) { 2528 i_set = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, 2529 flow_pctype)) | 2530 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, 2531 flow_pctype)) << 32); 2532 } 2533 2534 /* Process bits of hash input set */ 2535 if (i_set) { 2536 if (i_set & I40E_L4_SRC_MASK) 2537 cmd->data |= RXH_L4_B_0_1; 2538 if (i_set & I40E_L4_DST_MASK) 2539 cmd->data |= RXH_L4_B_2_3; 2540 2541 if (cmd->flow_type == TCP_V4_FLOW || 2542 cmd->flow_type == UDP_V4_FLOW) { 2543 if (i_set & I40E_L3_SRC_MASK) 2544 cmd->data |= RXH_IP_SRC; 2545 if (i_set & I40E_L3_DST_MASK) 2546 cmd->data |= RXH_IP_DST; 2547 } else if (cmd->flow_type == TCP_V6_FLOW || 2548 cmd->flow_type == UDP_V6_FLOW) { 2549 if (i_set & I40E_L3_V6_SRC_MASK) 2550 cmd->data |= RXH_IP_SRC; 2551 if (i_set & I40E_L3_V6_DST_MASK) 2552 cmd->data |= RXH_IP_DST; 2553 } 2554 } 2555 2556 return 0; 2557 } 2558 2559 /** 2560 * i40e_check_mask - Check whether a mask field is set 2561 * @mask: the full mask value 2562 * @field: mask of the field to check 2563 * 2564 * If the given mask is fully set, return positive value. If the mask for the 2565 * field is fully unset, return zero. Otherwise return a negative error code. 2566 **/ 2567 static int i40e_check_mask(u64 mask, u64 field) 2568 { 2569 u64 value = mask & field; 2570 2571 if (value == field) 2572 return 1; 2573 else if (!value) 2574 return 0; 2575 else 2576 return -1; 2577 } 2578 2579 /** 2580 * i40e_parse_rx_flow_user_data - Deconstruct user-defined data 2581 * @fsp: pointer to rx flow specification 2582 * @data: pointer to userdef data structure for storage 2583 * 2584 * Read the user-defined data and deconstruct the value into a structure. No 2585 * other code should read the user-defined data, so as to ensure that every 2586 * place consistently reads the value correctly. 2587 * 2588 * The user-defined field is a 64bit Big Endian format value, which we 2589 * deconstruct by reading bits or bit fields from it. Single bit flags shall 2590 * be defined starting from the highest bits, while small bit field values 2591 * shall be defined starting from the lowest bits. 2592 * 2593 * Returns 0 if the data is valid, and non-zero if the userdef data is invalid 2594 * and the filter should be rejected. The data structure will always be 2595 * modified even if FLOW_EXT is not set. 2596 * 2597 **/ 2598 static int i40e_parse_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 2599 struct i40e_rx_flow_userdef *data) 2600 { 2601 u64 value, mask; 2602 int valid; 2603 2604 /* Zero memory first so it's always consistent. */ 2605 memset(data, 0, sizeof(*data)); 2606 2607 if (!(fsp->flow_type & FLOW_EXT)) 2608 return 0; 2609 2610 value = be64_to_cpu(*((__be64 *)fsp->h_ext.data)); 2611 mask = be64_to_cpu(*((__be64 *)fsp->m_ext.data)); 2612 2613 #define I40E_USERDEF_FLEX_WORD GENMASK_ULL(15, 0) 2614 #define I40E_USERDEF_FLEX_OFFSET GENMASK_ULL(31, 16) 2615 #define I40E_USERDEF_FLEX_FILTER GENMASK_ULL(31, 0) 2616 2617 valid = i40e_check_mask(mask, I40E_USERDEF_FLEX_FILTER); 2618 if (valid < 0) { 2619 return -EINVAL; 2620 } else if (valid) { 2621 data->flex_word = value & I40E_USERDEF_FLEX_WORD; 2622 data->flex_offset = 2623 (value & I40E_USERDEF_FLEX_OFFSET) >> 16; 2624 data->flex_filter = true; 2625 } 2626 2627 return 0; 2628 } 2629 2630 /** 2631 * i40e_fill_rx_flow_user_data - Fill in user-defined data field 2632 * @fsp: pointer to rx_flow specification 2633 * @data: pointer to return userdef data 2634 * 2635 * Reads the userdef data structure and properly fills in the user defined 2636 * fields of the rx_flow_spec. 2637 **/ 2638 static void i40e_fill_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 2639 struct i40e_rx_flow_userdef *data) 2640 { 2641 u64 value = 0, mask = 0; 2642 2643 if (data->flex_filter) { 2644 value |= data->flex_word; 2645 value |= (u64)data->flex_offset << 16; 2646 mask |= I40E_USERDEF_FLEX_FILTER; 2647 } 2648 2649 if (value || mask) 2650 fsp->flow_type |= FLOW_EXT; 2651 2652 *((__be64 *)fsp->h_ext.data) = cpu_to_be64(value); 2653 *((__be64 *)fsp->m_ext.data) = cpu_to_be64(mask); 2654 } 2655 2656 /** 2657 * i40e_get_ethtool_fdir_all - Populates the rule count of a command 2658 * @pf: Pointer to the physical function struct 2659 * @cmd: The command to get or set Rx flow classification rules 2660 * @rule_locs: Array of used rule locations 2661 * 2662 * This function populates both the total and actual rule count of 2663 * the ethtool flow classification command 2664 * 2665 * Returns 0 on success or -EMSGSIZE if entry not found 2666 **/ 2667 static int i40e_get_ethtool_fdir_all(struct i40e_pf *pf, 2668 struct ethtool_rxnfc *cmd, 2669 u32 *rule_locs) 2670 { 2671 struct i40e_fdir_filter *rule; 2672 struct hlist_node *node2; 2673 int cnt = 0; 2674 2675 /* report total rule count */ 2676 cmd->data = i40e_get_fd_cnt_all(pf); 2677 2678 hlist_for_each_entry_safe(rule, node2, 2679 &pf->fdir_filter_list, fdir_node) { 2680 if (cnt == cmd->rule_cnt) 2681 return -EMSGSIZE; 2682 2683 rule_locs[cnt] = rule->fd_id; 2684 cnt++; 2685 } 2686 2687 cmd->rule_cnt = cnt; 2688 2689 return 0; 2690 } 2691 2692 /** 2693 * i40e_get_ethtool_fdir_entry - Look up a filter based on Rx flow 2694 * @pf: Pointer to the physical function struct 2695 * @cmd: The command to get or set Rx flow classification rules 2696 * 2697 * This function looks up a filter based on the Rx flow classification 2698 * command and fills the flow spec info for it if found 2699 * 2700 * Returns 0 on success or -EINVAL if filter not found 2701 **/ 2702 static int i40e_get_ethtool_fdir_entry(struct i40e_pf *pf, 2703 struct ethtool_rxnfc *cmd) 2704 { 2705 struct ethtool_rx_flow_spec *fsp = 2706 (struct ethtool_rx_flow_spec *)&cmd->fs; 2707 struct i40e_rx_flow_userdef userdef = {0}; 2708 struct i40e_fdir_filter *rule = NULL; 2709 struct hlist_node *node2; 2710 u64 input_set; 2711 u16 index; 2712 2713 hlist_for_each_entry_safe(rule, node2, 2714 &pf->fdir_filter_list, fdir_node) { 2715 if (fsp->location <= rule->fd_id) 2716 break; 2717 } 2718 2719 if (!rule || fsp->location != rule->fd_id) 2720 return -EINVAL; 2721 2722 fsp->flow_type = rule->flow_type; 2723 if (fsp->flow_type == IP_USER_FLOW) { 2724 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4; 2725 fsp->h_u.usr_ip4_spec.proto = 0; 2726 fsp->m_u.usr_ip4_spec.proto = 0; 2727 } 2728 2729 /* Reverse the src and dest notion, since the HW views them from 2730 * Tx perspective where as the user expects it from Rx filter view. 2731 */ 2732 fsp->h_u.tcp_ip4_spec.psrc = rule->dst_port; 2733 fsp->h_u.tcp_ip4_spec.pdst = rule->src_port; 2734 fsp->h_u.tcp_ip4_spec.ip4src = rule->dst_ip; 2735 fsp->h_u.tcp_ip4_spec.ip4dst = rule->src_ip; 2736 2737 switch (rule->flow_type) { 2738 case SCTP_V4_FLOW: 2739 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 2740 break; 2741 case TCP_V4_FLOW: 2742 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2743 break; 2744 case UDP_V4_FLOW: 2745 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2746 break; 2747 case IP_USER_FLOW: 2748 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 2749 break; 2750 default: 2751 /* If we have stored a filter with a flow type not listed here 2752 * it is almost certainly a driver bug. WARN(), and then 2753 * assign the input_set as if all fields are enabled to avoid 2754 * reading unassigned memory. 2755 */ 2756 WARN(1, "Missing input set index for flow_type %d\n", 2757 rule->flow_type); 2758 input_set = 0xFFFFFFFFFFFFFFFFULL; 2759 goto no_input_set; 2760 } 2761 2762 input_set = i40e_read_fd_input_set(pf, index); 2763 2764 no_input_set: 2765 if (input_set & I40E_L3_SRC_MASK) 2766 fsp->m_u.tcp_ip4_spec.ip4src = htonl(0xFFFFFFFF); 2767 2768 if (input_set & I40E_L3_DST_MASK) 2769 fsp->m_u.tcp_ip4_spec.ip4dst = htonl(0xFFFFFFFF); 2770 2771 if (input_set & I40E_L4_SRC_MASK) 2772 fsp->m_u.tcp_ip4_spec.psrc = htons(0xFFFF); 2773 2774 if (input_set & I40E_L4_DST_MASK) 2775 fsp->m_u.tcp_ip4_spec.pdst = htons(0xFFFF); 2776 2777 if (rule->dest_ctl == I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET) 2778 fsp->ring_cookie = RX_CLS_FLOW_DISC; 2779 else 2780 fsp->ring_cookie = rule->q_index; 2781 2782 if (rule->dest_vsi != pf->vsi[pf->lan_vsi]->id) { 2783 struct i40e_vsi *vsi; 2784 2785 vsi = i40e_find_vsi_from_id(pf, rule->dest_vsi); 2786 if (vsi && vsi->type == I40E_VSI_SRIOV) { 2787 /* VFs are zero-indexed by the driver, but ethtool 2788 * expects them to be one-indexed, so add one here 2789 */ 2790 u64 ring_vf = vsi->vf_id + 1; 2791 2792 ring_vf <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF; 2793 fsp->ring_cookie |= ring_vf; 2794 } 2795 } 2796 2797 if (rule->flex_filter) { 2798 userdef.flex_filter = true; 2799 userdef.flex_word = be16_to_cpu(rule->flex_word); 2800 userdef.flex_offset = rule->flex_offset; 2801 } 2802 2803 i40e_fill_rx_flow_user_data(fsp, &userdef); 2804 2805 return 0; 2806 } 2807 2808 /** 2809 * i40e_get_rxnfc - command to get RX flow classification rules 2810 * @netdev: network interface device structure 2811 * @cmd: ethtool rxnfc command 2812 * @rule_locs: pointer to store rule data 2813 * 2814 * Returns Success if the command is supported. 2815 **/ 2816 static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd, 2817 u32 *rule_locs) 2818 { 2819 struct i40e_netdev_priv *np = netdev_priv(netdev); 2820 struct i40e_vsi *vsi = np->vsi; 2821 struct i40e_pf *pf = vsi->back; 2822 int ret = -EOPNOTSUPP; 2823 2824 switch (cmd->cmd) { 2825 case ETHTOOL_GRXRINGS: 2826 cmd->data = vsi->rss_size; 2827 ret = 0; 2828 break; 2829 case ETHTOOL_GRXFH: 2830 ret = i40e_get_rss_hash_opts(pf, cmd); 2831 break; 2832 case ETHTOOL_GRXCLSRLCNT: 2833 cmd->rule_cnt = pf->fdir_pf_active_filters; 2834 /* report total rule count */ 2835 cmd->data = i40e_get_fd_cnt_all(pf); 2836 ret = 0; 2837 break; 2838 case ETHTOOL_GRXCLSRULE: 2839 ret = i40e_get_ethtool_fdir_entry(pf, cmd); 2840 break; 2841 case ETHTOOL_GRXCLSRLALL: 2842 ret = i40e_get_ethtool_fdir_all(pf, cmd, rule_locs); 2843 break; 2844 default: 2845 break; 2846 } 2847 2848 return ret; 2849 } 2850 2851 /** 2852 * i40e_get_rss_hash_bits - Read RSS Hash bits from register 2853 * @nfc: pointer to user request 2854 * @i_setc: bits currently set 2855 * 2856 * Returns value of bits to be set per user request 2857 **/ 2858 static u64 i40e_get_rss_hash_bits(struct ethtool_rxnfc *nfc, u64 i_setc) 2859 { 2860 u64 i_set = i_setc; 2861 u64 src_l3 = 0, dst_l3 = 0; 2862 2863 if (nfc->data & RXH_L4_B_0_1) 2864 i_set |= I40E_L4_SRC_MASK; 2865 else 2866 i_set &= ~I40E_L4_SRC_MASK; 2867 if (nfc->data & RXH_L4_B_2_3) 2868 i_set |= I40E_L4_DST_MASK; 2869 else 2870 i_set &= ~I40E_L4_DST_MASK; 2871 2872 if (nfc->flow_type == TCP_V6_FLOW || nfc->flow_type == UDP_V6_FLOW) { 2873 src_l3 = I40E_L3_V6_SRC_MASK; 2874 dst_l3 = I40E_L3_V6_DST_MASK; 2875 } else if (nfc->flow_type == TCP_V4_FLOW || 2876 nfc->flow_type == UDP_V4_FLOW) { 2877 src_l3 = I40E_L3_SRC_MASK; 2878 dst_l3 = I40E_L3_DST_MASK; 2879 } else { 2880 /* Any other flow type are not supported here */ 2881 return i_set; 2882 } 2883 2884 if (nfc->data & RXH_IP_SRC) 2885 i_set |= src_l3; 2886 else 2887 i_set &= ~src_l3; 2888 if (nfc->data & RXH_IP_DST) 2889 i_set |= dst_l3; 2890 else 2891 i_set &= ~dst_l3; 2892 2893 return i_set; 2894 } 2895 2896 /** 2897 * i40e_set_rss_hash_opt - Enable/Disable flow types for RSS hash 2898 * @pf: pointer to the physical function struct 2899 * @nfc: ethtool rxnfc command 2900 * 2901 * Returns Success if the flow input set is supported. 2902 **/ 2903 static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc) 2904 { 2905 struct i40e_hw *hw = &pf->hw; 2906 u64 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) | 2907 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32); 2908 u8 flow_pctype = 0; 2909 u64 i_set, i_setc; 2910 2911 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 2912 dev_err(&pf->pdev->dev, 2913 "Change of RSS hash input set is not supported when MFP mode is enabled\n"); 2914 return -EOPNOTSUPP; 2915 } 2916 2917 /* RSS does not support anything other than hashing 2918 * to queues on src and dst IPs and ports 2919 */ 2920 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST | 2921 RXH_L4_B_0_1 | RXH_L4_B_2_3)) 2922 return -EINVAL; 2923 2924 switch (nfc->flow_type) { 2925 case TCP_V4_FLOW: 2926 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2927 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2928 hena |= 2929 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); 2930 break; 2931 case TCP_V6_FLOW: 2932 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 2933 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2934 hena |= 2935 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); 2936 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2937 hena |= 2938 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK); 2939 break; 2940 case UDP_V4_FLOW: 2941 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2942 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2943 hena |= 2944 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | 2945 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP); 2946 2947 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 2948 break; 2949 case UDP_V6_FLOW: 2950 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 2951 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2952 hena |= 2953 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | 2954 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP); 2955 2956 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 2957 break; 2958 case AH_ESP_V4_FLOW: 2959 case AH_V4_FLOW: 2960 case ESP_V4_FLOW: 2961 case SCTP_V4_FLOW: 2962 if ((nfc->data & RXH_L4_B_0_1) || 2963 (nfc->data & RXH_L4_B_2_3)) 2964 return -EINVAL; 2965 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER); 2966 break; 2967 case AH_ESP_V6_FLOW: 2968 case AH_V6_FLOW: 2969 case ESP_V6_FLOW: 2970 case SCTP_V6_FLOW: 2971 if ((nfc->data & RXH_L4_B_0_1) || 2972 (nfc->data & RXH_L4_B_2_3)) 2973 return -EINVAL; 2974 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER); 2975 break; 2976 case IPV4_FLOW: 2977 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | 2978 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 2979 break; 2980 case IPV6_FLOW: 2981 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | 2982 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 2983 break; 2984 default: 2985 return -EINVAL; 2986 } 2987 2988 if (flow_pctype) { 2989 i_setc = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, 2990 flow_pctype)) | 2991 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, 2992 flow_pctype)) << 32); 2993 i_set = i40e_get_rss_hash_bits(nfc, i_setc); 2994 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_pctype), 2995 (u32)i_set); 2996 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_pctype), 2997 (u32)(i_set >> 32)); 2998 hena |= BIT_ULL(flow_pctype); 2999 } 3000 3001 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena); 3002 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32)); 3003 i40e_flush(hw); 3004 3005 return 0; 3006 } 3007 3008 /** 3009 * i40e_update_ethtool_fdir_entry - Updates the fdir filter entry 3010 * @vsi: Pointer to the targeted VSI 3011 * @input: The filter to update or NULL to indicate deletion 3012 * @sw_idx: Software index to the filter 3013 * @cmd: The command to get or set Rx flow classification rules 3014 * 3015 * This function updates (or deletes) a Flow Director entry from 3016 * the hlist of the corresponding PF 3017 * 3018 * Returns 0 on success 3019 **/ 3020 static int i40e_update_ethtool_fdir_entry(struct i40e_vsi *vsi, 3021 struct i40e_fdir_filter *input, 3022 u16 sw_idx, 3023 struct ethtool_rxnfc *cmd) 3024 { 3025 struct i40e_fdir_filter *rule, *parent; 3026 struct i40e_pf *pf = vsi->back; 3027 struct hlist_node *node2; 3028 int err = -EINVAL; 3029 3030 parent = NULL; 3031 rule = NULL; 3032 3033 hlist_for_each_entry_safe(rule, node2, 3034 &pf->fdir_filter_list, fdir_node) { 3035 /* hash found, or no matching entry */ 3036 if (rule->fd_id >= sw_idx) 3037 break; 3038 parent = rule; 3039 } 3040 3041 /* if there is an old rule occupying our place remove it */ 3042 if (rule && (rule->fd_id == sw_idx)) { 3043 /* Remove this rule, since we're either deleting it, or 3044 * replacing it. 3045 */ 3046 err = i40e_add_del_fdir(vsi, rule, false); 3047 hlist_del(&rule->fdir_node); 3048 kfree(rule); 3049 pf->fdir_pf_active_filters--; 3050 } 3051 3052 /* If we weren't given an input, this is a delete, so just return the 3053 * error code indicating if there was an entry at the requested slot 3054 */ 3055 if (!input) 3056 return err; 3057 3058 /* Otherwise, install the new rule as requested */ 3059 INIT_HLIST_NODE(&input->fdir_node); 3060 3061 /* add filter to the list */ 3062 if (parent) 3063 hlist_add_behind(&input->fdir_node, &parent->fdir_node); 3064 else 3065 hlist_add_head(&input->fdir_node, 3066 &pf->fdir_filter_list); 3067 3068 /* update counts */ 3069 pf->fdir_pf_active_filters++; 3070 3071 return 0; 3072 } 3073 3074 /** 3075 * i40e_prune_flex_pit_list - Cleanup unused entries in FLX_PIT table 3076 * @pf: pointer to PF structure 3077 * 3078 * This function searches the list of filters and determines which FLX_PIT 3079 * entries are still required. It will prune any entries which are no longer 3080 * in use after the deletion. 3081 **/ 3082 static void i40e_prune_flex_pit_list(struct i40e_pf *pf) 3083 { 3084 struct i40e_flex_pit *entry, *tmp; 3085 struct i40e_fdir_filter *rule; 3086 3087 /* First, we'll check the l3 table */ 3088 list_for_each_entry_safe(entry, tmp, &pf->l3_flex_pit_list, list) { 3089 bool found = false; 3090 3091 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 3092 if (rule->flow_type != IP_USER_FLOW) 3093 continue; 3094 if (rule->flex_filter && 3095 rule->flex_offset == entry->src_offset) { 3096 found = true; 3097 break; 3098 } 3099 } 3100 3101 /* If we didn't find the filter, then we can prune this entry 3102 * from the list. 3103 */ 3104 if (!found) { 3105 list_del(&entry->list); 3106 kfree(entry); 3107 } 3108 } 3109 3110 /* Followed by the L4 table */ 3111 list_for_each_entry_safe(entry, tmp, &pf->l4_flex_pit_list, list) { 3112 bool found = false; 3113 3114 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 3115 /* Skip this filter if it's L3, since we already 3116 * checked those in the above loop 3117 */ 3118 if (rule->flow_type == IP_USER_FLOW) 3119 continue; 3120 if (rule->flex_filter && 3121 rule->flex_offset == entry->src_offset) { 3122 found = true; 3123 break; 3124 } 3125 } 3126 3127 /* If we didn't find the filter, then we can prune this entry 3128 * from the list. 3129 */ 3130 if (!found) { 3131 list_del(&entry->list); 3132 kfree(entry); 3133 } 3134 } 3135 } 3136 3137 /** 3138 * i40e_del_fdir_entry - Deletes a Flow Director filter entry 3139 * @vsi: Pointer to the targeted VSI 3140 * @cmd: The command to get or set Rx flow classification rules 3141 * 3142 * The function removes a Flow Director filter entry from the 3143 * hlist of the corresponding PF 3144 * 3145 * Returns 0 on success 3146 */ 3147 static int i40e_del_fdir_entry(struct i40e_vsi *vsi, 3148 struct ethtool_rxnfc *cmd) 3149 { 3150 struct ethtool_rx_flow_spec *fsp = 3151 (struct ethtool_rx_flow_spec *)&cmd->fs; 3152 struct i40e_pf *pf = vsi->back; 3153 int ret = 0; 3154 3155 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 3156 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 3157 return -EBUSY; 3158 3159 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 3160 return -EBUSY; 3161 3162 ret = i40e_update_ethtool_fdir_entry(vsi, NULL, fsp->location, cmd); 3163 3164 i40e_prune_flex_pit_list(pf); 3165 3166 i40e_fdir_check_and_reenable(pf); 3167 return ret; 3168 } 3169 3170 /** 3171 * i40e_unused_pit_index - Find an unused PIT index for given list 3172 * @pf: the PF data structure 3173 * 3174 * Find the first unused flexible PIT index entry. We search both the L3 and 3175 * L4 flexible PIT lists so that the returned index is unique and unused by 3176 * either currently programmed L3 or L4 filters. We use a bit field as storage 3177 * to track which indexes are already used. 3178 **/ 3179 static u8 i40e_unused_pit_index(struct i40e_pf *pf) 3180 { 3181 unsigned long available_index = 0xFF; 3182 struct i40e_flex_pit *entry; 3183 3184 /* We need to make sure that the new index isn't in use by either L3 3185 * or L4 filters so that IP_USER_FLOW filters can program both L3 and 3186 * L4 to use the same index. 3187 */ 3188 3189 list_for_each_entry(entry, &pf->l4_flex_pit_list, list) 3190 clear_bit(entry->pit_index, &available_index); 3191 3192 list_for_each_entry(entry, &pf->l3_flex_pit_list, list) 3193 clear_bit(entry->pit_index, &available_index); 3194 3195 return find_first_bit(&available_index, 8); 3196 } 3197 3198 /** 3199 * i40e_find_flex_offset - Find an existing flex src_offset 3200 * @flex_pit_list: L3 or L4 flex PIT list 3201 * @src_offset: new src_offset to find 3202 * 3203 * Searches the flex_pit_list for an existing offset. If no offset is 3204 * currently programmed, then this will return an ERR_PTR if there is no space 3205 * to add a new offset, otherwise it returns NULL. 3206 **/ 3207 static 3208 struct i40e_flex_pit *i40e_find_flex_offset(struct list_head *flex_pit_list, 3209 u16 src_offset) 3210 { 3211 struct i40e_flex_pit *entry; 3212 int size = 0; 3213 3214 /* Search for the src_offset first. If we find a matching entry 3215 * already programmed, we can simply re-use it. 3216 */ 3217 list_for_each_entry(entry, flex_pit_list, list) { 3218 size++; 3219 if (entry->src_offset == src_offset) 3220 return entry; 3221 } 3222 3223 /* If we haven't found an entry yet, then the provided src offset has 3224 * not yet been programmed. We will program the src offset later on, 3225 * but we need to indicate whether there is enough space to do so 3226 * here. We'll make use of ERR_PTR for this purpose. 3227 */ 3228 if (size >= I40E_FLEX_PIT_TABLE_SIZE) 3229 return ERR_PTR(-ENOSPC); 3230 3231 return NULL; 3232 } 3233 3234 /** 3235 * i40e_add_flex_offset - Add src_offset to flex PIT table list 3236 * @flex_pit_list: L3 or L4 flex PIT list 3237 * @src_offset: new src_offset to add 3238 * @pit_index: the PIT index to program 3239 * 3240 * This function programs the new src_offset to the list. It is expected that 3241 * i40e_find_flex_offset has already been tried and returned NULL, indicating 3242 * that this offset is not programmed, and that the list has enough space to 3243 * store another offset. 3244 * 3245 * Returns 0 on success, and negative value on error. 3246 **/ 3247 static int i40e_add_flex_offset(struct list_head *flex_pit_list, 3248 u16 src_offset, 3249 u8 pit_index) 3250 { 3251 struct i40e_flex_pit *new_pit, *entry; 3252 3253 new_pit = kzalloc(sizeof(*entry), GFP_KERNEL); 3254 if (!new_pit) 3255 return -ENOMEM; 3256 3257 new_pit->src_offset = src_offset; 3258 new_pit->pit_index = pit_index; 3259 3260 /* We need to insert this item such that the list is sorted by 3261 * src_offset in ascending order. 3262 */ 3263 list_for_each_entry(entry, flex_pit_list, list) { 3264 if (new_pit->src_offset < entry->src_offset) { 3265 list_add_tail(&new_pit->list, &entry->list); 3266 return 0; 3267 } 3268 3269 /* If we found an entry with our offset already programmed we 3270 * can simply return here, after freeing the memory. However, 3271 * if the pit_index does not match we need to report an error. 3272 */ 3273 if (new_pit->src_offset == entry->src_offset) { 3274 int err = 0; 3275 3276 /* If the PIT index is not the same we can't re-use 3277 * the entry, so we must report an error. 3278 */ 3279 if (new_pit->pit_index != entry->pit_index) 3280 err = -EINVAL; 3281 3282 kfree(new_pit); 3283 return err; 3284 } 3285 } 3286 3287 /* If we reached here, then we haven't yet added the item. This means 3288 * that we should add the item at the end of the list. 3289 */ 3290 list_add_tail(&new_pit->list, flex_pit_list); 3291 return 0; 3292 } 3293 3294 /** 3295 * __i40e_reprogram_flex_pit - Re-program specific FLX_PIT table 3296 * @pf: Pointer to the PF structure 3297 * @flex_pit_list: list of flexible src offsets in use 3298 * @flex_pit_start: index to first entry for this section of the table 3299 * 3300 * In order to handle flexible data, the hardware uses a table of values 3301 * called the FLX_PIT table. This table is used to indicate which sections of 3302 * the input correspond to what PIT index values. Unfortunately, hardware is 3303 * very restrictive about programming this table. Entries must be ordered by 3304 * src_offset in ascending order, without duplicates. Additionally, unused 3305 * entries must be set to the unused index value, and must have valid size and 3306 * length according to the src_offset ordering. 3307 * 3308 * This function will reprogram the FLX_PIT register from a book-keeping 3309 * structure that we guarantee is already ordered correctly, and has no more 3310 * than 3 entries. 3311 * 3312 * To make things easier, we only support flexible values of one word length, 3313 * rather than allowing variable length flexible values. 3314 **/ 3315 static void __i40e_reprogram_flex_pit(struct i40e_pf *pf, 3316 struct list_head *flex_pit_list, 3317 int flex_pit_start) 3318 { 3319 struct i40e_flex_pit *entry = NULL; 3320 u16 last_offset = 0; 3321 int i = 0, j = 0; 3322 3323 /* First, loop over the list of flex PIT entries, and reprogram the 3324 * registers. 3325 */ 3326 list_for_each_entry(entry, flex_pit_list, list) { 3327 /* We have to be careful when programming values for the 3328 * largest SRC_OFFSET value. It is possible that adding 3329 * additional empty values at the end would overflow the space 3330 * for the SRC_OFFSET in the FLX_PIT register. To avoid this, 3331 * we check here and add the empty values prior to adding the 3332 * largest value. 3333 * 3334 * To determine this, we will use a loop from i+1 to 3, which 3335 * will determine whether the unused entries would have valid 3336 * SRC_OFFSET. Note that there cannot be extra entries past 3337 * this value, because the only valid values would have been 3338 * larger than I40E_MAX_FLEX_SRC_OFFSET, and thus would not 3339 * have been added to the list in the first place. 3340 */ 3341 for (j = i + 1; j < 3; j++) { 3342 u16 offset = entry->src_offset + j; 3343 int index = flex_pit_start + i; 3344 u32 value = I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 3345 1, 3346 offset - 3); 3347 3348 if (offset > I40E_MAX_FLEX_SRC_OFFSET) { 3349 i40e_write_rx_ctl(&pf->hw, 3350 I40E_PRTQF_FLX_PIT(index), 3351 value); 3352 i++; 3353 } 3354 } 3355 3356 /* Now, we can program the actual value into the table */ 3357 i40e_write_rx_ctl(&pf->hw, 3358 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 3359 I40E_FLEX_PREP_VAL(entry->pit_index + 50, 3360 1, 3361 entry->src_offset)); 3362 i++; 3363 } 3364 3365 /* In order to program the last entries in the table, we need to 3366 * determine the valid offset. If the list is empty, we'll just start 3367 * with 0. Otherwise, we'll start with the last item offset and add 1. 3368 * This ensures that all entries have valid sizes. If we don't do this 3369 * correctly, the hardware will disable flexible field parsing. 3370 */ 3371 if (!list_empty(flex_pit_list)) 3372 last_offset = list_prev_entry(entry, list)->src_offset + 1; 3373 3374 for (; i < 3; i++, last_offset++) { 3375 i40e_write_rx_ctl(&pf->hw, 3376 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 3377 I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 3378 1, 3379 last_offset)); 3380 } 3381 } 3382 3383 /** 3384 * i40e_reprogram_flex_pit - Reprogram all FLX_PIT tables after input set change 3385 * @pf: pointer to the PF structure 3386 * 3387 * This function reprograms both the L3 and L4 FLX_PIT tables. See the 3388 * internal helper function for implementation details. 3389 **/ 3390 static void i40e_reprogram_flex_pit(struct i40e_pf *pf) 3391 { 3392 __i40e_reprogram_flex_pit(pf, &pf->l3_flex_pit_list, 3393 I40E_FLEX_PIT_IDX_START_L3); 3394 3395 __i40e_reprogram_flex_pit(pf, &pf->l4_flex_pit_list, 3396 I40E_FLEX_PIT_IDX_START_L4); 3397 3398 /* We also need to program the L3 and L4 GLQF ORT register */ 3399 i40e_write_rx_ctl(&pf->hw, 3400 I40E_GLQF_ORT(I40E_L3_GLQF_ORT_IDX), 3401 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L3, 3402 3, 1)); 3403 3404 i40e_write_rx_ctl(&pf->hw, 3405 I40E_GLQF_ORT(I40E_L4_GLQF_ORT_IDX), 3406 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L4, 3407 3, 1)); 3408 } 3409 3410 /** 3411 * i40e_flow_str - Converts a flow_type into a human readable string 3412 * @fsp: the flow specification 3413 * 3414 * Currently only flow types we support are included here, and the string 3415 * value attempts to match what ethtool would use to configure this flow type. 3416 **/ 3417 static const char *i40e_flow_str(struct ethtool_rx_flow_spec *fsp) 3418 { 3419 switch (fsp->flow_type & ~FLOW_EXT) { 3420 case TCP_V4_FLOW: 3421 return "tcp4"; 3422 case UDP_V4_FLOW: 3423 return "udp4"; 3424 case SCTP_V4_FLOW: 3425 return "sctp4"; 3426 case IP_USER_FLOW: 3427 return "ip4"; 3428 default: 3429 return "unknown"; 3430 } 3431 } 3432 3433 /** 3434 * i40e_pit_index_to_mask - Return the FLEX mask for a given PIT index 3435 * @pit_index: PIT index to convert 3436 * 3437 * Returns the mask for a given PIT index. Will return 0 if the pit_index is 3438 * of range. 3439 **/ 3440 static u64 i40e_pit_index_to_mask(int pit_index) 3441 { 3442 switch (pit_index) { 3443 case 0: 3444 return I40E_FLEX_50_MASK; 3445 case 1: 3446 return I40E_FLEX_51_MASK; 3447 case 2: 3448 return I40E_FLEX_52_MASK; 3449 case 3: 3450 return I40E_FLEX_53_MASK; 3451 case 4: 3452 return I40E_FLEX_54_MASK; 3453 case 5: 3454 return I40E_FLEX_55_MASK; 3455 case 6: 3456 return I40E_FLEX_56_MASK; 3457 case 7: 3458 return I40E_FLEX_57_MASK; 3459 default: 3460 return 0; 3461 } 3462 } 3463 3464 /** 3465 * i40e_print_input_set - Show changes between two input sets 3466 * @vsi: the vsi being configured 3467 * @old: the old input set 3468 * @new: the new input set 3469 * 3470 * Print the difference between old and new input sets by showing which series 3471 * of words are toggled on or off. Only displays the bits we actually support 3472 * changing. 3473 **/ 3474 static void i40e_print_input_set(struct i40e_vsi *vsi, u64 old, u64 new) 3475 { 3476 struct i40e_pf *pf = vsi->back; 3477 bool old_value, new_value; 3478 int i; 3479 3480 old_value = !!(old & I40E_L3_SRC_MASK); 3481 new_value = !!(new & I40E_L3_SRC_MASK); 3482 if (old_value != new_value) 3483 netif_info(pf, drv, vsi->netdev, "L3 source address: %s -> %s\n", 3484 old_value ? "ON" : "OFF", 3485 new_value ? "ON" : "OFF"); 3486 3487 old_value = !!(old & I40E_L3_DST_MASK); 3488 new_value = !!(new & I40E_L3_DST_MASK); 3489 if (old_value != new_value) 3490 netif_info(pf, drv, vsi->netdev, "L3 destination address: %s -> %s\n", 3491 old_value ? "ON" : "OFF", 3492 new_value ? "ON" : "OFF"); 3493 3494 old_value = !!(old & I40E_L4_SRC_MASK); 3495 new_value = !!(new & I40E_L4_SRC_MASK); 3496 if (old_value != new_value) 3497 netif_info(pf, drv, vsi->netdev, "L4 source port: %s -> %s\n", 3498 old_value ? "ON" : "OFF", 3499 new_value ? "ON" : "OFF"); 3500 3501 old_value = !!(old & I40E_L4_DST_MASK); 3502 new_value = !!(new & I40E_L4_DST_MASK); 3503 if (old_value != new_value) 3504 netif_info(pf, drv, vsi->netdev, "L4 destination port: %s -> %s\n", 3505 old_value ? "ON" : "OFF", 3506 new_value ? "ON" : "OFF"); 3507 3508 old_value = !!(old & I40E_VERIFY_TAG_MASK); 3509 new_value = !!(new & I40E_VERIFY_TAG_MASK); 3510 if (old_value != new_value) 3511 netif_info(pf, drv, vsi->netdev, "SCTP verification tag: %s -> %s\n", 3512 old_value ? "ON" : "OFF", 3513 new_value ? "ON" : "OFF"); 3514 3515 /* Show change of flexible filter entries */ 3516 for (i = 0; i < I40E_FLEX_INDEX_ENTRIES; i++) { 3517 u64 flex_mask = i40e_pit_index_to_mask(i); 3518 3519 old_value = !!(old & flex_mask); 3520 new_value = !!(new & flex_mask); 3521 if (old_value != new_value) 3522 netif_info(pf, drv, vsi->netdev, "FLEX index %d: %s -> %s\n", 3523 i, 3524 old_value ? "ON" : "OFF", 3525 new_value ? "ON" : "OFF"); 3526 } 3527 3528 netif_info(pf, drv, vsi->netdev, " Current input set: %0llx\n", 3529 old); 3530 netif_info(pf, drv, vsi->netdev, "Requested input set: %0llx\n", 3531 new); 3532 } 3533 3534 /** 3535 * i40e_check_fdir_input_set - Check that a given rx_flow_spec mask is valid 3536 * @vsi: pointer to the targeted VSI 3537 * @fsp: pointer to Rx flow specification 3538 * @userdef: userdefined data from flow specification 3539 * 3540 * Ensures that a given ethtool_rx_flow_spec has a valid mask. Some support 3541 * for partial matches exists with a few limitations. First, hardware only 3542 * supports masking by word boundary (2 bytes) and not per individual bit. 3543 * Second, hardware is limited to using one mask for a flow type and cannot 3544 * use a separate mask for each filter. 3545 * 3546 * To support these limitations, if we already have a configured filter for 3547 * the specified type, this function enforces that new filters of the type 3548 * match the configured input set. Otherwise, if we do not have a filter of 3549 * the specified type, we allow the input set to be updated to match the 3550 * desired filter. 3551 * 3552 * To help ensure that administrators understand why filters weren't displayed 3553 * as supported, we print a diagnostic message displaying how the input set 3554 * would change and warning to delete the preexisting filters if required. 3555 * 3556 * Returns 0 on successful input set match, and a negative return code on 3557 * failure. 3558 **/ 3559 static int i40e_check_fdir_input_set(struct i40e_vsi *vsi, 3560 struct ethtool_rx_flow_spec *fsp, 3561 struct i40e_rx_flow_userdef *userdef) 3562 { 3563 struct i40e_pf *pf = vsi->back; 3564 struct ethtool_tcpip4_spec *tcp_ip4_spec; 3565 struct ethtool_usrip4_spec *usr_ip4_spec; 3566 u64 current_mask, new_mask; 3567 bool new_flex_offset = false; 3568 bool flex_l3 = false; 3569 u16 *fdir_filter_count; 3570 u16 index, src_offset = 0; 3571 u8 pit_index = 0; 3572 int err; 3573 3574 switch (fsp->flow_type & ~FLOW_EXT) { 3575 case SCTP_V4_FLOW: 3576 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 3577 fdir_filter_count = &pf->fd_sctp4_filter_cnt; 3578 break; 3579 case TCP_V4_FLOW: 3580 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 3581 fdir_filter_count = &pf->fd_tcp4_filter_cnt; 3582 break; 3583 case UDP_V4_FLOW: 3584 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 3585 fdir_filter_count = &pf->fd_udp4_filter_cnt; 3586 break; 3587 case IP_USER_FLOW: 3588 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 3589 fdir_filter_count = &pf->fd_ip4_filter_cnt; 3590 flex_l3 = true; 3591 break; 3592 default: 3593 return -EOPNOTSUPP; 3594 } 3595 3596 /* Read the current input set from register memory. */ 3597 current_mask = i40e_read_fd_input_set(pf, index); 3598 new_mask = current_mask; 3599 3600 /* Determine, if any, the required changes to the input set in order 3601 * to support the provided mask. 3602 * 3603 * Hardware only supports masking at word (2 byte) granularity and does 3604 * not support full bitwise masking. This implementation simplifies 3605 * even further and only supports fully enabled or fully disabled 3606 * masks for each field, even though we could split the ip4src and 3607 * ip4dst fields. 3608 */ 3609 switch (fsp->flow_type & ~FLOW_EXT) { 3610 case SCTP_V4_FLOW: 3611 new_mask &= ~I40E_VERIFY_TAG_MASK; 3612 /* Fall through */ 3613 case TCP_V4_FLOW: 3614 case UDP_V4_FLOW: 3615 tcp_ip4_spec = &fsp->m_u.tcp_ip4_spec; 3616 3617 /* IPv4 source address */ 3618 if (tcp_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 3619 new_mask |= I40E_L3_SRC_MASK; 3620 else if (!tcp_ip4_spec->ip4src) 3621 new_mask &= ~I40E_L3_SRC_MASK; 3622 else 3623 return -EOPNOTSUPP; 3624 3625 /* IPv4 destination address */ 3626 if (tcp_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 3627 new_mask |= I40E_L3_DST_MASK; 3628 else if (!tcp_ip4_spec->ip4dst) 3629 new_mask &= ~I40E_L3_DST_MASK; 3630 else 3631 return -EOPNOTSUPP; 3632 3633 /* L4 source port */ 3634 if (tcp_ip4_spec->psrc == htons(0xFFFF)) 3635 new_mask |= I40E_L4_SRC_MASK; 3636 else if (!tcp_ip4_spec->psrc) 3637 new_mask &= ~I40E_L4_SRC_MASK; 3638 else 3639 return -EOPNOTSUPP; 3640 3641 /* L4 destination port */ 3642 if (tcp_ip4_spec->pdst == htons(0xFFFF)) 3643 new_mask |= I40E_L4_DST_MASK; 3644 else if (!tcp_ip4_spec->pdst) 3645 new_mask &= ~I40E_L4_DST_MASK; 3646 else 3647 return -EOPNOTSUPP; 3648 3649 /* Filtering on Type of Service is not supported. */ 3650 if (tcp_ip4_spec->tos) 3651 return -EOPNOTSUPP; 3652 3653 break; 3654 case IP_USER_FLOW: 3655 usr_ip4_spec = &fsp->m_u.usr_ip4_spec; 3656 3657 /* IPv4 source address */ 3658 if (usr_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 3659 new_mask |= I40E_L3_SRC_MASK; 3660 else if (!usr_ip4_spec->ip4src) 3661 new_mask &= ~I40E_L3_SRC_MASK; 3662 else 3663 return -EOPNOTSUPP; 3664 3665 /* IPv4 destination address */ 3666 if (usr_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 3667 new_mask |= I40E_L3_DST_MASK; 3668 else if (!usr_ip4_spec->ip4dst) 3669 new_mask &= ~I40E_L3_DST_MASK; 3670 else 3671 return -EOPNOTSUPP; 3672 3673 /* First 4 bytes of L4 header */ 3674 if (usr_ip4_spec->l4_4_bytes == htonl(0xFFFFFFFF)) 3675 new_mask |= I40E_L4_SRC_MASK | I40E_L4_DST_MASK; 3676 else if (!usr_ip4_spec->l4_4_bytes) 3677 new_mask &= ~(I40E_L4_SRC_MASK | I40E_L4_DST_MASK); 3678 else 3679 return -EOPNOTSUPP; 3680 3681 /* Filtering on Type of Service is not supported. */ 3682 if (usr_ip4_spec->tos) 3683 return -EOPNOTSUPP; 3684 3685 /* Filtering on IP version is not supported */ 3686 if (usr_ip4_spec->ip_ver) 3687 return -EINVAL; 3688 3689 /* Filtering on L4 protocol is not supported */ 3690 if (usr_ip4_spec->proto) 3691 return -EINVAL; 3692 3693 break; 3694 default: 3695 return -EOPNOTSUPP; 3696 } 3697 3698 /* First, clear all flexible filter entries */ 3699 new_mask &= ~I40E_FLEX_INPUT_MASK; 3700 3701 /* If we have a flexible filter, try to add this offset to the correct 3702 * flexible filter PIT list. Once finished, we can update the mask. 3703 * If the src_offset changed, we will get a new mask value which will 3704 * trigger an input set change. 3705 */ 3706 if (userdef->flex_filter) { 3707 struct i40e_flex_pit *l3_flex_pit = NULL, *flex_pit = NULL; 3708 3709 /* Flexible offset must be even, since the flexible payload 3710 * must be aligned on 2-byte boundary. 3711 */ 3712 if (userdef->flex_offset & 0x1) { 3713 dev_warn(&pf->pdev->dev, 3714 "Flexible data offset must be 2-byte aligned\n"); 3715 return -EINVAL; 3716 } 3717 3718 src_offset = userdef->flex_offset >> 1; 3719 3720 /* FLX_PIT source offset value is only so large */ 3721 if (src_offset > I40E_MAX_FLEX_SRC_OFFSET) { 3722 dev_warn(&pf->pdev->dev, 3723 "Flexible data must reside within first 64 bytes of the packet payload\n"); 3724 return -EINVAL; 3725 } 3726 3727 /* See if this offset has already been programmed. If we get 3728 * an ERR_PTR, then the filter is not safe to add. Otherwise, 3729 * if we get a NULL pointer, this means we will need to add 3730 * the offset. 3731 */ 3732 flex_pit = i40e_find_flex_offset(&pf->l4_flex_pit_list, 3733 src_offset); 3734 if (IS_ERR(flex_pit)) 3735 return PTR_ERR(flex_pit); 3736 3737 /* IP_USER_FLOW filters match both L4 (ICMP) and L3 (unknown) 3738 * packet types, and thus we need to program both L3 and L4 3739 * flexible values. These must have identical flexible index, 3740 * as otherwise we can't correctly program the input set. So 3741 * we'll find both an L3 and L4 index and make sure they are 3742 * the same. 3743 */ 3744 if (flex_l3) { 3745 l3_flex_pit = 3746 i40e_find_flex_offset(&pf->l3_flex_pit_list, 3747 src_offset); 3748 if (IS_ERR(l3_flex_pit)) 3749 return PTR_ERR(l3_flex_pit); 3750 3751 if (flex_pit) { 3752 /* If we already had a matching L4 entry, we 3753 * need to make sure that the L3 entry we 3754 * obtained uses the same index. 3755 */ 3756 if (l3_flex_pit) { 3757 if (l3_flex_pit->pit_index != 3758 flex_pit->pit_index) { 3759 return -EINVAL; 3760 } 3761 } else { 3762 new_flex_offset = true; 3763 } 3764 } else { 3765 flex_pit = l3_flex_pit; 3766 } 3767 } 3768 3769 /* If we didn't find an existing flex offset, we need to 3770 * program a new one. However, we don't immediately program it 3771 * here because we will wait to program until after we check 3772 * that it is safe to change the input set. 3773 */ 3774 if (!flex_pit) { 3775 new_flex_offset = true; 3776 pit_index = i40e_unused_pit_index(pf); 3777 } else { 3778 pit_index = flex_pit->pit_index; 3779 } 3780 3781 /* Update the mask with the new offset */ 3782 new_mask |= i40e_pit_index_to_mask(pit_index); 3783 } 3784 3785 /* If the mask and flexible filter offsets for this filter match the 3786 * currently programmed values we don't need any input set change, so 3787 * this filter is safe to install. 3788 */ 3789 if (new_mask == current_mask && !new_flex_offset) 3790 return 0; 3791 3792 netif_info(pf, drv, vsi->netdev, "Input set change requested for %s flows:\n", 3793 i40e_flow_str(fsp)); 3794 i40e_print_input_set(vsi, current_mask, new_mask); 3795 if (new_flex_offset) { 3796 netif_info(pf, drv, vsi->netdev, "FLEX index %d: Offset -> %d", 3797 pit_index, src_offset); 3798 } 3799 3800 /* Hardware input sets are global across multiple ports, so even the 3801 * main port cannot change them when in MFP mode as this would impact 3802 * any filters on the other ports. 3803 */ 3804 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 3805 netif_err(pf, drv, vsi->netdev, "Cannot change Flow Director input sets while MFP is enabled\n"); 3806 return -EOPNOTSUPP; 3807 } 3808 3809 /* This filter requires us to update the input set. However, hardware 3810 * only supports one input set per flow type, and does not support 3811 * separate masks for each filter. This means that we can only support 3812 * a single mask for all filters of a specific type. 3813 * 3814 * If we have preexisting filters, they obviously depend on the 3815 * current programmed input set. Display a diagnostic message in this 3816 * case explaining why the filter could not be accepted. 3817 */ 3818 if (*fdir_filter_count) { 3819 netif_err(pf, drv, vsi->netdev, "Cannot change input set for %s flows until %d preexisting filters are removed\n", 3820 i40e_flow_str(fsp), 3821 *fdir_filter_count); 3822 return -EOPNOTSUPP; 3823 } 3824 3825 i40e_write_fd_input_set(pf, index, new_mask); 3826 3827 /* IP_USER_FLOW filters match both IPv4/Other and IPv4/Fragmented 3828 * frames. If we're programming the input set for IPv4/Other, we also 3829 * need to program the IPv4/Fragmented input set. Since we don't have 3830 * separate support, we'll always assume and enforce that the two flow 3831 * types must have matching input sets. 3832 */ 3833 if (index == I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) 3834 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4, 3835 new_mask); 3836 3837 /* Add the new offset and update table, if necessary */ 3838 if (new_flex_offset) { 3839 err = i40e_add_flex_offset(&pf->l4_flex_pit_list, src_offset, 3840 pit_index); 3841 if (err) 3842 return err; 3843 3844 if (flex_l3) { 3845 err = i40e_add_flex_offset(&pf->l3_flex_pit_list, 3846 src_offset, 3847 pit_index); 3848 if (err) 3849 return err; 3850 } 3851 3852 i40e_reprogram_flex_pit(pf); 3853 } 3854 3855 return 0; 3856 } 3857 3858 /** 3859 * i40e_match_fdir_filter - Return true of two filters match 3860 * @a: pointer to filter struct 3861 * @b: pointer to filter struct 3862 * 3863 * Returns true if the two filters match exactly the same criteria. I.e. they 3864 * match the same flow type and have the same parameters. We don't need to 3865 * check any input-set since all filters of the same flow type must use the 3866 * same input set. 3867 **/ 3868 static bool i40e_match_fdir_filter(struct i40e_fdir_filter *a, 3869 struct i40e_fdir_filter *b) 3870 { 3871 /* The filters do not much if any of these criteria differ. */ 3872 if (a->dst_ip != b->dst_ip || 3873 a->src_ip != b->src_ip || 3874 a->dst_port != b->dst_port || 3875 a->src_port != b->src_port || 3876 a->flow_type != b->flow_type || 3877 a->ip4_proto != b->ip4_proto) 3878 return false; 3879 3880 return true; 3881 } 3882 3883 /** 3884 * i40e_disallow_matching_filters - Check that new filters differ 3885 * @vsi: pointer to the targeted VSI 3886 * @input: new filter to check 3887 * 3888 * Due to hardware limitations, it is not possible for two filters that match 3889 * similar criteria to be programmed at the same time. This is true for a few 3890 * reasons: 3891 * 3892 * (a) all filters matching a particular flow type must use the same input 3893 * set, that is they must match the same criteria. 3894 * (b) different flow types will never match the same packet, as the flow type 3895 * is decided by hardware before checking which rules apply. 3896 * (c) hardware has no way to distinguish which order filters apply in. 3897 * 3898 * Due to this, we can't really support using the location data to order 3899 * filters in the hardware parsing. It is technically possible for the user to 3900 * request two filters matching the same criteria but which select different 3901 * queues. In this case, rather than keep both filters in the list, we reject 3902 * the 2nd filter when the user requests adding it. 3903 * 3904 * This avoids needing to track location for programming the filter to 3905 * hardware, and ensures that we avoid some strange scenarios involving 3906 * deleting filters which match the same criteria. 3907 **/ 3908 static int i40e_disallow_matching_filters(struct i40e_vsi *vsi, 3909 struct i40e_fdir_filter *input) 3910 { 3911 struct i40e_pf *pf = vsi->back; 3912 struct i40e_fdir_filter *rule; 3913 struct hlist_node *node2; 3914 3915 /* Loop through every filter, and check that it doesn't match */ 3916 hlist_for_each_entry_safe(rule, node2, 3917 &pf->fdir_filter_list, fdir_node) { 3918 /* Don't check the filters match if they share the same fd_id, 3919 * since the new filter is actually just updating the target 3920 * of the old filter. 3921 */ 3922 if (rule->fd_id == input->fd_id) 3923 continue; 3924 3925 /* If any filters match, then print a warning message to the 3926 * kernel message buffer and bail out. 3927 */ 3928 if (i40e_match_fdir_filter(rule, input)) { 3929 dev_warn(&pf->pdev->dev, 3930 "Existing user defined filter %d already matches this flow.\n", 3931 rule->fd_id); 3932 return -EINVAL; 3933 } 3934 } 3935 3936 return 0; 3937 } 3938 3939 /** 3940 * i40e_add_fdir_ethtool - Add/Remove Flow Director filters 3941 * @vsi: pointer to the targeted VSI 3942 * @cmd: command to get or set RX flow classification rules 3943 * 3944 * Add Flow Director filters for a specific flow spec based on their 3945 * protocol. Returns 0 if the filters were successfully added. 3946 **/ 3947 static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi, 3948 struct ethtool_rxnfc *cmd) 3949 { 3950 struct i40e_rx_flow_userdef userdef; 3951 struct ethtool_rx_flow_spec *fsp; 3952 struct i40e_fdir_filter *input; 3953 u16 dest_vsi = 0, q_index = 0; 3954 struct i40e_pf *pf; 3955 int ret = -EINVAL; 3956 u8 dest_ctl; 3957 3958 if (!vsi) 3959 return -EINVAL; 3960 pf = vsi->back; 3961 3962 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 3963 return -EOPNOTSUPP; 3964 3965 if (test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state)) 3966 return -ENOSPC; 3967 3968 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 3969 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 3970 return -EBUSY; 3971 3972 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 3973 return -EBUSY; 3974 3975 fsp = (struct ethtool_rx_flow_spec *)&cmd->fs; 3976 3977 /* Parse the user-defined field */ 3978 if (i40e_parse_rx_flow_user_data(fsp, &userdef)) 3979 return -EINVAL; 3980 3981 /* Extended MAC field is not supported */ 3982 if (fsp->flow_type & FLOW_MAC_EXT) 3983 return -EINVAL; 3984 3985 ret = i40e_check_fdir_input_set(vsi, fsp, &userdef); 3986 if (ret) 3987 return ret; 3988 3989 if (fsp->location >= (pf->hw.func_caps.fd_filters_best_effort + 3990 pf->hw.func_caps.fd_filters_guaranteed)) { 3991 return -EINVAL; 3992 } 3993 3994 /* ring_cookie is either the drop index, or is a mask of the queue 3995 * index and VF id we wish to target. 3996 */ 3997 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) { 3998 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 3999 } else { 4000 u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie); 4001 u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie); 4002 4003 if (!vf) { 4004 if (ring >= vsi->num_queue_pairs) 4005 return -EINVAL; 4006 dest_vsi = vsi->id; 4007 } else { 4008 /* VFs are zero-indexed, so we subtract one here */ 4009 vf--; 4010 4011 if (vf >= pf->num_alloc_vfs) 4012 return -EINVAL; 4013 if (ring >= pf->vf[vf].num_queue_pairs) 4014 return -EINVAL; 4015 dest_vsi = pf->vf[vf].lan_vsi_id; 4016 } 4017 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX; 4018 q_index = ring; 4019 } 4020 4021 input = kzalloc(sizeof(*input), GFP_KERNEL); 4022 4023 if (!input) 4024 return -ENOMEM; 4025 4026 input->fd_id = fsp->location; 4027 input->q_index = q_index; 4028 input->dest_vsi = dest_vsi; 4029 input->dest_ctl = dest_ctl; 4030 input->fd_status = I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID; 4031 input->cnt_index = I40E_FD_SB_STAT_IDX(pf->hw.pf_id); 4032 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 4033 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 4034 input->flow_type = fsp->flow_type & ~FLOW_EXT; 4035 input->ip4_proto = fsp->h_u.usr_ip4_spec.proto; 4036 4037 /* Reverse the src and dest notion, since the HW expects them to be from 4038 * Tx perspective where as the input from user is from Rx filter view. 4039 */ 4040 input->dst_port = fsp->h_u.tcp_ip4_spec.psrc; 4041 input->src_port = fsp->h_u.tcp_ip4_spec.pdst; 4042 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 4043 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 4044 4045 if (userdef.flex_filter) { 4046 input->flex_filter = true; 4047 input->flex_word = cpu_to_be16(userdef.flex_word); 4048 input->flex_offset = userdef.flex_offset; 4049 } 4050 4051 /* Avoid programming two filters with identical match criteria. */ 4052 ret = i40e_disallow_matching_filters(vsi, input); 4053 if (ret) 4054 goto free_filter_memory; 4055 4056 /* Add the input filter to the fdir_input_list, possibly replacing 4057 * a previous filter. Do not free the input structure after adding it 4058 * to the list as this would cause a use-after-free bug. 4059 */ 4060 i40e_update_ethtool_fdir_entry(vsi, input, fsp->location, NULL); 4061 ret = i40e_add_del_fdir(vsi, input, true); 4062 if (ret) 4063 goto remove_sw_rule; 4064 return 0; 4065 4066 remove_sw_rule: 4067 hlist_del(&input->fdir_node); 4068 pf->fdir_pf_active_filters--; 4069 free_filter_memory: 4070 kfree(input); 4071 return ret; 4072 } 4073 4074 /** 4075 * i40e_set_rxnfc - command to set RX flow classification rules 4076 * @netdev: network interface device structure 4077 * @cmd: ethtool rxnfc command 4078 * 4079 * Returns Success if the command is supported. 4080 **/ 4081 static int i40e_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd) 4082 { 4083 struct i40e_netdev_priv *np = netdev_priv(netdev); 4084 struct i40e_vsi *vsi = np->vsi; 4085 struct i40e_pf *pf = vsi->back; 4086 int ret = -EOPNOTSUPP; 4087 4088 switch (cmd->cmd) { 4089 case ETHTOOL_SRXFH: 4090 ret = i40e_set_rss_hash_opt(pf, cmd); 4091 break; 4092 case ETHTOOL_SRXCLSRLINS: 4093 ret = i40e_add_fdir_ethtool(vsi, cmd); 4094 break; 4095 case ETHTOOL_SRXCLSRLDEL: 4096 ret = i40e_del_fdir_entry(vsi, cmd); 4097 break; 4098 default: 4099 break; 4100 } 4101 4102 return ret; 4103 } 4104 4105 /** 4106 * i40e_max_channels - get Max number of combined channels supported 4107 * @vsi: vsi pointer 4108 **/ 4109 static unsigned int i40e_max_channels(struct i40e_vsi *vsi) 4110 { 4111 /* TODO: This code assumes DCB and FD is disabled for now. */ 4112 return vsi->alloc_queue_pairs; 4113 } 4114 4115 /** 4116 * i40e_get_channels - Get the current channels enabled and max supported etc. 4117 * @dev: network interface device structure 4118 * @ch: ethtool channels structure 4119 * 4120 * We don't support separate tx and rx queues as channels. The other count 4121 * represents how many queues are being used for control. max_combined counts 4122 * how many queue pairs we can support. They may not be mapped 1 to 1 with 4123 * q_vectors since we support a lot more queue pairs than q_vectors. 4124 **/ 4125 static void i40e_get_channels(struct net_device *dev, 4126 struct ethtool_channels *ch) 4127 { 4128 struct i40e_netdev_priv *np = netdev_priv(dev); 4129 struct i40e_vsi *vsi = np->vsi; 4130 struct i40e_pf *pf = vsi->back; 4131 4132 /* report maximum channels */ 4133 ch->max_combined = i40e_max_channels(vsi); 4134 4135 /* report info for other vector */ 4136 ch->other_count = (pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0; 4137 ch->max_other = ch->other_count; 4138 4139 /* Note: This code assumes DCB is disabled for now. */ 4140 ch->combined_count = vsi->num_queue_pairs; 4141 } 4142 4143 /** 4144 * i40e_set_channels - Set the new channels count. 4145 * @dev: network interface device structure 4146 * @ch: ethtool channels structure 4147 * 4148 * The new channels count may not be the same as requested by the user 4149 * since it gets rounded down to a power of 2 value. 4150 **/ 4151 static int i40e_set_channels(struct net_device *dev, 4152 struct ethtool_channels *ch) 4153 { 4154 const u8 drop = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 4155 struct i40e_netdev_priv *np = netdev_priv(dev); 4156 unsigned int count = ch->combined_count; 4157 struct i40e_vsi *vsi = np->vsi; 4158 struct i40e_pf *pf = vsi->back; 4159 struct i40e_fdir_filter *rule; 4160 struct hlist_node *node2; 4161 int new_count; 4162 int err = 0; 4163 4164 /* We do not support setting channels for any other VSI at present */ 4165 if (vsi->type != I40E_VSI_MAIN) 4166 return -EINVAL; 4167 4168 /* We do not support setting channels via ethtool when TCs are 4169 * configured through mqprio 4170 */ 4171 if (pf->flags & I40E_FLAG_TC_MQPRIO) 4172 return -EINVAL; 4173 4174 /* verify they are not requesting separate vectors */ 4175 if (!count || ch->rx_count || ch->tx_count) 4176 return -EINVAL; 4177 4178 /* verify other_count has not changed */ 4179 if (ch->other_count != ((pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0)) 4180 return -EINVAL; 4181 4182 /* verify the number of channels does not exceed hardware limits */ 4183 if (count > i40e_max_channels(vsi)) 4184 return -EINVAL; 4185 4186 /* verify that the number of channels does not invalidate any current 4187 * flow director rules 4188 */ 4189 hlist_for_each_entry_safe(rule, node2, 4190 &pf->fdir_filter_list, fdir_node) { 4191 if (rule->dest_ctl != drop && count <= rule->q_index) { 4192 dev_warn(&pf->pdev->dev, 4193 "Existing user defined filter %d assigns flow to queue %d\n", 4194 rule->fd_id, rule->q_index); 4195 err = -EINVAL; 4196 } 4197 } 4198 4199 if (err) { 4200 dev_err(&pf->pdev->dev, 4201 "Existing filter rules must be deleted to reduce combined channel count to %d\n", 4202 count); 4203 return err; 4204 } 4205 4206 /* update feature limits from largest to smallest supported values */ 4207 /* TODO: Flow director limit, DCB etc */ 4208 4209 /* use rss_reconfig to rebuild with new queue count and update traffic 4210 * class queue mapping 4211 */ 4212 new_count = i40e_reconfig_rss_queues(pf, count); 4213 if (new_count > 0) 4214 return 0; 4215 else 4216 return -EINVAL; 4217 } 4218 4219 /** 4220 * i40e_get_rxfh_key_size - get the RSS hash key size 4221 * @netdev: network interface device structure 4222 * 4223 * Returns the table size. 4224 **/ 4225 static u32 i40e_get_rxfh_key_size(struct net_device *netdev) 4226 { 4227 return I40E_HKEY_ARRAY_SIZE; 4228 } 4229 4230 /** 4231 * i40e_get_rxfh_indir_size - get the rx flow hash indirection table size 4232 * @netdev: network interface device structure 4233 * 4234 * Returns the table size. 4235 **/ 4236 static u32 i40e_get_rxfh_indir_size(struct net_device *netdev) 4237 { 4238 return I40E_HLUT_ARRAY_SIZE; 4239 } 4240 4241 /** 4242 * i40e_get_rxfh - get the rx flow hash indirection table 4243 * @netdev: network interface device structure 4244 * @indir: indirection table 4245 * @key: hash key 4246 * @hfunc: hash function 4247 * 4248 * Reads the indirection table directly from the hardware. Returns 0 on 4249 * success. 4250 **/ 4251 static int i40e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key, 4252 u8 *hfunc) 4253 { 4254 struct i40e_netdev_priv *np = netdev_priv(netdev); 4255 struct i40e_vsi *vsi = np->vsi; 4256 u8 *lut, *seed = NULL; 4257 int ret; 4258 u16 i; 4259 4260 if (hfunc) 4261 *hfunc = ETH_RSS_HASH_TOP; 4262 4263 if (!indir) 4264 return 0; 4265 4266 seed = key; 4267 lut = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 4268 if (!lut) 4269 return -ENOMEM; 4270 ret = i40e_get_rss(vsi, seed, lut, I40E_HLUT_ARRAY_SIZE); 4271 if (ret) 4272 goto out; 4273 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 4274 indir[i] = (u32)(lut[i]); 4275 4276 out: 4277 kfree(lut); 4278 4279 return ret; 4280 } 4281 4282 /** 4283 * i40e_set_rxfh - set the rx flow hash indirection table 4284 * @netdev: network interface device structure 4285 * @indir: indirection table 4286 * @key: hash key 4287 * @hfunc: hash function to use 4288 * 4289 * Returns -EINVAL if the table specifies an invalid queue id, otherwise 4290 * returns 0 after programming the table. 4291 **/ 4292 static int i40e_set_rxfh(struct net_device *netdev, const u32 *indir, 4293 const u8 *key, const u8 hfunc) 4294 { 4295 struct i40e_netdev_priv *np = netdev_priv(netdev); 4296 struct i40e_vsi *vsi = np->vsi; 4297 struct i40e_pf *pf = vsi->back; 4298 u8 *seed = NULL; 4299 u16 i; 4300 4301 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) 4302 return -EOPNOTSUPP; 4303 4304 if (key) { 4305 if (!vsi->rss_hkey_user) { 4306 vsi->rss_hkey_user = kzalloc(I40E_HKEY_ARRAY_SIZE, 4307 GFP_KERNEL); 4308 if (!vsi->rss_hkey_user) 4309 return -ENOMEM; 4310 } 4311 memcpy(vsi->rss_hkey_user, key, I40E_HKEY_ARRAY_SIZE); 4312 seed = vsi->rss_hkey_user; 4313 } 4314 if (!vsi->rss_lut_user) { 4315 vsi->rss_lut_user = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 4316 if (!vsi->rss_lut_user) 4317 return -ENOMEM; 4318 } 4319 4320 /* Each 32 bits pointed by 'indir' is stored with a lut entry */ 4321 if (indir) 4322 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 4323 vsi->rss_lut_user[i] = (u8)(indir[i]); 4324 else 4325 i40e_fill_rss_lut(pf, vsi->rss_lut_user, I40E_HLUT_ARRAY_SIZE, 4326 vsi->rss_size); 4327 4328 return i40e_config_rss(vsi, seed, vsi->rss_lut_user, 4329 I40E_HLUT_ARRAY_SIZE); 4330 } 4331 4332 /** 4333 * i40e_get_priv_flags - report device private flags 4334 * @dev: network interface device structure 4335 * 4336 * The get string set count and the string set should be matched for each 4337 * flag returned. Add new strings for each flag to the i40e_gstrings_priv_flags 4338 * array. 4339 * 4340 * Returns a u32 bitmap of flags. 4341 **/ 4342 static u32 i40e_get_priv_flags(struct net_device *dev) 4343 { 4344 struct i40e_netdev_priv *np = netdev_priv(dev); 4345 struct i40e_vsi *vsi = np->vsi; 4346 struct i40e_pf *pf = vsi->back; 4347 u32 i, j, ret_flags = 0; 4348 4349 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 4350 const struct i40e_priv_flags *priv_flags; 4351 4352 priv_flags = &i40e_gstrings_priv_flags[i]; 4353 4354 if (priv_flags->flag & pf->flags) 4355 ret_flags |= BIT(i); 4356 } 4357 4358 if (pf->hw.pf_id != 0) 4359 return ret_flags; 4360 4361 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 4362 const struct i40e_priv_flags *priv_flags; 4363 4364 priv_flags = &i40e_gl_gstrings_priv_flags[j]; 4365 4366 if (priv_flags->flag & pf->flags) 4367 ret_flags |= BIT(i + j); 4368 } 4369 4370 return ret_flags; 4371 } 4372 4373 /** 4374 * i40e_set_priv_flags - set private flags 4375 * @dev: network interface device structure 4376 * @flags: bit flags to be set 4377 **/ 4378 static int i40e_set_priv_flags(struct net_device *dev, u32 flags) 4379 { 4380 struct i40e_netdev_priv *np = netdev_priv(dev); 4381 struct i40e_vsi *vsi = np->vsi; 4382 struct i40e_pf *pf = vsi->back; 4383 u64 orig_flags, new_flags, changed_flags; 4384 u32 i, j; 4385 4386 orig_flags = READ_ONCE(pf->flags); 4387 new_flags = orig_flags; 4388 4389 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 4390 const struct i40e_priv_flags *priv_flags; 4391 4392 priv_flags = &i40e_gstrings_priv_flags[i]; 4393 4394 if (flags & BIT(i)) 4395 new_flags |= priv_flags->flag; 4396 else 4397 new_flags &= ~(priv_flags->flag); 4398 4399 /* If this is a read-only flag, it can't be changed */ 4400 if (priv_flags->read_only && 4401 ((orig_flags ^ new_flags) & ~BIT(i))) 4402 return -EOPNOTSUPP; 4403 } 4404 4405 if (pf->hw.pf_id != 0) 4406 goto flags_complete; 4407 4408 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 4409 const struct i40e_priv_flags *priv_flags; 4410 4411 priv_flags = &i40e_gl_gstrings_priv_flags[j]; 4412 4413 if (flags & BIT(i + j)) 4414 new_flags |= priv_flags->flag; 4415 else 4416 new_flags &= ~(priv_flags->flag); 4417 4418 /* If this is a read-only flag, it can't be changed */ 4419 if (priv_flags->read_only && 4420 ((orig_flags ^ new_flags) & ~BIT(i))) 4421 return -EOPNOTSUPP; 4422 } 4423 4424 flags_complete: 4425 changed_flags = orig_flags ^ new_flags; 4426 4427 /* Before we finalize any flag changes, we need to perform some 4428 * checks to ensure that the changes are supported and safe. 4429 */ 4430 4431 /* ATR eviction is not supported on all devices */ 4432 if ((new_flags & I40E_FLAG_HW_ATR_EVICT_ENABLED) && 4433 !(pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE)) 4434 return -EOPNOTSUPP; 4435 4436 /* If the driver detected FW LLDP was disabled on init, this flag could 4437 * be set, however we do not support _changing_ the flag if NPAR is 4438 * enabled or FW API version < 1.7. There are situations where older 4439 * FW versions/NPAR enabled PFs could disable LLDP, however we _must_ 4440 * not allow the user to enable/disable LLDP with this flag on 4441 * unsupported FW versions. 4442 */ 4443 if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) { 4444 if (!(pf->hw_features & I40E_HW_STOPPABLE_FW_LLDP)) { 4445 dev_warn(&pf->pdev->dev, 4446 "Device does not support changing FW LLDP\n"); 4447 return -EOPNOTSUPP; 4448 } 4449 } 4450 4451 /* Now that we've checked to ensure that the new flags are valid, load 4452 * them into place. Since we only modify flags either (a) during 4453 * initialization or (b) while holding the RTNL lock, we don't need 4454 * anything fancy here. 4455 */ 4456 pf->flags = new_flags; 4457 4458 /* Process any additional changes needed as a result of flag changes. 4459 * The changed_flags value reflects the list of bits that were 4460 * changed in the code above. 4461 */ 4462 4463 /* Flush current ATR settings if ATR was disabled */ 4464 if ((changed_flags & I40E_FLAG_FD_ATR_ENABLED) && 4465 !(pf->flags & I40E_FLAG_FD_ATR_ENABLED)) { 4466 set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state); 4467 set_bit(__I40E_FD_FLUSH_REQUESTED, pf->state); 4468 } 4469 4470 if (changed_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT) { 4471 u16 sw_flags = 0, valid_flags = 0; 4472 int ret; 4473 4474 if (!(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) 4475 sw_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 4476 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 4477 ret = i40e_aq_set_switch_config(&pf->hw, sw_flags, valid_flags, 4478 0, NULL); 4479 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) { 4480 dev_info(&pf->pdev->dev, 4481 "couldn't set switch config bits, err %s aq_err %s\n", 4482 i40e_stat_str(&pf->hw, ret), 4483 i40e_aq_str(&pf->hw, 4484 pf->hw.aq.asq_last_status)); 4485 /* not a fatal problem, just keep going */ 4486 } 4487 } 4488 4489 if ((changed_flags & pf->flags & 4490 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED) && 4491 (pf->flags & I40E_FLAG_MFP_ENABLED)) 4492 dev_warn(&pf->pdev->dev, 4493 "Turning on link-down-on-close flag may affect other partitions\n"); 4494 4495 if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) { 4496 if (pf->flags & I40E_FLAG_DISABLE_FW_LLDP) { 4497 struct i40e_dcbx_config *dcbcfg; 4498 4499 i40e_aq_stop_lldp(&pf->hw, true, NULL); 4500 i40e_aq_set_dcb_parameters(&pf->hw, true, NULL); 4501 /* reset local_dcbx_config to default */ 4502 dcbcfg = &pf->hw.local_dcbx_config; 4503 dcbcfg->etscfg.willing = 1; 4504 dcbcfg->etscfg.maxtcs = 0; 4505 dcbcfg->etscfg.tcbwtable[0] = 100; 4506 for (i = 1; i < I40E_MAX_TRAFFIC_CLASS; i++) 4507 dcbcfg->etscfg.tcbwtable[i] = 0; 4508 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) 4509 dcbcfg->etscfg.prioritytable[i] = 0; 4510 dcbcfg->etscfg.tsatable[0] = I40E_IEEE_TSA_ETS; 4511 dcbcfg->pfc.willing = 1; 4512 dcbcfg->pfc.pfccap = I40E_MAX_TRAFFIC_CLASS; 4513 } else { 4514 i40e_aq_start_lldp(&pf->hw, NULL); 4515 } 4516 } 4517 4518 /* Issue reset to cause things to take effect, as additional bits 4519 * are added we will need to create a mask of bits requiring reset 4520 */ 4521 if (changed_flags & (I40E_FLAG_VEB_STATS_ENABLED | 4522 I40E_FLAG_LEGACY_RX | 4523 I40E_FLAG_SOURCE_PRUNING_DISABLED | 4524 I40E_FLAG_DISABLE_FW_LLDP)) 4525 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 4526 4527 return 0; 4528 } 4529 4530 /** 4531 * i40e_get_module_info - get (Q)SFP+ module type info 4532 * @netdev: network interface device structure 4533 * @modinfo: module EEPROM size and layout information structure 4534 **/ 4535 static int i40e_get_module_info(struct net_device *netdev, 4536 struct ethtool_modinfo *modinfo) 4537 { 4538 struct i40e_netdev_priv *np = netdev_priv(netdev); 4539 struct i40e_vsi *vsi = np->vsi; 4540 struct i40e_pf *pf = vsi->back; 4541 struct i40e_hw *hw = &pf->hw; 4542 u32 sff8472_comp = 0; 4543 u32 sff8472_swap = 0; 4544 u32 sff8636_rev = 0; 4545 i40e_status status; 4546 u32 type = 0; 4547 4548 /* Check if firmware supports reading module EEPROM. */ 4549 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) { 4550 netdev_err(vsi->netdev, "Module EEPROM memory read not supported. Please update the NVM image.\n"); 4551 return -EINVAL; 4552 } 4553 4554 status = i40e_update_link_info(hw); 4555 if (status) 4556 return -EIO; 4557 4558 if (hw->phy.link_info.phy_type == I40E_PHY_TYPE_EMPTY) { 4559 netdev_err(vsi->netdev, "Cannot read module EEPROM memory. No module connected.\n"); 4560 return -EINVAL; 4561 } 4562 4563 type = hw->phy.link_info.module_type[0]; 4564 4565 switch (type) { 4566 case I40E_MODULE_TYPE_SFP: 4567 status = i40e_aq_get_phy_register(hw, 4568 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4569 I40E_I2C_EEPROM_DEV_ADDR, 4570 I40E_MODULE_SFF_8472_COMP, 4571 &sff8472_comp, NULL); 4572 if (status) 4573 return -EIO; 4574 4575 status = i40e_aq_get_phy_register(hw, 4576 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4577 I40E_I2C_EEPROM_DEV_ADDR, 4578 I40E_MODULE_SFF_8472_SWAP, 4579 &sff8472_swap, NULL); 4580 if (status) 4581 return -EIO; 4582 4583 /* Check if the module requires address swap to access 4584 * the other EEPROM memory page. 4585 */ 4586 if (sff8472_swap & I40E_MODULE_SFF_ADDR_MODE) { 4587 netdev_warn(vsi->netdev, "Module address swap to access page 0xA2 is not supported.\n"); 4588 modinfo->type = ETH_MODULE_SFF_8079; 4589 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 4590 } else if (sff8472_comp == 0x00) { 4591 /* Module is not SFF-8472 compliant */ 4592 modinfo->type = ETH_MODULE_SFF_8079; 4593 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 4594 } else { 4595 modinfo->type = ETH_MODULE_SFF_8472; 4596 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 4597 } 4598 break; 4599 case I40E_MODULE_TYPE_QSFP_PLUS: 4600 /* Read from memory page 0. */ 4601 status = i40e_aq_get_phy_register(hw, 4602 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4603 0, 4604 I40E_MODULE_REVISION_ADDR, 4605 &sff8636_rev, NULL); 4606 if (status) 4607 return -EIO; 4608 /* Determine revision compliance byte */ 4609 if (sff8636_rev > 0x02) { 4610 /* Module is SFF-8636 compliant */ 4611 modinfo->type = ETH_MODULE_SFF_8636; 4612 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 4613 } else { 4614 modinfo->type = ETH_MODULE_SFF_8436; 4615 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 4616 } 4617 break; 4618 case I40E_MODULE_TYPE_QSFP28: 4619 modinfo->type = ETH_MODULE_SFF_8636; 4620 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 4621 break; 4622 default: 4623 netdev_err(vsi->netdev, "Module type unrecognized\n"); 4624 return -EINVAL; 4625 } 4626 return 0; 4627 } 4628 4629 /** 4630 * i40e_get_module_eeprom - fills buffer with (Q)SFP+ module memory contents 4631 * @netdev: network interface device structure 4632 * @ee: EEPROM dump request structure 4633 * @data: buffer to be filled with EEPROM contents 4634 **/ 4635 static int i40e_get_module_eeprom(struct net_device *netdev, 4636 struct ethtool_eeprom *ee, 4637 u8 *data) 4638 { 4639 struct i40e_netdev_priv *np = netdev_priv(netdev); 4640 struct i40e_vsi *vsi = np->vsi; 4641 struct i40e_pf *pf = vsi->back; 4642 struct i40e_hw *hw = &pf->hw; 4643 bool is_sfp = false; 4644 i40e_status status; 4645 u32 value = 0; 4646 int i; 4647 4648 if (!ee || !ee->len || !data) 4649 return -EINVAL; 4650 4651 if (hw->phy.link_info.module_type[0] == I40E_MODULE_TYPE_SFP) 4652 is_sfp = true; 4653 4654 for (i = 0; i < ee->len; i++) { 4655 u32 offset = i + ee->offset; 4656 u32 addr = is_sfp ? I40E_I2C_EEPROM_DEV_ADDR : 0; 4657 4658 /* Check if we need to access the other memory page */ 4659 if (is_sfp) { 4660 if (offset >= ETH_MODULE_SFF_8079_LEN) { 4661 offset -= ETH_MODULE_SFF_8079_LEN; 4662 addr = I40E_I2C_EEPROM_DEV_ADDR2; 4663 } 4664 } else { 4665 while (offset >= ETH_MODULE_SFF_8436_LEN) { 4666 /* Compute memory page number and offset. */ 4667 offset -= ETH_MODULE_SFF_8436_LEN / 2; 4668 addr++; 4669 } 4670 } 4671 4672 status = i40e_aq_get_phy_register(hw, 4673 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4674 addr, offset, &value, NULL); 4675 if (status) 4676 return -EIO; 4677 data[i] = value; 4678 } 4679 return 0; 4680 } 4681 4682 static const struct ethtool_ops i40e_ethtool_ops = { 4683 .get_drvinfo = i40e_get_drvinfo, 4684 .get_regs_len = i40e_get_regs_len, 4685 .get_regs = i40e_get_regs, 4686 .nway_reset = i40e_nway_reset, 4687 .get_link = ethtool_op_get_link, 4688 .get_wol = i40e_get_wol, 4689 .set_wol = i40e_set_wol, 4690 .set_eeprom = i40e_set_eeprom, 4691 .get_eeprom_len = i40e_get_eeprom_len, 4692 .get_eeprom = i40e_get_eeprom, 4693 .get_ringparam = i40e_get_ringparam, 4694 .set_ringparam = i40e_set_ringparam, 4695 .get_pauseparam = i40e_get_pauseparam, 4696 .set_pauseparam = i40e_set_pauseparam, 4697 .get_msglevel = i40e_get_msglevel, 4698 .set_msglevel = i40e_set_msglevel, 4699 .get_rxnfc = i40e_get_rxnfc, 4700 .set_rxnfc = i40e_set_rxnfc, 4701 .self_test = i40e_diag_test, 4702 .get_strings = i40e_get_strings, 4703 .set_phys_id = i40e_set_phys_id, 4704 .get_sset_count = i40e_get_sset_count, 4705 .get_ethtool_stats = i40e_get_ethtool_stats, 4706 .get_coalesce = i40e_get_coalesce, 4707 .set_coalesce = i40e_set_coalesce, 4708 .get_rxfh_key_size = i40e_get_rxfh_key_size, 4709 .get_rxfh_indir_size = i40e_get_rxfh_indir_size, 4710 .get_rxfh = i40e_get_rxfh, 4711 .set_rxfh = i40e_set_rxfh, 4712 .get_channels = i40e_get_channels, 4713 .set_channels = i40e_set_channels, 4714 .get_module_info = i40e_get_module_info, 4715 .get_module_eeprom = i40e_get_module_eeprom, 4716 .get_ts_info = i40e_get_ts_info, 4717 .get_priv_flags = i40e_get_priv_flags, 4718 .set_priv_flags = i40e_set_priv_flags, 4719 .get_per_queue_coalesce = i40e_get_per_queue_coalesce, 4720 .set_per_queue_coalesce = i40e_set_per_queue_coalesce, 4721 .get_link_ksettings = i40e_get_link_ksettings, 4722 .set_link_ksettings = i40e_set_link_ksettings, 4723 }; 4724 4725 void i40e_set_ethtool_ops(struct net_device *netdev) 4726 { 4727 netdev->ethtool_ops = &i40e_ethtool_ops; 4728 } 4729