1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 2013 - 2018 Intel Corporation. */ 3 4 /* ethtool support for i40e */ 5 6 #include "i40e.h" 7 #include "i40e_diag.h" 8 9 struct i40e_stats { 10 char stat_string[ETH_GSTRING_LEN]; 11 int sizeof_stat; 12 int stat_offset; 13 }; 14 15 #define I40E_STAT(_type, _name, _stat) { \ 16 .stat_string = _name, \ 17 .sizeof_stat = FIELD_SIZEOF(_type, _stat), \ 18 .stat_offset = offsetof(_type, _stat) \ 19 } 20 21 #define I40E_NETDEV_STAT(_net_stat) \ 22 I40E_STAT(struct rtnl_link_stats64, #_net_stat, _net_stat) 23 #define I40E_PF_STAT(_name, _stat) \ 24 I40E_STAT(struct i40e_pf, _name, _stat) 25 #define I40E_VSI_STAT(_name, _stat) \ 26 I40E_STAT(struct i40e_vsi, _name, _stat) 27 #define I40E_VEB_STAT(_name, _stat) \ 28 I40E_STAT(struct i40e_veb, _name, _stat) 29 30 static const struct i40e_stats i40e_gstrings_net_stats[] = { 31 I40E_NETDEV_STAT(rx_packets), 32 I40E_NETDEV_STAT(tx_packets), 33 I40E_NETDEV_STAT(rx_bytes), 34 I40E_NETDEV_STAT(tx_bytes), 35 I40E_NETDEV_STAT(rx_errors), 36 I40E_NETDEV_STAT(tx_errors), 37 I40E_NETDEV_STAT(rx_dropped), 38 I40E_NETDEV_STAT(tx_dropped), 39 I40E_NETDEV_STAT(collisions), 40 I40E_NETDEV_STAT(rx_length_errors), 41 I40E_NETDEV_STAT(rx_crc_errors), 42 }; 43 44 static const struct i40e_stats i40e_gstrings_veb_stats[] = { 45 I40E_VEB_STAT("rx_bytes", stats.rx_bytes), 46 I40E_VEB_STAT("tx_bytes", stats.tx_bytes), 47 I40E_VEB_STAT("rx_unicast", stats.rx_unicast), 48 I40E_VEB_STAT("tx_unicast", stats.tx_unicast), 49 I40E_VEB_STAT("rx_multicast", stats.rx_multicast), 50 I40E_VEB_STAT("tx_multicast", stats.tx_multicast), 51 I40E_VEB_STAT("rx_broadcast", stats.rx_broadcast), 52 I40E_VEB_STAT("tx_broadcast", stats.tx_broadcast), 53 I40E_VEB_STAT("rx_discards", stats.rx_discards), 54 I40E_VEB_STAT("tx_discards", stats.tx_discards), 55 I40E_VEB_STAT("tx_errors", stats.tx_errors), 56 I40E_VEB_STAT("rx_unknown_protocol", stats.rx_unknown_protocol), 57 }; 58 59 static const struct i40e_stats i40e_gstrings_misc_stats[] = { 60 I40E_VSI_STAT("rx_unicast", eth_stats.rx_unicast), 61 I40E_VSI_STAT("tx_unicast", eth_stats.tx_unicast), 62 I40E_VSI_STAT("rx_multicast", eth_stats.rx_multicast), 63 I40E_VSI_STAT("tx_multicast", eth_stats.tx_multicast), 64 I40E_VSI_STAT("rx_broadcast", eth_stats.rx_broadcast), 65 I40E_VSI_STAT("tx_broadcast", eth_stats.tx_broadcast), 66 I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol), 67 I40E_VSI_STAT("tx_linearize", tx_linearize), 68 I40E_VSI_STAT("tx_force_wb", tx_force_wb), 69 I40E_VSI_STAT("tx_busy", tx_busy), 70 I40E_VSI_STAT("rx_alloc_fail", rx_buf_failed), 71 I40E_VSI_STAT("rx_pg_alloc_fail", rx_page_failed), 72 }; 73 74 /* These PF_STATs might look like duplicates of some NETDEV_STATs, 75 * but they are separate. This device supports Virtualization, and 76 * as such might have several netdevs supporting VMDq and FCoE going 77 * through a single port. The NETDEV_STATs are for individual netdevs 78 * seen at the top of the stack, and the PF_STATs are for the physical 79 * function at the bottom of the stack hosting those netdevs. 80 * 81 * The PF_STATs are appended to the netdev stats only when ethtool -S 82 * is queried on the base PF netdev, not on the VMDq or FCoE netdev. 83 */ 84 static const struct i40e_stats i40e_gstrings_stats[] = { 85 I40E_PF_STAT("rx_bytes", stats.eth.rx_bytes), 86 I40E_PF_STAT("tx_bytes", stats.eth.tx_bytes), 87 I40E_PF_STAT("rx_unicast", stats.eth.rx_unicast), 88 I40E_PF_STAT("tx_unicast", stats.eth.tx_unicast), 89 I40E_PF_STAT("rx_multicast", stats.eth.rx_multicast), 90 I40E_PF_STAT("tx_multicast", stats.eth.tx_multicast), 91 I40E_PF_STAT("rx_broadcast", stats.eth.rx_broadcast), 92 I40E_PF_STAT("tx_broadcast", stats.eth.tx_broadcast), 93 I40E_PF_STAT("tx_errors", stats.eth.tx_errors), 94 I40E_PF_STAT("rx_dropped", stats.eth.rx_discards), 95 I40E_PF_STAT("tx_dropped_link_down", stats.tx_dropped_link_down), 96 I40E_PF_STAT("rx_crc_errors", stats.crc_errors), 97 I40E_PF_STAT("illegal_bytes", stats.illegal_bytes), 98 I40E_PF_STAT("mac_local_faults", stats.mac_local_faults), 99 I40E_PF_STAT("mac_remote_faults", stats.mac_remote_faults), 100 I40E_PF_STAT("tx_timeout", tx_timeout_count), 101 I40E_PF_STAT("rx_csum_bad", hw_csum_rx_error), 102 I40E_PF_STAT("rx_length_errors", stats.rx_length_errors), 103 I40E_PF_STAT("link_xon_rx", stats.link_xon_rx), 104 I40E_PF_STAT("link_xoff_rx", stats.link_xoff_rx), 105 I40E_PF_STAT("link_xon_tx", stats.link_xon_tx), 106 I40E_PF_STAT("link_xoff_tx", stats.link_xoff_tx), 107 I40E_PF_STAT("rx_size_64", stats.rx_size_64), 108 I40E_PF_STAT("rx_size_127", stats.rx_size_127), 109 I40E_PF_STAT("rx_size_255", stats.rx_size_255), 110 I40E_PF_STAT("rx_size_511", stats.rx_size_511), 111 I40E_PF_STAT("rx_size_1023", stats.rx_size_1023), 112 I40E_PF_STAT("rx_size_1522", stats.rx_size_1522), 113 I40E_PF_STAT("rx_size_big", stats.rx_size_big), 114 I40E_PF_STAT("tx_size_64", stats.tx_size_64), 115 I40E_PF_STAT("tx_size_127", stats.tx_size_127), 116 I40E_PF_STAT("tx_size_255", stats.tx_size_255), 117 I40E_PF_STAT("tx_size_511", stats.tx_size_511), 118 I40E_PF_STAT("tx_size_1023", stats.tx_size_1023), 119 I40E_PF_STAT("tx_size_1522", stats.tx_size_1522), 120 I40E_PF_STAT("tx_size_big", stats.tx_size_big), 121 I40E_PF_STAT("rx_undersize", stats.rx_undersize), 122 I40E_PF_STAT("rx_fragments", stats.rx_fragments), 123 I40E_PF_STAT("rx_oversize", stats.rx_oversize), 124 I40E_PF_STAT("rx_jabber", stats.rx_jabber), 125 I40E_PF_STAT("VF_admin_queue_requests", vf_aq_requests), 126 I40E_PF_STAT("arq_overflows", arq_overflows), 127 I40E_PF_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared), 128 I40E_PF_STAT("tx_hwtstamp_skipped", tx_hwtstamp_skipped), 129 I40E_PF_STAT("fdir_flush_cnt", fd_flush_cnt), 130 I40E_PF_STAT("fdir_atr_match", stats.fd_atr_match), 131 I40E_PF_STAT("fdir_atr_tunnel_match", stats.fd_atr_tunnel_match), 132 I40E_PF_STAT("fdir_atr_status", stats.fd_atr_status), 133 I40E_PF_STAT("fdir_sb_match", stats.fd_sb_match), 134 I40E_PF_STAT("fdir_sb_status", stats.fd_sb_status), 135 136 /* LPI stats */ 137 I40E_PF_STAT("tx_lpi_status", stats.tx_lpi_status), 138 I40E_PF_STAT("rx_lpi_status", stats.rx_lpi_status), 139 I40E_PF_STAT("tx_lpi_count", stats.tx_lpi_count), 140 I40E_PF_STAT("rx_lpi_count", stats.rx_lpi_count), 141 }; 142 143 #define I40E_QUEUE_STATS_LEN(n) \ 144 (((struct i40e_netdev_priv *)netdev_priv((n)))->vsi->num_queue_pairs \ 145 * 2 /* Tx and Rx together */ \ 146 * (sizeof(struct i40e_queue_stats) / sizeof(u64))) 147 #define I40E_GLOBAL_STATS_LEN ARRAY_SIZE(i40e_gstrings_stats) 148 #define I40E_NETDEV_STATS_LEN ARRAY_SIZE(i40e_gstrings_net_stats) 149 #define I40E_MISC_STATS_LEN ARRAY_SIZE(i40e_gstrings_misc_stats) 150 #define I40E_VSI_STATS_LEN(n) (I40E_NETDEV_STATS_LEN + \ 151 I40E_MISC_STATS_LEN + \ 152 I40E_QUEUE_STATS_LEN((n))) 153 #define I40E_PFC_STATS_LEN ( \ 154 (FIELD_SIZEOF(struct i40e_pf, stats.priority_xoff_rx) + \ 155 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_rx) + \ 156 FIELD_SIZEOF(struct i40e_pf, stats.priority_xoff_tx) + \ 157 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_tx) + \ 158 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_2_xoff)) \ 159 / sizeof(u64)) 160 #define I40E_VEB_TC_STATS_LEN ( \ 161 (FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_rx_packets) + \ 162 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_rx_bytes) + \ 163 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_tx_packets) + \ 164 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_tx_bytes)) \ 165 / sizeof(u64)) 166 #define I40E_VEB_STATS_LEN ARRAY_SIZE(i40e_gstrings_veb_stats) 167 #define I40E_VEB_STATS_TOTAL (I40E_VEB_STATS_LEN + I40E_VEB_TC_STATS_LEN) 168 #define I40E_PF_STATS_LEN(n) (I40E_GLOBAL_STATS_LEN + \ 169 I40E_PFC_STATS_LEN + \ 170 I40E_VSI_STATS_LEN((n))) 171 172 enum i40e_ethtool_test_id { 173 I40E_ETH_TEST_REG = 0, 174 I40E_ETH_TEST_EEPROM, 175 I40E_ETH_TEST_INTR, 176 I40E_ETH_TEST_LINK, 177 }; 178 179 static const char i40e_gstrings_test[][ETH_GSTRING_LEN] = { 180 "Register test (offline)", 181 "Eeprom test (offline)", 182 "Interrupt test (offline)", 183 "Link test (on/offline)" 184 }; 185 186 #define I40E_TEST_LEN (sizeof(i40e_gstrings_test) / ETH_GSTRING_LEN) 187 188 struct i40e_priv_flags { 189 char flag_string[ETH_GSTRING_LEN]; 190 u64 flag; 191 bool read_only; 192 }; 193 194 #define I40E_PRIV_FLAG(_name, _flag, _read_only) { \ 195 .flag_string = _name, \ 196 .flag = _flag, \ 197 .read_only = _read_only, \ 198 } 199 200 static const struct i40e_priv_flags i40e_gstrings_priv_flags[] = { 201 /* NOTE: MFP setting cannot be changed */ 202 I40E_PRIV_FLAG("MFP", I40E_FLAG_MFP_ENABLED, 1), 203 I40E_PRIV_FLAG("LinkPolling", I40E_FLAG_LINK_POLLING_ENABLED, 0), 204 I40E_PRIV_FLAG("flow-director-atr", I40E_FLAG_FD_ATR_ENABLED, 0), 205 I40E_PRIV_FLAG("veb-stats", I40E_FLAG_VEB_STATS_ENABLED, 0), 206 I40E_PRIV_FLAG("hw-atr-eviction", I40E_FLAG_HW_ATR_EVICT_ENABLED, 0), 207 I40E_PRIV_FLAG("link-down-on-close", 208 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED, 0), 209 I40E_PRIV_FLAG("legacy-rx", I40E_FLAG_LEGACY_RX, 0), 210 I40E_PRIV_FLAG("disable-source-pruning", 211 I40E_FLAG_SOURCE_PRUNING_DISABLED, 0), 212 I40E_PRIV_FLAG("disable-fw-lldp", I40E_FLAG_DISABLE_FW_LLDP, 0), 213 }; 214 215 #define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gstrings_priv_flags) 216 217 /* Private flags with a global effect, restricted to PF 0 */ 218 static const struct i40e_priv_flags i40e_gl_gstrings_priv_flags[] = { 219 I40E_PRIV_FLAG("vf-true-promisc-support", 220 I40E_FLAG_TRUE_PROMISC_SUPPORT, 0), 221 }; 222 223 #define I40E_GL_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gl_gstrings_priv_flags) 224 225 /** 226 * i40e_partition_setting_complaint - generic complaint for MFP restriction 227 * @pf: the PF struct 228 **/ 229 static void i40e_partition_setting_complaint(struct i40e_pf *pf) 230 { 231 dev_info(&pf->pdev->dev, 232 "The link settings are allowed to be changed only from the first partition of a given port. Please switch to the first partition in order to change the setting.\n"); 233 } 234 235 /** 236 * i40e_phy_type_to_ethtool - convert the phy_types to ethtool link modes 237 * @pf: PF struct with phy_types 238 * @ks: ethtool link ksettings struct to fill out 239 * 240 **/ 241 static void i40e_phy_type_to_ethtool(struct i40e_pf *pf, 242 struct ethtool_link_ksettings *ks) 243 { 244 struct i40e_link_status *hw_link_info = &pf->hw.phy.link_info; 245 u64 phy_types = pf->hw.phy.phy_types; 246 247 ethtool_link_ksettings_zero_link_mode(ks, supported); 248 ethtool_link_ksettings_zero_link_mode(ks, advertising); 249 250 if (phy_types & I40E_CAP_PHY_TYPE_SGMII) { 251 ethtool_link_ksettings_add_link_mode(ks, supported, 252 1000baseT_Full); 253 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 254 ethtool_link_ksettings_add_link_mode(ks, advertising, 255 1000baseT_Full); 256 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) { 257 ethtool_link_ksettings_add_link_mode(ks, supported, 258 100baseT_Full); 259 ethtool_link_ksettings_add_link_mode(ks, advertising, 260 100baseT_Full); 261 } 262 } 263 if (phy_types & I40E_CAP_PHY_TYPE_XAUI || 264 phy_types & I40E_CAP_PHY_TYPE_XFI || 265 phy_types & I40E_CAP_PHY_TYPE_SFI || 266 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SFPP_CU || 267 phy_types & I40E_CAP_PHY_TYPE_10GBASE_AOC) { 268 ethtool_link_ksettings_add_link_mode(ks, supported, 269 10000baseT_Full); 270 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 271 ethtool_link_ksettings_add_link_mode(ks, advertising, 272 10000baseT_Full); 273 } 274 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_T) { 275 ethtool_link_ksettings_add_link_mode(ks, supported, 276 10000baseT_Full); 277 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 278 ethtool_link_ksettings_add_link_mode(ks, advertising, 279 10000baseT_Full); 280 } 281 if (phy_types & I40E_CAP_PHY_TYPE_XLAUI || 282 phy_types & I40E_CAP_PHY_TYPE_XLPPI || 283 phy_types & I40E_CAP_PHY_TYPE_40GBASE_AOC) 284 ethtool_link_ksettings_add_link_mode(ks, supported, 285 40000baseCR4_Full); 286 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU || 287 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4) { 288 ethtool_link_ksettings_add_link_mode(ks, supported, 289 40000baseCR4_Full); 290 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_40GB) 291 ethtool_link_ksettings_add_link_mode(ks, advertising, 292 40000baseCR4_Full); 293 } 294 if (phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) { 295 ethtool_link_ksettings_add_link_mode(ks, supported, 296 100baseT_Full); 297 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 298 ethtool_link_ksettings_add_link_mode(ks, advertising, 299 100baseT_Full); 300 } 301 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_T) { 302 ethtool_link_ksettings_add_link_mode(ks, supported, 303 1000baseT_Full); 304 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 305 ethtool_link_ksettings_add_link_mode(ks, advertising, 306 1000baseT_Full); 307 } 308 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_SR4) 309 ethtool_link_ksettings_add_link_mode(ks, supported, 310 40000baseSR4_Full); 311 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_LR4) 312 ethtool_link_ksettings_add_link_mode(ks, supported, 313 40000baseLR4_Full); 314 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4) { 315 ethtool_link_ksettings_add_link_mode(ks, supported, 316 40000baseLR4_Full); 317 ethtool_link_ksettings_add_link_mode(ks, advertising, 318 40000baseLR4_Full); 319 } 320 if (phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2) { 321 ethtool_link_ksettings_add_link_mode(ks, supported, 322 20000baseKR2_Full); 323 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_20GB) 324 ethtool_link_ksettings_add_link_mode(ks, advertising, 325 20000baseKR2_Full); 326 } 327 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4) { 328 ethtool_link_ksettings_add_link_mode(ks, supported, 329 10000baseKX4_Full); 330 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 331 ethtool_link_ksettings_add_link_mode(ks, advertising, 332 10000baseKX4_Full); 333 } 334 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR && 335 !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) { 336 ethtool_link_ksettings_add_link_mode(ks, supported, 337 10000baseKR_Full); 338 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 339 ethtool_link_ksettings_add_link_mode(ks, advertising, 340 10000baseKR_Full); 341 } 342 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX && 343 !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) { 344 ethtool_link_ksettings_add_link_mode(ks, supported, 345 1000baseKX_Full); 346 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 347 ethtool_link_ksettings_add_link_mode(ks, advertising, 348 1000baseKX_Full); 349 } 350 /* need to add 25G PHY types */ 351 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR) { 352 ethtool_link_ksettings_add_link_mode(ks, supported, 353 25000baseKR_Full); 354 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 355 ethtool_link_ksettings_add_link_mode(ks, advertising, 356 25000baseKR_Full); 357 } 358 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR) { 359 ethtool_link_ksettings_add_link_mode(ks, supported, 360 25000baseCR_Full); 361 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 362 ethtool_link_ksettings_add_link_mode(ks, advertising, 363 25000baseCR_Full); 364 } 365 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 366 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR) { 367 ethtool_link_ksettings_add_link_mode(ks, supported, 368 25000baseSR_Full); 369 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 370 ethtool_link_ksettings_add_link_mode(ks, advertising, 371 25000baseSR_Full); 372 } 373 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_AOC || 374 phy_types & I40E_CAP_PHY_TYPE_25GBASE_ACC) { 375 ethtool_link_ksettings_add_link_mode(ks, supported, 376 25000baseCR_Full); 377 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 378 ethtool_link_ksettings_add_link_mode(ks, advertising, 379 25000baseCR_Full); 380 } 381 /* need to add new 10G PHY types */ 382 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 || 383 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU) { 384 ethtool_link_ksettings_add_link_mode(ks, supported, 385 10000baseCR_Full); 386 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 387 ethtool_link_ksettings_add_link_mode(ks, advertising, 388 10000baseCR_Full); 389 } 390 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR) { 391 ethtool_link_ksettings_add_link_mode(ks, supported, 392 10000baseSR_Full); 393 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 394 ethtool_link_ksettings_add_link_mode(ks, advertising, 395 10000baseSR_Full); 396 } 397 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR) { 398 ethtool_link_ksettings_add_link_mode(ks, supported, 399 10000baseLR_Full); 400 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 401 ethtool_link_ksettings_add_link_mode(ks, advertising, 402 10000baseLR_Full); 403 } 404 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX || 405 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX || 406 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL) { 407 ethtool_link_ksettings_add_link_mode(ks, supported, 408 1000baseX_Full); 409 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 410 ethtool_link_ksettings_add_link_mode(ks, advertising, 411 1000baseX_Full); 412 } 413 /* Autoneg PHY types */ 414 if (phy_types & I40E_CAP_PHY_TYPE_SGMII || 415 phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4 || 416 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU || 417 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4 || 418 phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 419 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR || 420 phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR || 421 phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR || 422 phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2 || 423 phy_types & I40E_CAP_PHY_TYPE_10GBASE_T || 424 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR || 425 phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR || 426 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4 || 427 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR || 428 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU || 429 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 || 430 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL || 431 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T || 432 phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX || 433 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX || 434 phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX || 435 phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) { 436 ethtool_link_ksettings_add_link_mode(ks, supported, 437 Autoneg); 438 ethtool_link_ksettings_add_link_mode(ks, advertising, 439 Autoneg); 440 } 441 } 442 443 /** 444 * i40e_get_settings_link_up - Get the Link settings for when link is up 445 * @hw: hw structure 446 * @ks: ethtool ksettings to fill in 447 * @netdev: network interface device structure 448 * @pf: pointer to physical function struct 449 **/ 450 static void i40e_get_settings_link_up(struct i40e_hw *hw, 451 struct ethtool_link_ksettings *ks, 452 struct net_device *netdev, 453 struct i40e_pf *pf) 454 { 455 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 456 struct ethtool_link_ksettings cap_ksettings; 457 u32 link_speed = hw_link_info->link_speed; 458 459 /* Initialize supported and advertised settings based on phy settings */ 460 switch (hw_link_info->phy_type) { 461 case I40E_PHY_TYPE_40GBASE_CR4: 462 case I40E_PHY_TYPE_40GBASE_CR4_CU: 463 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 464 ethtool_link_ksettings_add_link_mode(ks, supported, 465 40000baseCR4_Full); 466 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 467 ethtool_link_ksettings_add_link_mode(ks, advertising, 468 40000baseCR4_Full); 469 break; 470 case I40E_PHY_TYPE_XLAUI: 471 case I40E_PHY_TYPE_XLPPI: 472 case I40E_PHY_TYPE_40GBASE_AOC: 473 ethtool_link_ksettings_add_link_mode(ks, supported, 474 40000baseCR4_Full); 475 break; 476 case I40E_PHY_TYPE_40GBASE_SR4: 477 ethtool_link_ksettings_add_link_mode(ks, supported, 478 40000baseSR4_Full); 479 break; 480 case I40E_PHY_TYPE_40GBASE_LR4: 481 ethtool_link_ksettings_add_link_mode(ks, supported, 482 40000baseLR4_Full); 483 break; 484 case I40E_PHY_TYPE_25GBASE_SR: 485 case I40E_PHY_TYPE_25GBASE_LR: 486 case I40E_PHY_TYPE_10GBASE_SR: 487 case I40E_PHY_TYPE_10GBASE_LR: 488 case I40E_PHY_TYPE_1000BASE_SX: 489 case I40E_PHY_TYPE_1000BASE_LX: 490 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 491 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 492 ethtool_link_ksettings_add_link_mode(ks, supported, 493 25000baseSR_Full); 494 ethtool_link_ksettings_add_link_mode(ks, advertising, 495 25000baseSR_Full); 496 ethtool_link_ksettings_add_link_mode(ks, supported, 497 10000baseSR_Full); 498 ethtool_link_ksettings_add_link_mode(ks, advertising, 499 10000baseSR_Full); 500 ethtool_link_ksettings_add_link_mode(ks, supported, 501 10000baseLR_Full); 502 ethtool_link_ksettings_add_link_mode(ks, advertising, 503 10000baseLR_Full); 504 ethtool_link_ksettings_add_link_mode(ks, supported, 505 1000baseX_Full); 506 ethtool_link_ksettings_add_link_mode(ks, advertising, 507 1000baseX_Full); 508 ethtool_link_ksettings_add_link_mode(ks, supported, 509 10000baseT_Full); 510 if (hw_link_info->module_type[2] & 511 I40E_MODULE_TYPE_1000BASE_SX || 512 hw_link_info->module_type[2] & 513 I40E_MODULE_TYPE_1000BASE_LX) { 514 ethtool_link_ksettings_add_link_mode(ks, supported, 515 1000baseT_Full); 516 if (hw_link_info->requested_speeds & 517 I40E_LINK_SPEED_1GB) 518 ethtool_link_ksettings_add_link_mode( 519 ks, advertising, 1000baseT_Full); 520 } 521 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 522 ethtool_link_ksettings_add_link_mode(ks, advertising, 523 10000baseT_Full); 524 break; 525 case I40E_PHY_TYPE_10GBASE_T: 526 case I40E_PHY_TYPE_1000BASE_T: 527 case I40E_PHY_TYPE_100BASE_TX: 528 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 529 ethtool_link_ksettings_add_link_mode(ks, supported, 530 10000baseT_Full); 531 ethtool_link_ksettings_add_link_mode(ks, supported, 532 1000baseT_Full); 533 ethtool_link_ksettings_add_link_mode(ks, supported, 534 100baseT_Full); 535 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 536 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 537 ethtool_link_ksettings_add_link_mode(ks, advertising, 538 10000baseT_Full); 539 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 540 ethtool_link_ksettings_add_link_mode(ks, advertising, 541 1000baseT_Full); 542 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 543 ethtool_link_ksettings_add_link_mode(ks, advertising, 544 100baseT_Full); 545 break; 546 case I40E_PHY_TYPE_1000BASE_T_OPTICAL: 547 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 548 ethtool_link_ksettings_add_link_mode(ks, supported, 549 1000baseT_Full); 550 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 551 ethtool_link_ksettings_add_link_mode(ks, advertising, 552 1000baseT_Full); 553 break; 554 case I40E_PHY_TYPE_10GBASE_CR1_CU: 555 case I40E_PHY_TYPE_10GBASE_CR1: 556 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 557 ethtool_link_ksettings_add_link_mode(ks, supported, 558 10000baseT_Full); 559 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 560 ethtool_link_ksettings_add_link_mode(ks, advertising, 561 10000baseT_Full); 562 break; 563 case I40E_PHY_TYPE_XAUI: 564 case I40E_PHY_TYPE_XFI: 565 case I40E_PHY_TYPE_SFI: 566 case I40E_PHY_TYPE_10GBASE_SFPP_CU: 567 case I40E_PHY_TYPE_10GBASE_AOC: 568 ethtool_link_ksettings_add_link_mode(ks, supported, 569 10000baseT_Full); 570 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 571 ethtool_link_ksettings_add_link_mode(ks, advertising, 572 10000baseT_Full); 573 break; 574 case I40E_PHY_TYPE_SGMII: 575 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 576 ethtool_link_ksettings_add_link_mode(ks, supported, 577 1000baseT_Full); 578 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 579 ethtool_link_ksettings_add_link_mode(ks, advertising, 580 1000baseT_Full); 581 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) { 582 ethtool_link_ksettings_add_link_mode(ks, supported, 583 100baseT_Full); 584 if (hw_link_info->requested_speeds & 585 I40E_LINK_SPEED_100MB) 586 ethtool_link_ksettings_add_link_mode( 587 ks, advertising, 100baseT_Full); 588 } 589 break; 590 case I40E_PHY_TYPE_40GBASE_KR4: 591 case I40E_PHY_TYPE_25GBASE_KR: 592 case I40E_PHY_TYPE_20GBASE_KR2: 593 case I40E_PHY_TYPE_10GBASE_KR: 594 case I40E_PHY_TYPE_10GBASE_KX4: 595 case I40E_PHY_TYPE_1000BASE_KX: 596 ethtool_link_ksettings_add_link_mode(ks, supported, 597 40000baseKR4_Full); 598 ethtool_link_ksettings_add_link_mode(ks, supported, 599 25000baseKR_Full); 600 ethtool_link_ksettings_add_link_mode(ks, supported, 601 20000baseKR2_Full); 602 ethtool_link_ksettings_add_link_mode(ks, supported, 603 10000baseKR_Full); 604 ethtool_link_ksettings_add_link_mode(ks, supported, 605 10000baseKX4_Full); 606 ethtool_link_ksettings_add_link_mode(ks, supported, 607 1000baseKX_Full); 608 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 609 ethtool_link_ksettings_add_link_mode(ks, advertising, 610 40000baseKR4_Full); 611 ethtool_link_ksettings_add_link_mode(ks, advertising, 612 25000baseKR_Full); 613 ethtool_link_ksettings_add_link_mode(ks, advertising, 614 20000baseKR2_Full); 615 ethtool_link_ksettings_add_link_mode(ks, advertising, 616 10000baseKR_Full); 617 ethtool_link_ksettings_add_link_mode(ks, advertising, 618 10000baseKX4_Full); 619 ethtool_link_ksettings_add_link_mode(ks, advertising, 620 1000baseKX_Full); 621 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 622 break; 623 case I40E_PHY_TYPE_25GBASE_CR: 624 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 625 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 626 ethtool_link_ksettings_add_link_mode(ks, supported, 627 25000baseCR_Full); 628 ethtool_link_ksettings_add_link_mode(ks, advertising, 629 25000baseCR_Full); 630 break; 631 case I40E_PHY_TYPE_25GBASE_AOC: 632 case I40E_PHY_TYPE_25GBASE_ACC: 633 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 634 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 635 ethtool_link_ksettings_add_link_mode(ks, supported, 636 25000baseCR_Full); 637 638 ethtool_link_ksettings_add_link_mode(ks, advertising, 639 25000baseCR_Full); 640 ethtool_link_ksettings_add_link_mode(ks, supported, 641 10000baseCR_Full); 642 ethtool_link_ksettings_add_link_mode(ks, advertising, 643 10000baseCR_Full); 644 break; 645 default: 646 /* if we got here and link is up something bad is afoot */ 647 netdev_info(netdev, 648 "WARNING: Link is up but PHY type 0x%x is not recognized.\n", 649 hw_link_info->phy_type); 650 } 651 652 /* Now that we've worked out everything that could be supported by the 653 * current PHY type, get what is supported by the NVM and intersect 654 * them to get what is truly supported 655 */ 656 memset(&cap_ksettings, 0, sizeof(struct ethtool_link_ksettings)); 657 i40e_phy_type_to_ethtool(pf, &cap_ksettings); 658 ethtool_intersect_link_masks(ks, &cap_ksettings); 659 660 /* Set speed and duplex */ 661 switch (link_speed) { 662 case I40E_LINK_SPEED_40GB: 663 ks->base.speed = SPEED_40000; 664 break; 665 case I40E_LINK_SPEED_25GB: 666 ks->base.speed = SPEED_25000; 667 break; 668 case I40E_LINK_SPEED_20GB: 669 ks->base.speed = SPEED_20000; 670 break; 671 case I40E_LINK_SPEED_10GB: 672 ks->base.speed = SPEED_10000; 673 break; 674 case I40E_LINK_SPEED_1GB: 675 ks->base.speed = SPEED_1000; 676 break; 677 case I40E_LINK_SPEED_100MB: 678 ks->base.speed = SPEED_100; 679 break; 680 default: 681 break; 682 } 683 ks->base.duplex = DUPLEX_FULL; 684 } 685 686 /** 687 * i40e_get_settings_link_down - Get the Link settings for when link is down 688 * @hw: hw structure 689 * @ks: ethtool ksettings to fill in 690 * @pf: pointer to physical function struct 691 * 692 * Reports link settings that can be determined when link is down 693 **/ 694 static void i40e_get_settings_link_down(struct i40e_hw *hw, 695 struct ethtool_link_ksettings *ks, 696 struct i40e_pf *pf) 697 { 698 /* link is down and the driver needs to fall back on 699 * supported phy types to figure out what info to display 700 */ 701 i40e_phy_type_to_ethtool(pf, ks); 702 703 /* With no link speed and duplex are unknown */ 704 ks->base.speed = SPEED_UNKNOWN; 705 ks->base.duplex = DUPLEX_UNKNOWN; 706 } 707 708 /** 709 * i40e_get_link_ksettings - Get Link Speed and Duplex settings 710 * @netdev: network interface device structure 711 * @ks: ethtool ksettings 712 * 713 * Reports speed/duplex settings based on media_type 714 **/ 715 static int i40e_get_link_ksettings(struct net_device *netdev, 716 struct ethtool_link_ksettings *ks) 717 { 718 struct i40e_netdev_priv *np = netdev_priv(netdev); 719 struct i40e_pf *pf = np->vsi->back; 720 struct i40e_hw *hw = &pf->hw; 721 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 722 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 723 724 ethtool_link_ksettings_zero_link_mode(ks, supported); 725 ethtool_link_ksettings_zero_link_mode(ks, advertising); 726 727 if (link_up) 728 i40e_get_settings_link_up(hw, ks, netdev, pf); 729 else 730 i40e_get_settings_link_down(hw, ks, pf); 731 732 /* Now set the settings that don't rely on link being up/down */ 733 /* Set autoneg settings */ 734 ks->base.autoneg = ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 735 AUTONEG_ENABLE : AUTONEG_DISABLE); 736 737 /* Set media type settings */ 738 switch (hw->phy.media_type) { 739 case I40E_MEDIA_TYPE_BACKPLANE: 740 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 741 ethtool_link_ksettings_add_link_mode(ks, supported, Backplane); 742 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 743 ethtool_link_ksettings_add_link_mode(ks, advertising, 744 Backplane); 745 ks->base.port = PORT_NONE; 746 break; 747 case I40E_MEDIA_TYPE_BASET: 748 ethtool_link_ksettings_add_link_mode(ks, supported, TP); 749 ethtool_link_ksettings_add_link_mode(ks, advertising, TP); 750 ks->base.port = PORT_TP; 751 break; 752 case I40E_MEDIA_TYPE_DA: 753 case I40E_MEDIA_TYPE_CX4: 754 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE); 755 ethtool_link_ksettings_add_link_mode(ks, advertising, FIBRE); 756 ks->base.port = PORT_DA; 757 break; 758 case I40E_MEDIA_TYPE_FIBER: 759 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE); 760 ks->base.port = PORT_FIBRE; 761 break; 762 case I40E_MEDIA_TYPE_UNKNOWN: 763 default: 764 ks->base.port = PORT_OTHER; 765 break; 766 } 767 768 /* Set flow control settings */ 769 ethtool_link_ksettings_add_link_mode(ks, supported, Pause); 770 771 switch (hw->fc.requested_mode) { 772 case I40E_FC_FULL: 773 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause); 774 break; 775 case I40E_FC_TX_PAUSE: 776 ethtool_link_ksettings_add_link_mode(ks, advertising, 777 Asym_Pause); 778 break; 779 case I40E_FC_RX_PAUSE: 780 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause); 781 ethtool_link_ksettings_add_link_mode(ks, advertising, 782 Asym_Pause); 783 break; 784 default: 785 ethtool_link_ksettings_del_link_mode(ks, advertising, Pause); 786 ethtool_link_ksettings_del_link_mode(ks, advertising, 787 Asym_Pause); 788 break; 789 } 790 791 return 0; 792 } 793 794 /** 795 * i40e_set_link_ksettings - Set Speed and Duplex 796 * @netdev: network interface device structure 797 * @ks: ethtool ksettings 798 * 799 * Set speed/duplex per media_types advertised/forced 800 **/ 801 static int i40e_set_link_ksettings(struct net_device *netdev, 802 const struct ethtool_link_ksettings *ks) 803 { 804 struct i40e_netdev_priv *np = netdev_priv(netdev); 805 struct i40e_aq_get_phy_abilities_resp abilities; 806 struct ethtool_link_ksettings safe_ks; 807 struct ethtool_link_ksettings copy_ks; 808 struct i40e_aq_set_phy_config config; 809 struct i40e_pf *pf = np->vsi->back; 810 struct i40e_vsi *vsi = np->vsi; 811 struct i40e_hw *hw = &pf->hw; 812 bool autoneg_changed = false; 813 i40e_status status = 0; 814 int timeout = 50; 815 int err = 0; 816 u8 autoneg; 817 818 /* Changing port settings is not supported if this isn't the 819 * port's controlling PF 820 */ 821 if (hw->partition_id != 1) { 822 i40e_partition_setting_complaint(pf); 823 return -EOPNOTSUPP; 824 } 825 if (vsi != pf->vsi[pf->lan_vsi]) 826 return -EOPNOTSUPP; 827 if (hw->phy.media_type != I40E_MEDIA_TYPE_BASET && 828 hw->phy.media_type != I40E_MEDIA_TYPE_FIBER && 829 hw->phy.media_type != I40E_MEDIA_TYPE_BACKPLANE && 830 hw->phy.media_type != I40E_MEDIA_TYPE_DA && 831 hw->phy.link_info.link_info & I40E_AQ_LINK_UP) 832 return -EOPNOTSUPP; 833 if (hw->device_id == I40E_DEV_ID_KX_B || 834 hw->device_id == I40E_DEV_ID_KX_C || 835 hw->device_id == I40E_DEV_ID_20G_KR2 || 836 hw->device_id == I40E_DEV_ID_20G_KR2_A || 837 hw->device_id == I40E_DEV_ID_25G_B || 838 hw->device_id == I40E_DEV_ID_KX_X722) { 839 netdev_info(netdev, "Changing settings is not supported on backplane.\n"); 840 return -EOPNOTSUPP; 841 } 842 843 /* copy the ksettings to copy_ks to avoid modifying the origin */ 844 memcpy(©_ks, ks, sizeof(struct ethtool_link_ksettings)); 845 846 /* save autoneg out of ksettings */ 847 autoneg = copy_ks.base.autoneg; 848 849 /* get our own copy of the bits to check against */ 850 memset(&safe_ks, 0, sizeof(struct ethtool_link_ksettings)); 851 safe_ks.base.cmd = copy_ks.base.cmd; 852 safe_ks.base.link_mode_masks_nwords = 853 copy_ks.base.link_mode_masks_nwords; 854 i40e_get_link_ksettings(netdev, &safe_ks); 855 856 /* Get link modes supported by hardware and check against modes 857 * requested by the user. Return an error if unsupported mode was set. 858 */ 859 if (!bitmap_subset(copy_ks.link_modes.advertising, 860 safe_ks.link_modes.supported, 861 __ETHTOOL_LINK_MODE_MASK_NBITS)) 862 return -EINVAL; 863 864 /* set autoneg back to what it currently is */ 865 copy_ks.base.autoneg = safe_ks.base.autoneg; 866 867 /* If copy_ks.base and safe_ks.base are not the same now, then they are 868 * trying to set something that we do not support. 869 */ 870 if (memcmp(©_ks.base, &safe_ks.base, 871 sizeof(struct ethtool_link_settings))) 872 return -EOPNOTSUPP; 873 874 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) { 875 timeout--; 876 if (!timeout) 877 return -EBUSY; 878 usleep_range(1000, 2000); 879 } 880 881 /* Get the current phy config */ 882 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, 883 NULL); 884 if (status) { 885 err = -EAGAIN; 886 goto done; 887 } 888 889 /* Copy abilities to config in case autoneg is not 890 * set below 891 */ 892 memset(&config, 0, sizeof(struct i40e_aq_set_phy_config)); 893 config.abilities = abilities.abilities; 894 895 /* Check autoneg */ 896 if (autoneg == AUTONEG_ENABLE) { 897 /* If autoneg was not already enabled */ 898 if (!(hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED)) { 899 /* If autoneg is not supported, return error */ 900 if (!ethtool_link_ksettings_test_link_mode(&safe_ks, 901 supported, 902 Autoneg)) { 903 netdev_info(netdev, "Autoneg not supported on this phy\n"); 904 err = -EINVAL; 905 goto done; 906 } 907 /* Autoneg is allowed to change */ 908 config.abilities = abilities.abilities | 909 I40E_AQ_PHY_ENABLE_AN; 910 autoneg_changed = true; 911 } 912 } else { 913 /* If autoneg is currently enabled */ 914 if (hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED) { 915 /* If autoneg is supported 10GBASE_T is the only PHY 916 * that can disable it, so otherwise return error 917 */ 918 if (ethtool_link_ksettings_test_link_mode(&safe_ks, 919 supported, 920 Autoneg) && 921 hw->phy.link_info.phy_type != 922 I40E_PHY_TYPE_10GBASE_T) { 923 netdev_info(netdev, "Autoneg cannot be disabled on this phy\n"); 924 err = -EINVAL; 925 goto done; 926 } 927 /* Autoneg is allowed to change */ 928 config.abilities = abilities.abilities & 929 ~I40E_AQ_PHY_ENABLE_AN; 930 autoneg_changed = true; 931 } 932 } 933 934 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 935 100baseT_Full)) 936 config.link_speed |= I40E_LINK_SPEED_100MB; 937 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 938 1000baseT_Full) || 939 ethtool_link_ksettings_test_link_mode(ks, advertising, 940 1000baseX_Full) || 941 ethtool_link_ksettings_test_link_mode(ks, advertising, 942 1000baseKX_Full)) 943 config.link_speed |= I40E_LINK_SPEED_1GB; 944 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 945 10000baseT_Full) || 946 ethtool_link_ksettings_test_link_mode(ks, advertising, 947 10000baseKX4_Full) || 948 ethtool_link_ksettings_test_link_mode(ks, advertising, 949 10000baseKR_Full) || 950 ethtool_link_ksettings_test_link_mode(ks, advertising, 951 10000baseCR_Full) || 952 ethtool_link_ksettings_test_link_mode(ks, advertising, 953 10000baseSR_Full) || 954 ethtool_link_ksettings_test_link_mode(ks, advertising, 955 10000baseLR_Full)) 956 config.link_speed |= I40E_LINK_SPEED_10GB; 957 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 958 20000baseKR2_Full)) 959 config.link_speed |= I40E_LINK_SPEED_20GB; 960 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 961 25000baseCR_Full) || 962 ethtool_link_ksettings_test_link_mode(ks, advertising, 963 25000baseKR_Full) || 964 ethtool_link_ksettings_test_link_mode(ks, advertising, 965 25000baseSR_Full)) 966 config.link_speed |= I40E_LINK_SPEED_25GB; 967 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 968 40000baseKR4_Full) || 969 ethtool_link_ksettings_test_link_mode(ks, advertising, 970 40000baseCR4_Full) || 971 ethtool_link_ksettings_test_link_mode(ks, advertising, 972 40000baseSR4_Full) || 973 ethtool_link_ksettings_test_link_mode(ks, advertising, 974 40000baseLR4_Full)) 975 config.link_speed |= I40E_LINK_SPEED_40GB; 976 977 /* If speed didn't get set, set it to what it currently is. 978 * This is needed because if advertise is 0 (as it is when autoneg 979 * is disabled) then speed won't get set. 980 */ 981 if (!config.link_speed) 982 config.link_speed = abilities.link_speed; 983 if (autoneg_changed || abilities.link_speed != config.link_speed) { 984 /* copy over the rest of the abilities */ 985 config.phy_type = abilities.phy_type; 986 config.phy_type_ext = abilities.phy_type_ext; 987 config.eee_capability = abilities.eee_capability; 988 config.eeer = abilities.eeer_val; 989 config.low_power_ctrl = abilities.d3_lpan; 990 config.fec_config = abilities.fec_cfg_curr_mod_ext_info & 991 I40E_AQ_PHY_FEC_CONFIG_MASK; 992 993 /* save the requested speeds */ 994 hw->phy.link_info.requested_speeds = config.link_speed; 995 /* set link and auto negotiation so changes take effect */ 996 config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK; 997 /* If link is up put link down */ 998 if (hw->phy.link_info.link_info & I40E_AQ_LINK_UP) { 999 /* Tell the OS link is going down, the link will go 1000 * back up when fw says it is ready asynchronously 1001 */ 1002 i40e_print_link_message(vsi, false); 1003 netif_carrier_off(netdev); 1004 netif_tx_stop_all_queues(netdev); 1005 } 1006 1007 /* make the aq call */ 1008 status = i40e_aq_set_phy_config(hw, &config, NULL); 1009 if (status) { 1010 netdev_info(netdev, 1011 "Set phy config failed, err %s aq_err %s\n", 1012 i40e_stat_str(hw, status), 1013 i40e_aq_str(hw, hw->aq.asq_last_status)); 1014 err = -EAGAIN; 1015 goto done; 1016 } 1017 1018 status = i40e_update_link_info(hw); 1019 if (status) 1020 netdev_dbg(netdev, 1021 "Updating link info failed with err %s aq_err %s\n", 1022 i40e_stat_str(hw, status), 1023 i40e_aq_str(hw, hw->aq.asq_last_status)); 1024 1025 } else { 1026 netdev_info(netdev, "Nothing changed, exiting without setting anything.\n"); 1027 } 1028 1029 done: 1030 clear_bit(__I40E_CONFIG_BUSY, pf->state); 1031 1032 return err; 1033 } 1034 1035 static int i40e_nway_reset(struct net_device *netdev) 1036 { 1037 /* restart autonegotiation */ 1038 struct i40e_netdev_priv *np = netdev_priv(netdev); 1039 struct i40e_pf *pf = np->vsi->back; 1040 struct i40e_hw *hw = &pf->hw; 1041 bool link_up = hw->phy.link_info.link_info & I40E_AQ_LINK_UP; 1042 i40e_status ret = 0; 1043 1044 ret = i40e_aq_set_link_restart_an(hw, link_up, NULL); 1045 if (ret) { 1046 netdev_info(netdev, "link restart failed, err %s aq_err %s\n", 1047 i40e_stat_str(hw, ret), 1048 i40e_aq_str(hw, hw->aq.asq_last_status)); 1049 return -EIO; 1050 } 1051 1052 return 0; 1053 } 1054 1055 /** 1056 * i40e_get_pauseparam - Get Flow Control status 1057 * @netdev: netdevice structure 1058 * @pause: buffer to return pause parameters 1059 * 1060 * Return tx/rx-pause status 1061 **/ 1062 static void i40e_get_pauseparam(struct net_device *netdev, 1063 struct ethtool_pauseparam *pause) 1064 { 1065 struct i40e_netdev_priv *np = netdev_priv(netdev); 1066 struct i40e_pf *pf = np->vsi->back; 1067 struct i40e_hw *hw = &pf->hw; 1068 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 1069 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 1070 1071 pause->autoneg = 1072 ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 1073 AUTONEG_ENABLE : AUTONEG_DISABLE); 1074 1075 /* PFC enabled so report LFC as off */ 1076 if (dcbx_cfg->pfc.pfcenable) { 1077 pause->rx_pause = 0; 1078 pause->tx_pause = 0; 1079 return; 1080 } 1081 1082 if (hw->fc.current_mode == I40E_FC_RX_PAUSE) { 1083 pause->rx_pause = 1; 1084 } else if (hw->fc.current_mode == I40E_FC_TX_PAUSE) { 1085 pause->tx_pause = 1; 1086 } else if (hw->fc.current_mode == I40E_FC_FULL) { 1087 pause->rx_pause = 1; 1088 pause->tx_pause = 1; 1089 } 1090 } 1091 1092 /** 1093 * i40e_set_pauseparam - Set Flow Control parameter 1094 * @netdev: network interface device structure 1095 * @pause: return tx/rx flow control status 1096 **/ 1097 static int i40e_set_pauseparam(struct net_device *netdev, 1098 struct ethtool_pauseparam *pause) 1099 { 1100 struct i40e_netdev_priv *np = netdev_priv(netdev); 1101 struct i40e_pf *pf = np->vsi->back; 1102 struct i40e_vsi *vsi = np->vsi; 1103 struct i40e_hw *hw = &pf->hw; 1104 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 1105 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 1106 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 1107 i40e_status status; 1108 u8 aq_failures; 1109 int err = 0; 1110 1111 /* Changing the port's flow control is not supported if this isn't the 1112 * port's controlling PF 1113 */ 1114 if (hw->partition_id != 1) { 1115 i40e_partition_setting_complaint(pf); 1116 return -EOPNOTSUPP; 1117 } 1118 1119 if (vsi != pf->vsi[pf->lan_vsi]) 1120 return -EOPNOTSUPP; 1121 1122 if (pause->autoneg != ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 1123 AUTONEG_ENABLE : AUTONEG_DISABLE)) { 1124 netdev_info(netdev, "To change autoneg please use: ethtool -s <dev> autoneg <on|off>\n"); 1125 return -EOPNOTSUPP; 1126 } 1127 1128 /* If we have link and don't have autoneg */ 1129 if (!test_bit(__I40E_DOWN, pf->state) && 1130 !(hw_link_info->an_info & I40E_AQ_AN_COMPLETED)) { 1131 /* Send message that it might not necessarily work*/ 1132 netdev_info(netdev, "Autoneg did not complete so changing settings may not result in an actual change.\n"); 1133 } 1134 1135 if (dcbx_cfg->pfc.pfcenable) { 1136 netdev_info(netdev, 1137 "Priority flow control enabled. Cannot set link flow control.\n"); 1138 return -EOPNOTSUPP; 1139 } 1140 1141 if (pause->rx_pause && pause->tx_pause) 1142 hw->fc.requested_mode = I40E_FC_FULL; 1143 else if (pause->rx_pause && !pause->tx_pause) 1144 hw->fc.requested_mode = I40E_FC_RX_PAUSE; 1145 else if (!pause->rx_pause && pause->tx_pause) 1146 hw->fc.requested_mode = I40E_FC_TX_PAUSE; 1147 else if (!pause->rx_pause && !pause->tx_pause) 1148 hw->fc.requested_mode = I40E_FC_NONE; 1149 else 1150 return -EINVAL; 1151 1152 /* Tell the OS link is going down, the link will go back up when fw 1153 * says it is ready asynchronously 1154 */ 1155 i40e_print_link_message(vsi, false); 1156 netif_carrier_off(netdev); 1157 netif_tx_stop_all_queues(netdev); 1158 1159 /* Set the fc mode and only restart an if link is up*/ 1160 status = i40e_set_fc(hw, &aq_failures, link_up); 1161 1162 if (aq_failures & I40E_SET_FC_AQ_FAIL_GET) { 1163 netdev_info(netdev, "Set fc failed on the get_phy_capabilities call with err %s aq_err %s\n", 1164 i40e_stat_str(hw, status), 1165 i40e_aq_str(hw, hw->aq.asq_last_status)); 1166 err = -EAGAIN; 1167 } 1168 if (aq_failures & I40E_SET_FC_AQ_FAIL_SET) { 1169 netdev_info(netdev, "Set fc failed on the set_phy_config call with err %s aq_err %s\n", 1170 i40e_stat_str(hw, status), 1171 i40e_aq_str(hw, hw->aq.asq_last_status)); 1172 err = -EAGAIN; 1173 } 1174 if (aq_failures & I40E_SET_FC_AQ_FAIL_UPDATE) { 1175 netdev_info(netdev, "Set fc failed on the get_link_info call with err %s aq_err %s\n", 1176 i40e_stat_str(hw, status), 1177 i40e_aq_str(hw, hw->aq.asq_last_status)); 1178 err = -EAGAIN; 1179 } 1180 1181 if (!test_bit(__I40E_DOWN, pf->state)) { 1182 /* Give it a little more time to try to come back */ 1183 msleep(75); 1184 if (!test_bit(__I40E_DOWN, pf->state)) 1185 return i40e_nway_reset(netdev); 1186 } 1187 1188 return err; 1189 } 1190 1191 static u32 i40e_get_msglevel(struct net_device *netdev) 1192 { 1193 struct i40e_netdev_priv *np = netdev_priv(netdev); 1194 struct i40e_pf *pf = np->vsi->back; 1195 u32 debug_mask = pf->hw.debug_mask; 1196 1197 if (debug_mask) 1198 netdev_info(netdev, "i40e debug_mask: 0x%08X\n", debug_mask); 1199 1200 return pf->msg_enable; 1201 } 1202 1203 static void i40e_set_msglevel(struct net_device *netdev, u32 data) 1204 { 1205 struct i40e_netdev_priv *np = netdev_priv(netdev); 1206 struct i40e_pf *pf = np->vsi->back; 1207 1208 if (I40E_DEBUG_USER & data) 1209 pf->hw.debug_mask = data; 1210 else 1211 pf->msg_enable = data; 1212 } 1213 1214 static int i40e_get_regs_len(struct net_device *netdev) 1215 { 1216 int reg_count = 0; 1217 int i; 1218 1219 for (i = 0; i40e_reg_list[i].offset != 0; i++) 1220 reg_count += i40e_reg_list[i].elements; 1221 1222 return reg_count * sizeof(u32); 1223 } 1224 1225 static void i40e_get_regs(struct net_device *netdev, struct ethtool_regs *regs, 1226 void *p) 1227 { 1228 struct i40e_netdev_priv *np = netdev_priv(netdev); 1229 struct i40e_pf *pf = np->vsi->back; 1230 struct i40e_hw *hw = &pf->hw; 1231 u32 *reg_buf = p; 1232 unsigned int i, j, ri; 1233 u32 reg; 1234 1235 /* Tell ethtool which driver-version-specific regs output we have. 1236 * 1237 * At some point, if we have ethtool doing special formatting of 1238 * this data, it will rely on this version number to know how to 1239 * interpret things. Hence, this needs to be updated if/when the 1240 * diags register table is changed. 1241 */ 1242 regs->version = 1; 1243 1244 /* loop through the diags reg table for what to print */ 1245 ri = 0; 1246 for (i = 0; i40e_reg_list[i].offset != 0; i++) { 1247 for (j = 0; j < i40e_reg_list[i].elements; j++) { 1248 reg = i40e_reg_list[i].offset 1249 + (j * i40e_reg_list[i].stride); 1250 reg_buf[ri++] = rd32(hw, reg); 1251 } 1252 } 1253 1254 } 1255 1256 static int i40e_get_eeprom(struct net_device *netdev, 1257 struct ethtool_eeprom *eeprom, u8 *bytes) 1258 { 1259 struct i40e_netdev_priv *np = netdev_priv(netdev); 1260 struct i40e_hw *hw = &np->vsi->back->hw; 1261 struct i40e_pf *pf = np->vsi->back; 1262 int ret_val = 0, len, offset; 1263 u8 *eeprom_buff; 1264 u16 i, sectors; 1265 bool last; 1266 u32 magic; 1267 1268 #define I40E_NVM_SECTOR_SIZE 4096 1269 if (eeprom->len == 0) 1270 return -EINVAL; 1271 1272 /* check for NVMUpdate access method */ 1273 magic = hw->vendor_id | (hw->device_id << 16); 1274 if (eeprom->magic && eeprom->magic != magic) { 1275 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1276 int errno = 0; 1277 1278 /* make sure it is the right magic for NVMUpdate */ 1279 if ((eeprom->magic >> 16) != hw->device_id) 1280 errno = -EINVAL; 1281 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 1282 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 1283 errno = -EBUSY; 1284 else 1285 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1286 1287 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1288 dev_info(&pf->pdev->dev, 1289 "NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1290 ret_val, hw->aq.asq_last_status, errno, 1291 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1292 cmd->offset, cmd->data_size); 1293 1294 return errno; 1295 } 1296 1297 /* normal ethtool get_eeprom support */ 1298 eeprom->magic = hw->vendor_id | (hw->device_id << 16); 1299 1300 eeprom_buff = kzalloc(eeprom->len, GFP_KERNEL); 1301 if (!eeprom_buff) 1302 return -ENOMEM; 1303 1304 ret_val = i40e_acquire_nvm(hw, I40E_RESOURCE_READ); 1305 if (ret_val) { 1306 dev_info(&pf->pdev->dev, 1307 "Failed Acquiring NVM resource for read err=%d status=0x%x\n", 1308 ret_val, hw->aq.asq_last_status); 1309 goto free_buff; 1310 } 1311 1312 sectors = eeprom->len / I40E_NVM_SECTOR_SIZE; 1313 sectors += (eeprom->len % I40E_NVM_SECTOR_SIZE) ? 1 : 0; 1314 len = I40E_NVM_SECTOR_SIZE; 1315 last = false; 1316 for (i = 0; i < sectors; i++) { 1317 if (i == (sectors - 1)) { 1318 len = eeprom->len - (I40E_NVM_SECTOR_SIZE * i); 1319 last = true; 1320 } 1321 offset = eeprom->offset + (I40E_NVM_SECTOR_SIZE * i), 1322 ret_val = i40e_aq_read_nvm(hw, 0x0, offset, len, 1323 (u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i), 1324 last, NULL); 1325 if (ret_val && hw->aq.asq_last_status == I40E_AQ_RC_EPERM) { 1326 dev_info(&pf->pdev->dev, 1327 "read NVM failed, invalid offset 0x%x\n", 1328 offset); 1329 break; 1330 } else if (ret_val && 1331 hw->aq.asq_last_status == I40E_AQ_RC_EACCES) { 1332 dev_info(&pf->pdev->dev, 1333 "read NVM failed, access, offset 0x%x\n", 1334 offset); 1335 break; 1336 } else if (ret_val) { 1337 dev_info(&pf->pdev->dev, 1338 "read NVM failed offset %d err=%d status=0x%x\n", 1339 offset, ret_val, hw->aq.asq_last_status); 1340 break; 1341 } 1342 } 1343 1344 i40e_release_nvm(hw); 1345 memcpy(bytes, (u8 *)eeprom_buff, eeprom->len); 1346 free_buff: 1347 kfree(eeprom_buff); 1348 return ret_val; 1349 } 1350 1351 static int i40e_get_eeprom_len(struct net_device *netdev) 1352 { 1353 struct i40e_netdev_priv *np = netdev_priv(netdev); 1354 struct i40e_hw *hw = &np->vsi->back->hw; 1355 u32 val; 1356 1357 #define X722_EEPROM_SCOPE_LIMIT 0x5B9FFF 1358 if (hw->mac.type == I40E_MAC_X722) { 1359 val = X722_EEPROM_SCOPE_LIMIT + 1; 1360 return val; 1361 } 1362 val = (rd32(hw, I40E_GLPCI_LBARCTRL) 1363 & I40E_GLPCI_LBARCTRL_FL_SIZE_MASK) 1364 >> I40E_GLPCI_LBARCTRL_FL_SIZE_SHIFT; 1365 /* register returns value in power of 2, 64Kbyte chunks. */ 1366 val = (64 * 1024) * BIT(val); 1367 return val; 1368 } 1369 1370 static int i40e_set_eeprom(struct net_device *netdev, 1371 struct ethtool_eeprom *eeprom, u8 *bytes) 1372 { 1373 struct i40e_netdev_priv *np = netdev_priv(netdev); 1374 struct i40e_hw *hw = &np->vsi->back->hw; 1375 struct i40e_pf *pf = np->vsi->back; 1376 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1377 int ret_val = 0; 1378 int errno = 0; 1379 u32 magic; 1380 1381 /* normal ethtool set_eeprom is not supported */ 1382 magic = hw->vendor_id | (hw->device_id << 16); 1383 if (eeprom->magic == magic) 1384 errno = -EOPNOTSUPP; 1385 /* check for NVMUpdate access method */ 1386 else if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id) 1387 errno = -EINVAL; 1388 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 1389 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 1390 errno = -EBUSY; 1391 else 1392 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1393 1394 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1395 dev_info(&pf->pdev->dev, 1396 "NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1397 ret_val, hw->aq.asq_last_status, errno, 1398 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1399 cmd->offset, cmd->data_size); 1400 1401 return errno; 1402 } 1403 1404 static void i40e_get_drvinfo(struct net_device *netdev, 1405 struct ethtool_drvinfo *drvinfo) 1406 { 1407 struct i40e_netdev_priv *np = netdev_priv(netdev); 1408 struct i40e_vsi *vsi = np->vsi; 1409 struct i40e_pf *pf = vsi->back; 1410 1411 strlcpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver)); 1412 strlcpy(drvinfo->version, i40e_driver_version_str, 1413 sizeof(drvinfo->version)); 1414 strlcpy(drvinfo->fw_version, i40e_nvm_version_str(&pf->hw), 1415 sizeof(drvinfo->fw_version)); 1416 strlcpy(drvinfo->bus_info, pci_name(pf->pdev), 1417 sizeof(drvinfo->bus_info)); 1418 drvinfo->n_priv_flags = I40E_PRIV_FLAGS_STR_LEN; 1419 if (pf->hw.pf_id == 0) 1420 drvinfo->n_priv_flags += I40E_GL_PRIV_FLAGS_STR_LEN; 1421 } 1422 1423 static void i40e_get_ringparam(struct net_device *netdev, 1424 struct ethtool_ringparam *ring) 1425 { 1426 struct i40e_netdev_priv *np = netdev_priv(netdev); 1427 struct i40e_pf *pf = np->vsi->back; 1428 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 1429 1430 ring->rx_max_pending = I40E_MAX_NUM_DESCRIPTORS; 1431 ring->tx_max_pending = I40E_MAX_NUM_DESCRIPTORS; 1432 ring->rx_mini_max_pending = 0; 1433 ring->rx_jumbo_max_pending = 0; 1434 ring->rx_pending = vsi->rx_rings[0]->count; 1435 ring->tx_pending = vsi->tx_rings[0]->count; 1436 ring->rx_mini_pending = 0; 1437 ring->rx_jumbo_pending = 0; 1438 } 1439 1440 static bool i40e_active_tx_ring_index(struct i40e_vsi *vsi, u16 index) 1441 { 1442 if (i40e_enabled_xdp_vsi(vsi)) { 1443 return index < vsi->num_queue_pairs || 1444 (index >= vsi->alloc_queue_pairs && 1445 index < vsi->alloc_queue_pairs + vsi->num_queue_pairs); 1446 } 1447 1448 return index < vsi->num_queue_pairs; 1449 } 1450 1451 static int i40e_set_ringparam(struct net_device *netdev, 1452 struct ethtool_ringparam *ring) 1453 { 1454 struct i40e_ring *tx_rings = NULL, *rx_rings = NULL; 1455 struct i40e_netdev_priv *np = netdev_priv(netdev); 1456 struct i40e_hw *hw = &np->vsi->back->hw; 1457 struct i40e_vsi *vsi = np->vsi; 1458 struct i40e_pf *pf = vsi->back; 1459 u32 new_rx_count, new_tx_count; 1460 u16 tx_alloc_queue_pairs; 1461 int timeout = 50; 1462 int i, err = 0; 1463 1464 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) 1465 return -EINVAL; 1466 1467 if (ring->tx_pending > I40E_MAX_NUM_DESCRIPTORS || 1468 ring->tx_pending < I40E_MIN_NUM_DESCRIPTORS || 1469 ring->rx_pending > I40E_MAX_NUM_DESCRIPTORS || 1470 ring->rx_pending < I40E_MIN_NUM_DESCRIPTORS) { 1471 netdev_info(netdev, 1472 "Descriptors requested (Tx: %d / Rx: %d) out of range [%d-%d]\n", 1473 ring->tx_pending, ring->rx_pending, 1474 I40E_MIN_NUM_DESCRIPTORS, I40E_MAX_NUM_DESCRIPTORS); 1475 return -EINVAL; 1476 } 1477 1478 new_tx_count = ALIGN(ring->tx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 1479 new_rx_count = ALIGN(ring->rx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 1480 1481 /* if nothing to do return success */ 1482 if ((new_tx_count == vsi->tx_rings[0]->count) && 1483 (new_rx_count == vsi->rx_rings[0]->count)) 1484 return 0; 1485 1486 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) { 1487 timeout--; 1488 if (!timeout) 1489 return -EBUSY; 1490 usleep_range(1000, 2000); 1491 } 1492 1493 if (!netif_running(vsi->netdev)) { 1494 /* simple case - set for the next time the netdev is started */ 1495 for (i = 0; i < vsi->num_queue_pairs; i++) { 1496 vsi->tx_rings[i]->count = new_tx_count; 1497 vsi->rx_rings[i]->count = new_rx_count; 1498 if (i40e_enabled_xdp_vsi(vsi)) 1499 vsi->xdp_rings[i]->count = new_tx_count; 1500 } 1501 goto done; 1502 } 1503 1504 /* We can't just free everything and then setup again, 1505 * because the ISRs in MSI-X mode get passed pointers 1506 * to the Tx and Rx ring structs. 1507 */ 1508 1509 /* alloc updated Tx and XDP Tx resources */ 1510 tx_alloc_queue_pairs = vsi->alloc_queue_pairs * 1511 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1); 1512 if (new_tx_count != vsi->tx_rings[0]->count) { 1513 netdev_info(netdev, 1514 "Changing Tx descriptor count from %d to %d.\n", 1515 vsi->tx_rings[0]->count, new_tx_count); 1516 tx_rings = kcalloc(tx_alloc_queue_pairs, 1517 sizeof(struct i40e_ring), GFP_KERNEL); 1518 if (!tx_rings) { 1519 err = -ENOMEM; 1520 goto done; 1521 } 1522 1523 for (i = 0; i < tx_alloc_queue_pairs; i++) { 1524 if (!i40e_active_tx_ring_index(vsi, i)) 1525 continue; 1526 1527 tx_rings[i] = *vsi->tx_rings[i]; 1528 tx_rings[i].count = new_tx_count; 1529 /* the desc and bi pointers will be reallocated in the 1530 * setup call 1531 */ 1532 tx_rings[i].desc = NULL; 1533 tx_rings[i].rx_bi = NULL; 1534 err = i40e_setup_tx_descriptors(&tx_rings[i]); 1535 if (err) { 1536 while (i) { 1537 i--; 1538 if (!i40e_active_tx_ring_index(vsi, i)) 1539 continue; 1540 i40e_free_tx_resources(&tx_rings[i]); 1541 } 1542 kfree(tx_rings); 1543 tx_rings = NULL; 1544 1545 goto done; 1546 } 1547 } 1548 } 1549 1550 /* alloc updated Rx resources */ 1551 if (new_rx_count != vsi->rx_rings[0]->count) { 1552 netdev_info(netdev, 1553 "Changing Rx descriptor count from %d to %d\n", 1554 vsi->rx_rings[0]->count, new_rx_count); 1555 rx_rings = kcalloc(vsi->alloc_queue_pairs, 1556 sizeof(struct i40e_ring), GFP_KERNEL); 1557 if (!rx_rings) { 1558 err = -ENOMEM; 1559 goto free_tx; 1560 } 1561 1562 for (i = 0; i < vsi->num_queue_pairs; i++) { 1563 struct i40e_ring *ring; 1564 u16 unused; 1565 1566 /* clone ring and setup updated count */ 1567 rx_rings[i] = *vsi->rx_rings[i]; 1568 rx_rings[i].count = new_rx_count; 1569 /* the desc and bi pointers will be reallocated in the 1570 * setup call 1571 */ 1572 rx_rings[i].desc = NULL; 1573 rx_rings[i].rx_bi = NULL; 1574 /* Clear cloned XDP RX-queue info before setup call */ 1575 memset(&rx_rings[i].xdp_rxq, 0, sizeof(rx_rings[i].xdp_rxq)); 1576 /* this is to allow wr32 to have something to write to 1577 * during early allocation of Rx buffers 1578 */ 1579 rx_rings[i].tail = hw->hw_addr + I40E_PRTGEN_STATUS; 1580 err = i40e_setup_rx_descriptors(&rx_rings[i]); 1581 if (err) 1582 goto rx_unwind; 1583 1584 /* now allocate the Rx buffers to make sure the OS 1585 * has enough memory, any failure here means abort 1586 */ 1587 ring = &rx_rings[i]; 1588 unused = I40E_DESC_UNUSED(ring); 1589 err = i40e_alloc_rx_buffers(ring, unused); 1590 rx_unwind: 1591 if (err) { 1592 do { 1593 i40e_free_rx_resources(&rx_rings[i]); 1594 } while (i--); 1595 kfree(rx_rings); 1596 rx_rings = NULL; 1597 1598 goto free_tx; 1599 } 1600 } 1601 } 1602 1603 /* Bring interface down, copy in the new ring info, 1604 * then restore the interface 1605 */ 1606 i40e_down(vsi); 1607 1608 if (tx_rings) { 1609 for (i = 0; i < tx_alloc_queue_pairs; i++) { 1610 if (i40e_active_tx_ring_index(vsi, i)) { 1611 i40e_free_tx_resources(vsi->tx_rings[i]); 1612 *vsi->tx_rings[i] = tx_rings[i]; 1613 } 1614 } 1615 kfree(tx_rings); 1616 tx_rings = NULL; 1617 } 1618 1619 if (rx_rings) { 1620 for (i = 0; i < vsi->num_queue_pairs; i++) { 1621 i40e_free_rx_resources(vsi->rx_rings[i]); 1622 /* get the real tail offset */ 1623 rx_rings[i].tail = vsi->rx_rings[i]->tail; 1624 /* this is to fake out the allocation routine 1625 * into thinking it has to realloc everything 1626 * but the recycling logic will let us re-use 1627 * the buffers allocated above 1628 */ 1629 rx_rings[i].next_to_use = 0; 1630 rx_rings[i].next_to_clean = 0; 1631 rx_rings[i].next_to_alloc = 0; 1632 /* do a struct copy */ 1633 *vsi->rx_rings[i] = rx_rings[i]; 1634 } 1635 kfree(rx_rings); 1636 rx_rings = NULL; 1637 } 1638 1639 i40e_up(vsi); 1640 1641 free_tx: 1642 /* error cleanup if the Rx allocations failed after getting Tx */ 1643 if (tx_rings) { 1644 for (i = 0; i < tx_alloc_queue_pairs; i++) { 1645 if (i40e_active_tx_ring_index(vsi, i)) 1646 i40e_free_tx_resources(vsi->tx_rings[i]); 1647 } 1648 kfree(tx_rings); 1649 tx_rings = NULL; 1650 } 1651 1652 done: 1653 clear_bit(__I40E_CONFIG_BUSY, pf->state); 1654 1655 return err; 1656 } 1657 1658 static int i40e_get_stats_count(struct net_device *netdev) 1659 { 1660 struct i40e_netdev_priv *np = netdev_priv(netdev); 1661 struct i40e_vsi *vsi = np->vsi; 1662 struct i40e_pf *pf = vsi->back; 1663 1664 if (vsi == pf->vsi[pf->lan_vsi] && pf->hw.partition_id == 1) { 1665 if (pf->lan_veb != I40E_NO_VEB && 1666 pf->flags & I40E_FLAG_VEB_STATS_ENABLED) 1667 return I40E_PF_STATS_LEN(netdev) + I40E_VEB_STATS_TOTAL; 1668 else 1669 return I40E_PF_STATS_LEN(netdev); 1670 } else { 1671 return I40E_VSI_STATS_LEN(netdev); 1672 } 1673 } 1674 1675 static int i40e_get_sset_count(struct net_device *netdev, int sset) 1676 { 1677 struct i40e_netdev_priv *np = netdev_priv(netdev); 1678 struct i40e_vsi *vsi = np->vsi; 1679 struct i40e_pf *pf = vsi->back; 1680 1681 switch (sset) { 1682 case ETH_SS_TEST: 1683 return I40E_TEST_LEN; 1684 case ETH_SS_STATS: 1685 return i40e_get_stats_count(netdev); 1686 case ETH_SS_PRIV_FLAGS: 1687 return I40E_PRIV_FLAGS_STR_LEN + 1688 (pf->hw.pf_id == 0 ? I40E_GL_PRIV_FLAGS_STR_LEN : 0); 1689 default: 1690 return -EOPNOTSUPP; 1691 } 1692 } 1693 1694 static void i40e_get_ethtool_stats(struct net_device *netdev, 1695 struct ethtool_stats *stats, u64 *data) 1696 { 1697 struct i40e_netdev_priv *np = netdev_priv(netdev); 1698 struct i40e_ring *tx_ring, *rx_ring; 1699 struct i40e_vsi *vsi = np->vsi; 1700 struct i40e_pf *pf = vsi->back; 1701 unsigned int j; 1702 int i = 0; 1703 char *p; 1704 struct rtnl_link_stats64 *net_stats = i40e_get_vsi_stats_struct(vsi); 1705 unsigned int start; 1706 1707 i40e_update_stats(vsi); 1708 1709 for (j = 0; j < I40E_NETDEV_STATS_LEN; j++) { 1710 p = (char *)net_stats + i40e_gstrings_net_stats[j].stat_offset; 1711 data[i++] = (i40e_gstrings_net_stats[j].sizeof_stat == 1712 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1713 } 1714 for (j = 0; j < I40E_MISC_STATS_LEN; j++) { 1715 p = (char *)vsi + i40e_gstrings_misc_stats[j].stat_offset; 1716 data[i++] = (i40e_gstrings_misc_stats[j].sizeof_stat == 1717 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1718 } 1719 rcu_read_lock(); 1720 for (j = 0; j < vsi->num_queue_pairs; j++) { 1721 tx_ring = READ_ONCE(vsi->tx_rings[j]); 1722 1723 if (!tx_ring) 1724 continue; 1725 1726 /* process Tx ring statistics */ 1727 do { 1728 start = u64_stats_fetch_begin_irq(&tx_ring->syncp); 1729 data[i] = tx_ring->stats.packets; 1730 data[i + 1] = tx_ring->stats.bytes; 1731 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start)); 1732 i += 2; 1733 1734 /* Rx ring is the 2nd half of the queue pair */ 1735 rx_ring = &tx_ring[1]; 1736 do { 1737 start = u64_stats_fetch_begin_irq(&rx_ring->syncp); 1738 data[i] = rx_ring->stats.packets; 1739 data[i + 1] = rx_ring->stats.bytes; 1740 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start)); 1741 i += 2; 1742 } 1743 rcu_read_unlock(); 1744 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) 1745 return; 1746 1747 if ((pf->lan_veb != I40E_NO_VEB) && 1748 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) { 1749 struct i40e_veb *veb = pf->veb[pf->lan_veb]; 1750 1751 for (j = 0; j < I40E_VEB_STATS_LEN; j++) { 1752 p = (char *)veb; 1753 p += i40e_gstrings_veb_stats[j].stat_offset; 1754 data[i++] = (i40e_gstrings_veb_stats[j].sizeof_stat == 1755 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1756 } 1757 for (j = 0; j < I40E_MAX_TRAFFIC_CLASS; j++) { 1758 data[i++] = veb->tc_stats.tc_tx_packets[j]; 1759 data[i++] = veb->tc_stats.tc_tx_bytes[j]; 1760 data[i++] = veb->tc_stats.tc_rx_packets[j]; 1761 data[i++] = veb->tc_stats.tc_rx_bytes[j]; 1762 } 1763 } 1764 for (j = 0; j < I40E_GLOBAL_STATS_LEN; j++) { 1765 p = (char *)pf + i40e_gstrings_stats[j].stat_offset; 1766 data[i++] = (i40e_gstrings_stats[j].sizeof_stat == 1767 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1768 } 1769 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) { 1770 data[i++] = pf->stats.priority_xon_tx[j]; 1771 data[i++] = pf->stats.priority_xoff_tx[j]; 1772 } 1773 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) { 1774 data[i++] = pf->stats.priority_xon_rx[j]; 1775 data[i++] = pf->stats.priority_xoff_rx[j]; 1776 } 1777 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) 1778 data[i++] = pf->stats.priority_xon_2_xoff[j]; 1779 } 1780 1781 static void i40e_get_strings(struct net_device *netdev, u32 stringset, 1782 u8 *data) 1783 { 1784 struct i40e_netdev_priv *np = netdev_priv(netdev); 1785 struct i40e_vsi *vsi = np->vsi; 1786 struct i40e_pf *pf = vsi->back; 1787 char *p = (char *)data; 1788 unsigned int i; 1789 1790 switch (stringset) { 1791 case ETH_SS_TEST: 1792 memcpy(data, i40e_gstrings_test, 1793 I40E_TEST_LEN * ETH_GSTRING_LEN); 1794 break; 1795 case ETH_SS_STATS: 1796 for (i = 0; i < I40E_NETDEV_STATS_LEN; i++) { 1797 snprintf(p, ETH_GSTRING_LEN, "%s", 1798 i40e_gstrings_net_stats[i].stat_string); 1799 p += ETH_GSTRING_LEN; 1800 } 1801 for (i = 0; i < I40E_MISC_STATS_LEN; i++) { 1802 snprintf(p, ETH_GSTRING_LEN, "%s", 1803 i40e_gstrings_misc_stats[i].stat_string); 1804 p += ETH_GSTRING_LEN; 1805 } 1806 for (i = 0; i < vsi->num_queue_pairs; i++) { 1807 snprintf(p, ETH_GSTRING_LEN, "tx-%d.tx_packets", i); 1808 p += ETH_GSTRING_LEN; 1809 snprintf(p, ETH_GSTRING_LEN, "tx-%d.tx_bytes", i); 1810 p += ETH_GSTRING_LEN; 1811 snprintf(p, ETH_GSTRING_LEN, "rx-%d.rx_packets", i); 1812 p += ETH_GSTRING_LEN; 1813 snprintf(p, ETH_GSTRING_LEN, "rx-%d.rx_bytes", i); 1814 p += ETH_GSTRING_LEN; 1815 } 1816 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) 1817 return; 1818 1819 if ((pf->lan_veb != I40E_NO_VEB) && 1820 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) { 1821 for (i = 0; i < I40E_VEB_STATS_LEN; i++) { 1822 snprintf(p, ETH_GSTRING_LEN, "veb.%s", 1823 i40e_gstrings_veb_stats[i].stat_string); 1824 p += ETH_GSTRING_LEN; 1825 } 1826 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 1827 snprintf(p, ETH_GSTRING_LEN, 1828 "veb.tc_%d_tx_packets", i); 1829 p += ETH_GSTRING_LEN; 1830 snprintf(p, ETH_GSTRING_LEN, 1831 "veb.tc_%d_tx_bytes", i); 1832 p += ETH_GSTRING_LEN; 1833 snprintf(p, ETH_GSTRING_LEN, 1834 "veb.tc_%d_rx_packets", i); 1835 p += ETH_GSTRING_LEN; 1836 snprintf(p, ETH_GSTRING_LEN, 1837 "veb.tc_%d_rx_bytes", i); 1838 p += ETH_GSTRING_LEN; 1839 } 1840 } 1841 for (i = 0; i < I40E_GLOBAL_STATS_LEN; i++) { 1842 snprintf(p, ETH_GSTRING_LEN, "port.%s", 1843 i40e_gstrings_stats[i].stat_string); 1844 p += ETH_GSTRING_LEN; 1845 } 1846 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 1847 snprintf(p, ETH_GSTRING_LEN, 1848 "port.tx_priority_%d_xon", i); 1849 p += ETH_GSTRING_LEN; 1850 snprintf(p, ETH_GSTRING_LEN, 1851 "port.tx_priority_%d_xoff", i); 1852 p += ETH_GSTRING_LEN; 1853 } 1854 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 1855 snprintf(p, ETH_GSTRING_LEN, 1856 "port.rx_priority_%d_xon", i); 1857 p += ETH_GSTRING_LEN; 1858 snprintf(p, ETH_GSTRING_LEN, 1859 "port.rx_priority_%d_xoff", i); 1860 p += ETH_GSTRING_LEN; 1861 } 1862 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 1863 snprintf(p, ETH_GSTRING_LEN, 1864 "port.rx_priority_%d_xon_2_xoff", i); 1865 p += ETH_GSTRING_LEN; 1866 } 1867 /* BUG_ON(p - data != I40E_STATS_LEN * ETH_GSTRING_LEN); */ 1868 break; 1869 case ETH_SS_PRIV_FLAGS: 1870 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 1871 snprintf(p, ETH_GSTRING_LEN, "%s", 1872 i40e_gstrings_priv_flags[i].flag_string); 1873 p += ETH_GSTRING_LEN; 1874 } 1875 if (pf->hw.pf_id != 0) 1876 break; 1877 for (i = 0; i < I40E_GL_PRIV_FLAGS_STR_LEN; i++) { 1878 snprintf(p, ETH_GSTRING_LEN, "%s", 1879 i40e_gl_gstrings_priv_flags[i].flag_string); 1880 p += ETH_GSTRING_LEN; 1881 } 1882 break; 1883 default: 1884 break; 1885 } 1886 } 1887 1888 static int i40e_get_ts_info(struct net_device *dev, 1889 struct ethtool_ts_info *info) 1890 { 1891 struct i40e_pf *pf = i40e_netdev_to_pf(dev); 1892 1893 /* only report HW timestamping if PTP is enabled */ 1894 if (!(pf->flags & I40E_FLAG_PTP)) 1895 return ethtool_op_get_ts_info(dev, info); 1896 1897 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 1898 SOF_TIMESTAMPING_RX_SOFTWARE | 1899 SOF_TIMESTAMPING_SOFTWARE | 1900 SOF_TIMESTAMPING_TX_HARDWARE | 1901 SOF_TIMESTAMPING_RX_HARDWARE | 1902 SOF_TIMESTAMPING_RAW_HARDWARE; 1903 1904 if (pf->ptp_clock) 1905 info->phc_index = ptp_clock_index(pf->ptp_clock); 1906 else 1907 info->phc_index = -1; 1908 1909 info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON); 1910 1911 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) | 1912 BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) | 1913 BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) | 1914 BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ); 1915 1916 if (pf->hw_features & I40E_HW_PTP_L4_CAPABLE) 1917 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | 1918 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | 1919 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) | 1920 BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) | 1921 BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) | 1922 BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) | 1923 BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) | 1924 BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ); 1925 1926 return 0; 1927 } 1928 1929 static int i40e_link_test(struct net_device *netdev, u64 *data) 1930 { 1931 struct i40e_netdev_priv *np = netdev_priv(netdev); 1932 struct i40e_pf *pf = np->vsi->back; 1933 i40e_status status; 1934 bool link_up = false; 1935 1936 netif_info(pf, hw, netdev, "link test\n"); 1937 status = i40e_get_link_status(&pf->hw, &link_up); 1938 if (status) { 1939 netif_err(pf, drv, netdev, "link query timed out, please retry test\n"); 1940 *data = 1; 1941 return *data; 1942 } 1943 1944 if (link_up) 1945 *data = 0; 1946 else 1947 *data = 1; 1948 1949 return *data; 1950 } 1951 1952 static int i40e_reg_test(struct net_device *netdev, u64 *data) 1953 { 1954 struct i40e_netdev_priv *np = netdev_priv(netdev); 1955 struct i40e_pf *pf = np->vsi->back; 1956 1957 netif_info(pf, hw, netdev, "register test\n"); 1958 *data = i40e_diag_reg_test(&pf->hw); 1959 1960 return *data; 1961 } 1962 1963 static int i40e_eeprom_test(struct net_device *netdev, u64 *data) 1964 { 1965 struct i40e_netdev_priv *np = netdev_priv(netdev); 1966 struct i40e_pf *pf = np->vsi->back; 1967 1968 netif_info(pf, hw, netdev, "eeprom test\n"); 1969 *data = i40e_diag_eeprom_test(&pf->hw); 1970 1971 /* forcebly clear the NVM Update state machine */ 1972 pf->hw.nvmupd_state = I40E_NVMUPD_STATE_INIT; 1973 1974 return *data; 1975 } 1976 1977 static int i40e_intr_test(struct net_device *netdev, u64 *data) 1978 { 1979 struct i40e_netdev_priv *np = netdev_priv(netdev); 1980 struct i40e_pf *pf = np->vsi->back; 1981 u16 swc_old = pf->sw_int_count; 1982 1983 netif_info(pf, hw, netdev, "interrupt test\n"); 1984 wr32(&pf->hw, I40E_PFINT_DYN_CTL0, 1985 (I40E_PFINT_DYN_CTL0_INTENA_MASK | 1986 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK | 1987 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK | 1988 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK | 1989 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK)); 1990 usleep_range(1000, 2000); 1991 *data = (swc_old == pf->sw_int_count); 1992 1993 return *data; 1994 } 1995 1996 static inline bool i40e_active_vfs(struct i40e_pf *pf) 1997 { 1998 struct i40e_vf *vfs = pf->vf; 1999 int i; 2000 2001 for (i = 0; i < pf->num_alloc_vfs; i++) 2002 if (test_bit(I40E_VF_STATE_ACTIVE, &vfs[i].vf_states)) 2003 return true; 2004 return false; 2005 } 2006 2007 static inline bool i40e_active_vmdqs(struct i40e_pf *pf) 2008 { 2009 return !!i40e_find_vsi_by_type(pf, I40E_VSI_VMDQ2); 2010 } 2011 2012 static void i40e_diag_test(struct net_device *netdev, 2013 struct ethtool_test *eth_test, u64 *data) 2014 { 2015 struct i40e_netdev_priv *np = netdev_priv(netdev); 2016 bool if_running = netif_running(netdev); 2017 struct i40e_pf *pf = np->vsi->back; 2018 2019 if (eth_test->flags == ETH_TEST_FL_OFFLINE) { 2020 /* Offline tests */ 2021 netif_info(pf, drv, netdev, "offline testing starting\n"); 2022 2023 set_bit(__I40E_TESTING, pf->state); 2024 2025 if (i40e_active_vfs(pf) || i40e_active_vmdqs(pf)) { 2026 dev_warn(&pf->pdev->dev, 2027 "Please take active VFs and Netqueues offline and restart the adapter before running NIC diagnostics\n"); 2028 data[I40E_ETH_TEST_REG] = 1; 2029 data[I40E_ETH_TEST_EEPROM] = 1; 2030 data[I40E_ETH_TEST_INTR] = 1; 2031 data[I40E_ETH_TEST_LINK] = 1; 2032 eth_test->flags |= ETH_TEST_FL_FAILED; 2033 clear_bit(__I40E_TESTING, pf->state); 2034 goto skip_ol_tests; 2035 } 2036 2037 /* If the device is online then take it offline */ 2038 if (if_running) 2039 /* indicate we're in test mode */ 2040 i40e_close(netdev); 2041 else 2042 /* This reset does not affect link - if it is 2043 * changed to a type of reset that does affect 2044 * link then the following link test would have 2045 * to be moved to before the reset 2046 */ 2047 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 2048 2049 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 2050 eth_test->flags |= ETH_TEST_FL_FAILED; 2051 2052 if (i40e_eeprom_test(netdev, &data[I40E_ETH_TEST_EEPROM])) 2053 eth_test->flags |= ETH_TEST_FL_FAILED; 2054 2055 if (i40e_intr_test(netdev, &data[I40E_ETH_TEST_INTR])) 2056 eth_test->flags |= ETH_TEST_FL_FAILED; 2057 2058 /* run reg test last, a reset is required after it */ 2059 if (i40e_reg_test(netdev, &data[I40E_ETH_TEST_REG])) 2060 eth_test->flags |= ETH_TEST_FL_FAILED; 2061 2062 clear_bit(__I40E_TESTING, pf->state); 2063 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 2064 2065 if (if_running) 2066 i40e_open(netdev); 2067 } else { 2068 /* Online tests */ 2069 netif_info(pf, drv, netdev, "online testing starting\n"); 2070 2071 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 2072 eth_test->flags |= ETH_TEST_FL_FAILED; 2073 2074 /* Offline only tests, not run in online; pass by default */ 2075 data[I40E_ETH_TEST_REG] = 0; 2076 data[I40E_ETH_TEST_EEPROM] = 0; 2077 data[I40E_ETH_TEST_INTR] = 0; 2078 } 2079 2080 skip_ol_tests: 2081 2082 netif_info(pf, drv, netdev, "testing finished\n"); 2083 } 2084 2085 static void i40e_get_wol(struct net_device *netdev, 2086 struct ethtool_wolinfo *wol) 2087 { 2088 struct i40e_netdev_priv *np = netdev_priv(netdev); 2089 struct i40e_pf *pf = np->vsi->back; 2090 struct i40e_hw *hw = &pf->hw; 2091 u16 wol_nvm_bits; 2092 2093 /* NVM bit on means WoL disabled for the port */ 2094 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 2095 if ((BIT(hw->port) & wol_nvm_bits) || (hw->partition_id != 1)) { 2096 wol->supported = 0; 2097 wol->wolopts = 0; 2098 } else { 2099 wol->supported = WAKE_MAGIC; 2100 wol->wolopts = (pf->wol_en ? WAKE_MAGIC : 0); 2101 } 2102 } 2103 2104 /** 2105 * i40e_set_wol - set the WakeOnLAN configuration 2106 * @netdev: the netdev in question 2107 * @wol: the ethtool WoL setting data 2108 **/ 2109 static int i40e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) 2110 { 2111 struct i40e_netdev_priv *np = netdev_priv(netdev); 2112 struct i40e_pf *pf = np->vsi->back; 2113 struct i40e_vsi *vsi = np->vsi; 2114 struct i40e_hw *hw = &pf->hw; 2115 u16 wol_nvm_bits; 2116 2117 /* WoL not supported if this isn't the controlling PF on the port */ 2118 if (hw->partition_id != 1) { 2119 i40e_partition_setting_complaint(pf); 2120 return -EOPNOTSUPP; 2121 } 2122 2123 if (vsi != pf->vsi[pf->lan_vsi]) 2124 return -EOPNOTSUPP; 2125 2126 /* NVM bit on means WoL disabled for the port */ 2127 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 2128 if (BIT(hw->port) & wol_nvm_bits) 2129 return -EOPNOTSUPP; 2130 2131 /* only magic packet is supported */ 2132 if (wol->wolopts && (wol->wolopts != WAKE_MAGIC)) 2133 return -EOPNOTSUPP; 2134 2135 /* is this a new value? */ 2136 if (pf->wol_en != !!wol->wolopts) { 2137 pf->wol_en = !!wol->wolopts; 2138 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en); 2139 } 2140 2141 return 0; 2142 } 2143 2144 static int i40e_set_phys_id(struct net_device *netdev, 2145 enum ethtool_phys_id_state state) 2146 { 2147 struct i40e_netdev_priv *np = netdev_priv(netdev); 2148 i40e_status ret = 0; 2149 struct i40e_pf *pf = np->vsi->back; 2150 struct i40e_hw *hw = &pf->hw; 2151 int blink_freq = 2; 2152 u16 temp_status; 2153 2154 switch (state) { 2155 case ETHTOOL_ID_ACTIVE: 2156 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) { 2157 pf->led_status = i40e_led_get(hw); 2158 } else { 2159 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) 2160 i40e_aq_set_phy_debug(hw, I40E_PHY_DEBUG_ALL, 2161 NULL); 2162 ret = i40e_led_get_phy(hw, &temp_status, 2163 &pf->phy_led_val); 2164 pf->led_status = temp_status; 2165 } 2166 return blink_freq; 2167 case ETHTOOL_ID_ON: 2168 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) 2169 i40e_led_set(hw, 0xf, false); 2170 else 2171 ret = i40e_led_set_phy(hw, true, pf->led_status, 0); 2172 break; 2173 case ETHTOOL_ID_OFF: 2174 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) 2175 i40e_led_set(hw, 0x0, false); 2176 else 2177 ret = i40e_led_set_phy(hw, false, pf->led_status, 0); 2178 break; 2179 case ETHTOOL_ID_INACTIVE: 2180 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) { 2181 i40e_led_set(hw, pf->led_status, false); 2182 } else { 2183 ret = i40e_led_set_phy(hw, false, pf->led_status, 2184 (pf->phy_led_val | 2185 I40E_PHY_LED_MODE_ORIG)); 2186 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) 2187 i40e_aq_set_phy_debug(hw, 0, NULL); 2188 } 2189 break; 2190 default: 2191 break; 2192 } 2193 if (ret) 2194 return -ENOENT; 2195 else 2196 return 0; 2197 } 2198 2199 /* NOTE: i40e hardware uses a conversion factor of 2 for Interrupt 2200 * Throttle Rate (ITR) ie. ITR(1) = 2us ITR(10) = 20 us, and also 2201 * 125us (8000 interrupts per second) == ITR(62) 2202 */ 2203 2204 /** 2205 * __i40e_get_coalesce - get per-queue coalesce settings 2206 * @netdev: the netdev to check 2207 * @ec: ethtool coalesce data structure 2208 * @queue: which queue to pick 2209 * 2210 * Gets the per-queue settings for coalescence. Specifically Rx and Tx usecs 2211 * are per queue. If queue is <0 then we default to queue 0 as the 2212 * representative value. 2213 **/ 2214 static int __i40e_get_coalesce(struct net_device *netdev, 2215 struct ethtool_coalesce *ec, 2216 int queue) 2217 { 2218 struct i40e_netdev_priv *np = netdev_priv(netdev); 2219 struct i40e_ring *rx_ring, *tx_ring; 2220 struct i40e_vsi *vsi = np->vsi; 2221 2222 ec->tx_max_coalesced_frames_irq = vsi->work_limit; 2223 ec->rx_max_coalesced_frames_irq = vsi->work_limit; 2224 2225 /* rx and tx usecs has per queue value. If user doesn't specify the 2226 * queue, return queue 0's value to represent. 2227 */ 2228 if (queue < 0) 2229 queue = 0; 2230 else if (queue >= vsi->num_queue_pairs) 2231 return -EINVAL; 2232 2233 rx_ring = vsi->rx_rings[queue]; 2234 tx_ring = vsi->tx_rings[queue]; 2235 2236 if (ITR_IS_DYNAMIC(rx_ring->itr_setting)) 2237 ec->use_adaptive_rx_coalesce = 1; 2238 2239 if (ITR_IS_DYNAMIC(tx_ring->itr_setting)) 2240 ec->use_adaptive_tx_coalesce = 1; 2241 2242 ec->rx_coalesce_usecs = rx_ring->itr_setting & ~I40E_ITR_DYNAMIC; 2243 ec->tx_coalesce_usecs = tx_ring->itr_setting & ~I40E_ITR_DYNAMIC; 2244 2245 /* we use the _usecs_high to store/set the interrupt rate limit 2246 * that the hardware supports, that almost but not quite 2247 * fits the original intent of the ethtool variable, 2248 * the rx_coalesce_usecs_high limits total interrupts 2249 * per second from both tx/rx sources. 2250 */ 2251 ec->rx_coalesce_usecs_high = vsi->int_rate_limit; 2252 ec->tx_coalesce_usecs_high = vsi->int_rate_limit; 2253 2254 return 0; 2255 } 2256 2257 /** 2258 * i40e_get_coalesce - get a netdev's coalesce settings 2259 * @netdev: the netdev to check 2260 * @ec: ethtool coalesce data structure 2261 * 2262 * Gets the coalesce settings for a particular netdev. Note that if user has 2263 * modified per-queue settings, this only guarantees to represent queue 0. See 2264 * __i40e_get_coalesce for more details. 2265 **/ 2266 static int i40e_get_coalesce(struct net_device *netdev, 2267 struct ethtool_coalesce *ec) 2268 { 2269 return __i40e_get_coalesce(netdev, ec, -1); 2270 } 2271 2272 /** 2273 * i40e_get_per_queue_coalesce - gets coalesce settings for particular queue 2274 * @netdev: netdev structure 2275 * @ec: ethtool's coalesce settings 2276 * @queue: the particular queue to read 2277 * 2278 * Will read a specific queue's coalesce settings 2279 **/ 2280 static int i40e_get_per_queue_coalesce(struct net_device *netdev, u32 queue, 2281 struct ethtool_coalesce *ec) 2282 { 2283 return __i40e_get_coalesce(netdev, ec, queue); 2284 } 2285 2286 /** 2287 * i40e_set_itr_per_queue - set ITR values for specific queue 2288 * @vsi: the VSI to set values for 2289 * @ec: coalesce settings from ethtool 2290 * @queue: the queue to modify 2291 * 2292 * Change the ITR settings for a specific queue. 2293 **/ 2294 static void i40e_set_itr_per_queue(struct i40e_vsi *vsi, 2295 struct ethtool_coalesce *ec, 2296 int queue) 2297 { 2298 struct i40e_ring *rx_ring = vsi->rx_rings[queue]; 2299 struct i40e_ring *tx_ring = vsi->tx_rings[queue]; 2300 struct i40e_pf *pf = vsi->back; 2301 struct i40e_hw *hw = &pf->hw; 2302 struct i40e_q_vector *q_vector; 2303 u16 intrl; 2304 2305 intrl = i40e_intrl_usec_to_reg(vsi->int_rate_limit); 2306 2307 rx_ring->itr_setting = ITR_REG_ALIGN(ec->rx_coalesce_usecs); 2308 tx_ring->itr_setting = ITR_REG_ALIGN(ec->tx_coalesce_usecs); 2309 2310 if (ec->use_adaptive_rx_coalesce) 2311 rx_ring->itr_setting |= I40E_ITR_DYNAMIC; 2312 else 2313 rx_ring->itr_setting &= ~I40E_ITR_DYNAMIC; 2314 2315 if (ec->use_adaptive_tx_coalesce) 2316 tx_ring->itr_setting |= I40E_ITR_DYNAMIC; 2317 else 2318 tx_ring->itr_setting &= ~I40E_ITR_DYNAMIC; 2319 2320 q_vector = rx_ring->q_vector; 2321 q_vector->rx.target_itr = ITR_TO_REG(rx_ring->itr_setting); 2322 2323 q_vector = tx_ring->q_vector; 2324 q_vector->tx.target_itr = ITR_TO_REG(tx_ring->itr_setting); 2325 2326 /* The interrupt handler itself will take care of programming 2327 * the Tx and Rx ITR values based on the values we have entered 2328 * into the q_vector, no need to write the values now. 2329 */ 2330 2331 wr32(hw, I40E_PFINT_RATEN(q_vector->reg_idx), intrl); 2332 i40e_flush(hw); 2333 } 2334 2335 /** 2336 * __i40e_set_coalesce - set coalesce settings for particular queue 2337 * @netdev: the netdev to change 2338 * @ec: ethtool coalesce settings 2339 * @queue: the queue to change 2340 * 2341 * Sets the coalesce settings for a particular queue. 2342 **/ 2343 static int __i40e_set_coalesce(struct net_device *netdev, 2344 struct ethtool_coalesce *ec, 2345 int queue) 2346 { 2347 struct i40e_netdev_priv *np = netdev_priv(netdev); 2348 u16 intrl_reg, cur_rx_itr, cur_tx_itr; 2349 struct i40e_vsi *vsi = np->vsi; 2350 struct i40e_pf *pf = vsi->back; 2351 int i; 2352 2353 if (ec->tx_max_coalesced_frames_irq || ec->rx_max_coalesced_frames_irq) 2354 vsi->work_limit = ec->tx_max_coalesced_frames_irq; 2355 2356 if (queue < 0) { 2357 cur_rx_itr = vsi->rx_rings[0]->itr_setting; 2358 cur_tx_itr = vsi->tx_rings[0]->itr_setting; 2359 } else if (queue < vsi->num_queue_pairs) { 2360 cur_rx_itr = vsi->rx_rings[queue]->itr_setting; 2361 cur_tx_itr = vsi->tx_rings[queue]->itr_setting; 2362 } else { 2363 netif_info(pf, drv, netdev, "Invalid queue value, queue range is 0 - %d\n", 2364 vsi->num_queue_pairs - 1); 2365 return -EINVAL; 2366 } 2367 2368 cur_tx_itr &= ~I40E_ITR_DYNAMIC; 2369 cur_rx_itr &= ~I40E_ITR_DYNAMIC; 2370 2371 /* tx_coalesce_usecs_high is ignored, use rx-usecs-high instead */ 2372 if (ec->tx_coalesce_usecs_high != vsi->int_rate_limit) { 2373 netif_info(pf, drv, netdev, "tx-usecs-high is not used, please program rx-usecs-high\n"); 2374 return -EINVAL; 2375 } 2376 2377 if (ec->rx_coalesce_usecs_high > INTRL_REG_TO_USEC(I40E_MAX_INTRL)) { 2378 netif_info(pf, drv, netdev, "Invalid value, rx-usecs-high range is 0-%lu\n", 2379 INTRL_REG_TO_USEC(I40E_MAX_INTRL)); 2380 return -EINVAL; 2381 } 2382 2383 if (ec->rx_coalesce_usecs != cur_rx_itr && 2384 ec->use_adaptive_rx_coalesce) { 2385 netif_info(pf, drv, netdev, "RX interrupt moderation cannot be changed if adaptive-rx is enabled.\n"); 2386 return -EINVAL; 2387 } 2388 2389 if (ec->rx_coalesce_usecs > I40E_MAX_ITR) { 2390 netif_info(pf, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n"); 2391 return -EINVAL; 2392 } 2393 2394 if (ec->tx_coalesce_usecs != cur_tx_itr && 2395 ec->use_adaptive_tx_coalesce) { 2396 netif_info(pf, drv, netdev, "TX interrupt moderation cannot be changed if adaptive-tx is enabled.\n"); 2397 return -EINVAL; 2398 } 2399 2400 if (ec->tx_coalesce_usecs > I40E_MAX_ITR) { 2401 netif_info(pf, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n"); 2402 return -EINVAL; 2403 } 2404 2405 if (ec->use_adaptive_rx_coalesce && !cur_rx_itr) 2406 ec->rx_coalesce_usecs = I40E_MIN_ITR; 2407 2408 if (ec->use_adaptive_tx_coalesce && !cur_tx_itr) 2409 ec->tx_coalesce_usecs = I40E_MIN_ITR; 2410 2411 intrl_reg = i40e_intrl_usec_to_reg(ec->rx_coalesce_usecs_high); 2412 vsi->int_rate_limit = INTRL_REG_TO_USEC(intrl_reg); 2413 if (vsi->int_rate_limit != ec->rx_coalesce_usecs_high) { 2414 netif_info(pf, drv, netdev, "Interrupt rate limit rounded down to %d\n", 2415 vsi->int_rate_limit); 2416 } 2417 2418 /* rx and tx usecs has per queue value. If user doesn't specify the 2419 * queue, apply to all queues. 2420 */ 2421 if (queue < 0) { 2422 for (i = 0; i < vsi->num_queue_pairs; i++) 2423 i40e_set_itr_per_queue(vsi, ec, i); 2424 } else { 2425 i40e_set_itr_per_queue(vsi, ec, queue); 2426 } 2427 2428 return 0; 2429 } 2430 2431 /** 2432 * i40e_set_coalesce - set coalesce settings for every queue on the netdev 2433 * @netdev: the netdev to change 2434 * @ec: ethtool coalesce settings 2435 * 2436 * This will set each queue to the same coalesce settings. 2437 **/ 2438 static int i40e_set_coalesce(struct net_device *netdev, 2439 struct ethtool_coalesce *ec) 2440 { 2441 return __i40e_set_coalesce(netdev, ec, -1); 2442 } 2443 2444 /** 2445 * i40e_set_per_queue_coalesce - set specific queue's coalesce settings 2446 * @netdev: the netdev to change 2447 * @ec: ethtool's coalesce settings 2448 * @queue: the queue to change 2449 * 2450 * Sets the specified queue's coalesce settings. 2451 **/ 2452 static int i40e_set_per_queue_coalesce(struct net_device *netdev, u32 queue, 2453 struct ethtool_coalesce *ec) 2454 { 2455 return __i40e_set_coalesce(netdev, ec, queue); 2456 } 2457 2458 /** 2459 * i40e_get_rss_hash_opts - Get RSS hash Input Set for each flow type 2460 * @pf: pointer to the physical function struct 2461 * @cmd: ethtool rxnfc command 2462 * 2463 * Returns Success if the flow is supported, else Invalid Input. 2464 **/ 2465 static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd) 2466 { 2467 struct i40e_hw *hw = &pf->hw; 2468 u8 flow_pctype = 0; 2469 u64 i_set = 0; 2470 2471 cmd->data = 0; 2472 2473 switch (cmd->flow_type) { 2474 case TCP_V4_FLOW: 2475 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2476 break; 2477 case UDP_V4_FLOW: 2478 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2479 break; 2480 case TCP_V6_FLOW: 2481 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 2482 break; 2483 case UDP_V6_FLOW: 2484 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 2485 break; 2486 case SCTP_V4_FLOW: 2487 case AH_ESP_V4_FLOW: 2488 case AH_V4_FLOW: 2489 case ESP_V4_FLOW: 2490 case IPV4_FLOW: 2491 case SCTP_V6_FLOW: 2492 case AH_ESP_V6_FLOW: 2493 case AH_V6_FLOW: 2494 case ESP_V6_FLOW: 2495 case IPV6_FLOW: 2496 /* Default is src/dest for IP, no matter the L4 hashing */ 2497 cmd->data |= RXH_IP_SRC | RXH_IP_DST; 2498 break; 2499 default: 2500 return -EINVAL; 2501 } 2502 2503 /* Read flow based hash input set register */ 2504 if (flow_pctype) { 2505 i_set = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, 2506 flow_pctype)) | 2507 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, 2508 flow_pctype)) << 32); 2509 } 2510 2511 /* Process bits of hash input set */ 2512 if (i_set) { 2513 if (i_set & I40E_L4_SRC_MASK) 2514 cmd->data |= RXH_L4_B_0_1; 2515 if (i_set & I40E_L4_DST_MASK) 2516 cmd->data |= RXH_L4_B_2_3; 2517 2518 if (cmd->flow_type == TCP_V4_FLOW || 2519 cmd->flow_type == UDP_V4_FLOW) { 2520 if (i_set & I40E_L3_SRC_MASK) 2521 cmd->data |= RXH_IP_SRC; 2522 if (i_set & I40E_L3_DST_MASK) 2523 cmd->data |= RXH_IP_DST; 2524 } else if (cmd->flow_type == TCP_V6_FLOW || 2525 cmd->flow_type == UDP_V6_FLOW) { 2526 if (i_set & I40E_L3_V6_SRC_MASK) 2527 cmd->data |= RXH_IP_SRC; 2528 if (i_set & I40E_L3_V6_DST_MASK) 2529 cmd->data |= RXH_IP_DST; 2530 } 2531 } 2532 2533 return 0; 2534 } 2535 2536 /** 2537 * i40e_check_mask - Check whether a mask field is set 2538 * @mask: the full mask value 2539 * @field: mask of the field to check 2540 * 2541 * If the given mask is fully set, return positive value. If the mask for the 2542 * field is fully unset, return zero. Otherwise return a negative error code. 2543 **/ 2544 static int i40e_check_mask(u64 mask, u64 field) 2545 { 2546 u64 value = mask & field; 2547 2548 if (value == field) 2549 return 1; 2550 else if (!value) 2551 return 0; 2552 else 2553 return -1; 2554 } 2555 2556 /** 2557 * i40e_parse_rx_flow_user_data - Deconstruct user-defined data 2558 * @fsp: pointer to rx flow specification 2559 * @data: pointer to userdef data structure for storage 2560 * 2561 * Read the user-defined data and deconstruct the value into a structure. No 2562 * other code should read the user-defined data, so as to ensure that every 2563 * place consistently reads the value correctly. 2564 * 2565 * The user-defined field is a 64bit Big Endian format value, which we 2566 * deconstruct by reading bits or bit fields from it. Single bit flags shall 2567 * be defined starting from the highest bits, while small bit field values 2568 * shall be defined starting from the lowest bits. 2569 * 2570 * Returns 0 if the data is valid, and non-zero if the userdef data is invalid 2571 * and the filter should be rejected. The data structure will always be 2572 * modified even if FLOW_EXT is not set. 2573 * 2574 **/ 2575 static int i40e_parse_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 2576 struct i40e_rx_flow_userdef *data) 2577 { 2578 u64 value, mask; 2579 int valid; 2580 2581 /* Zero memory first so it's always consistent. */ 2582 memset(data, 0, sizeof(*data)); 2583 2584 if (!(fsp->flow_type & FLOW_EXT)) 2585 return 0; 2586 2587 value = be64_to_cpu(*((__be64 *)fsp->h_ext.data)); 2588 mask = be64_to_cpu(*((__be64 *)fsp->m_ext.data)); 2589 2590 #define I40E_USERDEF_FLEX_WORD GENMASK_ULL(15, 0) 2591 #define I40E_USERDEF_FLEX_OFFSET GENMASK_ULL(31, 16) 2592 #define I40E_USERDEF_FLEX_FILTER GENMASK_ULL(31, 0) 2593 2594 valid = i40e_check_mask(mask, I40E_USERDEF_FLEX_FILTER); 2595 if (valid < 0) { 2596 return -EINVAL; 2597 } else if (valid) { 2598 data->flex_word = value & I40E_USERDEF_FLEX_WORD; 2599 data->flex_offset = 2600 (value & I40E_USERDEF_FLEX_OFFSET) >> 16; 2601 data->flex_filter = true; 2602 } 2603 2604 return 0; 2605 } 2606 2607 /** 2608 * i40e_fill_rx_flow_user_data - Fill in user-defined data field 2609 * @fsp: pointer to rx_flow specification 2610 * @data: pointer to return userdef data 2611 * 2612 * Reads the userdef data structure and properly fills in the user defined 2613 * fields of the rx_flow_spec. 2614 **/ 2615 static void i40e_fill_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 2616 struct i40e_rx_flow_userdef *data) 2617 { 2618 u64 value = 0, mask = 0; 2619 2620 if (data->flex_filter) { 2621 value |= data->flex_word; 2622 value |= (u64)data->flex_offset << 16; 2623 mask |= I40E_USERDEF_FLEX_FILTER; 2624 } 2625 2626 if (value || mask) 2627 fsp->flow_type |= FLOW_EXT; 2628 2629 *((__be64 *)fsp->h_ext.data) = cpu_to_be64(value); 2630 *((__be64 *)fsp->m_ext.data) = cpu_to_be64(mask); 2631 } 2632 2633 /** 2634 * i40e_get_ethtool_fdir_all - Populates the rule count of a command 2635 * @pf: Pointer to the physical function struct 2636 * @cmd: The command to get or set Rx flow classification rules 2637 * @rule_locs: Array of used rule locations 2638 * 2639 * This function populates both the total and actual rule count of 2640 * the ethtool flow classification command 2641 * 2642 * Returns 0 on success or -EMSGSIZE if entry not found 2643 **/ 2644 static int i40e_get_ethtool_fdir_all(struct i40e_pf *pf, 2645 struct ethtool_rxnfc *cmd, 2646 u32 *rule_locs) 2647 { 2648 struct i40e_fdir_filter *rule; 2649 struct hlist_node *node2; 2650 int cnt = 0; 2651 2652 /* report total rule count */ 2653 cmd->data = i40e_get_fd_cnt_all(pf); 2654 2655 hlist_for_each_entry_safe(rule, node2, 2656 &pf->fdir_filter_list, fdir_node) { 2657 if (cnt == cmd->rule_cnt) 2658 return -EMSGSIZE; 2659 2660 rule_locs[cnt] = rule->fd_id; 2661 cnt++; 2662 } 2663 2664 cmd->rule_cnt = cnt; 2665 2666 return 0; 2667 } 2668 2669 /** 2670 * i40e_get_ethtool_fdir_entry - Look up a filter based on Rx flow 2671 * @pf: Pointer to the physical function struct 2672 * @cmd: The command to get or set Rx flow classification rules 2673 * 2674 * This function looks up a filter based on the Rx flow classification 2675 * command and fills the flow spec info for it if found 2676 * 2677 * Returns 0 on success or -EINVAL if filter not found 2678 **/ 2679 static int i40e_get_ethtool_fdir_entry(struct i40e_pf *pf, 2680 struct ethtool_rxnfc *cmd) 2681 { 2682 struct ethtool_rx_flow_spec *fsp = 2683 (struct ethtool_rx_flow_spec *)&cmd->fs; 2684 struct i40e_rx_flow_userdef userdef = {0}; 2685 struct i40e_fdir_filter *rule = NULL; 2686 struct hlist_node *node2; 2687 u64 input_set; 2688 u16 index; 2689 2690 hlist_for_each_entry_safe(rule, node2, 2691 &pf->fdir_filter_list, fdir_node) { 2692 if (fsp->location <= rule->fd_id) 2693 break; 2694 } 2695 2696 if (!rule || fsp->location != rule->fd_id) 2697 return -EINVAL; 2698 2699 fsp->flow_type = rule->flow_type; 2700 if (fsp->flow_type == IP_USER_FLOW) { 2701 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4; 2702 fsp->h_u.usr_ip4_spec.proto = 0; 2703 fsp->m_u.usr_ip4_spec.proto = 0; 2704 } 2705 2706 /* Reverse the src and dest notion, since the HW views them from 2707 * Tx perspective where as the user expects it from Rx filter view. 2708 */ 2709 fsp->h_u.tcp_ip4_spec.psrc = rule->dst_port; 2710 fsp->h_u.tcp_ip4_spec.pdst = rule->src_port; 2711 fsp->h_u.tcp_ip4_spec.ip4src = rule->dst_ip; 2712 fsp->h_u.tcp_ip4_spec.ip4dst = rule->src_ip; 2713 2714 switch (rule->flow_type) { 2715 case SCTP_V4_FLOW: 2716 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 2717 break; 2718 case TCP_V4_FLOW: 2719 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2720 break; 2721 case UDP_V4_FLOW: 2722 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2723 break; 2724 case IP_USER_FLOW: 2725 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 2726 break; 2727 default: 2728 /* If we have stored a filter with a flow type not listed here 2729 * it is almost certainly a driver bug. WARN(), and then 2730 * assign the input_set as if all fields are enabled to avoid 2731 * reading unassigned memory. 2732 */ 2733 WARN(1, "Missing input set index for flow_type %d\n", 2734 rule->flow_type); 2735 input_set = 0xFFFFFFFFFFFFFFFFULL; 2736 goto no_input_set; 2737 } 2738 2739 input_set = i40e_read_fd_input_set(pf, index); 2740 2741 no_input_set: 2742 if (input_set & I40E_L3_SRC_MASK) 2743 fsp->m_u.tcp_ip4_spec.ip4src = htonl(0xFFFFFFFF); 2744 2745 if (input_set & I40E_L3_DST_MASK) 2746 fsp->m_u.tcp_ip4_spec.ip4dst = htonl(0xFFFFFFFF); 2747 2748 if (input_set & I40E_L4_SRC_MASK) 2749 fsp->m_u.tcp_ip4_spec.psrc = htons(0xFFFF); 2750 2751 if (input_set & I40E_L4_DST_MASK) 2752 fsp->m_u.tcp_ip4_spec.pdst = htons(0xFFFF); 2753 2754 if (rule->dest_ctl == I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET) 2755 fsp->ring_cookie = RX_CLS_FLOW_DISC; 2756 else 2757 fsp->ring_cookie = rule->q_index; 2758 2759 if (rule->dest_vsi != pf->vsi[pf->lan_vsi]->id) { 2760 struct i40e_vsi *vsi; 2761 2762 vsi = i40e_find_vsi_from_id(pf, rule->dest_vsi); 2763 if (vsi && vsi->type == I40E_VSI_SRIOV) { 2764 /* VFs are zero-indexed by the driver, but ethtool 2765 * expects them to be one-indexed, so add one here 2766 */ 2767 u64 ring_vf = vsi->vf_id + 1; 2768 2769 ring_vf <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF; 2770 fsp->ring_cookie |= ring_vf; 2771 } 2772 } 2773 2774 if (rule->flex_filter) { 2775 userdef.flex_filter = true; 2776 userdef.flex_word = be16_to_cpu(rule->flex_word); 2777 userdef.flex_offset = rule->flex_offset; 2778 } 2779 2780 i40e_fill_rx_flow_user_data(fsp, &userdef); 2781 2782 return 0; 2783 } 2784 2785 /** 2786 * i40e_get_rxnfc - command to get RX flow classification rules 2787 * @netdev: network interface device structure 2788 * @cmd: ethtool rxnfc command 2789 * @rule_locs: pointer to store rule data 2790 * 2791 * Returns Success if the command is supported. 2792 **/ 2793 static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd, 2794 u32 *rule_locs) 2795 { 2796 struct i40e_netdev_priv *np = netdev_priv(netdev); 2797 struct i40e_vsi *vsi = np->vsi; 2798 struct i40e_pf *pf = vsi->back; 2799 int ret = -EOPNOTSUPP; 2800 2801 switch (cmd->cmd) { 2802 case ETHTOOL_GRXRINGS: 2803 cmd->data = vsi->rss_size; 2804 ret = 0; 2805 break; 2806 case ETHTOOL_GRXFH: 2807 ret = i40e_get_rss_hash_opts(pf, cmd); 2808 break; 2809 case ETHTOOL_GRXCLSRLCNT: 2810 cmd->rule_cnt = pf->fdir_pf_active_filters; 2811 /* report total rule count */ 2812 cmd->data = i40e_get_fd_cnt_all(pf); 2813 ret = 0; 2814 break; 2815 case ETHTOOL_GRXCLSRULE: 2816 ret = i40e_get_ethtool_fdir_entry(pf, cmd); 2817 break; 2818 case ETHTOOL_GRXCLSRLALL: 2819 ret = i40e_get_ethtool_fdir_all(pf, cmd, rule_locs); 2820 break; 2821 default: 2822 break; 2823 } 2824 2825 return ret; 2826 } 2827 2828 /** 2829 * i40e_get_rss_hash_bits - Read RSS Hash bits from register 2830 * @nfc: pointer to user request 2831 * @i_setc: bits currently set 2832 * 2833 * Returns value of bits to be set per user request 2834 **/ 2835 static u64 i40e_get_rss_hash_bits(struct ethtool_rxnfc *nfc, u64 i_setc) 2836 { 2837 u64 i_set = i_setc; 2838 u64 src_l3 = 0, dst_l3 = 0; 2839 2840 if (nfc->data & RXH_L4_B_0_1) 2841 i_set |= I40E_L4_SRC_MASK; 2842 else 2843 i_set &= ~I40E_L4_SRC_MASK; 2844 if (nfc->data & RXH_L4_B_2_3) 2845 i_set |= I40E_L4_DST_MASK; 2846 else 2847 i_set &= ~I40E_L4_DST_MASK; 2848 2849 if (nfc->flow_type == TCP_V6_FLOW || nfc->flow_type == UDP_V6_FLOW) { 2850 src_l3 = I40E_L3_V6_SRC_MASK; 2851 dst_l3 = I40E_L3_V6_DST_MASK; 2852 } else if (nfc->flow_type == TCP_V4_FLOW || 2853 nfc->flow_type == UDP_V4_FLOW) { 2854 src_l3 = I40E_L3_SRC_MASK; 2855 dst_l3 = I40E_L3_DST_MASK; 2856 } else { 2857 /* Any other flow type are not supported here */ 2858 return i_set; 2859 } 2860 2861 if (nfc->data & RXH_IP_SRC) 2862 i_set |= src_l3; 2863 else 2864 i_set &= ~src_l3; 2865 if (nfc->data & RXH_IP_DST) 2866 i_set |= dst_l3; 2867 else 2868 i_set &= ~dst_l3; 2869 2870 return i_set; 2871 } 2872 2873 /** 2874 * i40e_set_rss_hash_opt - Enable/Disable flow types for RSS hash 2875 * @pf: pointer to the physical function struct 2876 * @nfc: ethtool rxnfc command 2877 * 2878 * Returns Success if the flow input set is supported. 2879 **/ 2880 static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc) 2881 { 2882 struct i40e_hw *hw = &pf->hw; 2883 u64 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) | 2884 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32); 2885 u8 flow_pctype = 0; 2886 u64 i_set, i_setc; 2887 2888 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 2889 dev_err(&pf->pdev->dev, 2890 "Change of RSS hash input set is not supported when MFP mode is enabled\n"); 2891 return -EOPNOTSUPP; 2892 } 2893 2894 /* RSS does not support anything other than hashing 2895 * to queues on src and dst IPs and ports 2896 */ 2897 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST | 2898 RXH_L4_B_0_1 | RXH_L4_B_2_3)) 2899 return -EINVAL; 2900 2901 switch (nfc->flow_type) { 2902 case TCP_V4_FLOW: 2903 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2904 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2905 hena |= 2906 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); 2907 break; 2908 case TCP_V6_FLOW: 2909 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 2910 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2911 hena |= 2912 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); 2913 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2914 hena |= 2915 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK); 2916 break; 2917 case UDP_V4_FLOW: 2918 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2919 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2920 hena |= 2921 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | 2922 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP); 2923 2924 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 2925 break; 2926 case UDP_V6_FLOW: 2927 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 2928 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2929 hena |= 2930 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | 2931 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP); 2932 2933 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 2934 break; 2935 case AH_ESP_V4_FLOW: 2936 case AH_V4_FLOW: 2937 case ESP_V4_FLOW: 2938 case SCTP_V4_FLOW: 2939 if ((nfc->data & RXH_L4_B_0_1) || 2940 (nfc->data & RXH_L4_B_2_3)) 2941 return -EINVAL; 2942 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER); 2943 break; 2944 case AH_ESP_V6_FLOW: 2945 case AH_V6_FLOW: 2946 case ESP_V6_FLOW: 2947 case SCTP_V6_FLOW: 2948 if ((nfc->data & RXH_L4_B_0_1) || 2949 (nfc->data & RXH_L4_B_2_3)) 2950 return -EINVAL; 2951 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER); 2952 break; 2953 case IPV4_FLOW: 2954 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | 2955 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 2956 break; 2957 case IPV6_FLOW: 2958 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | 2959 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 2960 break; 2961 default: 2962 return -EINVAL; 2963 } 2964 2965 if (flow_pctype) { 2966 i_setc = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, 2967 flow_pctype)) | 2968 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, 2969 flow_pctype)) << 32); 2970 i_set = i40e_get_rss_hash_bits(nfc, i_setc); 2971 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_pctype), 2972 (u32)i_set); 2973 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_pctype), 2974 (u32)(i_set >> 32)); 2975 hena |= BIT_ULL(flow_pctype); 2976 } 2977 2978 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena); 2979 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32)); 2980 i40e_flush(hw); 2981 2982 return 0; 2983 } 2984 2985 /** 2986 * i40e_update_ethtool_fdir_entry - Updates the fdir filter entry 2987 * @vsi: Pointer to the targeted VSI 2988 * @input: The filter to update or NULL to indicate deletion 2989 * @sw_idx: Software index to the filter 2990 * @cmd: The command to get or set Rx flow classification rules 2991 * 2992 * This function updates (or deletes) a Flow Director entry from 2993 * the hlist of the corresponding PF 2994 * 2995 * Returns 0 on success 2996 **/ 2997 static int i40e_update_ethtool_fdir_entry(struct i40e_vsi *vsi, 2998 struct i40e_fdir_filter *input, 2999 u16 sw_idx, 3000 struct ethtool_rxnfc *cmd) 3001 { 3002 struct i40e_fdir_filter *rule, *parent; 3003 struct i40e_pf *pf = vsi->back; 3004 struct hlist_node *node2; 3005 int err = -EINVAL; 3006 3007 parent = NULL; 3008 rule = NULL; 3009 3010 hlist_for_each_entry_safe(rule, node2, 3011 &pf->fdir_filter_list, fdir_node) { 3012 /* hash found, or no matching entry */ 3013 if (rule->fd_id >= sw_idx) 3014 break; 3015 parent = rule; 3016 } 3017 3018 /* if there is an old rule occupying our place remove it */ 3019 if (rule && (rule->fd_id == sw_idx)) { 3020 /* Remove this rule, since we're either deleting it, or 3021 * replacing it. 3022 */ 3023 err = i40e_add_del_fdir(vsi, rule, false); 3024 hlist_del(&rule->fdir_node); 3025 kfree(rule); 3026 pf->fdir_pf_active_filters--; 3027 } 3028 3029 /* If we weren't given an input, this is a delete, so just return the 3030 * error code indicating if there was an entry at the requested slot 3031 */ 3032 if (!input) 3033 return err; 3034 3035 /* Otherwise, install the new rule as requested */ 3036 INIT_HLIST_NODE(&input->fdir_node); 3037 3038 /* add filter to the list */ 3039 if (parent) 3040 hlist_add_behind(&input->fdir_node, &parent->fdir_node); 3041 else 3042 hlist_add_head(&input->fdir_node, 3043 &pf->fdir_filter_list); 3044 3045 /* update counts */ 3046 pf->fdir_pf_active_filters++; 3047 3048 return 0; 3049 } 3050 3051 /** 3052 * i40e_prune_flex_pit_list - Cleanup unused entries in FLX_PIT table 3053 * @pf: pointer to PF structure 3054 * 3055 * This function searches the list of filters and determines which FLX_PIT 3056 * entries are still required. It will prune any entries which are no longer 3057 * in use after the deletion. 3058 **/ 3059 static void i40e_prune_flex_pit_list(struct i40e_pf *pf) 3060 { 3061 struct i40e_flex_pit *entry, *tmp; 3062 struct i40e_fdir_filter *rule; 3063 3064 /* First, we'll check the l3 table */ 3065 list_for_each_entry_safe(entry, tmp, &pf->l3_flex_pit_list, list) { 3066 bool found = false; 3067 3068 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 3069 if (rule->flow_type != IP_USER_FLOW) 3070 continue; 3071 if (rule->flex_filter && 3072 rule->flex_offset == entry->src_offset) { 3073 found = true; 3074 break; 3075 } 3076 } 3077 3078 /* If we didn't find the filter, then we can prune this entry 3079 * from the list. 3080 */ 3081 if (!found) { 3082 list_del(&entry->list); 3083 kfree(entry); 3084 } 3085 } 3086 3087 /* Followed by the L4 table */ 3088 list_for_each_entry_safe(entry, tmp, &pf->l4_flex_pit_list, list) { 3089 bool found = false; 3090 3091 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 3092 /* Skip this filter if it's L3, since we already 3093 * checked those in the above loop 3094 */ 3095 if (rule->flow_type == IP_USER_FLOW) 3096 continue; 3097 if (rule->flex_filter && 3098 rule->flex_offset == entry->src_offset) { 3099 found = true; 3100 break; 3101 } 3102 } 3103 3104 /* If we didn't find the filter, then we can prune this entry 3105 * from the list. 3106 */ 3107 if (!found) { 3108 list_del(&entry->list); 3109 kfree(entry); 3110 } 3111 } 3112 } 3113 3114 /** 3115 * i40e_del_fdir_entry - Deletes a Flow Director filter entry 3116 * @vsi: Pointer to the targeted VSI 3117 * @cmd: The command to get or set Rx flow classification rules 3118 * 3119 * The function removes a Flow Director filter entry from the 3120 * hlist of the corresponding PF 3121 * 3122 * Returns 0 on success 3123 */ 3124 static int i40e_del_fdir_entry(struct i40e_vsi *vsi, 3125 struct ethtool_rxnfc *cmd) 3126 { 3127 struct ethtool_rx_flow_spec *fsp = 3128 (struct ethtool_rx_flow_spec *)&cmd->fs; 3129 struct i40e_pf *pf = vsi->back; 3130 int ret = 0; 3131 3132 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 3133 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 3134 return -EBUSY; 3135 3136 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 3137 return -EBUSY; 3138 3139 ret = i40e_update_ethtool_fdir_entry(vsi, NULL, fsp->location, cmd); 3140 3141 i40e_prune_flex_pit_list(pf); 3142 3143 i40e_fdir_check_and_reenable(pf); 3144 return ret; 3145 } 3146 3147 /** 3148 * i40e_unused_pit_index - Find an unused PIT index for given list 3149 * @pf: the PF data structure 3150 * 3151 * Find the first unused flexible PIT index entry. We search both the L3 and 3152 * L4 flexible PIT lists so that the returned index is unique and unused by 3153 * either currently programmed L3 or L4 filters. We use a bit field as storage 3154 * to track which indexes are already used. 3155 **/ 3156 static u8 i40e_unused_pit_index(struct i40e_pf *pf) 3157 { 3158 unsigned long available_index = 0xFF; 3159 struct i40e_flex_pit *entry; 3160 3161 /* We need to make sure that the new index isn't in use by either L3 3162 * or L4 filters so that IP_USER_FLOW filters can program both L3 and 3163 * L4 to use the same index. 3164 */ 3165 3166 list_for_each_entry(entry, &pf->l4_flex_pit_list, list) 3167 clear_bit(entry->pit_index, &available_index); 3168 3169 list_for_each_entry(entry, &pf->l3_flex_pit_list, list) 3170 clear_bit(entry->pit_index, &available_index); 3171 3172 return find_first_bit(&available_index, 8); 3173 } 3174 3175 /** 3176 * i40e_find_flex_offset - Find an existing flex src_offset 3177 * @flex_pit_list: L3 or L4 flex PIT list 3178 * @src_offset: new src_offset to find 3179 * 3180 * Searches the flex_pit_list for an existing offset. If no offset is 3181 * currently programmed, then this will return an ERR_PTR if there is no space 3182 * to add a new offset, otherwise it returns NULL. 3183 **/ 3184 static 3185 struct i40e_flex_pit *i40e_find_flex_offset(struct list_head *flex_pit_list, 3186 u16 src_offset) 3187 { 3188 struct i40e_flex_pit *entry; 3189 int size = 0; 3190 3191 /* Search for the src_offset first. If we find a matching entry 3192 * already programmed, we can simply re-use it. 3193 */ 3194 list_for_each_entry(entry, flex_pit_list, list) { 3195 size++; 3196 if (entry->src_offset == src_offset) 3197 return entry; 3198 } 3199 3200 /* If we haven't found an entry yet, then the provided src offset has 3201 * not yet been programmed. We will program the src offset later on, 3202 * but we need to indicate whether there is enough space to do so 3203 * here. We'll make use of ERR_PTR for this purpose. 3204 */ 3205 if (size >= I40E_FLEX_PIT_TABLE_SIZE) 3206 return ERR_PTR(-ENOSPC); 3207 3208 return NULL; 3209 } 3210 3211 /** 3212 * i40e_add_flex_offset - Add src_offset to flex PIT table list 3213 * @flex_pit_list: L3 or L4 flex PIT list 3214 * @src_offset: new src_offset to add 3215 * @pit_index: the PIT index to program 3216 * 3217 * This function programs the new src_offset to the list. It is expected that 3218 * i40e_find_flex_offset has already been tried and returned NULL, indicating 3219 * that this offset is not programmed, and that the list has enough space to 3220 * store another offset. 3221 * 3222 * Returns 0 on success, and negative value on error. 3223 **/ 3224 static int i40e_add_flex_offset(struct list_head *flex_pit_list, 3225 u16 src_offset, 3226 u8 pit_index) 3227 { 3228 struct i40e_flex_pit *new_pit, *entry; 3229 3230 new_pit = kzalloc(sizeof(*entry), GFP_KERNEL); 3231 if (!new_pit) 3232 return -ENOMEM; 3233 3234 new_pit->src_offset = src_offset; 3235 new_pit->pit_index = pit_index; 3236 3237 /* We need to insert this item such that the list is sorted by 3238 * src_offset in ascending order. 3239 */ 3240 list_for_each_entry(entry, flex_pit_list, list) { 3241 if (new_pit->src_offset < entry->src_offset) { 3242 list_add_tail(&new_pit->list, &entry->list); 3243 return 0; 3244 } 3245 3246 /* If we found an entry with our offset already programmed we 3247 * can simply return here, after freeing the memory. However, 3248 * if the pit_index does not match we need to report an error. 3249 */ 3250 if (new_pit->src_offset == entry->src_offset) { 3251 int err = 0; 3252 3253 /* If the PIT index is not the same we can't re-use 3254 * the entry, so we must report an error. 3255 */ 3256 if (new_pit->pit_index != entry->pit_index) 3257 err = -EINVAL; 3258 3259 kfree(new_pit); 3260 return err; 3261 } 3262 } 3263 3264 /* If we reached here, then we haven't yet added the item. This means 3265 * that we should add the item at the end of the list. 3266 */ 3267 list_add_tail(&new_pit->list, flex_pit_list); 3268 return 0; 3269 } 3270 3271 /** 3272 * __i40e_reprogram_flex_pit - Re-program specific FLX_PIT table 3273 * @pf: Pointer to the PF structure 3274 * @flex_pit_list: list of flexible src offsets in use 3275 * @flex_pit_start: index to first entry for this section of the table 3276 * 3277 * In order to handle flexible data, the hardware uses a table of values 3278 * called the FLX_PIT table. This table is used to indicate which sections of 3279 * the input correspond to what PIT index values. Unfortunately, hardware is 3280 * very restrictive about programming this table. Entries must be ordered by 3281 * src_offset in ascending order, without duplicates. Additionally, unused 3282 * entries must be set to the unused index value, and must have valid size and 3283 * length according to the src_offset ordering. 3284 * 3285 * This function will reprogram the FLX_PIT register from a book-keeping 3286 * structure that we guarantee is already ordered correctly, and has no more 3287 * than 3 entries. 3288 * 3289 * To make things easier, we only support flexible values of one word length, 3290 * rather than allowing variable length flexible values. 3291 **/ 3292 static void __i40e_reprogram_flex_pit(struct i40e_pf *pf, 3293 struct list_head *flex_pit_list, 3294 int flex_pit_start) 3295 { 3296 struct i40e_flex_pit *entry = NULL; 3297 u16 last_offset = 0; 3298 int i = 0, j = 0; 3299 3300 /* First, loop over the list of flex PIT entries, and reprogram the 3301 * registers. 3302 */ 3303 list_for_each_entry(entry, flex_pit_list, list) { 3304 /* We have to be careful when programming values for the 3305 * largest SRC_OFFSET value. It is possible that adding 3306 * additional empty values at the end would overflow the space 3307 * for the SRC_OFFSET in the FLX_PIT register. To avoid this, 3308 * we check here and add the empty values prior to adding the 3309 * largest value. 3310 * 3311 * To determine this, we will use a loop from i+1 to 3, which 3312 * will determine whether the unused entries would have valid 3313 * SRC_OFFSET. Note that there cannot be extra entries past 3314 * this value, because the only valid values would have been 3315 * larger than I40E_MAX_FLEX_SRC_OFFSET, and thus would not 3316 * have been added to the list in the first place. 3317 */ 3318 for (j = i + 1; j < 3; j++) { 3319 u16 offset = entry->src_offset + j; 3320 int index = flex_pit_start + i; 3321 u32 value = I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 3322 1, 3323 offset - 3); 3324 3325 if (offset > I40E_MAX_FLEX_SRC_OFFSET) { 3326 i40e_write_rx_ctl(&pf->hw, 3327 I40E_PRTQF_FLX_PIT(index), 3328 value); 3329 i++; 3330 } 3331 } 3332 3333 /* Now, we can program the actual value into the table */ 3334 i40e_write_rx_ctl(&pf->hw, 3335 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 3336 I40E_FLEX_PREP_VAL(entry->pit_index + 50, 3337 1, 3338 entry->src_offset)); 3339 i++; 3340 } 3341 3342 /* In order to program the last entries in the table, we need to 3343 * determine the valid offset. If the list is empty, we'll just start 3344 * with 0. Otherwise, we'll start with the last item offset and add 1. 3345 * This ensures that all entries have valid sizes. If we don't do this 3346 * correctly, the hardware will disable flexible field parsing. 3347 */ 3348 if (!list_empty(flex_pit_list)) 3349 last_offset = list_prev_entry(entry, list)->src_offset + 1; 3350 3351 for (; i < 3; i++, last_offset++) { 3352 i40e_write_rx_ctl(&pf->hw, 3353 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 3354 I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 3355 1, 3356 last_offset)); 3357 } 3358 } 3359 3360 /** 3361 * i40e_reprogram_flex_pit - Reprogram all FLX_PIT tables after input set change 3362 * @pf: pointer to the PF structure 3363 * 3364 * This function reprograms both the L3 and L4 FLX_PIT tables. See the 3365 * internal helper function for implementation details. 3366 **/ 3367 static void i40e_reprogram_flex_pit(struct i40e_pf *pf) 3368 { 3369 __i40e_reprogram_flex_pit(pf, &pf->l3_flex_pit_list, 3370 I40E_FLEX_PIT_IDX_START_L3); 3371 3372 __i40e_reprogram_flex_pit(pf, &pf->l4_flex_pit_list, 3373 I40E_FLEX_PIT_IDX_START_L4); 3374 3375 /* We also need to program the L3 and L4 GLQF ORT register */ 3376 i40e_write_rx_ctl(&pf->hw, 3377 I40E_GLQF_ORT(I40E_L3_GLQF_ORT_IDX), 3378 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L3, 3379 3, 1)); 3380 3381 i40e_write_rx_ctl(&pf->hw, 3382 I40E_GLQF_ORT(I40E_L4_GLQF_ORT_IDX), 3383 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L4, 3384 3, 1)); 3385 } 3386 3387 /** 3388 * i40e_flow_str - Converts a flow_type into a human readable string 3389 * @fsp: the flow specification 3390 * 3391 * Currently only flow types we support are included here, and the string 3392 * value attempts to match what ethtool would use to configure this flow type. 3393 **/ 3394 static const char *i40e_flow_str(struct ethtool_rx_flow_spec *fsp) 3395 { 3396 switch (fsp->flow_type & ~FLOW_EXT) { 3397 case TCP_V4_FLOW: 3398 return "tcp4"; 3399 case UDP_V4_FLOW: 3400 return "udp4"; 3401 case SCTP_V4_FLOW: 3402 return "sctp4"; 3403 case IP_USER_FLOW: 3404 return "ip4"; 3405 default: 3406 return "unknown"; 3407 } 3408 } 3409 3410 /** 3411 * i40e_pit_index_to_mask - Return the FLEX mask for a given PIT index 3412 * @pit_index: PIT index to convert 3413 * 3414 * Returns the mask for a given PIT index. Will return 0 if the pit_index is 3415 * of range. 3416 **/ 3417 static u64 i40e_pit_index_to_mask(int pit_index) 3418 { 3419 switch (pit_index) { 3420 case 0: 3421 return I40E_FLEX_50_MASK; 3422 case 1: 3423 return I40E_FLEX_51_MASK; 3424 case 2: 3425 return I40E_FLEX_52_MASK; 3426 case 3: 3427 return I40E_FLEX_53_MASK; 3428 case 4: 3429 return I40E_FLEX_54_MASK; 3430 case 5: 3431 return I40E_FLEX_55_MASK; 3432 case 6: 3433 return I40E_FLEX_56_MASK; 3434 case 7: 3435 return I40E_FLEX_57_MASK; 3436 default: 3437 return 0; 3438 } 3439 } 3440 3441 /** 3442 * i40e_print_input_set - Show changes between two input sets 3443 * @vsi: the vsi being configured 3444 * @old: the old input set 3445 * @new: the new input set 3446 * 3447 * Print the difference between old and new input sets by showing which series 3448 * of words are toggled on or off. Only displays the bits we actually support 3449 * changing. 3450 **/ 3451 static void i40e_print_input_set(struct i40e_vsi *vsi, u64 old, u64 new) 3452 { 3453 struct i40e_pf *pf = vsi->back; 3454 bool old_value, new_value; 3455 int i; 3456 3457 old_value = !!(old & I40E_L3_SRC_MASK); 3458 new_value = !!(new & I40E_L3_SRC_MASK); 3459 if (old_value != new_value) 3460 netif_info(pf, drv, vsi->netdev, "L3 source address: %s -> %s\n", 3461 old_value ? "ON" : "OFF", 3462 new_value ? "ON" : "OFF"); 3463 3464 old_value = !!(old & I40E_L3_DST_MASK); 3465 new_value = !!(new & I40E_L3_DST_MASK); 3466 if (old_value != new_value) 3467 netif_info(pf, drv, vsi->netdev, "L3 destination address: %s -> %s\n", 3468 old_value ? "ON" : "OFF", 3469 new_value ? "ON" : "OFF"); 3470 3471 old_value = !!(old & I40E_L4_SRC_MASK); 3472 new_value = !!(new & I40E_L4_SRC_MASK); 3473 if (old_value != new_value) 3474 netif_info(pf, drv, vsi->netdev, "L4 source port: %s -> %s\n", 3475 old_value ? "ON" : "OFF", 3476 new_value ? "ON" : "OFF"); 3477 3478 old_value = !!(old & I40E_L4_DST_MASK); 3479 new_value = !!(new & I40E_L4_DST_MASK); 3480 if (old_value != new_value) 3481 netif_info(pf, drv, vsi->netdev, "L4 destination port: %s -> %s\n", 3482 old_value ? "ON" : "OFF", 3483 new_value ? "ON" : "OFF"); 3484 3485 old_value = !!(old & I40E_VERIFY_TAG_MASK); 3486 new_value = !!(new & I40E_VERIFY_TAG_MASK); 3487 if (old_value != new_value) 3488 netif_info(pf, drv, vsi->netdev, "SCTP verification tag: %s -> %s\n", 3489 old_value ? "ON" : "OFF", 3490 new_value ? "ON" : "OFF"); 3491 3492 /* Show change of flexible filter entries */ 3493 for (i = 0; i < I40E_FLEX_INDEX_ENTRIES; i++) { 3494 u64 flex_mask = i40e_pit_index_to_mask(i); 3495 3496 old_value = !!(old & flex_mask); 3497 new_value = !!(new & flex_mask); 3498 if (old_value != new_value) 3499 netif_info(pf, drv, vsi->netdev, "FLEX index %d: %s -> %s\n", 3500 i, 3501 old_value ? "ON" : "OFF", 3502 new_value ? "ON" : "OFF"); 3503 } 3504 3505 netif_info(pf, drv, vsi->netdev, " Current input set: %0llx\n", 3506 old); 3507 netif_info(pf, drv, vsi->netdev, "Requested input set: %0llx\n", 3508 new); 3509 } 3510 3511 /** 3512 * i40e_check_fdir_input_set - Check that a given rx_flow_spec mask is valid 3513 * @vsi: pointer to the targeted VSI 3514 * @fsp: pointer to Rx flow specification 3515 * @userdef: userdefined data from flow specification 3516 * 3517 * Ensures that a given ethtool_rx_flow_spec has a valid mask. Some support 3518 * for partial matches exists with a few limitations. First, hardware only 3519 * supports masking by word boundary (2 bytes) and not per individual bit. 3520 * Second, hardware is limited to using one mask for a flow type and cannot 3521 * use a separate mask for each filter. 3522 * 3523 * To support these limitations, if we already have a configured filter for 3524 * the specified type, this function enforces that new filters of the type 3525 * match the configured input set. Otherwise, if we do not have a filter of 3526 * the specified type, we allow the input set to be updated to match the 3527 * desired filter. 3528 * 3529 * To help ensure that administrators understand why filters weren't displayed 3530 * as supported, we print a diagnostic message displaying how the input set 3531 * would change and warning to delete the preexisting filters if required. 3532 * 3533 * Returns 0 on successful input set match, and a negative return code on 3534 * failure. 3535 **/ 3536 static int i40e_check_fdir_input_set(struct i40e_vsi *vsi, 3537 struct ethtool_rx_flow_spec *fsp, 3538 struct i40e_rx_flow_userdef *userdef) 3539 { 3540 struct i40e_pf *pf = vsi->back; 3541 struct ethtool_tcpip4_spec *tcp_ip4_spec; 3542 struct ethtool_usrip4_spec *usr_ip4_spec; 3543 u64 current_mask, new_mask; 3544 bool new_flex_offset = false; 3545 bool flex_l3 = false; 3546 u16 *fdir_filter_count; 3547 u16 index, src_offset = 0; 3548 u8 pit_index = 0; 3549 int err; 3550 3551 switch (fsp->flow_type & ~FLOW_EXT) { 3552 case SCTP_V4_FLOW: 3553 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 3554 fdir_filter_count = &pf->fd_sctp4_filter_cnt; 3555 break; 3556 case TCP_V4_FLOW: 3557 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 3558 fdir_filter_count = &pf->fd_tcp4_filter_cnt; 3559 break; 3560 case UDP_V4_FLOW: 3561 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 3562 fdir_filter_count = &pf->fd_udp4_filter_cnt; 3563 break; 3564 case IP_USER_FLOW: 3565 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 3566 fdir_filter_count = &pf->fd_ip4_filter_cnt; 3567 flex_l3 = true; 3568 break; 3569 default: 3570 return -EOPNOTSUPP; 3571 } 3572 3573 /* Read the current input set from register memory. */ 3574 current_mask = i40e_read_fd_input_set(pf, index); 3575 new_mask = current_mask; 3576 3577 /* Determine, if any, the required changes to the input set in order 3578 * to support the provided mask. 3579 * 3580 * Hardware only supports masking at word (2 byte) granularity and does 3581 * not support full bitwise masking. This implementation simplifies 3582 * even further and only supports fully enabled or fully disabled 3583 * masks for each field, even though we could split the ip4src and 3584 * ip4dst fields. 3585 */ 3586 switch (fsp->flow_type & ~FLOW_EXT) { 3587 case SCTP_V4_FLOW: 3588 new_mask &= ~I40E_VERIFY_TAG_MASK; 3589 /* Fall through */ 3590 case TCP_V4_FLOW: 3591 case UDP_V4_FLOW: 3592 tcp_ip4_spec = &fsp->m_u.tcp_ip4_spec; 3593 3594 /* IPv4 source address */ 3595 if (tcp_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 3596 new_mask |= I40E_L3_SRC_MASK; 3597 else if (!tcp_ip4_spec->ip4src) 3598 new_mask &= ~I40E_L3_SRC_MASK; 3599 else 3600 return -EOPNOTSUPP; 3601 3602 /* IPv4 destination address */ 3603 if (tcp_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 3604 new_mask |= I40E_L3_DST_MASK; 3605 else if (!tcp_ip4_spec->ip4dst) 3606 new_mask &= ~I40E_L3_DST_MASK; 3607 else 3608 return -EOPNOTSUPP; 3609 3610 /* L4 source port */ 3611 if (tcp_ip4_spec->psrc == htons(0xFFFF)) 3612 new_mask |= I40E_L4_SRC_MASK; 3613 else if (!tcp_ip4_spec->psrc) 3614 new_mask &= ~I40E_L4_SRC_MASK; 3615 else 3616 return -EOPNOTSUPP; 3617 3618 /* L4 destination port */ 3619 if (tcp_ip4_spec->pdst == htons(0xFFFF)) 3620 new_mask |= I40E_L4_DST_MASK; 3621 else if (!tcp_ip4_spec->pdst) 3622 new_mask &= ~I40E_L4_DST_MASK; 3623 else 3624 return -EOPNOTSUPP; 3625 3626 /* Filtering on Type of Service is not supported. */ 3627 if (tcp_ip4_spec->tos) 3628 return -EOPNOTSUPP; 3629 3630 break; 3631 case IP_USER_FLOW: 3632 usr_ip4_spec = &fsp->m_u.usr_ip4_spec; 3633 3634 /* IPv4 source address */ 3635 if (usr_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 3636 new_mask |= I40E_L3_SRC_MASK; 3637 else if (!usr_ip4_spec->ip4src) 3638 new_mask &= ~I40E_L3_SRC_MASK; 3639 else 3640 return -EOPNOTSUPP; 3641 3642 /* IPv4 destination address */ 3643 if (usr_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 3644 new_mask |= I40E_L3_DST_MASK; 3645 else if (!usr_ip4_spec->ip4dst) 3646 new_mask &= ~I40E_L3_DST_MASK; 3647 else 3648 return -EOPNOTSUPP; 3649 3650 /* First 4 bytes of L4 header */ 3651 if (usr_ip4_spec->l4_4_bytes == htonl(0xFFFFFFFF)) 3652 new_mask |= I40E_L4_SRC_MASK | I40E_L4_DST_MASK; 3653 else if (!usr_ip4_spec->l4_4_bytes) 3654 new_mask &= ~(I40E_L4_SRC_MASK | I40E_L4_DST_MASK); 3655 else 3656 return -EOPNOTSUPP; 3657 3658 /* Filtering on Type of Service is not supported. */ 3659 if (usr_ip4_spec->tos) 3660 return -EOPNOTSUPP; 3661 3662 /* Filtering on IP version is not supported */ 3663 if (usr_ip4_spec->ip_ver) 3664 return -EINVAL; 3665 3666 /* Filtering on L4 protocol is not supported */ 3667 if (usr_ip4_spec->proto) 3668 return -EINVAL; 3669 3670 break; 3671 default: 3672 return -EOPNOTSUPP; 3673 } 3674 3675 /* First, clear all flexible filter entries */ 3676 new_mask &= ~I40E_FLEX_INPUT_MASK; 3677 3678 /* If we have a flexible filter, try to add this offset to the correct 3679 * flexible filter PIT list. Once finished, we can update the mask. 3680 * If the src_offset changed, we will get a new mask value which will 3681 * trigger an input set change. 3682 */ 3683 if (userdef->flex_filter) { 3684 struct i40e_flex_pit *l3_flex_pit = NULL, *flex_pit = NULL; 3685 3686 /* Flexible offset must be even, since the flexible payload 3687 * must be aligned on 2-byte boundary. 3688 */ 3689 if (userdef->flex_offset & 0x1) { 3690 dev_warn(&pf->pdev->dev, 3691 "Flexible data offset must be 2-byte aligned\n"); 3692 return -EINVAL; 3693 } 3694 3695 src_offset = userdef->flex_offset >> 1; 3696 3697 /* FLX_PIT source offset value is only so large */ 3698 if (src_offset > I40E_MAX_FLEX_SRC_OFFSET) { 3699 dev_warn(&pf->pdev->dev, 3700 "Flexible data must reside within first 64 bytes of the packet payload\n"); 3701 return -EINVAL; 3702 } 3703 3704 /* See if this offset has already been programmed. If we get 3705 * an ERR_PTR, then the filter is not safe to add. Otherwise, 3706 * if we get a NULL pointer, this means we will need to add 3707 * the offset. 3708 */ 3709 flex_pit = i40e_find_flex_offset(&pf->l4_flex_pit_list, 3710 src_offset); 3711 if (IS_ERR(flex_pit)) 3712 return PTR_ERR(flex_pit); 3713 3714 /* IP_USER_FLOW filters match both L4 (ICMP) and L3 (unknown) 3715 * packet types, and thus we need to program both L3 and L4 3716 * flexible values. These must have identical flexible index, 3717 * as otherwise we can't correctly program the input set. So 3718 * we'll find both an L3 and L4 index and make sure they are 3719 * the same. 3720 */ 3721 if (flex_l3) { 3722 l3_flex_pit = 3723 i40e_find_flex_offset(&pf->l3_flex_pit_list, 3724 src_offset); 3725 if (IS_ERR(l3_flex_pit)) 3726 return PTR_ERR(l3_flex_pit); 3727 3728 if (flex_pit) { 3729 /* If we already had a matching L4 entry, we 3730 * need to make sure that the L3 entry we 3731 * obtained uses the same index. 3732 */ 3733 if (l3_flex_pit) { 3734 if (l3_flex_pit->pit_index != 3735 flex_pit->pit_index) { 3736 return -EINVAL; 3737 } 3738 } else { 3739 new_flex_offset = true; 3740 } 3741 } else { 3742 flex_pit = l3_flex_pit; 3743 } 3744 } 3745 3746 /* If we didn't find an existing flex offset, we need to 3747 * program a new one. However, we don't immediately program it 3748 * here because we will wait to program until after we check 3749 * that it is safe to change the input set. 3750 */ 3751 if (!flex_pit) { 3752 new_flex_offset = true; 3753 pit_index = i40e_unused_pit_index(pf); 3754 } else { 3755 pit_index = flex_pit->pit_index; 3756 } 3757 3758 /* Update the mask with the new offset */ 3759 new_mask |= i40e_pit_index_to_mask(pit_index); 3760 } 3761 3762 /* If the mask and flexible filter offsets for this filter match the 3763 * currently programmed values we don't need any input set change, so 3764 * this filter is safe to install. 3765 */ 3766 if (new_mask == current_mask && !new_flex_offset) 3767 return 0; 3768 3769 netif_info(pf, drv, vsi->netdev, "Input set change requested for %s flows:\n", 3770 i40e_flow_str(fsp)); 3771 i40e_print_input_set(vsi, current_mask, new_mask); 3772 if (new_flex_offset) { 3773 netif_info(pf, drv, vsi->netdev, "FLEX index %d: Offset -> %d", 3774 pit_index, src_offset); 3775 } 3776 3777 /* Hardware input sets are global across multiple ports, so even the 3778 * main port cannot change them when in MFP mode as this would impact 3779 * any filters on the other ports. 3780 */ 3781 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 3782 netif_err(pf, drv, vsi->netdev, "Cannot change Flow Director input sets while MFP is enabled\n"); 3783 return -EOPNOTSUPP; 3784 } 3785 3786 /* This filter requires us to update the input set. However, hardware 3787 * only supports one input set per flow type, and does not support 3788 * separate masks for each filter. This means that we can only support 3789 * a single mask for all filters of a specific type. 3790 * 3791 * If we have preexisting filters, they obviously depend on the 3792 * current programmed input set. Display a diagnostic message in this 3793 * case explaining why the filter could not be accepted. 3794 */ 3795 if (*fdir_filter_count) { 3796 netif_err(pf, drv, vsi->netdev, "Cannot change input set for %s flows until %d preexisting filters are removed\n", 3797 i40e_flow_str(fsp), 3798 *fdir_filter_count); 3799 return -EOPNOTSUPP; 3800 } 3801 3802 i40e_write_fd_input_set(pf, index, new_mask); 3803 3804 /* IP_USER_FLOW filters match both IPv4/Other and IPv4/Fragmented 3805 * frames. If we're programming the input set for IPv4/Other, we also 3806 * need to program the IPv4/Fragmented input set. Since we don't have 3807 * separate support, we'll always assume and enforce that the two flow 3808 * types must have matching input sets. 3809 */ 3810 if (index == I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) 3811 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4, 3812 new_mask); 3813 3814 /* Add the new offset and update table, if necessary */ 3815 if (new_flex_offset) { 3816 err = i40e_add_flex_offset(&pf->l4_flex_pit_list, src_offset, 3817 pit_index); 3818 if (err) 3819 return err; 3820 3821 if (flex_l3) { 3822 err = i40e_add_flex_offset(&pf->l3_flex_pit_list, 3823 src_offset, 3824 pit_index); 3825 if (err) 3826 return err; 3827 } 3828 3829 i40e_reprogram_flex_pit(pf); 3830 } 3831 3832 return 0; 3833 } 3834 3835 /** 3836 * i40e_match_fdir_filter - Return true of two filters match 3837 * @a: pointer to filter struct 3838 * @b: pointer to filter struct 3839 * 3840 * Returns true if the two filters match exactly the same criteria. I.e. they 3841 * match the same flow type and have the same parameters. We don't need to 3842 * check any input-set since all filters of the same flow type must use the 3843 * same input set. 3844 **/ 3845 static bool i40e_match_fdir_filter(struct i40e_fdir_filter *a, 3846 struct i40e_fdir_filter *b) 3847 { 3848 /* The filters do not much if any of these criteria differ. */ 3849 if (a->dst_ip != b->dst_ip || 3850 a->src_ip != b->src_ip || 3851 a->dst_port != b->dst_port || 3852 a->src_port != b->src_port || 3853 a->flow_type != b->flow_type || 3854 a->ip4_proto != b->ip4_proto) 3855 return false; 3856 3857 return true; 3858 } 3859 3860 /** 3861 * i40e_disallow_matching_filters - Check that new filters differ 3862 * @vsi: pointer to the targeted VSI 3863 * @input: new filter to check 3864 * 3865 * Due to hardware limitations, it is not possible for two filters that match 3866 * similar criteria to be programmed at the same time. This is true for a few 3867 * reasons: 3868 * 3869 * (a) all filters matching a particular flow type must use the same input 3870 * set, that is they must match the same criteria. 3871 * (b) different flow types will never match the same packet, as the flow type 3872 * is decided by hardware before checking which rules apply. 3873 * (c) hardware has no way to distinguish which order filters apply in. 3874 * 3875 * Due to this, we can't really support using the location data to order 3876 * filters in the hardware parsing. It is technically possible for the user to 3877 * request two filters matching the same criteria but which select different 3878 * queues. In this case, rather than keep both filters in the list, we reject 3879 * the 2nd filter when the user requests adding it. 3880 * 3881 * This avoids needing to track location for programming the filter to 3882 * hardware, and ensures that we avoid some strange scenarios involving 3883 * deleting filters which match the same criteria. 3884 **/ 3885 static int i40e_disallow_matching_filters(struct i40e_vsi *vsi, 3886 struct i40e_fdir_filter *input) 3887 { 3888 struct i40e_pf *pf = vsi->back; 3889 struct i40e_fdir_filter *rule; 3890 struct hlist_node *node2; 3891 3892 /* Loop through every filter, and check that it doesn't match */ 3893 hlist_for_each_entry_safe(rule, node2, 3894 &pf->fdir_filter_list, fdir_node) { 3895 /* Don't check the filters match if they share the same fd_id, 3896 * since the new filter is actually just updating the target 3897 * of the old filter. 3898 */ 3899 if (rule->fd_id == input->fd_id) 3900 continue; 3901 3902 /* If any filters match, then print a warning message to the 3903 * kernel message buffer and bail out. 3904 */ 3905 if (i40e_match_fdir_filter(rule, input)) { 3906 dev_warn(&pf->pdev->dev, 3907 "Existing user defined filter %d already matches this flow.\n", 3908 rule->fd_id); 3909 return -EINVAL; 3910 } 3911 } 3912 3913 return 0; 3914 } 3915 3916 /** 3917 * i40e_add_fdir_ethtool - Add/Remove Flow Director filters 3918 * @vsi: pointer to the targeted VSI 3919 * @cmd: command to get or set RX flow classification rules 3920 * 3921 * Add Flow Director filters for a specific flow spec based on their 3922 * protocol. Returns 0 if the filters were successfully added. 3923 **/ 3924 static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi, 3925 struct ethtool_rxnfc *cmd) 3926 { 3927 struct i40e_rx_flow_userdef userdef; 3928 struct ethtool_rx_flow_spec *fsp; 3929 struct i40e_fdir_filter *input; 3930 u16 dest_vsi = 0, q_index = 0; 3931 struct i40e_pf *pf; 3932 int ret = -EINVAL; 3933 u8 dest_ctl; 3934 3935 if (!vsi) 3936 return -EINVAL; 3937 pf = vsi->back; 3938 3939 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 3940 return -EOPNOTSUPP; 3941 3942 if (test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state)) 3943 return -ENOSPC; 3944 3945 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 3946 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 3947 return -EBUSY; 3948 3949 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 3950 return -EBUSY; 3951 3952 fsp = (struct ethtool_rx_flow_spec *)&cmd->fs; 3953 3954 /* Parse the user-defined field */ 3955 if (i40e_parse_rx_flow_user_data(fsp, &userdef)) 3956 return -EINVAL; 3957 3958 /* Extended MAC field is not supported */ 3959 if (fsp->flow_type & FLOW_MAC_EXT) 3960 return -EINVAL; 3961 3962 ret = i40e_check_fdir_input_set(vsi, fsp, &userdef); 3963 if (ret) 3964 return ret; 3965 3966 if (fsp->location >= (pf->hw.func_caps.fd_filters_best_effort + 3967 pf->hw.func_caps.fd_filters_guaranteed)) { 3968 return -EINVAL; 3969 } 3970 3971 /* ring_cookie is either the drop index, or is a mask of the queue 3972 * index and VF id we wish to target. 3973 */ 3974 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) { 3975 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 3976 } else { 3977 u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie); 3978 u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie); 3979 3980 if (!vf) { 3981 if (ring >= vsi->num_queue_pairs) 3982 return -EINVAL; 3983 dest_vsi = vsi->id; 3984 } else { 3985 /* VFs are zero-indexed, so we subtract one here */ 3986 vf--; 3987 3988 if (vf >= pf->num_alloc_vfs) 3989 return -EINVAL; 3990 if (ring >= pf->vf[vf].num_queue_pairs) 3991 return -EINVAL; 3992 dest_vsi = pf->vf[vf].lan_vsi_id; 3993 } 3994 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX; 3995 q_index = ring; 3996 } 3997 3998 input = kzalloc(sizeof(*input), GFP_KERNEL); 3999 4000 if (!input) 4001 return -ENOMEM; 4002 4003 input->fd_id = fsp->location; 4004 input->q_index = q_index; 4005 input->dest_vsi = dest_vsi; 4006 input->dest_ctl = dest_ctl; 4007 input->fd_status = I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID; 4008 input->cnt_index = I40E_FD_SB_STAT_IDX(pf->hw.pf_id); 4009 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 4010 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 4011 input->flow_type = fsp->flow_type & ~FLOW_EXT; 4012 input->ip4_proto = fsp->h_u.usr_ip4_spec.proto; 4013 4014 /* Reverse the src and dest notion, since the HW expects them to be from 4015 * Tx perspective where as the input from user is from Rx filter view. 4016 */ 4017 input->dst_port = fsp->h_u.tcp_ip4_spec.psrc; 4018 input->src_port = fsp->h_u.tcp_ip4_spec.pdst; 4019 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 4020 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 4021 4022 if (userdef.flex_filter) { 4023 input->flex_filter = true; 4024 input->flex_word = cpu_to_be16(userdef.flex_word); 4025 input->flex_offset = userdef.flex_offset; 4026 } 4027 4028 /* Avoid programming two filters with identical match criteria. */ 4029 ret = i40e_disallow_matching_filters(vsi, input); 4030 if (ret) 4031 goto free_filter_memory; 4032 4033 /* Add the input filter to the fdir_input_list, possibly replacing 4034 * a previous filter. Do not free the input structure after adding it 4035 * to the list as this would cause a use-after-free bug. 4036 */ 4037 i40e_update_ethtool_fdir_entry(vsi, input, fsp->location, NULL); 4038 ret = i40e_add_del_fdir(vsi, input, true); 4039 if (ret) 4040 goto remove_sw_rule; 4041 return 0; 4042 4043 remove_sw_rule: 4044 hlist_del(&input->fdir_node); 4045 pf->fdir_pf_active_filters--; 4046 free_filter_memory: 4047 kfree(input); 4048 return ret; 4049 } 4050 4051 /** 4052 * i40e_set_rxnfc - command to set RX flow classification rules 4053 * @netdev: network interface device structure 4054 * @cmd: ethtool rxnfc command 4055 * 4056 * Returns Success if the command is supported. 4057 **/ 4058 static int i40e_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd) 4059 { 4060 struct i40e_netdev_priv *np = netdev_priv(netdev); 4061 struct i40e_vsi *vsi = np->vsi; 4062 struct i40e_pf *pf = vsi->back; 4063 int ret = -EOPNOTSUPP; 4064 4065 switch (cmd->cmd) { 4066 case ETHTOOL_SRXFH: 4067 ret = i40e_set_rss_hash_opt(pf, cmd); 4068 break; 4069 case ETHTOOL_SRXCLSRLINS: 4070 ret = i40e_add_fdir_ethtool(vsi, cmd); 4071 break; 4072 case ETHTOOL_SRXCLSRLDEL: 4073 ret = i40e_del_fdir_entry(vsi, cmd); 4074 break; 4075 default: 4076 break; 4077 } 4078 4079 return ret; 4080 } 4081 4082 /** 4083 * i40e_max_channels - get Max number of combined channels supported 4084 * @vsi: vsi pointer 4085 **/ 4086 static unsigned int i40e_max_channels(struct i40e_vsi *vsi) 4087 { 4088 /* TODO: This code assumes DCB and FD is disabled for now. */ 4089 return vsi->alloc_queue_pairs; 4090 } 4091 4092 /** 4093 * i40e_get_channels - Get the current channels enabled and max supported etc. 4094 * @dev: network interface device structure 4095 * @ch: ethtool channels structure 4096 * 4097 * We don't support separate tx and rx queues as channels. The other count 4098 * represents how many queues are being used for control. max_combined counts 4099 * how many queue pairs we can support. They may not be mapped 1 to 1 with 4100 * q_vectors since we support a lot more queue pairs than q_vectors. 4101 **/ 4102 static void i40e_get_channels(struct net_device *dev, 4103 struct ethtool_channels *ch) 4104 { 4105 struct i40e_netdev_priv *np = netdev_priv(dev); 4106 struct i40e_vsi *vsi = np->vsi; 4107 struct i40e_pf *pf = vsi->back; 4108 4109 /* report maximum channels */ 4110 ch->max_combined = i40e_max_channels(vsi); 4111 4112 /* report info for other vector */ 4113 ch->other_count = (pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0; 4114 ch->max_other = ch->other_count; 4115 4116 /* Note: This code assumes DCB is disabled for now. */ 4117 ch->combined_count = vsi->num_queue_pairs; 4118 } 4119 4120 /** 4121 * i40e_set_channels - Set the new channels count. 4122 * @dev: network interface device structure 4123 * @ch: ethtool channels structure 4124 * 4125 * The new channels count may not be the same as requested by the user 4126 * since it gets rounded down to a power of 2 value. 4127 **/ 4128 static int i40e_set_channels(struct net_device *dev, 4129 struct ethtool_channels *ch) 4130 { 4131 const u8 drop = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 4132 struct i40e_netdev_priv *np = netdev_priv(dev); 4133 unsigned int count = ch->combined_count; 4134 struct i40e_vsi *vsi = np->vsi; 4135 struct i40e_pf *pf = vsi->back; 4136 struct i40e_fdir_filter *rule; 4137 struct hlist_node *node2; 4138 int new_count; 4139 int err = 0; 4140 4141 /* We do not support setting channels for any other VSI at present */ 4142 if (vsi->type != I40E_VSI_MAIN) 4143 return -EINVAL; 4144 4145 /* We do not support setting channels via ethtool when TCs are 4146 * configured through mqprio 4147 */ 4148 if (pf->flags & I40E_FLAG_TC_MQPRIO) 4149 return -EINVAL; 4150 4151 /* verify they are not requesting separate vectors */ 4152 if (!count || ch->rx_count || ch->tx_count) 4153 return -EINVAL; 4154 4155 /* verify other_count has not changed */ 4156 if (ch->other_count != ((pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0)) 4157 return -EINVAL; 4158 4159 /* verify the number of channels does not exceed hardware limits */ 4160 if (count > i40e_max_channels(vsi)) 4161 return -EINVAL; 4162 4163 /* verify that the number of channels does not invalidate any current 4164 * flow director rules 4165 */ 4166 hlist_for_each_entry_safe(rule, node2, 4167 &pf->fdir_filter_list, fdir_node) { 4168 if (rule->dest_ctl != drop && count <= rule->q_index) { 4169 dev_warn(&pf->pdev->dev, 4170 "Existing user defined filter %d assigns flow to queue %d\n", 4171 rule->fd_id, rule->q_index); 4172 err = -EINVAL; 4173 } 4174 } 4175 4176 if (err) { 4177 dev_err(&pf->pdev->dev, 4178 "Existing filter rules must be deleted to reduce combined channel count to %d\n", 4179 count); 4180 return err; 4181 } 4182 4183 /* update feature limits from largest to smallest supported values */ 4184 /* TODO: Flow director limit, DCB etc */ 4185 4186 /* use rss_reconfig to rebuild with new queue count and update traffic 4187 * class queue mapping 4188 */ 4189 new_count = i40e_reconfig_rss_queues(pf, count); 4190 if (new_count > 0) 4191 return 0; 4192 else 4193 return -EINVAL; 4194 } 4195 4196 /** 4197 * i40e_get_rxfh_key_size - get the RSS hash key size 4198 * @netdev: network interface device structure 4199 * 4200 * Returns the table size. 4201 **/ 4202 static u32 i40e_get_rxfh_key_size(struct net_device *netdev) 4203 { 4204 return I40E_HKEY_ARRAY_SIZE; 4205 } 4206 4207 /** 4208 * i40e_get_rxfh_indir_size - get the rx flow hash indirection table size 4209 * @netdev: network interface device structure 4210 * 4211 * Returns the table size. 4212 **/ 4213 static u32 i40e_get_rxfh_indir_size(struct net_device *netdev) 4214 { 4215 return I40E_HLUT_ARRAY_SIZE; 4216 } 4217 4218 /** 4219 * i40e_get_rxfh - get the rx flow hash indirection table 4220 * @netdev: network interface device structure 4221 * @indir: indirection table 4222 * @key: hash key 4223 * @hfunc: hash function 4224 * 4225 * Reads the indirection table directly from the hardware. Returns 0 on 4226 * success. 4227 **/ 4228 static int i40e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key, 4229 u8 *hfunc) 4230 { 4231 struct i40e_netdev_priv *np = netdev_priv(netdev); 4232 struct i40e_vsi *vsi = np->vsi; 4233 u8 *lut, *seed = NULL; 4234 int ret; 4235 u16 i; 4236 4237 if (hfunc) 4238 *hfunc = ETH_RSS_HASH_TOP; 4239 4240 if (!indir) 4241 return 0; 4242 4243 seed = key; 4244 lut = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 4245 if (!lut) 4246 return -ENOMEM; 4247 ret = i40e_get_rss(vsi, seed, lut, I40E_HLUT_ARRAY_SIZE); 4248 if (ret) 4249 goto out; 4250 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 4251 indir[i] = (u32)(lut[i]); 4252 4253 out: 4254 kfree(lut); 4255 4256 return ret; 4257 } 4258 4259 /** 4260 * i40e_set_rxfh - set the rx flow hash indirection table 4261 * @netdev: network interface device structure 4262 * @indir: indirection table 4263 * @key: hash key 4264 * @hfunc: hash function to use 4265 * 4266 * Returns -EINVAL if the table specifies an invalid queue id, otherwise 4267 * returns 0 after programming the table. 4268 **/ 4269 static int i40e_set_rxfh(struct net_device *netdev, const u32 *indir, 4270 const u8 *key, const u8 hfunc) 4271 { 4272 struct i40e_netdev_priv *np = netdev_priv(netdev); 4273 struct i40e_vsi *vsi = np->vsi; 4274 struct i40e_pf *pf = vsi->back; 4275 u8 *seed = NULL; 4276 u16 i; 4277 4278 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) 4279 return -EOPNOTSUPP; 4280 4281 if (key) { 4282 if (!vsi->rss_hkey_user) { 4283 vsi->rss_hkey_user = kzalloc(I40E_HKEY_ARRAY_SIZE, 4284 GFP_KERNEL); 4285 if (!vsi->rss_hkey_user) 4286 return -ENOMEM; 4287 } 4288 memcpy(vsi->rss_hkey_user, key, I40E_HKEY_ARRAY_SIZE); 4289 seed = vsi->rss_hkey_user; 4290 } 4291 if (!vsi->rss_lut_user) { 4292 vsi->rss_lut_user = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 4293 if (!vsi->rss_lut_user) 4294 return -ENOMEM; 4295 } 4296 4297 /* Each 32 bits pointed by 'indir' is stored with a lut entry */ 4298 if (indir) 4299 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 4300 vsi->rss_lut_user[i] = (u8)(indir[i]); 4301 else 4302 i40e_fill_rss_lut(pf, vsi->rss_lut_user, I40E_HLUT_ARRAY_SIZE, 4303 vsi->rss_size); 4304 4305 return i40e_config_rss(vsi, seed, vsi->rss_lut_user, 4306 I40E_HLUT_ARRAY_SIZE); 4307 } 4308 4309 /** 4310 * i40e_get_priv_flags - report device private flags 4311 * @dev: network interface device structure 4312 * 4313 * The get string set count and the string set should be matched for each 4314 * flag returned. Add new strings for each flag to the i40e_gstrings_priv_flags 4315 * array. 4316 * 4317 * Returns a u32 bitmap of flags. 4318 **/ 4319 static u32 i40e_get_priv_flags(struct net_device *dev) 4320 { 4321 struct i40e_netdev_priv *np = netdev_priv(dev); 4322 struct i40e_vsi *vsi = np->vsi; 4323 struct i40e_pf *pf = vsi->back; 4324 u32 i, j, ret_flags = 0; 4325 4326 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 4327 const struct i40e_priv_flags *priv_flags; 4328 4329 priv_flags = &i40e_gstrings_priv_flags[i]; 4330 4331 if (priv_flags->flag & pf->flags) 4332 ret_flags |= BIT(i); 4333 } 4334 4335 if (pf->hw.pf_id != 0) 4336 return ret_flags; 4337 4338 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 4339 const struct i40e_priv_flags *priv_flags; 4340 4341 priv_flags = &i40e_gl_gstrings_priv_flags[j]; 4342 4343 if (priv_flags->flag & pf->flags) 4344 ret_flags |= BIT(i + j); 4345 } 4346 4347 return ret_flags; 4348 } 4349 4350 /** 4351 * i40e_set_priv_flags - set private flags 4352 * @dev: network interface device structure 4353 * @flags: bit flags to be set 4354 **/ 4355 static int i40e_set_priv_flags(struct net_device *dev, u32 flags) 4356 { 4357 struct i40e_netdev_priv *np = netdev_priv(dev); 4358 struct i40e_vsi *vsi = np->vsi; 4359 struct i40e_pf *pf = vsi->back; 4360 u64 orig_flags, new_flags, changed_flags; 4361 u32 i, j; 4362 4363 orig_flags = READ_ONCE(pf->flags); 4364 new_flags = orig_flags; 4365 4366 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 4367 const struct i40e_priv_flags *priv_flags; 4368 4369 priv_flags = &i40e_gstrings_priv_flags[i]; 4370 4371 if (flags & BIT(i)) 4372 new_flags |= priv_flags->flag; 4373 else 4374 new_flags &= ~(priv_flags->flag); 4375 4376 /* If this is a read-only flag, it can't be changed */ 4377 if (priv_flags->read_only && 4378 ((orig_flags ^ new_flags) & ~BIT(i))) 4379 return -EOPNOTSUPP; 4380 } 4381 4382 if (pf->hw.pf_id != 0) 4383 goto flags_complete; 4384 4385 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 4386 const struct i40e_priv_flags *priv_flags; 4387 4388 priv_flags = &i40e_gl_gstrings_priv_flags[j]; 4389 4390 if (flags & BIT(i + j)) 4391 new_flags |= priv_flags->flag; 4392 else 4393 new_flags &= ~(priv_flags->flag); 4394 4395 /* If this is a read-only flag, it can't be changed */ 4396 if (priv_flags->read_only && 4397 ((orig_flags ^ new_flags) & ~BIT(i))) 4398 return -EOPNOTSUPP; 4399 } 4400 4401 flags_complete: 4402 changed_flags = orig_flags ^ new_flags; 4403 4404 /* Before we finalize any flag changes, we need to perform some 4405 * checks to ensure that the changes are supported and safe. 4406 */ 4407 4408 /* ATR eviction is not supported on all devices */ 4409 if ((new_flags & I40E_FLAG_HW_ATR_EVICT_ENABLED) && 4410 !(pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE)) 4411 return -EOPNOTSUPP; 4412 4413 /* If the driver detected FW LLDP was disabled on init, this flag could 4414 * be set, however we do not support _changing_ the flag if NPAR is 4415 * enabled or FW API version < 1.7. There are situations where older 4416 * FW versions/NPAR enabled PFs could disable LLDP, however we _must_ 4417 * not allow the user to enable/disable LLDP with this flag on 4418 * unsupported FW versions. 4419 */ 4420 if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) { 4421 if (!(pf->hw_features & I40E_HW_STOPPABLE_FW_LLDP)) { 4422 dev_warn(&pf->pdev->dev, 4423 "Device does not support changing FW LLDP\n"); 4424 return -EOPNOTSUPP; 4425 } 4426 } 4427 4428 /* Now that we've checked to ensure that the new flags are valid, load 4429 * them into place. Since we only modify flags either (a) during 4430 * initialization or (b) while holding the RTNL lock, we don't need 4431 * anything fancy here. 4432 */ 4433 pf->flags = new_flags; 4434 4435 /* Process any additional changes needed as a result of flag changes. 4436 * The changed_flags value reflects the list of bits that were 4437 * changed in the code above. 4438 */ 4439 4440 /* Flush current ATR settings if ATR was disabled */ 4441 if ((changed_flags & I40E_FLAG_FD_ATR_ENABLED) && 4442 !(pf->flags & I40E_FLAG_FD_ATR_ENABLED)) { 4443 set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state); 4444 set_bit(__I40E_FD_FLUSH_REQUESTED, pf->state); 4445 } 4446 4447 if (changed_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT) { 4448 u16 sw_flags = 0, valid_flags = 0; 4449 int ret; 4450 4451 if (!(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) 4452 sw_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 4453 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 4454 ret = i40e_aq_set_switch_config(&pf->hw, sw_flags, valid_flags, 4455 0, NULL); 4456 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) { 4457 dev_info(&pf->pdev->dev, 4458 "couldn't set switch config bits, err %s aq_err %s\n", 4459 i40e_stat_str(&pf->hw, ret), 4460 i40e_aq_str(&pf->hw, 4461 pf->hw.aq.asq_last_status)); 4462 /* not a fatal problem, just keep going */ 4463 } 4464 } 4465 4466 if ((changed_flags & pf->flags & 4467 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED) && 4468 (pf->flags & I40E_FLAG_MFP_ENABLED)) 4469 dev_warn(&pf->pdev->dev, 4470 "Turning on link-down-on-close flag may affect other partitions\n"); 4471 4472 if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) { 4473 if (pf->flags & I40E_FLAG_DISABLE_FW_LLDP) { 4474 struct i40e_dcbx_config *dcbcfg; 4475 int i; 4476 4477 i40e_aq_stop_lldp(&pf->hw, true, NULL); 4478 i40e_aq_set_dcb_parameters(&pf->hw, true, NULL); 4479 /* reset local_dcbx_config to default */ 4480 dcbcfg = &pf->hw.local_dcbx_config; 4481 dcbcfg->etscfg.willing = 1; 4482 dcbcfg->etscfg.maxtcs = 0; 4483 dcbcfg->etscfg.tcbwtable[0] = 100; 4484 for (i = 1; i < I40E_MAX_TRAFFIC_CLASS; i++) 4485 dcbcfg->etscfg.tcbwtable[i] = 0; 4486 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) 4487 dcbcfg->etscfg.prioritytable[i] = 0; 4488 dcbcfg->etscfg.tsatable[0] = I40E_IEEE_TSA_ETS; 4489 dcbcfg->pfc.willing = 1; 4490 dcbcfg->pfc.pfccap = I40E_MAX_TRAFFIC_CLASS; 4491 } else { 4492 i40e_aq_start_lldp(&pf->hw, NULL); 4493 } 4494 } 4495 4496 /* Issue reset to cause things to take effect, as additional bits 4497 * are added we will need to create a mask of bits requiring reset 4498 */ 4499 if (changed_flags & (I40E_FLAG_VEB_STATS_ENABLED | 4500 I40E_FLAG_LEGACY_RX | 4501 I40E_FLAG_SOURCE_PRUNING_DISABLED | 4502 I40E_FLAG_DISABLE_FW_LLDP)) 4503 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 4504 4505 return 0; 4506 } 4507 4508 /** 4509 * i40e_get_module_info - get (Q)SFP+ module type info 4510 * @netdev: network interface device structure 4511 * @modinfo: module EEPROM size and layout information structure 4512 **/ 4513 static int i40e_get_module_info(struct net_device *netdev, 4514 struct ethtool_modinfo *modinfo) 4515 { 4516 struct i40e_netdev_priv *np = netdev_priv(netdev); 4517 struct i40e_vsi *vsi = np->vsi; 4518 struct i40e_pf *pf = vsi->back; 4519 struct i40e_hw *hw = &pf->hw; 4520 u32 sff8472_comp = 0; 4521 u32 sff8472_swap = 0; 4522 u32 sff8636_rev = 0; 4523 i40e_status status; 4524 u32 type = 0; 4525 4526 /* Check if firmware supports reading module EEPROM. */ 4527 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) { 4528 netdev_err(vsi->netdev, "Module EEPROM memory read not supported. Please update the NVM image.\n"); 4529 return -EINVAL; 4530 } 4531 4532 status = i40e_update_link_info(hw); 4533 if (status) 4534 return -EIO; 4535 4536 if (hw->phy.link_info.phy_type == I40E_PHY_TYPE_EMPTY) { 4537 netdev_err(vsi->netdev, "Cannot read module EEPROM memory. No module connected.\n"); 4538 return -EINVAL; 4539 } 4540 4541 type = hw->phy.link_info.module_type[0]; 4542 4543 switch (type) { 4544 case I40E_MODULE_TYPE_SFP: 4545 status = i40e_aq_get_phy_register(hw, 4546 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4547 I40E_I2C_EEPROM_DEV_ADDR, 4548 I40E_MODULE_SFF_8472_COMP, 4549 &sff8472_comp, NULL); 4550 if (status) 4551 return -EIO; 4552 4553 status = i40e_aq_get_phy_register(hw, 4554 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4555 I40E_I2C_EEPROM_DEV_ADDR, 4556 I40E_MODULE_SFF_8472_SWAP, 4557 &sff8472_swap, NULL); 4558 if (status) 4559 return -EIO; 4560 4561 /* Check if the module requires address swap to access 4562 * the other EEPROM memory page. 4563 */ 4564 if (sff8472_swap & I40E_MODULE_SFF_ADDR_MODE) { 4565 netdev_warn(vsi->netdev, "Module address swap to access page 0xA2 is not supported.\n"); 4566 modinfo->type = ETH_MODULE_SFF_8079; 4567 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 4568 } else if (sff8472_comp == 0x00) { 4569 /* Module is not SFF-8472 compliant */ 4570 modinfo->type = ETH_MODULE_SFF_8079; 4571 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 4572 } else { 4573 modinfo->type = ETH_MODULE_SFF_8472; 4574 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 4575 } 4576 break; 4577 case I40E_MODULE_TYPE_QSFP_PLUS: 4578 /* Read from memory page 0. */ 4579 status = i40e_aq_get_phy_register(hw, 4580 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4581 0, 4582 I40E_MODULE_REVISION_ADDR, 4583 &sff8636_rev, NULL); 4584 if (status) 4585 return -EIO; 4586 /* Determine revision compliance byte */ 4587 if (sff8636_rev > 0x02) { 4588 /* Module is SFF-8636 compliant */ 4589 modinfo->type = ETH_MODULE_SFF_8636; 4590 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 4591 } else { 4592 modinfo->type = ETH_MODULE_SFF_8436; 4593 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 4594 } 4595 break; 4596 case I40E_MODULE_TYPE_QSFP28: 4597 modinfo->type = ETH_MODULE_SFF_8636; 4598 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 4599 break; 4600 default: 4601 netdev_err(vsi->netdev, "Module type unrecognized\n"); 4602 return -EINVAL; 4603 } 4604 return 0; 4605 } 4606 4607 /** 4608 * i40e_get_module_eeprom - fills buffer with (Q)SFP+ module memory contents 4609 * @netdev: network interface device structure 4610 * @ee: EEPROM dump request structure 4611 * @data: buffer to be filled with EEPROM contents 4612 **/ 4613 static int i40e_get_module_eeprom(struct net_device *netdev, 4614 struct ethtool_eeprom *ee, 4615 u8 *data) 4616 { 4617 struct i40e_netdev_priv *np = netdev_priv(netdev); 4618 struct i40e_vsi *vsi = np->vsi; 4619 struct i40e_pf *pf = vsi->back; 4620 struct i40e_hw *hw = &pf->hw; 4621 bool is_sfp = false; 4622 i40e_status status; 4623 u32 value = 0; 4624 int i; 4625 4626 if (!ee || !ee->len || !data) 4627 return -EINVAL; 4628 4629 if (hw->phy.link_info.module_type[0] == I40E_MODULE_TYPE_SFP) 4630 is_sfp = true; 4631 4632 for (i = 0; i < ee->len; i++) { 4633 u32 offset = i + ee->offset; 4634 u32 addr = is_sfp ? I40E_I2C_EEPROM_DEV_ADDR : 0; 4635 4636 /* Check if we need to access the other memory page */ 4637 if (is_sfp) { 4638 if (offset >= ETH_MODULE_SFF_8079_LEN) { 4639 offset -= ETH_MODULE_SFF_8079_LEN; 4640 addr = I40E_I2C_EEPROM_DEV_ADDR2; 4641 } 4642 } else { 4643 while (offset >= ETH_MODULE_SFF_8436_LEN) { 4644 /* Compute memory page number and offset. */ 4645 offset -= ETH_MODULE_SFF_8436_LEN / 2; 4646 addr++; 4647 } 4648 } 4649 4650 status = i40e_aq_get_phy_register(hw, 4651 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4652 addr, offset, &value, NULL); 4653 if (status) 4654 return -EIO; 4655 data[i] = value; 4656 } 4657 return 0; 4658 } 4659 4660 static const struct ethtool_ops i40e_ethtool_ops = { 4661 .get_drvinfo = i40e_get_drvinfo, 4662 .get_regs_len = i40e_get_regs_len, 4663 .get_regs = i40e_get_regs, 4664 .nway_reset = i40e_nway_reset, 4665 .get_link = ethtool_op_get_link, 4666 .get_wol = i40e_get_wol, 4667 .set_wol = i40e_set_wol, 4668 .set_eeprom = i40e_set_eeprom, 4669 .get_eeprom_len = i40e_get_eeprom_len, 4670 .get_eeprom = i40e_get_eeprom, 4671 .get_ringparam = i40e_get_ringparam, 4672 .set_ringparam = i40e_set_ringparam, 4673 .get_pauseparam = i40e_get_pauseparam, 4674 .set_pauseparam = i40e_set_pauseparam, 4675 .get_msglevel = i40e_get_msglevel, 4676 .set_msglevel = i40e_set_msglevel, 4677 .get_rxnfc = i40e_get_rxnfc, 4678 .set_rxnfc = i40e_set_rxnfc, 4679 .self_test = i40e_diag_test, 4680 .get_strings = i40e_get_strings, 4681 .set_phys_id = i40e_set_phys_id, 4682 .get_sset_count = i40e_get_sset_count, 4683 .get_ethtool_stats = i40e_get_ethtool_stats, 4684 .get_coalesce = i40e_get_coalesce, 4685 .set_coalesce = i40e_set_coalesce, 4686 .get_rxfh_key_size = i40e_get_rxfh_key_size, 4687 .get_rxfh_indir_size = i40e_get_rxfh_indir_size, 4688 .get_rxfh = i40e_get_rxfh, 4689 .set_rxfh = i40e_set_rxfh, 4690 .get_channels = i40e_get_channels, 4691 .set_channels = i40e_set_channels, 4692 .get_module_info = i40e_get_module_info, 4693 .get_module_eeprom = i40e_get_module_eeprom, 4694 .get_ts_info = i40e_get_ts_info, 4695 .get_priv_flags = i40e_get_priv_flags, 4696 .set_priv_flags = i40e_set_priv_flags, 4697 .get_per_queue_coalesce = i40e_get_per_queue_coalesce, 4698 .set_per_queue_coalesce = i40e_set_per_queue_coalesce, 4699 .get_link_ksettings = i40e_get_link_ksettings, 4700 .set_link_ksettings = i40e_set_link_ksettings, 4701 }; 4702 4703 void i40e_set_ethtool_ops(struct net_device *netdev) 4704 { 4705 netdev->ethtool_ops = &i40e_ethtool_ops; 4706 } 4707