1 /******************************************************************************* 2 * 3 * Intel Ethernet Controller XL710 Family Linux Driver 4 * Copyright(c) 2013 - 2016 Intel Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 * You should have received a copy of the GNU General Public License along 16 * with this program. If not, see <http://www.gnu.org/licenses/>. 17 * 18 * The full GNU General Public License is included in this distribution in 19 * the file called "COPYING". 20 * 21 * Contact Information: 22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 24 * 25 ******************************************************************************/ 26 27 /* ethtool support for i40e */ 28 29 #include "i40e.h" 30 #include "i40e_diag.h" 31 32 struct i40e_stats { 33 char stat_string[ETH_GSTRING_LEN]; 34 int sizeof_stat; 35 int stat_offset; 36 }; 37 38 #define I40E_STAT(_type, _name, _stat) { \ 39 .stat_string = _name, \ 40 .sizeof_stat = FIELD_SIZEOF(_type, _stat), \ 41 .stat_offset = offsetof(_type, _stat) \ 42 } 43 44 #define I40E_NETDEV_STAT(_net_stat) \ 45 I40E_STAT(struct rtnl_link_stats64, #_net_stat, _net_stat) 46 #define I40E_PF_STAT(_name, _stat) \ 47 I40E_STAT(struct i40e_pf, _name, _stat) 48 #define I40E_VSI_STAT(_name, _stat) \ 49 I40E_STAT(struct i40e_vsi, _name, _stat) 50 #define I40E_VEB_STAT(_name, _stat) \ 51 I40E_STAT(struct i40e_veb, _name, _stat) 52 53 static const struct i40e_stats i40e_gstrings_net_stats[] = { 54 I40E_NETDEV_STAT(rx_packets), 55 I40E_NETDEV_STAT(tx_packets), 56 I40E_NETDEV_STAT(rx_bytes), 57 I40E_NETDEV_STAT(tx_bytes), 58 I40E_NETDEV_STAT(rx_errors), 59 I40E_NETDEV_STAT(tx_errors), 60 I40E_NETDEV_STAT(rx_dropped), 61 I40E_NETDEV_STAT(tx_dropped), 62 I40E_NETDEV_STAT(collisions), 63 I40E_NETDEV_STAT(rx_length_errors), 64 I40E_NETDEV_STAT(rx_crc_errors), 65 }; 66 67 static const struct i40e_stats i40e_gstrings_veb_stats[] = { 68 I40E_VEB_STAT("rx_bytes", stats.rx_bytes), 69 I40E_VEB_STAT("tx_bytes", stats.tx_bytes), 70 I40E_VEB_STAT("rx_unicast", stats.rx_unicast), 71 I40E_VEB_STAT("tx_unicast", stats.tx_unicast), 72 I40E_VEB_STAT("rx_multicast", stats.rx_multicast), 73 I40E_VEB_STAT("tx_multicast", stats.tx_multicast), 74 I40E_VEB_STAT("rx_broadcast", stats.rx_broadcast), 75 I40E_VEB_STAT("tx_broadcast", stats.tx_broadcast), 76 I40E_VEB_STAT("rx_discards", stats.rx_discards), 77 I40E_VEB_STAT("tx_discards", stats.tx_discards), 78 I40E_VEB_STAT("tx_errors", stats.tx_errors), 79 I40E_VEB_STAT("rx_unknown_protocol", stats.rx_unknown_protocol), 80 }; 81 82 static const struct i40e_stats i40e_gstrings_misc_stats[] = { 83 I40E_VSI_STAT("rx_unicast", eth_stats.rx_unicast), 84 I40E_VSI_STAT("tx_unicast", eth_stats.tx_unicast), 85 I40E_VSI_STAT("rx_multicast", eth_stats.rx_multicast), 86 I40E_VSI_STAT("tx_multicast", eth_stats.tx_multicast), 87 I40E_VSI_STAT("rx_broadcast", eth_stats.rx_broadcast), 88 I40E_VSI_STAT("tx_broadcast", eth_stats.tx_broadcast), 89 I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol), 90 I40E_VSI_STAT("tx_linearize", tx_linearize), 91 I40E_VSI_STAT("tx_force_wb", tx_force_wb), 92 I40E_VSI_STAT("rx_alloc_fail", rx_buf_failed), 93 I40E_VSI_STAT("rx_pg_alloc_fail", rx_page_failed), 94 }; 95 96 /* These PF_STATs might look like duplicates of some NETDEV_STATs, 97 * but they are separate. This device supports Virtualization, and 98 * as such might have several netdevs supporting VMDq and FCoE going 99 * through a single port. The NETDEV_STATs are for individual netdevs 100 * seen at the top of the stack, and the PF_STATs are for the physical 101 * function at the bottom of the stack hosting those netdevs. 102 * 103 * The PF_STATs are appended to the netdev stats only when ethtool -S 104 * is queried on the base PF netdev, not on the VMDq or FCoE netdev. 105 */ 106 static const struct i40e_stats i40e_gstrings_stats[] = { 107 I40E_PF_STAT("rx_bytes", stats.eth.rx_bytes), 108 I40E_PF_STAT("tx_bytes", stats.eth.tx_bytes), 109 I40E_PF_STAT("rx_unicast", stats.eth.rx_unicast), 110 I40E_PF_STAT("tx_unicast", stats.eth.tx_unicast), 111 I40E_PF_STAT("rx_multicast", stats.eth.rx_multicast), 112 I40E_PF_STAT("tx_multicast", stats.eth.tx_multicast), 113 I40E_PF_STAT("rx_broadcast", stats.eth.rx_broadcast), 114 I40E_PF_STAT("tx_broadcast", stats.eth.tx_broadcast), 115 I40E_PF_STAT("tx_errors", stats.eth.tx_errors), 116 I40E_PF_STAT("rx_dropped", stats.eth.rx_discards), 117 I40E_PF_STAT("tx_dropped_link_down", stats.tx_dropped_link_down), 118 I40E_PF_STAT("rx_crc_errors", stats.crc_errors), 119 I40E_PF_STAT("illegal_bytes", stats.illegal_bytes), 120 I40E_PF_STAT("mac_local_faults", stats.mac_local_faults), 121 I40E_PF_STAT("mac_remote_faults", stats.mac_remote_faults), 122 I40E_PF_STAT("tx_timeout", tx_timeout_count), 123 I40E_PF_STAT("rx_csum_bad", hw_csum_rx_error), 124 I40E_PF_STAT("rx_length_errors", stats.rx_length_errors), 125 I40E_PF_STAT("link_xon_rx", stats.link_xon_rx), 126 I40E_PF_STAT("link_xoff_rx", stats.link_xoff_rx), 127 I40E_PF_STAT("link_xon_tx", stats.link_xon_tx), 128 I40E_PF_STAT("link_xoff_tx", stats.link_xoff_tx), 129 I40E_PF_STAT("rx_size_64", stats.rx_size_64), 130 I40E_PF_STAT("rx_size_127", stats.rx_size_127), 131 I40E_PF_STAT("rx_size_255", stats.rx_size_255), 132 I40E_PF_STAT("rx_size_511", stats.rx_size_511), 133 I40E_PF_STAT("rx_size_1023", stats.rx_size_1023), 134 I40E_PF_STAT("rx_size_1522", stats.rx_size_1522), 135 I40E_PF_STAT("rx_size_big", stats.rx_size_big), 136 I40E_PF_STAT("tx_size_64", stats.tx_size_64), 137 I40E_PF_STAT("tx_size_127", stats.tx_size_127), 138 I40E_PF_STAT("tx_size_255", stats.tx_size_255), 139 I40E_PF_STAT("tx_size_511", stats.tx_size_511), 140 I40E_PF_STAT("tx_size_1023", stats.tx_size_1023), 141 I40E_PF_STAT("tx_size_1522", stats.tx_size_1522), 142 I40E_PF_STAT("tx_size_big", stats.tx_size_big), 143 I40E_PF_STAT("rx_undersize", stats.rx_undersize), 144 I40E_PF_STAT("rx_fragments", stats.rx_fragments), 145 I40E_PF_STAT("rx_oversize", stats.rx_oversize), 146 I40E_PF_STAT("rx_jabber", stats.rx_jabber), 147 I40E_PF_STAT("VF_admin_queue_requests", vf_aq_requests), 148 I40E_PF_STAT("arq_overflows", arq_overflows), 149 I40E_PF_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared), 150 I40E_PF_STAT("tx_hwtstamp_skipped", tx_hwtstamp_skipped), 151 I40E_PF_STAT("fdir_flush_cnt", fd_flush_cnt), 152 I40E_PF_STAT("fdir_atr_match", stats.fd_atr_match), 153 I40E_PF_STAT("fdir_atr_tunnel_match", stats.fd_atr_tunnel_match), 154 I40E_PF_STAT("fdir_atr_status", stats.fd_atr_status), 155 I40E_PF_STAT("fdir_sb_match", stats.fd_sb_match), 156 I40E_PF_STAT("fdir_sb_status", stats.fd_sb_status), 157 158 /* LPI stats */ 159 I40E_PF_STAT("tx_lpi_status", stats.tx_lpi_status), 160 I40E_PF_STAT("rx_lpi_status", stats.rx_lpi_status), 161 I40E_PF_STAT("tx_lpi_count", stats.tx_lpi_count), 162 I40E_PF_STAT("rx_lpi_count", stats.rx_lpi_count), 163 }; 164 165 #define I40E_QUEUE_STATS_LEN(n) \ 166 (((struct i40e_netdev_priv *)netdev_priv((n)))->vsi->num_queue_pairs \ 167 * 2 /* Tx and Rx together */ \ 168 * (sizeof(struct i40e_queue_stats) / sizeof(u64))) 169 #define I40E_GLOBAL_STATS_LEN ARRAY_SIZE(i40e_gstrings_stats) 170 #define I40E_NETDEV_STATS_LEN ARRAY_SIZE(i40e_gstrings_net_stats) 171 #define I40E_MISC_STATS_LEN ARRAY_SIZE(i40e_gstrings_misc_stats) 172 #define I40E_VSI_STATS_LEN(n) (I40E_NETDEV_STATS_LEN + \ 173 I40E_MISC_STATS_LEN + \ 174 I40E_QUEUE_STATS_LEN((n))) 175 #define I40E_PFC_STATS_LEN ( \ 176 (FIELD_SIZEOF(struct i40e_pf, stats.priority_xoff_rx) + \ 177 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_rx) + \ 178 FIELD_SIZEOF(struct i40e_pf, stats.priority_xoff_tx) + \ 179 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_tx) + \ 180 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_2_xoff)) \ 181 / sizeof(u64)) 182 #define I40E_VEB_TC_STATS_LEN ( \ 183 (FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_rx_packets) + \ 184 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_rx_bytes) + \ 185 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_tx_packets) + \ 186 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_tx_bytes)) \ 187 / sizeof(u64)) 188 #define I40E_VEB_STATS_LEN ARRAY_SIZE(i40e_gstrings_veb_stats) 189 #define I40E_VEB_STATS_TOTAL (I40E_VEB_STATS_LEN + I40E_VEB_TC_STATS_LEN) 190 #define I40E_PF_STATS_LEN(n) (I40E_GLOBAL_STATS_LEN + \ 191 I40E_PFC_STATS_LEN + \ 192 I40E_VSI_STATS_LEN((n))) 193 194 enum i40e_ethtool_test_id { 195 I40E_ETH_TEST_REG = 0, 196 I40E_ETH_TEST_EEPROM, 197 I40E_ETH_TEST_INTR, 198 I40E_ETH_TEST_LINK, 199 }; 200 201 static const char i40e_gstrings_test[][ETH_GSTRING_LEN] = { 202 "Register test (offline)", 203 "Eeprom test (offline)", 204 "Interrupt test (offline)", 205 "Link test (on/offline)" 206 }; 207 208 #define I40E_TEST_LEN (sizeof(i40e_gstrings_test) / ETH_GSTRING_LEN) 209 210 struct i40e_priv_flags { 211 char flag_string[ETH_GSTRING_LEN]; 212 u64 flag; 213 bool read_only; 214 }; 215 216 #define I40E_PRIV_FLAG(_name, _flag, _read_only) { \ 217 .flag_string = _name, \ 218 .flag = _flag, \ 219 .read_only = _read_only, \ 220 } 221 222 static const struct i40e_priv_flags i40e_gstrings_priv_flags[] = { 223 /* NOTE: MFP setting cannot be changed */ 224 I40E_PRIV_FLAG("MFP", I40E_FLAG_MFP_ENABLED, 1), 225 I40E_PRIV_FLAG("LinkPolling", I40E_FLAG_LINK_POLLING_ENABLED, 0), 226 I40E_PRIV_FLAG("flow-director-atr", I40E_FLAG_FD_ATR_ENABLED, 0), 227 I40E_PRIV_FLAG("veb-stats", I40E_FLAG_VEB_STATS_ENABLED, 0), 228 I40E_PRIV_FLAG("hw-atr-eviction", I40E_FLAG_HW_ATR_EVICT_ENABLED, 0), 229 I40E_PRIV_FLAG("legacy-rx", I40E_FLAG_LEGACY_RX, 0), 230 I40E_PRIV_FLAG("disable-source-pruning", 231 I40E_FLAG_SOURCE_PRUNING_DISABLED, 0), 232 }; 233 234 #define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gstrings_priv_flags) 235 236 /* Private flags with a global effect, restricted to PF 0 */ 237 static const struct i40e_priv_flags i40e_gl_gstrings_priv_flags[] = { 238 I40E_PRIV_FLAG("vf-true-promisc-support", 239 I40E_FLAG_TRUE_PROMISC_SUPPORT, 0), 240 }; 241 242 #define I40E_GL_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gl_gstrings_priv_flags) 243 244 /** 245 * i40e_partition_setting_complaint - generic complaint for MFP restriction 246 * @pf: the PF struct 247 **/ 248 static void i40e_partition_setting_complaint(struct i40e_pf *pf) 249 { 250 dev_info(&pf->pdev->dev, 251 "The link settings are allowed to be changed only from the first partition of a given port. Please switch to the first partition in order to change the setting.\n"); 252 } 253 254 /** 255 * i40e_phy_type_to_ethtool - convert the phy_types to ethtool link modes 256 * @phy_types: PHY types to convert 257 * @supported: pointer to the ethtool supported variable to fill in 258 * @advertising: pointer to the ethtool advertising variable to fill in 259 * 260 **/ 261 static void i40e_phy_type_to_ethtool(struct i40e_pf *pf, u32 *supported, 262 u32 *advertising) 263 { 264 struct i40e_link_status *hw_link_info = &pf->hw.phy.link_info; 265 u64 phy_types = pf->hw.phy.phy_types; 266 267 *supported = 0x0; 268 *advertising = 0x0; 269 270 if (phy_types & I40E_CAP_PHY_TYPE_SGMII) { 271 *supported |= SUPPORTED_Autoneg | 272 SUPPORTED_1000baseT_Full; 273 *advertising |= ADVERTISED_Autoneg; 274 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 275 *advertising |= ADVERTISED_1000baseT_Full; 276 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) { 277 *supported |= SUPPORTED_100baseT_Full; 278 *advertising |= ADVERTISED_100baseT_Full; 279 } 280 } 281 if (phy_types & I40E_CAP_PHY_TYPE_XAUI || 282 phy_types & I40E_CAP_PHY_TYPE_XFI || 283 phy_types & I40E_CAP_PHY_TYPE_SFI || 284 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SFPP_CU || 285 phy_types & I40E_CAP_PHY_TYPE_10GBASE_AOC) 286 *supported |= SUPPORTED_10000baseT_Full; 287 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU || 288 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 || 289 phy_types & I40E_CAP_PHY_TYPE_10GBASE_T || 290 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR || 291 phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR) { 292 *supported |= SUPPORTED_Autoneg | 293 SUPPORTED_10000baseT_Full; 294 *advertising |= ADVERTISED_Autoneg; 295 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 296 *advertising |= ADVERTISED_10000baseT_Full; 297 } 298 if (phy_types & I40E_CAP_PHY_TYPE_XLAUI || 299 phy_types & I40E_CAP_PHY_TYPE_XLPPI || 300 phy_types & I40E_CAP_PHY_TYPE_40GBASE_AOC) 301 *supported |= SUPPORTED_40000baseCR4_Full; 302 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU || 303 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4) { 304 *supported |= SUPPORTED_Autoneg | 305 SUPPORTED_40000baseCR4_Full; 306 *advertising |= ADVERTISED_Autoneg; 307 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_40GB) 308 *advertising |= ADVERTISED_40000baseCR4_Full; 309 } 310 if (phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) { 311 *supported |= SUPPORTED_Autoneg | 312 SUPPORTED_100baseT_Full; 313 *advertising |= ADVERTISED_Autoneg; 314 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 315 *advertising |= ADVERTISED_100baseT_Full; 316 } 317 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_T || 318 phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX || 319 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX || 320 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL) { 321 *supported |= SUPPORTED_Autoneg | 322 SUPPORTED_1000baseT_Full; 323 *advertising |= ADVERTISED_Autoneg; 324 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 325 *advertising |= ADVERTISED_1000baseT_Full; 326 } 327 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_SR4) 328 *supported |= SUPPORTED_40000baseSR4_Full; 329 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_LR4) 330 *supported |= SUPPORTED_40000baseLR4_Full; 331 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4) { 332 *supported |= SUPPORTED_40000baseKR4_Full | 333 SUPPORTED_Autoneg; 334 *advertising |= ADVERTISED_40000baseKR4_Full | 335 ADVERTISED_Autoneg; 336 } 337 if (phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2) { 338 *supported |= SUPPORTED_20000baseKR2_Full | 339 SUPPORTED_Autoneg; 340 *advertising |= ADVERTISED_Autoneg; 341 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_20GB) 342 *advertising |= ADVERTISED_20000baseKR2_Full; 343 } 344 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR) { 345 if (!(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) 346 *supported |= SUPPORTED_10000baseKR_Full | 347 SUPPORTED_Autoneg; 348 *advertising |= ADVERTISED_Autoneg; 349 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 350 if (!(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) 351 *advertising |= ADVERTISED_10000baseKR_Full; 352 } 353 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4) { 354 *supported |= SUPPORTED_10000baseKX4_Full | 355 SUPPORTED_Autoneg; 356 *advertising |= ADVERTISED_Autoneg; 357 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 358 *advertising |= ADVERTISED_10000baseKX4_Full; 359 } 360 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX) { 361 if (!(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) 362 *supported |= SUPPORTED_1000baseKX_Full | 363 SUPPORTED_Autoneg; 364 *advertising |= ADVERTISED_Autoneg; 365 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 366 if (!(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) 367 *advertising |= ADVERTISED_1000baseKX_Full; 368 } 369 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR || 370 phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR || 371 phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 372 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR) { 373 *supported |= SUPPORTED_Autoneg; 374 *advertising |= ADVERTISED_Autoneg; 375 } 376 } 377 378 /** 379 * i40e_get_settings_link_up - Get the Link settings for when link is up 380 * @hw: hw structure 381 * @ecmd: ethtool command to fill in 382 * @netdev: network interface device structure 383 * 384 **/ 385 static void i40e_get_settings_link_up(struct i40e_hw *hw, 386 struct ethtool_link_ksettings *cmd, 387 struct net_device *netdev, 388 struct i40e_pf *pf) 389 { 390 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 391 u32 link_speed = hw_link_info->link_speed; 392 u32 e_advertising = 0x0; 393 u32 e_supported = 0x0; 394 u32 supported, advertising; 395 396 ethtool_convert_link_mode_to_legacy_u32(&supported, 397 cmd->link_modes.supported); 398 ethtool_convert_link_mode_to_legacy_u32(&advertising, 399 cmd->link_modes.advertising); 400 401 /* Initialize supported and advertised settings based on phy settings */ 402 switch (hw_link_info->phy_type) { 403 case I40E_PHY_TYPE_40GBASE_CR4: 404 case I40E_PHY_TYPE_40GBASE_CR4_CU: 405 supported = SUPPORTED_Autoneg | 406 SUPPORTED_40000baseCR4_Full; 407 advertising = ADVERTISED_Autoneg | 408 ADVERTISED_40000baseCR4_Full; 409 break; 410 case I40E_PHY_TYPE_XLAUI: 411 case I40E_PHY_TYPE_XLPPI: 412 case I40E_PHY_TYPE_40GBASE_AOC: 413 supported = SUPPORTED_40000baseCR4_Full; 414 break; 415 case I40E_PHY_TYPE_40GBASE_SR4: 416 supported = SUPPORTED_40000baseSR4_Full; 417 break; 418 case I40E_PHY_TYPE_40GBASE_LR4: 419 supported = SUPPORTED_40000baseLR4_Full; 420 break; 421 case I40E_PHY_TYPE_10GBASE_SR: 422 case I40E_PHY_TYPE_10GBASE_LR: 423 case I40E_PHY_TYPE_1000BASE_SX: 424 case I40E_PHY_TYPE_1000BASE_LX: 425 supported = SUPPORTED_10000baseT_Full; 426 if (hw_link_info->module_type[2] & 427 I40E_MODULE_TYPE_1000BASE_SX || 428 hw_link_info->module_type[2] & 429 I40E_MODULE_TYPE_1000BASE_LX) { 430 supported |= SUPPORTED_1000baseT_Full; 431 if (hw_link_info->requested_speeds & 432 I40E_LINK_SPEED_1GB) 433 advertising |= ADVERTISED_1000baseT_Full; 434 } 435 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 436 advertising |= ADVERTISED_10000baseT_Full; 437 break; 438 case I40E_PHY_TYPE_10GBASE_T: 439 case I40E_PHY_TYPE_1000BASE_T: 440 case I40E_PHY_TYPE_100BASE_TX: 441 supported = SUPPORTED_Autoneg | 442 SUPPORTED_10000baseT_Full | 443 SUPPORTED_1000baseT_Full | 444 SUPPORTED_100baseT_Full; 445 advertising = ADVERTISED_Autoneg; 446 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 447 advertising |= ADVERTISED_10000baseT_Full; 448 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 449 advertising |= ADVERTISED_1000baseT_Full; 450 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 451 advertising |= ADVERTISED_100baseT_Full; 452 break; 453 case I40E_PHY_TYPE_1000BASE_T_OPTICAL: 454 supported = SUPPORTED_Autoneg | 455 SUPPORTED_1000baseT_Full; 456 advertising = ADVERTISED_Autoneg | 457 ADVERTISED_1000baseT_Full; 458 break; 459 case I40E_PHY_TYPE_10GBASE_CR1_CU: 460 case I40E_PHY_TYPE_10GBASE_CR1: 461 supported = SUPPORTED_Autoneg | 462 SUPPORTED_10000baseT_Full; 463 advertising = ADVERTISED_Autoneg | 464 ADVERTISED_10000baseT_Full; 465 break; 466 case I40E_PHY_TYPE_XAUI: 467 case I40E_PHY_TYPE_XFI: 468 case I40E_PHY_TYPE_SFI: 469 case I40E_PHY_TYPE_10GBASE_SFPP_CU: 470 case I40E_PHY_TYPE_10GBASE_AOC: 471 supported = SUPPORTED_10000baseT_Full; 472 advertising = SUPPORTED_10000baseT_Full; 473 break; 474 case I40E_PHY_TYPE_SGMII: 475 supported = SUPPORTED_Autoneg | 476 SUPPORTED_1000baseT_Full; 477 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 478 advertising |= ADVERTISED_1000baseT_Full; 479 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) { 480 supported |= SUPPORTED_100baseT_Full; 481 if (hw_link_info->requested_speeds & 482 I40E_LINK_SPEED_100MB) 483 advertising |= ADVERTISED_100baseT_Full; 484 } 485 break; 486 case I40E_PHY_TYPE_40GBASE_KR4: 487 case I40E_PHY_TYPE_20GBASE_KR2: 488 case I40E_PHY_TYPE_10GBASE_KR: 489 case I40E_PHY_TYPE_10GBASE_KX4: 490 case I40E_PHY_TYPE_1000BASE_KX: 491 supported |= SUPPORTED_40000baseKR4_Full | 492 SUPPORTED_20000baseKR2_Full | 493 SUPPORTED_10000baseKR_Full | 494 SUPPORTED_10000baseKX4_Full | 495 SUPPORTED_1000baseKX_Full | 496 SUPPORTED_Autoneg; 497 advertising |= ADVERTISED_40000baseKR4_Full | 498 ADVERTISED_20000baseKR2_Full | 499 ADVERTISED_10000baseKR_Full | 500 ADVERTISED_10000baseKX4_Full | 501 ADVERTISED_1000baseKX_Full | 502 ADVERTISED_Autoneg; 503 break; 504 case I40E_PHY_TYPE_25GBASE_KR: 505 case I40E_PHY_TYPE_25GBASE_CR: 506 case I40E_PHY_TYPE_25GBASE_SR: 507 case I40E_PHY_TYPE_25GBASE_LR: 508 supported = SUPPORTED_Autoneg; 509 advertising = ADVERTISED_Autoneg; 510 /* TODO: add speeds when ethtool is ready to support*/ 511 break; 512 default: 513 /* if we got here and link is up something bad is afoot */ 514 netdev_info(netdev, "WARNING: Link is up but PHY type 0x%x is not recognized.\n", 515 hw_link_info->phy_type); 516 } 517 518 /* Now that we've worked out everything that could be supported by the 519 * current PHY type, get what is supported by the NVM and them to 520 * get what is truly supported 521 */ 522 i40e_phy_type_to_ethtool(pf, &e_supported, 523 &e_advertising); 524 525 supported = supported & e_supported; 526 advertising = advertising & e_advertising; 527 528 /* Set speed and duplex */ 529 switch (link_speed) { 530 case I40E_LINK_SPEED_40GB: 531 cmd->base.speed = SPEED_40000; 532 break; 533 case I40E_LINK_SPEED_25GB: 534 #ifdef SPEED_25000 535 cmd->base.speed = SPEED_25000; 536 #else 537 netdev_info(netdev, 538 "Speed is 25G, display not supported by this version of ethtool.\n"); 539 #endif 540 break; 541 case I40E_LINK_SPEED_20GB: 542 cmd->base.speed = SPEED_20000; 543 break; 544 case I40E_LINK_SPEED_10GB: 545 cmd->base.speed = SPEED_10000; 546 break; 547 case I40E_LINK_SPEED_1GB: 548 cmd->base.speed = SPEED_1000; 549 break; 550 case I40E_LINK_SPEED_100MB: 551 cmd->base.speed = SPEED_100; 552 break; 553 default: 554 break; 555 } 556 cmd->base.duplex = DUPLEX_FULL; 557 558 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported, 559 supported); 560 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising, 561 advertising); 562 } 563 564 /** 565 * i40e_get_settings_link_down - Get the Link settings for when link is down 566 * @hw: hw structure 567 * @ecmd: ethtool command to fill in 568 * 569 * Reports link settings that can be determined when link is down 570 **/ 571 static void i40e_get_settings_link_down(struct i40e_hw *hw, 572 struct ethtool_link_ksettings *cmd, 573 struct i40e_pf *pf) 574 { 575 u32 supported, advertising; 576 577 /* link is down and the driver needs to fall back on 578 * supported phy types to figure out what info to display 579 */ 580 i40e_phy_type_to_ethtool(pf, &supported, &advertising); 581 582 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported, 583 supported); 584 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising, 585 advertising); 586 587 /* With no link speed and duplex are unknown */ 588 cmd->base.speed = SPEED_UNKNOWN; 589 cmd->base.duplex = DUPLEX_UNKNOWN; 590 } 591 592 /** 593 * i40e_get_settings - Get Link Speed and Duplex settings 594 * @netdev: network interface device structure 595 * @ecmd: ethtool command 596 * 597 * Reports speed/duplex settings based on media_type 598 **/ 599 static int i40e_get_link_ksettings(struct net_device *netdev, 600 struct ethtool_link_ksettings *cmd) 601 { 602 struct i40e_netdev_priv *np = netdev_priv(netdev); 603 struct i40e_pf *pf = np->vsi->back; 604 struct i40e_hw *hw = &pf->hw; 605 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 606 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 607 u32 advertising; 608 609 if (link_up) 610 i40e_get_settings_link_up(hw, cmd, netdev, pf); 611 else 612 i40e_get_settings_link_down(hw, cmd, pf); 613 614 /* Now set the settings that don't rely on link being up/down */ 615 /* Set autoneg settings */ 616 cmd->base.autoneg = ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 617 AUTONEG_ENABLE : AUTONEG_DISABLE); 618 619 switch (hw->phy.media_type) { 620 case I40E_MEDIA_TYPE_BACKPLANE: 621 ethtool_link_ksettings_add_link_mode(cmd, supported, 622 Autoneg); 623 ethtool_link_ksettings_add_link_mode(cmd, supported, 624 Backplane); 625 ethtool_link_ksettings_add_link_mode(cmd, advertising, 626 Autoneg); 627 ethtool_link_ksettings_add_link_mode(cmd, advertising, 628 Backplane); 629 cmd->base.port = PORT_NONE; 630 break; 631 case I40E_MEDIA_TYPE_BASET: 632 ethtool_link_ksettings_add_link_mode(cmd, supported, TP); 633 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP); 634 cmd->base.port = PORT_TP; 635 break; 636 case I40E_MEDIA_TYPE_DA: 637 case I40E_MEDIA_TYPE_CX4: 638 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE); 639 ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE); 640 cmd->base.port = PORT_DA; 641 break; 642 case I40E_MEDIA_TYPE_FIBER: 643 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE); 644 cmd->base.port = PORT_FIBRE; 645 break; 646 case I40E_MEDIA_TYPE_UNKNOWN: 647 default: 648 cmd->base.port = PORT_OTHER; 649 break; 650 } 651 652 /* Set flow control settings */ 653 ethtool_link_ksettings_add_link_mode(cmd, supported, Pause); 654 655 switch (hw->fc.requested_mode) { 656 case I40E_FC_FULL: 657 ethtool_link_ksettings_add_link_mode(cmd, advertising, 658 Pause); 659 break; 660 case I40E_FC_TX_PAUSE: 661 ethtool_link_ksettings_add_link_mode(cmd, advertising, 662 Asym_Pause); 663 break; 664 case I40E_FC_RX_PAUSE: 665 ethtool_link_ksettings_add_link_mode(cmd, advertising, 666 Pause); 667 ethtool_link_ksettings_add_link_mode(cmd, advertising, 668 Asym_Pause); 669 break; 670 default: 671 ethtool_convert_link_mode_to_legacy_u32( 672 &advertising, cmd->link_modes.advertising); 673 674 advertising &= ~(ADVERTISED_Pause | ADVERTISED_Asym_Pause); 675 676 ethtool_convert_legacy_u32_to_link_mode( 677 cmd->link_modes.advertising, advertising); 678 break; 679 } 680 681 return 0; 682 } 683 684 /** 685 * i40e_set_settings - Set Speed and Duplex 686 * @netdev: network interface device structure 687 * @ecmd: ethtool command 688 * 689 * Set speed/duplex per media_types advertised/forced 690 **/ 691 static int i40e_set_link_ksettings(struct net_device *netdev, 692 const struct ethtool_link_ksettings *cmd) 693 { 694 struct i40e_netdev_priv *np = netdev_priv(netdev); 695 struct i40e_aq_get_phy_abilities_resp abilities; 696 struct i40e_aq_set_phy_config config; 697 struct i40e_pf *pf = np->vsi->back; 698 struct i40e_vsi *vsi = np->vsi; 699 struct i40e_hw *hw = &pf->hw; 700 struct ethtool_link_ksettings safe_cmd; 701 struct ethtool_link_ksettings copy_cmd; 702 i40e_status status = 0; 703 bool change = false; 704 int timeout = 50; 705 int err = 0; 706 u32 autoneg; 707 u32 advertise; 708 u32 tmp; 709 710 /* Changing port settings is not supported if this isn't the 711 * port's controlling PF 712 */ 713 if (hw->partition_id != 1) { 714 i40e_partition_setting_complaint(pf); 715 return -EOPNOTSUPP; 716 } 717 718 if (vsi != pf->vsi[pf->lan_vsi]) 719 return -EOPNOTSUPP; 720 721 if (hw->phy.media_type != I40E_MEDIA_TYPE_BASET && 722 hw->phy.media_type != I40E_MEDIA_TYPE_FIBER && 723 hw->phy.media_type != I40E_MEDIA_TYPE_BACKPLANE && 724 hw->phy.media_type != I40E_MEDIA_TYPE_DA && 725 hw->phy.link_info.link_info & I40E_AQ_LINK_UP) 726 return -EOPNOTSUPP; 727 728 if (hw->device_id == I40E_DEV_ID_KX_B || 729 hw->device_id == I40E_DEV_ID_KX_C || 730 hw->device_id == I40E_DEV_ID_20G_KR2 || 731 hw->device_id == I40E_DEV_ID_20G_KR2_A) { 732 netdev_info(netdev, "Changing settings is not supported on backplane.\n"); 733 return -EOPNOTSUPP; 734 } 735 736 /* copy the cmd to copy_cmd to avoid modifying the origin */ 737 memcpy(©_cmd, cmd, sizeof(struct ethtool_link_ksettings)); 738 739 /* get our own copy of the bits to check against */ 740 memset(&safe_cmd, 0, sizeof(struct ethtool_link_ksettings)); 741 i40e_get_link_ksettings(netdev, &safe_cmd); 742 743 /* save autoneg and speed out of cmd */ 744 autoneg = cmd->base.autoneg; 745 ethtool_convert_link_mode_to_legacy_u32(&advertise, 746 cmd->link_modes.advertising); 747 748 /* set autoneg and speed back to what they currently are */ 749 copy_cmd.base.autoneg = safe_cmd.base.autoneg; 750 ethtool_convert_link_mode_to_legacy_u32( 751 &tmp, safe_cmd.link_modes.advertising); 752 ethtool_convert_legacy_u32_to_link_mode( 753 copy_cmd.link_modes.advertising, tmp); 754 755 copy_cmd.base.cmd = safe_cmd.base.cmd; 756 757 /* If copy_cmd and safe_cmd are not the same now, then they are 758 * trying to set something that we do not support 759 */ 760 if (memcmp(©_cmd, &safe_cmd, sizeof(struct ethtool_link_ksettings))) 761 return -EOPNOTSUPP; 762 763 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) { 764 timeout--; 765 if (!timeout) 766 return -EBUSY; 767 usleep_range(1000, 2000); 768 } 769 770 /* Get the current phy config */ 771 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, 772 NULL); 773 if (status) { 774 err = -EAGAIN; 775 goto done; 776 } 777 778 /* Copy abilities to config in case autoneg is not 779 * set below 780 */ 781 memset(&config, 0, sizeof(struct i40e_aq_set_phy_config)); 782 config.abilities = abilities.abilities; 783 784 /* Check autoneg */ 785 if (autoneg == AUTONEG_ENABLE) { 786 /* If autoneg was not already enabled */ 787 if (!(hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED)) { 788 /* If autoneg is not supported, return error */ 789 if (!ethtool_link_ksettings_test_link_mode( 790 &safe_cmd, supported, Autoneg)) { 791 netdev_info(netdev, "Autoneg not supported on this phy\n"); 792 err = -EINVAL; 793 goto done; 794 } 795 /* Autoneg is allowed to change */ 796 config.abilities = abilities.abilities | 797 I40E_AQ_PHY_ENABLE_AN; 798 change = true; 799 } 800 } else { 801 /* If autoneg is currently enabled */ 802 if (hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED) { 803 /* If autoneg is supported 10GBASE_T is the only PHY 804 * that can disable it, so otherwise return error 805 */ 806 if (ethtool_link_ksettings_test_link_mode( 807 &safe_cmd, supported, Autoneg) && 808 hw->phy.link_info.phy_type != 809 I40E_PHY_TYPE_10GBASE_T) { 810 netdev_info(netdev, "Autoneg cannot be disabled on this phy\n"); 811 err = -EINVAL; 812 goto done; 813 } 814 /* Autoneg is allowed to change */ 815 config.abilities = abilities.abilities & 816 ~I40E_AQ_PHY_ENABLE_AN; 817 change = true; 818 } 819 } 820 821 ethtool_convert_link_mode_to_legacy_u32(&tmp, 822 safe_cmd.link_modes.supported); 823 if (advertise & ~tmp) { 824 err = -EINVAL; 825 goto done; 826 } 827 828 if (advertise & ADVERTISED_100baseT_Full) 829 config.link_speed |= I40E_LINK_SPEED_100MB; 830 if (advertise & ADVERTISED_1000baseT_Full || 831 advertise & ADVERTISED_1000baseKX_Full) 832 config.link_speed |= I40E_LINK_SPEED_1GB; 833 if (advertise & ADVERTISED_10000baseT_Full || 834 advertise & ADVERTISED_10000baseKX4_Full || 835 advertise & ADVERTISED_10000baseKR_Full) 836 config.link_speed |= I40E_LINK_SPEED_10GB; 837 if (advertise & ADVERTISED_20000baseKR2_Full) 838 config.link_speed |= I40E_LINK_SPEED_20GB; 839 if (advertise & ADVERTISED_40000baseKR4_Full || 840 advertise & ADVERTISED_40000baseCR4_Full || 841 advertise & ADVERTISED_40000baseSR4_Full || 842 advertise & ADVERTISED_40000baseLR4_Full) 843 config.link_speed |= I40E_LINK_SPEED_40GB; 844 845 /* If speed didn't get set, set it to what it currently is. 846 * This is needed because if advertise is 0 (as it is when autoneg 847 * is disabled) then speed won't get set. 848 */ 849 if (!config.link_speed) 850 config.link_speed = abilities.link_speed; 851 852 if (change || (abilities.link_speed != config.link_speed)) { 853 /* copy over the rest of the abilities */ 854 config.phy_type = abilities.phy_type; 855 config.phy_type_ext = abilities.phy_type_ext; 856 config.eee_capability = abilities.eee_capability; 857 config.eeer = abilities.eeer_val; 858 config.low_power_ctrl = abilities.d3_lpan; 859 config.fec_config = abilities.fec_cfg_curr_mod_ext_info & 860 I40E_AQ_PHY_FEC_CONFIG_MASK; 861 862 /* save the requested speeds */ 863 hw->phy.link_info.requested_speeds = config.link_speed; 864 /* set link and auto negotiation so changes take effect */ 865 config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK; 866 /* If link is up put link down */ 867 if (hw->phy.link_info.link_info & I40E_AQ_LINK_UP) { 868 /* Tell the OS link is going down, the link will go 869 * back up when fw says it is ready asynchronously 870 */ 871 i40e_print_link_message(vsi, false); 872 netif_carrier_off(netdev); 873 netif_tx_stop_all_queues(netdev); 874 } 875 876 /* make the aq call */ 877 status = i40e_aq_set_phy_config(hw, &config, NULL); 878 if (status) { 879 netdev_info(netdev, "Set phy config failed, err %s aq_err %s\n", 880 i40e_stat_str(hw, status), 881 i40e_aq_str(hw, hw->aq.asq_last_status)); 882 err = -EAGAIN; 883 goto done; 884 } 885 886 status = i40e_update_link_info(hw); 887 if (status) 888 netdev_dbg(netdev, "Updating link info failed with err %s aq_err %s\n", 889 i40e_stat_str(hw, status), 890 i40e_aq_str(hw, hw->aq.asq_last_status)); 891 892 } else { 893 netdev_info(netdev, "Nothing changed, exiting without setting anything.\n"); 894 } 895 896 done: 897 clear_bit(__I40E_CONFIG_BUSY, pf->state); 898 899 return err; 900 } 901 902 static int i40e_nway_reset(struct net_device *netdev) 903 { 904 /* restart autonegotiation */ 905 struct i40e_netdev_priv *np = netdev_priv(netdev); 906 struct i40e_pf *pf = np->vsi->back; 907 struct i40e_hw *hw = &pf->hw; 908 bool link_up = hw->phy.link_info.link_info & I40E_AQ_LINK_UP; 909 i40e_status ret = 0; 910 911 ret = i40e_aq_set_link_restart_an(hw, link_up, NULL); 912 if (ret) { 913 netdev_info(netdev, "link restart failed, err %s aq_err %s\n", 914 i40e_stat_str(hw, ret), 915 i40e_aq_str(hw, hw->aq.asq_last_status)); 916 return -EIO; 917 } 918 919 return 0; 920 } 921 922 /** 923 * i40e_get_pauseparam - Get Flow Control status 924 * Return tx/rx-pause status 925 **/ 926 static void i40e_get_pauseparam(struct net_device *netdev, 927 struct ethtool_pauseparam *pause) 928 { 929 struct i40e_netdev_priv *np = netdev_priv(netdev); 930 struct i40e_pf *pf = np->vsi->back; 931 struct i40e_hw *hw = &pf->hw; 932 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 933 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 934 935 pause->autoneg = 936 ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 937 AUTONEG_ENABLE : AUTONEG_DISABLE); 938 939 /* PFC enabled so report LFC as off */ 940 if (dcbx_cfg->pfc.pfcenable) { 941 pause->rx_pause = 0; 942 pause->tx_pause = 0; 943 return; 944 } 945 946 if (hw->fc.current_mode == I40E_FC_RX_PAUSE) { 947 pause->rx_pause = 1; 948 } else if (hw->fc.current_mode == I40E_FC_TX_PAUSE) { 949 pause->tx_pause = 1; 950 } else if (hw->fc.current_mode == I40E_FC_FULL) { 951 pause->rx_pause = 1; 952 pause->tx_pause = 1; 953 } 954 } 955 956 /** 957 * i40e_set_pauseparam - Set Flow Control parameter 958 * @netdev: network interface device structure 959 * @pause: return tx/rx flow control status 960 **/ 961 static int i40e_set_pauseparam(struct net_device *netdev, 962 struct ethtool_pauseparam *pause) 963 { 964 struct i40e_netdev_priv *np = netdev_priv(netdev); 965 struct i40e_pf *pf = np->vsi->back; 966 struct i40e_vsi *vsi = np->vsi; 967 struct i40e_hw *hw = &pf->hw; 968 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 969 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 970 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 971 i40e_status status; 972 u8 aq_failures; 973 int err = 0; 974 975 /* Changing the port's flow control is not supported if this isn't the 976 * port's controlling PF 977 */ 978 if (hw->partition_id != 1) { 979 i40e_partition_setting_complaint(pf); 980 return -EOPNOTSUPP; 981 } 982 983 if (vsi != pf->vsi[pf->lan_vsi]) 984 return -EOPNOTSUPP; 985 986 if (pause->autoneg != ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 987 AUTONEG_ENABLE : AUTONEG_DISABLE)) { 988 netdev_info(netdev, "To change autoneg please use: ethtool -s <dev> autoneg <on|off>\n"); 989 return -EOPNOTSUPP; 990 } 991 992 /* If we have link and don't have autoneg */ 993 if (!test_bit(__I40E_DOWN, pf->state) && 994 !(hw_link_info->an_info & I40E_AQ_AN_COMPLETED)) { 995 /* Send message that it might not necessarily work*/ 996 netdev_info(netdev, "Autoneg did not complete so changing settings may not result in an actual change.\n"); 997 } 998 999 if (dcbx_cfg->pfc.pfcenable) { 1000 netdev_info(netdev, 1001 "Priority flow control enabled. Cannot set link flow control.\n"); 1002 return -EOPNOTSUPP; 1003 } 1004 1005 if (pause->rx_pause && pause->tx_pause) 1006 hw->fc.requested_mode = I40E_FC_FULL; 1007 else if (pause->rx_pause && !pause->tx_pause) 1008 hw->fc.requested_mode = I40E_FC_RX_PAUSE; 1009 else if (!pause->rx_pause && pause->tx_pause) 1010 hw->fc.requested_mode = I40E_FC_TX_PAUSE; 1011 else if (!pause->rx_pause && !pause->tx_pause) 1012 hw->fc.requested_mode = I40E_FC_NONE; 1013 else 1014 return -EINVAL; 1015 1016 /* Tell the OS link is going down, the link will go back up when fw 1017 * says it is ready asynchronously 1018 */ 1019 i40e_print_link_message(vsi, false); 1020 netif_carrier_off(netdev); 1021 netif_tx_stop_all_queues(netdev); 1022 1023 /* Set the fc mode and only restart an if link is up*/ 1024 status = i40e_set_fc(hw, &aq_failures, link_up); 1025 1026 if (aq_failures & I40E_SET_FC_AQ_FAIL_GET) { 1027 netdev_info(netdev, "Set fc failed on the get_phy_capabilities call with err %s aq_err %s\n", 1028 i40e_stat_str(hw, status), 1029 i40e_aq_str(hw, hw->aq.asq_last_status)); 1030 err = -EAGAIN; 1031 } 1032 if (aq_failures & I40E_SET_FC_AQ_FAIL_SET) { 1033 netdev_info(netdev, "Set fc failed on the set_phy_config call with err %s aq_err %s\n", 1034 i40e_stat_str(hw, status), 1035 i40e_aq_str(hw, hw->aq.asq_last_status)); 1036 err = -EAGAIN; 1037 } 1038 if (aq_failures & I40E_SET_FC_AQ_FAIL_UPDATE) { 1039 netdev_info(netdev, "Set fc failed on the get_link_info call with err %s aq_err %s\n", 1040 i40e_stat_str(hw, status), 1041 i40e_aq_str(hw, hw->aq.asq_last_status)); 1042 err = -EAGAIN; 1043 } 1044 1045 if (!test_bit(__I40E_DOWN, pf->state)) { 1046 /* Give it a little more time to try to come back */ 1047 msleep(75); 1048 if (!test_bit(__I40E_DOWN, pf->state)) 1049 return i40e_nway_reset(netdev); 1050 } 1051 1052 return err; 1053 } 1054 1055 static u32 i40e_get_msglevel(struct net_device *netdev) 1056 { 1057 struct i40e_netdev_priv *np = netdev_priv(netdev); 1058 struct i40e_pf *pf = np->vsi->back; 1059 u32 debug_mask = pf->hw.debug_mask; 1060 1061 if (debug_mask) 1062 netdev_info(netdev, "i40e debug_mask: 0x%08X\n", debug_mask); 1063 1064 return pf->msg_enable; 1065 } 1066 1067 static void i40e_set_msglevel(struct net_device *netdev, u32 data) 1068 { 1069 struct i40e_netdev_priv *np = netdev_priv(netdev); 1070 struct i40e_pf *pf = np->vsi->back; 1071 1072 if (I40E_DEBUG_USER & data) 1073 pf->hw.debug_mask = data; 1074 else 1075 pf->msg_enable = data; 1076 } 1077 1078 static int i40e_get_regs_len(struct net_device *netdev) 1079 { 1080 int reg_count = 0; 1081 int i; 1082 1083 for (i = 0; i40e_reg_list[i].offset != 0; i++) 1084 reg_count += i40e_reg_list[i].elements; 1085 1086 return reg_count * sizeof(u32); 1087 } 1088 1089 static void i40e_get_regs(struct net_device *netdev, struct ethtool_regs *regs, 1090 void *p) 1091 { 1092 struct i40e_netdev_priv *np = netdev_priv(netdev); 1093 struct i40e_pf *pf = np->vsi->back; 1094 struct i40e_hw *hw = &pf->hw; 1095 u32 *reg_buf = p; 1096 unsigned int i, j, ri; 1097 u32 reg; 1098 1099 /* Tell ethtool which driver-version-specific regs output we have. 1100 * 1101 * At some point, if we have ethtool doing special formatting of 1102 * this data, it will rely on this version number to know how to 1103 * interpret things. Hence, this needs to be updated if/when the 1104 * diags register table is changed. 1105 */ 1106 regs->version = 1; 1107 1108 /* loop through the diags reg table for what to print */ 1109 ri = 0; 1110 for (i = 0; i40e_reg_list[i].offset != 0; i++) { 1111 for (j = 0; j < i40e_reg_list[i].elements; j++) { 1112 reg = i40e_reg_list[i].offset 1113 + (j * i40e_reg_list[i].stride); 1114 reg_buf[ri++] = rd32(hw, reg); 1115 } 1116 } 1117 1118 } 1119 1120 static int i40e_get_eeprom(struct net_device *netdev, 1121 struct ethtool_eeprom *eeprom, u8 *bytes) 1122 { 1123 struct i40e_netdev_priv *np = netdev_priv(netdev); 1124 struct i40e_hw *hw = &np->vsi->back->hw; 1125 struct i40e_pf *pf = np->vsi->back; 1126 int ret_val = 0, len, offset; 1127 u8 *eeprom_buff; 1128 u16 i, sectors; 1129 bool last; 1130 u32 magic; 1131 1132 #define I40E_NVM_SECTOR_SIZE 4096 1133 if (eeprom->len == 0) 1134 return -EINVAL; 1135 1136 /* check for NVMUpdate access method */ 1137 magic = hw->vendor_id | (hw->device_id << 16); 1138 if (eeprom->magic && eeprom->magic != magic) { 1139 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1140 int errno = 0; 1141 1142 /* make sure it is the right magic for NVMUpdate */ 1143 if ((eeprom->magic >> 16) != hw->device_id) 1144 errno = -EINVAL; 1145 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 1146 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 1147 errno = -EBUSY; 1148 else 1149 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1150 1151 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1152 dev_info(&pf->pdev->dev, 1153 "NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1154 ret_val, hw->aq.asq_last_status, errno, 1155 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1156 cmd->offset, cmd->data_size); 1157 1158 return errno; 1159 } 1160 1161 /* normal ethtool get_eeprom support */ 1162 eeprom->magic = hw->vendor_id | (hw->device_id << 16); 1163 1164 eeprom_buff = kzalloc(eeprom->len, GFP_KERNEL); 1165 if (!eeprom_buff) 1166 return -ENOMEM; 1167 1168 ret_val = i40e_acquire_nvm(hw, I40E_RESOURCE_READ); 1169 if (ret_val) { 1170 dev_info(&pf->pdev->dev, 1171 "Failed Acquiring NVM resource for read err=%d status=0x%x\n", 1172 ret_val, hw->aq.asq_last_status); 1173 goto free_buff; 1174 } 1175 1176 sectors = eeprom->len / I40E_NVM_SECTOR_SIZE; 1177 sectors += (eeprom->len % I40E_NVM_SECTOR_SIZE) ? 1 : 0; 1178 len = I40E_NVM_SECTOR_SIZE; 1179 last = false; 1180 for (i = 0; i < sectors; i++) { 1181 if (i == (sectors - 1)) { 1182 len = eeprom->len - (I40E_NVM_SECTOR_SIZE * i); 1183 last = true; 1184 } 1185 offset = eeprom->offset + (I40E_NVM_SECTOR_SIZE * i), 1186 ret_val = i40e_aq_read_nvm(hw, 0x0, offset, len, 1187 (u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i), 1188 last, NULL); 1189 if (ret_val && hw->aq.asq_last_status == I40E_AQ_RC_EPERM) { 1190 dev_info(&pf->pdev->dev, 1191 "read NVM failed, invalid offset 0x%x\n", 1192 offset); 1193 break; 1194 } else if (ret_val && 1195 hw->aq.asq_last_status == I40E_AQ_RC_EACCES) { 1196 dev_info(&pf->pdev->dev, 1197 "read NVM failed, access, offset 0x%x\n", 1198 offset); 1199 break; 1200 } else if (ret_val) { 1201 dev_info(&pf->pdev->dev, 1202 "read NVM failed offset %d err=%d status=0x%x\n", 1203 offset, ret_val, hw->aq.asq_last_status); 1204 break; 1205 } 1206 } 1207 1208 i40e_release_nvm(hw); 1209 memcpy(bytes, (u8 *)eeprom_buff, eeprom->len); 1210 free_buff: 1211 kfree(eeprom_buff); 1212 return ret_val; 1213 } 1214 1215 static int i40e_get_eeprom_len(struct net_device *netdev) 1216 { 1217 struct i40e_netdev_priv *np = netdev_priv(netdev); 1218 struct i40e_hw *hw = &np->vsi->back->hw; 1219 u32 val; 1220 1221 #define X722_EEPROM_SCOPE_LIMIT 0x5B9FFF 1222 if (hw->mac.type == I40E_MAC_X722) { 1223 val = X722_EEPROM_SCOPE_LIMIT + 1; 1224 return val; 1225 } 1226 val = (rd32(hw, I40E_GLPCI_LBARCTRL) 1227 & I40E_GLPCI_LBARCTRL_FL_SIZE_MASK) 1228 >> I40E_GLPCI_LBARCTRL_FL_SIZE_SHIFT; 1229 /* register returns value in power of 2, 64Kbyte chunks. */ 1230 val = (64 * 1024) * BIT(val); 1231 return val; 1232 } 1233 1234 static int i40e_set_eeprom(struct net_device *netdev, 1235 struct ethtool_eeprom *eeprom, u8 *bytes) 1236 { 1237 struct i40e_netdev_priv *np = netdev_priv(netdev); 1238 struct i40e_hw *hw = &np->vsi->back->hw; 1239 struct i40e_pf *pf = np->vsi->back; 1240 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1241 int ret_val = 0; 1242 int errno = 0; 1243 u32 magic; 1244 1245 /* normal ethtool set_eeprom is not supported */ 1246 magic = hw->vendor_id | (hw->device_id << 16); 1247 if (eeprom->magic == magic) 1248 errno = -EOPNOTSUPP; 1249 /* check for NVMUpdate access method */ 1250 else if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id) 1251 errno = -EINVAL; 1252 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 1253 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 1254 errno = -EBUSY; 1255 else 1256 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1257 1258 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1259 dev_info(&pf->pdev->dev, 1260 "NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1261 ret_val, hw->aq.asq_last_status, errno, 1262 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1263 cmd->offset, cmd->data_size); 1264 1265 return errno; 1266 } 1267 1268 static void i40e_get_drvinfo(struct net_device *netdev, 1269 struct ethtool_drvinfo *drvinfo) 1270 { 1271 struct i40e_netdev_priv *np = netdev_priv(netdev); 1272 struct i40e_vsi *vsi = np->vsi; 1273 struct i40e_pf *pf = vsi->back; 1274 1275 strlcpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver)); 1276 strlcpy(drvinfo->version, i40e_driver_version_str, 1277 sizeof(drvinfo->version)); 1278 strlcpy(drvinfo->fw_version, i40e_nvm_version_str(&pf->hw), 1279 sizeof(drvinfo->fw_version)); 1280 strlcpy(drvinfo->bus_info, pci_name(pf->pdev), 1281 sizeof(drvinfo->bus_info)); 1282 drvinfo->n_priv_flags = I40E_PRIV_FLAGS_STR_LEN; 1283 if (pf->hw.pf_id == 0) 1284 drvinfo->n_priv_flags += I40E_GL_PRIV_FLAGS_STR_LEN; 1285 } 1286 1287 static void i40e_get_ringparam(struct net_device *netdev, 1288 struct ethtool_ringparam *ring) 1289 { 1290 struct i40e_netdev_priv *np = netdev_priv(netdev); 1291 struct i40e_pf *pf = np->vsi->back; 1292 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; 1293 1294 ring->rx_max_pending = I40E_MAX_NUM_DESCRIPTORS; 1295 ring->tx_max_pending = I40E_MAX_NUM_DESCRIPTORS; 1296 ring->rx_mini_max_pending = 0; 1297 ring->rx_jumbo_max_pending = 0; 1298 ring->rx_pending = vsi->rx_rings[0]->count; 1299 ring->tx_pending = vsi->tx_rings[0]->count; 1300 ring->rx_mini_pending = 0; 1301 ring->rx_jumbo_pending = 0; 1302 } 1303 1304 static bool i40e_active_tx_ring_index(struct i40e_vsi *vsi, u16 index) 1305 { 1306 if (i40e_enabled_xdp_vsi(vsi)) { 1307 return index < vsi->num_queue_pairs || 1308 (index >= vsi->alloc_queue_pairs && 1309 index < vsi->alloc_queue_pairs + vsi->num_queue_pairs); 1310 } 1311 1312 return index < vsi->num_queue_pairs; 1313 } 1314 1315 static int i40e_set_ringparam(struct net_device *netdev, 1316 struct ethtool_ringparam *ring) 1317 { 1318 struct i40e_ring *tx_rings = NULL, *rx_rings = NULL; 1319 struct i40e_netdev_priv *np = netdev_priv(netdev); 1320 struct i40e_hw *hw = &np->vsi->back->hw; 1321 struct i40e_vsi *vsi = np->vsi; 1322 struct i40e_pf *pf = vsi->back; 1323 u32 new_rx_count, new_tx_count; 1324 u16 tx_alloc_queue_pairs; 1325 int timeout = 50; 1326 int i, err = 0; 1327 1328 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) 1329 return -EINVAL; 1330 1331 if (ring->tx_pending > I40E_MAX_NUM_DESCRIPTORS || 1332 ring->tx_pending < I40E_MIN_NUM_DESCRIPTORS || 1333 ring->rx_pending > I40E_MAX_NUM_DESCRIPTORS || 1334 ring->rx_pending < I40E_MIN_NUM_DESCRIPTORS) { 1335 netdev_info(netdev, 1336 "Descriptors requested (Tx: %d / Rx: %d) out of range [%d-%d]\n", 1337 ring->tx_pending, ring->rx_pending, 1338 I40E_MIN_NUM_DESCRIPTORS, I40E_MAX_NUM_DESCRIPTORS); 1339 return -EINVAL; 1340 } 1341 1342 new_tx_count = ALIGN(ring->tx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 1343 new_rx_count = ALIGN(ring->rx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 1344 1345 /* if nothing to do return success */ 1346 if ((new_tx_count == vsi->tx_rings[0]->count) && 1347 (new_rx_count == vsi->rx_rings[0]->count)) 1348 return 0; 1349 1350 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) { 1351 timeout--; 1352 if (!timeout) 1353 return -EBUSY; 1354 usleep_range(1000, 2000); 1355 } 1356 1357 if (!netif_running(vsi->netdev)) { 1358 /* simple case - set for the next time the netdev is started */ 1359 for (i = 0; i < vsi->num_queue_pairs; i++) { 1360 vsi->tx_rings[i]->count = new_tx_count; 1361 vsi->rx_rings[i]->count = new_rx_count; 1362 if (i40e_enabled_xdp_vsi(vsi)) 1363 vsi->xdp_rings[i]->count = new_tx_count; 1364 } 1365 goto done; 1366 } 1367 1368 /* We can't just free everything and then setup again, 1369 * because the ISRs in MSI-X mode get passed pointers 1370 * to the Tx and Rx ring structs. 1371 */ 1372 1373 /* alloc updated Tx and XDP Tx resources */ 1374 tx_alloc_queue_pairs = vsi->alloc_queue_pairs * 1375 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1); 1376 if (new_tx_count != vsi->tx_rings[0]->count) { 1377 netdev_info(netdev, 1378 "Changing Tx descriptor count from %d to %d.\n", 1379 vsi->tx_rings[0]->count, new_tx_count); 1380 tx_rings = kcalloc(tx_alloc_queue_pairs, 1381 sizeof(struct i40e_ring), GFP_KERNEL); 1382 if (!tx_rings) { 1383 err = -ENOMEM; 1384 goto done; 1385 } 1386 1387 for (i = 0; i < tx_alloc_queue_pairs; i++) { 1388 if (!i40e_active_tx_ring_index(vsi, i)) 1389 continue; 1390 1391 tx_rings[i] = *vsi->tx_rings[i]; 1392 tx_rings[i].count = new_tx_count; 1393 /* the desc and bi pointers will be reallocated in the 1394 * setup call 1395 */ 1396 tx_rings[i].desc = NULL; 1397 tx_rings[i].rx_bi = NULL; 1398 err = i40e_setup_tx_descriptors(&tx_rings[i]); 1399 if (err) { 1400 while (i) { 1401 i--; 1402 if (!i40e_active_tx_ring_index(vsi, i)) 1403 continue; 1404 i40e_free_tx_resources(&tx_rings[i]); 1405 } 1406 kfree(tx_rings); 1407 tx_rings = NULL; 1408 1409 goto done; 1410 } 1411 } 1412 } 1413 1414 /* alloc updated Rx resources */ 1415 if (new_rx_count != vsi->rx_rings[0]->count) { 1416 netdev_info(netdev, 1417 "Changing Rx descriptor count from %d to %d\n", 1418 vsi->rx_rings[0]->count, new_rx_count); 1419 rx_rings = kcalloc(vsi->alloc_queue_pairs, 1420 sizeof(struct i40e_ring), GFP_KERNEL); 1421 if (!rx_rings) { 1422 err = -ENOMEM; 1423 goto free_tx; 1424 } 1425 1426 for (i = 0; i < vsi->num_queue_pairs; i++) { 1427 struct i40e_ring *ring; 1428 u16 unused; 1429 1430 /* clone ring and setup updated count */ 1431 rx_rings[i] = *vsi->rx_rings[i]; 1432 rx_rings[i].count = new_rx_count; 1433 /* the desc and bi pointers will be reallocated in the 1434 * setup call 1435 */ 1436 rx_rings[i].desc = NULL; 1437 rx_rings[i].rx_bi = NULL; 1438 /* this is to allow wr32 to have something to write to 1439 * during early allocation of Rx buffers 1440 */ 1441 rx_rings[i].tail = hw->hw_addr + I40E_PRTGEN_STATUS; 1442 err = i40e_setup_rx_descriptors(&rx_rings[i]); 1443 if (err) 1444 goto rx_unwind; 1445 1446 /* now allocate the Rx buffers to make sure the OS 1447 * has enough memory, any failure here means abort 1448 */ 1449 ring = &rx_rings[i]; 1450 unused = I40E_DESC_UNUSED(ring); 1451 err = i40e_alloc_rx_buffers(ring, unused); 1452 rx_unwind: 1453 if (err) { 1454 do { 1455 i40e_free_rx_resources(&rx_rings[i]); 1456 } while (i--); 1457 kfree(rx_rings); 1458 rx_rings = NULL; 1459 1460 goto free_tx; 1461 } 1462 } 1463 } 1464 1465 /* Bring interface down, copy in the new ring info, 1466 * then restore the interface 1467 */ 1468 i40e_down(vsi); 1469 1470 if (tx_rings) { 1471 for (i = 0; i < tx_alloc_queue_pairs; i++) { 1472 if (i40e_active_tx_ring_index(vsi, i)) { 1473 i40e_free_tx_resources(vsi->tx_rings[i]); 1474 *vsi->tx_rings[i] = tx_rings[i]; 1475 } 1476 } 1477 kfree(tx_rings); 1478 tx_rings = NULL; 1479 } 1480 1481 if (rx_rings) { 1482 for (i = 0; i < vsi->num_queue_pairs; i++) { 1483 i40e_free_rx_resources(vsi->rx_rings[i]); 1484 /* get the real tail offset */ 1485 rx_rings[i].tail = vsi->rx_rings[i]->tail; 1486 /* this is to fake out the allocation routine 1487 * into thinking it has to realloc everything 1488 * but the recycling logic will let us re-use 1489 * the buffers allocated above 1490 */ 1491 rx_rings[i].next_to_use = 0; 1492 rx_rings[i].next_to_clean = 0; 1493 rx_rings[i].next_to_alloc = 0; 1494 /* do a struct copy */ 1495 *vsi->rx_rings[i] = rx_rings[i]; 1496 } 1497 kfree(rx_rings); 1498 rx_rings = NULL; 1499 } 1500 1501 i40e_up(vsi); 1502 1503 free_tx: 1504 /* error cleanup if the Rx allocations failed after getting Tx */ 1505 if (tx_rings) { 1506 for (i = 0; i < tx_alloc_queue_pairs; i++) { 1507 if (i40e_active_tx_ring_index(vsi, i)) 1508 i40e_free_tx_resources(vsi->tx_rings[i]); 1509 } 1510 kfree(tx_rings); 1511 tx_rings = NULL; 1512 } 1513 1514 done: 1515 clear_bit(__I40E_CONFIG_BUSY, pf->state); 1516 1517 return err; 1518 } 1519 1520 static int i40e_get_sset_count(struct net_device *netdev, int sset) 1521 { 1522 struct i40e_netdev_priv *np = netdev_priv(netdev); 1523 struct i40e_vsi *vsi = np->vsi; 1524 struct i40e_pf *pf = vsi->back; 1525 1526 switch (sset) { 1527 case ETH_SS_TEST: 1528 return I40E_TEST_LEN; 1529 case ETH_SS_STATS: 1530 if (vsi == pf->vsi[pf->lan_vsi] && pf->hw.partition_id == 1) { 1531 int len = I40E_PF_STATS_LEN(netdev); 1532 1533 if ((pf->lan_veb != I40E_NO_VEB) && 1534 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) 1535 len += I40E_VEB_STATS_TOTAL; 1536 return len; 1537 } else { 1538 return I40E_VSI_STATS_LEN(netdev); 1539 } 1540 case ETH_SS_PRIV_FLAGS: 1541 return I40E_PRIV_FLAGS_STR_LEN + 1542 (pf->hw.pf_id == 0 ? I40E_GL_PRIV_FLAGS_STR_LEN : 0); 1543 default: 1544 return -EOPNOTSUPP; 1545 } 1546 } 1547 1548 static void i40e_get_ethtool_stats(struct net_device *netdev, 1549 struct ethtool_stats *stats, u64 *data) 1550 { 1551 struct i40e_netdev_priv *np = netdev_priv(netdev); 1552 struct i40e_ring *tx_ring, *rx_ring; 1553 struct i40e_vsi *vsi = np->vsi; 1554 struct i40e_pf *pf = vsi->back; 1555 unsigned int j; 1556 int i = 0; 1557 char *p; 1558 struct rtnl_link_stats64 *net_stats = i40e_get_vsi_stats_struct(vsi); 1559 unsigned int start; 1560 1561 i40e_update_stats(vsi); 1562 1563 for (j = 0; j < I40E_NETDEV_STATS_LEN; j++) { 1564 p = (char *)net_stats + i40e_gstrings_net_stats[j].stat_offset; 1565 data[i++] = (i40e_gstrings_net_stats[j].sizeof_stat == 1566 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1567 } 1568 for (j = 0; j < I40E_MISC_STATS_LEN; j++) { 1569 p = (char *)vsi + i40e_gstrings_misc_stats[j].stat_offset; 1570 data[i++] = (i40e_gstrings_misc_stats[j].sizeof_stat == 1571 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1572 } 1573 rcu_read_lock(); 1574 for (j = 0; j < vsi->num_queue_pairs; j++) { 1575 tx_ring = ACCESS_ONCE(vsi->tx_rings[j]); 1576 1577 if (!tx_ring) 1578 continue; 1579 1580 /* process Tx ring statistics */ 1581 do { 1582 start = u64_stats_fetch_begin_irq(&tx_ring->syncp); 1583 data[i] = tx_ring->stats.packets; 1584 data[i + 1] = tx_ring->stats.bytes; 1585 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start)); 1586 i += 2; 1587 1588 /* Rx ring is the 2nd half of the queue pair */ 1589 rx_ring = &tx_ring[1]; 1590 do { 1591 start = u64_stats_fetch_begin_irq(&rx_ring->syncp); 1592 data[i] = rx_ring->stats.packets; 1593 data[i + 1] = rx_ring->stats.bytes; 1594 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start)); 1595 i += 2; 1596 } 1597 rcu_read_unlock(); 1598 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) 1599 return; 1600 1601 if ((pf->lan_veb != I40E_NO_VEB) && 1602 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) { 1603 struct i40e_veb *veb = pf->veb[pf->lan_veb]; 1604 1605 for (j = 0; j < I40E_VEB_STATS_LEN; j++) { 1606 p = (char *)veb; 1607 p += i40e_gstrings_veb_stats[j].stat_offset; 1608 data[i++] = (i40e_gstrings_veb_stats[j].sizeof_stat == 1609 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1610 } 1611 for (j = 0; j < I40E_MAX_TRAFFIC_CLASS; j++) { 1612 data[i++] = veb->tc_stats.tc_tx_packets[j]; 1613 data[i++] = veb->tc_stats.tc_tx_bytes[j]; 1614 data[i++] = veb->tc_stats.tc_rx_packets[j]; 1615 data[i++] = veb->tc_stats.tc_rx_bytes[j]; 1616 } 1617 } 1618 for (j = 0; j < I40E_GLOBAL_STATS_LEN; j++) { 1619 p = (char *)pf + i40e_gstrings_stats[j].stat_offset; 1620 data[i++] = (i40e_gstrings_stats[j].sizeof_stat == 1621 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1622 } 1623 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) { 1624 data[i++] = pf->stats.priority_xon_tx[j]; 1625 data[i++] = pf->stats.priority_xoff_tx[j]; 1626 } 1627 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) { 1628 data[i++] = pf->stats.priority_xon_rx[j]; 1629 data[i++] = pf->stats.priority_xoff_rx[j]; 1630 } 1631 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) 1632 data[i++] = pf->stats.priority_xon_2_xoff[j]; 1633 } 1634 1635 static void i40e_get_strings(struct net_device *netdev, u32 stringset, 1636 u8 *data) 1637 { 1638 struct i40e_netdev_priv *np = netdev_priv(netdev); 1639 struct i40e_vsi *vsi = np->vsi; 1640 struct i40e_pf *pf = vsi->back; 1641 char *p = (char *)data; 1642 unsigned int i; 1643 1644 switch (stringset) { 1645 case ETH_SS_TEST: 1646 memcpy(data, i40e_gstrings_test, 1647 I40E_TEST_LEN * ETH_GSTRING_LEN); 1648 break; 1649 case ETH_SS_STATS: 1650 for (i = 0; i < I40E_NETDEV_STATS_LEN; i++) { 1651 snprintf(p, ETH_GSTRING_LEN, "%s", 1652 i40e_gstrings_net_stats[i].stat_string); 1653 p += ETH_GSTRING_LEN; 1654 } 1655 for (i = 0; i < I40E_MISC_STATS_LEN; i++) { 1656 snprintf(p, ETH_GSTRING_LEN, "%s", 1657 i40e_gstrings_misc_stats[i].stat_string); 1658 p += ETH_GSTRING_LEN; 1659 } 1660 for (i = 0; i < vsi->num_queue_pairs; i++) { 1661 snprintf(p, ETH_GSTRING_LEN, "tx-%d.tx_packets", i); 1662 p += ETH_GSTRING_LEN; 1663 snprintf(p, ETH_GSTRING_LEN, "tx-%d.tx_bytes", i); 1664 p += ETH_GSTRING_LEN; 1665 snprintf(p, ETH_GSTRING_LEN, "rx-%d.rx_packets", i); 1666 p += ETH_GSTRING_LEN; 1667 snprintf(p, ETH_GSTRING_LEN, "rx-%d.rx_bytes", i); 1668 p += ETH_GSTRING_LEN; 1669 } 1670 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) 1671 return; 1672 1673 if ((pf->lan_veb != I40E_NO_VEB) && 1674 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) { 1675 for (i = 0; i < I40E_VEB_STATS_LEN; i++) { 1676 snprintf(p, ETH_GSTRING_LEN, "veb.%s", 1677 i40e_gstrings_veb_stats[i].stat_string); 1678 p += ETH_GSTRING_LEN; 1679 } 1680 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { 1681 snprintf(p, ETH_GSTRING_LEN, 1682 "veb.tc_%d_tx_packets", i); 1683 p += ETH_GSTRING_LEN; 1684 snprintf(p, ETH_GSTRING_LEN, 1685 "veb.tc_%d_tx_bytes", i); 1686 p += ETH_GSTRING_LEN; 1687 snprintf(p, ETH_GSTRING_LEN, 1688 "veb.tc_%d_rx_packets", i); 1689 p += ETH_GSTRING_LEN; 1690 snprintf(p, ETH_GSTRING_LEN, 1691 "veb.tc_%d_rx_bytes", i); 1692 p += ETH_GSTRING_LEN; 1693 } 1694 } 1695 for (i = 0; i < I40E_GLOBAL_STATS_LEN; i++) { 1696 snprintf(p, ETH_GSTRING_LEN, "port.%s", 1697 i40e_gstrings_stats[i].stat_string); 1698 p += ETH_GSTRING_LEN; 1699 } 1700 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 1701 snprintf(p, ETH_GSTRING_LEN, 1702 "port.tx_priority_%d_xon", i); 1703 p += ETH_GSTRING_LEN; 1704 snprintf(p, ETH_GSTRING_LEN, 1705 "port.tx_priority_%d_xoff", i); 1706 p += ETH_GSTRING_LEN; 1707 } 1708 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 1709 snprintf(p, ETH_GSTRING_LEN, 1710 "port.rx_priority_%d_xon", i); 1711 p += ETH_GSTRING_LEN; 1712 snprintf(p, ETH_GSTRING_LEN, 1713 "port.rx_priority_%d_xoff", i); 1714 p += ETH_GSTRING_LEN; 1715 } 1716 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 1717 snprintf(p, ETH_GSTRING_LEN, 1718 "port.rx_priority_%d_xon_2_xoff", i); 1719 p += ETH_GSTRING_LEN; 1720 } 1721 /* BUG_ON(p - data != I40E_STATS_LEN * ETH_GSTRING_LEN); */ 1722 break; 1723 case ETH_SS_PRIV_FLAGS: 1724 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 1725 snprintf(p, ETH_GSTRING_LEN, "%s", 1726 i40e_gstrings_priv_flags[i].flag_string); 1727 p += ETH_GSTRING_LEN; 1728 } 1729 if (pf->hw.pf_id != 0) 1730 break; 1731 for (i = 0; i < I40E_GL_PRIV_FLAGS_STR_LEN; i++) { 1732 snprintf(p, ETH_GSTRING_LEN, "%s", 1733 i40e_gl_gstrings_priv_flags[i].flag_string); 1734 p += ETH_GSTRING_LEN; 1735 } 1736 break; 1737 default: 1738 break; 1739 } 1740 } 1741 1742 static int i40e_get_ts_info(struct net_device *dev, 1743 struct ethtool_ts_info *info) 1744 { 1745 struct i40e_pf *pf = i40e_netdev_to_pf(dev); 1746 1747 /* only report HW timestamping if PTP is enabled */ 1748 if (!(pf->flags & I40E_FLAG_PTP)) 1749 return ethtool_op_get_ts_info(dev, info); 1750 1751 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 1752 SOF_TIMESTAMPING_RX_SOFTWARE | 1753 SOF_TIMESTAMPING_SOFTWARE | 1754 SOF_TIMESTAMPING_TX_HARDWARE | 1755 SOF_TIMESTAMPING_RX_HARDWARE | 1756 SOF_TIMESTAMPING_RAW_HARDWARE; 1757 1758 if (pf->ptp_clock) 1759 info->phc_index = ptp_clock_index(pf->ptp_clock); 1760 else 1761 info->phc_index = -1; 1762 1763 info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON); 1764 1765 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) | 1766 BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) | 1767 BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) | 1768 BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ); 1769 1770 if (pf->hw_features & I40E_HW_PTP_L4_CAPABLE) 1771 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | 1772 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | 1773 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) | 1774 BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) | 1775 BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) | 1776 BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) | 1777 BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) | 1778 BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ); 1779 1780 return 0; 1781 } 1782 1783 static int i40e_link_test(struct net_device *netdev, u64 *data) 1784 { 1785 struct i40e_netdev_priv *np = netdev_priv(netdev); 1786 struct i40e_pf *pf = np->vsi->back; 1787 i40e_status status; 1788 bool link_up = false; 1789 1790 netif_info(pf, hw, netdev, "link test\n"); 1791 status = i40e_get_link_status(&pf->hw, &link_up); 1792 if (status) { 1793 netif_err(pf, drv, netdev, "link query timed out, please retry test\n"); 1794 *data = 1; 1795 return *data; 1796 } 1797 1798 if (link_up) 1799 *data = 0; 1800 else 1801 *data = 1; 1802 1803 return *data; 1804 } 1805 1806 static int i40e_reg_test(struct net_device *netdev, u64 *data) 1807 { 1808 struct i40e_netdev_priv *np = netdev_priv(netdev); 1809 struct i40e_pf *pf = np->vsi->back; 1810 1811 netif_info(pf, hw, netdev, "register test\n"); 1812 *data = i40e_diag_reg_test(&pf->hw); 1813 1814 return *data; 1815 } 1816 1817 static int i40e_eeprom_test(struct net_device *netdev, u64 *data) 1818 { 1819 struct i40e_netdev_priv *np = netdev_priv(netdev); 1820 struct i40e_pf *pf = np->vsi->back; 1821 1822 netif_info(pf, hw, netdev, "eeprom test\n"); 1823 *data = i40e_diag_eeprom_test(&pf->hw); 1824 1825 /* forcebly clear the NVM Update state machine */ 1826 pf->hw.nvmupd_state = I40E_NVMUPD_STATE_INIT; 1827 1828 return *data; 1829 } 1830 1831 static int i40e_intr_test(struct net_device *netdev, u64 *data) 1832 { 1833 struct i40e_netdev_priv *np = netdev_priv(netdev); 1834 struct i40e_pf *pf = np->vsi->back; 1835 u16 swc_old = pf->sw_int_count; 1836 1837 netif_info(pf, hw, netdev, "interrupt test\n"); 1838 wr32(&pf->hw, I40E_PFINT_DYN_CTL0, 1839 (I40E_PFINT_DYN_CTL0_INTENA_MASK | 1840 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK | 1841 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK | 1842 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK | 1843 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK)); 1844 usleep_range(1000, 2000); 1845 *data = (swc_old == pf->sw_int_count); 1846 1847 return *data; 1848 } 1849 1850 static inline bool i40e_active_vfs(struct i40e_pf *pf) 1851 { 1852 struct i40e_vf *vfs = pf->vf; 1853 int i; 1854 1855 for (i = 0; i < pf->num_alloc_vfs; i++) 1856 if (test_bit(I40E_VF_STATE_ACTIVE, &vfs[i].vf_states)) 1857 return true; 1858 return false; 1859 } 1860 1861 static inline bool i40e_active_vmdqs(struct i40e_pf *pf) 1862 { 1863 return !!i40e_find_vsi_by_type(pf, I40E_VSI_VMDQ2); 1864 } 1865 1866 static void i40e_diag_test(struct net_device *netdev, 1867 struct ethtool_test *eth_test, u64 *data) 1868 { 1869 struct i40e_netdev_priv *np = netdev_priv(netdev); 1870 bool if_running = netif_running(netdev); 1871 struct i40e_pf *pf = np->vsi->back; 1872 1873 if (eth_test->flags == ETH_TEST_FL_OFFLINE) { 1874 /* Offline tests */ 1875 netif_info(pf, drv, netdev, "offline testing starting\n"); 1876 1877 set_bit(__I40E_TESTING, pf->state); 1878 1879 if (i40e_active_vfs(pf) || i40e_active_vmdqs(pf)) { 1880 dev_warn(&pf->pdev->dev, 1881 "Please take active VFs and Netqueues offline and restart the adapter before running NIC diagnostics\n"); 1882 data[I40E_ETH_TEST_REG] = 1; 1883 data[I40E_ETH_TEST_EEPROM] = 1; 1884 data[I40E_ETH_TEST_INTR] = 1; 1885 data[I40E_ETH_TEST_LINK] = 1; 1886 eth_test->flags |= ETH_TEST_FL_FAILED; 1887 clear_bit(__I40E_TESTING, pf->state); 1888 goto skip_ol_tests; 1889 } 1890 1891 /* If the device is online then take it offline */ 1892 if (if_running) 1893 /* indicate we're in test mode */ 1894 i40e_close(netdev); 1895 else 1896 /* This reset does not affect link - if it is 1897 * changed to a type of reset that does affect 1898 * link then the following link test would have 1899 * to be moved to before the reset 1900 */ 1901 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 1902 1903 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 1904 eth_test->flags |= ETH_TEST_FL_FAILED; 1905 1906 if (i40e_eeprom_test(netdev, &data[I40E_ETH_TEST_EEPROM])) 1907 eth_test->flags |= ETH_TEST_FL_FAILED; 1908 1909 if (i40e_intr_test(netdev, &data[I40E_ETH_TEST_INTR])) 1910 eth_test->flags |= ETH_TEST_FL_FAILED; 1911 1912 /* run reg test last, a reset is required after it */ 1913 if (i40e_reg_test(netdev, &data[I40E_ETH_TEST_REG])) 1914 eth_test->flags |= ETH_TEST_FL_FAILED; 1915 1916 clear_bit(__I40E_TESTING, pf->state); 1917 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 1918 1919 if (if_running) 1920 i40e_open(netdev); 1921 } else { 1922 /* Online tests */ 1923 netif_info(pf, drv, netdev, "online testing starting\n"); 1924 1925 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 1926 eth_test->flags |= ETH_TEST_FL_FAILED; 1927 1928 /* Offline only tests, not run in online; pass by default */ 1929 data[I40E_ETH_TEST_REG] = 0; 1930 data[I40E_ETH_TEST_EEPROM] = 0; 1931 data[I40E_ETH_TEST_INTR] = 0; 1932 } 1933 1934 skip_ol_tests: 1935 1936 netif_info(pf, drv, netdev, "testing finished\n"); 1937 } 1938 1939 static void i40e_get_wol(struct net_device *netdev, 1940 struct ethtool_wolinfo *wol) 1941 { 1942 struct i40e_netdev_priv *np = netdev_priv(netdev); 1943 struct i40e_pf *pf = np->vsi->back; 1944 struct i40e_hw *hw = &pf->hw; 1945 u16 wol_nvm_bits; 1946 1947 /* NVM bit on means WoL disabled for the port */ 1948 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 1949 if ((BIT(hw->port) & wol_nvm_bits) || (hw->partition_id != 1)) { 1950 wol->supported = 0; 1951 wol->wolopts = 0; 1952 } else { 1953 wol->supported = WAKE_MAGIC; 1954 wol->wolopts = (pf->wol_en ? WAKE_MAGIC : 0); 1955 } 1956 } 1957 1958 /** 1959 * i40e_set_wol - set the WakeOnLAN configuration 1960 * @netdev: the netdev in question 1961 * @wol: the ethtool WoL setting data 1962 **/ 1963 static int i40e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) 1964 { 1965 struct i40e_netdev_priv *np = netdev_priv(netdev); 1966 struct i40e_pf *pf = np->vsi->back; 1967 struct i40e_vsi *vsi = np->vsi; 1968 struct i40e_hw *hw = &pf->hw; 1969 u16 wol_nvm_bits; 1970 1971 /* WoL not supported if this isn't the controlling PF on the port */ 1972 if (hw->partition_id != 1) { 1973 i40e_partition_setting_complaint(pf); 1974 return -EOPNOTSUPP; 1975 } 1976 1977 if (vsi != pf->vsi[pf->lan_vsi]) 1978 return -EOPNOTSUPP; 1979 1980 /* NVM bit on means WoL disabled for the port */ 1981 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 1982 if (BIT(hw->port) & wol_nvm_bits) 1983 return -EOPNOTSUPP; 1984 1985 /* only magic packet is supported */ 1986 if (wol->wolopts && (wol->wolopts != WAKE_MAGIC)) 1987 return -EOPNOTSUPP; 1988 1989 /* is this a new value? */ 1990 if (pf->wol_en != !!wol->wolopts) { 1991 pf->wol_en = !!wol->wolopts; 1992 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en); 1993 } 1994 1995 return 0; 1996 } 1997 1998 static int i40e_set_phys_id(struct net_device *netdev, 1999 enum ethtool_phys_id_state state) 2000 { 2001 struct i40e_netdev_priv *np = netdev_priv(netdev); 2002 i40e_status ret = 0; 2003 struct i40e_pf *pf = np->vsi->back; 2004 struct i40e_hw *hw = &pf->hw; 2005 int blink_freq = 2; 2006 u16 temp_status; 2007 2008 switch (state) { 2009 case ETHTOOL_ID_ACTIVE: 2010 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) { 2011 pf->led_status = i40e_led_get(hw); 2012 } else { 2013 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) 2014 i40e_aq_set_phy_debug(hw, I40E_PHY_DEBUG_ALL, 2015 NULL); 2016 ret = i40e_led_get_phy(hw, &temp_status, 2017 &pf->phy_led_val); 2018 pf->led_status = temp_status; 2019 } 2020 return blink_freq; 2021 case ETHTOOL_ID_ON: 2022 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) 2023 i40e_led_set(hw, 0xf, false); 2024 else 2025 ret = i40e_led_set_phy(hw, true, pf->led_status, 0); 2026 break; 2027 case ETHTOOL_ID_OFF: 2028 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) 2029 i40e_led_set(hw, 0x0, false); 2030 else 2031 ret = i40e_led_set_phy(hw, false, pf->led_status, 0); 2032 break; 2033 case ETHTOOL_ID_INACTIVE: 2034 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) { 2035 i40e_led_set(hw, pf->led_status, false); 2036 } else { 2037 ret = i40e_led_set_phy(hw, false, pf->led_status, 2038 (pf->phy_led_val | 2039 I40E_PHY_LED_MODE_ORIG)); 2040 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) 2041 i40e_aq_set_phy_debug(hw, 0, NULL); 2042 } 2043 break; 2044 default: 2045 break; 2046 } 2047 if (ret) 2048 return -ENOENT; 2049 else 2050 return 0; 2051 } 2052 2053 /* NOTE: i40e hardware uses a conversion factor of 2 for Interrupt 2054 * Throttle Rate (ITR) ie. ITR(1) = 2us ITR(10) = 20 us, and also 2055 * 125us (8000 interrupts per second) == ITR(62) 2056 */ 2057 2058 /** 2059 * __i40e_get_coalesce - get per-queue coalesce settings 2060 * @netdev: the netdev to check 2061 * @ec: ethtool coalesce data structure 2062 * @queue: which queue to pick 2063 * 2064 * Gets the per-queue settings for coalescence. Specifically Rx and Tx usecs 2065 * are per queue. If queue is <0 then we default to queue 0 as the 2066 * representative value. 2067 **/ 2068 static int __i40e_get_coalesce(struct net_device *netdev, 2069 struct ethtool_coalesce *ec, 2070 int queue) 2071 { 2072 struct i40e_netdev_priv *np = netdev_priv(netdev); 2073 struct i40e_ring *rx_ring, *tx_ring; 2074 struct i40e_vsi *vsi = np->vsi; 2075 2076 ec->tx_max_coalesced_frames_irq = vsi->work_limit; 2077 ec->rx_max_coalesced_frames_irq = vsi->work_limit; 2078 2079 /* rx and tx usecs has per queue value. If user doesn't specify the queue, 2080 * return queue 0's value to represent. 2081 */ 2082 if (queue < 0) { 2083 queue = 0; 2084 } else if (queue >= vsi->num_queue_pairs) { 2085 return -EINVAL; 2086 } 2087 2088 rx_ring = vsi->rx_rings[queue]; 2089 tx_ring = vsi->tx_rings[queue]; 2090 2091 if (ITR_IS_DYNAMIC(rx_ring->rx_itr_setting)) 2092 ec->use_adaptive_rx_coalesce = 1; 2093 2094 if (ITR_IS_DYNAMIC(tx_ring->tx_itr_setting)) 2095 ec->use_adaptive_tx_coalesce = 1; 2096 2097 ec->rx_coalesce_usecs = rx_ring->rx_itr_setting & ~I40E_ITR_DYNAMIC; 2098 ec->tx_coalesce_usecs = tx_ring->tx_itr_setting & ~I40E_ITR_DYNAMIC; 2099 2100 2101 /* we use the _usecs_high to store/set the interrupt rate limit 2102 * that the hardware supports, that almost but not quite 2103 * fits the original intent of the ethtool variable, 2104 * the rx_coalesce_usecs_high limits total interrupts 2105 * per second from both tx/rx sources. 2106 */ 2107 ec->rx_coalesce_usecs_high = vsi->int_rate_limit; 2108 ec->tx_coalesce_usecs_high = vsi->int_rate_limit; 2109 2110 return 0; 2111 } 2112 2113 /** 2114 * i40e_get_coalesce - get a netdev's coalesce settings 2115 * @netdev: the netdev to check 2116 * @ec: ethtool coalesce data structure 2117 * 2118 * Gets the coalesce settings for a particular netdev. Note that if user has 2119 * modified per-queue settings, this only guarantees to represent queue 0. See 2120 * __i40e_get_coalesce for more details. 2121 **/ 2122 static int i40e_get_coalesce(struct net_device *netdev, 2123 struct ethtool_coalesce *ec) 2124 { 2125 return __i40e_get_coalesce(netdev, ec, -1); 2126 } 2127 2128 /** 2129 * i40e_get_per_queue_coalesce - gets coalesce settings for particular queue 2130 * @netdev: netdev structure 2131 * @ec: ethtool's coalesce settings 2132 * @queue: the particular queue to read 2133 * 2134 * Will read a specific queue's coalesce settings 2135 **/ 2136 static int i40e_get_per_queue_coalesce(struct net_device *netdev, u32 queue, 2137 struct ethtool_coalesce *ec) 2138 { 2139 return __i40e_get_coalesce(netdev, ec, queue); 2140 } 2141 2142 /** 2143 * i40e_set_itr_per_queue - set ITR values for specific queue 2144 * @vsi: the VSI to set values for 2145 * @ec: coalesce settings from ethtool 2146 * @queue: the queue to modify 2147 * 2148 * Change the ITR settings for a specific queue. 2149 **/ 2150 2151 static void i40e_set_itr_per_queue(struct i40e_vsi *vsi, 2152 struct ethtool_coalesce *ec, 2153 int queue) 2154 { 2155 struct i40e_pf *pf = vsi->back; 2156 struct i40e_hw *hw = &pf->hw; 2157 struct i40e_q_vector *q_vector; 2158 u16 vector, intrl; 2159 2160 intrl = i40e_intrl_usec_to_reg(vsi->int_rate_limit); 2161 2162 vsi->rx_rings[queue]->rx_itr_setting = ec->rx_coalesce_usecs; 2163 vsi->tx_rings[queue]->tx_itr_setting = ec->tx_coalesce_usecs; 2164 2165 if (ec->use_adaptive_rx_coalesce) 2166 vsi->rx_rings[queue]->rx_itr_setting |= I40E_ITR_DYNAMIC; 2167 else 2168 vsi->rx_rings[queue]->rx_itr_setting &= ~I40E_ITR_DYNAMIC; 2169 2170 if (ec->use_adaptive_tx_coalesce) 2171 vsi->tx_rings[queue]->tx_itr_setting |= I40E_ITR_DYNAMIC; 2172 else 2173 vsi->tx_rings[queue]->tx_itr_setting &= ~I40E_ITR_DYNAMIC; 2174 2175 q_vector = vsi->rx_rings[queue]->q_vector; 2176 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[queue]->rx_itr_setting); 2177 vector = vsi->base_vector + q_vector->v_idx; 2178 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1), q_vector->rx.itr); 2179 2180 q_vector = vsi->tx_rings[queue]->q_vector; 2181 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[queue]->tx_itr_setting); 2182 vector = vsi->base_vector + q_vector->v_idx; 2183 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1), q_vector->tx.itr); 2184 2185 wr32(hw, I40E_PFINT_RATEN(vector - 1), intrl); 2186 i40e_flush(hw); 2187 } 2188 2189 /** 2190 * __i40e_set_coalesce - set coalesce settings for particular queue 2191 * @netdev: the netdev to change 2192 * @ec: ethtool coalesce settings 2193 * @queue: the queue to change 2194 * 2195 * Sets the coalesce settings for a particular queue. 2196 **/ 2197 static int __i40e_set_coalesce(struct net_device *netdev, 2198 struct ethtool_coalesce *ec, 2199 int queue) 2200 { 2201 struct i40e_netdev_priv *np = netdev_priv(netdev); 2202 u16 intrl_reg, cur_rx_itr, cur_tx_itr; 2203 struct i40e_vsi *vsi = np->vsi; 2204 struct i40e_pf *pf = vsi->back; 2205 int i; 2206 2207 if (ec->tx_max_coalesced_frames_irq || ec->rx_max_coalesced_frames_irq) 2208 vsi->work_limit = ec->tx_max_coalesced_frames_irq; 2209 2210 if (queue < 0) { 2211 cur_rx_itr = vsi->rx_rings[0]->rx_itr_setting; 2212 cur_tx_itr = vsi->tx_rings[0]->tx_itr_setting; 2213 } else if (queue < vsi->num_queue_pairs) { 2214 cur_rx_itr = vsi->rx_rings[queue]->rx_itr_setting; 2215 cur_tx_itr = vsi->tx_rings[queue]->tx_itr_setting; 2216 } else { 2217 netif_info(pf, drv, netdev, "Invalid queue value, queue range is 0 - %d\n", 2218 vsi->num_queue_pairs - 1); 2219 return -EINVAL; 2220 } 2221 2222 cur_tx_itr &= ~I40E_ITR_DYNAMIC; 2223 cur_rx_itr &= ~I40E_ITR_DYNAMIC; 2224 2225 /* tx_coalesce_usecs_high is ignored, use rx-usecs-high instead */ 2226 if (ec->tx_coalesce_usecs_high != vsi->int_rate_limit) { 2227 netif_info(pf, drv, netdev, "tx-usecs-high is not used, please program rx-usecs-high\n"); 2228 return -EINVAL; 2229 } 2230 2231 if (ec->rx_coalesce_usecs_high > INTRL_REG_TO_USEC(I40E_MAX_INTRL)) { 2232 netif_info(pf, drv, netdev, "Invalid value, rx-usecs-high range is 0-%lu\n", 2233 INTRL_REG_TO_USEC(I40E_MAX_INTRL)); 2234 return -EINVAL; 2235 } 2236 2237 if (ec->rx_coalesce_usecs != cur_rx_itr && 2238 ec->use_adaptive_rx_coalesce) { 2239 netif_info(pf, drv, netdev, "RX interrupt moderation cannot be changed if adaptive-rx is enabled.\n"); 2240 return -EINVAL; 2241 } 2242 2243 if (ec->rx_coalesce_usecs > (I40E_MAX_ITR << 1)) { 2244 netif_info(pf, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n"); 2245 return -EINVAL; 2246 } 2247 2248 if (ec->tx_coalesce_usecs != cur_tx_itr && 2249 ec->use_adaptive_tx_coalesce) { 2250 netif_info(pf, drv, netdev, "TX interrupt moderation cannot be changed if adaptive-tx is enabled.\n"); 2251 return -EINVAL; 2252 } 2253 2254 if (ec->tx_coalesce_usecs > (I40E_MAX_ITR << 1)) { 2255 netif_info(pf, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n"); 2256 return -EINVAL; 2257 } 2258 2259 if (ec->use_adaptive_rx_coalesce && !cur_rx_itr) 2260 ec->rx_coalesce_usecs = I40E_MIN_ITR << 1; 2261 2262 if (ec->use_adaptive_tx_coalesce && !cur_tx_itr) 2263 ec->tx_coalesce_usecs = I40E_MIN_ITR << 1; 2264 2265 intrl_reg = i40e_intrl_usec_to_reg(ec->rx_coalesce_usecs_high); 2266 vsi->int_rate_limit = INTRL_REG_TO_USEC(intrl_reg); 2267 if (vsi->int_rate_limit != ec->rx_coalesce_usecs_high) { 2268 netif_info(pf, drv, netdev, "Interrupt rate limit rounded down to %d\n", 2269 vsi->int_rate_limit); 2270 } 2271 2272 /* rx and tx usecs has per queue value. If user doesn't specify the queue, 2273 * apply to all queues. 2274 */ 2275 if (queue < 0) { 2276 for (i = 0; i < vsi->num_queue_pairs; i++) 2277 i40e_set_itr_per_queue(vsi, ec, i); 2278 } else { 2279 i40e_set_itr_per_queue(vsi, ec, queue); 2280 } 2281 2282 return 0; 2283 } 2284 2285 /** 2286 * i40e_set_coalesce - set coalesce settings for every queue on the netdev 2287 * @netdev: the netdev to change 2288 * @ec: ethtool coalesce settings 2289 * 2290 * This will set each queue to the same coalesce settings. 2291 **/ 2292 static int i40e_set_coalesce(struct net_device *netdev, 2293 struct ethtool_coalesce *ec) 2294 { 2295 return __i40e_set_coalesce(netdev, ec, -1); 2296 } 2297 2298 /** 2299 * i40e_set_per_queue_coalesce - set specific queue's coalesce settings 2300 * @netdev: the netdev to change 2301 * @ec: ethtool's coalesce settings 2302 * @queue: the queue to change 2303 * 2304 * Sets the specified queue's coalesce settings. 2305 **/ 2306 static int i40e_set_per_queue_coalesce(struct net_device *netdev, u32 queue, 2307 struct ethtool_coalesce *ec) 2308 { 2309 return __i40e_set_coalesce(netdev, ec, queue); 2310 } 2311 2312 /** 2313 * i40e_get_rss_hash_opts - Get RSS hash Input Set for each flow type 2314 * @pf: pointer to the physical function struct 2315 * @cmd: ethtool rxnfc command 2316 * 2317 * Returns Success if the flow is supported, else Invalid Input. 2318 **/ 2319 static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd) 2320 { 2321 struct i40e_hw *hw = &pf->hw; 2322 u8 flow_pctype = 0; 2323 u64 i_set = 0; 2324 2325 cmd->data = 0; 2326 2327 switch (cmd->flow_type) { 2328 case TCP_V4_FLOW: 2329 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2330 break; 2331 case UDP_V4_FLOW: 2332 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2333 break; 2334 case TCP_V6_FLOW: 2335 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 2336 break; 2337 case UDP_V6_FLOW: 2338 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 2339 break; 2340 case SCTP_V4_FLOW: 2341 case AH_ESP_V4_FLOW: 2342 case AH_V4_FLOW: 2343 case ESP_V4_FLOW: 2344 case IPV4_FLOW: 2345 case SCTP_V6_FLOW: 2346 case AH_ESP_V6_FLOW: 2347 case AH_V6_FLOW: 2348 case ESP_V6_FLOW: 2349 case IPV6_FLOW: 2350 /* Default is src/dest for IP, no matter the L4 hashing */ 2351 cmd->data |= RXH_IP_SRC | RXH_IP_DST; 2352 break; 2353 default: 2354 return -EINVAL; 2355 } 2356 2357 /* Read flow based hash input set register */ 2358 if (flow_pctype) { 2359 i_set = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, 2360 flow_pctype)) | 2361 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, 2362 flow_pctype)) << 32); 2363 } 2364 2365 /* Process bits of hash input set */ 2366 if (i_set) { 2367 if (i_set & I40E_L4_SRC_MASK) 2368 cmd->data |= RXH_L4_B_0_1; 2369 if (i_set & I40E_L4_DST_MASK) 2370 cmd->data |= RXH_L4_B_2_3; 2371 2372 if (cmd->flow_type == TCP_V4_FLOW || 2373 cmd->flow_type == UDP_V4_FLOW) { 2374 if (i_set & I40E_L3_SRC_MASK) 2375 cmd->data |= RXH_IP_SRC; 2376 if (i_set & I40E_L3_DST_MASK) 2377 cmd->data |= RXH_IP_DST; 2378 } else if (cmd->flow_type == TCP_V6_FLOW || 2379 cmd->flow_type == UDP_V6_FLOW) { 2380 if (i_set & I40E_L3_V6_SRC_MASK) 2381 cmd->data |= RXH_IP_SRC; 2382 if (i_set & I40E_L3_V6_DST_MASK) 2383 cmd->data |= RXH_IP_DST; 2384 } 2385 } 2386 2387 return 0; 2388 } 2389 2390 /** 2391 * i40e_check_mask - Check whether a mask field is set 2392 * @mask: the full mask value 2393 * @field; mask of the field to check 2394 * 2395 * If the given mask is fully set, return positive value. If the mask for the 2396 * field is fully unset, return zero. Otherwise return a negative error code. 2397 **/ 2398 static int i40e_check_mask(u64 mask, u64 field) 2399 { 2400 u64 value = mask & field; 2401 2402 if (value == field) 2403 return 1; 2404 else if (!value) 2405 return 0; 2406 else 2407 return -1; 2408 } 2409 2410 /** 2411 * i40e_parse_rx_flow_user_data - Deconstruct user-defined data 2412 * @fsp: pointer to rx flow specification 2413 * @data: pointer to userdef data structure for storage 2414 * 2415 * Read the user-defined data and deconstruct the value into a structure. No 2416 * other code should read the user-defined data, so as to ensure that every 2417 * place consistently reads the value correctly. 2418 * 2419 * The user-defined field is a 64bit Big Endian format value, which we 2420 * deconstruct by reading bits or bit fields from it. Single bit flags shall 2421 * be defined starting from the highest bits, while small bit field values 2422 * shall be defined starting from the lowest bits. 2423 * 2424 * Returns 0 if the data is valid, and non-zero if the userdef data is invalid 2425 * and the filter should be rejected. The data structure will always be 2426 * modified even if FLOW_EXT is not set. 2427 * 2428 **/ 2429 static int i40e_parse_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 2430 struct i40e_rx_flow_userdef *data) 2431 { 2432 u64 value, mask; 2433 int valid; 2434 2435 /* Zero memory first so it's always consistent. */ 2436 memset(data, 0, sizeof(*data)); 2437 2438 if (!(fsp->flow_type & FLOW_EXT)) 2439 return 0; 2440 2441 value = be64_to_cpu(*((__be64 *)fsp->h_ext.data)); 2442 mask = be64_to_cpu(*((__be64 *)fsp->m_ext.data)); 2443 2444 #define I40E_USERDEF_FLEX_WORD GENMASK_ULL(15, 0) 2445 #define I40E_USERDEF_FLEX_OFFSET GENMASK_ULL(31, 16) 2446 #define I40E_USERDEF_FLEX_FILTER GENMASK_ULL(31, 0) 2447 2448 valid = i40e_check_mask(mask, I40E_USERDEF_FLEX_FILTER); 2449 if (valid < 0) { 2450 return -EINVAL; 2451 } else if (valid) { 2452 data->flex_word = value & I40E_USERDEF_FLEX_WORD; 2453 data->flex_offset = 2454 (value & I40E_USERDEF_FLEX_OFFSET) >> 16; 2455 data->flex_filter = true; 2456 } 2457 2458 return 0; 2459 } 2460 2461 /** 2462 * i40e_fill_rx_flow_user_data - Fill in user-defined data field 2463 * @fsp: pointer to rx_flow specification 2464 * 2465 * Reads the userdef data structure and properly fills in the user defined 2466 * fields of the rx_flow_spec. 2467 **/ 2468 static void i40e_fill_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 2469 struct i40e_rx_flow_userdef *data) 2470 { 2471 u64 value = 0, mask = 0; 2472 2473 if (data->flex_filter) { 2474 value |= data->flex_word; 2475 value |= (u64)data->flex_offset << 16; 2476 mask |= I40E_USERDEF_FLEX_FILTER; 2477 } 2478 2479 if (value || mask) 2480 fsp->flow_type |= FLOW_EXT; 2481 2482 *((__be64 *)fsp->h_ext.data) = cpu_to_be64(value); 2483 *((__be64 *)fsp->m_ext.data) = cpu_to_be64(mask); 2484 } 2485 2486 /** 2487 * i40e_get_ethtool_fdir_all - Populates the rule count of a command 2488 * @pf: Pointer to the physical function struct 2489 * @cmd: The command to get or set Rx flow classification rules 2490 * @rule_locs: Array of used rule locations 2491 * 2492 * This function populates both the total and actual rule count of 2493 * the ethtool flow classification command 2494 * 2495 * Returns 0 on success or -EMSGSIZE if entry not found 2496 **/ 2497 static int i40e_get_ethtool_fdir_all(struct i40e_pf *pf, 2498 struct ethtool_rxnfc *cmd, 2499 u32 *rule_locs) 2500 { 2501 struct i40e_fdir_filter *rule; 2502 struct hlist_node *node2; 2503 int cnt = 0; 2504 2505 /* report total rule count */ 2506 cmd->data = i40e_get_fd_cnt_all(pf); 2507 2508 hlist_for_each_entry_safe(rule, node2, 2509 &pf->fdir_filter_list, fdir_node) { 2510 if (cnt == cmd->rule_cnt) 2511 return -EMSGSIZE; 2512 2513 rule_locs[cnt] = rule->fd_id; 2514 cnt++; 2515 } 2516 2517 cmd->rule_cnt = cnt; 2518 2519 return 0; 2520 } 2521 2522 /** 2523 * i40e_get_ethtool_fdir_entry - Look up a filter based on Rx flow 2524 * @pf: Pointer to the physical function struct 2525 * @cmd: The command to get or set Rx flow classification rules 2526 * 2527 * This function looks up a filter based on the Rx flow classification 2528 * command and fills the flow spec info for it if found 2529 * 2530 * Returns 0 on success or -EINVAL if filter not found 2531 **/ 2532 static int i40e_get_ethtool_fdir_entry(struct i40e_pf *pf, 2533 struct ethtool_rxnfc *cmd) 2534 { 2535 struct ethtool_rx_flow_spec *fsp = 2536 (struct ethtool_rx_flow_spec *)&cmd->fs; 2537 struct i40e_rx_flow_userdef userdef = {0}; 2538 struct i40e_fdir_filter *rule = NULL; 2539 struct hlist_node *node2; 2540 u64 input_set; 2541 u16 index; 2542 2543 hlist_for_each_entry_safe(rule, node2, 2544 &pf->fdir_filter_list, fdir_node) { 2545 if (fsp->location <= rule->fd_id) 2546 break; 2547 } 2548 2549 if (!rule || fsp->location != rule->fd_id) 2550 return -EINVAL; 2551 2552 fsp->flow_type = rule->flow_type; 2553 if (fsp->flow_type == IP_USER_FLOW) { 2554 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4; 2555 fsp->h_u.usr_ip4_spec.proto = 0; 2556 fsp->m_u.usr_ip4_spec.proto = 0; 2557 } 2558 2559 /* Reverse the src and dest notion, since the HW views them from 2560 * Tx perspective where as the user expects it from Rx filter view. 2561 */ 2562 fsp->h_u.tcp_ip4_spec.psrc = rule->dst_port; 2563 fsp->h_u.tcp_ip4_spec.pdst = rule->src_port; 2564 fsp->h_u.tcp_ip4_spec.ip4src = rule->dst_ip; 2565 fsp->h_u.tcp_ip4_spec.ip4dst = rule->src_ip; 2566 2567 switch (rule->flow_type) { 2568 case SCTP_V4_FLOW: 2569 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 2570 break; 2571 case TCP_V4_FLOW: 2572 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2573 break; 2574 case UDP_V4_FLOW: 2575 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2576 break; 2577 case IP_USER_FLOW: 2578 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 2579 break; 2580 default: 2581 /* If we have stored a filter with a flow type not listed here 2582 * it is almost certainly a driver bug. WARN(), and then 2583 * assign the input_set as if all fields are enabled to avoid 2584 * reading unassigned memory. 2585 */ 2586 WARN(1, "Missing input set index for flow_type %d\n", 2587 rule->flow_type); 2588 input_set = 0xFFFFFFFFFFFFFFFFULL; 2589 goto no_input_set; 2590 } 2591 2592 input_set = i40e_read_fd_input_set(pf, index); 2593 2594 no_input_set: 2595 if (input_set & I40E_L3_SRC_MASK) 2596 fsp->m_u.tcp_ip4_spec.ip4src = htonl(0xFFFF); 2597 2598 if (input_set & I40E_L3_DST_MASK) 2599 fsp->m_u.tcp_ip4_spec.ip4dst = htonl(0xFFFF); 2600 2601 if (input_set & I40E_L4_SRC_MASK) 2602 fsp->m_u.tcp_ip4_spec.psrc = htons(0xFFFFFFFF); 2603 2604 if (input_set & I40E_L4_DST_MASK) 2605 fsp->m_u.tcp_ip4_spec.pdst = htons(0xFFFFFFFF); 2606 2607 if (rule->dest_ctl == I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET) 2608 fsp->ring_cookie = RX_CLS_FLOW_DISC; 2609 else 2610 fsp->ring_cookie = rule->q_index; 2611 2612 if (rule->dest_vsi != pf->vsi[pf->lan_vsi]->id) { 2613 struct i40e_vsi *vsi; 2614 2615 vsi = i40e_find_vsi_from_id(pf, rule->dest_vsi); 2616 if (vsi && vsi->type == I40E_VSI_SRIOV) { 2617 /* VFs are zero-indexed by the driver, but ethtool 2618 * expects them to be one-indexed, so add one here 2619 */ 2620 u64 ring_vf = vsi->vf_id + 1; 2621 2622 ring_vf <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF; 2623 fsp->ring_cookie |= ring_vf; 2624 } 2625 } 2626 2627 if (rule->flex_filter) { 2628 userdef.flex_filter = true; 2629 userdef.flex_word = be16_to_cpu(rule->flex_word); 2630 userdef.flex_offset = rule->flex_offset; 2631 } 2632 2633 i40e_fill_rx_flow_user_data(fsp, &userdef); 2634 2635 return 0; 2636 } 2637 2638 /** 2639 * i40e_get_rxnfc - command to get RX flow classification rules 2640 * @netdev: network interface device structure 2641 * @cmd: ethtool rxnfc command 2642 * 2643 * Returns Success if the command is supported. 2644 **/ 2645 static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd, 2646 u32 *rule_locs) 2647 { 2648 struct i40e_netdev_priv *np = netdev_priv(netdev); 2649 struct i40e_vsi *vsi = np->vsi; 2650 struct i40e_pf *pf = vsi->back; 2651 int ret = -EOPNOTSUPP; 2652 2653 switch (cmd->cmd) { 2654 case ETHTOOL_GRXRINGS: 2655 cmd->data = vsi->rss_size; 2656 ret = 0; 2657 break; 2658 case ETHTOOL_GRXFH: 2659 ret = i40e_get_rss_hash_opts(pf, cmd); 2660 break; 2661 case ETHTOOL_GRXCLSRLCNT: 2662 cmd->rule_cnt = pf->fdir_pf_active_filters; 2663 /* report total rule count */ 2664 cmd->data = i40e_get_fd_cnt_all(pf); 2665 ret = 0; 2666 break; 2667 case ETHTOOL_GRXCLSRULE: 2668 ret = i40e_get_ethtool_fdir_entry(pf, cmd); 2669 break; 2670 case ETHTOOL_GRXCLSRLALL: 2671 ret = i40e_get_ethtool_fdir_all(pf, cmd, rule_locs); 2672 break; 2673 default: 2674 break; 2675 } 2676 2677 return ret; 2678 } 2679 2680 /** 2681 * i40e_get_rss_hash_bits - Read RSS Hash bits from register 2682 * @nfc: pointer to user request 2683 * @i_setc bits currently set 2684 * 2685 * Returns value of bits to be set per user request 2686 **/ 2687 static u64 i40e_get_rss_hash_bits(struct ethtool_rxnfc *nfc, u64 i_setc) 2688 { 2689 u64 i_set = i_setc; 2690 u64 src_l3 = 0, dst_l3 = 0; 2691 2692 if (nfc->data & RXH_L4_B_0_1) 2693 i_set |= I40E_L4_SRC_MASK; 2694 else 2695 i_set &= ~I40E_L4_SRC_MASK; 2696 if (nfc->data & RXH_L4_B_2_3) 2697 i_set |= I40E_L4_DST_MASK; 2698 else 2699 i_set &= ~I40E_L4_DST_MASK; 2700 2701 if (nfc->flow_type == TCP_V6_FLOW || nfc->flow_type == UDP_V6_FLOW) { 2702 src_l3 = I40E_L3_V6_SRC_MASK; 2703 dst_l3 = I40E_L3_V6_DST_MASK; 2704 } else if (nfc->flow_type == TCP_V4_FLOW || 2705 nfc->flow_type == UDP_V4_FLOW) { 2706 src_l3 = I40E_L3_SRC_MASK; 2707 dst_l3 = I40E_L3_DST_MASK; 2708 } else { 2709 /* Any other flow type are not supported here */ 2710 return i_set; 2711 } 2712 2713 if (nfc->data & RXH_IP_SRC) 2714 i_set |= src_l3; 2715 else 2716 i_set &= ~src_l3; 2717 if (nfc->data & RXH_IP_DST) 2718 i_set |= dst_l3; 2719 else 2720 i_set &= ~dst_l3; 2721 2722 return i_set; 2723 } 2724 2725 /** 2726 * i40e_set_rss_hash_opt - Enable/Disable flow types for RSS hash 2727 * @pf: pointer to the physical function struct 2728 * @cmd: ethtool rxnfc command 2729 * 2730 * Returns Success if the flow input set is supported. 2731 **/ 2732 static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc) 2733 { 2734 struct i40e_hw *hw = &pf->hw; 2735 u64 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) | 2736 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32); 2737 u8 flow_pctype = 0; 2738 u64 i_set, i_setc; 2739 2740 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 2741 dev_err(&pf->pdev->dev, 2742 "Change of RSS hash input set is not supported when MFP mode is enabled\n"); 2743 return -EOPNOTSUPP; 2744 } 2745 2746 /* RSS does not support anything other than hashing 2747 * to queues on src and dst IPs and ports 2748 */ 2749 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST | 2750 RXH_L4_B_0_1 | RXH_L4_B_2_3)) 2751 return -EINVAL; 2752 2753 switch (nfc->flow_type) { 2754 case TCP_V4_FLOW: 2755 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 2756 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2757 hena |= 2758 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); 2759 break; 2760 case TCP_V6_FLOW: 2761 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 2762 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2763 hena |= 2764 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); 2765 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2766 hena |= 2767 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK); 2768 break; 2769 case UDP_V4_FLOW: 2770 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 2771 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2772 hena |= 2773 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | 2774 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP); 2775 2776 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 2777 break; 2778 case UDP_V6_FLOW: 2779 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 2780 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) 2781 hena |= 2782 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | 2783 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP); 2784 2785 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 2786 break; 2787 case AH_ESP_V4_FLOW: 2788 case AH_V4_FLOW: 2789 case ESP_V4_FLOW: 2790 case SCTP_V4_FLOW: 2791 if ((nfc->data & RXH_L4_B_0_1) || 2792 (nfc->data & RXH_L4_B_2_3)) 2793 return -EINVAL; 2794 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER); 2795 break; 2796 case AH_ESP_V6_FLOW: 2797 case AH_V6_FLOW: 2798 case ESP_V6_FLOW: 2799 case SCTP_V6_FLOW: 2800 if ((nfc->data & RXH_L4_B_0_1) || 2801 (nfc->data & RXH_L4_B_2_3)) 2802 return -EINVAL; 2803 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER); 2804 break; 2805 case IPV4_FLOW: 2806 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | 2807 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 2808 break; 2809 case IPV6_FLOW: 2810 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | 2811 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 2812 break; 2813 default: 2814 return -EINVAL; 2815 } 2816 2817 if (flow_pctype) { 2818 i_setc = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, 2819 flow_pctype)) | 2820 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, 2821 flow_pctype)) << 32); 2822 i_set = i40e_get_rss_hash_bits(nfc, i_setc); 2823 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_pctype), 2824 (u32)i_set); 2825 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_pctype), 2826 (u32)(i_set >> 32)); 2827 hena |= BIT_ULL(flow_pctype); 2828 } 2829 2830 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena); 2831 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32)); 2832 i40e_flush(hw); 2833 2834 return 0; 2835 } 2836 2837 /** 2838 * i40e_update_ethtool_fdir_entry - Updates the fdir filter entry 2839 * @vsi: Pointer to the targeted VSI 2840 * @input: The filter to update or NULL to indicate deletion 2841 * @sw_idx: Software index to the filter 2842 * @cmd: The command to get or set Rx flow classification rules 2843 * 2844 * This function updates (or deletes) a Flow Director entry from 2845 * the hlist of the corresponding PF 2846 * 2847 * Returns 0 on success 2848 **/ 2849 static int i40e_update_ethtool_fdir_entry(struct i40e_vsi *vsi, 2850 struct i40e_fdir_filter *input, 2851 u16 sw_idx, 2852 struct ethtool_rxnfc *cmd) 2853 { 2854 struct i40e_fdir_filter *rule, *parent; 2855 struct i40e_pf *pf = vsi->back; 2856 struct hlist_node *node2; 2857 int err = -EINVAL; 2858 2859 parent = NULL; 2860 rule = NULL; 2861 2862 hlist_for_each_entry_safe(rule, node2, 2863 &pf->fdir_filter_list, fdir_node) { 2864 /* hash found, or no matching entry */ 2865 if (rule->fd_id >= sw_idx) 2866 break; 2867 parent = rule; 2868 } 2869 2870 /* if there is an old rule occupying our place remove it */ 2871 if (rule && (rule->fd_id == sw_idx)) { 2872 /* Remove this rule, since we're either deleting it, or 2873 * replacing it. 2874 */ 2875 err = i40e_add_del_fdir(vsi, rule, false); 2876 hlist_del(&rule->fdir_node); 2877 kfree(rule); 2878 pf->fdir_pf_active_filters--; 2879 } 2880 2881 /* If we weren't given an input, this is a delete, so just return the 2882 * error code indicating if there was an entry at the requested slot 2883 */ 2884 if (!input) 2885 return err; 2886 2887 /* Otherwise, install the new rule as requested */ 2888 INIT_HLIST_NODE(&input->fdir_node); 2889 2890 /* add filter to the list */ 2891 if (parent) 2892 hlist_add_behind(&input->fdir_node, &parent->fdir_node); 2893 else 2894 hlist_add_head(&input->fdir_node, 2895 &pf->fdir_filter_list); 2896 2897 /* update counts */ 2898 pf->fdir_pf_active_filters++; 2899 2900 return 0; 2901 } 2902 2903 /** 2904 * i40e_prune_flex_pit_list - Cleanup unused entries in FLX_PIT table 2905 * @pf: pointer to PF structure 2906 * 2907 * This function searches the list of filters and determines which FLX_PIT 2908 * entries are still required. It will prune any entries which are no longer 2909 * in use after the deletion. 2910 **/ 2911 static void i40e_prune_flex_pit_list(struct i40e_pf *pf) 2912 { 2913 struct i40e_flex_pit *entry, *tmp; 2914 struct i40e_fdir_filter *rule; 2915 2916 /* First, we'll check the l3 table */ 2917 list_for_each_entry_safe(entry, tmp, &pf->l3_flex_pit_list, list) { 2918 bool found = false; 2919 2920 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 2921 if (rule->flow_type != IP_USER_FLOW) 2922 continue; 2923 if (rule->flex_filter && 2924 rule->flex_offset == entry->src_offset) { 2925 found = true; 2926 break; 2927 } 2928 } 2929 2930 /* If we didn't find the filter, then we can prune this entry 2931 * from the list. 2932 */ 2933 if (!found) { 2934 list_del(&entry->list); 2935 kfree(entry); 2936 } 2937 } 2938 2939 /* Followed by the L4 table */ 2940 list_for_each_entry_safe(entry, tmp, &pf->l4_flex_pit_list, list) { 2941 bool found = false; 2942 2943 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 2944 /* Skip this filter if it's L3, since we already 2945 * checked those in the above loop 2946 */ 2947 if (rule->flow_type == IP_USER_FLOW) 2948 continue; 2949 if (rule->flex_filter && 2950 rule->flex_offset == entry->src_offset) { 2951 found = true; 2952 break; 2953 } 2954 } 2955 2956 /* If we didn't find the filter, then we can prune this entry 2957 * from the list. 2958 */ 2959 if (!found) { 2960 list_del(&entry->list); 2961 kfree(entry); 2962 } 2963 } 2964 } 2965 2966 /** 2967 * i40e_del_fdir_entry - Deletes a Flow Director filter entry 2968 * @vsi: Pointer to the targeted VSI 2969 * @cmd: The command to get or set Rx flow classification rules 2970 * 2971 * The function removes a Flow Director filter entry from the 2972 * hlist of the corresponding PF 2973 * 2974 * Returns 0 on success 2975 */ 2976 static int i40e_del_fdir_entry(struct i40e_vsi *vsi, 2977 struct ethtool_rxnfc *cmd) 2978 { 2979 struct ethtool_rx_flow_spec *fsp = 2980 (struct ethtool_rx_flow_spec *)&cmd->fs; 2981 struct i40e_pf *pf = vsi->back; 2982 int ret = 0; 2983 2984 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 2985 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 2986 return -EBUSY; 2987 2988 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 2989 return -EBUSY; 2990 2991 ret = i40e_update_ethtool_fdir_entry(vsi, NULL, fsp->location, cmd); 2992 2993 i40e_prune_flex_pit_list(pf); 2994 2995 i40e_fdir_check_and_reenable(pf); 2996 return ret; 2997 } 2998 2999 /** 3000 * i40e_unused_pit_index - Find an unused PIT index for given list 3001 * @pf: the PF data structure 3002 * 3003 * Find the first unused flexible PIT index entry. We search both the L3 and 3004 * L4 flexible PIT lists so that the returned index is unique and unused by 3005 * either currently programmed L3 or L4 filters. We use a bit field as storage 3006 * to track which indexes are already used. 3007 **/ 3008 static u8 i40e_unused_pit_index(struct i40e_pf *pf) 3009 { 3010 unsigned long available_index = 0xFF; 3011 struct i40e_flex_pit *entry; 3012 3013 /* We need to make sure that the new index isn't in use by either L3 3014 * or L4 filters so that IP_USER_FLOW filters can program both L3 and 3015 * L4 to use the same index. 3016 */ 3017 3018 list_for_each_entry(entry, &pf->l4_flex_pit_list, list) 3019 clear_bit(entry->pit_index, &available_index); 3020 3021 list_for_each_entry(entry, &pf->l3_flex_pit_list, list) 3022 clear_bit(entry->pit_index, &available_index); 3023 3024 return find_first_bit(&available_index, 8); 3025 } 3026 3027 /** 3028 * i40e_find_flex_offset - Find an existing flex src_offset 3029 * @flex_pit_list: L3 or L4 flex PIT list 3030 * @src_offset: new src_offset to find 3031 * 3032 * Searches the flex_pit_list for an existing offset. If no offset is 3033 * currently programmed, then this will return an ERR_PTR if there is no space 3034 * to add a new offset, otherwise it returns NULL. 3035 **/ 3036 static 3037 struct i40e_flex_pit *i40e_find_flex_offset(struct list_head *flex_pit_list, 3038 u16 src_offset) 3039 { 3040 struct i40e_flex_pit *entry; 3041 int size = 0; 3042 3043 /* Search for the src_offset first. If we find a matching entry 3044 * already programmed, we can simply re-use it. 3045 */ 3046 list_for_each_entry(entry, flex_pit_list, list) { 3047 size++; 3048 if (entry->src_offset == src_offset) 3049 return entry; 3050 } 3051 3052 /* If we haven't found an entry yet, then the provided src offset has 3053 * not yet been programmed. We will program the src offset later on, 3054 * but we need to indicate whether there is enough space to do so 3055 * here. We'll make use of ERR_PTR for this purpose. 3056 */ 3057 if (size >= I40E_FLEX_PIT_TABLE_SIZE) 3058 return ERR_PTR(-ENOSPC); 3059 3060 return NULL; 3061 } 3062 3063 /** 3064 * i40e_add_flex_offset - Add src_offset to flex PIT table list 3065 * @flex_pit_list: L3 or L4 flex PIT list 3066 * @src_offset: new src_offset to add 3067 * @pit_index: the PIT index to program 3068 * 3069 * This function programs the new src_offset to the list. It is expected that 3070 * i40e_find_flex_offset has already been tried and returned NULL, indicating 3071 * that this offset is not programmed, and that the list has enough space to 3072 * store another offset. 3073 * 3074 * Returns 0 on success, and negative value on error. 3075 **/ 3076 static int i40e_add_flex_offset(struct list_head *flex_pit_list, 3077 u16 src_offset, 3078 u8 pit_index) 3079 { 3080 struct i40e_flex_pit *new_pit, *entry; 3081 3082 new_pit = kzalloc(sizeof(*entry), GFP_KERNEL); 3083 if (!new_pit) 3084 return -ENOMEM; 3085 3086 new_pit->src_offset = src_offset; 3087 new_pit->pit_index = pit_index; 3088 3089 /* We need to insert this item such that the list is sorted by 3090 * src_offset in ascending order. 3091 */ 3092 list_for_each_entry(entry, flex_pit_list, list) { 3093 if (new_pit->src_offset < entry->src_offset) { 3094 list_add_tail(&new_pit->list, &entry->list); 3095 return 0; 3096 } 3097 3098 /* If we found an entry with our offset already programmed we 3099 * can simply return here, after freeing the memory. However, 3100 * if the pit_index does not match we need to report an error. 3101 */ 3102 if (new_pit->src_offset == entry->src_offset) { 3103 int err = 0; 3104 3105 /* If the PIT index is not the same we can't re-use 3106 * the entry, so we must report an error. 3107 */ 3108 if (new_pit->pit_index != entry->pit_index) 3109 err = -EINVAL; 3110 3111 kfree(new_pit); 3112 return err; 3113 } 3114 } 3115 3116 /* If we reached here, then we haven't yet added the item. This means 3117 * that we should add the item at the end of the list. 3118 */ 3119 list_add_tail(&new_pit->list, flex_pit_list); 3120 return 0; 3121 } 3122 3123 /** 3124 * __i40e_reprogram_flex_pit - Re-program specific FLX_PIT table 3125 * @pf: Pointer to the PF structure 3126 * @flex_pit_list: list of flexible src offsets in use 3127 * #flex_pit_start: index to first entry for this section of the table 3128 * 3129 * In order to handle flexible data, the hardware uses a table of values 3130 * called the FLX_PIT table. This table is used to indicate which sections of 3131 * the input correspond to what PIT index values. Unfortunately, hardware is 3132 * very restrictive about programming this table. Entries must be ordered by 3133 * src_offset in ascending order, without duplicates. Additionally, unused 3134 * entries must be set to the unused index value, and must have valid size and 3135 * length according to the src_offset ordering. 3136 * 3137 * This function will reprogram the FLX_PIT register from a book-keeping 3138 * structure that we guarantee is already ordered correctly, and has no more 3139 * than 3 entries. 3140 * 3141 * To make things easier, we only support flexible values of one word length, 3142 * rather than allowing variable length flexible values. 3143 **/ 3144 static void __i40e_reprogram_flex_pit(struct i40e_pf *pf, 3145 struct list_head *flex_pit_list, 3146 int flex_pit_start) 3147 { 3148 struct i40e_flex_pit *entry = NULL; 3149 u16 last_offset = 0; 3150 int i = 0, j = 0; 3151 3152 /* First, loop over the list of flex PIT entries, and reprogram the 3153 * registers. 3154 */ 3155 list_for_each_entry(entry, flex_pit_list, list) { 3156 /* We have to be careful when programming values for the 3157 * largest SRC_OFFSET value. It is possible that adding 3158 * additional empty values at the end would overflow the space 3159 * for the SRC_OFFSET in the FLX_PIT register. To avoid this, 3160 * we check here and add the empty values prior to adding the 3161 * largest value. 3162 * 3163 * To determine this, we will use a loop from i+1 to 3, which 3164 * will determine whether the unused entries would have valid 3165 * SRC_OFFSET. Note that there cannot be extra entries past 3166 * this value, because the only valid values would have been 3167 * larger than I40E_MAX_FLEX_SRC_OFFSET, and thus would not 3168 * have been added to the list in the first place. 3169 */ 3170 for (j = i + 1; j < 3; j++) { 3171 u16 offset = entry->src_offset + j; 3172 int index = flex_pit_start + i; 3173 u32 value = I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 3174 1, 3175 offset - 3); 3176 3177 if (offset > I40E_MAX_FLEX_SRC_OFFSET) { 3178 i40e_write_rx_ctl(&pf->hw, 3179 I40E_PRTQF_FLX_PIT(index), 3180 value); 3181 i++; 3182 } 3183 } 3184 3185 /* Now, we can program the actual value into the table */ 3186 i40e_write_rx_ctl(&pf->hw, 3187 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 3188 I40E_FLEX_PREP_VAL(entry->pit_index + 50, 3189 1, 3190 entry->src_offset)); 3191 i++; 3192 } 3193 3194 /* In order to program the last entries in the table, we need to 3195 * determine the valid offset. If the list is empty, we'll just start 3196 * with 0. Otherwise, we'll start with the last item offset and add 1. 3197 * This ensures that all entries have valid sizes. If we don't do this 3198 * correctly, the hardware will disable flexible field parsing. 3199 */ 3200 if (!list_empty(flex_pit_list)) 3201 last_offset = list_prev_entry(entry, list)->src_offset + 1; 3202 3203 for (; i < 3; i++, last_offset++) { 3204 i40e_write_rx_ctl(&pf->hw, 3205 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 3206 I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 3207 1, 3208 last_offset)); 3209 } 3210 } 3211 3212 /** 3213 * i40e_reprogram_flex_pit - Reprogram all FLX_PIT tables after input set change 3214 * @pf: pointer to the PF structure 3215 * 3216 * This function reprograms both the L3 and L4 FLX_PIT tables. See the 3217 * internal helper function for implementation details. 3218 **/ 3219 static void i40e_reprogram_flex_pit(struct i40e_pf *pf) 3220 { 3221 __i40e_reprogram_flex_pit(pf, &pf->l3_flex_pit_list, 3222 I40E_FLEX_PIT_IDX_START_L3); 3223 3224 __i40e_reprogram_flex_pit(pf, &pf->l4_flex_pit_list, 3225 I40E_FLEX_PIT_IDX_START_L4); 3226 3227 /* We also need to program the L3 and L4 GLQF ORT register */ 3228 i40e_write_rx_ctl(&pf->hw, 3229 I40E_GLQF_ORT(I40E_L3_GLQF_ORT_IDX), 3230 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L3, 3231 3, 1)); 3232 3233 i40e_write_rx_ctl(&pf->hw, 3234 I40E_GLQF_ORT(I40E_L4_GLQF_ORT_IDX), 3235 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L4, 3236 3, 1)); 3237 } 3238 3239 /** 3240 * i40e_flow_str - Converts a flow_type into a human readable string 3241 * @flow_type: the flow type from a flow specification 3242 * 3243 * Currently only flow types we support are included here, and the string 3244 * value attempts to match what ethtool would use to configure this flow type. 3245 **/ 3246 static const char *i40e_flow_str(struct ethtool_rx_flow_spec *fsp) 3247 { 3248 switch (fsp->flow_type & ~FLOW_EXT) { 3249 case TCP_V4_FLOW: 3250 return "tcp4"; 3251 case UDP_V4_FLOW: 3252 return "udp4"; 3253 case SCTP_V4_FLOW: 3254 return "sctp4"; 3255 case IP_USER_FLOW: 3256 return "ip4"; 3257 default: 3258 return "unknown"; 3259 } 3260 } 3261 3262 /** 3263 * i40e_pit_index_to_mask - Return the FLEX mask for a given PIT index 3264 * @pit_index: PIT index to convert 3265 * 3266 * Returns the mask for a given PIT index. Will return 0 if the pit_index is 3267 * of range. 3268 **/ 3269 static u64 i40e_pit_index_to_mask(int pit_index) 3270 { 3271 switch (pit_index) { 3272 case 0: 3273 return I40E_FLEX_50_MASK; 3274 case 1: 3275 return I40E_FLEX_51_MASK; 3276 case 2: 3277 return I40E_FLEX_52_MASK; 3278 case 3: 3279 return I40E_FLEX_53_MASK; 3280 case 4: 3281 return I40E_FLEX_54_MASK; 3282 case 5: 3283 return I40E_FLEX_55_MASK; 3284 case 6: 3285 return I40E_FLEX_56_MASK; 3286 case 7: 3287 return I40E_FLEX_57_MASK; 3288 default: 3289 return 0; 3290 } 3291 } 3292 3293 /** 3294 * i40e_print_input_set - Show changes between two input sets 3295 * @vsi: the vsi being configured 3296 * @old: the old input set 3297 * @new: the new input set 3298 * 3299 * Print the difference between old and new input sets by showing which series 3300 * of words are toggled on or off. Only displays the bits we actually support 3301 * changing. 3302 **/ 3303 static void i40e_print_input_set(struct i40e_vsi *vsi, u64 old, u64 new) 3304 { 3305 struct i40e_pf *pf = vsi->back; 3306 bool old_value, new_value; 3307 int i; 3308 3309 old_value = !!(old & I40E_L3_SRC_MASK); 3310 new_value = !!(new & I40E_L3_SRC_MASK); 3311 if (old_value != new_value) 3312 netif_info(pf, drv, vsi->netdev, "L3 source address: %s -> %s\n", 3313 old_value ? "ON" : "OFF", 3314 new_value ? "ON" : "OFF"); 3315 3316 old_value = !!(old & I40E_L3_DST_MASK); 3317 new_value = !!(new & I40E_L3_DST_MASK); 3318 if (old_value != new_value) 3319 netif_info(pf, drv, vsi->netdev, "L3 destination address: %s -> %s\n", 3320 old_value ? "ON" : "OFF", 3321 new_value ? "ON" : "OFF"); 3322 3323 old_value = !!(old & I40E_L4_SRC_MASK); 3324 new_value = !!(new & I40E_L4_SRC_MASK); 3325 if (old_value != new_value) 3326 netif_info(pf, drv, vsi->netdev, "L4 source port: %s -> %s\n", 3327 old_value ? "ON" : "OFF", 3328 new_value ? "ON" : "OFF"); 3329 3330 old_value = !!(old & I40E_L4_DST_MASK); 3331 new_value = !!(new & I40E_L4_DST_MASK); 3332 if (old_value != new_value) 3333 netif_info(pf, drv, vsi->netdev, "L4 destination port: %s -> %s\n", 3334 old_value ? "ON" : "OFF", 3335 new_value ? "ON" : "OFF"); 3336 3337 old_value = !!(old & I40E_VERIFY_TAG_MASK); 3338 new_value = !!(new & I40E_VERIFY_TAG_MASK); 3339 if (old_value != new_value) 3340 netif_info(pf, drv, vsi->netdev, "SCTP verification tag: %s -> %s\n", 3341 old_value ? "ON" : "OFF", 3342 new_value ? "ON" : "OFF"); 3343 3344 /* Show change of flexible filter entries */ 3345 for (i = 0; i < I40E_FLEX_INDEX_ENTRIES; i++) { 3346 u64 flex_mask = i40e_pit_index_to_mask(i); 3347 3348 old_value = !!(old & flex_mask); 3349 new_value = !!(new & flex_mask); 3350 if (old_value != new_value) 3351 netif_info(pf, drv, vsi->netdev, "FLEX index %d: %s -> %s\n", 3352 i, 3353 old_value ? "ON" : "OFF", 3354 new_value ? "ON" : "OFF"); 3355 } 3356 3357 netif_info(pf, drv, vsi->netdev, " Current input set: %0llx\n", 3358 old); 3359 netif_info(pf, drv, vsi->netdev, "Requested input set: %0llx\n", 3360 new); 3361 } 3362 3363 /** 3364 * i40e_check_fdir_input_set - Check that a given rx_flow_spec mask is valid 3365 * @vsi: pointer to the targeted VSI 3366 * @fsp: pointer to Rx flow specification 3367 * @userdef: userdefined data from flow specification 3368 * 3369 * Ensures that a given ethtool_rx_flow_spec has a valid mask. Some support 3370 * for partial matches exists with a few limitations. First, hardware only 3371 * supports masking by word boundary (2 bytes) and not per individual bit. 3372 * Second, hardware is limited to using one mask for a flow type and cannot 3373 * use a separate mask for each filter. 3374 * 3375 * To support these limitations, if we already have a configured filter for 3376 * the specified type, this function enforces that new filters of the type 3377 * match the configured input set. Otherwise, if we do not have a filter of 3378 * the specified type, we allow the input set to be updated to match the 3379 * desired filter. 3380 * 3381 * To help ensure that administrators understand why filters weren't displayed 3382 * as supported, we print a diagnostic message displaying how the input set 3383 * would change and warning to delete the preexisting filters if required. 3384 * 3385 * Returns 0 on successful input set match, and a negative return code on 3386 * failure. 3387 **/ 3388 static int i40e_check_fdir_input_set(struct i40e_vsi *vsi, 3389 struct ethtool_rx_flow_spec *fsp, 3390 struct i40e_rx_flow_userdef *userdef) 3391 { 3392 struct i40e_pf *pf = vsi->back; 3393 struct ethtool_tcpip4_spec *tcp_ip4_spec; 3394 struct ethtool_usrip4_spec *usr_ip4_spec; 3395 u64 current_mask, new_mask; 3396 bool new_flex_offset = false; 3397 bool flex_l3 = false; 3398 u16 *fdir_filter_count; 3399 u16 index, src_offset = 0; 3400 u8 pit_index = 0; 3401 int err; 3402 3403 switch (fsp->flow_type & ~FLOW_EXT) { 3404 case SCTP_V4_FLOW: 3405 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 3406 fdir_filter_count = &pf->fd_sctp4_filter_cnt; 3407 break; 3408 case TCP_V4_FLOW: 3409 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 3410 fdir_filter_count = &pf->fd_tcp4_filter_cnt; 3411 break; 3412 case UDP_V4_FLOW: 3413 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 3414 fdir_filter_count = &pf->fd_udp4_filter_cnt; 3415 break; 3416 case IP_USER_FLOW: 3417 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 3418 fdir_filter_count = &pf->fd_ip4_filter_cnt; 3419 flex_l3 = true; 3420 break; 3421 default: 3422 return -EOPNOTSUPP; 3423 } 3424 3425 /* Read the current input set from register memory. */ 3426 current_mask = i40e_read_fd_input_set(pf, index); 3427 new_mask = current_mask; 3428 3429 /* Determine, if any, the required changes to the input set in order 3430 * to support the provided mask. 3431 * 3432 * Hardware only supports masking at word (2 byte) granularity and does 3433 * not support full bitwise masking. This implementation simplifies 3434 * even further and only supports fully enabled or fully disabled 3435 * masks for each field, even though we could split the ip4src and 3436 * ip4dst fields. 3437 */ 3438 switch (fsp->flow_type & ~FLOW_EXT) { 3439 case SCTP_V4_FLOW: 3440 new_mask &= ~I40E_VERIFY_TAG_MASK; 3441 /* Fall through */ 3442 case TCP_V4_FLOW: 3443 case UDP_V4_FLOW: 3444 tcp_ip4_spec = &fsp->m_u.tcp_ip4_spec; 3445 3446 /* IPv4 source address */ 3447 if (tcp_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 3448 new_mask |= I40E_L3_SRC_MASK; 3449 else if (!tcp_ip4_spec->ip4src) 3450 new_mask &= ~I40E_L3_SRC_MASK; 3451 else 3452 return -EOPNOTSUPP; 3453 3454 /* IPv4 destination address */ 3455 if (tcp_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 3456 new_mask |= I40E_L3_DST_MASK; 3457 else if (!tcp_ip4_spec->ip4dst) 3458 new_mask &= ~I40E_L3_DST_MASK; 3459 else 3460 return -EOPNOTSUPP; 3461 3462 /* L4 source port */ 3463 if (tcp_ip4_spec->psrc == htons(0xFFFF)) 3464 new_mask |= I40E_L4_SRC_MASK; 3465 else if (!tcp_ip4_spec->psrc) 3466 new_mask &= ~I40E_L4_SRC_MASK; 3467 else 3468 return -EOPNOTSUPP; 3469 3470 /* L4 destination port */ 3471 if (tcp_ip4_spec->pdst == htons(0xFFFF)) 3472 new_mask |= I40E_L4_DST_MASK; 3473 else if (!tcp_ip4_spec->pdst) 3474 new_mask &= ~I40E_L4_DST_MASK; 3475 else 3476 return -EOPNOTSUPP; 3477 3478 /* Filtering on Type of Service is not supported. */ 3479 if (tcp_ip4_spec->tos) 3480 return -EOPNOTSUPP; 3481 3482 break; 3483 case IP_USER_FLOW: 3484 usr_ip4_spec = &fsp->m_u.usr_ip4_spec; 3485 3486 /* IPv4 source address */ 3487 if (usr_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 3488 new_mask |= I40E_L3_SRC_MASK; 3489 else if (!usr_ip4_spec->ip4src) 3490 new_mask &= ~I40E_L3_SRC_MASK; 3491 else 3492 return -EOPNOTSUPP; 3493 3494 /* IPv4 destination address */ 3495 if (usr_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 3496 new_mask |= I40E_L3_DST_MASK; 3497 else if (!usr_ip4_spec->ip4dst) 3498 new_mask &= ~I40E_L3_DST_MASK; 3499 else 3500 return -EOPNOTSUPP; 3501 3502 /* First 4 bytes of L4 header */ 3503 if (usr_ip4_spec->l4_4_bytes == htonl(0xFFFFFFFF)) 3504 new_mask |= I40E_L4_SRC_MASK | I40E_L4_DST_MASK; 3505 else if (!usr_ip4_spec->l4_4_bytes) 3506 new_mask &= ~(I40E_L4_SRC_MASK | I40E_L4_DST_MASK); 3507 else 3508 return -EOPNOTSUPP; 3509 3510 /* Filtering on Type of Service is not supported. */ 3511 if (usr_ip4_spec->tos) 3512 return -EOPNOTSUPP; 3513 3514 /* Filtering on IP version is not supported */ 3515 if (usr_ip4_spec->ip_ver) 3516 return -EINVAL; 3517 3518 /* Filtering on L4 protocol is not supported */ 3519 if (usr_ip4_spec->proto) 3520 return -EINVAL; 3521 3522 break; 3523 default: 3524 return -EOPNOTSUPP; 3525 } 3526 3527 /* First, clear all flexible filter entries */ 3528 new_mask &= ~I40E_FLEX_INPUT_MASK; 3529 3530 /* If we have a flexible filter, try to add this offset to the correct 3531 * flexible filter PIT list. Once finished, we can update the mask. 3532 * If the src_offset changed, we will get a new mask value which will 3533 * trigger an input set change. 3534 */ 3535 if (userdef->flex_filter) { 3536 struct i40e_flex_pit *l3_flex_pit = NULL, *flex_pit = NULL; 3537 3538 /* Flexible offset must be even, since the flexible payload 3539 * must be aligned on 2-byte boundary. 3540 */ 3541 if (userdef->flex_offset & 0x1) { 3542 dev_warn(&pf->pdev->dev, 3543 "Flexible data offset must be 2-byte aligned\n"); 3544 return -EINVAL; 3545 } 3546 3547 src_offset = userdef->flex_offset >> 1; 3548 3549 /* FLX_PIT source offset value is only so large */ 3550 if (src_offset > I40E_MAX_FLEX_SRC_OFFSET) { 3551 dev_warn(&pf->pdev->dev, 3552 "Flexible data must reside within first 64 bytes of the packet payload\n"); 3553 return -EINVAL; 3554 } 3555 3556 /* See if this offset has already been programmed. If we get 3557 * an ERR_PTR, then the filter is not safe to add. Otherwise, 3558 * if we get a NULL pointer, this means we will need to add 3559 * the offset. 3560 */ 3561 flex_pit = i40e_find_flex_offset(&pf->l4_flex_pit_list, 3562 src_offset); 3563 if (IS_ERR(flex_pit)) 3564 return PTR_ERR(flex_pit); 3565 3566 /* IP_USER_FLOW filters match both L4 (ICMP) and L3 (unknown) 3567 * packet types, and thus we need to program both L3 and L4 3568 * flexible values. These must have identical flexible index, 3569 * as otherwise we can't correctly program the input set. So 3570 * we'll find both an L3 and L4 index and make sure they are 3571 * the same. 3572 */ 3573 if (flex_l3) { 3574 l3_flex_pit = 3575 i40e_find_flex_offset(&pf->l3_flex_pit_list, 3576 src_offset); 3577 if (IS_ERR(l3_flex_pit)) 3578 return PTR_ERR(l3_flex_pit); 3579 3580 if (flex_pit) { 3581 /* If we already had a matching L4 entry, we 3582 * need to make sure that the L3 entry we 3583 * obtained uses the same index. 3584 */ 3585 if (l3_flex_pit) { 3586 if (l3_flex_pit->pit_index != 3587 flex_pit->pit_index) { 3588 return -EINVAL; 3589 } 3590 } else { 3591 new_flex_offset = true; 3592 } 3593 } else { 3594 flex_pit = l3_flex_pit; 3595 } 3596 } 3597 3598 /* If we didn't find an existing flex offset, we need to 3599 * program a new one. However, we don't immediately program it 3600 * here because we will wait to program until after we check 3601 * that it is safe to change the input set. 3602 */ 3603 if (!flex_pit) { 3604 new_flex_offset = true; 3605 pit_index = i40e_unused_pit_index(pf); 3606 } else { 3607 pit_index = flex_pit->pit_index; 3608 } 3609 3610 /* Update the mask with the new offset */ 3611 new_mask |= i40e_pit_index_to_mask(pit_index); 3612 } 3613 3614 /* If the mask and flexible filter offsets for this filter match the 3615 * currently programmed values we don't need any input set change, so 3616 * this filter is safe to install. 3617 */ 3618 if (new_mask == current_mask && !new_flex_offset) 3619 return 0; 3620 3621 netif_info(pf, drv, vsi->netdev, "Input set change requested for %s flows:\n", 3622 i40e_flow_str(fsp)); 3623 i40e_print_input_set(vsi, current_mask, new_mask); 3624 if (new_flex_offset) { 3625 netif_info(pf, drv, vsi->netdev, "FLEX index %d: Offset -> %d", 3626 pit_index, src_offset); 3627 } 3628 3629 /* Hardware input sets are global across multiple ports, so even the 3630 * main port cannot change them when in MFP mode as this would impact 3631 * any filters on the other ports. 3632 */ 3633 if (pf->flags & I40E_FLAG_MFP_ENABLED) { 3634 netif_err(pf, drv, vsi->netdev, "Cannot change Flow Director input sets while MFP is enabled\n"); 3635 return -EOPNOTSUPP; 3636 } 3637 3638 /* This filter requires us to update the input set. However, hardware 3639 * only supports one input set per flow type, and does not support 3640 * separate masks for each filter. This means that we can only support 3641 * a single mask for all filters of a specific type. 3642 * 3643 * If we have preexisting filters, they obviously depend on the 3644 * current programmed input set. Display a diagnostic message in this 3645 * case explaining why the filter could not be accepted. 3646 */ 3647 if (*fdir_filter_count) { 3648 netif_err(pf, drv, vsi->netdev, "Cannot change input set for %s flows until %d preexisting filters are removed\n", 3649 i40e_flow_str(fsp), 3650 *fdir_filter_count); 3651 return -EOPNOTSUPP; 3652 } 3653 3654 i40e_write_fd_input_set(pf, index, new_mask); 3655 3656 /* Add the new offset and update table, if necessary */ 3657 if (new_flex_offset) { 3658 err = i40e_add_flex_offset(&pf->l4_flex_pit_list, src_offset, 3659 pit_index); 3660 if (err) 3661 return err; 3662 3663 if (flex_l3) { 3664 err = i40e_add_flex_offset(&pf->l3_flex_pit_list, 3665 src_offset, 3666 pit_index); 3667 if (err) 3668 return err; 3669 } 3670 3671 i40e_reprogram_flex_pit(pf); 3672 } 3673 3674 return 0; 3675 } 3676 3677 /** 3678 * i40e_add_fdir_ethtool - Add/Remove Flow Director filters 3679 * @vsi: pointer to the targeted VSI 3680 * @cmd: command to get or set RX flow classification rules 3681 * 3682 * Add Flow Director filters for a specific flow spec based on their 3683 * protocol. Returns 0 if the filters were successfully added. 3684 **/ 3685 static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi, 3686 struct ethtool_rxnfc *cmd) 3687 { 3688 struct i40e_rx_flow_userdef userdef; 3689 struct ethtool_rx_flow_spec *fsp; 3690 struct i40e_fdir_filter *input; 3691 u16 dest_vsi = 0, q_index = 0; 3692 struct i40e_pf *pf; 3693 int ret = -EINVAL; 3694 u8 dest_ctl; 3695 3696 if (!vsi) 3697 return -EINVAL; 3698 pf = vsi->back; 3699 3700 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) 3701 return -EOPNOTSUPP; 3702 3703 if (pf->flags & I40E_FLAG_FD_SB_AUTO_DISABLED) 3704 return -ENOSPC; 3705 3706 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 3707 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 3708 return -EBUSY; 3709 3710 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 3711 return -EBUSY; 3712 3713 fsp = (struct ethtool_rx_flow_spec *)&cmd->fs; 3714 3715 /* Parse the user-defined field */ 3716 if (i40e_parse_rx_flow_user_data(fsp, &userdef)) 3717 return -EINVAL; 3718 3719 /* Extended MAC field is not supported */ 3720 if (fsp->flow_type & FLOW_MAC_EXT) 3721 return -EINVAL; 3722 3723 ret = i40e_check_fdir_input_set(vsi, fsp, &userdef); 3724 if (ret) 3725 return ret; 3726 3727 if (fsp->location >= (pf->hw.func_caps.fd_filters_best_effort + 3728 pf->hw.func_caps.fd_filters_guaranteed)) { 3729 return -EINVAL; 3730 } 3731 3732 /* ring_cookie is either the drop index, or is a mask of the queue 3733 * index and VF id we wish to target. 3734 */ 3735 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) { 3736 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 3737 } else { 3738 u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie); 3739 u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie); 3740 3741 if (!vf) { 3742 if (ring >= vsi->num_queue_pairs) 3743 return -EINVAL; 3744 dest_vsi = vsi->id; 3745 } else { 3746 /* VFs are zero-indexed, so we subtract one here */ 3747 vf--; 3748 3749 if (vf >= pf->num_alloc_vfs) 3750 return -EINVAL; 3751 if (ring >= pf->vf[vf].num_queue_pairs) 3752 return -EINVAL; 3753 dest_vsi = pf->vf[vf].lan_vsi_id; 3754 } 3755 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX; 3756 q_index = ring; 3757 } 3758 3759 input = kzalloc(sizeof(*input), GFP_KERNEL); 3760 3761 if (!input) 3762 return -ENOMEM; 3763 3764 input->fd_id = fsp->location; 3765 input->q_index = q_index; 3766 input->dest_vsi = dest_vsi; 3767 input->dest_ctl = dest_ctl; 3768 input->fd_status = I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID; 3769 input->cnt_index = I40E_FD_SB_STAT_IDX(pf->hw.pf_id); 3770 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 3771 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 3772 input->flow_type = fsp->flow_type & ~FLOW_EXT; 3773 input->ip4_proto = fsp->h_u.usr_ip4_spec.proto; 3774 3775 /* Reverse the src and dest notion, since the HW expects them to be from 3776 * Tx perspective where as the input from user is from Rx filter view. 3777 */ 3778 input->dst_port = fsp->h_u.tcp_ip4_spec.psrc; 3779 input->src_port = fsp->h_u.tcp_ip4_spec.pdst; 3780 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 3781 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 3782 3783 if (userdef.flex_filter) { 3784 input->flex_filter = true; 3785 input->flex_word = cpu_to_be16(userdef.flex_word); 3786 input->flex_offset = userdef.flex_offset; 3787 } 3788 3789 ret = i40e_add_del_fdir(vsi, input, true); 3790 if (ret) 3791 goto free_input; 3792 3793 /* Add the input filter to the fdir_input_list, possibly replacing 3794 * a previous filter. Do not free the input structure after adding it 3795 * to the list as this would cause a use-after-free bug. 3796 */ 3797 i40e_update_ethtool_fdir_entry(vsi, input, fsp->location, NULL); 3798 3799 return 0; 3800 3801 free_input: 3802 kfree(input); 3803 return ret; 3804 } 3805 3806 /** 3807 * i40e_set_rxnfc - command to set RX flow classification rules 3808 * @netdev: network interface device structure 3809 * @cmd: ethtool rxnfc command 3810 * 3811 * Returns Success if the command is supported. 3812 **/ 3813 static int i40e_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd) 3814 { 3815 struct i40e_netdev_priv *np = netdev_priv(netdev); 3816 struct i40e_vsi *vsi = np->vsi; 3817 struct i40e_pf *pf = vsi->back; 3818 int ret = -EOPNOTSUPP; 3819 3820 switch (cmd->cmd) { 3821 case ETHTOOL_SRXFH: 3822 ret = i40e_set_rss_hash_opt(pf, cmd); 3823 break; 3824 case ETHTOOL_SRXCLSRLINS: 3825 ret = i40e_add_fdir_ethtool(vsi, cmd); 3826 break; 3827 case ETHTOOL_SRXCLSRLDEL: 3828 ret = i40e_del_fdir_entry(vsi, cmd); 3829 break; 3830 default: 3831 break; 3832 } 3833 3834 return ret; 3835 } 3836 3837 /** 3838 * i40e_max_channels - get Max number of combined channels supported 3839 * @vsi: vsi pointer 3840 **/ 3841 static unsigned int i40e_max_channels(struct i40e_vsi *vsi) 3842 { 3843 /* TODO: This code assumes DCB and FD is disabled for now. */ 3844 return vsi->alloc_queue_pairs; 3845 } 3846 3847 /** 3848 * i40e_get_channels - Get the current channels enabled and max supported etc. 3849 * @netdev: network interface device structure 3850 * @ch: ethtool channels structure 3851 * 3852 * We don't support separate tx and rx queues as channels. The other count 3853 * represents how many queues are being used for control. max_combined counts 3854 * how many queue pairs we can support. They may not be mapped 1 to 1 with 3855 * q_vectors since we support a lot more queue pairs than q_vectors. 3856 **/ 3857 static void i40e_get_channels(struct net_device *dev, 3858 struct ethtool_channels *ch) 3859 { 3860 struct i40e_netdev_priv *np = netdev_priv(dev); 3861 struct i40e_vsi *vsi = np->vsi; 3862 struct i40e_pf *pf = vsi->back; 3863 3864 /* report maximum channels */ 3865 ch->max_combined = i40e_max_channels(vsi); 3866 3867 /* report info for other vector */ 3868 ch->other_count = (pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0; 3869 ch->max_other = ch->other_count; 3870 3871 /* Note: This code assumes DCB is disabled for now. */ 3872 ch->combined_count = vsi->num_queue_pairs; 3873 } 3874 3875 /** 3876 * i40e_set_channels - Set the new channels count. 3877 * @netdev: network interface device structure 3878 * @ch: ethtool channels structure 3879 * 3880 * The new channels count may not be the same as requested by the user 3881 * since it gets rounded down to a power of 2 value. 3882 **/ 3883 static int i40e_set_channels(struct net_device *dev, 3884 struct ethtool_channels *ch) 3885 { 3886 const u8 drop = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 3887 struct i40e_netdev_priv *np = netdev_priv(dev); 3888 unsigned int count = ch->combined_count; 3889 struct i40e_vsi *vsi = np->vsi; 3890 struct i40e_pf *pf = vsi->back; 3891 struct i40e_fdir_filter *rule; 3892 struct hlist_node *node2; 3893 int new_count; 3894 int err = 0; 3895 3896 /* We do not support setting channels for any other VSI at present */ 3897 if (vsi->type != I40E_VSI_MAIN) 3898 return -EINVAL; 3899 3900 /* We do not support setting channels via ethtool when TCs are 3901 * configured through mqprio 3902 */ 3903 if (pf->flags & I40E_FLAG_TC_MQPRIO) 3904 return -EINVAL; 3905 3906 /* verify they are not requesting separate vectors */ 3907 if (!count || ch->rx_count || ch->tx_count) 3908 return -EINVAL; 3909 3910 /* verify other_count has not changed */ 3911 if (ch->other_count != ((pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0)) 3912 return -EINVAL; 3913 3914 /* verify the number of channels does not exceed hardware limits */ 3915 if (count > i40e_max_channels(vsi)) 3916 return -EINVAL; 3917 3918 /* verify that the number of channels does not invalidate any current 3919 * flow director rules 3920 */ 3921 hlist_for_each_entry_safe(rule, node2, 3922 &pf->fdir_filter_list, fdir_node) { 3923 if (rule->dest_ctl != drop && count <= rule->q_index) { 3924 dev_warn(&pf->pdev->dev, 3925 "Existing user defined filter %d assigns flow to queue %d\n", 3926 rule->fd_id, rule->q_index); 3927 err = -EINVAL; 3928 } 3929 } 3930 3931 if (err) { 3932 dev_err(&pf->pdev->dev, 3933 "Existing filter rules must be deleted to reduce combined channel count to %d\n", 3934 count); 3935 return err; 3936 } 3937 3938 /* update feature limits from largest to smallest supported values */ 3939 /* TODO: Flow director limit, DCB etc */ 3940 3941 /* use rss_reconfig to rebuild with new queue count and update traffic 3942 * class queue mapping 3943 */ 3944 new_count = i40e_reconfig_rss_queues(pf, count); 3945 if (new_count > 0) 3946 return 0; 3947 else 3948 return -EINVAL; 3949 } 3950 3951 /** 3952 * i40e_get_rxfh_key_size - get the RSS hash key size 3953 * @netdev: network interface device structure 3954 * 3955 * Returns the table size. 3956 **/ 3957 static u32 i40e_get_rxfh_key_size(struct net_device *netdev) 3958 { 3959 return I40E_HKEY_ARRAY_SIZE; 3960 } 3961 3962 /** 3963 * i40e_get_rxfh_indir_size - get the rx flow hash indirection table size 3964 * @netdev: network interface device structure 3965 * 3966 * Returns the table size. 3967 **/ 3968 static u32 i40e_get_rxfh_indir_size(struct net_device *netdev) 3969 { 3970 return I40E_HLUT_ARRAY_SIZE; 3971 } 3972 3973 static int i40e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key, 3974 u8 *hfunc) 3975 { 3976 struct i40e_netdev_priv *np = netdev_priv(netdev); 3977 struct i40e_vsi *vsi = np->vsi; 3978 u8 *lut, *seed = NULL; 3979 int ret; 3980 u16 i; 3981 3982 if (hfunc) 3983 *hfunc = ETH_RSS_HASH_TOP; 3984 3985 if (!indir) 3986 return 0; 3987 3988 seed = key; 3989 lut = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 3990 if (!lut) 3991 return -ENOMEM; 3992 ret = i40e_get_rss(vsi, seed, lut, I40E_HLUT_ARRAY_SIZE); 3993 if (ret) 3994 goto out; 3995 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 3996 indir[i] = (u32)(lut[i]); 3997 3998 out: 3999 kfree(lut); 4000 4001 return ret; 4002 } 4003 4004 /** 4005 * i40e_set_rxfh - set the rx flow hash indirection table 4006 * @netdev: network interface device structure 4007 * @indir: indirection table 4008 * @key: hash key 4009 * 4010 * Returns -EINVAL if the table specifies an invalid queue id, otherwise 4011 * returns 0 after programming the table. 4012 **/ 4013 static int i40e_set_rxfh(struct net_device *netdev, const u32 *indir, 4014 const u8 *key, const u8 hfunc) 4015 { 4016 struct i40e_netdev_priv *np = netdev_priv(netdev); 4017 struct i40e_vsi *vsi = np->vsi; 4018 struct i40e_pf *pf = vsi->back; 4019 u8 *seed = NULL; 4020 u16 i; 4021 4022 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) 4023 return -EOPNOTSUPP; 4024 4025 if (key) { 4026 if (!vsi->rss_hkey_user) { 4027 vsi->rss_hkey_user = kzalloc(I40E_HKEY_ARRAY_SIZE, 4028 GFP_KERNEL); 4029 if (!vsi->rss_hkey_user) 4030 return -ENOMEM; 4031 } 4032 memcpy(vsi->rss_hkey_user, key, I40E_HKEY_ARRAY_SIZE); 4033 seed = vsi->rss_hkey_user; 4034 } 4035 if (!vsi->rss_lut_user) { 4036 vsi->rss_lut_user = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 4037 if (!vsi->rss_lut_user) 4038 return -ENOMEM; 4039 } 4040 4041 /* Each 32 bits pointed by 'indir' is stored with a lut entry */ 4042 if (indir) 4043 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 4044 vsi->rss_lut_user[i] = (u8)(indir[i]); 4045 else 4046 i40e_fill_rss_lut(pf, vsi->rss_lut_user, I40E_HLUT_ARRAY_SIZE, 4047 vsi->rss_size); 4048 4049 return i40e_config_rss(vsi, seed, vsi->rss_lut_user, 4050 I40E_HLUT_ARRAY_SIZE); 4051 } 4052 4053 /** 4054 * i40e_get_priv_flags - report device private flags 4055 * @dev: network interface device structure 4056 * 4057 * The get string set count and the string set should be matched for each 4058 * flag returned. Add new strings for each flag to the i40e_gstrings_priv_flags 4059 * array. 4060 * 4061 * Returns a u32 bitmap of flags. 4062 **/ 4063 static u32 i40e_get_priv_flags(struct net_device *dev) 4064 { 4065 struct i40e_netdev_priv *np = netdev_priv(dev); 4066 struct i40e_vsi *vsi = np->vsi; 4067 struct i40e_pf *pf = vsi->back; 4068 u32 i, j, ret_flags = 0; 4069 4070 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 4071 const struct i40e_priv_flags *priv_flags; 4072 4073 priv_flags = &i40e_gstrings_priv_flags[i]; 4074 4075 if (priv_flags->flag & pf->flags) 4076 ret_flags |= BIT(i); 4077 } 4078 4079 if (pf->hw.pf_id != 0) 4080 return ret_flags; 4081 4082 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 4083 const struct i40e_priv_flags *priv_flags; 4084 4085 priv_flags = &i40e_gl_gstrings_priv_flags[j]; 4086 4087 if (priv_flags->flag & pf->flags) 4088 ret_flags |= BIT(i + j); 4089 } 4090 4091 return ret_flags; 4092 } 4093 4094 /** 4095 * i40e_set_priv_flags - set private flags 4096 * @dev: network interface device structure 4097 * @flags: bit flags to be set 4098 **/ 4099 static int i40e_set_priv_flags(struct net_device *dev, u32 flags) 4100 { 4101 struct i40e_netdev_priv *np = netdev_priv(dev); 4102 struct i40e_vsi *vsi = np->vsi; 4103 struct i40e_pf *pf = vsi->back; 4104 u32 orig_flags, new_flags, changed_flags; 4105 u32 i, j; 4106 4107 orig_flags = READ_ONCE(pf->flags); 4108 new_flags = orig_flags; 4109 4110 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 4111 const struct i40e_priv_flags *priv_flags; 4112 4113 priv_flags = &i40e_gstrings_priv_flags[i]; 4114 4115 if (flags & BIT(i)) 4116 new_flags |= priv_flags->flag; 4117 else 4118 new_flags &= ~(priv_flags->flag); 4119 4120 /* If this is a read-only flag, it can't be changed */ 4121 if (priv_flags->read_only && 4122 ((orig_flags ^ new_flags) & ~BIT(i))) 4123 return -EOPNOTSUPP; 4124 } 4125 4126 if (pf->hw.pf_id != 0) 4127 goto flags_complete; 4128 4129 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 4130 const struct i40e_priv_flags *priv_flags; 4131 4132 priv_flags = &i40e_gl_gstrings_priv_flags[j]; 4133 4134 if (flags & BIT(i + j)) 4135 new_flags |= priv_flags->flag; 4136 else 4137 new_flags &= ~(priv_flags->flag); 4138 4139 /* If this is a read-only flag, it can't be changed */ 4140 if (priv_flags->read_only && 4141 ((orig_flags ^ new_flags) & ~BIT(i))) 4142 return -EOPNOTSUPP; 4143 } 4144 4145 flags_complete: 4146 /* Before we finalize any flag changes, we need to perform some 4147 * checks to ensure that the changes are supported and safe. 4148 */ 4149 4150 /* ATR eviction is not supported on all devices */ 4151 if ((new_flags & I40E_FLAG_HW_ATR_EVICT_ENABLED) && 4152 !(pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE)) 4153 return -EOPNOTSUPP; 4154 4155 /* Compare and exchange the new flags into place. If we failed, that 4156 * is if cmpxchg returns anything but the old value, this means that 4157 * something else has modified the flags variable since we copied it 4158 * originally. We'll just punt with an error and log something in the 4159 * message buffer. 4160 */ 4161 if (cmpxchg(&pf->flags, orig_flags, new_flags) != orig_flags) { 4162 dev_warn(&pf->pdev->dev, 4163 "Unable to update pf->flags as it was modified by another thread...\n"); 4164 return -EAGAIN; 4165 } 4166 4167 changed_flags = orig_flags ^ new_flags; 4168 4169 /* Process any additional changes needed as a result of flag changes. 4170 * The changed_flags value reflects the list of bits that were 4171 * changed in the code above. 4172 */ 4173 4174 /* Flush current ATR settings if ATR was disabled */ 4175 if ((changed_flags & I40E_FLAG_FD_ATR_ENABLED) && 4176 !(pf->flags & I40E_FLAG_FD_ATR_ENABLED)) { 4177 pf->flags |= I40E_FLAG_FD_ATR_AUTO_DISABLED; 4178 set_bit(__I40E_FD_FLUSH_REQUESTED, pf->state); 4179 } 4180 4181 if (changed_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT) { 4182 u16 sw_flags = 0, valid_flags = 0; 4183 int ret; 4184 4185 if (!(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) 4186 sw_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 4187 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 4188 ret = i40e_aq_set_switch_config(&pf->hw, sw_flags, valid_flags, 4189 NULL); 4190 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) { 4191 dev_info(&pf->pdev->dev, 4192 "couldn't set switch config bits, err %s aq_err %s\n", 4193 i40e_stat_str(&pf->hw, ret), 4194 i40e_aq_str(&pf->hw, 4195 pf->hw.aq.asq_last_status)); 4196 /* not a fatal problem, just keep going */ 4197 } 4198 } 4199 4200 /* Issue reset to cause things to take effect, as additional bits 4201 * are added we will need to create a mask of bits requiring reset 4202 */ 4203 if (changed_flags & (I40E_FLAG_VEB_STATS_ENABLED | 4204 I40E_FLAG_LEGACY_RX | 4205 I40E_FLAG_SOURCE_PRUNING_DISABLED)) 4206 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 4207 4208 return 0; 4209 } 4210 4211 /** 4212 * i40e_get_module_info - get (Q)SFP+ module type info 4213 * @netdev: network interface device structure 4214 * @modinfo: module EEPROM size and layout information structure 4215 **/ 4216 static int i40e_get_module_info(struct net_device *netdev, 4217 struct ethtool_modinfo *modinfo) 4218 { 4219 struct i40e_netdev_priv *np = netdev_priv(netdev); 4220 struct i40e_vsi *vsi = np->vsi; 4221 struct i40e_pf *pf = vsi->back; 4222 struct i40e_hw *hw = &pf->hw; 4223 u32 sff8472_comp = 0; 4224 u32 sff8472_swap = 0; 4225 u32 sff8636_rev = 0; 4226 i40e_status status; 4227 u32 type = 0; 4228 4229 /* Check if firmware supports reading module EEPROM. */ 4230 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) { 4231 netdev_err(vsi->netdev, "Module EEPROM memory read not supported. Please update the NVM image.\n"); 4232 return -EINVAL; 4233 } 4234 4235 status = i40e_update_link_info(hw); 4236 if (status) 4237 return -EIO; 4238 4239 if (hw->phy.link_info.phy_type == I40E_PHY_TYPE_EMPTY) { 4240 netdev_err(vsi->netdev, "Cannot read module EEPROM memory. No module connected.\n"); 4241 return -EINVAL; 4242 } 4243 4244 type = hw->phy.link_info.module_type[0]; 4245 4246 switch (type) { 4247 case I40E_MODULE_TYPE_SFP: 4248 status = i40e_aq_get_phy_register(hw, 4249 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4250 I40E_I2C_EEPROM_DEV_ADDR, 4251 I40E_MODULE_SFF_8472_COMP, 4252 &sff8472_comp, NULL); 4253 if (status) 4254 return -EIO; 4255 4256 status = i40e_aq_get_phy_register(hw, 4257 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4258 I40E_I2C_EEPROM_DEV_ADDR, 4259 I40E_MODULE_SFF_8472_SWAP, 4260 &sff8472_swap, NULL); 4261 if (status) 4262 return -EIO; 4263 4264 /* Check if the module requires address swap to access 4265 * the other EEPROM memory page. 4266 */ 4267 if (sff8472_swap & I40E_MODULE_SFF_ADDR_MODE) { 4268 netdev_warn(vsi->netdev, "Module address swap to access page 0xA2 is not supported.\n"); 4269 modinfo->type = ETH_MODULE_SFF_8079; 4270 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 4271 } else if (sff8472_comp == 0x00) { 4272 /* Module is not SFF-8472 compliant */ 4273 modinfo->type = ETH_MODULE_SFF_8079; 4274 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 4275 } else { 4276 modinfo->type = ETH_MODULE_SFF_8472; 4277 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 4278 } 4279 break; 4280 case I40E_MODULE_TYPE_QSFP_PLUS: 4281 /* Read from memory page 0. */ 4282 status = i40e_aq_get_phy_register(hw, 4283 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4284 0, 4285 I40E_MODULE_REVISION_ADDR, 4286 &sff8636_rev, NULL); 4287 if (status) 4288 return -EIO; 4289 /* Determine revision compliance byte */ 4290 if (sff8636_rev > 0x02) { 4291 /* Module is SFF-8636 compliant */ 4292 modinfo->type = ETH_MODULE_SFF_8636; 4293 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 4294 } else { 4295 modinfo->type = ETH_MODULE_SFF_8436; 4296 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 4297 } 4298 break; 4299 case I40E_MODULE_TYPE_QSFP28: 4300 modinfo->type = ETH_MODULE_SFF_8636; 4301 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 4302 break; 4303 default: 4304 netdev_err(vsi->netdev, "Module type unrecognized\n"); 4305 return -EINVAL; 4306 } 4307 return 0; 4308 } 4309 4310 /** 4311 * i40e_get_module_eeprom - fills buffer with (Q)SFP+ module memory contents 4312 * @netdev: network interface device structure 4313 * @ee: EEPROM dump request structure 4314 * @data: buffer to be filled with EEPROM contents 4315 **/ 4316 static int i40e_get_module_eeprom(struct net_device *netdev, 4317 struct ethtool_eeprom *ee, 4318 u8 *data) 4319 { 4320 struct i40e_netdev_priv *np = netdev_priv(netdev); 4321 struct i40e_vsi *vsi = np->vsi; 4322 struct i40e_pf *pf = vsi->back; 4323 struct i40e_hw *hw = &pf->hw; 4324 bool is_sfp = false; 4325 i40e_status status; 4326 u32 value = 0; 4327 int i; 4328 4329 if (!ee || !ee->len || !data) 4330 return -EINVAL; 4331 4332 if (hw->phy.link_info.module_type[0] == I40E_MODULE_TYPE_SFP) 4333 is_sfp = true; 4334 4335 for (i = 0; i < ee->len; i++) { 4336 u32 offset = i + ee->offset; 4337 u32 addr = is_sfp ? I40E_I2C_EEPROM_DEV_ADDR : 0; 4338 4339 /* Check if we need to access the other memory page */ 4340 if (is_sfp) { 4341 if (offset >= ETH_MODULE_SFF_8079_LEN) { 4342 offset -= ETH_MODULE_SFF_8079_LEN; 4343 addr = I40E_I2C_EEPROM_DEV_ADDR2; 4344 } 4345 } else { 4346 while (offset >= ETH_MODULE_SFF_8436_LEN) { 4347 /* Compute memory page number and offset. */ 4348 offset -= ETH_MODULE_SFF_8436_LEN / 2; 4349 addr++; 4350 } 4351 } 4352 4353 status = i40e_aq_get_phy_register(hw, 4354 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 4355 addr, offset, &value, NULL); 4356 if (status) 4357 return -EIO; 4358 data[i] = value; 4359 } 4360 return 0; 4361 } 4362 4363 static const struct ethtool_ops i40e_ethtool_ops = { 4364 .get_drvinfo = i40e_get_drvinfo, 4365 .get_regs_len = i40e_get_regs_len, 4366 .get_regs = i40e_get_regs, 4367 .nway_reset = i40e_nway_reset, 4368 .get_link = ethtool_op_get_link, 4369 .get_wol = i40e_get_wol, 4370 .set_wol = i40e_set_wol, 4371 .set_eeprom = i40e_set_eeprom, 4372 .get_eeprom_len = i40e_get_eeprom_len, 4373 .get_eeprom = i40e_get_eeprom, 4374 .get_ringparam = i40e_get_ringparam, 4375 .set_ringparam = i40e_set_ringparam, 4376 .get_pauseparam = i40e_get_pauseparam, 4377 .set_pauseparam = i40e_set_pauseparam, 4378 .get_msglevel = i40e_get_msglevel, 4379 .set_msglevel = i40e_set_msglevel, 4380 .get_rxnfc = i40e_get_rxnfc, 4381 .set_rxnfc = i40e_set_rxnfc, 4382 .self_test = i40e_diag_test, 4383 .get_strings = i40e_get_strings, 4384 .set_phys_id = i40e_set_phys_id, 4385 .get_sset_count = i40e_get_sset_count, 4386 .get_ethtool_stats = i40e_get_ethtool_stats, 4387 .get_coalesce = i40e_get_coalesce, 4388 .set_coalesce = i40e_set_coalesce, 4389 .get_rxfh_key_size = i40e_get_rxfh_key_size, 4390 .get_rxfh_indir_size = i40e_get_rxfh_indir_size, 4391 .get_rxfh = i40e_get_rxfh, 4392 .set_rxfh = i40e_set_rxfh, 4393 .get_channels = i40e_get_channels, 4394 .set_channels = i40e_set_channels, 4395 .get_module_info = i40e_get_module_info, 4396 .get_module_eeprom = i40e_get_module_eeprom, 4397 .get_ts_info = i40e_get_ts_info, 4398 .get_priv_flags = i40e_get_priv_flags, 4399 .set_priv_flags = i40e_set_priv_flags, 4400 .get_per_queue_coalesce = i40e_get_per_queue_coalesce, 4401 .set_per_queue_coalesce = i40e_set_per_queue_coalesce, 4402 .get_link_ksettings = i40e_get_link_ksettings, 4403 .set_link_ksettings = i40e_set_link_ksettings, 4404 }; 4405 4406 void i40e_set_ethtool_ops(struct net_device *netdev) 4407 { 4408 netdev->ethtool_ops = &i40e_ethtool_ops; 4409 } 4410