1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 2013 - 2018 Intel Corporation. */ 3 4 /* ethtool support for i40e */ 5 6 #include "i40e_devids.h" 7 #include "i40e_diag.h" 8 #include "i40e_txrx_common.h" 9 #include "i40e_virtchnl_pf.h" 10 11 /* ethtool statistics helpers */ 12 13 /** 14 * struct i40e_stats - definition for an ethtool statistic 15 * @stat_string: statistic name to display in ethtool -S output 16 * @sizeof_stat: the sizeof() the stat, must be no greater than sizeof(u64) 17 * @stat_offset: offsetof() the stat from a base pointer 18 * 19 * This structure defines a statistic to be added to the ethtool stats buffer. 20 * It defines a statistic as offset from a common base pointer. Stats should 21 * be defined in constant arrays using the I40E_STAT macro, with every element 22 * of the array using the same _type for calculating the sizeof_stat and 23 * stat_offset. 24 * 25 * The @sizeof_stat is expected to be sizeof(u8), sizeof(u16), sizeof(u32) or 26 * sizeof(u64). Other sizes are not expected and will produce a WARN_ONCE from 27 * the i40e_add_ethtool_stat() helper function. 28 * 29 * The @stat_string is interpreted as a format string, allowing formatted 30 * values to be inserted while looping over multiple structures for a given 31 * statistics array. Thus, every statistic string in an array should have the 32 * same type and number of format specifiers, to be formatted by variadic 33 * arguments to the i40e_add_stat_string() helper function. 34 **/ 35 struct i40e_stats { 36 char stat_string[ETH_GSTRING_LEN]; 37 int sizeof_stat; 38 int stat_offset; 39 }; 40 41 /* Helper macro to define an i40e_stat structure with proper size and type. 42 * Use this when defining constant statistics arrays. Note that @_type expects 43 * only a type name and is used multiple times. 44 */ 45 #define I40E_STAT(_type, _name, _stat) { \ 46 .stat_string = _name, \ 47 .sizeof_stat = sizeof_field(_type, _stat), \ 48 .stat_offset = offsetof(_type, _stat) \ 49 } 50 51 /* Helper macro for defining some statistics directly copied from the netdev 52 * stats structure. 53 */ 54 #define I40E_NETDEV_STAT(_net_stat) \ 55 I40E_STAT(struct rtnl_link_stats64, #_net_stat, _net_stat) 56 57 /* Helper macro for defining some statistics related to queues */ 58 #define I40E_QUEUE_STAT(_name, _stat) \ 59 I40E_STAT(struct i40e_ring, _name, _stat) 60 61 /* Stats associated with a Tx or Rx ring */ 62 static const struct i40e_stats i40e_gstrings_queue_stats[] = { 63 I40E_QUEUE_STAT("%s-%u.packets", stats.packets), 64 I40E_QUEUE_STAT("%s-%u.bytes", stats.bytes), 65 }; 66 67 /** 68 * i40e_add_one_ethtool_stat - copy the stat into the supplied buffer 69 * @data: location to store the stat value 70 * @pointer: basis for where to copy from 71 * @stat: the stat definition 72 * 73 * Copies the stat data defined by the pointer and stat structure pair into 74 * the memory supplied as data. Used to implement i40e_add_ethtool_stats and 75 * i40e_add_queue_stats. If the pointer is null, data will be zero'd. 76 */ 77 static void 78 i40e_add_one_ethtool_stat(u64 *data, void *pointer, 79 const struct i40e_stats *stat) 80 { 81 char *p; 82 83 if (!pointer) { 84 /* ensure that the ethtool data buffer is zero'd for any stats 85 * which don't have a valid pointer. 86 */ 87 *data = 0; 88 return; 89 } 90 91 p = (char *)pointer + stat->stat_offset; 92 switch (stat->sizeof_stat) { 93 case sizeof(u64): 94 *data = *((u64 *)p); 95 break; 96 case sizeof(u32): 97 *data = *((u32 *)p); 98 break; 99 case sizeof(u16): 100 *data = *((u16 *)p); 101 break; 102 case sizeof(u8): 103 *data = *((u8 *)p); 104 break; 105 default: 106 WARN_ONCE(1, "unexpected stat size for %s", 107 stat->stat_string); 108 *data = 0; 109 } 110 } 111 112 /** 113 * __i40e_add_ethtool_stats - copy stats into the ethtool supplied buffer 114 * @data: ethtool stats buffer 115 * @pointer: location to copy stats from 116 * @stats: array of stats to copy 117 * @size: the size of the stats definition 118 * 119 * Copy the stats defined by the stats array using the pointer as a base into 120 * the data buffer supplied by ethtool. Updates the data pointer to point to 121 * the next empty location for successive calls to __i40e_add_ethtool_stats. 122 * If pointer is null, set the data values to zero and update the pointer to 123 * skip these stats. 124 **/ 125 static void 126 __i40e_add_ethtool_stats(u64 **data, void *pointer, 127 const struct i40e_stats stats[], 128 const unsigned int size) 129 { 130 unsigned int i; 131 132 for (i = 0; i < size; i++) 133 i40e_add_one_ethtool_stat((*data)++, pointer, &stats[i]); 134 } 135 136 /** 137 * i40e_add_ethtool_stats - copy stats into ethtool supplied buffer 138 * @data: ethtool stats buffer 139 * @pointer: location where stats are stored 140 * @stats: static const array of stat definitions 141 * 142 * Macro to ease the use of __i40e_add_ethtool_stats by taking a static 143 * constant stats array and passing the ARRAY_SIZE(). This avoids typos by 144 * ensuring that we pass the size associated with the given stats array. 145 * 146 * The parameter @stats is evaluated twice, so parameters with side effects 147 * should be avoided. 148 **/ 149 #define i40e_add_ethtool_stats(data, pointer, stats) \ 150 __i40e_add_ethtool_stats(data, pointer, stats, ARRAY_SIZE(stats)) 151 152 /** 153 * i40e_add_queue_stats - copy queue statistics into supplied buffer 154 * @data: ethtool stats buffer 155 * @ring: the ring to copy 156 * 157 * Queue statistics must be copied while protected by 158 * u64_stats_fetch_begin, so we can't directly use i40e_add_ethtool_stats. 159 * Assumes that queue stats are defined in i40e_gstrings_queue_stats. If the 160 * ring pointer is null, zero out the queue stat values and update the data 161 * pointer. Otherwise safely copy the stats from the ring into the supplied 162 * buffer and update the data pointer when finished. 163 * 164 * This function expects to be called while under rcu_read_lock(). 165 **/ 166 static void 167 i40e_add_queue_stats(u64 **data, struct i40e_ring *ring) 168 { 169 const unsigned int size = ARRAY_SIZE(i40e_gstrings_queue_stats); 170 const struct i40e_stats *stats = i40e_gstrings_queue_stats; 171 unsigned int start; 172 unsigned int i; 173 174 /* To avoid invalid statistics values, ensure that we keep retrying 175 * the copy until we get a consistent value according to 176 * u64_stats_fetch_retry. But first, make sure our ring is 177 * non-null before attempting to access its syncp. 178 */ 179 do { 180 start = !ring ? 0 : u64_stats_fetch_begin(&ring->syncp); 181 for (i = 0; i < size; i++) { 182 i40e_add_one_ethtool_stat(&(*data)[i], ring, 183 &stats[i]); 184 } 185 } while (ring && u64_stats_fetch_retry(&ring->syncp, start)); 186 187 /* Once we successfully copy the stats in, update the data pointer */ 188 *data += size; 189 } 190 191 /** 192 * __i40e_add_stat_strings - copy stat strings into ethtool buffer 193 * @p: ethtool supplied buffer 194 * @stats: stat definitions array 195 * @size: size of the stats array 196 * 197 * Format and copy the strings described by stats into the buffer pointed at 198 * by p. 199 **/ 200 static void __i40e_add_stat_strings(u8 **p, const struct i40e_stats stats[], 201 const unsigned int size, ...) 202 { 203 unsigned int i; 204 205 for (i = 0; i < size; i++) { 206 va_list args; 207 208 va_start(args, size); 209 vsnprintf(*p, ETH_GSTRING_LEN, stats[i].stat_string, args); 210 *p += ETH_GSTRING_LEN; 211 va_end(args); 212 } 213 } 214 215 /** 216 * i40e_add_stat_strings - copy stat strings into ethtool buffer 217 * @p: ethtool supplied buffer 218 * @stats: stat definitions array 219 * 220 * Format and copy the strings described by the const static stats value into 221 * the buffer pointed at by p. 222 * 223 * The parameter @stats is evaluated twice, so parameters with side effects 224 * should be avoided. Additionally, stats must be an array such that 225 * ARRAY_SIZE can be called on it. 226 **/ 227 #define i40e_add_stat_strings(p, stats, ...) \ 228 __i40e_add_stat_strings(p, stats, ARRAY_SIZE(stats), ## __VA_ARGS__) 229 230 #define I40E_PF_STAT(_name, _stat) \ 231 I40E_STAT(struct i40e_pf, _name, _stat) 232 #define I40E_VSI_STAT(_name, _stat) \ 233 I40E_STAT(struct i40e_vsi, _name, _stat) 234 #define I40E_VEB_STAT(_name, _stat) \ 235 I40E_STAT(struct i40e_veb, _name, _stat) 236 #define I40E_VEB_TC_STAT(_name, _stat) \ 237 I40E_STAT(struct i40e_cp_veb_tc_stats, _name, _stat) 238 #define I40E_PFC_STAT(_name, _stat) \ 239 I40E_STAT(struct i40e_pfc_stats, _name, _stat) 240 241 static const struct i40e_stats i40e_gstrings_net_stats[] = { 242 I40E_NETDEV_STAT(rx_packets), 243 I40E_NETDEV_STAT(tx_packets), 244 I40E_NETDEV_STAT(rx_bytes), 245 I40E_NETDEV_STAT(tx_bytes), 246 I40E_NETDEV_STAT(rx_errors), 247 I40E_NETDEV_STAT(tx_errors), 248 I40E_NETDEV_STAT(rx_dropped), 249 I40E_NETDEV_STAT(rx_missed_errors), 250 I40E_NETDEV_STAT(tx_dropped), 251 I40E_NETDEV_STAT(collisions), 252 I40E_NETDEV_STAT(rx_length_errors), 253 I40E_NETDEV_STAT(rx_crc_errors), 254 }; 255 256 static const struct i40e_stats i40e_gstrings_veb_stats[] = { 257 I40E_VEB_STAT("veb.rx_bytes", stats.rx_bytes), 258 I40E_VEB_STAT("veb.tx_bytes", stats.tx_bytes), 259 I40E_VEB_STAT("veb.rx_unicast", stats.rx_unicast), 260 I40E_VEB_STAT("veb.tx_unicast", stats.tx_unicast), 261 I40E_VEB_STAT("veb.rx_multicast", stats.rx_multicast), 262 I40E_VEB_STAT("veb.tx_multicast", stats.tx_multicast), 263 I40E_VEB_STAT("veb.rx_broadcast", stats.rx_broadcast), 264 I40E_VEB_STAT("veb.tx_broadcast", stats.tx_broadcast), 265 I40E_VEB_STAT("veb.rx_discards", stats.rx_discards), 266 I40E_VEB_STAT("veb.tx_discards", stats.tx_discards), 267 I40E_VEB_STAT("veb.tx_errors", stats.tx_errors), 268 I40E_VEB_STAT("veb.rx_unknown_protocol", stats.rx_unknown_protocol), 269 }; 270 271 struct i40e_cp_veb_tc_stats { 272 u64 tc_rx_packets; 273 u64 tc_rx_bytes; 274 u64 tc_tx_packets; 275 u64 tc_tx_bytes; 276 }; 277 278 static const struct i40e_stats i40e_gstrings_veb_tc_stats[] = { 279 I40E_VEB_TC_STAT("veb.tc_%u_tx_packets", tc_tx_packets), 280 I40E_VEB_TC_STAT("veb.tc_%u_tx_bytes", tc_tx_bytes), 281 I40E_VEB_TC_STAT("veb.tc_%u_rx_packets", tc_rx_packets), 282 I40E_VEB_TC_STAT("veb.tc_%u_rx_bytes", tc_rx_bytes), 283 }; 284 285 static const struct i40e_stats i40e_gstrings_misc_stats[] = { 286 I40E_VSI_STAT("rx_unicast", eth_stats.rx_unicast), 287 I40E_VSI_STAT("tx_unicast", eth_stats.tx_unicast), 288 I40E_VSI_STAT("rx_multicast", eth_stats.rx_multicast), 289 I40E_VSI_STAT("tx_multicast", eth_stats.tx_multicast), 290 I40E_VSI_STAT("rx_broadcast", eth_stats.rx_broadcast), 291 I40E_VSI_STAT("tx_broadcast", eth_stats.tx_broadcast), 292 I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol), 293 I40E_VSI_STAT("tx_linearize", tx_linearize), 294 I40E_VSI_STAT("tx_force_wb", tx_force_wb), 295 I40E_VSI_STAT("tx_busy", tx_busy), 296 I40E_VSI_STAT("tx_stopped", tx_stopped), 297 I40E_VSI_STAT("rx_alloc_fail", rx_buf_failed), 298 I40E_VSI_STAT("rx_pg_alloc_fail", rx_page_failed), 299 I40E_VSI_STAT("rx_cache_reuse", rx_page_reuse), 300 I40E_VSI_STAT("rx_cache_alloc", rx_page_alloc), 301 I40E_VSI_STAT("rx_cache_waive", rx_page_waive), 302 I40E_VSI_STAT("rx_cache_busy", rx_page_busy), 303 I40E_VSI_STAT("tx_restart", tx_restart), 304 }; 305 306 /* These PF_STATs might look like duplicates of some NETDEV_STATs, 307 * but they are separate. This device supports Virtualization, and 308 * as such might have several netdevs supporting VMDq and FCoE going 309 * through a single port. The NETDEV_STATs are for individual netdevs 310 * seen at the top of the stack, and the PF_STATs are for the physical 311 * function at the bottom of the stack hosting those netdevs. 312 * 313 * The PF_STATs are appended to the netdev stats only when ethtool -S 314 * is queried on the base PF netdev, not on the VMDq or FCoE netdev. 315 */ 316 static const struct i40e_stats i40e_gstrings_stats[] = { 317 I40E_PF_STAT("port.rx_bytes", stats.eth.rx_bytes), 318 I40E_PF_STAT("port.tx_bytes", stats.eth.tx_bytes), 319 I40E_PF_STAT("port.rx_unicast", stats.eth.rx_unicast), 320 I40E_PF_STAT("port.tx_unicast", stats.eth.tx_unicast), 321 I40E_PF_STAT("port.rx_multicast", stats.eth.rx_multicast), 322 I40E_PF_STAT("port.tx_multicast", stats.eth.tx_multicast), 323 I40E_PF_STAT("port.rx_broadcast", stats.eth.rx_broadcast), 324 I40E_PF_STAT("port.tx_broadcast", stats.eth.tx_broadcast), 325 I40E_PF_STAT("port.tx_errors", stats.eth.tx_errors), 326 I40E_PF_STAT("port.rx_discards", stats.eth.rx_discards), 327 I40E_PF_STAT("port.tx_dropped_link_down", stats.tx_dropped_link_down), 328 I40E_PF_STAT("port.rx_crc_errors", stats.crc_errors), 329 I40E_PF_STAT("port.illegal_bytes", stats.illegal_bytes), 330 I40E_PF_STAT("port.mac_local_faults", stats.mac_local_faults), 331 I40E_PF_STAT("port.mac_remote_faults", stats.mac_remote_faults), 332 I40E_PF_STAT("port.tx_timeout", tx_timeout_count), 333 I40E_PF_STAT("port.rx_csum_bad", hw_csum_rx_error), 334 I40E_PF_STAT("port.rx_length_errors", stats.rx_length_errors), 335 I40E_PF_STAT("port.link_xon_rx", stats.link_xon_rx), 336 I40E_PF_STAT("port.link_xoff_rx", stats.link_xoff_rx), 337 I40E_PF_STAT("port.link_xon_tx", stats.link_xon_tx), 338 I40E_PF_STAT("port.link_xoff_tx", stats.link_xoff_tx), 339 I40E_PF_STAT("port.rx_size_64", stats.rx_size_64), 340 I40E_PF_STAT("port.rx_size_127", stats.rx_size_127), 341 I40E_PF_STAT("port.rx_size_255", stats.rx_size_255), 342 I40E_PF_STAT("port.rx_size_511", stats.rx_size_511), 343 I40E_PF_STAT("port.rx_size_1023", stats.rx_size_1023), 344 I40E_PF_STAT("port.rx_size_1522", stats.rx_size_1522), 345 I40E_PF_STAT("port.rx_size_big", stats.rx_size_big), 346 I40E_PF_STAT("port.tx_size_64", stats.tx_size_64), 347 I40E_PF_STAT("port.tx_size_127", stats.tx_size_127), 348 I40E_PF_STAT("port.tx_size_255", stats.tx_size_255), 349 I40E_PF_STAT("port.tx_size_511", stats.tx_size_511), 350 I40E_PF_STAT("port.tx_size_1023", stats.tx_size_1023), 351 I40E_PF_STAT("port.tx_size_1522", stats.tx_size_1522), 352 I40E_PF_STAT("port.tx_size_big", stats.tx_size_big), 353 I40E_PF_STAT("port.rx_undersize", stats.rx_undersize), 354 I40E_PF_STAT("port.rx_fragments", stats.rx_fragments), 355 I40E_PF_STAT("port.rx_oversize", stats.rx_oversize), 356 I40E_PF_STAT("port.rx_jabber", stats.rx_jabber), 357 I40E_PF_STAT("port.VF_admin_queue_requests", vf_aq_requests), 358 I40E_PF_STAT("port.arq_overflows", arq_overflows), 359 I40E_PF_STAT("port.tx_hwtstamp_timeouts", tx_hwtstamp_timeouts), 360 I40E_PF_STAT("port.rx_hwtstamp_cleared", rx_hwtstamp_cleared), 361 I40E_PF_STAT("port.tx_hwtstamp_skipped", tx_hwtstamp_skipped), 362 I40E_PF_STAT("port.fdir_flush_cnt", fd_flush_cnt), 363 I40E_PF_STAT("port.fdir_atr_match", stats.fd_atr_match), 364 I40E_PF_STAT("port.fdir_atr_tunnel_match", stats.fd_atr_tunnel_match), 365 I40E_PF_STAT("port.fdir_atr_status", stats.fd_atr_status), 366 I40E_PF_STAT("port.fdir_sb_match", stats.fd_sb_match), 367 I40E_PF_STAT("port.fdir_sb_status", stats.fd_sb_status), 368 369 /* LPI stats */ 370 I40E_PF_STAT("port.tx_lpi_status", stats.tx_lpi_status), 371 I40E_PF_STAT("port.rx_lpi_status", stats.rx_lpi_status), 372 I40E_PF_STAT("port.tx_lpi_count", stats.tx_lpi_count), 373 I40E_PF_STAT("port.rx_lpi_count", stats.rx_lpi_count), 374 }; 375 376 struct i40e_pfc_stats { 377 u64 priority_xon_rx; 378 u64 priority_xoff_rx; 379 u64 priority_xon_tx; 380 u64 priority_xoff_tx; 381 u64 priority_xon_2_xoff; 382 }; 383 384 static const struct i40e_stats i40e_gstrings_pfc_stats[] = { 385 I40E_PFC_STAT("port.tx_priority_%u_xon_tx", priority_xon_tx), 386 I40E_PFC_STAT("port.tx_priority_%u_xoff_tx", priority_xoff_tx), 387 I40E_PFC_STAT("port.rx_priority_%u_xon_rx", priority_xon_rx), 388 I40E_PFC_STAT("port.rx_priority_%u_xoff_rx", priority_xoff_rx), 389 I40E_PFC_STAT("port.rx_priority_%u_xon_2_xoff", priority_xon_2_xoff), 390 }; 391 392 #define I40E_NETDEV_STATS_LEN ARRAY_SIZE(i40e_gstrings_net_stats) 393 394 #define I40E_MISC_STATS_LEN ARRAY_SIZE(i40e_gstrings_misc_stats) 395 396 #define I40E_VSI_STATS_LEN (I40E_NETDEV_STATS_LEN + I40E_MISC_STATS_LEN) 397 398 #define I40E_PFC_STATS_LEN (ARRAY_SIZE(i40e_gstrings_pfc_stats) * \ 399 I40E_MAX_USER_PRIORITY) 400 401 #define I40E_VEB_STATS_LEN (ARRAY_SIZE(i40e_gstrings_veb_stats) + \ 402 (ARRAY_SIZE(i40e_gstrings_veb_tc_stats) * \ 403 I40E_MAX_TRAFFIC_CLASS)) 404 405 #define I40E_GLOBAL_STATS_LEN ARRAY_SIZE(i40e_gstrings_stats) 406 407 #define I40E_PF_STATS_LEN (I40E_GLOBAL_STATS_LEN + \ 408 I40E_PFC_STATS_LEN + \ 409 I40E_VEB_STATS_LEN + \ 410 I40E_VSI_STATS_LEN) 411 412 /* Length of stats for a single queue */ 413 #define I40E_QUEUE_STATS_LEN ARRAY_SIZE(i40e_gstrings_queue_stats) 414 415 enum i40e_ethtool_test_id { 416 I40E_ETH_TEST_REG = 0, 417 I40E_ETH_TEST_EEPROM, 418 I40E_ETH_TEST_INTR, 419 I40E_ETH_TEST_LINK, 420 }; 421 422 static const char i40e_gstrings_test[][ETH_GSTRING_LEN] = { 423 "Register test (offline)", 424 "Eeprom test (offline)", 425 "Interrupt test (offline)", 426 "Link test (on/offline)" 427 }; 428 429 #define I40E_TEST_LEN (sizeof(i40e_gstrings_test) / ETH_GSTRING_LEN) 430 431 struct i40e_priv_flags { 432 char flag_string[ETH_GSTRING_LEN]; 433 u8 bitno; 434 bool read_only; 435 }; 436 437 #define I40E_PRIV_FLAG(_name, _bitno, _read_only) { \ 438 .flag_string = _name, \ 439 .bitno = _bitno, \ 440 .read_only = _read_only, \ 441 } 442 443 static const struct i40e_priv_flags i40e_gstrings_priv_flags[] = { 444 /* NOTE: MFP setting cannot be changed */ 445 I40E_PRIV_FLAG("MFP", I40E_FLAG_MFP_ENA, 1), 446 I40E_PRIV_FLAG("total-port-shutdown", 447 I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENA, 1), 448 I40E_PRIV_FLAG("LinkPolling", I40E_FLAG_LINK_POLLING_ENA, 0), 449 I40E_PRIV_FLAG("flow-director-atr", I40E_FLAG_FD_ATR_ENA, 0), 450 I40E_PRIV_FLAG("veb-stats", I40E_FLAG_VEB_STATS_ENA, 0), 451 I40E_PRIV_FLAG("hw-atr-eviction", I40E_FLAG_HW_ATR_EVICT_ENA, 0), 452 I40E_PRIV_FLAG("link-down-on-close", 453 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENA, 0), 454 I40E_PRIV_FLAG("legacy-rx", I40E_FLAG_LEGACY_RX_ENA, 0), 455 I40E_PRIV_FLAG("disable-source-pruning", 456 I40E_FLAG_SOURCE_PRUNING_DIS, 0), 457 I40E_PRIV_FLAG("disable-fw-lldp", I40E_FLAG_FW_LLDP_DIS, 0), 458 I40E_PRIV_FLAG("rs-fec", I40E_FLAG_RS_FEC, 0), 459 I40E_PRIV_FLAG("base-r-fec", I40E_FLAG_BASE_R_FEC, 0), 460 I40E_PRIV_FLAG("vf-vlan-pruning", 461 I40E_FLAG_VF_VLAN_PRUNING_ENA, 0), 462 I40E_PRIV_FLAG("mdd-auto-reset-vf", 463 I40E_FLAG_MDD_AUTO_RESET_VF, 0), 464 }; 465 466 #define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gstrings_priv_flags) 467 468 /* Private flags with a global effect, restricted to PF 0 */ 469 static const struct i40e_priv_flags i40e_gl_gstrings_priv_flags[] = { 470 I40E_PRIV_FLAG("vf-true-promisc-support", 471 I40E_FLAG_TRUE_PROMISC_ENA, 0), 472 }; 473 474 #define I40E_GL_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gl_gstrings_priv_flags) 475 476 /** 477 * i40e_partition_setting_complaint - generic complaint for MFP restriction 478 * @pf: the PF struct 479 **/ 480 static void i40e_partition_setting_complaint(struct i40e_pf *pf) 481 { 482 dev_info(&pf->pdev->dev, 483 "The link settings are allowed to be changed only from the first partition of a given port. Please switch to the first partition in order to change the setting.\n"); 484 } 485 486 /** 487 * i40e_phy_type_to_ethtool - convert the phy_types to ethtool link modes 488 * @pf: PF struct with phy_types 489 * @ks: ethtool link ksettings struct to fill out 490 * 491 **/ 492 static void i40e_phy_type_to_ethtool(struct i40e_pf *pf, 493 struct ethtool_link_ksettings *ks) 494 { 495 struct i40e_link_status *hw_link_info = &pf->hw.phy.link_info; 496 u64 phy_types = pf->hw.phy.phy_types; 497 498 ethtool_link_ksettings_zero_link_mode(ks, supported); 499 ethtool_link_ksettings_zero_link_mode(ks, advertising); 500 501 if (phy_types & I40E_CAP_PHY_TYPE_SGMII) { 502 ethtool_link_ksettings_add_link_mode(ks, supported, 503 1000baseT_Full); 504 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 505 ethtool_link_ksettings_add_link_mode(ks, advertising, 506 1000baseT_Full); 507 if (test_bit(I40E_HW_CAP_100M_SGMII, pf->hw.caps)) { 508 ethtool_link_ksettings_add_link_mode(ks, supported, 509 100baseT_Full); 510 ethtool_link_ksettings_add_link_mode(ks, advertising, 511 100baseT_Full); 512 } 513 } 514 if (phy_types & I40E_CAP_PHY_TYPE_XAUI || 515 phy_types & I40E_CAP_PHY_TYPE_XFI || 516 phy_types & I40E_CAP_PHY_TYPE_SFI || 517 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SFPP_CU || 518 phy_types & I40E_CAP_PHY_TYPE_10GBASE_AOC) { 519 ethtool_link_ksettings_add_link_mode(ks, supported, 520 10000baseT_Full); 521 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 522 ethtool_link_ksettings_add_link_mode(ks, advertising, 523 10000baseT_Full); 524 } 525 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_T) { 526 ethtool_link_ksettings_add_link_mode(ks, supported, 527 10000baseT_Full); 528 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 529 ethtool_link_ksettings_add_link_mode(ks, advertising, 530 10000baseT_Full); 531 } 532 if (phy_types & I40E_CAP_PHY_TYPE_2_5GBASE_T) { 533 ethtool_link_ksettings_add_link_mode(ks, supported, 534 2500baseT_Full); 535 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_2_5GB) 536 ethtool_link_ksettings_add_link_mode(ks, advertising, 537 2500baseT_Full); 538 } 539 if (phy_types & I40E_CAP_PHY_TYPE_5GBASE_T) { 540 ethtool_link_ksettings_add_link_mode(ks, supported, 541 5000baseT_Full); 542 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_5GB) 543 ethtool_link_ksettings_add_link_mode(ks, advertising, 544 5000baseT_Full); 545 } 546 if (phy_types & I40E_CAP_PHY_TYPE_XLAUI || 547 phy_types & I40E_CAP_PHY_TYPE_XLPPI || 548 phy_types & I40E_CAP_PHY_TYPE_40GBASE_AOC) 549 ethtool_link_ksettings_add_link_mode(ks, supported, 550 40000baseCR4_Full); 551 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU || 552 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4) { 553 ethtool_link_ksettings_add_link_mode(ks, supported, 554 40000baseCR4_Full); 555 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_40GB) 556 ethtool_link_ksettings_add_link_mode(ks, advertising, 557 40000baseCR4_Full); 558 } 559 if (phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) { 560 ethtool_link_ksettings_add_link_mode(ks, supported, 561 100baseT_Full); 562 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 563 ethtool_link_ksettings_add_link_mode(ks, advertising, 564 100baseT_Full); 565 } 566 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_T) { 567 ethtool_link_ksettings_add_link_mode(ks, supported, 568 1000baseT_Full); 569 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 570 ethtool_link_ksettings_add_link_mode(ks, advertising, 571 1000baseT_Full); 572 } 573 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_SR4) { 574 ethtool_link_ksettings_add_link_mode(ks, supported, 575 40000baseSR4_Full); 576 ethtool_link_ksettings_add_link_mode(ks, advertising, 577 40000baseSR4_Full); 578 } 579 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_LR4) { 580 ethtool_link_ksettings_add_link_mode(ks, supported, 581 40000baseLR4_Full); 582 ethtool_link_ksettings_add_link_mode(ks, advertising, 583 40000baseLR4_Full); 584 } 585 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4) { 586 ethtool_link_ksettings_add_link_mode(ks, supported, 587 40000baseKR4_Full); 588 ethtool_link_ksettings_add_link_mode(ks, advertising, 589 40000baseKR4_Full); 590 } 591 if (phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2) { 592 ethtool_link_ksettings_add_link_mode(ks, supported, 593 20000baseKR2_Full); 594 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_20GB) 595 ethtool_link_ksettings_add_link_mode(ks, advertising, 596 20000baseKR2_Full); 597 } 598 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4) { 599 ethtool_link_ksettings_add_link_mode(ks, supported, 600 10000baseKX4_Full); 601 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 602 ethtool_link_ksettings_add_link_mode(ks, advertising, 603 10000baseKX4_Full); 604 } 605 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR && 606 !test_bit(I40E_HW_CAP_CRT_RETIMER, pf->hw.caps)) { 607 ethtool_link_ksettings_add_link_mode(ks, supported, 608 10000baseKR_Full); 609 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 610 ethtool_link_ksettings_add_link_mode(ks, advertising, 611 10000baseKR_Full); 612 } 613 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX && 614 !test_bit(I40E_HW_CAP_CRT_RETIMER, pf->hw.caps)) { 615 ethtool_link_ksettings_add_link_mode(ks, supported, 616 1000baseKX_Full); 617 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 618 ethtool_link_ksettings_add_link_mode(ks, advertising, 619 1000baseKX_Full); 620 } 621 /* need to add 25G PHY types */ 622 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR) { 623 ethtool_link_ksettings_add_link_mode(ks, supported, 624 25000baseKR_Full); 625 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 626 ethtool_link_ksettings_add_link_mode(ks, advertising, 627 25000baseKR_Full); 628 } 629 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR) { 630 ethtool_link_ksettings_add_link_mode(ks, supported, 631 25000baseCR_Full); 632 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 633 ethtool_link_ksettings_add_link_mode(ks, advertising, 634 25000baseCR_Full); 635 } 636 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 637 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR) { 638 ethtool_link_ksettings_add_link_mode(ks, supported, 639 25000baseSR_Full); 640 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 641 ethtool_link_ksettings_add_link_mode(ks, advertising, 642 25000baseSR_Full); 643 } 644 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_AOC || 645 phy_types & I40E_CAP_PHY_TYPE_25GBASE_ACC) { 646 ethtool_link_ksettings_add_link_mode(ks, supported, 647 25000baseCR_Full); 648 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) 649 ethtool_link_ksettings_add_link_mode(ks, advertising, 650 25000baseCR_Full); 651 } 652 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR || 653 phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR || 654 phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 655 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR || 656 phy_types & I40E_CAP_PHY_TYPE_25GBASE_AOC || 657 phy_types & I40E_CAP_PHY_TYPE_25GBASE_ACC) { 658 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_NONE); 659 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS); 660 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER); 661 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) { 662 ethtool_link_ksettings_add_link_mode(ks, advertising, 663 FEC_NONE); 664 ethtool_link_ksettings_add_link_mode(ks, advertising, 665 FEC_RS); 666 ethtool_link_ksettings_add_link_mode(ks, advertising, 667 FEC_BASER); 668 } 669 } 670 /* need to add new 10G PHY types */ 671 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 || 672 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU) { 673 ethtool_link_ksettings_add_link_mode(ks, supported, 674 10000baseCR_Full); 675 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 676 ethtool_link_ksettings_add_link_mode(ks, advertising, 677 10000baseCR_Full); 678 } 679 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR) { 680 ethtool_link_ksettings_add_link_mode(ks, supported, 681 10000baseSR_Full); 682 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 683 ethtool_link_ksettings_add_link_mode(ks, advertising, 684 10000baseSR_Full); 685 } 686 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR) { 687 ethtool_link_ksettings_add_link_mode(ks, supported, 688 10000baseLR_Full); 689 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 690 ethtool_link_ksettings_add_link_mode(ks, advertising, 691 10000baseLR_Full); 692 } 693 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX || 694 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX || 695 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL) { 696 ethtool_link_ksettings_add_link_mode(ks, supported, 697 1000baseX_Full); 698 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 699 ethtool_link_ksettings_add_link_mode(ks, advertising, 700 1000baseX_Full); 701 } 702 /* Autoneg PHY types */ 703 if (phy_types & I40E_CAP_PHY_TYPE_SGMII || 704 phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4 || 705 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU || 706 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4 || 707 phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR || 708 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR || 709 phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR || 710 phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR || 711 phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2 || 712 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR || 713 phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR || 714 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4 || 715 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR || 716 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU || 717 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 || 718 phy_types & I40E_CAP_PHY_TYPE_10GBASE_T || 719 phy_types & I40E_CAP_PHY_TYPE_5GBASE_T || 720 phy_types & I40E_CAP_PHY_TYPE_2_5GBASE_T || 721 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL || 722 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T || 723 phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX || 724 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX || 725 phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX || 726 phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) { 727 ethtool_link_ksettings_add_link_mode(ks, supported, 728 Autoneg); 729 ethtool_link_ksettings_add_link_mode(ks, advertising, 730 Autoneg); 731 } 732 } 733 734 /** 735 * i40e_get_settings_link_up_fec - Get the FEC mode encoding from mask 736 * @req_fec_info: mask request FEC info 737 * @ks: ethtool ksettings to fill in 738 **/ 739 static void i40e_get_settings_link_up_fec(u8 req_fec_info, 740 struct ethtool_link_ksettings *ks) 741 { 742 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_NONE); 743 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS); 744 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER); 745 746 if ((I40E_AQ_SET_FEC_REQUEST_RS & req_fec_info) && 747 (I40E_AQ_SET_FEC_REQUEST_KR & req_fec_info)) { 748 ethtool_link_ksettings_add_link_mode(ks, advertising, 749 FEC_NONE); 750 ethtool_link_ksettings_add_link_mode(ks, advertising, 751 FEC_BASER); 752 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS); 753 } else if (I40E_AQ_SET_FEC_REQUEST_RS & req_fec_info) { 754 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS); 755 } else if (I40E_AQ_SET_FEC_REQUEST_KR & req_fec_info) { 756 ethtool_link_ksettings_add_link_mode(ks, advertising, 757 FEC_BASER); 758 } else { 759 ethtool_link_ksettings_add_link_mode(ks, advertising, 760 FEC_NONE); 761 } 762 } 763 764 /** 765 * i40e_get_settings_link_up - Get the Link settings for when link is up 766 * @hw: hw structure 767 * @ks: ethtool ksettings to fill in 768 * @netdev: network interface device structure 769 * @pf: pointer to physical function struct 770 **/ 771 static void i40e_get_settings_link_up(struct i40e_hw *hw, 772 struct ethtool_link_ksettings *ks, 773 struct net_device *netdev, 774 struct i40e_pf *pf) 775 { 776 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 777 struct ethtool_link_ksettings cap_ksettings; 778 u32 link_speed = hw_link_info->link_speed; 779 780 /* Initialize supported and advertised settings based on phy settings */ 781 switch (hw_link_info->phy_type) { 782 case I40E_PHY_TYPE_40GBASE_CR4: 783 case I40E_PHY_TYPE_40GBASE_CR4_CU: 784 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 785 ethtool_link_ksettings_add_link_mode(ks, supported, 786 40000baseCR4_Full); 787 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 788 ethtool_link_ksettings_add_link_mode(ks, advertising, 789 40000baseCR4_Full); 790 break; 791 case I40E_PHY_TYPE_XLAUI: 792 case I40E_PHY_TYPE_XLPPI: 793 case I40E_PHY_TYPE_40GBASE_AOC: 794 ethtool_link_ksettings_add_link_mode(ks, supported, 795 40000baseCR4_Full); 796 ethtool_link_ksettings_add_link_mode(ks, advertising, 797 40000baseCR4_Full); 798 break; 799 case I40E_PHY_TYPE_40GBASE_SR4: 800 ethtool_link_ksettings_add_link_mode(ks, supported, 801 40000baseSR4_Full); 802 ethtool_link_ksettings_add_link_mode(ks, advertising, 803 40000baseSR4_Full); 804 break; 805 case I40E_PHY_TYPE_40GBASE_LR4: 806 ethtool_link_ksettings_add_link_mode(ks, supported, 807 40000baseLR4_Full); 808 ethtool_link_ksettings_add_link_mode(ks, advertising, 809 40000baseLR4_Full); 810 break; 811 case I40E_PHY_TYPE_25GBASE_SR: 812 case I40E_PHY_TYPE_25GBASE_LR: 813 case I40E_PHY_TYPE_10GBASE_SR: 814 case I40E_PHY_TYPE_10GBASE_LR: 815 case I40E_PHY_TYPE_1000BASE_SX: 816 case I40E_PHY_TYPE_1000BASE_LX: 817 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 818 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 819 ethtool_link_ksettings_add_link_mode(ks, supported, 820 25000baseSR_Full); 821 ethtool_link_ksettings_add_link_mode(ks, advertising, 822 25000baseSR_Full); 823 i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks); 824 ethtool_link_ksettings_add_link_mode(ks, supported, 825 10000baseSR_Full); 826 ethtool_link_ksettings_add_link_mode(ks, advertising, 827 10000baseSR_Full); 828 ethtool_link_ksettings_add_link_mode(ks, supported, 829 10000baseLR_Full); 830 ethtool_link_ksettings_add_link_mode(ks, advertising, 831 10000baseLR_Full); 832 ethtool_link_ksettings_add_link_mode(ks, supported, 833 1000baseX_Full); 834 ethtool_link_ksettings_add_link_mode(ks, advertising, 835 1000baseX_Full); 836 ethtool_link_ksettings_add_link_mode(ks, supported, 837 10000baseT_Full); 838 if (hw_link_info->module_type[2] & 839 I40E_MODULE_TYPE_1000BASE_SX || 840 hw_link_info->module_type[2] & 841 I40E_MODULE_TYPE_1000BASE_LX) { 842 ethtool_link_ksettings_add_link_mode(ks, supported, 843 1000baseT_Full); 844 if (hw_link_info->requested_speeds & 845 I40E_LINK_SPEED_1GB) 846 ethtool_link_ksettings_add_link_mode( 847 ks, advertising, 1000baseT_Full); 848 } 849 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 850 ethtool_link_ksettings_add_link_mode(ks, advertising, 851 10000baseT_Full); 852 break; 853 case I40E_PHY_TYPE_10GBASE_T: 854 case I40E_PHY_TYPE_5GBASE_T_LINK_STATUS: 855 case I40E_PHY_TYPE_2_5GBASE_T_LINK_STATUS: 856 case I40E_PHY_TYPE_1000BASE_T: 857 case I40E_PHY_TYPE_100BASE_TX: 858 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 859 ethtool_link_ksettings_add_link_mode(ks, supported, 860 10000baseT_Full); 861 ethtool_link_ksettings_add_link_mode(ks, supported, 862 5000baseT_Full); 863 ethtool_link_ksettings_add_link_mode(ks, supported, 864 2500baseT_Full); 865 ethtool_link_ksettings_add_link_mode(ks, supported, 866 1000baseT_Full); 867 ethtool_link_ksettings_add_link_mode(ks, supported, 868 100baseT_Full); 869 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 870 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 871 ethtool_link_ksettings_add_link_mode(ks, advertising, 872 10000baseT_Full); 873 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_5GB) 874 ethtool_link_ksettings_add_link_mode(ks, advertising, 875 5000baseT_Full); 876 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_2_5GB) 877 ethtool_link_ksettings_add_link_mode(ks, advertising, 878 2500baseT_Full); 879 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 880 ethtool_link_ksettings_add_link_mode(ks, advertising, 881 1000baseT_Full); 882 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) 883 ethtool_link_ksettings_add_link_mode(ks, advertising, 884 100baseT_Full); 885 break; 886 case I40E_PHY_TYPE_1000BASE_T_OPTICAL: 887 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 888 ethtool_link_ksettings_add_link_mode(ks, supported, 889 1000baseT_Full); 890 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 891 ethtool_link_ksettings_add_link_mode(ks, advertising, 892 1000baseT_Full); 893 break; 894 case I40E_PHY_TYPE_10GBASE_CR1_CU: 895 case I40E_PHY_TYPE_10GBASE_CR1: 896 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 897 ethtool_link_ksettings_add_link_mode(ks, supported, 898 10000baseT_Full); 899 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 900 ethtool_link_ksettings_add_link_mode(ks, advertising, 901 10000baseT_Full); 902 break; 903 case I40E_PHY_TYPE_XAUI: 904 case I40E_PHY_TYPE_XFI: 905 case I40E_PHY_TYPE_SFI: 906 case I40E_PHY_TYPE_10GBASE_SFPP_CU: 907 case I40E_PHY_TYPE_10GBASE_AOC: 908 ethtool_link_ksettings_add_link_mode(ks, supported, 909 10000baseT_Full); 910 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) 911 ethtool_link_ksettings_add_link_mode(ks, advertising, 912 10000baseT_Full); 913 i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks); 914 break; 915 case I40E_PHY_TYPE_SGMII: 916 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 917 ethtool_link_ksettings_add_link_mode(ks, supported, 918 1000baseT_Full); 919 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 920 ethtool_link_ksettings_add_link_mode(ks, advertising, 921 1000baseT_Full); 922 if (test_bit(I40E_HW_CAP_100M_SGMII, pf->hw.caps)) { 923 ethtool_link_ksettings_add_link_mode(ks, supported, 924 100baseT_Full); 925 if (hw_link_info->requested_speeds & 926 I40E_LINK_SPEED_100MB) 927 ethtool_link_ksettings_add_link_mode( 928 ks, advertising, 100baseT_Full); 929 } 930 break; 931 case I40E_PHY_TYPE_40GBASE_KR4: 932 case I40E_PHY_TYPE_25GBASE_KR: 933 case I40E_PHY_TYPE_20GBASE_KR2: 934 case I40E_PHY_TYPE_10GBASE_KR: 935 case I40E_PHY_TYPE_10GBASE_KX4: 936 case I40E_PHY_TYPE_1000BASE_KX: 937 ethtool_link_ksettings_add_link_mode(ks, supported, 938 40000baseKR4_Full); 939 ethtool_link_ksettings_add_link_mode(ks, supported, 940 25000baseKR_Full); 941 ethtool_link_ksettings_add_link_mode(ks, supported, 942 20000baseKR2_Full); 943 ethtool_link_ksettings_add_link_mode(ks, supported, 944 10000baseKR_Full); 945 ethtool_link_ksettings_add_link_mode(ks, supported, 946 10000baseKX4_Full); 947 ethtool_link_ksettings_add_link_mode(ks, supported, 948 1000baseKX_Full); 949 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 950 ethtool_link_ksettings_add_link_mode(ks, advertising, 951 40000baseKR4_Full); 952 ethtool_link_ksettings_add_link_mode(ks, advertising, 953 25000baseKR_Full); 954 i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks); 955 ethtool_link_ksettings_add_link_mode(ks, advertising, 956 20000baseKR2_Full); 957 ethtool_link_ksettings_add_link_mode(ks, advertising, 958 10000baseKR_Full); 959 ethtool_link_ksettings_add_link_mode(ks, advertising, 960 10000baseKX4_Full); 961 ethtool_link_ksettings_add_link_mode(ks, advertising, 962 1000baseKX_Full); 963 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 964 break; 965 case I40E_PHY_TYPE_25GBASE_CR: 966 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 967 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 968 ethtool_link_ksettings_add_link_mode(ks, supported, 969 25000baseCR_Full); 970 ethtool_link_ksettings_add_link_mode(ks, advertising, 971 25000baseCR_Full); 972 i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks); 973 974 break; 975 case I40E_PHY_TYPE_25GBASE_AOC: 976 case I40E_PHY_TYPE_25GBASE_ACC: 977 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 978 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 979 ethtool_link_ksettings_add_link_mode(ks, supported, 980 25000baseCR_Full); 981 ethtool_link_ksettings_add_link_mode(ks, advertising, 982 25000baseCR_Full); 983 i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks); 984 985 ethtool_link_ksettings_add_link_mode(ks, supported, 986 10000baseCR_Full); 987 ethtool_link_ksettings_add_link_mode(ks, advertising, 988 10000baseCR_Full); 989 break; 990 default: 991 /* if we got here and link is up something bad is afoot */ 992 netdev_info(netdev, 993 "WARNING: Link is up but PHY type 0x%x is not recognized, or incorrect cable is in use\n", 994 hw_link_info->phy_type); 995 } 996 997 /* Now that we've worked out everything that could be supported by the 998 * current PHY type, get what is supported by the NVM and intersect 999 * them to get what is truly supported 1000 */ 1001 memset(&cap_ksettings, 0, sizeof(struct ethtool_link_ksettings)); 1002 i40e_phy_type_to_ethtool(pf, &cap_ksettings); 1003 ethtool_intersect_link_masks(ks, &cap_ksettings); 1004 1005 /* Set speed and duplex */ 1006 switch (link_speed) { 1007 case I40E_LINK_SPEED_40GB: 1008 ks->base.speed = SPEED_40000; 1009 break; 1010 case I40E_LINK_SPEED_25GB: 1011 ks->base.speed = SPEED_25000; 1012 break; 1013 case I40E_LINK_SPEED_20GB: 1014 ks->base.speed = SPEED_20000; 1015 break; 1016 case I40E_LINK_SPEED_10GB: 1017 ks->base.speed = SPEED_10000; 1018 break; 1019 case I40E_LINK_SPEED_5GB: 1020 ks->base.speed = SPEED_5000; 1021 break; 1022 case I40E_LINK_SPEED_2_5GB: 1023 ks->base.speed = SPEED_2500; 1024 break; 1025 case I40E_LINK_SPEED_1GB: 1026 ks->base.speed = SPEED_1000; 1027 break; 1028 case I40E_LINK_SPEED_100MB: 1029 ks->base.speed = SPEED_100; 1030 break; 1031 default: 1032 ks->base.speed = SPEED_UNKNOWN; 1033 break; 1034 } 1035 ks->base.duplex = DUPLEX_FULL; 1036 } 1037 1038 /** 1039 * i40e_get_settings_link_down - Get the Link settings for when link is down 1040 * @hw: hw structure 1041 * @ks: ethtool ksettings to fill in 1042 * @pf: pointer to physical function struct 1043 * 1044 * Reports link settings that can be determined when link is down 1045 **/ 1046 static void i40e_get_settings_link_down(struct i40e_hw *hw, 1047 struct ethtool_link_ksettings *ks, 1048 struct i40e_pf *pf) 1049 { 1050 /* link is down and the driver needs to fall back on 1051 * supported phy types to figure out what info to display 1052 */ 1053 i40e_phy_type_to_ethtool(pf, ks); 1054 1055 /* With no link speed and duplex are unknown */ 1056 ks->base.speed = SPEED_UNKNOWN; 1057 ks->base.duplex = DUPLEX_UNKNOWN; 1058 } 1059 1060 /** 1061 * i40e_get_link_ksettings - Get Link Speed and Duplex settings 1062 * @netdev: network interface device structure 1063 * @ks: ethtool ksettings 1064 * 1065 * Reports speed/duplex settings based on media_type 1066 **/ 1067 static int i40e_get_link_ksettings(struct net_device *netdev, 1068 struct ethtool_link_ksettings *ks) 1069 { 1070 struct i40e_netdev_priv *np = netdev_priv(netdev); 1071 struct i40e_pf *pf = np->vsi->back; 1072 struct i40e_hw *hw = &pf->hw; 1073 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 1074 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 1075 1076 ethtool_link_ksettings_zero_link_mode(ks, supported); 1077 ethtool_link_ksettings_zero_link_mode(ks, advertising); 1078 1079 if (link_up) 1080 i40e_get_settings_link_up(hw, ks, netdev, pf); 1081 else 1082 i40e_get_settings_link_down(hw, ks, pf); 1083 1084 /* Now set the settings that don't rely on link being up/down */ 1085 /* Set autoneg settings */ 1086 ks->base.autoneg = ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 1087 AUTONEG_ENABLE : AUTONEG_DISABLE); 1088 1089 /* Set media type settings */ 1090 switch (hw->phy.media_type) { 1091 case I40E_MEDIA_TYPE_BACKPLANE: 1092 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg); 1093 ethtool_link_ksettings_add_link_mode(ks, supported, Backplane); 1094 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg); 1095 ethtool_link_ksettings_add_link_mode(ks, advertising, 1096 Backplane); 1097 ks->base.port = PORT_NONE; 1098 break; 1099 case I40E_MEDIA_TYPE_BASET: 1100 ethtool_link_ksettings_add_link_mode(ks, supported, TP); 1101 ethtool_link_ksettings_add_link_mode(ks, advertising, TP); 1102 ks->base.port = PORT_TP; 1103 break; 1104 case I40E_MEDIA_TYPE_DA: 1105 case I40E_MEDIA_TYPE_CX4: 1106 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE); 1107 ethtool_link_ksettings_add_link_mode(ks, advertising, FIBRE); 1108 ks->base.port = PORT_DA; 1109 break; 1110 case I40E_MEDIA_TYPE_FIBER: 1111 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE); 1112 ethtool_link_ksettings_add_link_mode(ks, advertising, FIBRE); 1113 ks->base.port = PORT_FIBRE; 1114 break; 1115 case I40E_MEDIA_TYPE_UNKNOWN: 1116 default: 1117 ks->base.port = PORT_OTHER; 1118 break; 1119 } 1120 1121 /* Set flow control settings */ 1122 ethtool_link_ksettings_add_link_mode(ks, supported, Pause); 1123 ethtool_link_ksettings_add_link_mode(ks, supported, Asym_Pause); 1124 1125 switch (hw->fc.requested_mode) { 1126 case I40E_FC_FULL: 1127 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause); 1128 break; 1129 case I40E_FC_TX_PAUSE: 1130 ethtool_link_ksettings_add_link_mode(ks, advertising, 1131 Asym_Pause); 1132 break; 1133 case I40E_FC_RX_PAUSE: 1134 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause); 1135 ethtool_link_ksettings_add_link_mode(ks, advertising, 1136 Asym_Pause); 1137 break; 1138 default: 1139 ethtool_link_ksettings_del_link_mode(ks, advertising, Pause); 1140 ethtool_link_ksettings_del_link_mode(ks, advertising, 1141 Asym_Pause); 1142 break; 1143 } 1144 1145 return 0; 1146 } 1147 1148 #define I40E_LBIT_SIZE 8 1149 /** 1150 * i40e_speed_to_link_speed - Translate decimal speed to i40e_aq_link_speed 1151 * @speed: speed in decimal 1152 * @ks: ethtool ksettings 1153 * 1154 * Return i40e_aq_link_speed based on speed 1155 **/ 1156 static enum i40e_aq_link_speed 1157 i40e_speed_to_link_speed(__u32 speed, const struct ethtool_link_ksettings *ks) 1158 { 1159 enum i40e_aq_link_speed link_speed = I40E_LINK_SPEED_UNKNOWN; 1160 bool speed_changed = false; 1161 int i, j; 1162 1163 static const struct { 1164 __u32 speed; 1165 enum i40e_aq_link_speed link_speed; 1166 __u8 bit[I40E_LBIT_SIZE]; 1167 } i40e_speed_lut[] = { 1168 #define I40E_LBIT(mode) ETHTOOL_LINK_MODE_ ## mode ##_Full_BIT 1169 {SPEED_100, I40E_LINK_SPEED_100MB, {I40E_LBIT(100baseT)} }, 1170 {SPEED_1000, I40E_LINK_SPEED_1GB, 1171 {I40E_LBIT(1000baseT), I40E_LBIT(1000baseX), 1172 I40E_LBIT(1000baseKX)} }, 1173 {SPEED_10000, I40E_LINK_SPEED_10GB, 1174 {I40E_LBIT(10000baseT), I40E_LBIT(10000baseKR), 1175 I40E_LBIT(10000baseLR), I40E_LBIT(10000baseCR), 1176 I40E_LBIT(10000baseSR), I40E_LBIT(10000baseKX4)} }, 1177 1178 {SPEED_25000, I40E_LINK_SPEED_25GB, 1179 {I40E_LBIT(25000baseCR), I40E_LBIT(25000baseKR), 1180 I40E_LBIT(25000baseSR)} }, 1181 {SPEED_40000, I40E_LINK_SPEED_40GB, 1182 {I40E_LBIT(40000baseKR4), I40E_LBIT(40000baseCR4), 1183 I40E_LBIT(40000baseSR4), I40E_LBIT(40000baseLR4)} }, 1184 {SPEED_20000, I40E_LINK_SPEED_20GB, 1185 {I40E_LBIT(20000baseKR2)} }, 1186 {SPEED_2500, I40E_LINK_SPEED_2_5GB, {I40E_LBIT(2500baseT)} }, 1187 {SPEED_5000, I40E_LINK_SPEED_5GB, {I40E_LBIT(2500baseT)} } 1188 #undef I40E_LBIT 1189 }; 1190 1191 for (i = 0; i < ARRAY_SIZE(i40e_speed_lut); i++) { 1192 if (i40e_speed_lut[i].speed == speed) { 1193 for (j = 0; j < I40E_LBIT_SIZE; j++) { 1194 if (test_bit(i40e_speed_lut[i].bit[j], 1195 ks->link_modes.supported)) { 1196 speed_changed = true; 1197 break; 1198 } 1199 if (!i40e_speed_lut[i].bit[j]) 1200 break; 1201 } 1202 if (speed_changed) { 1203 link_speed = i40e_speed_lut[i].link_speed; 1204 break; 1205 } 1206 } 1207 } 1208 return link_speed; 1209 } 1210 1211 #undef I40E_LBIT_SIZE 1212 1213 /** 1214 * i40e_set_link_ksettings - Set Speed and Duplex 1215 * @netdev: network interface device structure 1216 * @ks: ethtool ksettings 1217 * 1218 * Set speed/duplex per media_types advertised/forced 1219 **/ 1220 static int i40e_set_link_ksettings(struct net_device *netdev, 1221 const struct ethtool_link_ksettings *ks) 1222 { 1223 struct i40e_netdev_priv *np = netdev_priv(netdev); 1224 struct i40e_aq_get_phy_abilities_resp abilities; 1225 struct ethtool_link_ksettings safe_ks; 1226 struct ethtool_link_ksettings copy_ks; 1227 struct i40e_aq_set_phy_config config; 1228 struct i40e_pf *pf = np->vsi->back; 1229 enum i40e_aq_link_speed link_speed; 1230 struct i40e_vsi *vsi = np->vsi; 1231 struct i40e_hw *hw = &pf->hw; 1232 bool autoneg_changed = false; 1233 int timeout = 50; 1234 int status = 0; 1235 int err = 0; 1236 __u32 speed; 1237 u8 autoneg; 1238 1239 /* Changing port settings is not supported if this isn't the 1240 * port's controlling PF 1241 */ 1242 if (hw->partition_id != 1) { 1243 i40e_partition_setting_complaint(pf); 1244 return -EOPNOTSUPP; 1245 } 1246 if (vsi->type != I40E_VSI_MAIN) 1247 return -EOPNOTSUPP; 1248 if (hw->phy.media_type != I40E_MEDIA_TYPE_BASET && 1249 hw->phy.media_type != I40E_MEDIA_TYPE_FIBER && 1250 hw->phy.media_type != I40E_MEDIA_TYPE_BACKPLANE && 1251 hw->phy.media_type != I40E_MEDIA_TYPE_DA && 1252 hw->phy.link_info.link_info & I40E_AQ_LINK_UP) 1253 return -EOPNOTSUPP; 1254 if (hw->device_id == I40E_DEV_ID_KX_B || 1255 hw->device_id == I40E_DEV_ID_KX_C || 1256 hw->device_id == I40E_DEV_ID_20G_KR2 || 1257 hw->device_id == I40E_DEV_ID_20G_KR2_A || 1258 hw->device_id == I40E_DEV_ID_25G_B || 1259 hw->device_id == I40E_DEV_ID_KX_X722) { 1260 netdev_info(netdev, "Changing settings is not supported on backplane.\n"); 1261 return -EOPNOTSUPP; 1262 } 1263 1264 /* copy the ksettings to copy_ks to avoid modifying the origin */ 1265 memcpy(©_ks, ks, sizeof(struct ethtool_link_ksettings)); 1266 1267 /* save autoneg out of ksettings */ 1268 autoneg = copy_ks.base.autoneg; 1269 speed = copy_ks.base.speed; 1270 1271 /* get our own copy of the bits to check against */ 1272 memset(&safe_ks, 0, sizeof(struct ethtool_link_ksettings)); 1273 safe_ks.base.cmd = copy_ks.base.cmd; 1274 safe_ks.base.link_mode_masks_nwords = 1275 copy_ks.base.link_mode_masks_nwords; 1276 i40e_get_link_ksettings(netdev, &safe_ks); 1277 1278 /* Get link modes supported by hardware and check against modes 1279 * requested by the user. Return an error if unsupported mode was set. 1280 */ 1281 if (!bitmap_subset(copy_ks.link_modes.advertising, 1282 safe_ks.link_modes.supported, 1283 __ETHTOOL_LINK_MODE_MASK_NBITS)) 1284 return -EINVAL; 1285 1286 /* set autoneg back to what it currently is */ 1287 copy_ks.base.autoneg = safe_ks.base.autoneg; 1288 copy_ks.base.speed = safe_ks.base.speed; 1289 1290 /* If copy_ks.base and safe_ks.base are not the same now, then they are 1291 * trying to set something that we do not support. 1292 */ 1293 if (memcmp(©_ks.base, &safe_ks.base, 1294 sizeof(struct ethtool_link_settings))) { 1295 netdev_err(netdev, "Only speed and autoneg are supported.\n"); 1296 return -EOPNOTSUPP; 1297 } 1298 1299 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) { 1300 timeout--; 1301 if (!timeout) 1302 return -EBUSY; 1303 usleep_range(1000, 2000); 1304 } 1305 1306 /* Get the current phy config */ 1307 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, 1308 NULL); 1309 if (status) { 1310 err = -EAGAIN; 1311 goto done; 1312 } 1313 1314 /* Copy abilities to config in case autoneg is not 1315 * set below 1316 */ 1317 memset(&config, 0, sizeof(struct i40e_aq_set_phy_config)); 1318 config.abilities = abilities.abilities; 1319 1320 /* Check autoneg */ 1321 if (autoneg == AUTONEG_ENABLE) { 1322 /* If autoneg was not already enabled */ 1323 if (!(hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED)) { 1324 /* If autoneg is not supported, return error */ 1325 if (!ethtool_link_ksettings_test_link_mode(&safe_ks, 1326 supported, 1327 Autoneg)) { 1328 netdev_info(netdev, "Autoneg not supported on this phy\n"); 1329 err = -EINVAL; 1330 goto done; 1331 } 1332 /* Autoneg is allowed to change */ 1333 config.abilities = abilities.abilities | 1334 I40E_AQ_PHY_ENABLE_AN; 1335 autoneg_changed = true; 1336 } 1337 } else { 1338 /* If autoneg is currently enabled */ 1339 if (hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED) { 1340 /* If autoneg is supported 10GBASE_T is the only PHY 1341 * that can disable it, so otherwise return error 1342 */ 1343 if (ethtool_link_ksettings_test_link_mode(&safe_ks, 1344 supported, 1345 Autoneg) && 1346 hw->phy.media_type != I40E_MEDIA_TYPE_BASET) { 1347 netdev_info(netdev, "Autoneg cannot be disabled on this phy\n"); 1348 err = -EINVAL; 1349 goto done; 1350 } 1351 /* Autoneg is allowed to change */ 1352 config.abilities = abilities.abilities & 1353 ~I40E_AQ_PHY_ENABLE_AN; 1354 autoneg_changed = true; 1355 } 1356 } 1357 1358 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1359 100baseT_Full)) 1360 config.link_speed |= I40E_LINK_SPEED_100MB; 1361 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1362 1000baseT_Full) || 1363 ethtool_link_ksettings_test_link_mode(ks, advertising, 1364 1000baseX_Full) || 1365 ethtool_link_ksettings_test_link_mode(ks, advertising, 1366 1000baseKX_Full)) 1367 config.link_speed |= I40E_LINK_SPEED_1GB; 1368 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1369 10000baseT_Full) || 1370 ethtool_link_ksettings_test_link_mode(ks, advertising, 1371 10000baseKX4_Full) || 1372 ethtool_link_ksettings_test_link_mode(ks, advertising, 1373 10000baseKR_Full) || 1374 ethtool_link_ksettings_test_link_mode(ks, advertising, 1375 10000baseCR_Full) || 1376 ethtool_link_ksettings_test_link_mode(ks, advertising, 1377 10000baseSR_Full) || 1378 ethtool_link_ksettings_test_link_mode(ks, advertising, 1379 10000baseLR_Full)) 1380 config.link_speed |= I40E_LINK_SPEED_10GB; 1381 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1382 2500baseT_Full)) 1383 config.link_speed |= I40E_LINK_SPEED_2_5GB; 1384 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1385 5000baseT_Full)) 1386 config.link_speed |= I40E_LINK_SPEED_5GB; 1387 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1388 20000baseKR2_Full)) 1389 config.link_speed |= I40E_LINK_SPEED_20GB; 1390 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1391 25000baseCR_Full) || 1392 ethtool_link_ksettings_test_link_mode(ks, advertising, 1393 25000baseKR_Full) || 1394 ethtool_link_ksettings_test_link_mode(ks, advertising, 1395 25000baseSR_Full)) 1396 config.link_speed |= I40E_LINK_SPEED_25GB; 1397 if (ethtool_link_ksettings_test_link_mode(ks, advertising, 1398 40000baseKR4_Full) || 1399 ethtool_link_ksettings_test_link_mode(ks, advertising, 1400 40000baseCR4_Full) || 1401 ethtool_link_ksettings_test_link_mode(ks, advertising, 1402 40000baseSR4_Full) || 1403 ethtool_link_ksettings_test_link_mode(ks, advertising, 1404 40000baseLR4_Full)) 1405 config.link_speed |= I40E_LINK_SPEED_40GB; 1406 1407 /* Autonegotiation must be disabled to change speed */ 1408 if ((speed != SPEED_UNKNOWN && safe_ks.base.speed != speed) && 1409 (autoneg == AUTONEG_DISABLE || 1410 (safe_ks.base.autoneg == AUTONEG_DISABLE && !autoneg_changed))) { 1411 link_speed = i40e_speed_to_link_speed(speed, ks); 1412 if (link_speed == I40E_LINK_SPEED_UNKNOWN) { 1413 netdev_info(netdev, "Given speed is not supported\n"); 1414 err = -EOPNOTSUPP; 1415 goto done; 1416 } else { 1417 config.link_speed = link_speed; 1418 } 1419 } else { 1420 if (safe_ks.base.speed != speed) { 1421 netdev_info(netdev, 1422 "Unable to set speed, disable autoneg\n"); 1423 err = -EOPNOTSUPP; 1424 goto done; 1425 } 1426 } 1427 1428 /* If speed didn't get set, set it to what it currently is. 1429 * This is needed because if advertise is 0 (as it is when autoneg 1430 * is disabled) then speed won't get set. 1431 */ 1432 if (!config.link_speed) 1433 config.link_speed = abilities.link_speed; 1434 if (autoneg_changed || abilities.link_speed != config.link_speed) { 1435 /* copy over the rest of the abilities */ 1436 config.phy_type = abilities.phy_type; 1437 config.phy_type_ext = abilities.phy_type_ext; 1438 config.eee_capability = abilities.eee_capability; 1439 config.eeer = abilities.eeer_val; 1440 config.low_power_ctrl = abilities.d3_lpan; 1441 config.fec_config = abilities.fec_cfg_curr_mod_ext_info & 1442 I40E_AQ_PHY_FEC_CONFIG_MASK; 1443 1444 /* save the requested speeds */ 1445 hw->phy.link_info.requested_speeds = config.link_speed; 1446 /* set link and auto negotiation so changes take effect */ 1447 config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK; 1448 /* If link is up put link down */ 1449 if (hw->phy.link_info.link_info & I40E_AQ_LINK_UP) { 1450 /* Tell the OS link is going down, the link will go 1451 * back up when fw says it is ready asynchronously 1452 */ 1453 i40e_print_link_message(vsi, false); 1454 netif_carrier_off(netdev); 1455 netif_tx_stop_all_queues(netdev); 1456 } 1457 1458 /* make the aq call */ 1459 status = i40e_aq_set_phy_config(hw, &config, NULL); 1460 if (status) { 1461 netdev_info(netdev, 1462 "Set phy config failed, err %pe aq_err %s\n", 1463 ERR_PTR(status), 1464 i40e_aq_str(hw, hw->aq.asq_last_status)); 1465 err = -EAGAIN; 1466 goto done; 1467 } 1468 1469 status = i40e_update_link_info(hw); 1470 if (status) 1471 netdev_dbg(netdev, 1472 "Updating link info failed with err %pe aq_err %s\n", 1473 ERR_PTR(status), 1474 i40e_aq_str(hw, hw->aq.asq_last_status)); 1475 1476 } else { 1477 netdev_info(netdev, "Nothing changed, exiting without setting anything.\n"); 1478 } 1479 1480 done: 1481 clear_bit(__I40E_CONFIG_BUSY, pf->state); 1482 1483 return err; 1484 } 1485 1486 static int i40e_set_fec_cfg(struct net_device *netdev, u8 fec_cfg) 1487 { 1488 struct i40e_netdev_priv *np = netdev_priv(netdev); 1489 struct i40e_aq_get_phy_abilities_resp abilities; 1490 struct i40e_pf *pf = np->vsi->back; 1491 struct i40e_hw *hw = &pf->hw; 1492 int status = 0; 1493 int err = 0; 1494 1495 /* Get the current phy config */ 1496 memset(&abilities, 0, sizeof(abilities)); 1497 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, 1498 NULL); 1499 if (status) { 1500 err = -EAGAIN; 1501 goto done; 1502 } 1503 1504 if (abilities.fec_cfg_curr_mod_ext_info != fec_cfg) { 1505 struct i40e_aq_set_phy_config config; 1506 1507 memset(&config, 0, sizeof(config)); 1508 config.phy_type = abilities.phy_type; 1509 config.abilities = abilities.abilities | 1510 I40E_AQ_PHY_ENABLE_ATOMIC_LINK; 1511 config.phy_type_ext = abilities.phy_type_ext; 1512 config.link_speed = abilities.link_speed; 1513 config.eee_capability = abilities.eee_capability; 1514 config.eeer = abilities.eeer_val; 1515 config.low_power_ctrl = abilities.d3_lpan; 1516 config.fec_config = fec_cfg & I40E_AQ_PHY_FEC_CONFIG_MASK; 1517 status = i40e_aq_set_phy_config(hw, &config, NULL); 1518 if (status) { 1519 netdev_info(netdev, 1520 "Set phy config failed, err %pe aq_err %s\n", 1521 ERR_PTR(status), 1522 i40e_aq_str(hw, hw->aq.asq_last_status)); 1523 err = -EAGAIN; 1524 goto done; 1525 } 1526 i40e_set_fec_in_flags(fec_cfg, pf->flags); 1527 status = i40e_update_link_info(hw); 1528 if (status) 1529 /* debug level message only due to relation to the link 1530 * itself rather than to the FEC settings 1531 * (e.g. no physical connection etc.) 1532 */ 1533 netdev_dbg(netdev, 1534 "Updating link info failed with err %pe aq_err %s\n", 1535 ERR_PTR(status), 1536 i40e_aq_str(hw, hw->aq.asq_last_status)); 1537 } 1538 1539 done: 1540 return err; 1541 } 1542 1543 static int i40e_get_fec_param(struct net_device *netdev, 1544 struct ethtool_fecparam *fecparam) 1545 { 1546 struct i40e_netdev_priv *np = netdev_priv(netdev); 1547 struct i40e_aq_get_phy_abilities_resp abilities; 1548 struct i40e_pf *pf = np->vsi->back; 1549 struct i40e_hw *hw = &pf->hw; 1550 int status = 0; 1551 int err = 0; 1552 u8 fec_cfg; 1553 1554 /* Get the current phy config */ 1555 memset(&abilities, 0, sizeof(abilities)); 1556 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, 1557 NULL); 1558 if (status) { 1559 err = -EAGAIN; 1560 goto done; 1561 } 1562 1563 fecparam->fec = 0; 1564 fec_cfg = abilities.fec_cfg_curr_mod_ext_info; 1565 if (fec_cfg & I40E_AQ_SET_FEC_AUTO) 1566 fecparam->fec |= ETHTOOL_FEC_AUTO; 1567 else if (fec_cfg & (I40E_AQ_SET_FEC_REQUEST_RS | 1568 I40E_AQ_SET_FEC_ABILITY_RS)) 1569 fecparam->fec |= ETHTOOL_FEC_RS; 1570 else if (fec_cfg & (I40E_AQ_SET_FEC_REQUEST_KR | 1571 I40E_AQ_SET_FEC_ABILITY_KR)) 1572 fecparam->fec |= ETHTOOL_FEC_BASER; 1573 if (fec_cfg == 0) 1574 fecparam->fec |= ETHTOOL_FEC_OFF; 1575 1576 if (hw->phy.link_info.fec_info & I40E_AQ_CONFIG_FEC_KR_ENA) 1577 fecparam->active_fec = ETHTOOL_FEC_BASER; 1578 else if (hw->phy.link_info.fec_info & I40E_AQ_CONFIG_FEC_RS_ENA) 1579 fecparam->active_fec = ETHTOOL_FEC_RS; 1580 else 1581 fecparam->active_fec = ETHTOOL_FEC_OFF; 1582 done: 1583 return err; 1584 } 1585 1586 static int i40e_set_fec_param(struct net_device *netdev, 1587 struct ethtool_fecparam *fecparam) 1588 { 1589 struct i40e_netdev_priv *np = netdev_priv(netdev); 1590 struct i40e_pf *pf = np->vsi->back; 1591 struct i40e_hw *hw = &pf->hw; 1592 u8 fec_cfg = 0; 1593 1594 if (hw->device_id != I40E_DEV_ID_25G_SFP28 && 1595 hw->device_id != I40E_DEV_ID_25G_B && 1596 hw->device_id != I40E_DEV_ID_KX_X722) 1597 return -EPERM; 1598 1599 if (hw->mac.type == I40E_MAC_X722 && 1600 !test_bit(I40E_HW_CAP_X722_FEC_REQUEST, hw->caps)) { 1601 netdev_err(netdev, "Setting FEC encoding not supported by firmware. Please update the NVM image.\n"); 1602 return -EOPNOTSUPP; 1603 } 1604 1605 switch (fecparam->fec) { 1606 case ETHTOOL_FEC_AUTO: 1607 fec_cfg = I40E_AQ_SET_FEC_AUTO; 1608 break; 1609 case ETHTOOL_FEC_RS: 1610 fec_cfg = (I40E_AQ_SET_FEC_REQUEST_RS | 1611 I40E_AQ_SET_FEC_ABILITY_RS); 1612 break; 1613 case ETHTOOL_FEC_BASER: 1614 fec_cfg = (I40E_AQ_SET_FEC_REQUEST_KR | 1615 I40E_AQ_SET_FEC_ABILITY_KR); 1616 break; 1617 case ETHTOOL_FEC_OFF: 1618 case ETHTOOL_FEC_NONE: 1619 fec_cfg = 0; 1620 break; 1621 default: 1622 dev_warn(&pf->pdev->dev, "Unsupported FEC mode: %d", 1623 fecparam->fec); 1624 return -EINVAL; 1625 } 1626 1627 return i40e_set_fec_cfg(netdev, fec_cfg); 1628 } 1629 1630 static int i40e_nway_reset(struct net_device *netdev) 1631 { 1632 /* restart autonegotiation */ 1633 struct i40e_netdev_priv *np = netdev_priv(netdev); 1634 struct i40e_pf *pf = np->vsi->back; 1635 struct i40e_hw *hw = &pf->hw; 1636 bool link_up = hw->phy.link_info.link_info & I40E_AQ_LINK_UP; 1637 int ret = 0; 1638 1639 ret = i40e_aq_set_link_restart_an(hw, link_up, NULL); 1640 if (ret) { 1641 netdev_info(netdev, "link restart failed, err %pe aq_err %s\n", 1642 ERR_PTR(ret), 1643 i40e_aq_str(hw, hw->aq.asq_last_status)); 1644 return -EIO; 1645 } 1646 1647 return 0; 1648 } 1649 1650 /** 1651 * i40e_get_pauseparam - Get Flow Control status 1652 * @netdev: netdevice structure 1653 * @pause: buffer to return pause parameters 1654 * 1655 * Return tx/rx-pause status 1656 **/ 1657 static void i40e_get_pauseparam(struct net_device *netdev, 1658 struct ethtool_pauseparam *pause) 1659 { 1660 struct i40e_netdev_priv *np = netdev_priv(netdev); 1661 struct i40e_pf *pf = np->vsi->back; 1662 struct i40e_hw *hw = &pf->hw; 1663 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 1664 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 1665 1666 pause->autoneg = 1667 ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? 1668 AUTONEG_ENABLE : AUTONEG_DISABLE); 1669 1670 /* PFC enabled so report LFC as off */ 1671 if (dcbx_cfg->pfc.pfcenable) { 1672 pause->rx_pause = 0; 1673 pause->tx_pause = 0; 1674 return; 1675 } 1676 1677 if (hw->fc.current_mode == I40E_FC_RX_PAUSE) { 1678 pause->rx_pause = 1; 1679 } else if (hw->fc.current_mode == I40E_FC_TX_PAUSE) { 1680 pause->tx_pause = 1; 1681 } else if (hw->fc.current_mode == I40E_FC_FULL) { 1682 pause->rx_pause = 1; 1683 pause->tx_pause = 1; 1684 } 1685 } 1686 1687 /** 1688 * i40e_set_pauseparam - Set Flow Control parameter 1689 * @netdev: network interface device structure 1690 * @pause: return tx/rx flow control status 1691 **/ 1692 static int i40e_set_pauseparam(struct net_device *netdev, 1693 struct ethtool_pauseparam *pause) 1694 { 1695 struct i40e_netdev_priv *np = netdev_priv(netdev); 1696 struct i40e_pf *pf = np->vsi->back; 1697 struct i40e_vsi *vsi = np->vsi; 1698 struct i40e_hw *hw = &pf->hw; 1699 struct i40e_link_status *hw_link_info = &hw->phy.link_info; 1700 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; 1701 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; 1702 u8 aq_failures; 1703 int err = 0; 1704 int status; 1705 u32 is_an; 1706 1707 /* Changing the port's flow control is not supported if this isn't the 1708 * port's controlling PF 1709 */ 1710 if (hw->partition_id != 1) { 1711 i40e_partition_setting_complaint(pf); 1712 return -EOPNOTSUPP; 1713 } 1714 1715 if (vsi->type != I40E_VSI_MAIN) 1716 return -EOPNOTSUPP; 1717 1718 is_an = hw_link_info->an_info & I40E_AQ_AN_COMPLETED; 1719 if (pause->autoneg != is_an) { 1720 netdev_info(netdev, "To change autoneg please use: ethtool -s <dev> autoneg <on|off>\n"); 1721 return -EOPNOTSUPP; 1722 } 1723 1724 /* If we have link and don't have autoneg */ 1725 if (!test_bit(__I40E_DOWN, pf->state) && !is_an) { 1726 /* Send message that it might not necessarily work*/ 1727 netdev_info(netdev, "Autoneg did not complete so changing settings may not result in an actual change.\n"); 1728 } 1729 1730 if (dcbx_cfg->pfc.pfcenable) { 1731 netdev_info(netdev, 1732 "Priority flow control enabled. Cannot set link flow control.\n"); 1733 return -EOPNOTSUPP; 1734 } 1735 1736 if (pause->rx_pause && pause->tx_pause) 1737 hw->fc.requested_mode = I40E_FC_FULL; 1738 else if (pause->rx_pause && !pause->tx_pause) 1739 hw->fc.requested_mode = I40E_FC_RX_PAUSE; 1740 else if (!pause->rx_pause && pause->tx_pause) 1741 hw->fc.requested_mode = I40E_FC_TX_PAUSE; 1742 else if (!pause->rx_pause && !pause->tx_pause) 1743 hw->fc.requested_mode = I40E_FC_NONE; 1744 else 1745 return -EINVAL; 1746 1747 /* Tell the OS link is going down, the link will go back up when fw 1748 * says it is ready asynchronously 1749 */ 1750 i40e_print_link_message(vsi, false); 1751 netif_carrier_off(netdev); 1752 netif_tx_stop_all_queues(netdev); 1753 1754 /* Set the fc mode and only restart an if link is up*/ 1755 status = i40e_set_fc(hw, &aq_failures, link_up); 1756 1757 if (aq_failures & I40E_SET_FC_AQ_FAIL_GET) { 1758 netdev_info(netdev, "Set fc failed on the get_phy_capabilities call with err %pe aq_err %s\n", 1759 ERR_PTR(status), 1760 i40e_aq_str(hw, hw->aq.asq_last_status)); 1761 err = -EAGAIN; 1762 } 1763 if (aq_failures & I40E_SET_FC_AQ_FAIL_SET) { 1764 netdev_info(netdev, "Set fc failed on the set_phy_config call with err %pe aq_err %s\n", 1765 ERR_PTR(status), 1766 i40e_aq_str(hw, hw->aq.asq_last_status)); 1767 err = -EAGAIN; 1768 } 1769 if (aq_failures & I40E_SET_FC_AQ_FAIL_UPDATE) { 1770 netdev_info(netdev, "Set fc failed on the get_link_info call with err %pe aq_err %s\n", 1771 ERR_PTR(status), 1772 i40e_aq_str(hw, hw->aq.asq_last_status)); 1773 err = -EAGAIN; 1774 } 1775 1776 if (!test_bit(__I40E_DOWN, pf->state) && is_an) { 1777 /* Give it a little more time to try to come back */ 1778 msleep(75); 1779 if (!test_bit(__I40E_DOWN, pf->state)) 1780 return i40e_nway_reset(netdev); 1781 } 1782 1783 return err; 1784 } 1785 1786 static u32 i40e_get_msglevel(struct net_device *netdev) 1787 { 1788 struct i40e_netdev_priv *np = netdev_priv(netdev); 1789 struct i40e_pf *pf = np->vsi->back; 1790 u32 debug_mask = pf->hw.debug_mask; 1791 1792 if (debug_mask) 1793 netdev_info(netdev, "i40e debug_mask: 0x%08X\n", debug_mask); 1794 1795 return pf->msg_enable; 1796 } 1797 1798 static void i40e_set_msglevel(struct net_device *netdev, u32 data) 1799 { 1800 struct i40e_netdev_priv *np = netdev_priv(netdev); 1801 struct i40e_pf *pf = np->vsi->back; 1802 1803 if (I40E_DEBUG_USER & data) 1804 pf->hw.debug_mask = data; 1805 else 1806 pf->msg_enable = data; 1807 } 1808 1809 static int i40e_get_regs_len(struct net_device *netdev) 1810 { 1811 int reg_count = 0; 1812 int i; 1813 1814 for (i = 0; i40e_reg_list[i].offset != 0; i++) 1815 reg_count += i40e_reg_list[i].elements; 1816 1817 return reg_count * sizeof(u32); 1818 } 1819 1820 static void i40e_get_regs(struct net_device *netdev, struct ethtool_regs *regs, 1821 void *p) 1822 { 1823 struct i40e_netdev_priv *np = netdev_priv(netdev); 1824 struct i40e_pf *pf = np->vsi->back; 1825 struct i40e_hw *hw = &pf->hw; 1826 u32 *reg_buf = p; 1827 unsigned int i, j, ri; 1828 u32 reg; 1829 1830 /* Tell ethtool which driver-version-specific regs output we have. 1831 * 1832 * At some point, if we have ethtool doing special formatting of 1833 * this data, it will rely on this version number to know how to 1834 * interpret things. Hence, this needs to be updated if/when the 1835 * diags register table is changed. 1836 */ 1837 regs->version = 1; 1838 1839 /* loop through the diags reg table for what to print */ 1840 ri = 0; 1841 for (i = 0; i40e_reg_list[i].offset != 0; i++) { 1842 for (j = 0; j < i40e_reg_list[i].elements; j++) { 1843 reg = i40e_reg_list[i].offset 1844 + (j * i40e_reg_list[i].stride); 1845 reg_buf[ri++] = rd32(hw, reg); 1846 } 1847 } 1848 1849 } 1850 1851 static int i40e_get_eeprom(struct net_device *netdev, 1852 struct ethtool_eeprom *eeprom, u8 *bytes) 1853 { 1854 struct i40e_netdev_priv *np = netdev_priv(netdev); 1855 struct i40e_hw *hw = &np->vsi->back->hw; 1856 struct i40e_pf *pf = np->vsi->back; 1857 int ret_val = 0, len, offset; 1858 u8 *eeprom_buff; 1859 u16 i, sectors; 1860 bool last; 1861 u32 magic; 1862 1863 #define I40E_NVM_SECTOR_SIZE 4096 1864 if (eeprom->len == 0) 1865 return -EINVAL; 1866 1867 /* check for NVMUpdate access method */ 1868 magic = hw->vendor_id | (hw->device_id << 16); 1869 if (eeprom->magic && eeprom->magic != magic) { 1870 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1871 int errno = 0; 1872 1873 /* make sure it is the right magic for NVMUpdate */ 1874 if ((eeprom->magic >> 16) != hw->device_id) 1875 errno = -EINVAL; 1876 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 1877 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 1878 errno = -EBUSY; 1879 else 1880 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1881 1882 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1883 dev_info(&pf->pdev->dev, 1884 "NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1885 ret_val, hw->aq.asq_last_status, errno, 1886 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1887 cmd->offset, cmd->data_size); 1888 1889 return errno; 1890 } 1891 1892 /* normal ethtool get_eeprom support */ 1893 eeprom->magic = hw->vendor_id | (hw->device_id << 16); 1894 1895 eeprom_buff = kzalloc(eeprom->len, GFP_KERNEL); 1896 if (!eeprom_buff) 1897 return -ENOMEM; 1898 1899 ret_val = i40e_acquire_nvm(hw, I40E_RESOURCE_READ); 1900 if (ret_val) { 1901 dev_info(&pf->pdev->dev, 1902 "Failed Acquiring NVM resource for read err=%d status=0x%x\n", 1903 ret_val, hw->aq.asq_last_status); 1904 goto free_buff; 1905 } 1906 1907 sectors = eeprom->len / I40E_NVM_SECTOR_SIZE; 1908 sectors += (eeprom->len % I40E_NVM_SECTOR_SIZE) ? 1 : 0; 1909 len = I40E_NVM_SECTOR_SIZE; 1910 last = false; 1911 for (i = 0; i < sectors; i++) { 1912 if (i == (sectors - 1)) { 1913 len = eeprom->len - (I40E_NVM_SECTOR_SIZE * i); 1914 last = true; 1915 } 1916 offset = eeprom->offset + (I40E_NVM_SECTOR_SIZE * i); 1917 ret_val = i40e_aq_read_nvm(hw, 0x0, offset, len, 1918 (u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i), 1919 last, NULL); 1920 if (ret_val && hw->aq.asq_last_status == I40E_AQ_RC_EPERM) { 1921 dev_info(&pf->pdev->dev, 1922 "read NVM failed, invalid offset 0x%x\n", 1923 offset); 1924 break; 1925 } else if (ret_val && 1926 hw->aq.asq_last_status == I40E_AQ_RC_EACCES) { 1927 dev_info(&pf->pdev->dev, 1928 "read NVM failed, access, offset 0x%x\n", 1929 offset); 1930 break; 1931 } else if (ret_val) { 1932 dev_info(&pf->pdev->dev, 1933 "read NVM failed offset %d err=%d status=0x%x\n", 1934 offset, ret_val, hw->aq.asq_last_status); 1935 break; 1936 } 1937 } 1938 1939 i40e_release_nvm(hw); 1940 memcpy(bytes, (u8 *)eeprom_buff, eeprom->len); 1941 free_buff: 1942 kfree(eeprom_buff); 1943 return ret_val; 1944 } 1945 1946 static int i40e_get_eeprom_len(struct net_device *netdev) 1947 { 1948 struct i40e_netdev_priv *np = netdev_priv(netdev); 1949 struct i40e_hw *hw = &np->vsi->back->hw; 1950 u32 val; 1951 1952 #define X722_EEPROM_SCOPE_LIMIT 0x5B9FFF 1953 if (hw->mac.type == I40E_MAC_X722) { 1954 val = X722_EEPROM_SCOPE_LIMIT + 1; 1955 return val; 1956 } 1957 val = FIELD_GET(I40E_GLPCI_LBARCTRL_FL_SIZE_MASK, 1958 rd32(hw, I40E_GLPCI_LBARCTRL)); 1959 /* register returns value in power of 2, 64Kbyte chunks. */ 1960 val = (64 * 1024) * BIT(val); 1961 return val; 1962 } 1963 1964 static int i40e_set_eeprom(struct net_device *netdev, 1965 struct ethtool_eeprom *eeprom, u8 *bytes) 1966 { 1967 struct i40e_netdev_priv *np = netdev_priv(netdev); 1968 struct i40e_hw *hw = &np->vsi->back->hw; 1969 struct i40e_pf *pf = np->vsi->back; 1970 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; 1971 int ret_val = 0; 1972 int errno = 0; 1973 u32 magic; 1974 1975 /* normal ethtool set_eeprom is not supported */ 1976 magic = hw->vendor_id | (hw->device_id << 16); 1977 if (eeprom->magic == magic) 1978 errno = -EOPNOTSUPP; 1979 /* check for NVMUpdate access method */ 1980 else if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id) 1981 errno = -EINVAL; 1982 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 1983 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 1984 errno = -EBUSY; 1985 else 1986 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); 1987 1988 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) 1989 dev_info(&pf->pdev->dev, 1990 "NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", 1991 ret_val, hw->aq.asq_last_status, errno, 1992 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), 1993 cmd->offset, cmd->data_size); 1994 1995 return errno; 1996 } 1997 1998 static void i40e_get_drvinfo(struct net_device *netdev, 1999 struct ethtool_drvinfo *drvinfo) 2000 { 2001 struct i40e_netdev_priv *np = netdev_priv(netdev); 2002 struct i40e_vsi *vsi = np->vsi; 2003 struct i40e_pf *pf = vsi->back; 2004 2005 strscpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver)); 2006 i40e_nvm_version_str(&pf->hw, drvinfo->fw_version, 2007 sizeof(drvinfo->fw_version)); 2008 strscpy(drvinfo->bus_info, pci_name(pf->pdev), 2009 sizeof(drvinfo->bus_info)); 2010 drvinfo->n_priv_flags = I40E_PRIV_FLAGS_STR_LEN; 2011 if (pf->hw.pf_id == 0) 2012 drvinfo->n_priv_flags += I40E_GL_PRIV_FLAGS_STR_LEN; 2013 } 2014 2015 static u32 i40e_get_max_num_descriptors(struct i40e_pf *pf) 2016 { 2017 struct i40e_hw *hw = &pf->hw; 2018 2019 switch (hw->mac.type) { 2020 case I40E_MAC_XL710: 2021 return I40E_MAX_NUM_DESCRIPTORS_XL710; 2022 default: 2023 return I40E_MAX_NUM_DESCRIPTORS; 2024 } 2025 } 2026 2027 static void i40e_get_ringparam(struct net_device *netdev, 2028 struct ethtool_ringparam *ring, 2029 struct kernel_ethtool_ringparam *kernel_ring, 2030 struct netlink_ext_ack *extack) 2031 { 2032 struct i40e_netdev_priv *np = netdev_priv(netdev); 2033 struct i40e_pf *pf = np->vsi->back; 2034 struct i40e_vsi *vsi = i40e_pf_get_main_vsi(pf); 2035 2036 ring->rx_max_pending = i40e_get_max_num_descriptors(pf); 2037 ring->tx_max_pending = i40e_get_max_num_descriptors(pf); 2038 ring->rx_mini_max_pending = 0; 2039 ring->rx_jumbo_max_pending = 0; 2040 ring->rx_pending = vsi->rx_rings[0]->count; 2041 ring->tx_pending = vsi->tx_rings[0]->count; 2042 ring->rx_mini_pending = 0; 2043 ring->rx_jumbo_pending = 0; 2044 } 2045 2046 static bool i40e_active_tx_ring_index(struct i40e_vsi *vsi, u16 index) 2047 { 2048 if (i40e_enabled_xdp_vsi(vsi)) { 2049 return index < vsi->num_queue_pairs || 2050 (index >= vsi->alloc_queue_pairs && 2051 index < vsi->alloc_queue_pairs + vsi->num_queue_pairs); 2052 } 2053 2054 return index < vsi->num_queue_pairs; 2055 } 2056 2057 static int i40e_set_ringparam(struct net_device *netdev, 2058 struct ethtool_ringparam *ring, 2059 struct kernel_ethtool_ringparam *kernel_ring, 2060 struct netlink_ext_ack *extack) 2061 { 2062 u32 new_rx_count, new_tx_count, max_num_descriptors; 2063 struct i40e_ring *tx_rings = NULL, *rx_rings = NULL; 2064 struct i40e_netdev_priv *np = netdev_priv(netdev); 2065 struct i40e_hw *hw = &np->vsi->back->hw; 2066 struct i40e_vsi *vsi = np->vsi; 2067 struct i40e_pf *pf = vsi->back; 2068 u16 tx_alloc_queue_pairs; 2069 int timeout = 50; 2070 int i, err = 0; 2071 2072 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) 2073 return -EINVAL; 2074 2075 max_num_descriptors = i40e_get_max_num_descriptors(pf); 2076 if (ring->tx_pending > max_num_descriptors || 2077 ring->tx_pending < I40E_MIN_NUM_DESCRIPTORS || 2078 ring->rx_pending > max_num_descriptors || 2079 ring->rx_pending < I40E_MIN_NUM_DESCRIPTORS) { 2080 netdev_info(netdev, 2081 "Descriptors requested (Tx: %d / Rx: %d) out of range [%d-%d]\n", 2082 ring->tx_pending, ring->rx_pending, 2083 I40E_MIN_NUM_DESCRIPTORS, max_num_descriptors); 2084 return -EINVAL; 2085 } 2086 2087 new_tx_count = ALIGN(ring->tx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 2088 new_rx_count = ALIGN(ring->rx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); 2089 2090 /* if nothing to do return success */ 2091 if ((new_tx_count == vsi->tx_rings[0]->count) && 2092 (new_rx_count == vsi->rx_rings[0]->count)) 2093 return 0; 2094 2095 /* If there is a AF_XDP page pool attached to any of Rx rings, 2096 * disallow changing the number of descriptors -- regardless 2097 * if the netdev is running or not. 2098 */ 2099 if (i40e_xsk_any_rx_ring_enabled(vsi)) 2100 return -EBUSY; 2101 2102 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) { 2103 timeout--; 2104 if (!timeout) 2105 return -EBUSY; 2106 usleep_range(1000, 2000); 2107 } 2108 2109 if (!netif_running(vsi->netdev)) { 2110 /* simple case - set for the next time the netdev is started */ 2111 for (i = 0; i < vsi->num_queue_pairs; i++) { 2112 vsi->tx_rings[i]->count = new_tx_count; 2113 vsi->rx_rings[i]->count = new_rx_count; 2114 if (i40e_enabled_xdp_vsi(vsi)) 2115 vsi->xdp_rings[i]->count = new_tx_count; 2116 } 2117 vsi->num_tx_desc = new_tx_count; 2118 vsi->num_rx_desc = new_rx_count; 2119 goto done; 2120 } 2121 2122 /* We can't just free everything and then setup again, 2123 * because the ISRs in MSI-X mode get passed pointers 2124 * to the Tx and Rx ring structs. 2125 */ 2126 2127 /* alloc updated Tx and XDP Tx resources */ 2128 tx_alloc_queue_pairs = vsi->alloc_queue_pairs * 2129 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1); 2130 if (new_tx_count != vsi->tx_rings[0]->count) { 2131 netdev_info(netdev, 2132 "Changing Tx descriptor count from %d to %d.\n", 2133 vsi->tx_rings[0]->count, new_tx_count); 2134 tx_rings = kcalloc(tx_alloc_queue_pairs, 2135 sizeof(struct i40e_ring), GFP_KERNEL); 2136 if (!tx_rings) { 2137 err = -ENOMEM; 2138 goto done; 2139 } 2140 2141 for (i = 0; i < tx_alloc_queue_pairs; i++) { 2142 if (!i40e_active_tx_ring_index(vsi, i)) 2143 continue; 2144 2145 tx_rings[i] = *vsi->tx_rings[i]; 2146 tx_rings[i].count = new_tx_count; 2147 /* the desc and bi pointers will be reallocated in the 2148 * setup call 2149 */ 2150 tx_rings[i].desc = NULL; 2151 tx_rings[i].rx_bi = NULL; 2152 err = i40e_setup_tx_descriptors(&tx_rings[i]); 2153 if (err) { 2154 while (i) { 2155 i--; 2156 if (!i40e_active_tx_ring_index(vsi, i)) 2157 continue; 2158 i40e_free_tx_resources(&tx_rings[i]); 2159 } 2160 kfree(tx_rings); 2161 tx_rings = NULL; 2162 2163 goto done; 2164 } 2165 } 2166 } 2167 2168 /* alloc updated Rx resources */ 2169 if (new_rx_count != vsi->rx_rings[0]->count) { 2170 netdev_info(netdev, 2171 "Changing Rx descriptor count from %d to %d\n", 2172 vsi->rx_rings[0]->count, new_rx_count); 2173 rx_rings = kcalloc(vsi->alloc_queue_pairs, 2174 sizeof(struct i40e_ring), GFP_KERNEL); 2175 if (!rx_rings) { 2176 err = -ENOMEM; 2177 goto free_tx; 2178 } 2179 2180 for (i = 0; i < vsi->num_queue_pairs; i++) { 2181 u16 unused; 2182 2183 /* clone ring and setup updated count */ 2184 rx_rings[i] = *vsi->rx_rings[i]; 2185 rx_rings[i].count = new_rx_count; 2186 /* the desc and bi pointers will be reallocated in the 2187 * setup call 2188 */ 2189 rx_rings[i].desc = NULL; 2190 rx_rings[i].rx_bi = NULL; 2191 /* Clear cloned XDP RX-queue info before setup call */ 2192 memset(&rx_rings[i].xdp_rxq, 0, sizeof(rx_rings[i].xdp_rxq)); 2193 /* this is to allow wr32 to have something to write to 2194 * during early allocation of Rx buffers 2195 */ 2196 rx_rings[i].tail = hw->hw_addr + I40E_PRTGEN_STATUS; 2197 err = i40e_setup_rx_descriptors(&rx_rings[i]); 2198 if (err) 2199 goto rx_unwind; 2200 2201 /* now allocate the Rx buffers to make sure the OS 2202 * has enough memory, any failure here means abort 2203 */ 2204 unused = I40E_DESC_UNUSED(&rx_rings[i]); 2205 err = i40e_alloc_rx_buffers(&rx_rings[i], unused); 2206 rx_unwind: 2207 if (err) { 2208 do { 2209 i40e_free_rx_resources(&rx_rings[i]); 2210 } while (i--); 2211 kfree(rx_rings); 2212 rx_rings = NULL; 2213 2214 goto free_tx; 2215 } 2216 } 2217 } 2218 2219 /* Bring interface down, copy in the new ring info, 2220 * then restore the interface 2221 */ 2222 i40e_down(vsi); 2223 2224 if (tx_rings) { 2225 for (i = 0; i < tx_alloc_queue_pairs; i++) { 2226 if (i40e_active_tx_ring_index(vsi, i)) { 2227 i40e_free_tx_resources(vsi->tx_rings[i]); 2228 *vsi->tx_rings[i] = tx_rings[i]; 2229 } 2230 } 2231 kfree(tx_rings); 2232 tx_rings = NULL; 2233 } 2234 2235 if (rx_rings) { 2236 for (i = 0; i < vsi->num_queue_pairs; i++) { 2237 i40e_free_rx_resources(vsi->rx_rings[i]); 2238 /* get the real tail offset */ 2239 rx_rings[i].tail = vsi->rx_rings[i]->tail; 2240 /* this is to fake out the allocation routine 2241 * into thinking it has to realloc everything 2242 * but the recycling logic will let us re-use 2243 * the buffers allocated above 2244 */ 2245 rx_rings[i].next_to_use = 0; 2246 rx_rings[i].next_to_clean = 0; 2247 rx_rings[i].next_to_alloc = 0; 2248 /* do a struct copy */ 2249 *vsi->rx_rings[i] = rx_rings[i]; 2250 } 2251 kfree(rx_rings); 2252 rx_rings = NULL; 2253 } 2254 2255 vsi->num_tx_desc = new_tx_count; 2256 vsi->num_rx_desc = new_rx_count; 2257 i40e_up(vsi); 2258 2259 free_tx: 2260 /* error cleanup if the Rx allocations failed after getting Tx */ 2261 if (tx_rings) { 2262 for (i = 0; i < tx_alloc_queue_pairs; i++) { 2263 if (i40e_active_tx_ring_index(vsi, i)) 2264 i40e_free_tx_resources(vsi->tx_rings[i]); 2265 } 2266 kfree(tx_rings); 2267 tx_rings = NULL; 2268 } 2269 2270 done: 2271 clear_bit(__I40E_CONFIG_BUSY, pf->state); 2272 2273 return err; 2274 } 2275 2276 /** 2277 * i40e_get_stats_count - return the stats count for a device 2278 * @netdev: the netdev to return the count for 2279 * 2280 * Returns the total number of statistics for this netdev. Note that even 2281 * though this is a function, it is required that the count for a specific 2282 * netdev must never change. Basing the count on static values such as the 2283 * maximum number of queues or the device type is ok. However, the API for 2284 * obtaining stats is *not* safe against changes based on non-static 2285 * values such as the *current* number of queues, or runtime flags. 2286 * 2287 * If a statistic is not always enabled, return it as part of the count 2288 * anyways, always return its string, and report its value as zero. 2289 **/ 2290 static int i40e_get_stats_count(struct net_device *netdev) 2291 { 2292 struct i40e_netdev_priv *np = netdev_priv(netdev); 2293 struct i40e_vsi *vsi = np->vsi; 2294 struct i40e_pf *pf = vsi->back; 2295 int stats_len; 2296 2297 if (vsi->type == I40E_VSI_MAIN && pf->hw.partition_id == 1) 2298 stats_len = I40E_PF_STATS_LEN; 2299 else 2300 stats_len = I40E_VSI_STATS_LEN; 2301 2302 /* The number of stats reported for a given net_device must remain 2303 * constant throughout the life of that device. 2304 * 2305 * This is because the API for obtaining the size, strings, and stats 2306 * is spread out over three separate ethtool ioctls. There is no safe 2307 * way to lock the number of stats across these calls, so we must 2308 * assume that they will never change. 2309 * 2310 * Due to this, we report the maximum number of queues, even if not 2311 * every queue is currently configured. Since we always allocate 2312 * queues in pairs, we'll just use netdev->num_tx_queues * 2. This 2313 * works because the num_tx_queues is set at device creation and never 2314 * changes. 2315 */ 2316 stats_len += I40E_QUEUE_STATS_LEN * 2 * netdev->num_tx_queues; 2317 2318 return stats_len; 2319 } 2320 2321 static int i40e_get_sset_count(struct net_device *netdev, int sset) 2322 { 2323 struct i40e_netdev_priv *np = netdev_priv(netdev); 2324 struct i40e_vsi *vsi = np->vsi; 2325 struct i40e_pf *pf = vsi->back; 2326 2327 switch (sset) { 2328 case ETH_SS_TEST: 2329 return I40E_TEST_LEN; 2330 case ETH_SS_STATS: 2331 return i40e_get_stats_count(netdev); 2332 case ETH_SS_PRIV_FLAGS: 2333 return I40E_PRIV_FLAGS_STR_LEN + 2334 (pf->hw.pf_id == 0 ? I40E_GL_PRIV_FLAGS_STR_LEN : 0); 2335 default: 2336 return -EOPNOTSUPP; 2337 } 2338 } 2339 2340 /** 2341 * i40e_get_veb_tc_stats - copy VEB TC statistics to formatted structure 2342 * @tc: the TC statistics in VEB structure (veb->tc_stats) 2343 * @i: the index of traffic class in (veb->tc_stats) structure to copy 2344 * 2345 * Copy VEB TC statistics from structure of arrays (veb->tc_stats) to 2346 * one dimensional structure i40e_cp_veb_tc_stats. 2347 * Produce formatted i40e_cp_veb_tc_stats structure of the VEB TC 2348 * statistics for the given TC. 2349 **/ 2350 static struct i40e_cp_veb_tc_stats 2351 i40e_get_veb_tc_stats(struct i40e_veb_tc_stats *tc, unsigned int i) 2352 { 2353 struct i40e_cp_veb_tc_stats veb_tc = { 2354 .tc_rx_packets = tc->tc_rx_packets[i], 2355 .tc_rx_bytes = tc->tc_rx_bytes[i], 2356 .tc_tx_packets = tc->tc_tx_packets[i], 2357 .tc_tx_bytes = tc->tc_tx_bytes[i], 2358 }; 2359 2360 return veb_tc; 2361 } 2362 2363 /** 2364 * i40e_get_pfc_stats - copy HW PFC statistics to formatted structure 2365 * @pf: the PF device structure 2366 * @i: the priority value to copy 2367 * 2368 * The PFC stats are found as arrays in pf->stats, which is not easy to pass 2369 * into i40e_add_ethtool_stats. Produce a formatted i40e_pfc_stats structure 2370 * of the PFC stats for the given priority. 2371 **/ 2372 static inline struct i40e_pfc_stats 2373 i40e_get_pfc_stats(struct i40e_pf *pf, unsigned int i) 2374 { 2375 #define I40E_GET_PFC_STAT(stat, priority) \ 2376 .stat = pf->stats.stat[priority] 2377 2378 struct i40e_pfc_stats pfc = { 2379 I40E_GET_PFC_STAT(priority_xon_rx, i), 2380 I40E_GET_PFC_STAT(priority_xoff_rx, i), 2381 I40E_GET_PFC_STAT(priority_xon_tx, i), 2382 I40E_GET_PFC_STAT(priority_xoff_tx, i), 2383 I40E_GET_PFC_STAT(priority_xon_2_xoff, i), 2384 }; 2385 return pfc; 2386 } 2387 2388 /** 2389 * i40e_get_ethtool_stats - copy stat values into supplied buffer 2390 * @netdev: the netdev to collect stats for 2391 * @stats: ethtool stats command structure 2392 * @data: ethtool supplied buffer 2393 * 2394 * Copy the stats values for this netdev into the buffer. Expects data to be 2395 * pre-allocated to the size returned by i40e_get_stats_count.. Note that all 2396 * statistics must be copied in a static order, and the count must not change 2397 * for a given netdev. See i40e_get_stats_count for more details. 2398 * 2399 * If a statistic is not currently valid (such as a disabled queue), this 2400 * function reports its value as zero. 2401 **/ 2402 static void i40e_get_ethtool_stats(struct net_device *netdev, 2403 struct ethtool_stats *stats, u64 *data) 2404 { 2405 struct i40e_netdev_priv *np = netdev_priv(netdev); 2406 struct i40e_vsi *vsi = np->vsi; 2407 struct i40e_pf *pf = vsi->back; 2408 struct i40e_veb *veb = NULL; 2409 unsigned int i; 2410 bool veb_stats; 2411 u64 *p = data; 2412 2413 i40e_update_stats(vsi); 2414 2415 i40e_add_ethtool_stats(&data, i40e_get_vsi_stats_struct(vsi), 2416 i40e_gstrings_net_stats); 2417 2418 i40e_add_ethtool_stats(&data, vsi, i40e_gstrings_misc_stats); 2419 2420 rcu_read_lock(); 2421 for (i = 0; i < netdev->num_tx_queues; i++) { 2422 i40e_add_queue_stats(&data, READ_ONCE(vsi->tx_rings[i])); 2423 i40e_add_queue_stats(&data, READ_ONCE(vsi->rx_rings[i])); 2424 } 2425 rcu_read_unlock(); 2426 2427 if (vsi->type != I40E_VSI_MAIN || pf->hw.partition_id != 1) 2428 goto check_data_pointer; 2429 2430 veb = i40e_pf_get_main_veb(pf); 2431 veb_stats = veb && test_bit(I40E_FLAG_VEB_STATS_ENA, pf->flags); 2432 2433 if (veb_stats) 2434 i40e_update_veb_stats(veb); 2435 2436 /* If veb stats aren't enabled, pass NULL instead of the veb so that 2437 * we initialize stats to zero and update the data pointer 2438 * intelligently 2439 */ 2440 i40e_add_ethtool_stats(&data, veb_stats ? veb : NULL, 2441 i40e_gstrings_veb_stats); 2442 2443 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 2444 if (veb_stats) { 2445 struct i40e_cp_veb_tc_stats veb_tc = 2446 i40e_get_veb_tc_stats(&veb->tc_stats, i); 2447 2448 i40e_add_ethtool_stats(&data, &veb_tc, 2449 i40e_gstrings_veb_tc_stats); 2450 } else { 2451 i40e_add_ethtool_stats(&data, NULL, 2452 i40e_gstrings_veb_tc_stats); 2453 } 2454 2455 i40e_add_ethtool_stats(&data, pf, i40e_gstrings_stats); 2456 2457 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { 2458 struct i40e_pfc_stats pfc = i40e_get_pfc_stats(pf, i); 2459 2460 i40e_add_ethtool_stats(&data, &pfc, i40e_gstrings_pfc_stats); 2461 } 2462 2463 check_data_pointer: 2464 WARN_ONCE(data - p != i40e_get_stats_count(netdev), 2465 "ethtool stats count mismatch!"); 2466 } 2467 2468 /** 2469 * i40e_get_stat_strings - copy stat strings into supplied buffer 2470 * @netdev: the netdev to collect strings for 2471 * @data: supplied buffer to copy strings into 2472 * 2473 * Copy the strings related to stats for this netdev. Expects data to be 2474 * pre-allocated with the size reported by i40e_get_stats_count. Note that the 2475 * strings must be copied in a static order and the total count must not 2476 * change for a given netdev. See i40e_get_stats_count for more details. 2477 **/ 2478 static void i40e_get_stat_strings(struct net_device *netdev, u8 *data) 2479 { 2480 struct i40e_netdev_priv *np = netdev_priv(netdev); 2481 struct i40e_vsi *vsi = np->vsi; 2482 struct i40e_pf *pf = vsi->back; 2483 unsigned int i; 2484 u8 *p = data; 2485 2486 i40e_add_stat_strings(&data, i40e_gstrings_net_stats); 2487 2488 i40e_add_stat_strings(&data, i40e_gstrings_misc_stats); 2489 2490 for (i = 0; i < netdev->num_tx_queues; i++) { 2491 i40e_add_stat_strings(&data, i40e_gstrings_queue_stats, 2492 "tx", i); 2493 i40e_add_stat_strings(&data, i40e_gstrings_queue_stats, 2494 "rx", i); 2495 } 2496 2497 if (vsi->type != I40E_VSI_MAIN || pf->hw.partition_id != 1) 2498 goto check_data_pointer; 2499 2500 i40e_add_stat_strings(&data, i40e_gstrings_veb_stats); 2501 2502 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) 2503 i40e_add_stat_strings(&data, i40e_gstrings_veb_tc_stats, i); 2504 2505 i40e_add_stat_strings(&data, i40e_gstrings_stats); 2506 2507 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) 2508 i40e_add_stat_strings(&data, i40e_gstrings_pfc_stats, i); 2509 2510 check_data_pointer: 2511 WARN_ONCE(data - p != i40e_get_stats_count(netdev) * ETH_GSTRING_LEN, 2512 "stat strings count mismatch!"); 2513 } 2514 2515 static void i40e_get_priv_flag_strings(struct net_device *netdev, u8 *data) 2516 { 2517 struct i40e_netdev_priv *np = netdev_priv(netdev); 2518 struct i40e_vsi *vsi = np->vsi; 2519 struct i40e_pf *pf = vsi->back; 2520 unsigned int i; 2521 u8 *p = data; 2522 2523 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) 2524 ethtool_puts(&p, i40e_gstrings_priv_flags[i].flag_string); 2525 if (pf->hw.pf_id != 0) 2526 return; 2527 for (i = 0; i < I40E_GL_PRIV_FLAGS_STR_LEN; i++) 2528 ethtool_puts(&p, i40e_gl_gstrings_priv_flags[i].flag_string); 2529 } 2530 2531 static void i40e_get_strings(struct net_device *netdev, u32 stringset, 2532 u8 *data) 2533 { 2534 switch (stringset) { 2535 case ETH_SS_TEST: 2536 memcpy(data, i40e_gstrings_test, 2537 I40E_TEST_LEN * ETH_GSTRING_LEN); 2538 break; 2539 case ETH_SS_STATS: 2540 i40e_get_stat_strings(netdev, data); 2541 break; 2542 case ETH_SS_PRIV_FLAGS: 2543 i40e_get_priv_flag_strings(netdev, data); 2544 break; 2545 default: 2546 break; 2547 } 2548 } 2549 2550 static int i40e_get_ts_info(struct net_device *dev, 2551 struct kernel_ethtool_ts_info *info) 2552 { 2553 struct i40e_pf *pf = i40e_netdev_to_pf(dev); 2554 2555 /* only report HW timestamping if PTP is enabled */ 2556 if (!test_bit(I40E_FLAG_PTP_ENA, pf->flags)) 2557 return ethtool_op_get_ts_info(dev, info); 2558 2559 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 2560 SOF_TIMESTAMPING_TX_HARDWARE | 2561 SOF_TIMESTAMPING_RX_HARDWARE | 2562 SOF_TIMESTAMPING_RAW_HARDWARE; 2563 2564 if (pf->ptp_clock) 2565 info->phc_index = ptp_clock_index(pf->ptp_clock); 2566 2567 info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON); 2568 2569 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) | 2570 BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) | 2571 BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) | 2572 BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ); 2573 2574 if (test_bit(I40E_HW_CAP_PTP_L4, pf->hw.caps)) 2575 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | 2576 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | 2577 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) | 2578 BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) | 2579 BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) | 2580 BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) | 2581 BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) | 2582 BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ); 2583 2584 return 0; 2585 } 2586 2587 static u64 i40e_link_test(struct net_device *netdev, u64 *data) 2588 { 2589 struct i40e_netdev_priv *np = netdev_priv(netdev); 2590 struct i40e_pf *pf = np->vsi->back; 2591 bool link_up = false; 2592 int status; 2593 2594 netif_info(pf, hw, netdev, "link test\n"); 2595 status = i40e_get_link_status(&pf->hw, &link_up); 2596 if (status) { 2597 netif_err(pf, drv, netdev, "link query timed out, please retry test\n"); 2598 *data = 1; 2599 return *data; 2600 } 2601 2602 if (link_up) 2603 *data = 0; 2604 else 2605 *data = 1; 2606 2607 return *data; 2608 } 2609 2610 static u64 i40e_reg_test(struct net_device *netdev, u64 *data) 2611 { 2612 struct i40e_netdev_priv *np = netdev_priv(netdev); 2613 struct i40e_pf *pf = np->vsi->back; 2614 2615 netif_info(pf, hw, netdev, "register test\n"); 2616 *data = i40e_diag_reg_test(&pf->hw); 2617 2618 return *data; 2619 } 2620 2621 static u64 i40e_eeprom_test(struct net_device *netdev, u64 *data) 2622 { 2623 struct i40e_netdev_priv *np = netdev_priv(netdev); 2624 struct i40e_pf *pf = np->vsi->back; 2625 2626 netif_info(pf, hw, netdev, "eeprom test\n"); 2627 *data = i40e_diag_eeprom_test(&pf->hw); 2628 2629 /* forcebly clear the NVM Update state machine */ 2630 pf->hw.nvmupd_state = I40E_NVMUPD_STATE_INIT; 2631 2632 return *data; 2633 } 2634 2635 static u64 i40e_intr_test(struct net_device *netdev, u64 *data) 2636 { 2637 struct i40e_netdev_priv *np = netdev_priv(netdev); 2638 struct i40e_pf *pf = np->vsi->back; 2639 u16 swc_old = pf->sw_int_count; 2640 2641 netif_info(pf, hw, netdev, "interrupt test\n"); 2642 wr32(&pf->hw, I40E_PFINT_DYN_CTL0, 2643 (I40E_PFINT_DYN_CTL0_INTENA_MASK | 2644 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK | 2645 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK | 2646 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK | 2647 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK)); 2648 usleep_range(1000, 2000); 2649 *data = (swc_old == pf->sw_int_count); 2650 2651 return *data; 2652 } 2653 2654 static inline bool i40e_active_vfs(struct i40e_pf *pf) 2655 { 2656 struct i40e_vf *vfs = pf->vf; 2657 int i; 2658 2659 for (i = 0; i < pf->num_alloc_vfs; i++) 2660 if (test_bit(I40E_VF_STATE_ACTIVE, &vfs[i].vf_states)) 2661 return true; 2662 return false; 2663 } 2664 2665 static inline bool i40e_active_vmdqs(struct i40e_pf *pf) 2666 { 2667 return !!i40e_find_vsi_by_type(pf, I40E_VSI_VMDQ2); 2668 } 2669 2670 static void i40e_diag_test(struct net_device *netdev, 2671 struct ethtool_test *eth_test, u64 *data) 2672 { 2673 struct i40e_netdev_priv *np = netdev_priv(netdev); 2674 bool if_running = netif_running(netdev); 2675 struct i40e_pf *pf = np->vsi->back; 2676 2677 if (eth_test->flags == ETH_TEST_FL_OFFLINE) { 2678 /* Offline tests */ 2679 netif_info(pf, drv, netdev, "offline testing starting\n"); 2680 2681 set_bit(__I40E_TESTING, pf->state); 2682 2683 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 2684 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) { 2685 dev_warn(&pf->pdev->dev, 2686 "Cannot start offline testing when PF is in reset state.\n"); 2687 goto skip_ol_tests; 2688 } 2689 2690 if (i40e_active_vfs(pf) || i40e_active_vmdqs(pf)) { 2691 dev_warn(&pf->pdev->dev, 2692 "Please take active VFs and Netqueues offline and restart the adapter before running NIC diagnostics\n"); 2693 goto skip_ol_tests; 2694 } 2695 2696 /* If the device is online then take it offline */ 2697 if (if_running) 2698 /* indicate we're in test mode */ 2699 i40e_close(netdev); 2700 else 2701 /* This reset does not affect link - if it is 2702 * changed to a type of reset that does affect 2703 * link then the following link test would have 2704 * to be moved to before the reset 2705 */ 2706 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 2707 2708 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 2709 eth_test->flags |= ETH_TEST_FL_FAILED; 2710 2711 if (i40e_eeprom_test(netdev, &data[I40E_ETH_TEST_EEPROM])) 2712 eth_test->flags |= ETH_TEST_FL_FAILED; 2713 2714 if (i40e_intr_test(netdev, &data[I40E_ETH_TEST_INTR])) 2715 eth_test->flags |= ETH_TEST_FL_FAILED; 2716 2717 /* run reg test last, a reset is required after it */ 2718 if (i40e_reg_test(netdev, &data[I40E_ETH_TEST_REG])) 2719 eth_test->flags |= ETH_TEST_FL_FAILED; 2720 2721 clear_bit(__I40E_TESTING, pf->state); 2722 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); 2723 2724 if (if_running) 2725 i40e_open(netdev); 2726 } else { 2727 /* Online tests */ 2728 netif_info(pf, drv, netdev, "online testing starting\n"); 2729 2730 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) 2731 eth_test->flags |= ETH_TEST_FL_FAILED; 2732 2733 /* Offline only tests, not run in online; pass by default */ 2734 data[I40E_ETH_TEST_REG] = 0; 2735 data[I40E_ETH_TEST_EEPROM] = 0; 2736 data[I40E_ETH_TEST_INTR] = 0; 2737 } 2738 2739 netif_info(pf, drv, netdev, "testing finished\n"); 2740 return; 2741 2742 skip_ol_tests: 2743 data[I40E_ETH_TEST_REG] = 1; 2744 data[I40E_ETH_TEST_EEPROM] = 1; 2745 data[I40E_ETH_TEST_INTR] = 1; 2746 data[I40E_ETH_TEST_LINK] = 1; 2747 eth_test->flags |= ETH_TEST_FL_FAILED; 2748 clear_bit(__I40E_TESTING, pf->state); 2749 netif_info(pf, drv, netdev, "testing failed\n"); 2750 } 2751 2752 static void i40e_get_wol(struct net_device *netdev, 2753 struct ethtool_wolinfo *wol) 2754 { 2755 struct i40e_netdev_priv *np = netdev_priv(netdev); 2756 struct i40e_pf *pf = np->vsi->back; 2757 struct i40e_hw *hw = &pf->hw; 2758 u16 wol_nvm_bits; 2759 2760 /* NVM bit on means WoL disabled for the port */ 2761 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 2762 if ((BIT(hw->port) & wol_nvm_bits) || (hw->partition_id != 1)) { 2763 wol->supported = 0; 2764 wol->wolopts = 0; 2765 } else { 2766 wol->supported = WAKE_MAGIC; 2767 wol->wolopts = (pf->wol_en ? WAKE_MAGIC : 0); 2768 } 2769 } 2770 2771 /** 2772 * i40e_set_wol - set the WakeOnLAN configuration 2773 * @netdev: the netdev in question 2774 * @wol: the ethtool WoL setting data 2775 **/ 2776 static int i40e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) 2777 { 2778 struct i40e_netdev_priv *np = netdev_priv(netdev); 2779 struct i40e_pf *pf = np->vsi->back; 2780 struct i40e_vsi *vsi = np->vsi; 2781 struct i40e_hw *hw = &pf->hw; 2782 u16 wol_nvm_bits; 2783 2784 /* WoL not supported if this isn't the controlling PF on the port */ 2785 if (hw->partition_id != 1) { 2786 i40e_partition_setting_complaint(pf); 2787 return -EOPNOTSUPP; 2788 } 2789 2790 if (vsi->type != I40E_VSI_MAIN) 2791 return -EOPNOTSUPP; 2792 2793 /* NVM bit on means WoL disabled for the port */ 2794 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); 2795 if (BIT(hw->port) & wol_nvm_bits) 2796 return -EOPNOTSUPP; 2797 2798 /* only magic packet is supported */ 2799 if (wol->wolopts & ~WAKE_MAGIC) 2800 return -EOPNOTSUPP; 2801 2802 /* is this a new value? */ 2803 if (pf->wol_en != !!wol->wolopts) { 2804 pf->wol_en = !!wol->wolopts; 2805 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en); 2806 } 2807 2808 return 0; 2809 } 2810 2811 static int i40e_set_phys_id(struct net_device *netdev, 2812 enum ethtool_phys_id_state state) 2813 { 2814 struct i40e_netdev_priv *np = netdev_priv(netdev); 2815 struct i40e_pf *pf = np->vsi->back; 2816 struct i40e_hw *hw = &pf->hw; 2817 int blink_freq = 2; 2818 u16 temp_status; 2819 int ret = 0; 2820 2821 switch (state) { 2822 case ETHTOOL_ID_ACTIVE: 2823 if (!test_bit(I40E_HW_CAP_PHY_CONTROLS_LEDS, pf->hw.caps)) { 2824 pf->led_status = i40e_led_get(hw); 2825 } else { 2826 if (!test_bit(I40E_HW_CAP_AQ_PHY_ACCESS, hw->caps)) 2827 i40e_aq_set_phy_debug(hw, I40E_PHY_DEBUG_ALL, 2828 NULL); 2829 ret = i40e_led_get_phy(hw, &temp_status, 2830 &pf->phy_led_val); 2831 pf->led_status = temp_status; 2832 } 2833 return blink_freq; 2834 case ETHTOOL_ID_ON: 2835 if (!test_bit(I40E_HW_CAP_PHY_CONTROLS_LEDS, pf->hw.caps)) 2836 i40e_led_set(hw, 0xf, false); 2837 else 2838 ret = i40e_led_set_phy(hw, true, pf->led_status, 0); 2839 break; 2840 case ETHTOOL_ID_OFF: 2841 if (!test_bit(I40E_HW_CAP_PHY_CONTROLS_LEDS, pf->hw.caps)) 2842 i40e_led_set(hw, 0x0, false); 2843 else 2844 ret = i40e_led_set_phy(hw, false, pf->led_status, 0); 2845 break; 2846 case ETHTOOL_ID_INACTIVE: 2847 if (!test_bit(I40E_HW_CAP_PHY_CONTROLS_LEDS, pf->hw.caps)) { 2848 i40e_led_set(hw, pf->led_status, false); 2849 } else { 2850 ret = i40e_led_set_phy(hw, false, pf->led_status, 2851 (pf->phy_led_val | 2852 I40E_PHY_LED_MODE_ORIG)); 2853 if (!test_bit(I40E_HW_CAP_AQ_PHY_ACCESS, hw->caps)) 2854 i40e_aq_set_phy_debug(hw, 0, NULL); 2855 } 2856 break; 2857 default: 2858 break; 2859 } 2860 if (ret) 2861 return -ENOENT; 2862 else 2863 return 0; 2864 } 2865 2866 /* NOTE: i40e hardware uses a conversion factor of 2 for Interrupt 2867 * Throttle Rate (ITR) ie. ITR(1) = 2us ITR(10) = 20 us, and also 2868 * 125us (8000 interrupts per second) == ITR(62) 2869 */ 2870 2871 /** 2872 * __i40e_get_coalesce - get per-queue coalesce settings 2873 * @netdev: the netdev to check 2874 * @ec: ethtool coalesce data structure 2875 * @queue: which queue to pick 2876 * 2877 * Gets the per-queue settings for coalescence. Specifically Rx and Tx usecs 2878 * are per queue. If queue is <0 then we default to queue 0 as the 2879 * representative value. 2880 **/ 2881 static int __i40e_get_coalesce(struct net_device *netdev, 2882 struct ethtool_coalesce *ec, 2883 int queue) 2884 { 2885 struct i40e_netdev_priv *np = netdev_priv(netdev); 2886 struct i40e_ring *rx_ring, *tx_ring; 2887 struct i40e_vsi *vsi = np->vsi; 2888 2889 ec->tx_max_coalesced_frames_irq = vsi->work_limit; 2890 2891 /* rx and tx usecs has per queue value. If user doesn't specify the 2892 * queue, return queue 0's value to represent. 2893 */ 2894 if (queue < 0) 2895 queue = 0; 2896 else if (queue >= vsi->num_queue_pairs) 2897 return -EINVAL; 2898 2899 rx_ring = vsi->rx_rings[queue]; 2900 tx_ring = vsi->tx_rings[queue]; 2901 2902 if (ITR_IS_DYNAMIC(rx_ring->itr_setting)) 2903 ec->use_adaptive_rx_coalesce = 1; 2904 2905 if (ITR_IS_DYNAMIC(tx_ring->itr_setting)) 2906 ec->use_adaptive_tx_coalesce = 1; 2907 2908 ec->rx_coalesce_usecs = rx_ring->itr_setting & ~I40E_ITR_DYNAMIC; 2909 ec->tx_coalesce_usecs = tx_ring->itr_setting & ~I40E_ITR_DYNAMIC; 2910 2911 /* we use the _usecs_high to store/set the interrupt rate limit 2912 * that the hardware supports, that almost but not quite 2913 * fits the original intent of the ethtool variable, 2914 * the rx_coalesce_usecs_high limits total interrupts 2915 * per second from both tx/rx sources. 2916 */ 2917 ec->rx_coalesce_usecs_high = vsi->int_rate_limit; 2918 ec->tx_coalesce_usecs_high = vsi->int_rate_limit; 2919 2920 return 0; 2921 } 2922 2923 /** 2924 * i40e_get_coalesce - get a netdev's coalesce settings 2925 * @netdev: the netdev to check 2926 * @ec: ethtool coalesce data structure 2927 * @kernel_coal: ethtool CQE mode setting structure 2928 * @extack: extack for reporting error messages 2929 * 2930 * Gets the coalesce settings for a particular netdev. Note that if user has 2931 * modified per-queue settings, this only guarantees to represent queue 0. See 2932 * __i40e_get_coalesce for more details. 2933 **/ 2934 static int i40e_get_coalesce(struct net_device *netdev, 2935 struct ethtool_coalesce *ec, 2936 struct kernel_ethtool_coalesce *kernel_coal, 2937 struct netlink_ext_ack *extack) 2938 { 2939 return __i40e_get_coalesce(netdev, ec, -1); 2940 } 2941 2942 /** 2943 * i40e_get_per_queue_coalesce - gets coalesce settings for particular queue 2944 * @netdev: netdev structure 2945 * @ec: ethtool's coalesce settings 2946 * @queue: the particular queue to read 2947 * 2948 * Will read a specific queue's coalesce settings 2949 **/ 2950 static int i40e_get_per_queue_coalesce(struct net_device *netdev, u32 queue, 2951 struct ethtool_coalesce *ec) 2952 { 2953 return __i40e_get_coalesce(netdev, ec, queue); 2954 } 2955 2956 /** 2957 * i40e_set_itr_per_queue - set ITR values for specific queue 2958 * @vsi: the VSI to set values for 2959 * @ec: coalesce settings from ethtool 2960 * @queue: the queue to modify 2961 * 2962 * Change the ITR settings for a specific queue. 2963 **/ 2964 static void i40e_set_itr_per_queue(struct i40e_vsi *vsi, 2965 struct ethtool_coalesce *ec, 2966 int queue) 2967 { 2968 struct i40e_ring *rx_ring = vsi->rx_rings[queue]; 2969 struct i40e_ring *tx_ring = vsi->tx_rings[queue]; 2970 struct i40e_pf *pf = vsi->back; 2971 struct i40e_hw *hw = &pf->hw; 2972 struct i40e_q_vector *q_vector; 2973 u16 intrl; 2974 2975 intrl = i40e_intrl_usec_to_reg(vsi->int_rate_limit); 2976 2977 rx_ring->itr_setting = ITR_REG_ALIGN(ec->rx_coalesce_usecs); 2978 tx_ring->itr_setting = ITR_REG_ALIGN(ec->tx_coalesce_usecs); 2979 2980 if (ec->use_adaptive_rx_coalesce) 2981 rx_ring->itr_setting |= I40E_ITR_DYNAMIC; 2982 else 2983 rx_ring->itr_setting &= ~I40E_ITR_DYNAMIC; 2984 2985 if (ec->use_adaptive_tx_coalesce) 2986 tx_ring->itr_setting |= I40E_ITR_DYNAMIC; 2987 else 2988 tx_ring->itr_setting &= ~I40E_ITR_DYNAMIC; 2989 2990 q_vector = rx_ring->q_vector; 2991 q_vector->rx.target_itr = ITR_TO_REG(rx_ring->itr_setting); 2992 2993 q_vector = tx_ring->q_vector; 2994 q_vector->tx.target_itr = ITR_TO_REG(tx_ring->itr_setting); 2995 2996 /* The interrupt handler itself will take care of programming 2997 * the Tx and Rx ITR values based on the values we have entered 2998 * into the q_vector, no need to write the values now. 2999 */ 3000 3001 wr32(hw, I40E_PFINT_RATEN(q_vector->reg_idx), intrl); 3002 i40e_flush(hw); 3003 } 3004 3005 /** 3006 * __i40e_set_coalesce - set coalesce settings for particular queue 3007 * @netdev: the netdev to change 3008 * @ec: ethtool coalesce settings 3009 * @queue: the queue to change 3010 * 3011 * Sets the coalesce settings for a particular queue. 3012 **/ 3013 static int __i40e_set_coalesce(struct net_device *netdev, 3014 struct ethtool_coalesce *ec, 3015 int queue) 3016 { 3017 struct i40e_netdev_priv *np = netdev_priv(netdev); 3018 u16 intrl_reg, cur_rx_itr, cur_tx_itr; 3019 struct i40e_vsi *vsi = np->vsi; 3020 struct i40e_pf *pf = vsi->back; 3021 int i; 3022 3023 if (ec->tx_max_coalesced_frames_irq) 3024 vsi->work_limit = ec->tx_max_coalesced_frames_irq; 3025 3026 if (queue < 0) { 3027 cur_rx_itr = vsi->rx_rings[0]->itr_setting; 3028 cur_tx_itr = vsi->tx_rings[0]->itr_setting; 3029 } else if (queue < vsi->num_queue_pairs) { 3030 cur_rx_itr = vsi->rx_rings[queue]->itr_setting; 3031 cur_tx_itr = vsi->tx_rings[queue]->itr_setting; 3032 } else { 3033 netif_info(pf, drv, netdev, "Invalid queue value, queue range is 0 - %d\n", 3034 vsi->num_queue_pairs - 1); 3035 return -EINVAL; 3036 } 3037 3038 cur_tx_itr &= ~I40E_ITR_DYNAMIC; 3039 cur_rx_itr &= ~I40E_ITR_DYNAMIC; 3040 3041 /* tx_coalesce_usecs_high is ignored, use rx-usecs-high instead */ 3042 if (ec->tx_coalesce_usecs_high != vsi->int_rate_limit) { 3043 netif_info(pf, drv, netdev, "tx-usecs-high is not used, please program rx-usecs-high\n"); 3044 return -EINVAL; 3045 } 3046 3047 if (ec->rx_coalesce_usecs_high > INTRL_REG_TO_USEC(I40E_MAX_INTRL)) { 3048 netif_info(pf, drv, netdev, "Invalid value, rx-usecs-high range is 0-%lu\n", 3049 INTRL_REG_TO_USEC(I40E_MAX_INTRL)); 3050 return -EINVAL; 3051 } 3052 3053 if (ec->rx_coalesce_usecs != cur_rx_itr && 3054 ec->use_adaptive_rx_coalesce) { 3055 netif_info(pf, drv, netdev, "RX interrupt moderation cannot be changed if adaptive-rx is enabled.\n"); 3056 return -EINVAL; 3057 } 3058 3059 if (ec->rx_coalesce_usecs > I40E_MAX_ITR) { 3060 netif_info(pf, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n"); 3061 return -EINVAL; 3062 } 3063 3064 if (ec->tx_coalesce_usecs != cur_tx_itr && 3065 ec->use_adaptive_tx_coalesce) { 3066 netif_info(pf, drv, netdev, "TX interrupt moderation cannot be changed if adaptive-tx is enabled.\n"); 3067 return -EINVAL; 3068 } 3069 3070 if (ec->tx_coalesce_usecs > I40E_MAX_ITR) { 3071 netif_info(pf, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n"); 3072 return -EINVAL; 3073 } 3074 3075 if (ec->use_adaptive_rx_coalesce && !cur_rx_itr) 3076 ec->rx_coalesce_usecs = I40E_MIN_ITR; 3077 3078 if (ec->use_adaptive_tx_coalesce && !cur_tx_itr) 3079 ec->tx_coalesce_usecs = I40E_MIN_ITR; 3080 3081 intrl_reg = i40e_intrl_usec_to_reg(ec->rx_coalesce_usecs_high); 3082 vsi->int_rate_limit = INTRL_REG_TO_USEC(intrl_reg); 3083 if (vsi->int_rate_limit != ec->rx_coalesce_usecs_high) { 3084 netif_info(pf, drv, netdev, "Interrupt rate limit rounded down to %d\n", 3085 vsi->int_rate_limit); 3086 } 3087 3088 /* rx and tx usecs has per queue value. If user doesn't specify the 3089 * queue, apply to all queues. 3090 */ 3091 if (queue < 0) { 3092 for (i = 0; i < vsi->num_queue_pairs; i++) 3093 i40e_set_itr_per_queue(vsi, ec, i); 3094 } else { 3095 i40e_set_itr_per_queue(vsi, ec, queue); 3096 } 3097 3098 return 0; 3099 } 3100 3101 /** 3102 * i40e_set_coalesce - set coalesce settings for every queue on the netdev 3103 * @netdev: the netdev to change 3104 * @ec: ethtool coalesce settings 3105 * @kernel_coal: ethtool CQE mode setting structure 3106 * @extack: extack for reporting error messages 3107 * 3108 * This will set each queue to the same coalesce settings. 3109 **/ 3110 static int i40e_set_coalesce(struct net_device *netdev, 3111 struct ethtool_coalesce *ec, 3112 struct kernel_ethtool_coalesce *kernel_coal, 3113 struct netlink_ext_ack *extack) 3114 { 3115 return __i40e_set_coalesce(netdev, ec, -1); 3116 } 3117 3118 /** 3119 * i40e_set_per_queue_coalesce - set specific queue's coalesce settings 3120 * @netdev: the netdev to change 3121 * @ec: ethtool's coalesce settings 3122 * @queue: the queue to change 3123 * 3124 * Sets the specified queue's coalesce settings. 3125 **/ 3126 static int i40e_set_per_queue_coalesce(struct net_device *netdev, u32 queue, 3127 struct ethtool_coalesce *ec) 3128 { 3129 return __i40e_set_coalesce(netdev, ec, queue); 3130 } 3131 3132 /** 3133 * i40e_get_rss_hash_opts - Get RSS hash Input Set for each flow type 3134 * @pf: pointer to the physical function struct 3135 * @cmd: ethtool rxnfc command 3136 * 3137 * Returns Success if the flow is supported, else Invalid Input. 3138 **/ 3139 static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd) 3140 { 3141 struct i40e_hw *hw = &pf->hw; 3142 u8 flow_pctype = 0; 3143 u64 i_set = 0; 3144 3145 cmd->data = 0; 3146 3147 switch (cmd->flow_type) { 3148 case TCP_V4_FLOW: 3149 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 3150 break; 3151 case UDP_V4_FLOW: 3152 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 3153 break; 3154 case TCP_V6_FLOW: 3155 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 3156 break; 3157 case UDP_V6_FLOW: 3158 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 3159 break; 3160 case SCTP_V4_FLOW: 3161 case AH_ESP_V4_FLOW: 3162 case AH_V4_FLOW: 3163 case ESP_V4_FLOW: 3164 case IPV4_FLOW: 3165 case SCTP_V6_FLOW: 3166 case AH_ESP_V6_FLOW: 3167 case AH_V6_FLOW: 3168 case ESP_V6_FLOW: 3169 case IPV6_FLOW: 3170 /* Default is src/dest for IP, no matter the L4 hashing */ 3171 cmd->data |= RXH_IP_SRC | RXH_IP_DST; 3172 break; 3173 default: 3174 return -EINVAL; 3175 } 3176 3177 /* Read flow based hash input set register */ 3178 if (flow_pctype) { 3179 i_set = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, 3180 flow_pctype)) | 3181 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, 3182 flow_pctype)) << 32); 3183 } 3184 3185 /* Process bits of hash input set */ 3186 if (i_set) { 3187 if (i_set & I40E_L4_SRC_MASK) 3188 cmd->data |= RXH_L4_B_0_1; 3189 if (i_set & I40E_L4_DST_MASK) 3190 cmd->data |= RXH_L4_B_2_3; 3191 3192 if (cmd->flow_type == TCP_V4_FLOW || 3193 cmd->flow_type == UDP_V4_FLOW) { 3194 if (hw->mac.type == I40E_MAC_X722) { 3195 if (i_set & I40E_X722_L3_SRC_MASK) 3196 cmd->data |= RXH_IP_SRC; 3197 if (i_set & I40E_X722_L3_DST_MASK) 3198 cmd->data |= RXH_IP_DST; 3199 } else { 3200 if (i_set & I40E_L3_SRC_MASK) 3201 cmd->data |= RXH_IP_SRC; 3202 if (i_set & I40E_L3_DST_MASK) 3203 cmd->data |= RXH_IP_DST; 3204 } 3205 } else if (cmd->flow_type == TCP_V6_FLOW || 3206 cmd->flow_type == UDP_V6_FLOW) { 3207 if (i_set & I40E_L3_V6_SRC_MASK) 3208 cmd->data |= RXH_IP_SRC; 3209 if (i_set & I40E_L3_V6_DST_MASK) 3210 cmd->data |= RXH_IP_DST; 3211 } 3212 } 3213 3214 return 0; 3215 } 3216 3217 /** 3218 * i40e_check_mask - Check whether a mask field is set 3219 * @mask: the full mask value 3220 * @field: mask of the field to check 3221 * 3222 * If the given mask is fully set, return positive value. If the mask for the 3223 * field is fully unset, return zero. Otherwise return a negative error code. 3224 **/ 3225 static int i40e_check_mask(u64 mask, u64 field) 3226 { 3227 u64 value = mask & field; 3228 3229 if (value == field) 3230 return 1; 3231 else if (!value) 3232 return 0; 3233 else 3234 return -1; 3235 } 3236 3237 /** 3238 * i40e_parse_rx_flow_user_data - Deconstruct user-defined data 3239 * @fsp: pointer to rx flow specification 3240 * @data: pointer to userdef data structure for storage 3241 * 3242 * Read the user-defined data and deconstruct the value into a structure. No 3243 * other code should read the user-defined data, so as to ensure that every 3244 * place consistently reads the value correctly. 3245 * 3246 * The user-defined field is a 64bit Big Endian format value, which we 3247 * deconstruct by reading bits or bit fields from it. Single bit flags shall 3248 * be defined starting from the highest bits, while small bit field values 3249 * shall be defined starting from the lowest bits. 3250 * 3251 * Returns 0 if the data is valid, and non-zero if the userdef data is invalid 3252 * and the filter should be rejected. The data structure will always be 3253 * modified even if FLOW_EXT is not set. 3254 * 3255 **/ 3256 static int i40e_parse_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 3257 struct i40e_rx_flow_userdef *data) 3258 { 3259 u64 value, mask; 3260 int valid; 3261 3262 /* Zero memory first so it's always consistent. */ 3263 memset(data, 0, sizeof(*data)); 3264 3265 if (!(fsp->flow_type & FLOW_EXT)) 3266 return 0; 3267 3268 value = be64_to_cpu(*((__be64 *)fsp->h_ext.data)); 3269 mask = be64_to_cpu(*((__be64 *)fsp->m_ext.data)); 3270 3271 #define I40E_USERDEF_FLEX_WORD GENMASK_ULL(15, 0) 3272 #define I40E_USERDEF_FLEX_OFFSET GENMASK_ULL(31, 16) 3273 #define I40E_USERDEF_FLEX_FILTER GENMASK_ULL(31, 0) 3274 3275 valid = i40e_check_mask(mask, I40E_USERDEF_FLEX_FILTER); 3276 if (valid < 0) { 3277 return -EINVAL; 3278 } else if (valid) { 3279 data->flex_word = value & I40E_USERDEF_FLEX_WORD; 3280 data->flex_offset = 3281 FIELD_GET(I40E_USERDEF_FLEX_OFFSET, value); 3282 data->flex_filter = true; 3283 } 3284 3285 return 0; 3286 } 3287 3288 /** 3289 * i40e_fill_rx_flow_user_data - Fill in user-defined data field 3290 * @fsp: pointer to rx_flow specification 3291 * @data: pointer to return userdef data 3292 * 3293 * Reads the userdef data structure and properly fills in the user defined 3294 * fields of the rx_flow_spec. 3295 **/ 3296 static void i40e_fill_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp, 3297 struct i40e_rx_flow_userdef *data) 3298 { 3299 u64 value = 0, mask = 0; 3300 3301 if (data->flex_filter) { 3302 value |= data->flex_word; 3303 value |= (u64)data->flex_offset << 16; 3304 mask |= I40E_USERDEF_FLEX_FILTER; 3305 } 3306 3307 if (value || mask) 3308 fsp->flow_type |= FLOW_EXT; 3309 3310 *((__be64 *)fsp->h_ext.data) = cpu_to_be64(value); 3311 *((__be64 *)fsp->m_ext.data) = cpu_to_be64(mask); 3312 } 3313 3314 /** 3315 * i40e_get_ethtool_fdir_all - Populates the rule count of a command 3316 * @pf: Pointer to the physical function struct 3317 * @cmd: The command to get or set Rx flow classification rules 3318 * @rule_locs: Array of used rule locations 3319 * 3320 * This function populates both the total and actual rule count of 3321 * the ethtool flow classification command 3322 * 3323 * Returns 0 on success or -EMSGSIZE if entry not found 3324 **/ 3325 static int i40e_get_ethtool_fdir_all(struct i40e_pf *pf, 3326 struct ethtool_rxnfc *cmd, 3327 u32 *rule_locs) 3328 { 3329 struct i40e_fdir_filter *rule; 3330 struct hlist_node *node2; 3331 int cnt = 0; 3332 3333 /* report total rule count */ 3334 cmd->data = i40e_get_fd_cnt_all(pf); 3335 3336 hlist_for_each_entry_safe(rule, node2, 3337 &pf->fdir_filter_list, fdir_node) { 3338 if (cnt == cmd->rule_cnt) 3339 return -EMSGSIZE; 3340 3341 rule_locs[cnt] = rule->fd_id; 3342 cnt++; 3343 } 3344 3345 cmd->rule_cnt = cnt; 3346 3347 return 0; 3348 } 3349 3350 /** 3351 * i40e_get_ethtool_fdir_entry - Look up a filter based on Rx flow 3352 * @pf: Pointer to the physical function struct 3353 * @cmd: The command to get or set Rx flow classification rules 3354 * 3355 * This function looks up a filter based on the Rx flow classification 3356 * command and fills the flow spec info for it if found 3357 * 3358 * Returns 0 on success or -EINVAL if filter not found 3359 **/ 3360 static int i40e_get_ethtool_fdir_entry(struct i40e_pf *pf, 3361 struct ethtool_rxnfc *cmd) 3362 { 3363 struct ethtool_rx_flow_spec *fsp = 3364 (struct ethtool_rx_flow_spec *)&cmd->fs; 3365 struct i40e_rx_flow_userdef userdef = {0}; 3366 struct i40e_fdir_filter *rule = NULL; 3367 struct hlist_node *node2; 3368 struct i40e_vsi *vsi; 3369 u64 input_set; 3370 u16 index; 3371 3372 hlist_for_each_entry_safe(rule, node2, 3373 &pf->fdir_filter_list, fdir_node) { 3374 if (fsp->location <= rule->fd_id) 3375 break; 3376 } 3377 3378 if (!rule || fsp->location != rule->fd_id) 3379 return -EINVAL; 3380 3381 fsp->flow_type = rule->flow_type; 3382 if (fsp->flow_type == IP_USER_FLOW) { 3383 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4; 3384 fsp->h_u.usr_ip4_spec.proto = 0; 3385 fsp->m_u.usr_ip4_spec.proto = 0; 3386 } 3387 3388 if (fsp->flow_type == IPV6_USER_FLOW || 3389 fsp->flow_type == UDP_V6_FLOW || 3390 fsp->flow_type == TCP_V6_FLOW || 3391 fsp->flow_type == SCTP_V6_FLOW) { 3392 /* Reverse the src and dest notion, since the HW views them 3393 * from Tx perspective where as the user expects it from 3394 * Rx filter view. 3395 */ 3396 fsp->h_u.tcp_ip6_spec.psrc = rule->dst_port; 3397 fsp->h_u.tcp_ip6_spec.pdst = rule->src_port; 3398 memcpy(fsp->h_u.tcp_ip6_spec.ip6dst, rule->src_ip6, 3399 sizeof(__be32) * 4); 3400 memcpy(fsp->h_u.tcp_ip6_spec.ip6src, rule->dst_ip6, 3401 sizeof(__be32) * 4); 3402 } else { 3403 /* Reverse the src and dest notion, since the HW views them 3404 * from Tx perspective where as the user expects it from 3405 * Rx filter view. 3406 */ 3407 fsp->h_u.tcp_ip4_spec.psrc = rule->dst_port; 3408 fsp->h_u.tcp_ip4_spec.pdst = rule->src_port; 3409 fsp->h_u.tcp_ip4_spec.ip4src = rule->dst_ip; 3410 fsp->h_u.tcp_ip4_spec.ip4dst = rule->src_ip; 3411 } 3412 3413 switch (rule->flow_type) { 3414 case SCTP_V4_FLOW: 3415 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 3416 break; 3417 case TCP_V4_FLOW: 3418 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 3419 break; 3420 case UDP_V4_FLOW: 3421 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 3422 break; 3423 case SCTP_V6_FLOW: 3424 index = I40E_FILTER_PCTYPE_NONF_IPV6_SCTP; 3425 break; 3426 case TCP_V6_FLOW: 3427 index = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 3428 break; 3429 case UDP_V6_FLOW: 3430 index = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 3431 break; 3432 case IP_USER_FLOW: 3433 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 3434 break; 3435 case IPV6_USER_FLOW: 3436 index = I40E_FILTER_PCTYPE_NONF_IPV6_OTHER; 3437 break; 3438 default: 3439 /* If we have stored a filter with a flow type not listed here 3440 * it is almost certainly a driver bug. WARN(), and then 3441 * assign the input_set as if all fields are enabled to avoid 3442 * reading unassigned memory. 3443 */ 3444 WARN(1, "Missing input set index for flow_type %d\n", 3445 rule->flow_type); 3446 input_set = 0xFFFFFFFFFFFFFFFFULL; 3447 goto no_input_set; 3448 } 3449 3450 input_set = i40e_read_fd_input_set(pf, index); 3451 3452 no_input_set: 3453 if (input_set & I40E_L3_V6_SRC_MASK) { 3454 fsp->m_u.tcp_ip6_spec.ip6src[0] = htonl(0xFFFFFFFF); 3455 fsp->m_u.tcp_ip6_spec.ip6src[1] = htonl(0xFFFFFFFF); 3456 fsp->m_u.tcp_ip6_spec.ip6src[2] = htonl(0xFFFFFFFF); 3457 fsp->m_u.tcp_ip6_spec.ip6src[3] = htonl(0xFFFFFFFF); 3458 } 3459 3460 if (input_set & I40E_L3_V6_DST_MASK) { 3461 fsp->m_u.tcp_ip6_spec.ip6dst[0] = htonl(0xFFFFFFFF); 3462 fsp->m_u.tcp_ip6_spec.ip6dst[1] = htonl(0xFFFFFFFF); 3463 fsp->m_u.tcp_ip6_spec.ip6dst[2] = htonl(0xFFFFFFFF); 3464 fsp->m_u.tcp_ip6_spec.ip6dst[3] = htonl(0xFFFFFFFF); 3465 } 3466 3467 if (input_set & I40E_L3_SRC_MASK) 3468 fsp->m_u.tcp_ip4_spec.ip4src = htonl(0xFFFFFFFF); 3469 3470 if (input_set & I40E_L3_DST_MASK) 3471 fsp->m_u.tcp_ip4_spec.ip4dst = htonl(0xFFFFFFFF); 3472 3473 if (input_set & I40E_L4_SRC_MASK) 3474 fsp->m_u.tcp_ip4_spec.psrc = htons(0xFFFF); 3475 3476 if (input_set & I40E_L4_DST_MASK) 3477 fsp->m_u.tcp_ip4_spec.pdst = htons(0xFFFF); 3478 3479 if (rule->dest_ctl == I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET) 3480 fsp->ring_cookie = RX_CLS_FLOW_DISC; 3481 else 3482 fsp->ring_cookie = rule->q_index; 3483 3484 if (rule->vlan_tag) { 3485 fsp->h_ext.vlan_etype = rule->vlan_etype; 3486 fsp->m_ext.vlan_etype = htons(0xFFFF); 3487 fsp->h_ext.vlan_tci = rule->vlan_tag; 3488 fsp->m_ext.vlan_tci = htons(0xFFFF); 3489 fsp->flow_type |= FLOW_EXT; 3490 } 3491 3492 vsi = i40e_pf_get_main_vsi(pf); 3493 if (rule->dest_vsi != vsi->id) { 3494 vsi = i40e_find_vsi_from_id(pf, rule->dest_vsi); 3495 if (vsi && vsi->type == I40E_VSI_SRIOV) { 3496 /* VFs are zero-indexed by the driver, but ethtool 3497 * expects them to be one-indexed, so add one here 3498 */ 3499 u64 ring_vf = vsi->vf_id + 1; 3500 3501 ring_vf <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF; 3502 fsp->ring_cookie |= ring_vf; 3503 } 3504 } 3505 3506 if (rule->flex_filter) { 3507 userdef.flex_filter = true; 3508 userdef.flex_word = be16_to_cpu(rule->flex_word); 3509 userdef.flex_offset = rule->flex_offset; 3510 } 3511 3512 i40e_fill_rx_flow_user_data(fsp, &userdef); 3513 3514 return 0; 3515 } 3516 3517 /** 3518 * i40e_get_rxnfc - command to get RX flow classification rules 3519 * @netdev: network interface device structure 3520 * @cmd: ethtool rxnfc command 3521 * @rule_locs: pointer to store rule data 3522 * 3523 * Returns Success if the command is supported. 3524 **/ 3525 static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd, 3526 u32 *rule_locs) 3527 { 3528 struct i40e_netdev_priv *np = netdev_priv(netdev); 3529 struct i40e_vsi *vsi = np->vsi; 3530 struct i40e_pf *pf = vsi->back; 3531 int ret = -EOPNOTSUPP; 3532 3533 switch (cmd->cmd) { 3534 case ETHTOOL_GRXRINGS: 3535 cmd->data = vsi->rss_size; 3536 ret = 0; 3537 break; 3538 case ETHTOOL_GRXFH: 3539 ret = i40e_get_rss_hash_opts(pf, cmd); 3540 break; 3541 case ETHTOOL_GRXCLSRLCNT: 3542 cmd->rule_cnt = pf->fdir_pf_active_filters; 3543 /* report total rule count */ 3544 cmd->data = i40e_get_fd_cnt_all(pf); 3545 ret = 0; 3546 break; 3547 case ETHTOOL_GRXCLSRULE: 3548 ret = i40e_get_ethtool_fdir_entry(pf, cmd); 3549 break; 3550 case ETHTOOL_GRXCLSRLALL: 3551 ret = i40e_get_ethtool_fdir_all(pf, cmd, rule_locs); 3552 break; 3553 default: 3554 break; 3555 } 3556 3557 return ret; 3558 } 3559 3560 /** 3561 * i40e_get_rss_hash_bits - Read RSS Hash bits from register 3562 * @hw: hw structure 3563 * @nfc: pointer to user request 3564 * @i_setc: bits currently set 3565 * 3566 * Returns value of bits to be set per user request 3567 **/ 3568 static u64 i40e_get_rss_hash_bits(struct i40e_hw *hw, 3569 struct ethtool_rxnfc *nfc, 3570 u64 i_setc) 3571 { 3572 u64 i_set = i_setc; 3573 u64 src_l3 = 0, dst_l3 = 0; 3574 3575 if (nfc->data & RXH_L4_B_0_1) 3576 i_set |= I40E_L4_SRC_MASK; 3577 else 3578 i_set &= ~I40E_L4_SRC_MASK; 3579 if (nfc->data & RXH_L4_B_2_3) 3580 i_set |= I40E_L4_DST_MASK; 3581 else 3582 i_set &= ~I40E_L4_DST_MASK; 3583 3584 if (nfc->flow_type == TCP_V6_FLOW || nfc->flow_type == UDP_V6_FLOW) { 3585 src_l3 = I40E_L3_V6_SRC_MASK; 3586 dst_l3 = I40E_L3_V6_DST_MASK; 3587 } else if (nfc->flow_type == TCP_V4_FLOW || 3588 nfc->flow_type == UDP_V4_FLOW) { 3589 if (hw->mac.type == I40E_MAC_X722) { 3590 src_l3 = I40E_X722_L3_SRC_MASK; 3591 dst_l3 = I40E_X722_L3_DST_MASK; 3592 } else { 3593 src_l3 = I40E_L3_SRC_MASK; 3594 dst_l3 = I40E_L3_DST_MASK; 3595 } 3596 } else { 3597 /* Any other flow type are not supported here */ 3598 return i_set; 3599 } 3600 3601 if (nfc->data & RXH_IP_SRC) 3602 i_set |= src_l3; 3603 else 3604 i_set &= ~src_l3; 3605 if (nfc->data & RXH_IP_DST) 3606 i_set |= dst_l3; 3607 else 3608 i_set &= ~dst_l3; 3609 3610 return i_set; 3611 } 3612 3613 #define FLOW_PCTYPES_SIZE 64 3614 /** 3615 * i40e_set_rss_hash_opt - Enable/Disable flow types for RSS hash 3616 * @pf: pointer to the physical function struct 3617 * @nfc: ethtool rxnfc command 3618 * 3619 * Returns Success if the flow input set is supported. 3620 **/ 3621 static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc) 3622 { 3623 struct i40e_hw *hw = &pf->hw; 3624 u64 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) | 3625 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32); 3626 DECLARE_BITMAP(flow_pctypes, FLOW_PCTYPES_SIZE); 3627 u64 i_set, i_setc; 3628 3629 bitmap_zero(flow_pctypes, FLOW_PCTYPES_SIZE); 3630 3631 if (test_bit(I40E_FLAG_MFP_ENA, pf->flags)) { 3632 dev_err(&pf->pdev->dev, 3633 "Change of RSS hash input set is not supported when MFP mode is enabled\n"); 3634 return -EOPNOTSUPP; 3635 } 3636 3637 /* RSS does not support anything other than hashing 3638 * to queues on src and dst IPs and ports 3639 */ 3640 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST | 3641 RXH_L4_B_0_1 | RXH_L4_B_2_3)) 3642 return -EINVAL; 3643 3644 switch (nfc->flow_type) { 3645 case TCP_V4_FLOW: 3646 set_bit(I40E_FILTER_PCTYPE_NONF_IPV4_TCP, flow_pctypes); 3647 if (test_bit(I40E_HW_CAP_MULTI_TCP_UDP_RSS_PCTYPE, 3648 pf->hw.caps)) 3649 set_bit(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK, 3650 flow_pctypes); 3651 break; 3652 case TCP_V6_FLOW: 3653 set_bit(I40E_FILTER_PCTYPE_NONF_IPV6_TCP, flow_pctypes); 3654 if (test_bit(I40E_HW_CAP_MULTI_TCP_UDP_RSS_PCTYPE, 3655 pf->hw.caps)) 3656 set_bit(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK, 3657 flow_pctypes); 3658 break; 3659 case UDP_V4_FLOW: 3660 set_bit(I40E_FILTER_PCTYPE_NONF_IPV4_UDP, flow_pctypes); 3661 if (test_bit(I40E_HW_CAP_MULTI_TCP_UDP_RSS_PCTYPE, 3662 pf->hw.caps)) { 3663 set_bit(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP, 3664 flow_pctypes); 3665 set_bit(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP, 3666 flow_pctypes); 3667 } 3668 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 3669 break; 3670 case UDP_V6_FLOW: 3671 set_bit(I40E_FILTER_PCTYPE_NONF_IPV6_UDP, flow_pctypes); 3672 if (test_bit(I40E_HW_CAP_MULTI_TCP_UDP_RSS_PCTYPE, 3673 pf->hw.caps)) { 3674 set_bit(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP, 3675 flow_pctypes); 3676 set_bit(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP, 3677 flow_pctypes); 3678 } 3679 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 3680 break; 3681 case AH_ESP_V4_FLOW: 3682 case AH_V4_FLOW: 3683 case ESP_V4_FLOW: 3684 case SCTP_V4_FLOW: 3685 if ((nfc->data & RXH_L4_B_0_1) || 3686 (nfc->data & RXH_L4_B_2_3)) 3687 return -EINVAL; 3688 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER); 3689 break; 3690 case AH_ESP_V6_FLOW: 3691 case AH_V6_FLOW: 3692 case ESP_V6_FLOW: 3693 case SCTP_V6_FLOW: 3694 if ((nfc->data & RXH_L4_B_0_1) || 3695 (nfc->data & RXH_L4_B_2_3)) 3696 return -EINVAL; 3697 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER); 3698 break; 3699 case IPV4_FLOW: 3700 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | 3701 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); 3702 break; 3703 case IPV6_FLOW: 3704 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | 3705 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); 3706 break; 3707 default: 3708 return -EINVAL; 3709 } 3710 3711 if (bitmap_weight(flow_pctypes, FLOW_PCTYPES_SIZE)) { 3712 u8 flow_id; 3713 3714 for_each_set_bit(flow_id, flow_pctypes, FLOW_PCTYPES_SIZE) { 3715 i_setc = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_id)) | 3716 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_id)) << 32); 3717 i_set = i40e_get_rss_hash_bits(&pf->hw, nfc, i_setc); 3718 3719 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_id), 3720 (u32)i_set); 3721 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_id), 3722 (u32)(i_set >> 32)); 3723 hena |= BIT_ULL(flow_id); 3724 } 3725 } 3726 3727 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena); 3728 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32)); 3729 i40e_flush(hw); 3730 3731 return 0; 3732 } 3733 3734 /** 3735 * i40e_update_ethtool_fdir_entry - Updates the fdir filter entry 3736 * @vsi: Pointer to the targeted VSI 3737 * @input: The filter to update or NULL to indicate deletion 3738 * @sw_idx: Software index to the filter 3739 * @cmd: The command to get or set Rx flow classification rules 3740 * 3741 * This function updates (or deletes) a Flow Director entry from 3742 * the hlist of the corresponding PF 3743 * 3744 * Returns 0 on success 3745 **/ 3746 static int i40e_update_ethtool_fdir_entry(struct i40e_vsi *vsi, 3747 struct i40e_fdir_filter *input, 3748 u16 sw_idx, 3749 struct ethtool_rxnfc *cmd) 3750 { 3751 struct i40e_fdir_filter *rule, *parent; 3752 struct i40e_pf *pf = vsi->back; 3753 struct hlist_node *node2; 3754 int err = -EINVAL; 3755 3756 parent = NULL; 3757 rule = NULL; 3758 3759 hlist_for_each_entry_safe(rule, node2, 3760 &pf->fdir_filter_list, fdir_node) { 3761 /* hash found, or no matching entry */ 3762 if (rule->fd_id >= sw_idx) 3763 break; 3764 parent = rule; 3765 } 3766 3767 /* if there is an old rule occupying our place remove it */ 3768 if (rule && (rule->fd_id == sw_idx)) { 3769 /* Remove this rule, since we're either deleting it, or 3770 * replacing it. 3771 */ 3772 err = i40e_add_del_fdir(vsi, rule, false); 3773 hlist_del(&rule->fdir_node); 3774 kfree(rule); 3775 pf->fdir_pf_active_filters--; 3776 } 3777 3778 /* If we weren't given an input, this is a delete, so just return the 3779 * error code indicating if there was an entry at the requested slot 3780 */ 3781 if (!input) 3782 return err; 3783 3784 /* Otherwise, install the new rule as requested */ 3785 INIT_HLIST_NODE(&input->fdir_node); 3786 3787 /* add filter to the list */ 3788 if (parent) 3789 hlist_add_behind(&input->fdir_node, &parent->fdir_node); 3790 else 3791 hlist_add_head(&input->fdir_node, 3792 &pf->fdir_filter_list); 3793 3794 /* update counts */ 3795 pf->fdir_pf_active_filters++; 3796 3797 return 0; 3798 } 3799 3800 /** 3801 * i40e_prune_flex_pit_list - Cleanup unused entries in FLX_PIT table 3802 * @pf: pointer to PF structure 3803 * 3804 * This function searches the list of filters and determines which FLX_PIT 3805 * entries are still required. It will prune any entries which are no longer 3806 * in use after the deletion. 3807 **/ 3808 static void i40e_prune_flex_pit_list(struct i40e_pf *pf) 3809 { 3810 struct i40e_flex_pit *entry, *tmp; 3811 struct i40e_fdir_filter *rule; 3812 3813 /* First, we'll check the l3 table */ 3814 list_for_each_entry_safe(entry, tmp, &pf->l3_flex_pit_list, list) { 3815 bool found = false; 3816 3817 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 3818 if (rule->flow_type != IP_USER_FLOW) 3819 continue; 3820 if (rule->flex_filter && 3821 rule->flex_offset == entry->src_offset) { 3822 found = true; 3823 break; 3824 } 3825 } 3826 3827 /* If we didn't find the filter, then we can prune this entry 3828 * from the list. 3829 */ 3830 if (!found) { 3831 list_del(&entry->list); 3832 kfree(entry); 3833 } 3834 } 3835 3836 /* Followed by the L4 table */ 3837 list_for_each_entry_safe(entry, tmp, &pf->l4_flex_pit_list, list) { 3838 bool found = false; 3839 3840 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) { 3841 /* Skip this filter if it's L3, since we already 3842 * checked those in the above loop 3843 */ 3844 if (rule->flow_type == IP_USER_FLOW) 3845 continue; 3846 if (rule->flex_filter && 3847 rule->flex_offset == entry->src_offset) { 3848 found = true; 3849 break; 3850 } 3851 } 3852 3853 /* If we didn't find the filter, then we can prune this entry 3854 * from the list. 3855 */ 3856 if (!found) { 3857 list_del(&entry->list); 3858 kfree(entry); 3859 } 3860 } 3861 } 3862 3863 /** 3864 * i40e_del_fdir_entry - Deletes a Flow Director filter entry 3865 * @vsi: Pointer to the targeted VSI 3866 * @cmd: The command to get or set Rx flow classification rules 3867 * 3868 * The function removes a Flow Director filter entry from the 3869 * hlist of the corresponding PF 3870 * 3871 * Returns 0 on success 3872 */ 3873 static int i40e_del_fdir_entry(struct i40e_vsi *vsi, 3874 struct ethtool_rxnfc *cmd) 3875 { 3876 struct ethtool_rx_flow_spec *fsp = 3877 (struct ethtool_rx_flow_spec *)&cmd->fs; 3878 struct i40e_pf *pf = vsi->back; 3879 int ret = 0; 3880 3881 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 3882 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 3883 return -EBUSY; 3884 3885 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 3886 return -EBUSY; 3887 3888 ret = i40e_update_ethtool_fdir_entry(vsi, NULL, fsp->location, cmd); 3889 3890 i40e_prune_flex_pit_list(pf); 3891 3892 i40e_fdir_check_and_reenable(pf); 3893 return ret; 3894 } 3895 3896 /** 3897 * i40e_unused_pit_index - Find an unused PIT index for given list 3898 * @pf: the PF data structure 3899 * 3900 * Find the first unused flexible PIT index entry. We search both the L3 and 3901 * L4 flexible PIT lists so that the returned index is unique and unused by 3902 * either currently programmed L3 or L4 filters. We use a bit field as storage 3903 * to track which indexes are already used. 3904 **/ 3905 static u8 i40e_unused_pit_index(struct i40e_pf *pf) 3906 { 3907 unsigned long available_index = 0xFF; 3908 struct i40e_flex_pit *entry; 3909 3910 /* We need to make sure that the new index isn't in use by either L3 3911 * or L4 filters so that IP_USER_FLOW filters can program both L3 and 3912 * L4 to use the same index. 3913 */ 3914 3915 list_for_each_entry(entry, &pf->l4_flex_pit_list, list) 3916 clear_bit(entry->pit_index, &available_index); 3917 3918 list_for_each_entry(entry, &pf->l3_flex_pit_list, list) 3919 clear_bit(entry->pit_index, &available_index); 3920 3921 return find_first_bit(&available_index, 8); 3922 } 3923 3924 /** 3925 * i40e_find_flex_offset - Find an existing flex src_offset 3926 * @flex_pit_list: L3 or L4 flex PIT list 3927 * @src_offset: new src_offset to find 3928 * 3929 * Searches the flex_pit_list for an existing offset. If no offset is 3930 * currently programmed, then this will return an ERR_PTR if there is no space 3931 * to add a new offset, otherwise it returns NULL. 3932 **/ 3933 static 3934 struct i40e_flex_pit *i40e_find_flex_offset(struct list_head *flex_pit_list, 3935 u16 src_offset) 3936 { 3937 struct i40e_flex_pit *entry; 3938 int size = 0; 3939 3940 /* Search for the src_offset first. If we find a matching entry 3941 * already programmed, we can simply re-use it. 3942 */ 3943 list_for_each_entry(entry, flex_pit_list, list) { 3944 size++; 3945 if (entry->src_offset == src_offset) 3946 return entry; 3947 } 3948 3949 /* If we haven't found an entry yet, then the provided src offset has 3950 * not yet been programmed. We will program the src offset later on, 3951 * but we need to indicate whether there is enough space to do so 3952 * here. We'll make use of ERR_PTR for this purpose. 3953 */ 3954 if (size >= I40E_FLEX_PIT_TABLE_SIZE) 3955 return ERR_PTR(-ENOSPC); 3956 3957 return NULL; 3958 } 3959 3960 /** 3961 * i40e_add_flex_offset - Add src_offset to flex PIT table list 3962 * @flex_pit_list: L3 or L4 flex PIT list 3963 * @src_offset: new src_offset to add 3964 * @pit_index: the PIT index to program 3965 * 3966 * This function programs the new src_offset to the list. It is expected that 3967 * i40e_find_flex_offset has already been tried and returned NULL, indicating 3968 * that this offset is not programmed, and that the list has enough space to 3969 * store another offset. 3970 * 3971 * Returns 0 on success, and negative value on error. 3972 **/ 3973 static int i40e_add_flex_offset(struct list_head *flex_pit_list, 3974 u16 src_offset, 3975 u8 pit_index) 3976 { 3977 struct i40e_flex_pit *new_pit, *entry; 3978 3979 new_pit = kzalloc(sizeof(*entry), GFP_KERNEL); 3980 if (!new_pit) 3981 return -ENOMEM; 3982 3983 new_pit->src_offset = src_offset; 3984 new_pit->pit_index = pit_index; 3985 3986 /* We need to insert this item such that the list is sorted by 3987 * src_offset in ascending order. 3988 */ 3989 list_for_each_entry(entry, flex_pit_list, list) { 3990 if (new_pit->src_offset < entry->src_offset) { 3991 list_add_tail(&new_pit->list, &entry->list); 3992 return 0; 3993 } 3994 3995 /* If we found an entry with our offset already programmed we 3996 * can simply return here, after freeing the memory. However, 3997 * if the pit_index does not match we need to report an error. 3998 */ 3999 if (new_pit->src_offset == entry->src_offset) { 4000 int err = 0; 4001 4002 /* If the PIT index is not the same we can't re-use 4003 * the entry, so we must report an error. 4004 */ 4005 if (new_pit->pit_index != entry->pit_index) 4006 err = -EINVAL; 4007 4008 kfree(new_pit); 4009 return err; 4010 } 4011 } 4012 4013 /* If we reached here, then we haven't yet added the item. This means 4014 * that we should add the item at the end of the list. 4015 */ 4016 list_add_tail(&new_pit->list, flex_pit_list); 4017 return 0; 4018 } 4019 4020 /** 4021 * __i40e_reprogram_flex_pit - Re-program specific FLX_PIT table 4022 * @pf: Pointer to the PF structure 4023 * @flex_pit_list: list of flexible src offsets in use 4024 * @flex_pit_start: index to first entry for this section of the table 4025 * 4026 * In order to handle flexible data, the hardware uses a table of values 4027 * called the FLX_PIT table. This table is used to indicate which sections of 4028 * the input correspond to what PIT index values. Unfortunately, hardware is 4029 * very restrictive about programming this table. Entries must be ordered by 4030 * src_offset in ascending order, without duplicates. Additionally, unused 4031 * entries must be set to the unused index value, and must have valid size and 4032 * length according to the src_offset ordering. 4033 * 4034 * This function will reprogram the FLX_PIT register from a book-keeping 4035 * structure that we guarantee is already ordered correctly, and has no more 4036 * than 3 entries. 4037 * 4038 * To make things easier, we only support flexible values of one word length, 4039 * rather than allowing variable length flexible values. 4040 **/ 4041 static void __i40e_reprogram_flex_pit(struct i40e_pf *pf, 4042 struct list_head *flex_pit_list, 4043 int flex_pit_start) 4044 { 4045 struct i40e_flex_pit *entry = NULL; 4046 u16 last_offset = 0; 4047 int i = 0, j = 0; 4048 4049 /* First, loop over the list of flex PIT entries, and reprogram the 4050 * registers. 4051 */ 4052 list_for_each_entry(entry, flex_pit_list, list) { 4053 /* We have to be careful when programming values for the 4054 * largest SRC_OFFSET value. It is possible that adding 4055 * additional empty values at the end would overflow the space 4056 * for the SRC_OFFSET in the FLX_PIT register. To avoid this, 4057 * we check here and add the empty values prior to adding the 4058 * largest value. 4059 * 4060 * To determine this, we will use a loop from i+1 to 3, which 4061 * will determine whether the unused entries would have valid 4062 * SRC_OFFSET. Note that there cannot be extra entries past 4063 * this value, because the only valid values would have been 4064 * larger than I40E_MAX_FLEX_SRC_OFFSET, and thus would not 4065 * have been added to the list in the first place. 4066 */ 4067 for (j = i + 1; j < 3; j++) { 4068 u16 offset = entry->src_offset + j; 4069 int index = flex_pit_start + i; 4070 u32 value = I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 4071 1, 4072 offset - 3); 4073 4074 if (offset > I40E_MAX_FLEX_SRC_OFFSET) { 4075 i40e_write_rx_ctl(&pf->hw, 4076 I40E_PRTQF_FLX_PIT(index), 4077 value); 4078 i++; 4079 } 4080 } 4081 4082 /* Now, we can program the actual value into the table */ 4083 i40e_write_rx_ctl(&pf->hw, 4084 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 4085 I40E_FLEX_PREP_VAL(entry->pit_index + 50, 4086 1, 4087 entry->src_offset)); 4088 i++; 4089 } 4090 4091 /* In order to program the last entries in the table, we need to 4092 * determine the valid offset. If the list is empty, we'll just start 4093 * with 0. Otherwise, we'll start with the last item offset and add 1. 4094 * This ensures that all entries have valid sizes. If we don't do this 4095 * correctly, the hardware will disable flexible field parsing. 4096 */ 4097 if (!list_empty(flex_pit_list)) 4098 last_offset = list_prev_entry(entry, list)->src_offset + 1; 4099 4100 for (; i < 3; i++, last_offset++) { 4101 i40e_write_rx_ctl(&pf->hw, 4102 I40E_PRTQF_FLX_PIT(flex_pit_start + i), 4103 I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED, 4104 1, 4105 last_offset)); 4106 } 4107 } 4108 4109 /** 4110 * i40e_reprogram_flex_pit - Reprogram all FLX_PIT tables after input set change 4111 * @pf: pointer to the PF structure 4112 * 4113 * This function reprograms both the L3 and L4 FLX_PIT tables. See the 4114 * internal helper function for implementation details. 4115 **/ 4116 static void i40e_reprogram_flex_pit(struct i40e_pf *pf) 4117 { 4118 __i40e_reprogram_flex_pit(pf, &pf->l3_flex_pit_list, 4119 I40E_FLEX_PIT_IDX_START_L3); 4120 4121 __i40e_reprogram_flex_pit(pf, &pf->l4_flex_pit_list, 4122 I40E_FLEX_PIT_IDX_START_L4); 4123 4124 /* We also need to program the L3 and L4 GLQF ORT register */ 4125 i40e_write_rx_ctl(&pf->hw, 4126 I40E_GLQF_ORT(I40E_L3_GLQF_ORT_IDX), 4127 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L3, 4128 3, 1)); 4129 4130 i40e_write_rx_ctl(&pf->hw, 4131 I40E_GLQF_ORT(I40E_L4_GLQF_ORT_IDX), 4132 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L4, 4133 3, 1)); 4134 } 4135 4136 /** 4137 * i40e_flow_str - Converts a flow_type into a human readable string 4138 * @fsp: the flow specification 4139 * 4140 * Currently only flow types we support are included here, and the string 4141 * value attempts to match what ethtool would use to configure this flow type. 4142 **/ 4143 static const char *i40e_flow_str(struct ethtool_rx_flow_spec *fsp) 4144 { 4145 switch (fsp->flow_type & ~FLOW_EXT) { 4146 case TCP_V4_FLOW: 4147 return "tcp4"; 4148 case UDP_V4_FLOW: 4149 return "udp4"; 4150 case SCTP_V4_FLOW: 4151 return "sctp4"; 4152 case IP_USER_FLOW: 4153 return "ip4"; 4154 case TCP_V6_FLOW: 4155 return "tcp6"; 4156 case UDP_V6_FLOW: 4157 return "udp6"; 4158 case SCTP_V6_FLOW: 4159 return "sctp6"; 4160 case IPV6_USER_FLOW: 4161 return "ip6"; 4162 default: 4163 return "unknown"; 4164 } 4165 } 4166 4167 /** 4168 * i40e_pit_index_to_mask - Return the FLEX mask for a given PIT index 4169 * @pit_index: PIT index to convert 4170 * 4171 * Returns the mask for a given PIT index. Will return 0 if the pit_index is 4172 * of range. 4173 **/ 4174 static u64 i40e_pit_index_to_mask(int pit_index) 4175 { 4176 switch (pit_index) { 4177 case 0: 4178 return I40E_FLEX_50_MASK; 4179 case 1: 4180 return I40E_FLEX_51_MASK; 4181 case 2: 4182 return I40E_FLEX_52_MASK; 4183 case 3: 4184 return I40E_FLEX_53_MASK; 4185 case 4: 4186 return I40E_FLEX_54_MASK; 4187 case 5: 4188 return I40E_FLEX_55_MASK; 4189 case 6: 4190 return I40E_FLEX_56_MASK; 4191 case 7: 4192 return I40E_FLEX_57_MASK; 4193 default: 4194 return 0; 4195 } 4196 } 4197 4198 /** 4199 * i40e_print_input_set - Show changes between two input sets 4200 * @vsi: the vsi being configured 4201 * @old: the old input set 4202 * @new: the new input set 4203 * 4204 * Print the difference between old and new input sets by showing which series 4205 * of words are toggled on or off. Only displays the bits we actually support 4206 * changing. 4207 **/ 4208 static void i40e_print_input_set(struct i40e_vsi *vsi, u64 old, u64 new) 4209 { 4210 struct i40e_pf *pf = vsi->back; 4211 bool old_value, new_value; 4212 int i; 4213 4214 old_value = !!(old & I40E_L3_SRC_MASK); 4215 new_value = !!(new & I40E_L3_SRC_MASK); 4216 if (old_value != new_value) 4217 netif_info(pf, drv, vsi->netdev, "L3 source address: %s -> %s\n", 4218 old_value ? "ON" : "OFF", 4219 new_value ? "ON" : "OFF"); 4220 4221 old_value = !!(old & I40E_L3_DST_MASK); 4222 new_value = !!(new & I40E_L3_DST_MASK); 4223 if (old_value != new_value) 4224 netif_info(pf, drv, vsi->netdev, "L3 destination address: %s -> %s\n", 4225 old_value ? "ON" : "OFF", 4226 new_value ? "ON" : "OFF"); 4227 4228 old_value = !!(old & I40E_L4_SRC_MASK); 4229 new_value = !!(new & I40E_L4_SRC_MASK); 4230 if (old_value != new_value) 4231 netif_info(pf, drv, vsi->netdev, "L4 source port: %s -> %s\n", 4232 old_value ? "ON" : "OFF", 4233 new_value ? "ON" : "OFF"); 4234 4235 old_value = !!(old & I40E_L4_DST_MASK); 4236 new_value = !!(new & I40E_L4_DST_MASK); 4237 if (old_value != new_value) 4238 netif_info(pf, drv, vsi->netdev, "L4 destination port: %s -> %s\n", 4239 old_value ? "ON" : "OFF", 4240 new_value ? "ON" : "OFF"); 4241 4242 old_value = !!(old & I40E_VERIFY_TAG_MASK); 4243 new_value = !!(new & I40E_VERIFY_TAG_MASK); 4244 if (old_value != new_value) 4245 netif_info(pf, drv, vsi->netdev, "SCTP verification tag: %s -> %s\n", 4246 old_value ? "ON" : "OFF", 4247 new_value ? "ON" : "OFF"); 4248 4249 /* Show change of flexible filter entries */ 4250 for (i = 0; i < I40E_FLEX_INDEX_ENTRIES; i++) { 4251 u64 flex_mask = i40e_pit_index_to_mask(i); 4252 4253 old_value = !!(old & flex_mask); 4254 new_value = !!(new & flex_mask); 4255 if (old_value != new_value) 4256 netif_info(pf, drv, vsi->netdev, "FLEX index %d: %s -> %s\n", 4257 i, 4258 old_value ? "ON" : "OFF", 4259 new_value ? "ON" : "OFF"); 4260 } 4261 4262 netif_info(pf, drv, vsi->netdev, " Current input set: %0llx\n", 4263 old); 4264 netif_info(pf, drv, vsi->netdev, "Requested input set: %0llx\n", 4265 new); 4266 } 4267 4268 /** 4269 * i40e_check_fdir_input_set - Check that a given rx_flow_spec mask is valid 4270 * @vsi: pointer to the targeted VSI 4271 * @fsp: pointer to Rx flow specification 4272 * @userdef: userdefined data from flow specification 4273 * 4274 * Ensures that a given ethtool_rx_flow_spec has a valid mask. Some support 4275 * for partial matches exists with a few limitations. First, hardware only 4276 * supports masking by word boundary (2 bytes) and not per individual bit. 4277 * Second, hardware is limited to using one mask for a flow type and cannot 4278 * use a separate mask for each filter. 4279 * 4280 * To support these limitations, if we already have a configured filter for 4281 * the specified type, this function enforces that new filters of the type 4282 * match the configured input set. Otherwise, if we do not have a filter of 4283 * the specified type, we allow the input set to be updated to match the 4284 * desired filter. 4285 * 4286 * To help ensure that administrators understand why filters weren't displayed 4287 * as supported, we print a diagnostic message displaying how the input set 4288 * would change and warning to delete the preexisting filters if required. 4289 * 4290 * Returns 0 on successful input set match, and a negative return code on 4291 * failure. 4292 **/ 4293 static int i40e_check_fdir_input_set(struct i40e_vsi *vsi, 4294 struct ethtool_rx_flow_spec *fsp, 4295 struct i40e_rx_flow_userdef *userdef) 4296 { 4297 static const __be32 ipv6_full_mask[4] = {cpu_to_be32(0xffffffff), 4298 cpu_to_be32(0xffffffff), cpu_to_be32(0xffffffff), 4299 cpu_to_be32(0xffffffff)}; 4300 struct ethtool_tcpip6_spec *tcp_ip6_spec; 4301 struct ethtool_usrip6_spec *usr_ip6_spec; 4302 struct ethtool_tcpip4_spec *tcp_ip4_spec; 4303 struct ethtool_usrip4_spec *usr_ip4_spec; 4304 struct i40e_pf *pf = vsi->back; 4305 u64 current_mask, new_mask; 4306 bool new_flex_offset = false; 4307 bool flex_l3 = false; 4308 u16 *fdir_filter_count; 4309 u16 index, src_offset = 0; 4310 u8 pit_index = 0; 4311 int err; 4312 4313 switch (fsp->flow_type & ~FLOW_EXT) { 4314 case SCTP_V4_FLOW: 4315 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP; 4316 fdir_filter_count = &pf->fd_sctp4_filter_cnt; 4317 break; 4318 case TCP_V4_FLOW: 4319 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; 4320 fdir_filter_count = &pf->fd_tcp4_filter_cnt; 4321 break; 4322 case UDP_V4_FLOW: 4323 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; 4324 fdir_filter_count = &pf->fd_udp4_filter_cnt; 4325 break; 4326 case SCTP_V6_FLOW: 4327 index = I40E_FILTER_PCTYPE_NONF_IPV6_SCTP; 4328 fdir_filter_count = &pf->fd_sctp6_filter_cnt; 4329 break; 4330 case TCP_V6_FLOW: 4331 index = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; 4332 fdir_filter_count = &pf->fd_tcp6_filter_cnt; 4333 break; 4334 case UDP_V6_FLOW: 4335 index = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; 4336 fdir_filter_count = &pf->fd_udp6_filter_cnt; 4337 break; 4338 case IP_USER_FLOW: 4339 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER; 4340 fdir_filter_count = &pf->fd_ip4_filter_cnt; 4341 flex_l3 = true; 4342 break; 4343 case IPV6_USER_FLOW: 4344 index = I40E_FILTER_PCTYPE_NONF_IPV6_OTHER; 4345 fdir_filter_count = &pf->fd_ip6_filter_cnt; 4346 flex_l3 = true; 4347 break; 4348 default: 4349 return -EOPNOTSUPP; 4350 } 4351 4352 /* Read the current input set from register memory. */ 4353 current_mask = i40e_read_fd_input_set(pf, index); 4354 new_mask = current_mask; 4355 4356 /* Determine, if any, the required changes to the input set in order 4357 * to support the provided mask. 4358 * 4359 * Hardware only supports masking at word (2 byte) granularity and does 4360 * not support full bitwise masking. This implementation simplifies 4361 * even further and only supports fully enabled or fully disabled 4362 * masks for each field, even though we could split the ip4src and 4363 * ip4dst fields. 4364 */ 4365 switch (fsp->flow_type & ~FLOW_EXT) { 4366 case SCTP_V4_FLOW: 4367 new_mask &= ~I40E_VERIFY_TAG_MASK; 4368 fallthrough; 4369 case TCP_V4_FLOW: 4370 case UDP_V4_FLOW: 4371 tcp_ip4_spec = &fsp->m_u.tcp_ip4_spec; 4372 4373 /* IPv4 source address */ 4374 if (tcp_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 4375 new_mask |= I40E_L3_SRC_MASK; 4376 else if (!tcp_ip4_spec->ip4src) 4377 new_mask &= ~I40E_L3_SRC_MASK; 4378 else 4379 return -EOPNOTSUPP; 4380 4381 /* IPv4 destination address */ 4382 if (tcp_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 4383 new_mask |= I40E_L3_DST_MASK; 4384 else if (!tcp_ip4_spec->ip4dst) 4385 new_mask &= ~I40E_L3_DST_MASK; 4386 else 4387 return -EOPNOTSUPP; 4388 4389 /* L4 source port */ 4390 if (tcp_ip4_spec->psrc == htons(0xFFFF)) 4391 new_mask |= I40E_L4_SRC_MASK; 4392 else if (!tcp_ip4_spec->psrc) 4393 new_mask &= ~I40E_L4_SRC_MASK; 4394 else 4395 return -EOPNOTSUPP; 4396 4397 /* L4 destination port */ 4398 if (tcp_ip4_spec->pdst == htons(0xFFFF)) 4399 new_mask |= I40E_L4_DST_MASK; 4400 else if (!tcp_ip4_spec->pdst) 4401 new_mask &= ~I40E_L4_DST_MASK; 4402 else 4403 return -EOPNOTSUPP; 4404 4405 /* Filtering on Type of Service is not supported. */ 4406 if (tcp_ip4_spec->tos) 4407 return -EOPNOTSUPP; 4408 4409 break; 4410 case SCTP_V6_FLOW: 4411 new_mask &= ~I40E_VERIFY_TAG_MASK; 4412 fallthrough; 4413 case TCP_V6_FLOW: 4414 case UDP_V6_FLOW: 4415 tcp_ip6_spec = &fsp->m_u.tcp_ip6_spec; 4416 4417 /* Check if user provided IPv6 source address. */ 4418 if (ipv6_addr_equal((struct in6_addr *)&tcp_ip6_spec->ip6src, 4419 (struct in6_addr *)&ipv6_full_mask)) 4420 new_mask |= I40E_L3_V6_SRC_MASK; 4421 else if (ipv6_addr_any((struct in6_addr *) 4422 &tcp_ip6_spec->ip6src)) 4423 new_mask &= ~I40E_L3_V6_SRC_MASK; 4424 else 4425 return -EOPNOTSUPP; 4426 4427 /* Check if user provided destination address. */ 4428 if (ipv6_addr_equal((struct in6_addr *)&tcp_ip6_spec->ip6dst, 4429 (struct in6_addr *)&ipv6_full_mask)) 4430 new_mask |= I40E_L3_V6_DST_MASK; 4431 else if (ipv6_addr_any((struct in6_addr *) 4432 &tcp_ip6_spec->ip6dst)) 4433 new_mask &= ~I40E_L3_V6_DST_MASK; 4434 else 4435 return -EOPNOTSUPP; 4436 4437 /* L4 source port */ 4438 if (tcp_ip6_spec->psrc == htons(0xFFFF)) 4439 new_mask |= I40E_L4_SRC_MASK; 4440 else if (!tcp_ip6_spec->psrc) 4441 new_mask &= ~I40E_L4_SRC_MASK; 4442 else 4443 return -EOPNOTSUPP; 4444 4445 /* L4 destination port */ 4446 if (tcp_ip6_spec->pdst == htons(0xFFFF)) 4447 new_mask |= I40E_L4_DST_MASK; 4448 else if (!tcp_ip6_spec->pdst) 4449 new_mask &= ~I40E_L4_DST_MASK; 4450 else 4451 return -EOPNOTSUPP; 4452 4453 /* Filtering on Traffic Classes is not supported. */ 4454 if (tcp_ip6_spec->tclass) 4455 return -EOPNOTSUPP; 4456 break; 4457 case IP_USER_FLOW: 4458 usr_ip4_spec = &fsp->m_u.usr_ip4_spec; 4459 4460 /* IPv4 source address */ 4461 if (usr_ip4_spec->ip4src == htonl(0xFFFFFFFF)) 4462 new_mask |= I40E_L3_SRC_MASK; 4463 else if (!usr_ip4_spec->ip4src) 4464 new_mask &= ~I40E_L3_SRC_MASK; 4465 else 4466 return -EOPNOTSUPP; 4467 4468 /* IPv4 destination address */ 4469 if (usr_ip4_spec->ip4dst == htonl(0xFFFFFFFF)) 4470 new_mask |= I40E_L3_DST_MASK; 4471 else if (!usr_ip4_spec->ip4dst) 4472 new_mask &= ~I40E_L3_DST_MASK; 4473 else 4474 return -EOPNOTSUPP; 4475 4476 /* First 4 bytes of L4 header */ 4477 if (usr_ip4_spec->l4_4_bytes) 4478 return -EOPNOTSUPP; 4479 4480 /* Filtering on Type of Service is not supported. */ 4481 if (usr_ip4_spec->tos) 4482 return -EOPNOTSUPP; 4483 4484 /* Filtering on IP version is not supported */ 4485 if (usr_ip4_spec->ip_ver) 4486 return -EINVAL; 4487 4488 /* Filtering on L4 protocol is not supported */ 4489 if (usr_ip4_spec->proto) 4490 return -EINVAL; 4491 4492 break; 4493 case IPV6_USER_FLOW: 4494 usr_ip6_spec = &fsp->m_u.usr_ip6_spec; 4495 4496 /* Check if user provided IPv6 source address. */ 4497 if (ipv6_addr_equal((struct in6_addr *)&usr_ip6_spec->ip6src, 4498 (struct in6_addr *)&ipv6_full_mask)) 4499 new_mask |= I40E_L3_V6_SRC_MASK; 4500 else if (ipv6_addr_any((struct in6_addr *) 4501 &usr_ip6_spec->ip6src)) 4502 new_mask &= ~I40E_L3_V6_SRC_MASK; 4503 else 4504 return -EOPNOTSUPP; 4505 4506 /* Check if user provided destination address. */ 4507 if (ipv6_addr_equal((struct in6_addr *)&usr_ip6_spec->ip6dst, 4508 (struct in6_addr *)&ipv6_full_mask)) 4509 new_mask |= I40E_L3_V6_DST_MASK; 4510 else if (ipv6_addr_any((struct in6_addr *) 4511 &usr_ip6_spec->ip6dst)) 4512 new_mask &= ~I40E_L3_V6_DST_MASK; 4513 else 4514 return -EOPNOTSUPP; 4515 4516 if (usr_ip6_spec->l4_4_bytes) 4517 return -EOPNOTSUPP; 4518 4519 /* Filtering on Traffic class is not supported. */ 4520 if (usr_ip6_spec->tclass) 4521 return -EOPNOTSUPP; 4522 4523 /* Filtering on L4 protocol is not supported */ 4524 if (usr_ip6_spec->l4_proto) 4525 return -EINVAL; 4526 4527 break; 4528 default: 4529 return -EOPNOTSUPP; 4530 } 4531 4532 if (fsp->flow_type & FLOW_EXT) { 4533 /* Allow only 802.1Q and no etype defined, as 4534 * later it's modified to 0x8100 4535 */ 4536 if (fsp->h_ext.vlan_etype != htons(ETH_P_8021Q) && 4537 fsp->h_ext.vlan_etype != 0) 4538 return -EOPNOTSUPP; 4539 if (fsp->m_ext.vlan_tci == htons(0xFFFF)) 4540 new_mask |= I40E_VLAN_SRC_MASK; 4541 else 4542 new_mask &= ~I40E_VLAN_SRC_MASK; 4543 } 4544 4545 /* First, clear all flexible filter entries */ 4546 new_mask &= ~I40E_FLEX_INPUT_MASK; 4547 4548 /* If we have a flexible filter, try to add this offset to the correct 4549 * flexible filter PIT list. Once finished, we can update the mask. 4550 * If the src_offset changed, we will get a new mask value which will 4551 * trigger an input set change. 4552 */ 4553 if (userdef->flex_filter) { 4554 struct i40e_flex_pit *l3_flex_pit = NULL, *flex_pit = NULL; 4555 4556 /* Flexible offset must be even, since the flexible payload 4557 * must be aligned on 2-byte boundary. 4558 */ 4559 if (userdef->flex_offset & 0x1) { 4560 dev_warn(&pf->pdev->dev, 4561 "Flexible data offset must be 2-byte aligned\n"); 4562 return -EINVAL; 4563 } 4564 4565 src_offset = userdef->flex_offset >> 1; 4566 4567 /* FLX_PIT source offset value is only so large */ 4568 if (src_offset > I40E_MAX_FLEX_SRC_OFFSET) { 4569 dev_warn(&pf->pdev->dev, 4570 "Flexible data must reside within first 64 bytes of the packet payload\n"); 4571 return -EINVAL; 4572 } 4573 4574 /* See if this offset has already been programmed. If we get 4575 * an ERR_PTR, then the filter is not safe to add. Otherwise, 4576 * if we get a NULL pointer, this means we will need to add 4577 * the offset. 4578 */ 4579 flex_pit = i40e_find_flex_offset(&pf->l4_flex_pit_list, 4580 src_offset); 4581 if (IS_ERR(flex_pit)) 4582 return PTR_ERR(flex_pit); 4583 4584 /* IP_USER_FLOW filters match both L4 (ICMP) and L3 (unknown) 4585 * packet types, and thus we need to program both L3 and L4 4586 * flexible values. These must have identical flexible index, 4587 * as otherwise we can't correctly program the input set. So 4588 * we'll find both an L3 and L4 index and make sure they are 4589 * the same. 4590 */ 4591 if (flex_l3) { 4592 l3_flex_pit = 4593 i40e_find_flex_offset(&pf->l3_flex_pit_list, 4594 src_offset); 4595 if (IS_ERR(l3_flex_pit)) 4596 return PTR_ERR(l3_flex_pit); 4597 4598 if (flex_pit) { 4599 /* If we already had a matching L4 entry, we 4600 * need to make sure that the L3 entry we 4601 * obtained uses the same index. 4602 */ 4603 if (l3_flex_pit) { 4604 if (l3_flex_pit->pit_index != 4605 flex_pit->pit_index) { 4606 return -EINVAL; 4607 } 4608 } else { 4609 new_flex_offset = true; 4610 } 4611 } else { 4612 flex_pit = l3_flex_pit; 4613 } 4614 } 4615 4616 /* If we didn't find an existing flex offset, we need to 4617 * program a new one. However, we don't immediately program it 4618 * here because we will wait to program until after we check 4619 * that it is safe to change the input set. 4620 */ 4621 if (!flex_pit) { 4622 new_flex_offset = true; 4623 pit_index = i40e_unused_pit_index(pf); 4624 } else { 4625 pit_index = flex_pit->pit_index; 4626 } 4627 4628 /* Update the mask with the new offset */ 4629 new_mask |= i40e_pit_index_to_mask(pit_index); 4630 } 4631 4632 /* If the mask and flexible filter offsets for this filter match the 4633 * currently programmed values we don't need any input set change, so 4634 * this filter is safe to install. 4635 */ 4636 if (new_mask == current_mask && !new_flex_offset) 4637 return 0; 4638 4639 netif_info(pf, drv, vsi->netdev, "Input set change requested for %s flows:\n", 4640 i40e_flow_str(fsp)); 4641 i40e_print_input_set(vsi, current_mask, new_mask); 4642 if (new_flex_offset) { 4643 netif_info(pf, drv, vsi->netdev, "FLEX index %d: Offset -> %d", 4644 pit_index, src_offset); 4645 } 4646 4647 /* Hardware input sets are global across multiple ports, so even the 4648 * main port cannot change them when in MFP mode as this would impact 4649 * any filters on the other ports. 4650 */ 4651 if (test_bit(I40E_FLAG_MFP_ENA, pf->flags)) { 4652 netif_err(pf, drv, vsi->netdev, "Cannot change Flow Director input sets while MFP is enabled\n"); 4653 return -EOPNOTSUPP; 4654 } 4655 4656 /* This filter requires us to update the input set. However, hardware 4657 * only supports one input set per flow type, and does not support 4658 * separate masks for each filter. This means that we can only support 4659 * a single mask for all filters of a specific type. 4660 * 4661 * If we have preexisting filters, they obviously depend on the 4662 * current programmed input set. Display a diagnostic message in this 4663 * case explaining why the filter could not be accepted. 4664 */ 4665 if (*fdir_filter_count) { 4666 netif_err(pf, drv, vsi->netdev, "Cannot change input set for %s flows until %d preexisting filters are removed\n", 4667 i40e_flow_str(fsp), 4668 *fdir_filter_count); 4669 return -EOPNOTSUPP; 4670 } 4671 4672 i40e_write_fd_input_set(pf, index, new_mask); 4673 4674 /* IP_USER_FLOW filters match both IPv4/Other and IPv4/Fragmented 4675 * frames. If we're programming the input set for IPv4/Other, we also 4676 * need to program the IPv4/Fragmented input set. Since we don't have 4677 * separate support, we'll always assume and enforce that the two flow 4678 * types must have matching input sets. 4679 */ 4680 if (index == I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) 4681 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4, 4682 new_mask); 4683 4684 /* Add the new offset and update table, if necessary */ 4685 if (new_flex_offset) { 4686 err = i40e_add_flex_offset(&pf->l4_flex_pit_list, src_offset, 4687 pit_index); 4688 if (err) 4689 return err; 4690 4691 if (flex_l3) { 4692 err = i40e_add_flex_offset(&pf->l3_flex_pit_list, 4693 src_offset, 4694 pit_index); 4695 if (err) 4696 return err; 4697 } 4698 4699 i40e_reprogram_flex_pit(pf); 4700 } 4701 4702 return 0; 4703 } 4704 4705 /** 4706 * i40e_match_fdir_filter - Return true of two filters match 4707 * @a: pointer to filter struct 4708 * @b: pointer to filter struct 4709 * 4710 * Returns true if the two filters match exactly the same criteria. I.e. they 4711 * match the same flow type and have the same parameters. We don't need to 4712 * check any input-set since all filters of the same flow type must use the 4713 * same input set. 4714 **/ 4715 static bool i40e_match_fdir_filter(struct i40e_fdir_filter *a, 4716 struct i40e_fdir_filter *b) 4717 { 4718 /* The filters do not much if any of these criteria differ. */ 4719 if (a->dst_ip != b->dst_ip || 4720 a->src_ip != b->src_ip || 4721 a->dst_port != b->dst_port || 4722 a->src_port != b->src_port || 4723 a->flow_type != b->flow_type || 4724 a->ipl4_proto != b->ipl4_proto || 4725 a->vlan_tag != b->vlan_tag || 4726 a->vlan_etype != b->vlan_etype) 4727 return false; 4728 4729 return true; 4730 } 4731 4732 /** 4733 * i40e_disallow_matching_filters - Check that new filters differ 4734 * @vsi: pointer to the targeted VSI 4735 * @input: new filter to check 4736 * 4737 * Due to hardware limitations, it is not possible for two filters that match 4738 * similar criteria to be programmed at the same time. This is true for a few 4739 * reasons: 4740 * 4741 * (a) all filters matching a particular flow type must use the same input 4742 * set, that is they must match the same criteria. 4743 * (b) different flow types will never match the same packet, as the flow type 4744 * is decided by hardware before checking which rules apply. 4745 * (c) hardware has no way to distinguish which order filters apply in. 4746 * 4747 * Due to this, we can't really support using the location data to order 4748 * filters in the hardware parsing. It is technically possible for the user to 4749 * request two filters matching the same criteria but which select different 4750 * queues. In this case, rather than keep both filters in the list, we reject 4751 * the 2nd filter when the user requests adding it. 4752 * 4753 * This avoids needing to track location for programming the filter to 4754 * hardware, and ensures that we avoid some strange scenarios involving 4755 * deleting filters which match the same criteria. 4756 **/ 4757 static int i40e_disallow_matching_filters(struct i40e_vsi *vsi, 4758 struct i40e_fdir_filter *input) 4759 { 4760 struct i40e_pf *pf = vsi->back; 4761 struct i40e_fdir_filter *rule; 4762 struct hlist_node *node2; 4763 4764 /* Loop through every filter, and check that it doesn't match */ 4765 hlist_for_each_entry_safe(rule, node2, 4766 &pf->fdir_filter_list, fdir_node) { 4767 /* Don't check the filters match if they share the same fd_id, 4768 * since the new filter is actually just updating the target 4769 * of the old filter. 4770 */ 4771 if (rule->fd_id == input->fd_id) 4772 continue; 4773 4774 /* If any filters match, then print a warning message to the 4775 * kernel message buffer and bail out. 4776 */ 4777 if (i40e_match_fdir_filter(rule, input)) { 4778 dev_warn(&pf->pdev->dev, 4779 "Existing user defined filter %d already matches this flow.\n", 4780 rule->fd_id); 4781 return -EINVAL; 4782 } 4783 } 4784 4785 return 0; 4786 } 4787 4788 /** 4789 * i40e_add_fdir_ethtool - Add/Remove Flow Director filters 4790 * @vsi: pointer to the targeted VSI 4791 * @cmd: command to get or set RX flow classification rules 4792 * 4793 * Add Flow Director filters for a specific flow spec based on their 4794 * protocol. Returns 0 if the filters were successfully added. 4795 **/ 4796 static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi, 4797 struct ethtool_rxnfc *cmd) 4798 { 4799 struct i40e_rx_flow_userdef userdef; 4800 struct ethtool_rx_flow_spec *fsp; 4801 struct i40e_fdir_filter *input; 4802 u16 dest_vsi = 0, q_index = 0; 4803 struct i40e_pf *pf; 4804 int ret = -EINVAL; 4805 u8 dest_ctl; 4806 4807 if (!vsi) 4808 return -EINVAL; 4809 pf = vsi->back; 4810 4811 if (!test_bit(I40E_FLAG_FD_SB_ENA, pf->flags)) 4812 return -EOPNOTSUPP; 4813 4814 if (test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state)) 4815 return -ENOSPC; 4816 4817 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) || 4818 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) 4819 return -EBUSY; 4820 4821 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) 4822 return -EBUSY; 4823 4824 fsp = (struct ethtool_rx_flow_spec *)&cmd->fs; 4825 4826 /* Parse the user-defined field */ 4827 if (i40e_parse_rx_flow_user_data(fsp, &userdef)) 4828 return -EINVAL; 4829 4830 /* Extended MAC field is not supported */ 4831 if (fsp->flow_type & FLOW_MAC_EXT) 4832 return -EINVAL; 4833 4834 ret = i40e_check_fdir_input_set(vsi, fsp, &userdef); 4835 if (ret) 4836 return ret; 4837 4838 if (fsp->location >= (pf->hw.func_caps.fd_filters_best_effort + 4839 pf->hw.func_caps.fd_filters_guaranteed)) { 4840 return -EINVAL; 4841 } 4842 4843 /* ring_cookie is either the drop index, or is a mask of the queue 4844 * index and VF id we wish to target. 4845 */ 4846 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) { 4847 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 4848 } else { 4849 u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie); 4850 u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie); 4851 4852 if (!vf) { 4853 if (ring >= vsi->num_queue_pairs) 4854 return -EINVAL; 4855 dest_vsi = vsi->id; 4856 } else { 4857 /* VFs are zero-indexed, so we subtract one here */ 4858 vf--; 4859 4860 if (vf >= pf->num_alloc_vfs) 4861 return -EINVAL; 4862 if (ring >= pf->vf[vf].num_queue_pairs) 4863 return -EINVAL; 4864 dest_vsi = pf->vf[vf].lan_vsi_id; 4865 } 4866 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX; 4867 q_index = ring; 4868 } 4869 4870 input = kzalloc(sizeof(*input), GFP_KERNEL); 4871 4872 if (!input) 4873 return -ENOMEM; 4874 4875 input->fd_id = fsp->location; 4876 input->q_index = q_index; 4877 input->dest_vsi = dest_vsi; 4878 input->dest_ctl = dest_ctl; 4879 input->fd_status = I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID; 4880 input->cnt_index = I40E_FD_SB_STAT_IDX(pf->hw.pf_id); 4881 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 4882 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 4883 input->flow_type = fsp->flow_type & ~FLOW_EXT; 4884 4885 input->vlan_etype = fsp->h_ext.vlan_etype; 4886 if (!fsp->m_ext.vlan_etype && fsp->h_ext.vlan_tci) 4887 input->vlan_etype = cpu_to_be16(ETH_P_8021Q); 4888 if (fsp->m_ext.vlan_tci && input->vlan_etype) 4889 input->vlan_tag = fsp->h_ext.vlan_tci; 4890 if (input->flow_type == IPV6_USER_FLOW || 4891 input->flow_type == UDP_V6_FLOW || 4892 input->flow_type == TCP_V6_FLOW || 4893 input->flow_type == SCTP_V6_FLOW) { 4894 /* Reverse the src and dest notion, since the HW expects them 4895 * to be from Tx perspective where as the input from user is 4896 * from Rx filter view. 4897 */ 4898 input->ipl4_proto = fsp->h_u.usr_ip6_spec.l4_proto; 4899 input->dst_port = fsp->h_u.tcp_ip6_spec.psrc; 4900 input->src_port = fsp->h_u.tcp_ip6_spec.pdst; 4901 memcpy(input->dst_ip6, fsp->h_u.ah_ip6_spec.ip6src, 4902 sizeof(__be32) * 4); 4903 memcpy(input->src_ip6, fsp->h_u.ah_ip6_spec.ip6dst, 4904 sizeof(__be32) * 4); 4905 } else { 4906 /* Reverse the src and dest notion, since the HW expects them 4907 * to be from Tx perspective where as the input from user is 4908 * from Rx filter view. 4909 */ 4910 input->ipl4_proto = fsp->h_u.usr_ip4_spec.proto; 4911 input->dst_port = fsp->h_u.tcp_ip4_spec.psrc; 4912 input->src_port = fsp->h_u.tcp_ip4_spec.pdst; 4913 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src; 4914 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst; 4915 } 4916 4917 if (userdef.flex_filter) { 4918 input->flex_filter = true; 4919 input->flex_word = cpu_to_be16(userdef.flex_word); 4920 input->flex_offset = userdef.flex_offset; 4921 } 4922 4923 /* Avoid programming two filters with identical match criteria. */ 4924 ret = i40e_disallow_matching_filters(vsi, input); 4925 if (ret) 4926 goto free_filter_memory; 4927 4928 /* Add the input filter to the fdir_input_list, possibly replacing 4929 * a previous filter. Do not free the input structure after adding it 4930 * to the list as this would cause a use-after-free bug. 4931 */ 4932 i40e_update_ethtool_fdir_entry(vsi, input, fsp->location, NULL); 4933 ret = i40e_add_del_fdir(vsi, input, true); 4934 if (ret) 4935 goto remove_sw_rule; 4936 return 0; 4937 4938 remove_sw_rule: 4939 hlist_del(&input->fdir_node); 4940 pf->fdir_pf_active_filters--; 4941 free_filter_memory: 4942 kfree(input); 4943 return ret; 4944 } 4945 4946 /** 4947 * i40e_set_rxnfc - command to set RX flow classification rules 4948 * @netdev: network interface device structure 4949 * @cmd: ethtool rxnfc command 4950 * 4951 * Returns Success if the command is supported. 4952 **/ 4953 static int i40e_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd) 4954 { 4955 struct i40e_netdev_priv *np = netdev_priv(netdev); 4956 struct i40e_vsi *vsi = np->vsi; 4957 struct i40e_pf *pf = vsi->back; 4958 int ret = -EOPNOTSUPP; 4959 4960 switch (cmd->cmd) { 4961 case ETHTOOL_SRXFH: 4962 ret = i40e_set_rss_hash_opt(pf, cmd); 4963 break; 4964 case ETHTOOL_SRXCLSRLINS: 4965 ret = i40e_add_fdir_ethtool(vsi, cmd); 4966 break; 4967 case ETHTOOL_SRXCLSRLDEL: 4968 ret = i40e_del_fdir_entry(vsi, cmd); 4969 break; 4970 default: 4971 break; 4972 } 4973 4974 return ret; 4975 } 4976 4977 /** 4978 * i40e_max_channels - get Max number of combined channels supported 4979 * @vsi: vsi pointer 4980 **/ 4981 static unsigned int i40e_max_channels(struct i40e_vsi *vsi) 4982 { 4983 /* TODO: This code assumes DCB and FD is disabled for now. */ 4984 return vsi->alloc_queue_pairs; 4985 } 4986 4987 /** 4988 * i40e_get_channels - Get the current channels enabled and max supported etc. 4989 * @dev: network interface device structure 4990 * @ch: ethtool channels structure 4991 * 4992 * We don't support separate tx and rx queues as channels. The other count 4993 * represents how many queues are being used for control. max_combined counts 4994 * how many queue pairs we can support. They may not be mapped 1 to 1 with 4995 * q_vectors since we support a lot more queue pairs than q_vectors. 4996 **/ 4997 static void i40e_get_channels(struct net_device *dev, 4998 struct ethtool_channels *ch) 4999 { 5000 struct i40e_netdev_priv *np = netdev_priv(dev); 5001 struct i40e_vsi *vsi = np->vsi; 5002 struct i40e_pf *pf = vsi->back; 5003 5004 /* report maximum channels */ 5005 ch->max_combined = i40e_max_channels(vsi); 5006 5007 /* report info for other vector */ 5008 ch->other_count = test_bit(I40E_FLAG_FD_SB_ENA, pf->flags) ? 1 : 0; 5009 ch->max_other = ch->other_count; 5010 5011 /* Note: This code assumes DCB is disabled for now. */ 5012 ch->combined_count = vsi->num_queue_pairs; 5013 } 5014 5015 /** 5016 * i40e_set_channels - Set the new channels count. 5017 * @dev: network interface device structure 5018 * @ch: ethtool channels structure 5019 * 5020 * The new channels count may not be the same as requested by the user 5021 * since it gets rounded down to a power of 2 value. 5022 **/ 5023 static int i40e_set_channels(struct net_device *dev, 5024 struct ethtool_channels *ch) 5025 { 5026 const u8 drop = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; 5027 struct i40e_netdev_priv *np = netdev_priv(dev); 5028 unsigned int count = ch->combined_count; 5029 struct i40e_vsi *vsi = np->vsi; 5030 struct i40e_pf *pf = vsi->back; 5031 struct i40e_fdir_filter *rule; 5032 struct hlist_node *node2; 5033 int new_count; 5034 int err = 0; 5035 5036 /* We do not support setting channels for any other VSI at present */ 5037 if (vsi->type != I40E_VSI_MAIN) 5038 return -EINVAL; 5039 5040 /* We do not support setting channels via ethtool when TCs are 5041 * configured through mqprio 5042 */ 5043 if (i40e_is_tc_mqprio_enabled(pf)) 5044 return -EINVAL; 5045 5046 /* verify they are not requesting separate vectors */ 5047 if (!count || ch->rx_count || ch->tx_count) 5048 return -EINVAL; 5049 5050 /* verify other_count has not changed */ 5051 if (ch->other_count != (test_bit(I40E_FLAG_FD_SB_ENA, pf->flags) ? 1 : 0)) 5052 return -EINVAL; 5053 5054 /* verify the number of channels does not exceed hardware limits */ 5055 if (count > i40e_max_channels(vsi)) 5056 return -EINVAL; 5057 5058 /* verify that the number of channels does not invalidate any current 5059 * flow director rules 5060 */ 5061 hlist_for_each_entry_safe(rule, node2, 5062 &pf->fdir_filter_list, fdir_node) { 5063 if (rule->dest_ctl != drop && count <= rule->q_index) { 5064 dev_warn(&pf->pdev->dev, 5065 "Existing user defined filter %d assigns flow to queue %d\n", 5066 rule->fd_id, rule->q_index); 5067 err = -EINVAL; 5068 } 5069 } 5070 5071 if (err) { 5072 dev_err(&pf->pdev->dev, 5073 "Existing filter rules must be deleted to reduce combined channel count to %d\n", 5074 count); 5075 return err; 5076 } 5077 5078 /* update feature limits from largest to smallest supported values */ 5079 /* TODO: Flow director limit, DCB etc */ 5080 5081 /* use rss_reconfig to rebuild with new queue count and update traffic 5082 * class queue mapping 5083 */ 5084 new_count = i40e_reconfig_rss_queues(pf, count); 5085 if (new_count > 0) 5086 return 0; 5087 else 5088 return -EINVAL; 5089 } 5090 5091 /** 5092 * i40e_get_rxfh_key_size - get the RSS hash key size 5093 * @netdev: network interface device structure 5094 * 5095 * Returns the table size. 5096 **/ 5097 static u32 i40e_get_rxfh_key_size(struct net_device *netdev) 5098 { 5099 return I40E_HKEY_ARRAY_SIZE; 5100 } 5101 5102 /** 5103 * i40e_get_rxfh_indir_size - get the rx flow hash indirection table size 5104 * @netdev: network interface device structure 5105 * 5106 * Returns the table size. 5107 **/ 5108 static u32 i40e_get_rxfh_indir_size(struct net_device *netdev) 5109 { 5110 return I40E_HLUT_ARRAY_SIZE; 5111 } 5112 5113 /** 5114 * i40e_get_rxfh - get the rx flow hash indirection table 5115 * @netdev: network interface device structure 5116 * @rxfh: pointer to param struct (indir, key, hfunc) 5117 * 5118 * Reads the indirection table directly from the hardware. Returns 0 on 5119 * success. 5120 **/ 5121 static int i40e_get_rxfh(struct net_device *netdev, 5122 struct ethtool_rxfh_param *rxfh) 5123 { 5124 struct i40e_netdev_priv *np = netdev_priv(netdev); 5125 struct i40e_vsi *vsi = np->vsi; 5126 u8 *lut, *seed = NULL; 5127 int ret; 5128 u16 i; 5129 5130 rxfh->hfunc = ETH_RSS_HASH_TOP; 5131 5132 if (!rxfh->indir) 5133 return 0; 5134 5135 seed = rxfh->key; 5136 lut = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 5137 if (!lut) 5138 return -ENOMEM; 5139 ret = i40e_get_rss(vsi, seed, lut, I40E_HLUT_ARRAY_SIZE); 5140 if (ret) 5141 goto out; 5142 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 5143 rxfh->indir[i] = (u32)(lut[i]); 5144 5145 out: 5146 kfree(lut); 5147 5148 return ret; 5149 } 5150 5151 /** 5152 * i40e_set_rxfh - set the rx flow hash indirection table 5153 * @netdev: network interface device structure 5154 * @rxfh: pointer to param struct (indir, key, hfunc) 5155 * @extack: extended ACK from the Netlink message 5156 * 5157 * Returns -EINVAL if the table specifies an invalid queue id, otherwise 5158 * returns 0 after programming the table. 5159 **/ 5160 static int i40e_set_rxfh(struct net_device *netdev, 5161 struct ethtool_rxfh_param *rxfh, 5162 struct netlink_ext_ack *extack) 5163 { 5164 struct i40e_netdev_priv *np = netdev_priv(netdev); 5165 struct i40e_vsi *vsi = np->vsi; 5166 struct i40e_pf *pf = vsi->back; 5167 u8 *seed = NULL; 5168 u16 i; 5169 5170 if (rxfh->hfunc != ETH_RSS_HASH_NO_CHANGE && 5171 rxfh->hfunc != ETH_RSS_HASH_TOP) 5172 return -EOPNOTSUPP; 5173 5174 if (rxfh->key) { 5175 if (!vsi->rss_hkey_user) { 5176 vsi->rss_hkey_user = kzalloc(I40E_HKEY_ARRAY_SIZE, 5177 GFP_KERNEL); 5178 if (!vsi->rss_hkey_user) 5179 return -ENOMEM; 5180 } 5181 memcpy(vsi->rss_hkey_user, rxfh->key, I40E_HKEY_ARRAY_SIZE); 5182 seed = vsi->rss_hkey_user; 5183 } 5184 if (!vsi->rss_lut_user) { 5185 vsi->rss_lut_user = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); 5186 if (!vsi->rss_lut_user) 5187 return -ENOMEM; 5188 } 5189 5190 /* Each 32 bits pointed by 'indir' is stored with a lut entry */ 5191 if (rxfh->indir) 5192 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) 5193 vsi->rss_lut_user[i] = (u8)(rxfh->indir[i]); 5194 else 5195 i40e_fill_rss_lut(pf, vsi->rss_lut_user, I40E_HLUT_ARRAY_SIZE, 5196 vsi->rss_size); 5197 5198 return i40e_config_rss(vsi, seed, vsi->rss_lut_user, 5199 I40E_HLUT_ARRAY_SIZE); 5200 } 5201 5202 /** 5203 * i40e_get_priv_flags - report device private flags 5204 * @dev: network interface device structure 5205 * 5206 * The get string set count and the string set should be matched for each 5207 * flag returned. Add new strings for each flag to the i40e_gstrings_priv_flags 5208 * array. 5209 * 5210 * Returns a u32 bitmap of flags. 5211 **/ 5212 static u32 i40e_get_priv_flags(struct net_device *dev) 5213 { 5214 struct i40e_netdev_priv *np = netdev_priv(dev); 5215 struct i40e_vsi *vsi = np->vsi; 5216 struct i40e_pf *pf = vsi->back; 5217 u32 i, j, ret_flags = 0; 5218 5219 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 5220 const struct i40e_priv_flags *priv_flag; 5221 5222 priv_flag = &i40e_gstrings_priv_flags[i]; 5223 5224 if (test_bit(priv_flag->bitno, pf->flags)) 5225 ret_flags |= BIT(i); 5226 } 5227 5228 if (pf->hw.pf_id != 0) 5229 return ret_flags; 5230 5231 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 5232 const struct i40e_priv_flags *priv_flag; 5233 5234 priv_flag = &i40e_gl_gstrings_priv_flags[j]; 5235 5236 if (test_bit(priv_flag->bitno, pf->flags)) 5237 ret_flags |= BIT(i + j); 5238 } 5239 5240 return ret_flags; 5241 } 5242 5243 /** 5244 * i40e_set_priv_flags - set private flags 5245 * @dev: network interface device structure 5246 * @flags: bit flags to be set 5247 **/ 5248 static int i40e_set_priv_flags(struct net_device *dev, u32 flags) 5249 { 5250 DECLARE_BITMAP(changed_flags, I40E_PF_FLAGS_NBITS); 5251 DECLARE_BITMAP(orig_flags, I40E_PF_FLAGS_NBITS); 5252 DECLARE_BITMAP(new_flags, I40E_PF_FLAGS_NBITS); 5253 struct i40e_netdev_priv *np = netdev_priv(dev); 5254 enum i40e_admin_queue_err adq_err; 5255 struct i40e_vsi *vsi = np->vsi; 5256 struct i40e_pf *pf = vsi->back; 5257 u32 reset_needed = 0; 5258 int status; 5259 u32 i, j; 5260 5261 bitmap_copy(orig_flags, pf->flags, I40E_PF_FLAGS_NBITS); 5262 bitmap_copy(new_flags, pf->flags, I40E_PF_FLAGS_NBITS); 5263 5264 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { 5265 const struct i40e_priv_flags *priv_flag; 5266 bool new_val; 5267 5268 priv_flag = &i40e_gstrings_priv_flags[i]; 5269 new_val = (flags & BIT(i)) ? true : false; 5270 5271 /* If this is a read-only flag, it can't be changed */ 5272 if (priv_flag->read_only && 5273 test_bit(priv_flag->bitno, orig_flags) != new_val) 5274 return -EOPNOTSUPP; 5275 5276 if (new_val) 5277 set_bit(priv_flag->bitno, new_flags); 5278 else 5279 clear_bit(priv_flag->bitno, new_flags); 5280 } 5281 5282 if (pf->hw.pf_id != 0) 5283 goto flags_complete; 5284 5285 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) { 5286 const struct i40e_priv_flags *priv_flag; 5287 bool new_val; 5288 5289 priv_flag = &i40e_gl_gstrings_priv_flags[j]; 5290 new_val = (flags & BIT(i + j)) ? true : false; 5291 5292 /* If this is a read-only flag, it can't be changed */ 5293 if (priv_flag->read_only && 5294 test_bit(priv_flag->bitno, orig_flags) != new_val) 5295 return -EOPNOTSUPP; 5296 5297 if (new_val) 5298 set_bit(priv_flag->bitno, new_flags); 5299 else 5300 clear_bit(priv_flag->bitno, new_flags); 5301 } 5302 5303 flags_complete: 5304 bitmap_xor(changed_flags, new_flags, orig_flags, I40E_PF_FLAGS_NBITS); 5305 5306 if (test_bit(I40E_FLAG_FW_LLDP_DIS, changed_flags)) 5307 reset_needed = I40E_PF_RESET_AND_REBUILD_FLAG; 5308 5309 if (test_bit(I40E_FLAG_VEB_STATS_ENA, changed_flags) || 5310 test_bit(I40E_FLAG_LEGACY_RX_ENA, changed_flags) || 5311 test_bit(I40E_FLAG_SOURCE_PRUNING_DIS, changed_flags)) 5312 reset_needed = BIT(__I40E_PF_RESET_REQUESTED); 5313 5314 /* Before we finalize any flag changes, we need to perform some 5315 * checks to ensure that the changes are supported and safe. 5316 */ 5317 5318 /* ATR eviction is not supported on all devices */ 5319 if (test_bit(I40E_FLAG_HW_ATR_EVICT_ENA, new_flags) && 5320 !test_bit(I40E_HW_CAP_ATR_EVICT, pf->hw.caps)) 5321 return -EOPNOTSUPP; 5322 5323 /* If the driver detected FW LLDP was disabled on init, this flag could 5324 * be set, however we do not support _changing_ the flag: 5325 * - on XL710 if NPAR is enabled or FW API version < 1.7 5326 * - on X722 with FW API version < 1.6 5327 * There are situations where older FW versions/NPAR enabled PFs could 5328 * disable LLDP, however we _must_ not allow the user to enable/disable 5329 * LLDP with this flag on unsupported FW versions. 5330 */ 5331 if (test_bit(I40E_FLAG_FW_LLDP_DIS, changed_flags) && 5332 !test_bit(I40E_HW_CAP_FW_LLDP_STOPPABLE, pf->hw.caps)) { 5333 dev_warn(&pf->pdev->dev, 5334 "Device does not support changing FW LLDP\n"); 5335 return -EOPNOTSUPP; 5336 } 5337 5338 if (test_bit(I40E_FLAG_RS_FEC, changed_flags) && 5339 pf->hw.device_id != I40E_DEV_ID_25G_SFP28 && 5340 pf->hw.device_id != I40E_DEV_ID_25G_B) { 5341 dev_warn(&pf->pdev->dev, 5342 "Device does not support changing FEC configuration\n"); 5343 return -EOPNOTSUPP; 5344 } 5345 5346 if (test_bit(I40E_FLAG_BASE_R_FEC, changed_flags) && 5347 pf->hw.device_id != I40E_DEV_ID_25G_SFP28 && 5348 pf->hw.device_id != I40E_DEV_ID_25G_B && 5349 pf->hw.device_id != I40E_DEV_ID_KX_X722) { 5350 dev_warn(&pf->pdev->dev, 5351 "Device does not support changing FEC configuration\n"); 5352 return -EOPNOTSUPP; 5353 } 5354 5355 /* Process any additional changes needed as a result of flag changes. 5356 * The changed_flags value reflects the list of bits that were 5357 * changed in the code above. 5358 */ 5359 5360 /* Flush current ATR settings if ATR was disabled */ 5361 if (test_bit(I40E_FLAG_FD_ATR_ENA, changed_flags) && 5362 !test_bit(I40E_FLAG_FD_ATR_ENA, new_flags)) { 5363 set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state); 5364 set_bit(__I40E_FD_FLUSH_REQUESTED, pf->state); 5365 } 5366 5367 if (test_bit(I40E_FLAG_TRUE_PROMISC_ENA, changed_flags)) { 5368 u16 sw_flags = 0, valid_flags = 0; 5369 int ret; 5370 5371 if (!test_bit(I40E_FLAG_TRUE_PROMISC_ENA, new_flags)) 5372 sw_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 5373 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; 5374 ret = i40e_aq_set_switch_config(&pf->hw, sw_flags, valid_flags, 5375 0, NULL); 5376 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) { 5377 dev_info(&pf->pdev->dev, 5378 "couldn't set switch config bits, err %pe aq_err %s\n", 5379 ERR_PTR(ret), 5380 i40e_aq_str(&pf->hw, 5381 pf->hw.aq.asq_last_status)); 5382 /* not a fatal problem, just keep going */ 5383 } 5384 } 5385 5386 if (test_bit(I40E_FLAG_RS_FEC, changed_flags) || 5387 test_bit(I40E_FLAG_BASE_R_FEC, changed_flags)) { 5388 u8 fec_cfg = 0; 5389 5390 if (test_bit(I40E_FLAG_RS_FEC, new_flags) && 5391 test_bit(I40E_FLAG_BASE_R_FEC, new_flags)) { 5392 fec_cfg = I40E_AQ_SET_FEC_AUTO; 5393 } else if (test_bit(I40E_FLAG_RS_FEC, new_flags)) { 5394 fec_cfg = (I40E_AQ_SET_FEC_REQUEST_RS | 5395 I40E_AQ_SET_FEC_ABILITY_RS); 5396 } else if (test_bit(I40E_FLAG_BASE_R_FEC, new_flags)) { 5397 fec_cfg = (I40E_AQ_SET_FEC_REQUEST_KR | 5398 I40E_AQ_SET_FEC_ABILITY_KR); 5399 } 5400 if (i40e_set_fec_cfg(dev, fec_cfg)) 5401 dev_warn(&pf->pdev->dev, "Cannot change FEC config\n"); 5402 } 5403 5404 if (test_bit(I40E_FLAG_LINK_DOWN_ON_CLOSE_ENA, changed_flags) && 5405 test_bit(I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENA, orig_flags)) { 5406 dev_err(&pf->pdev->dev, 5407 "Setting link-down-on-close not supported on this port (because total-port-shutdown is enabled)\n"); 5408 return -EOPNOTSUPP; 5409 } 5410 5411 if (test_bit(I40E_FLAG_VF_VLAN_PRUNING_ENA, changed_flags) && 5412 pf->num_alloc_vfs) { 5413 dev_warn(&pf->pdev->dev, 5414 "Changing vf-vlan-pruning flag while VF(s) are active is not supported\n"); 5415 return -EOPNOTSUPP; 5416 } 5417 5418 if (test_bit(I40E_FLAG_LEGACY_RX_ENA, changed_flags) && 5419 I40E_2K_TOO_SMALL_WITH_PADDING) { 5420 dev_warn(&pf->pdev->dev, 5421 "2k Rx buffer is too small to fit standard MTU and skb_shared_info\n"); 5422 return -EOPNOTSUPP; 5423 } 5424 5425 if (test_bit(I40E_FLAG_LINK_DOWN_ON_CLOSE_ENA, changed_flags) && 5426 test_bit(I40E_FLAG_LINK_DOWN_ON_CLOSE_ENA, new_flags) && 5427 test_bit(I40E_FLAG_MFP_ENA, new_flags)) 5428 dev_warn(&pf->pdev->dev, 5429 "Turning on link-down-on-close flag may affect other partitions\n"); 5430 5431 if (test_bit(I40E_FLAG_FW_LLDP_DIS, changed_flags)) { 5432 if (test_bit(I40E_FLAG_FW_LLDP_DIS, new_flags)) { 5433 #ifdef CONFIG_I40E_DCB 5434 i40e_dcb_sw_default_config(pf); 5435 #endif /* CONFIG_I40E_DCB */ 5436 i40e_aq_cfg_lldp_mib_change_event(&pf->hw, false, NULL); 5437 i40e_aq_stop_lldp(&pf->hw, true, false, NULL); 5438 } else { 5439 status = i40e_aq_start_lldp(&pf->hw, false, NULL); 5440 if (status) { 5441 adq_err = pf->hw.aq.asq_last_status; 5442 switch (adq_err) { 5443 case I40E_AQ_RC_EEXIST: 5444 dev_warn(&pf->pdev->dev, 5445 "FW LLDP agent is already running\n"); 5446 reset_needed = 0; 5447 break; 5448 case I40E_AQ_RC_EPERM: 5449 dev_warn(&pf->pdev->dev, 5450 "Device configuration forbids SW from starting the LLDP agent.\n"); 5451 return -EINVAL; 5452 case I40E_AQ_RC_EAGAIN: 5453 dev_warn(&pf->pdev->dev, 5454 "Stop FW LLDP agent command is still being processed, please try again in a second.\n"); 5455 return -EBUSY; 5456 default: 5457 dev_warn(&pf->pdev->dev, 5458 "Starting FW LLDP agent failed: error: %pe, %s\n", 5459 ERR_PTR(status), 5460 i40e_aq_str(&pf->hw, 5461 adq_err)); 5462 return -EINVAL; 5463 } 5464 } 5465 } 5466 } 5467 5468 /* Now that we've checked to ensure that the new flags are valid, load 5469 * them into place. Since we only modify flags either (a) during 5470 * initialization or (b) while holding the RTNL lock, we don't need 5471 * anything fancy here. 5472 */ 5473 bitmap_copy(pf->flags, new_flags, I40E_PF_FLAGS_NBITS); 5474 5475 /* Issue reset to cause things to take effect, as additional bits 5476 * are added we will need to create a mask of bits requiring reset 5477 */ 5478 if (reset_needed) 5479 i40e_do_reset(pf, reset_needed, true); 5480 5481 return 0; 5482 } 5483 5484 /** 5485 * i40e_get_module_info - get (Q)SFP+ module type info 5486 * @netdev: network interface device structure 5487 * @modinfo: module EEPROM size and layout information structure 5488 **/ 5489 static int i40e_get_module_info(struct net_device *netdev, 5490 struct ethtool_modinfo *modinfo) 5491 { 5492 struct i40e_netdev_priv *np = netdev_priv(netdev); 5493 struct i40e_vsi *vsi = np->vsi; 5494 struct i40e_pf *pf = vsi->back; 5495 struct i40e_hw *hw = &pf->hw; 5496 u32 sff8472_comp = 0; 5497 u32 sff8472_swap = 0; 5498 u32 sff8636_rev = 0; 5499 u32 type = 0; 5500 int status; 5501 5502 /* Check if firmware supports reading module EEPROM. */ 5503 if (!test_bit(I40E_HW_CAP_AQ_PHY_ACCESS, hw->caps)) { 5504 netdev_err(vsi->netdev, "Module EEPROM memory read not supported. Please update the NVM image.\n"); 5505 return -EINVAL; 5506 } 5507 5508 status = i40e_update_link_info(hw); 5509 if (status) 5510 return -EIO; 5511 5512 if (hw->phy.link_info.phy_type == I40E_PHY_TYPE_EMPTY) { 5513 netdev_err(vsi->netdev, "Cannot read module EEPROM memory. No module connected.\n"); 5514 return -EINVAL; 5515 } 5516 5517 type = hw->phy.link_info.module_type[0]; 5518 5519 switch (type) { 5520 case I40E_MODULE_TYPE_SFP: 5521 status = i40e_aq_get_phy_register(hw, 5522 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 5523 I40E_I2C_EEPROM_DEV_ADDR, true, 5524 I40E_MODULE_SFF_8472_COMP, 5525 &sff8472_comp, NULL); 5526 if (status) 5527 return -EIO; 5528 5529 status = i40e_aq_get_phy_register(hw, 5530 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 5531 I40E_I2C_EEPROM_DEV_ADDR, true, 5532 I40E_MODULE_SFF_8472_SWAP, 5533 &sff8472_swap, NULL); 5534 if (status) 5535 return -EIO; 5536 5537 /* Check if the module requires address swap to access 5538 * the other EEPROM memory page. 5539 */ 5540 if (sff8472_swap & I40E_MODULE_SFF_ADDR_MODE) { 5541 netdev_warn(vsi->netdev, "Module address swap to access page 0xA2 is not supported.\n"); 5542 modinfo->type = ETH_MODULE_SFF_8079; 5543 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 5544 } else if (sff8472_comp == 0x00) { 5545 /* Module is not SFF-8472 compliant */ 5546 modinfo->type = ETH_MODULE_SFF_8079; 5547 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 5548 } else if (!(sff8472_swap & I40E_MODULE_SFF_DDM_IMPLEMENTED)) { 5549 /* Module is SFF-8472 compliant but doesn't implement 5550 * Digital Diagnostic Monitoring (DDM). 5551 */ 5552 modinfo->type = ETH_MODULE_SFF_8079; 5553 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 5554 } else { 5555 modinfo->type = ETH_MODULE_SFF_8472; 5556 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 5557 } 5558 break; 5559 case I40E_MODULE_TYPE_QSFP_PLUS: 5560 /* Read from memory page 0. */ 5561 status = i40e_aq_get_phy_register(hw, 5562 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 5563 0, true, 5564 I40E_MODULE_REVISION_ADDR, 5565 &sff8636_rev, NULL); 5566 if (status) 5567 return -EIO; 5568 /* Determine revision compliance byte */ 5569 if (sff8636_rev > 0x02) { 5570 /* Module is SFF-8636 compliant */ 5571 modinfo->type = ETH_MODULE_SFF_8636; 5572 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 5573 } else { 5574 modinfo->type = ETH_MODULE_SFF_8436; 5575 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 5576 } 5577 break; 5578 case I40E_MODULE_TYPE_QSFP28: 5579 modinfo->type = ETH_MODULE_SFF_8636; 5580 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN; 5581 break; 5582 default: 5583 netdev_dbg(vsi->netdev, "SFP module type unrecognized or no SFP connector used.\n"); 5584 return -EOPNOTSUPP; 5585 } 5586 return 0; 5587 } 5588 5589 /** 5590 * i40e_get_module_eeprom - fills buffer with (Q)SFP+ module memory contents 5591 * @netdev: network interface device structure 5592 * @ee: EEPROM dump request structure 5593 * @data: buffer to be filled with EEPROM contents 5594 **/ 5595 static int i40e_get_module_eeprom(struct net_device *netdev, 5596 struct ethtool_eeprom *ee, 5597 u8 *data) 5598 { 5599 struct i40e_netdev_priv *np = netdev_priv(netdev); 5600 struct i40e_vsi *vsi = np->vsi; 5601 struct i40e_pf *pf = vsi->back; 5602 struct i40e_hw *hw = &pf->hw; 5603 bool is_sfp = false; 5604 u32 value = 0; 5605 int status; 5606 int i; 5607 5608 if (!ee || !ee->len || !data) 5609 return -EINVAL; 5610 5611 if (hw->phy.link_info.module_type[0] == I40E_MODULE_TYPE_SFP) 5612 is_sfp = true; 5613 5614 for (i = 0; i < ee->len; i++) { 5615 u32 offset = i + ee->offset; 5616 u32 addr = is_sfp ? I40E_I2C_EEPROM_DEV_ADDR : 0; 5617 5618 /* Check if we need to access the other memory page */ 5619 if (is_sfp) { 5620 if (offset >= ETH_MODULE_SFF_8079_LEN) { 5621 offset -= ETH_MODULE_SFF_8079_LEN; 5622 addr = I40E_I2C_EEPROM_DEV_ADDR2; 5623 } 5624 } else { 5625 while (offset >= ETH_MODULE_SFF_8436_LEN) { 5626 /* Compute memory page number and offset. */ 5627 offset -= ETH_MODULE_SFF_8436_LEN / 2; 5628 addr++; 5629 } 5630 } 5631 5632 status = i40e_aq_get_phy_register(hw, 5633 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, 5634 addr, true, offset, &value, NULL); 5635 if (status) 5636 return -EIO; 5637 data[i] = value; 5638 } 5639 return 0; 5640 } 5641 5642 static void i40e_eee_capability_to_kedata_supported(__le16 eee_capability_, 5643 unsigned long *supported) 5644 { 5645 const int eee_capability = le16_to_cpu(eee_capability_); 5646 static const int lut[] = { 5647 ETHTOOL_LINK_MODE_100baseT_Full_BIT, 5648 ETHTOOL_LINK_MODE_1000baseT_Full_BIT, 5649 ETHTOOL_LINK_MODE_10000baseT_Full_BIT, 5650 ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, 5651 ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, 5652 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, 5653 ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, 5654 }; 5655 5656 linkmode_zero(supported); 5657 for (unsigned int i = ARRAY_SIZE(lut); i--; ) 5658 if (eee_capability & BIT(i + 1)) 5659 linkmode_set_bit(lut[i], supported); 5660 } 5661 5662 static int i40e_get_eee(struct net_device *netdev, struct ethtool_keee *edata) 5663 { 5664 struct i40e_netdev_priv *np = netdev_priv(netdev); 5665 struct i40e_aq_get_phy_abilities_resp phy_cfg; 5666 struct i40e_vsi *vsi = np->vsi; 5667 struct i40e_pf *pf = vsi->back; 5668 struct i40e_hw *hw = &pf->hw; 5669 int status; 5670 5671 /* Get initial PHY capabilities */ 5672 status = i40e_aq_get_phy_capabilities(hw, false, true, &phy_cfg, NULL); 5673 if (status) 5674 return -EAGAIN; 5675 5676 /* Check whether NIC configuration is compatible with Energy Efficient 5677 * Ethernet (EEE) mode. 5678 */ 5679 if (phy_cfg.eee_capability == 0) 5680 return -EOPNOTSUPP; 5681 5682 i40e_eee_capability_to_kedata_supported(phy_cfg.eee_capability, 5683 edata->supported); 5684 linkmode_copy(edata->lp_advertised, edata->supported); 5685 5686 /* Get current configuration */ 5687 status = i40e_aq_get_phy_capabilities(hw, false, false, &phy_cfg, NULL); 5688 if (status) 5689 return -EAGAIN; 5690 5691 linkmode_zero(edata->advertised); 5692 if (phy_cfg.eee_capability) 5693 linkmode_copy(edata->advertised, edata->supported); 5694 edata->eee_enabled = !!phy_cfg.eee_capability; 5695 edata->tx_lpi_enabled = pf->stats.tx_lpi_status; 5696 5697 edata->eee_active = pf->stats.tx_lpi_status && pf->stats.rx_lpi_status; 5698 5699 return 0; 5700 } 5701 5702 static int i40e_is_eee_param_supported(struct net_device *netdev, 5703 struct ethtool_keee *edata) 5704 { 5705 struct i40e_netdev_priv *np = netdev_priv(netdev); 5706 struct i40e_vsi *vsi = np->vsi; 5707 struct i40e_pf *pf = vsi->back; 5708 struct i40e_ethtool_not_used { 5709 bool value; 5710 const char *name; 5711 } param[] = { 5712 {!!(edata->advertised[0] & ~edata->supported[0]), "advertise"}, 5713 {!!edata->tx_lpi_timer, "tx-timer"}, 5714 {edata->tx_lpi_enabled != pf->stats.tx_lpi_status, "tx-lpi"} 5715 }; 5716 int i; 5717 5718 for (i = 0; i < ARRAY_SIZE(param); i++) { 5719 if (param[i].value) { 5720 netdev_info(netdev, 5721 "EEE setting %s not supported\n", 5722 param[i].name); 5723 return -EOPNOTSUPP; 5724 } 5725 } 5726 5727 return 0; 5728 } 5729 5730 static int i40e_set_eee(struct net_device *netdev, struct ethtool_keee *edata) 5731 { 5732 struct i40e_netdev_priv *np = netdev_priv(netdev); 5733 struct i40e_aq_get_phy_abilities_resp abilities; 5734 struct i40e_aq_set_phy_config config; 5735 struct i40e_vsi *vsi = np->vsi; 5736 struct i40e_pf *pf = vsi->back; 5737 struct i40e_hw *hw = &pf->hw; 5738 __le16 eee_capability; 5739 int status; 5740 5741 /* Deny parameters we don't support */ 5742 if (i40e_is_eee_param_supported(netdev, edata)) 5743 return -EOPNOTSUPP; 5744 5745 /* Get initial PHY capabilities */ 5746 status = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, 5747 NULL); 5748 if (status) 5749 return -EAGAIN; 5750 5751 /* Check whether NIC configuration is compatible with Energy Efficient 5752 * Ethernet (EEE) mode. 5753 */ 5754 if (abilities.eee_capability == 0) 5755 return -EOPNOTSUPP; 5756 5757 /* Cache initial EEE capability */ 5758 eee_capability = abilities.eee_capability; 5759 5760 /* Get current PHY configuration */ 5761 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, 5762 NULL); 5763 if (status) 5764 return -EAGAIN; 5765 5766 /* Cache current PHY configuration */ 5767 config.phy_type = abilities.phy_type; 5768 config.phy_type_ext = abilities.phy_type_ext; 5769 config.link_speed = abilities.link_speed; 5770 config.abilities = abilities.abilities | 5771 I40E_AQ_PHY_ENABLE_ATOMIC_LINK; 5772 config.eeer = abilities.eeer_val; 5773 config.low_power_ctrl = abilities.d3_lpan; 5774 config.fec_config = abilities.fec_cfg_curr_mod_ext_info & 5775 I40E_AQ_PHY_FEC_CONFIG_MASK; 5776 5777 /* Set desired EEE state */ 5778 if (edata->eee_enabled) { 5779 config.eee_capability = eee_capability; 5780 config.eeer |= cpu_to_le32(I40E_PRTPM_EEER_TX_LPI_EN_MASK); 5781 } else { 5782 config.eee_capability = 0; 5783 config.eeer &= cpu_to_le32(~I40E_PRTPM_EEER_TX_LPI_EN_MASK); 5784 } 5785 5786 /* Apply modified PHY configuration */ 5787 status = i40e_aq_set_phy_config(hw, &config, NULL); 5788 if (status) 5789 return -EAGAIN; 5790 5791 return 0; 5792 } 5793 5794 static const struct ethtool_ops i40e_ethtool_recovery_mode_ops = { 5795 .get_drvinfo = i40e_get_drvinfo, 5796 .set_eeprom = i40e_set_eeprom, 5797 .get_eeprom_len = i40e_get_eeprom_len, 5798 .get_eeprom = i40e_get_eeprom, 5799 }; 5800 5801 static const struct ethtool_ops i40e_ethtool_ops = { 5802 .supported_coalesce_params = ETHTOOL_COALESCE_USECS | 5803 ETHTOOL_COALESCE_TX_MAX_FRAMES_IRQ | 5804 ETHTOOL_COALESCE_USE_ADAPTIVE | 5805 ETHTOOL_COALESCE_RX_USECS_HIGH | 5806 ETHTOOL_COALESCE_TX_USECS_HIGH, 5807 .get_drvinfo = i40e_get_drvinfo, 5808 .get_regs_len = i40e_get_regs_len, 5809 .get_regs = i40e_get_regs, 5810 .nway_reset = i40e_nway_reset, 5811 .get_link = ethtool_op_get_link, 5812 .get_wol = i40e_get_wol, 5813 .set_wol = i40e_set_wol, 5814 .set_eeprom = i40e_set_eeprom, 5815 .get_eeprom_len = i40e_get_eeprom_len, 5816 .get_eeprom = i40e_get_eeprom, 5817 .get_ringparam = i40e_get_ringparam, 5818 .set_ringparam = i40e_set_ringparam, 5819 .get_pauseparam = i40e_get_pauseparam, 5820 .set_pauseparam = i40e_set_pauseparam, 5821 .get_msglevel = i40e_get_msglevel, 5822 .set_msglevel = i40e_set_msglevel, 5823 .get_rxnfc = i40e_get_rxnfc, 5824 .set_rxnfc = i40e_set_rxnfc, 5825 .self_test = i40e_diag_test, 5826 .get_strings = i40e_get_strings, 5827 .get_eee = i40e_get_eee, 5828 .set_eee = i40e_set_eee, 5829 .set_phys_id = i40e_set_phys_id, 5830 .get_sset_count = i40e_get_sset_count, 5831 .get_ethtool_stats = i40e_get_ethtool_stats, 5832 .get_coalesce = i40e_get_coalesce, 5833 .set_coalesce = i40e_set_coalesce, 5834 .get_rxfh_key_size = i40e_get_rxfh_key_size, 5835 .get_rxfh_indir_size = i40e_get_rxfh_indir_size, 5836 .get_rxfh = i40e_get_rxfh, 5837 .set_rxfh = i40e_set_rxfh, 5838 .get_channels = i40e_get_channels, 5839 .set_channels = i40e_set_channels, 5840 .get_module_info = i40e_get_module_info, 5841 .get_module_eeprom = i40e_get_module_eeprom, 5842 .get_ts_info = i40e_get_ts_info, 5843 .get_priv_flags = i40e_get_priv_flags, 5844 .set_priv_flags = i40e_set_priv_flags, 5845 .get_per_queue_coalesce = i40e_get_per_queue_coalesce, 5846 .set_per_queue_coalesce = i40e_set_per_queue_coalesce, 5847 .get_link_ksettings = i40e_get_link_ksettings, 5848 .set_link_ksettings = i40e_set_link_ksettings, 5849 .get_fecparam = i40e_get_fec_param, 5850 .set_fecparam = i40e_set_fec_param, 5851 .flash_device = i40e_ddp_flash, 5852 }; 5853 5854 void i40e_set_ethtool_ops(struct net_device *netdev) 5855 { 5856 struct i40e_netdev_priv *np = netdev_priv(netdev); 5857 struct i40e_pf *pf = np->vsi->back; 5858 5859 if (!test_bit(__I40E_RECOVERY_MODE, pf->state)) 5860 netdev->ethtool_ops = &i40e_ethtool_ops; 5861 else 5862 netdev->ethtool_ops = &i40e_ethtool_recovery_mode_ops; 5863 } 5864