1 /* Intel(R) Ethernet Switch Host Interface Driver 2 * Copyright(c) 2013 - 2016 Intel Corporation. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms and conditions of the GNU General Public License, 6 * version 2, as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope it will be useful, but WITHOUT 9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11 * more details. 12 * 13 * The full GNU General Public License is included in this distribution in 14 * the file called "COPYING". 15 * 16 * Contact Information: 17 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 18 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 19 */ 20 21 #ifndef _FM10K_H_ 22 #define _FM10K_H_ 23 24 #include <linux/types.h> 25 #include <linux/etherdevice.h> 26 #include <linux/cpumask.h> 27 #include <linux/rtnetlink.h> 28 #include <linux/if_vlan.h> 29 #include <linux/pci.h> 30 31 #include "fm10k_pf.h" 32 #include "fm10k_vf.h" 33 34 #define FM10K_MAX_JUMBO_FRAME_SIZE 15342 /* Maximum supported size 15K */ 35 36 #define MAX_QUEUES FM10K_MAX_QUEUES_PF 37 38 #define FM10K_MIN_RXD 128 39 #define FM10K_MAX_RXD 4096 40 #define FM10K_DEFAULT_RXD 256 41 42 #define FM10K_MIN_TXD 128 43 #define FM10K_MAX_TXD 4096 44 #define FM10K_DEFAULT_TXD 256 45 #define FM10K_DEFAULT_TX_WORK 256 46 47 #define FM10K_RXBUFFER_256 256 48 #define FM10K_RX_HDR_LEN FM10K_RXBUFFER_256 49 #define FM10K_RXBUFFER_2048 2048 50 #define FM10K_RX_BUFSZ FM10K_RXBUFFER_2048 51 52 /* How many Rx Buffers do we bundle into one write to the hardware ? */ 53 #define FM10K_RX_BUFFER_WRITE 16 /* Must be power of 2 */ 54 55 #define FM10K_MAX_STATIONS 63 56 struct fm10k_l2_accel { 57 int size; 58 u16 count; 59 u16 dglort; 60 struct rcu_head rcu; 61 struct net_device *macvlan[0]; 62 }; 63 64 enum fm10k_ring_state_t { 65 __FM10K_TX_DETECT_HANG, 66 __FM10K_HANG_CHECK_ARMED, 67 __FM10K_TX_XPS_INIT_DONE, 68 }; 69 70 #define check_for_tx_hang(ring) \ 71 test_bit(__FM10K_TX_DETECT_HANG, &(ring)->state) 72 #define set_check_for_tx_hang(ring) \ 73 set_bit(__FM10K_TX_DETECT_HANG, &(ring)->state) 74 #define clear_check_for_tx_hang(ring) \ 75 clear_bit(__FM10K_TX_DETECT_HANG, &(ring)->state) 76 77 struct fm10k_tx_buffer { 78 struct fm10k_tx_desc *next_to_watch; 79 struct sk_buff *skb; 80 unsigned int bytecount; 81 u16 gso_segs; 82 u16 tx_flags; 83 DEFINE_DMA_UNMAP_ADDR(dma); 84 DEFINE_DMA_UNMAP_LEN(len); 85 }; 86 87 struct fm10k_rx_buffer { 88 dma_addr_t dma; 89 struct page *page; 90 u32 page_offset; 91 }; 92 93 struct fm10k_queue_stats { 94 u64 packets; 95 u64 bytes; 96 }; 97 98 struct fm10k_tx_queue_stats { 99 u64 restart_queue; 100 u64 csum_err; 101 u64 tx_busy; 102 u64 tx_done_old; 103 u64 csum_good; 104 }; 105 106 struct fm10k_rx_queue_stats { 107 u64 alloc_failed; 108 u64 csum_err; 109 u64 errors; 110 u64 csum_good; 111 u64 switch_errors; 112 u64 drops; 113 u64 pp_errors; 114 u64 link_errors; 115 u64 length_errors; 116 }; 117 118 struct fm10k_ring { 119 struct fm10k_q_vector *q_vector;/* backpointer to host q_vector */ 120 struct net_device *netdev; /* netdev ring belongs to */ 121 struct device *dev; /* device for DMA mapping */ 122 struct fm10k_l2_accel __rcu *l2_accel; /* L2 acceleration list */ 123 void *desc; /* descriptor ring memory */ 124 union { 125 struct fm10k_tx_buffer *tx_buffer; 126 struct fm10k_rx_buffer *rx_buffer; 127 }; 128 u32 __iomem *tail; 129 unsigned long state; 130 dma_addr_t dma; /* phys. address of descriptor ring */ 131 unsigned int size; /* length in bytes */ 132 133 u8 queue_index; /* needed for queue management */ 134 u8 reg_idx; /* holds the special value that gets 135 * the hardware register offset 136 * associated with this ring, which is 137 * different for DCB and RSS modes 138 */ 139 u8 qos_pc; /* priority class of queue */ 140 u16 vid; /* default VLAN ID of queue */ 141 u16 count; /* amount of descriptors */ 142 143 u16 next_to_alloc; 144 u16 next_to_use; 145 u16 next_to_clean; 146 147 struct fm10k_queue_stats stats; 148 struct u64_stats_sync syncp; 149 union { 150 /* Tx */ 151 struct fm10k_tx_queue_stats tx_stats; 152 /* Rx */ 153 struct { 154 struct fm10k_rx_queue_stats rx_stats; 155 struct sk_buff *skb; 156 }; 157 }; 158 } ____cacheline_internodealigned_in_smp; 159 160 struct fm10k_ring_container { 161 struct fm10k_ring *ring; /* pointer to linked list of rings */ 162 unsigned int total_bytes; /* total bytes processed this int */ 163 unsigned int total_packets; /* total packets processed this int */ 164 u16 work_limit; /* total work allowed per interrupt */ 165 u16 itr; /* interrupt throttle rate value */ 166 u8 itr_scale; /* ITR adjustment based on PCI speed */ 167 u8 count; /* total number of rings in vector */ 168 }; 169 170 #define FM10K_ITR_MAX 0x0FFF /* maximum value for ITR */ 171 #define FM10K_ITR_10K 100 /* 100us */ 172 #define FM10K_ITR_20K 50 /* 50us */ 173 #define FM10K_ITR_40K 25 /* 25us */ 174 #define FM10K_ITR_ADAPTIVE 0x8000 /* adaptive interrupt moderation flag */ 175 176 #define ITR_IS_ADAPTIVE(itr) (!!(itr & FM10K_ITR_ADAPTIVE)) 177 178 #define FM10K_TX_ITR_DEFAULT FM10K_ITR_40K 179 #define FM10K_RX_ITR_DEFAULT FM10K_ITR_20K 180 #define FM10K_ITR_ENABLE (FM10K_ITR_AUTOMASK | FM10K_ITR_MASK_CLEAR) 181 182 static inline struct netdev_queue *txring_txq(const struct fm10k_ring *ring) 183 { 184 return &ring->netdev->_tx[ring->queue_index]; 185 } 186 187 /* iterator for handling rings in ring container */ 188 #define fm10k_for_each_ring(pos, head) \ 189 for (pos = &(head).ring[(head).count]; (--pos) >= (head).ring;) 190 191 #define MAX_Q_VECTORS 256 192 #define MIN_Q_VECTORS 1 193 enum fm10k_non_q_vectors { 194 FM10K_MBX_VECTOR, 195 #define NON_Q_VECTORS_VF NON_Q_VECTORS_PF 196 NON_Q_VECTORS_PF 197 }; 198 199 #define NON_Q_VECTORS(hw) (((hw)->mac.type == fm10k_mac_pf) ? \ 200 NON_Q_VECTORS_PF : \ 201 NON_Q_VECTORS_VF) 202 #define MIN_MSIX_COUNT(hw) (MIN_Q_VECTORS + NON_Q_VECTORS(hw)) 203 204 struct fm10k_q_vector { 205 struct fm10k_intfc *interface; 206 u32 __iomem *itr; /* pointer to ITR register for this vector */ 207 u16 v_idx; /* index of q_vector within interface array */ 208 struct fm10k_ring_container rx, tx; 209 210 struct napi_struct napi; 211 cpumask_t affinity_mask; 212 char name[IFNAMSIZ + 9]; 213 214 #ifdef CONFIG_DEBUG_FS 215 struct dentry *dbg_q_vector; 216 #endif /* CONFIG_DEBUG_FS */ 217 struct rcu_head rcu; /* to avoid race with update stats on free */ 218 219 /* for dynamic allocation of rings associated with this q_vector */ 220 struct fm10k_ring ring[0] ____cacheline_internodealigned_in_smp; 221 }; 222 223 enum fm10k_ring_f_enum { 224 RING_F_RSS, 225 RING_F_QOS, 226 RING_F_ARRAY_SIZE /* must be last in enum set */ 227 }; 228 229 struct fm10k_ring_feature { 230 u16 limit; /* upper limit on feature indices */ 231 u16 indices; /* current value of indices */ 232 u16 mask; /* Mask used for feature to ring mapping */ 233 u16 offset; /* offset to start of feature */ 234 }; 235 236 struct fm10k_iov_data { 237 unsigned int num_vfs; 238 unsigned int next_vf_mbx; 239 struct rcu_head rcu; 240 struct fm10k_vf_info vf_info[0]; 241 }; 242 243 struct fm10k_udp_port { 244 struct list_head list; 245 sa_family_t sa_family; 246 __be16 port; 247 }; 248 249 /* one work queue for entire driver */ 250 extern struct workqueue_struct *fm10k_workqueue; 251 252 struct fm10k_intfc { 253 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; 254 struct net_device *netdev; 255 struct fm10k_l2_accel *l2_accel; /* pointer to L2 acceleration list */ 256 struct pci_dev *pdev; 257 unsigned long state; 258 259 u32 flags; 260 #define FM10K_FLAG_RESET_REQUESTED (u32)(BIT(0)) 261 #define FM10K_FLAG_RSS_FIELD_IPV4_UDP (u32)(BIT(1)) 262 #define FM10K_FLAG_RSS_FIELD_IPV6_UDP (u32)(BIT(2)) 263 #define FM10K_FLAG_SWPRI_CONFIG (u32)(BIT(3)) 264 int xcast_mode; 265 266 /* Tx fast path data */ 267 int num_tx_queues; 268 u16 tx_itr; 269 270 /* Rx fast path data */ 271 int num_rx_queues; 272 u16 rx_itr; 273 274 /* TX */ 275 struct fm10k_ring *tx_ring[MAX_QUEUES] ____cacheline_aligned_in_smp; 276 277 u64 restart_queue; 278 u64 tx_busy; 279 u64 tx_csum_errors; 280 u64 alloc_failed; 281 u64 rx_csum_errors; 282 283 u64 tx_bytes_nic; 284 u64 tx_packets_nic; 285 u64 rx_bytes_nic; 286 u64 rx_packets_nic; 287 u64 rx_drops_nic; 288 u64 rx_overrun_pf; 289 u64 rx_overrun_vf; 290 291 /* Debug Statistics */ 292 u64 hw_sm_mbx_full; 293 u64 hw_csum_tx_good; 294 u64 hw_csum_rx_good; 295 u64 rx_switch_errors; 296 u64 rx_drops; 297 u64 rx_pp_errors; 298 u64 rx_link_errors; 299 u64 rx_length_errors; 300 301 u32 tx_timeout_count; 302 303 /* RX */ 304 struct fm10k_ring *rx_ring[MAX_QUEUES]; 305 306 /* Queueing vectors */ 307 struct fm10k_q_vector *q_vector[MAX_Q_VECTORS]; 308 struct msix_entry *msix_entries; 309 int num_q_vectors; /* current number of q_vectors for device */ 310 struct fm10k_ring_feature ring_feature[RING_F_ARRAY_SIZE]; 311 312 /* SR-IOV information management structure */ 313 struct fm10k_iov_data *iov_data; 314 315 struct fm10k_hw_stats stats; 316 struct fm10k_hw hw; 317 u32 __iomem *uc_addr; 318 u32 __iomem *sw_addr; 319 u16 msg_enable; 320 u16 tx_ring_count; 321 u16 rx_ring_count; 322 struct timer_list service_timer; 323 struct work_struct service_task; 324 unsigned long next_stats_update; 325 unsigned long next_tx_hang_check; 326 unsigned long last_reset; 327 unsigned long link_down_event; 328 bool host_ready; 329 bool lport_map_failed; 330 331 u32 reta[FM10K_RETA_SIZE]; 332 u32 rssrk[FM10K_RSSRK_SIZE]; 333 334 /* UDP encapsulation port tracking information */ 335 struct list_head vxlan_port; 336 struct list_head geneve_port; 337 338 #ifdef CONFIG_DEBUG_FS 339 struct dentry *dbg_intfc; 340 #endif /* CONFIG_DEBUG_FS */ 341 342 #ifdef CONFIG_DCB 343 u8 pfc_en; 344 #endif 345 u8 rx_pause; 346 347 /* GLORT resources in use by PF */ 348 u16 glort; 349 u16 glort_count; 350 351 /* VLAN ID for updating multicast/unicast lists */ 352 u16 vid; 353 }; 354 355 enum fm10k_state_t { 356 __FM10K_RESETTING, 357 __FM10K_DOWN, 358 __FM10K_SERVICE_SCHED, 359 __FM10K_SERVICE_DISABLE, 360 __FM10K_MBX_LOCK, 361 __FM10K_LINK_DOWN, 362 __FM10K_UPDATING_STATS, 363 }; 364 365 static inline void fm10k_mbx_lock(struct fm10k_intfc *interface) 366 { 367 /* busy loop if we cannot obtain the lock as some calls 368 * such as ndo_set_rx_mode may be made in atomic context 369 */ 370 while (test_and_set_bit(__FM10K_MBX_LOCK, &interface->state)) 371 udelay(20); 372 } 373 374 static inline void fm10k_mbx_unlock(struct fm10k_intfc *interface) 375 { 376 /* flush memory to make sure state is correct */ 377 smp_mb__before_atomic(); 378 clear_bit(__FM10K_MBX_LOCK, &interface->state); 379 } 380 381 static inline int fm10k_mbx_trylock(struct fm10k_intfc *interface) 382 { 383 return !test_and_set_bit(__FM10K_MBX_LOCK, &interface->state); 384 } 385 386 /* fm10k_test_staterr - test bits in Rx descriptor status and error fields */ 387 static inline __le32 fm10k_test_staterr(union fm10k_rx_desc *rx_desc, 388 const u32 stat_err_bits) 389 { 390 return rx_desc->d.staterr & cpu_to_le32(stat_err_bits); 391 } 392 393 /* fm10k_desc_unused - calculate if we have unused descriptors */ 394 static inline u16 fm10k_desc_unused(struct fm10k_ring *ring) 395 { 396 s16 unused = ring->next_to_clean - ring->next_to_use - 1; 397 398 return likely(unused < 0) ? unused + ring->count : unused; 399 } 400 401 #define FM10K_TX_DESC(R, i) \ 402 (&(((struct fm10k_tx_desc *)((R)->desc))[i])) 403 #define FM10K_RX_DESC(R, i) \ 404 (&(((union fm10k_rx_desc *)((R)->desc))[i])) 405 406 #define FM10K_MAX_TXD_PWR 14 407 #define FM10K_MAX_DATA_PER_TXD (1u << FM10K_MAX_TXD_PWR) 408 409 /* Tx Descriptors needed, worst case */ 410 #define TXD_USE_COUNT(S) DIV_ROUND_UP((S), FM10K_MAX_DATA_PER_TXD) 411 #define DESC_NEEDED (MAX_SKB_FRAGS + 4) 412 413 enum fm10k_tx_flags { 414 /* Tx offload flags */ 415 FM10K_TX_FLAGS_CSUM = 0x01, 416 }; 417 418 /* This structure is stored as little endian values as that is the native 419 * format of the Rx descriptor. The ordering of these fields is reversed 420 * from the actual ftag header to allow for a single bswap to take care 421 * of placing all of the values in network order 422 */ 423 union fm10k_ftag_info { 424 __le64 ftag; 425 struct { 426 /* dglort and sglort combined into a single 32bit desc read */ 427 __le32 glort; 428 /* upper 16 bits of VLAN are reserved 0 for swpri_type_user */ 429 __le32 vlan; 430 } d; 431 struct { 432 __le16 dglort; 433 __le16 sglort; 434 __le16 vlan; 435 __le16 swpri_type_user; 436 } w; 437 }; 438 439 struct fm10k_cb { 440 union { 441 __le64 tstamp; 442 unsigned long ts_tx_timeout; 443 }; 444 union fm10k_ftag_info fi; 445 }; 446 447 #define FM10K_CB(skb) ((struct fm10k_cb *)(skb)->cb) 448 449 /* main */ 450 extern char fm10k_driver_name[]; 451 extern const char fm10k_driver_version[]; 452 int fm10k_init_queueing_scheme(struct fm10k_intfc *interface); 453 void fm10k_clear_queueing_scheme(struct fm10k_intfc *interface); 454 __be16 fm10k_tx_encap_offload(struct sk_buff *skb); 455 netdev_tx_t fm10k_xmit_frame_ring(struct sk_buff *skb, 456 struct fm10k_ring *tx_ring); 457 void fm10k_tx_timeout_reset(struct fm10k_intfc *interface); 458 u64 fm10k_get_tx_pending(struct fm10k_ring *ring, bool in_sw); 459 bool fm10k_check_tx_hang(struct fm10k_ring *tx_ring); 460 void fm10k_alloc_rx_buffers(struct fm10k_ring *rx_ring, u16 cleaned_count); 461 462 /* PCI */ 463 void fm10k_mbx_free_irq(struct fm10k_intfc *); 464 int fm10k_mbx_request_irq(struct fm10k_intfc *); 465 void fm10k_qv_free_irq(struct fm10k_intfc *interface); 466 int fm10k_qv_request_irq(struct fm10k_intfc *interface); 467 int fm10k_register_pci_driver(void); 468 void fm10k_unregister_pci_driver(void); 469 void fm10k_up(struct fm10k_intfc *interface); 470 void fm10k_down(struct fm10k_intfc *interface); 471 void fm10k_update_stats(struct fm10k_intfc *interface); 472 void fm10k_service_event_schedule(struct fm10k_intfc *interface); 473 void fm10k_update_rx_drop_en(struct fm10k_intfc *interface); 474 #ifdef CONFIG_NET_POLL_CONTROLLER 475 void fm10k_netpoll(struct net_device *netdev); 476 #endif 477 478 /* Netdev */ 479 struct net_device *fm10k_alloc_netdev(const struct fm10k_info *info); 480 int fm10k_setup_rx_resources(struct fm10k_ring *); 481 int fm10k_setup_tx_resources(struct fm10k_ring *); 482 void fm10k_free_rx_resources(struct fm10k_ring *); 483 void fm10k_free_tx_resources(struct fm10k_ring *); 484 void fm10k_clean_all_rx_rings(struct fm10k_intfc *); 485 void fm10k_clean_all_tx_rings(struct fm10k_intfc *); 486 void fm10k_unmap_and_free_tx_resource(struct fm10k_ring *, 487 struct fm10k_tx_buffer *); 488 void fm10k_restore_rx_state(struct fm10k_intfc *); 489 void fm10k_reset_rx_state(struct fm10k_intfc *); 490 int fm10k_setup_tc(struct net_device *dev, u8 tc); 491 int fm10k_open(struct net_device *netdev); 492 int fm10k_close(struct net_device *netdev); 493 494 /* Ethtool */ 495 void fm10k_set_ethtool_ops(struct net_device *dev); 496 void fm10k_write_reta(struct fm10k_intfc *interface, const u32 *indir); 497 498 /* IOV */ 499 s32 fm10k_iov_event(struct fm10k_intfc *interface); 500 s32 fm10k_iov_mbx(struct fm10k_intfc *interface); 501 void fm10k_iov_suspend(struct pci_dev *pdev); 502 int fm10k_iov_resume(struct pci_dev *pdev); 503 void fm10k_iov_disable(struct pci_dev *pdev); 504 int fm10k_iov_configure(struct pci_dev *pdev, int num_vfs); 505 s32 fm10k_iov_update_pvid(struct fm10k_intfc *interface, u16 glort, u16 pvid); 506 int fm10k_ndo_set_vf_mac(struct net_device *netdev, int vf_idx, u8 *mac); 507 int fm10k_ndo_set_vf_vlan(struct net_device *netdev, 508 int vf_idx, u16 vid, u8 qos, __be16 vlan_proto); 509 int fm10k_ndo_set_vf_bw(struct net_device *netdev, int vf_idx, int rate, 510 int unused); 511 int fm10k_ndo_get_vf_config(struct net_device *netdev, 512 int vf_idx, struct ifla_vf_info *ivi); 513 514 /* DebugFS */ 515 #ifdef CONFIG_DEBUG_FS 516 void fm10k_dbg_q_vector_init(struct fm10k_q_vector *q_vector); 517 void fm10k_dbg_q_vector_exit(struct fm10k_q_vector *q_vector); 518 void fm10k_dbg_intfc_init(struct fm10k_intfc *interface); 519 void fm10k_dbg_intfc_exit(struct fm10k_intfc *interface); 520 void fm10k_dbg_init(void); 521 void fm10k_dbg_exit(void); 522 #else 523 static inline void fm10k_dbg_q_vector_init(struct fm10k_q_vector *q_vector) {} 524 static inline void fm10k_dbg_q_vector_exit(struct fm10k_q_vector *q_vector) {} 525 static inline void fm10k_dbg_intfc_init(struct fm10k_intfc *interface) {} 526 static inline void fm10k_dbg_intfc_exit(struct fm10k_intfc *interface) {} 527 static inline void fm10k_dbg_init(void) {} 528 static inline void fm10k_dbg_exit(void) {} 529 #endif /* CONFIG_DEBUG_FS */ 530 531 /* DCB */ 532 #ifdef CONFIG_DCB 533 void fm10k_dcbnl_set_ops(struct net_device *dev); 534 #else 535 static inline void fm10k_dcbnl_set_ops(struct net_device *dev) {} 536 #endif 537 #endif /* _FM10K_H_ */ 538