1 /******************************************************************************* 2 3 Intel PRO/1000 Linux driver 4 Copyright(c) 1999 - 2013 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, 8 version 2, as published by the Free Software Foundation. 9 10 This program is distributed in the hope it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 You should have received a copy of the GNU General Public License along with 16 this program; if not, write to the Free Software Foundation, Inc., 17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 18 19 The full GNU General Public License is included in this distribution in 20 the file called "COPYING". 21 22 Contact Information: 23 Linux NICS <linux.nics@intel.com> 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 26 27 *******************************************************************************/ 28 29 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 30 31 #include <linux/module.h> 32 #include <linux/types.h> 33 #include <linux/init.h> 34 #include <linux/pci.h> 35 #include <linux/vmalloc.h> 36 #include <linux/pagemap.h> 37 #include <linux/delay.h> 38 #include <linux/netdevice.h> 39 #include <linux/interrupt.h> 40 #include <linux/tcp.h> 41 #include <linux/ipv6.h> 42 #include <linux/slab.h> 43 #include <net/checksum.h> 44 #include <net/ip6_checksum.h> 45 #include <linux/ethtool.h> 46 #include <linux/if_vlan.h> 47 #include <linux/cpu.h> 48 #include <linux/smp.h> 49 #include <linux/pm_qos.h> 50 #include <linux/pm_runtime.h> 51 #include <linux/aer.h> 52 #include <linux/prefetch.h> 53 54 #include "e1000.h" 55 56 #define DRV_EXTRAVERSION "-k" 57 58 #define DRV_VERSION "2.2.14" DRV_EXTRAVERSION 59 char e1000e_driver_name[] = "e1000e"; 60 const char e1000e_driver_version[] = DRV_VERSION; 61 62 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK) 63 static int debug = -1; 64 module_param(debug, int, 0); 65 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); 66 67 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state); 68 69 static const struct e1000_info *e1000_info_tbl[] = { 70 [board_82571] = &e1000_82571_info, 71 [board_82572] = &e1000_82572_info, 72 [board_82573] = &e1000_82573_info, 73 [board_82574] = &e1000_82574_info, 74 [board_82583] = &e1000_82583_info, 75 [board_80003es2lan] = &e1000_es2_info, 76 [board_ich8lan] = &e1000_ich8_info, 77 [board_ich9lan] = &e1000_ich9_info, 78 [board_ich10lan] = &e1000_ich10_info, 79 [board_pchlan] = &e1000_pch_info, 80 [board_pch2lan] = &e1000_pch2_info, 81 [board_pch_lpt] = &e1000_pch_lpt_info, 82 }; 83 84 struct e1000_reg_info { 85 u32 ofs; 86 char *name; 87 }; 88 89 static const struct e1000_reg_info e1000_reg_info_tbl[] = { 90 /* General Registers */ 91 {E1000_CTRL, "CTRL"}, 92 {E1000_STATUS, "STATUS"}, 93 {E1000_CTRL_EXT, "CTRL_EXT"}, 94 95 /* Interrupt Registers */ 96 {E1000_ICR, "ICR"}, 97 98 /* Rx Registers */ 99 {E1000_RCTL, "RCTL"}, 100 {E1000_RDLEN(0), "RDLEN"}, 101 {E1000_RDH(0), "RDH"}, 102 {E1000_RDT(0), "RDT"}, 103 {E1000_RDTR, "RDTR"}, 104 {E1000_RXDCTL(0), "RXDCTL"}, 105 {E1000_ERT, "ERT"}, 106 {E1000_RDBAL(0), "RDBAL"}, 107 {E1000_RDBAH(0), "RDBAH"}, 108 {E1000_RDFH, "RDFH"}, 109 {E1000_RDFT, "RDFT"}, 110 {E1000_RDFHS, "RDFHS"}, 111 {E1000_RDFTS, "RDFTS"}, 112 {E1000_RDFPC, "RDFPC"}, 113 114 /* Tx Registers */ 115 {E1000_TCTL, "TCTL"}, 116 {E1000_TDBAL(0), "TDBAL"}, 117 {E1000_TDBAH(0), "TDBAH"}, 118 {E1000_TDLEN(0), "TDLEN"}, 119 {E1000_TDH(0), "TDH"}, 120 {E1000_TDT(0), "TDT"}, 121 {E1000_TIDV, "TIDV"}, 122 {E1000_TXDCTL(0), "TXDCTL"}, 123 {E1000_TADV, "TADV"}, 124 {E1000_TARC(0), "TARC"}, 125 {E1000_TDFH, "TDFH"}, 126 {E1000_TDFT, "TDFT"}, 127 {E1000_TDFHS, "TDFHS"}, 128 {E1000_TDFTS, "TDFTS"}, 129 {E1000_TDFPC, "TDFPC"}, 130 131 /* List Terminator */ 132 {0, NULL} 133 }; 134 135 /** 136 * e1000_regdump - register printout routine 137 * @hw: pointer to the HW structure 138 * @reginfo: pointer to the register info table 139 **/ 140 static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo) 141 { 142 int n = 0; 143 char rname[16]; 144 u32 regs[8]; 145 146 switch (reginfo->ofs) { 147 case E1000_RXDCTL(0): 148 for (n = 0; n < 2; n++) 149 regs[n] = __er32(hw, E1000_RXDCTL(n)); 150 break; 151 case E1000_TXDCTL(0): 152 for (n = 0; n < 2; n++) 153 regs[n] = __er32(hw, E1000_TXDCTL(n)); 154 break; 155 case E1000_TARC(0): 156 for (n = 0; n < 2; n++) 157 regs[n] = __er32(hw, E1000_TARC(n)); 158 break; 159 default: 160 pr_info("%-15s %08x\n", 161 reginfo->name, __er32(hw, reginfo->ofs)); 162 return; 163 } 164 165 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]"); 166 pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]); 167 } 168 169 static void e1000e_dump_ps_pages(struct e1000_adapter *adapter, 170 struct e1000_buffer *bi) 171 { 172 int i; 173 struct e1000_ps_page *ps_page; 174 175 for (i = 0; i < adapter->rx_ps_pages; i++) { 176 ps_page = &bi->ps_pages[i]; 177 178 if (ps_page->page) { 179 pr_info("packet dump for ps_page %d:\n", i); 180 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS, 181 16, 1, page_address(ps_page->page), 182 PAGE_SIZE, true); 183 } 184 } 185 } 186 187 /** 188 * e1000e_dump - Print registers, Tx-ring and Rx-ring 189 * @adapter: board private structure 190 **/ 191 static void e1000e_dump(struct e1000_adapter *adapter) 192 { 193 struct net_device *netdev = adapter->netdev; 194 struct e1000_hw *hw = &adapter->hw; 195 struct e1000_reg_info *reginfo; 196 struct e1000_ring *tx_ring = adapter->tx_ring; 197 struct e1000_tx_desc *tx_desc; 198 struct my_u0 { 199 __le64 a; 200 __le64 b; 201 } *u0; 202 struct e1000_buffer *buffer_info; 203 struct e1000_ring *rx_ring = adapter->rx_ring; 204 union e1000_rx_desc_packet_split *rx_desc_ps; 205 union e1000_rx_desc_extended *rx_desc; 206 struct my_u1 { 207 __le64 a; 208 __le64 b; 209 __le64 c; 210 __le64 d; 211 } *u1; 212 u32 staterr; 213 int i = 0; 214 215 if (!netif_msg_hw(adapter)) 216 return; 217 218 /* Print netdevice Info */ 219 if (netdev) { 220 dev_info(&adapter->pdev->dev, "Net device Info\n"); 221 pr_info("Device Name state trans_start last_rx\n"); 222 pr_info("%-15s %016lX %016lX %016lX\n", netdev->name, 223 netdev->state, netdev->trans_start, netdev->last_rx); 224 } 225 226 /* Print Registers */ 227 dev_info(&adapter->pdev->dev, "Register Dump\n"); 228 pr_info(" Register Name Value\n"); 229 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl; 230 reginfo->name; reginfo++) { 231 e1000_regdump(hw, reginfo); 232 } 233 234 /* Print Tx Ring Summary */ 235 if (!netdev || !netif_running(netdev)) 236 return; 237 238 dev_info(&adapter->pdev->dev, "Tx Ring Summary\n"); 239 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n"); 240 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean]; 241 pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n", 242 0, tx_ring->next_to_use, tx_ring->next_to_clean, 243 (unsigned long long)buffer_info->dma, 244 buffer_info->length, 245 buffer_info->next_to_watch, 246 (unsigned long long)buffer_info->time_stamp); 247 248 /* Print Tx Ring */ 249 if (!netif_msg_tx_done(adapter)) 250 goto rx_ring_summary; 251 252 dev_info(&adapter->pdev->dev, "Tx Ring Dump\n"); 253 254 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended) 255 * 256 * Legacy Transmit Descriptor 257 * +--------------------------------------------------------------+ 258 * 0 | Buffer Address [63:0] (Reserved on Write Back) | 259 * +--------------------------------------------------------------+ 260 * 8 | Special | CSS | Status | CMD | CSO | Length | 261 * +--------------------------------------------------------------+ 262 * 63 48 47 36 35 32 31 24 23 16 15 0 263 * 264 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload 265 * 63 48 47 40 39 32 31 16 15 8 7 0 266 * +----------------------------------------------------------------+ 267 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS | 268 * +----------------------------------------------------------------+ 269 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN | 270 * +----------------------------------------------------------------+ 271 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0 272 * 273 * Extended Data Descriptor (DTYP=0x1) 274 * +----------------------------------------------------------------+ 275 * 0 | Buffer Address [63:0] | 276 * +----------------------------------------------------------------+ 277 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN | 278 * +----------------------------------------------------------------+ 279 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0 280 */ 281 pr_info("Tl[desc] [address 63:0 ] [SpeCssSCmCsLen] [bi->dma ] leng ntw timestamp bi->skb <-- Legacy format\n"); 282 pr_info("Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Context format\n"); 283 pr_info("Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Data format\n"); 284 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) { 285 const char *next_desc; 286 tx_desc = E1000_TX_DESC(*tx_ring, i); 287 buffer_info = &tx_ring->buffer_info[i]; 288 u0 = (struct my_u0 *)tx_desc; 289 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean) 290 next_desc = " NTC/U"; 291 else if (i == tx_ring->next_to_use) 292 next_desc = " NTU"; 293 else if (i == tx_ring->next_to_clean) 294 next_desc = " NTC"; 295 else 296 next_desc = ""; 297 pr_info("T%c[0x%03X] %016llX %016llX %016llX %04X %3X %016llX %p%s\n", 298 (!(le64_to_cpu(u0->b) & (1 << 29)) ? 'l' : 299 ((le64_to_cpu(u0->b) & (1 << 20)) ? 'd' : 'c')), 300 i, 301 (unsigned long long)le64_to_cpu(u0->a), 302 (unsigned long long)le64_to_cpu(u0->b), 303 (unsigned long long)buffer_info->dma, 304 buffer_info->length, buffer_info->next_to_watch, 305 (unsigned long long)buffer_info->time_stamp, 306 buffer_info->skb, next_desc); 307 308 if (netif_msg_pktdata(adapter) && buffer_info->skb) 309 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS, 310 16, 1, buffer_info->skb->data, 311 buffer_info->skb->len, true); 312 } 313 314 /* Print Rx Ring Summary */ 315 rx_ring_summary: 316 dev_info(&adapter->pdev->dev, "Rx Ring Summary\n"); 317 pr_info("Queue [NTU] [NTC]\n"); 318 pr_info(" %5d %5X %5X\n", 319 0, rx_ring->next_to_use, rx_ring->next_to_clean); 320 321 /* Print Rx Ring */ 322 if (!netif_msg_rx_status(adapter)) 323 return; 324 325 dev_info(&adapter->pdev->dev, "Rx Ring Dump\n"); 326 switch (adapter->rx_ps_pages) { 327 case 1: 328 case 2: 329 case 3: 330 /* [Extended] Packet Split Receive Descriptor Format 331 * 332 * +-----------------------------------------------------+ 333 * 0 | Buffer Address 0 [63:0] | 334 * +-----------------------------------------------------+ 335 * 8 | Buffer Address 1 [63:0] | 336 * +-----------------------------------------------------+ 337 * 16 | Buffer Address 2 [63:0] | 338 * +-----------------------------------------------------+ 339 * 24 | Buffer Address 3 [63:0] | 340 * +-----------------------------------------------------+ 341 */ 342 pr_info("R [desc] [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] [bi->skb] <-- Ext Pkt Split format\n"); 343 /* [Extended] Receive Descriptor (Write-Back) Format 344 * 345 * 63 48 47 32 31 13 12 8 7 4 3 0 346 * +------------------------------------------------------+ 347 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS | 348 * | Checksum | Ident | | Queue | | Type | 349 * +------------------------------------------------------+ 350 * 8 | VLAN Tag | Length | Extended Error | Extended Status | 351 * +------------------------------------------------------+ 352 * 63 48 47 32 31 20 19 0 353 */ 354 pr_info("RWB[desc] [ck ipid mrqhsh] [vl l0 ee es] [ l3 l2 l1 hs] [reserved ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n"); 355 for (i = 0; i < rx_ring->count; i++) { 356 const char *next_desc; 357 buffer_info = &rx_ring->buffer_info[i]; 358 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i); 359 u1 = (struct my_u1 *)rx_desc_ps; 360 staterr = 361 le32_to_cpu(rx_desc_ps->wb.middle.status_error); 362 363 if (i == rx_ring->next_to_use) 364 next_desc = " NTU"; 365 else if (i == rx_ring->next_to_clean) 366 next_desc = " NTC"; 367 else 368 next_desc = ""; 369 370 if (staterr & E1000_RXD_STAT_DD) { 371 /* Descriptor Done */ 372 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX ---------------- %p%s\n", 373 "RWB", i, 374 (unsigned long long)le64_to_cpu(u1->a), 375 (unsigned long long)le64_to_cpu(u1->b), 376 (unsigned long long)le64_to_cpu(u1->c), 377 (unsigned long long)le64_to_cpu(u1->d), 378 buffer_info->skb, next_desc); 379 } else { 380 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX %016llX %p%s\n", 381 "R ", i, 382 (unsigned long long)le64_to_cpu(u1->a), 383 (unsigned long long)le64_to_cpu(u1->b), 384 (unsigned long long)le64_to_cpu(u1->c), 385 (unsigned long long)le64_to_cpu(u1->d), 386 (unsigned long long)buffer_info->dma, 387 buffer_info->skb, next_desc); 388 389 if (netif_msg_pktdata(adapter)) 390 e1000e_dump_ps_pages(adapter, 391 buffer_info); 392 } 393 } 394 break; 395 default: 396 case 0: 397 /* Extended Receive Descriptor (Read) Format 398 * 399 * +-----------------------------------------------------+ 400 * 0 | Buffer Address [63:0] | 401 * +-----------------------------------------------------+ 402 * 8 | Reserved | 403 * +-----------------------------------------------------+ 404 */ 405 pr_info("R [desc] [buf addr 63:0 ] [reserved 63:0 ] [bi->dma ] [bi->skb] <-- Ext (Read) format\n"); 406 /* Extended Receive Descriptor (Write-Back) Format 407 * 408 * 63 48 47 32 31 24 23 4 3 0 409 * +------------------------------------------------------+ 410 * | RSS Hash | | | | 411 * 0 +-------------------+ Rsvd | Reserved | MRQ RSS | 412 * | Packet | IP | | | Type | 413 * | Checksum | Ident | | | | 414 * +------------------------------------------------------+ 415 * 8 | VLAN Tag | Length | Extended Error | Extended Status | 416 * +------------------------------------------------------+ 417 * 63 48 47 32 31 20 19 0 418 */ 419 pr_info("RWB[desc] [cs ipid mrq] [vt ln xe xs] [bi->skb] <-- Ext (Write-Back) format\n"); 420 421 for (i = 0; i < rx_ring->count; i++) { 422 const char *next_desc; 423 424 buffer_info = &rx_ring->buffer_info[i]; 425 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); 426 u1 = (struct my_u1 *)rx_desc; 427 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 428 429 if (i == rx_ring->next_to_use) 430 next_desc = " NTU"; 431 else if (i == rx_ring->next_to_clean) 432 next_desc = " NTC"; 433 else 434 next_desc = ""; 435 436 if (staterr & E1000_RXD_STAT_DD) { 437 /* Descriptor Done */ 438 pr_info("%s[0x%03X] %016llX %016llX ---------------- %p%s\n", 439 "RWB", i, 440 (unsigned long long)le64_to_cpu(u1->a), 441 (unsigned long long)le64_to_cpu(u1->b), 442 buffer_info->skb, next_desc); 443 } else { 444 pr_info("%s[0x%03X] %016llX %016llX %016llX %p%s\n", 445 "R ", i, 446 (unsigned long long)le64_to_cpu(u1->a), 447 (unsigned long long)le64_to_cpu(u1->b), 448 (unsigned long long)buffer_info->dma, 449 buffer_info->skb, next_desc); 450 451 if (netif_msg_pktdata(adapter) && 452 buffer_info->skb) 453 print_hex_dump(KERN_INFO, "", 454 DUMP_PREFIX_ADDRESS, 16, 455 1, 456 buffer_info->skb->data, 457 adapter->rx_buffer_len, 458 true); 459 } 460 } 461 } 462 } 463 464 /** 465 * e1000_desc_unused - calculate if we have unused descriptors 466 **/ 467 static int e1000_desc_unused(struct e1000_ring *ring) 468 { 469 if (ring->next_to_clean > ring->next_to_use) 470 return ring->next_to_clean - ring->next_to_use - 1; 471 472 return ring->count + ring->next_to_clean - ring->next_to_use - 1; 473 } 474 475 /** 476 * e1000e_systim_to_hwtstamp - convert system time value to hw time stamp 477 * @adapter: board private structure 478 * @hwtstamps: time stamp structure to update 479 * @systim: unsigned 64bit system time value. 480 * 481 * Convert the system time value stored in the RX/TXSTMP registers into a 482 * hwtstamp which can be used by the upper level time stamping functions. 483 * 484 * The 'systim_lock' spinlock is used to protect the consistency of the 485 * system time value. This is needed because reading the 64 bit time 486 * value involves reading two 32 bit registers. The first read latches the 487 * value. 488 **/ 489 static void e1000e_systim_to_hwtstamp(struct e1000_adapter *adapter, 490 struct skb_shared_hwtstamps *hwtstamps, 491 u64 systim) 492 { 493 u64 ns; 494 unsigned long flags; 495 496 spin_lock_irqsave(&adapter->systim_lock, flags); 497 ns = timecounter_cyc2time(&adapter->tc, systim); 498 spin_unlock_irqrestore(&adapter->systim_lock, flags); 499 500 memset(hwtstamps, 0, sizeof(*hwtstamps)); 501 hwtstamps->hwtstamp = ns_to_ktime(ns); 502 } 503 504 /** 505 * e1000e_rx_hwtstamp - utility function which checks for Rx time stamp 506 * @adapter: board private structure 507 * @status: descriptor extended error and status field 508 * @skb: particular skb to include time stamp 509 * 510 * If the time stamp is valid, convert it into the timecounter ns value 511 * and store that result into the shhwtstamps structure which is passed 512 * up the network stack. 513 **/ 514 static void e1000e_rx_hwtstamp(struct e1000_adapter *adapter, u32 status, 515 struct sk_buff *skb) 516 { 517 struct e1000_hw *hw = &adapter->hw; 518 u64 rxstmp; 519 520 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP) || 521 !(status & E1000_RXDEXT_STATERR_TST) || 522 !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID)) 523 return; 524 525 /* The Rx time stamp registers contain the time stamp. No other 526 * received packet will be time stamped until the Rx time stamp 527 * registers are read. Because only one packet can be time stamped 528 * at a time, the register values must belong to this packet and 529 * therefore none of the other additional attributes need to be 530 * compared. 531 */ 532 rxstmp = (u64)er32(RXSTMPL); 533 rxstmp |= (u64)er32(RXSTMPH) << 32; 534 e1000e_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), rxstmp); 535 536 adapter->flags2 &= ~FLAG2_CHECK_RX_HWTSTAMP; 537 } 538 539 /** 540 * e1000_receive_skb - helper function to handle Rx indications 541 * @adapter: board private structure 542 * @staterr: descriptor extended error and status field as written by hardware 543 * @vlan: descriptor vlan field as written by hardware (no le/be conversion) 544 * @skb: pointer to sk_buff to be indicated to stack 545 **/ 546 static void e1000_receive_skb(struct e1000_adapter *adapter, 547 struct net_device *netdev, struct sk_buff *skb, 548 u32 staterr, __le16 vlan) 549 { 550 u16 tag = le16_to_cpu(vlan); 551 552 e1000e_rx_hwtstamp(adapter, staterr, skb); 553 554 skb->protocol = eth_type_trans(skb, netdev); 555 556 if (staterr & E1000_RXD_STAT_VP) 557 __vlan_hwaccel_put_tag(skb, tag); 558 559 napi_gro_receive(&adapter->napi, skb); 560 } 561 562 /** 563 * e1000_rx_checksum - Receive Checksum Offload 564 * @adapter: board private structure 565 * @status_err: receive descriptor status and error fields 566 * @csum: receive descriptor csum field 567 * @sk_buff: socket buffer with received data 568 **/ 569 static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err, 570 struct sk_buff *skb) 571 { 572 u16 status = (u16)status_err; 573 u8 errors = (u8)(status_err >> 24); 574 575 skb_checksum_none_assert(skb); 576 577 /* Rx checksum disabled */ 578 if (!(adapter->netdev->features & NETIF_F_RXCSUM)) 579 return; 580 581 /* Ignore Checksum bit is set */ 582 if (status & E1000_RXD_STAT_IXSM) 583 return; 584 585 /* TCP/UDP checksum error bit or IP checksum error bit is set */ 586 if (errors & (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) { 587 /* let the stack verify checksum errors */ 588 adapter->hw_csum_err++; 589 return; 590 } 591 592 /* TCP/UDP Checksum has not been calculated */ 593 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))) 594 return; 595 596 /* It must be a TCP or UDP packet with a valid checksum */ 597 skb->ip_summed = CHECKSUM_UNNECESSARY; 598 adapter->hw_csum_good++; 599 } 600 601 static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i) 602 { 603 struct e1000_adapter *adapter = rx_ring->adapter; 604 struct e1000_hw *hw = &adapter->hw; 605 s32 ret_val = __ew32_prepare(hw); 606 607 writel(i, rx_ring->tail); 608 609 if (unlikely(!ret_val && (i != readl(rx_ring->tail)))) { 610 u32 rctl = er32(RCTL); 611 ew32(RCTL, rctl & ~E1000_RCTL_EN); 612 e_err("ME firmware caused invalid RDT - resetting\n"); 613 schedule_work(&adapter->reset_task); 614 } 615 } 616 617 static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i) 618 { 619 struct e1000_adapter *adapter = tx_ring->adapter; 620 struct e1000_hw *hw = &adapter->hw; 621 s32 ret_val = __ew32_prepare(hw); 622 623 writel(i, tx_ring->tail); 624 625 if (unlikely(!ret_val && (i != readl(tx_ring->tail)))) { 626 u32 tctl = er32(TCTL); 627 ew32(TCTL, tctl & ~E1000_TCTL_EN); 628 e_err("ME firmware caused invalid TDT - resetting\n"); 629 schedule_work(&adapter->reset_task); 630 } 631 } 632 633 /** 634 * e1000_alloc_rx_buffers - Replace used receive buffers 635 * @rx_ring: Rx descriptor ring 636 **/ 637 static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring, 638 int cleaned_count, gfp_t gfp) 639 { 640 struct e1000_adapter *adapter = rx_ring->adapter; 641 struct net_device *netdev = adapter->netdev; 642 struct pci_dev *pdev = adapter->pdev; 643 union e1000_rx_desc_extended *rx_desc; 644 struct e1000_buffer *buffer_info; 645 struct sk_buff *skb; 646 unsigned int i; 647 unsigned int bufsz = adapter->rx_buffer_len; 648 649 i = rx_ring->next_to_use; 650 buffer_info = &rx_ring->buffer_info[i]; 651 652 while (cleaned_count--) { 653 skb = buffer_info->skb; 654 if (skb) { 655 skb_trim(skb, 0); 656 goto map_skb; 657 } 658 659 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp); 660 if (!skb) { 661 /* Better luck next round */ 662 adapter->alloc_rx_buff_failed++; 663 break; 664 } 665 666 buffer_info->skb = skb; 667 map_skb: 668 buffer_info->dma = dma_map_single(&pdev->dev, skb->data, 669 adapter->rx_buffer_len, 670 DMA_FROM_DEVICE); 671 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) { 672 dev_err(&pdev->dev, "Rx DMA map failed\n"); 673 adapter->rx_dma_failed++; 674 break; 675 } 676 677 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); 678 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma); 679 680 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) { 681 /* Force memory writes to complete before letting h/w 682 * know there are new descriptors to fetch. (Only 683 * applicable for weak-ordered memory model archs, 684 * such as IA-64). 685 */ 686 wmb(); 687 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) 688 e1000e_update_rdt_wa(rx_ring, i); 689 else 690 writel(i, rx_ring->tail); 691 } 692 i++; 693 if (i == rx_ring->count) 694 i = 0; 695 buffer_info = &rx_ring->buffer_info[i]; 696 } 697 698 rx_ring->next_to_use = i; 699 } 700 701 /** 702 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split 703 * @rx_ring: Rx descriptor ring 704 **/ 705 static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring, 706 int cleaned_count, gfp_t gfp) 707 { 708 struct e1000_adapter *adapter = rx_ring->adapter; 709 struct net_device *netdev = adapter->netdev; 710 struct pci_dev *pdev = adapter->pdev; 711 union e1000_rx_desc_packet_split *rx_desc; 712 struct e1000_buffer *buffer_info; 713 struct e1000_ps_page *ps_page; 714 struct sk_buff *skb; 715 unsigned int i, j; 716 717 i = rx_ring->next_to_use; 718 buffer_info = &rx_ring->buffer_info[i]; 719 720 while (cleaned_count--) { 721 rx_desc = E1000_RX_DESC_PS(*rx_ring, i); 722 723 for (j = 0; j < PS_PAGE_BUFFERS; j++) { 724 ps_page = &buffer_info->ps_pages[j]; 725 if (j >= adapter->rx_ps_pages) { 726 /* all unused desc entries get hw null ptr */ 727 rx_desc->read.buffer_addr[j + 1] = 728 ~cpu_to_le64(0); 729 continue; 730 } 731 if (!ps_page->page) { 732 ps_page->page = alloc_page(gfp); 733 if (!ps_page->page) { 734 adapter->alloc_rx_buff_failed++; 735 goto no_buffers; 736 } 737 ps_page->dma = dma_map_page(&pdev->dev, 738 ps_page->page, 739 0, PAGE_SIZE, 740 DMA_FROM_DEVICE); 741 if (dma_mapping_error(&pdev->dev, 742 ps_page->dma)) { 743 dev_err(&adapter->pdev->dev, 744 "Rx DMA page map failed\n"); 745 adapter->rx_dma_failed++; 746 goto no_buffers; 747 } 748 } 749 /* Refresh the desc even if buffer_addrs 750 * didn't change because each write-back 751 * erases this info. 752 */ 753 rx_desc->read.buffer_addr[j + 1] = 754 cpu_to_le64(ps_page->dma); 755 } 756 757 skb = __netdev_alloc_skb_ip_align(netdev, adapter->rx_ps_bsize0, 758 gfp); 759 760 if (!skb) { 761 adapter->alloc_rx_buff_failed++; 762 break; 763 } 764 765 buffer_info->skb = skb; 766 buffer_info->dma = dma_map_single(&pdev->dev, skb->data, 767 adapter->rx_ps_bsize0, 768 DMA_FROM_DEVICE); 769 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) { 770 dev_err(&pdev->dev, "Rx DMA map failed\n"); 771 adapter->rx_dma_failed++; 772 /* cleanup skb */ 773 dev_kfree_skb_any(skb); 774 buffer_info->skb = NULL; 775 break; 776 } 777 778 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma); 779 780 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) { 781 /* Force memory writes to complete before letting h/w 782 * know there are new descriptors to fetch. (Only 783 * applicable for weak-ordered memory model archs, 784 * such as IA-64). 785 */ 786 wmb(); 787 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) 788 e1000e_update_rdt_wa(rx_ring, i << 1); 789 else 790 writel(i << 1, rx_ring->tail); 791 } 792 793 i++; 794 if (i == rx_ring->count) 795 i = 0; 796 buffer_info = &rx_ring->buffer_info[i]; 797 } 798 799 no_buffers: 800 rx_ring->next_to_use = i; 801 } 802 803 /** 804 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers 805 * @rx_ring: Rx descriptor ring 806 * @cleaned_count: number of buffers to allocate this pass 807 **/ 808 809 static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring, 810 int cleaned_count, gfp_t gfp) 811 { 812 struct e1000_adapter *adapter = rx_ring->adapter; 813 struct net_device *netdev = adapter->netdev; 814 struct pci_dev *pdev = adapter->pdev; 815 union e1000_rx_desc_extended *rx_desc; 816 struct e1000_buffer *buffer_info; 817 struct sk_buff *skb; 818 unsigned int i; 819 unsigned int bufsz = 256 - 16; /* for skb_reserve */ 820 821 i = rx_ring->next_to_use; 822 buffer_info = &rx_ring->buffer_info[i]; 823 824 while (cleaned_count--) { 825 skb = buffer_info->skb; 826 if (skb) { 827 skb_trim(skb, 0); 828 goto check_page; 829 } 830 831 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp); 832 if (unlikely(!skb)) { 833 /* Better luck next round */ 834 adapter->alloc_rx_buff_failed++; 835 break; 836 } 837 838 buffer_info->skb = skb; 839 check_page: 840 /* allocate a new page if necessary */ 841 if (!buffer_info->page) { 842 buffer_info->page = alloc_page(gfp); 843 if (unlikely(!buffer_info->page)) { 844 adapter->alloc_rx_buff_failed++; 845 break; 846 } 847 } 848 849 if (!buffer_info->dma) 850 buffer_info->dma = dma_map_page(&pdev->dev, 851 buffer_info->page, 0, 852 PAGE_SIZE, 853 DMA_FROM_DEVICE); 854 855 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); 856 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma); 857 858 if (unlikely(++i == rx_ring->count)) 859 i = 0; 860 buffer_info = &rx_ring->buffer_info[i]; 861 } 862 863 if (likely(rx_ring->next_to_use != i)) { 864 rx_ring->next_to_use = i; 865 if (unlikely(i-- == 0)) 866 i = (rx_ring->count - 1); 867 868 /* Force memory writes to complete before letting h/w 869 * know there are new descriptors to fetch. (Only 870 * applicable for weak-ordered memory model archs, 871 * such as IA-64). 872 */ 873 wmb(); 874 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) 875 e1000e_update_rdt_wa(rx_ring, i); 876 else 877 writel(i, rx_ring->tail); 878 } 879 } 880 881 static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss, 882 struct sk_buff *skb) 883 { 884 if (netdev->features & NETIF_F_RXHASH) 885 skb->rxhash = le32_to_cpu(rss); 886 } 887 888 /** 889 * e1000_clean_rx_irq - Send received data up the network stack 890 * @rx_ring: Rx descriptor ring 891 * 892 * the return value indicates whether actual cleaning was done, there 893 * is no guarantee that everything was cleaned 894 **/ 895 static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done, 896 int work_to_do) 897 { 898 struct e1000_adapter *adapter = rx_ring->adapter; 899 struct net_device *netdev = adapter->netdev; 900 struct pci_dev *pdev = adapter->pdev; 901 struct e1000_hw *hw = &adapter->hw; 902 union e1000_rx_desc_extended *rx_desc, *next_rxd; 903 struct e1000_buffer *buffer_info, *next_buffer; 904 u32 length, staterr; 905 unsigned int i; 906 int cleaned_count = 0; 907 bool cleaned = false; 908 unsigned int total_rx_bytes = 0, total_rx_packets = 0; 909 910 i = rx_ring->next_to_clean; 911 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); 912 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 913 buffer_info = &rx_ring->buffer_info[i]; 914 915 while (staterr & E1000_RXD_STAT_DD) { 916 struct sk_buff *skb; 917 918 if (*work_done >= work_to_do) 919 break; 920 (*work_done)++; 921 rmb(); /* read descriptor and rx_buffer_info after status DD */ 922 923 skb = buffer_info->skb; 924 buffer_info->skb = NULL; 925 926 prefetch(skb->data - NET_IP_ALIGN); 927 928 i++; 929 if (i == rx_ring->count) 930 i = 0; 931 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i); 932 prefetch(next_rxd); 933 934 next_buffer = &rx_ring->buffer_info[i]; 935 936 cleaned = true; 937 cleaned_count++; 938 dma_unmap_single(&pdev->dev, buffer_info->dma, 939 adapter->rx_buffer_len, DMA_FROM_DEVICE); 940 buffer_info->dma = 0; 941 942 length = le16_to_cpu(rx_desc->wb.upper.length); 943 944 /* !EOP means multiple descriptors were used to store a single 945 * packet, if that's the case we need to toss it. In fact, we 946 * need to toss every packet with the EOP bit clear and the 947 * next frame that _does_ have the EOP bit set, as it is by 948 * definition only a frame fragment 949 */ 950 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) 951 adapter->flags2 |= FLAG2_IS_DISCARDING; 952 953 if (adapter->flags2 & FLAG2_IS_DISCARDING) { 954 /* All receives must fit into a single buffer */ 955 e_dbg("Receive packet consumed multiple buffers\n"); 956 /* recycle */ 957 buffer_info->skb = skb; 958 if (staterr & E1000_RXD_STAT_EOP) 959 adapter->flags2 &= ~FLAG2_IS_DISCARDING; 960 goto next_desc; 961 } 962 963 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) && 964 !(netdev->features & NETIF_F_RXALL))) { 965 /* recycle */ 966 buffer_info->skb = skb; 967 goto next_desc; 968 } 969 970 /* adjust length to remove Ethernet CRC */ 971 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) { 972 /* If configured to store CRC, don't subtract FCS, 973 * but keep the FCS bytes out of the total_rx_bytes 974 * counter 975 */ 976 if (netdev->features & NETIF_F_RXFCS) 977 total_rx_bytes -= 4; 978 else 979 length -= 4; 980 } 981 982 total_rx_bytes += length; 983 total_rx_packets++; 984 985 /* code added for copybreak, this should improve 986 * performance for small packets with large amounts 987 * of reassembly being done in the stack 988 */ 989 if (length < copybreak) { 990 struct sk_buff *new_skb = 991 netdev_alloc_skb_ip_align(netdev, length); 992 if (new_skb) { 993 skb_copy_to_linear_data_offset(new_skb, 994 -NET_IP_ALIGN, 995 (skb->data - 996 NET_IP_ALIGN), 997 (length + 998 NET_IP_ALIGN)); 999 /* save the skb in buffer_info as good */ 1000 buffer_info->skb = skb; 1001 skb = new_skb; 1002 } 1003 /* else just continue with the old one */ 1004 } 1005 /* end copybreak code */ 1006 skb_put(skb, length); 1007 1008 /* Receive Checksum Offload */ 1009 e1000_rx_checksum(adapter, staterr, skb); 1010 1011 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb); 1012 1013 e1000_receive_skb(adapter, netdev, skb, staterr, 1014 rx_desc->wb.upper.vlan); 1015 1016 next_desc: 1017 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF); 1018 1019 /* return some buffers to hardware, one at a time is too slow */ 1020 if (cleaned_count >= E1000_RX_BUFFER_WRITE) { 1021 adapter->alloc_rx_buf(rx_ring, cleaned_count, 1022 GFP_ATOMIC); 1023 cleaned_count = 0; 1024 } 1025 1026 /* use prefetched values */ 1027 rx_desc = next_rxd; 1028 buffer_info = next_buffer; 1029 1030 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 1031 } 1032 rx_ring->next_to_clean = i; 1033 1034 cleaned_count = e1000_desc_unused(rx_ring); 1035 if (cleaned_count) 1036 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC); 1037 1038 adapter->total_rx_bytes += total_rx_bytes; 1039 adapter->total_rx_packets += total_rx_packets; 1040 return cleaned; 1041 } 1042 1043 static void e1000_put_txbuf(struct e1000_ring *tx_ring, 1044 struct e1000_buffer *buffer_info) 1045 { 1046 struct e1000_adapter *adapter = tx_ring->adapter; 1047 1048 if (buffer_info->dma) { 1049 if (buffer_info->mapped_as_page) 1050 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma, 1051 buffer_info->length, DMA_TO_DEVICE); 1052 else 1053 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma, 1054 buffer_info->length, DMA_TO_DEVICE); 1055 buffer_info->dma = 0; 1056 } 1057 if (buffer_info->skb) { 1058 dev_kfree_skb_any(buffer_info->skb); 1059 buffer_info->skb = NULL; 1060 } 1061 buffer_info->time_stamp = 0; 1062 } 1063 1064 static void e1000_print_hw_hang(struct work_struct *work) 1065 { 1066 struct e1000_adapter *adapter = container_of(work, 1067 struct e1000_adapter, 1068 print_hang_task); 1069 struct net_device *netdev = adapter->netdev; 1070 struct e1000_ring *tx_ring = adapter->tx_ring; 1071 unsigned int i = tx_ring->next_to_clean; 1072 unsigned int eop = tx_ring->buffer_info[i].next_to_watch; 1073 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop); 1074 struct e1000_hw *hw = &adapter->hw; 1075 u16 phy_status, phy_1000t_status, phy_ext_status; 1076 u16 pci_status; 1077 1078 if (test_bit(__E1000_DOWN, &adapter->state)) 1079 return; 1080 1081 if (!adapter->tx_hang_recheck && (adapter->flags2 & FLAG2_DMA_BURST)) { 1082 /* May be block on write-back, flush and detect again 1083 * flush pending descriptor writebacks to memory 1084 */ 1085 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); 1086 /* execute the writes immediately */ 1087 e1e_flush(); 1088 /* Due to rare timing issues, write to TIDV again to ensure 1089 * the write is successful 1090 */ 1091 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); 1092 /* execute the writes immediately */ 1093 e1e_flush(); 1094 adapter->tx_hang_recheck = true; 1095 return; 1096 } 1097 /* Real hang detected */ 1098 adapter->tx_hang_recheck = false; 1099 netif_stop_queue(netdev); 1100 1101 e1e_rphy(hw, MII_BMSR, &phy_status); 1102 e1e_rphy(hw, MII_STAT1000, &phy_1000t_status); 1103 e1e_rphy(hw, MII_ESTATUS, &phy_ext_status); 1104 1105 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status); 1106 1107 /* detected Hardware unit hang */ 1108 e_err("Detected Hardware Unit Hang:\n" 1109 " TDH <%x>\n" 1110 " TDT <%x>\n" 1111 " next_to_use <%x>\n" 1112 " next_to_clean <%x>\n" 1113 "buffer_info[next_to_clean]:\n" 1114 " time_stamp <%lx>\n" 1115 " next_to_watch <%x>\n" 1116 " jiffies <%lx>\n" 1117 " next_to_watch.status <%x>\n" 1118 "MAC Status <%x>\n" 1119 "PHY Status <%x>\n" 1120 "PHY 1000BASE-T Status <%x>\n" 1121 "PHY Extended Status <%x>\n" 1122 "PCI Status <%x>\n", 1123 readl(tx_ring->head), readl(tx_ring->tail), tx_ring->next_to_use, 1124 tx_ring->next_to_clean, tx_ring->buffer_info[eop].time_stamp, 1125 eop, jiffies, eop_desc->upper.fields.status, er32(STATUS), 1126 phy_status, phy_1000t_status, phy_ext_status, pci_status); 1127 1128 /* Suggest workaround for known h/w issue */ 1129 if ((hw->mac.type == e1000_pchlan) && (er32(CTRL) & E1000_CTRL_TFCE)) 1130 e_err("Try turning off Tx pause (flow control) via ethtool\n"); 1131 } 1132 1133 /** 1134 * e1000e_tx_hwtstamp_work - check for Tx time stamp 1135 * @work: pointer to work struct 1136 * 1137 * This work function polls the TSYNCTXCTL valid bit to determine when a 1138 * timestamp has been taken for the current stored skb. The timestamp must 1139 * be for this skb because only one such packet is allowed in the queue. 1140 */ 1141 static void e1000e_tx_hwtstamp_work(struct work_struct *work) 1142 { 1143 struct e1000_adapter *adapter = container_of(work, struct e1000_adapter, 1144 tx_hwtstamp_work); 1145 struct e1000_hw *hw = &adapter->hw; 1146 1147 if (!adapter->tx_hwtstamp_skb) 1148 return; 1149 1150 if (er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID) { 1151 struct skb_shared_hwtstamps shhwtstamps; 1152 u64 txstmp; 1153 1154 txstmp = er32(TXSTMPL); 1155 txstmp |= (u64)er32(TXSTMPH) << 32; 1156 1157 e1000e_systim_to_hwtstamp(adapter, &shhwtstamps, txstmp); 1158 1159 skb_tstamp_tx(adapter->tx_hwtstamp_skb, &shhwtstamps); 1160 dev_kfree_skb_any(adapter->tx_hwtstamp_skb); 1161 adapter->tx_hwtstamp_skb = NULL; 1162 } else { 1163 /* reschedule to check later */ 1164 schedule_work(&adapter->tx_hwtstamp_work); 1165 } 1166 } 1167 1168 /** 1169 * e1000_clean_tx_irq - Reclaim resources after transmit completes 1170 * @tx_ring: Tx descriptor ring 1171 * 1172 * the return value indicates whether actual cleaning was done, there 1173 * is no guarantee that everything was cleaned 1174 **/ 1175 static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring) 1176 { 1177 struct e1000_adapter *adapter = tx_ring->adapter; 1178 struct net_device *netdev = adapter->netdev; 1179 struct e1000_hw *hw = &adapter->hw; 1180 struct e1000_tx_desc *tx_desc, *eop_desc; 1181 struct e1000_buffer *buffer_info; 1182 unsigned int i, eop; 1183 unsigned int count = 0; 1184 unsigned int total_tx_bytes = 0, total_tx_packets = 0; 1185 unsigned int bytes_compl = 0, pkts_compl = 0; 1186 1187 i = tx_ring->next_to_clean; 1188 eop = tx_ring->buffer_info[i].next_to_watch; 1189 eop_desc = E1000_TX_DESC(*tx_ring, eop); 1190 1191 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) && 1192 (count < tx_ring->count)) { 1193 bool cleaned = false; 1194 rmb(); /* read buffer_info after eop_desc */ 1195 for (; !cleaned; count++) { 1196 tx_desc = E1000_TX_DESC(*tx_ring, i); 1197 buffer_info = &tx_ring->buffer_info[i]; 1198 cleaned = (i == eop); 1199 1200 if (cleaned) { 1201 total_tx_packets += buffer_info->segs; 1202 total_tx_bytes += buffer_info->bytecount; 1203 if (buffer_info->skb) { 1204 bytes_compl += buffer_info->skb->len; 1205 pkts_compl++; 1206 } 1207 } 1208 1209 e1000_put_txbuf(tx_ring, buffer_info); 1210 tx_desc->upper.data = 0; 1211 1212 i++; 1213 if (i == tx_ring->count) 1214 i = 0; 1215 } 1216 1217 if (i == tx_ring->next_to_use) 1218 break; 1219 eop = tx_ring->buffer_info[i].next_to_watch; 1220 eop_desc = E1000_TX_DESC(*tx_ring, eop); 1221 } 1222 1223 tx_ring->next_to_clean = i; 1224 1225 netdev_completed_queue(netdev, pkts_compl, bytes_compl); 1226 1227 #define TX_WAKE_THRESHOLD 32 1228 if (count && netif_carrier_ok(netdev) && 1229 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) { 1230 /* Make sure that anybody stopping the queue after this 1231 * sees the new next_to_clean. 1232 */ 1233 smp_mb(); 1234 1235 if (netif_queue_stopped(netdev) && 1236 !(test_bit(__E1000_DOWN, &adapter->state))) { 1237 netif_wake_queue(netdev); 1238 ++adapter->restart_queue; 1239 } 1240 } 1241 1242 if (adapter->detect_tx_hung) { 1243 /* Detect a transmit hang in hardware, this serializes the 1244 * check with the clearing of time_stamp and movement of i 1245 */ 1246 adapter->detect_tx_hung = false; 1247 if (tx_ring->buffer_info[i].time_stamp && 1248 time_after(jiffies, tx_ring->buffer_info[i].time_stamp 1249 + (adapter->tx_timeout_factor * HZ)) && 1250 !(er32(STATUS) & E1000_STATUS_TXOFF)) 1251 schedule_work(&adapter->print_hang_task); 1252 else 1253 adapter->tx_hang_recheck = false; 1254 } 1255 adapter->total_tx_bytes += total_tx_bytes; 1256 adapter->total_tx_packets += total_tx_packets; 1257 return count < tx_ring->count; 1258 } 1259 1260 /** 1261 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split 1262 * @rx_ring: Rx descriptor ring 1263 * 1264 * the return value indicates whether actual cleaning was done, there 1265 * is no guarantee that everything was cleaned 1266 **/ 1267 static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done, 1268 int work_to_do) 1269 { 1270 struct e1000_adapter *adapter = rx_ring->adapter; 1271 struct e1000_hw *hw = &adapter->hw; 1272 union e1000_rx_desc_packet_split *rx_desc, *next_rxd; 1273 struct net_device *netdev = adapter->netdev; 1274 struct pci_dev *pdev = adapter->pdev; 1275 struct e1000_buffer *buffer_info, *next_buffer; 1276 struct e1000_ps_page *ps_page; 1277 struct sk_buff *skb; 1278 unsigned int i, j; 1279 u32 length, staterr; 1280 int cleaned_count = 0; 1281 bool cleaned = false; 1282 unsigned int total_rx_bytes = 0, total_rx_packets = 0; 1283 1284 i = rx_ring->next_to_clean; 1285 rx_desc = E1000_RX_DESC_PS(*rx_ring, i); 1286 staterr = le32_to_cpu(rx_desc->wb.middle.status_error); 1287 buffer_info = &rx_ring->buffer_info[i]; 1288 1289 while (staterr & E1000_RXD_STAT_DD) { 1290 if (*work_done >= work_to_do) 1291 break; 1292 (*work_done)++; 1293 skb = buffer_info->skb; 1294 rmb(); /* read descriptor and rx_buffer_info after status DD */ 1295 1296 /* in the packet split case this is header only */ 1297 prefetch(skb->data - NET_IP_ALIGN); 1298 1299 i++; 1300 if (i == rx_ring->count) 1301 i = 0; 1302 next_rxd = E1000_RX_DESC_PS(*rx_ring, i); 1303 prefetch(next_rxd); 1304 1305 next_buffer = &rx_ring->buffer_info[i]; 1306 1307 cleaned = true; 1308 cleaned_count++; 1309 dma_unmap_single(&pdev->dev, buffer_info->dma, 1310 adapter->rx_ps_bsize0, DMA_FROM_DEVICE); 1311 buffer_info->dma = 0; 1312 1313 /* see !EOP comment in other Rx routine */ 1314 if (!(staterr & E1000_RXD_STAT_EOP)) 1315 adapter->flags2 |= FLAG2_IS_DISCARDING; 1316 1317 if (adapter->flags2 & FLAG2_IS_DISCARDING) { 1318 e_dbg("Packet Split buffers didn't pick up the full packet\n"); 1319 dev_kfree_skb_irq(skb); 1320 if (staterr & E1000_RXD_STAT_EOP) 1321 adapter->flags2 &= ~FLAG2_IS_DISCARDING; 1322 goto next_desc; 1323 } 1324 1325 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) && 1326 !(netdev->features & NETIF_F_RXALL))) { 1327 dev_kfree_skb_irq(skb); 1328 goto next_desc; 1329 } 1330 1331 length = le16_to_cpu(rx_desc->wb.middle.length0); 1332 1333 if (!length) { 1334 e_dbg("Last part of the packet spanning multiple descriptors\n"); 1335 dev_kfree_skb_irq(skb); 1336 goto next_desc; 1337 } 1338 1339 /* Good Receive */ 1340 skb_put(skb, length); 1341 1342 { 1343 /* this looks ugly, but it seems compiler issues make 1344 * it more efficient than reusing j 1345 */ 1346 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]); 1347 1348 /* page alloc/put takes too long and effects small 1349 * packet throughput, so unsplit small packets and 1350 * save the alloc/put only valid in softirq (napi) 1351 * context to call kmap_* 1352 */ 1353 if (l1 && (l1 <= copybreak) && 1354 ((length + l1) <= adapter->rx_ps_bsize0)) { 1355 u8 *vaddr; 1356 1357 ps_page = &buffer_info->ps_pages[0]; 1358 1359 /* there is no documentation about how to call 1360 * kmap_atomic, so we can't hold the mapping 1361 * very long 1362 */ 1363 dma_sync_single_for_cpu(&pdev->dev, 1364 ps_page->dma, 1365 PAGE_SIZE, 1366 DMA_FROM_DEVICE); 1367 vaddr = kmap_atomic(ps_page->page); 1368 memcpy(skb_tail_pointer(skb), vaddr, l1); 1369 kunmap_atomic(vaddr); 1370 dma_sync_single_for_device(&pdev->dev, 1371 ps_page->dma, 1372 PAGE_SIZE, 1373 DMA_FROM_DEVICE); 1374 1375 /* remove the CRC */ 1376 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) { 1377 if (!(netdev->features & NETIF_F_RXFCS)) 1378 l1 -= 4; 1379 } 1380 1381 skb_put(skb, l1); 1382 goto copydone; 1383 } /* if */ 1384 } 1385 1386 for (j = 0; j < PS_PAGE_BUFFERS; j++) { 1387 length = le16_to_cpu(rx_desc->wb.upper.length[j]); 1388 if (!length) 1389 break; 1390 1391 ps_page = &buffer_info->ps_pages[j]; 1392 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE, 1393 DMA_FROM_DEVICE); 1394 ps_page->dma = 0; 1395 skb_fill_page_desc(skb, j, ps_page->page, 0, length); 1396 ps_page->page = NULL; 1397 skb->len += length; 1398 skb->data_len += length; 1399 skb->truesize += PAGE_SIZE; 1400 } 1401 1402 /* strip the ethernet crc, problem is we're using pages now so 1403 * this whole operation can get a little cpu intensive 1404 */ 1405 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) { 1406 if (!(netdev->features & NETIF_F_RXFCS)) 1407 pskb_trim(skb, skb->len - 4); 1408 } 1409 1410 copydone: 1411 total_rx_bytes += skb->len; 1412 total_rx_packets++; 1413 1414 e1000_rx_checksum(adapter, staterr, skb); 1415 1416 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb); 1417 1418 if (rx_desc->wb.upper.header_status & 1419 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)) 1420 adapter->rx_hdr_split++; 1421 1422 e1000_receive_skb(adapter, netdev, skb, staterr, 1423 rx_desc->wb.middle.vlan); 1424 1425 next_desc: 1426 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF); 1427 buffer_info->skb = NULL; 1428 1429 /* return some buffers to hardware, one at a time is too slow */ 1430 if (cleaned_count >= E1000_RX_BUFFER_WRITE) { 1431 adapter->alloc_rx_buf(rx_ring, cleaned_count, 1432 GFP_ATOMIC); 1433 cleaned_count = 0; 1434 } 1435 1436 /* use prefetched values */ 1437 rx_desc = next_rxd; 1438 buffer_info = next_buffer; 1439 1440 staterr = le32_to_cpu(rx_desc->wb.middle.status_error); 1441 } 1442 rx_ring->next_to_clean = i; 1443 1444 cleaned_count = e1000_desc_unused(rx_ring); 1445 if (cleaned_count) 1446 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC); 1447 1448 adapter->total_rx_bytes += total_rx_bytes; 1449 adapter->total_rx_packets += total_rx_packets; 1450 return cleaned; 1451 } 1452 1453 /** 1454 * e1000_consume_page - helper function 1455 **/ 1456 static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb, 1457 u16 length) 1458 { 1459 bi->page = NULL; 1460 skb->len += length; 1461 skb->data_len += length; 1462 skb->truesize += PAGE_SIZE; 1463 } 1464 1465 /** 1466 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy 1467 * @adapter: board private structure 1468 * 1469 * the return value indicates whether actual cleaning was done, there 1470 * is no guarantee that everything was cleaned 1471 **/ 1472 static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done, 1473 int work_to_do) 1474 { 1475 struct e1000_adapter *adapter = rx_ring->adapter; 1476 struct net_device *netdev = adapter->netdev; 1477 struct pci_dev *pdev = adapter->pdev; 1478 union e1000_rx_desc_extended *rx_desc, *next_rxd; 1479 struct e1000_buffer *buffer_info, *next_buffer; 1480 u32 length, staterr; 1481 unsigned int i; 1482 int cleaned_count = 0; 1483 bool cleaned = false; 1484 unsigned int total_rx_bytes = 0, total_rx_packets = 0; 1485 struct skb_shared_info *shinfo; 1486 1487 i = rx_ring->next_to_clean; 1488 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); 1489 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 1490 buffer_info = &rx_ring->buffer_info[i]; 1491 1492 while (staterr & E1000_RXD_STAT_DD) { 1493 struct sk_buff *skb; 1494 1495 if (*work_done >= work_to_do) 1496 break; 1497 (*work_done)++; 1498 rmb(); /* read descriptor and rx_buffer_info after status DD */ 1499 1500 skb = buffer_info->skb; 1501 buffer_info->skb = NULL; 1502 1503 ++i; 1504 if (i == rx_ring->count) 1505 i = 0; 1506 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i); 1507 prefetch(next_rxd); 1508 1509 next_buffer = &rx_ring->buffer_info[i]; 1510 1511 cleaned = true; 1512 cleaned_count++; 1513 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE, 1514 DMA_FROM_DEVICE); 1515 buffer_info->dma = 0; 1516 1517 length = le16_to_cpu(rx_desc->wb.upper.length); 1518 1519 /* errors is only valid for DD + EOP descriptors */ 1520 if (unlikely((staterr & E1000_RXD_STAT_EOP) && 1521 ((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) && 1522 !(netdev->features & NETIF_F_RXALL)))) { 1523 /* recycle both page and skb */ 1524 buffer_info->skb = skb; 1525 /* an error means any chain goes out the window too */ 1526 if (rx_ring->rx_skb_top) 1527 dev_kfree_skb_irq(rx_ring->rx_skb_top); 1528 rx_ring->rx_skb_top = NULL; 1529 goto next_desc; 1530 } 1531 #define rxtop (rx_ring->rx_skb_top) 1532 if (!(staterr & E1000_RXD_STAT_EOP)) { 1533 /* this descriptor is only the beginning (or middle) */ 1534 if (!rxtop) { 1535 /* this is the beginning of a chain */ 1536 rxtop = skb; 1537 skb_fill_page_desc(rxtop, 0, buffer_info->page, 1538 0, length); 1539 } else { 1540 /* this is the middle of a chain */ 1541 shinfo = skb_shinfo(rxtop); 1542 skb_fill_page_desc(rxtop, shinfo->nr_frags, 1543 buffer_info->page, 0, 1544 length); 1545 /* re-use the skb, only consumed the page */ 1546 buffer_info->skb = skb; 1547 } 1548 e1000_consume_page(buffer_info, rxtop, length); 1549 goto next_desc; 1550 } else { 1551 if (rxtop) { 1552 /* end of the chain */ 1553 shinfo = skb_shinfo(rxtop); 1554 skb_fill_page_desc(rxtop, shinfo->nr_frags, 1555 buffer_info->page, 0, 1556 length); 1557 /* re-use the current skb, we only consumed the 1558 * page 1559 */ 1560 buffer_info->skb = skb; 1561 skb = rxtop; 1562 rxtop = NULL; 1563 e1000_consume_page(buffer_info, skb, length); 1564 } else { 1565 /* no chain, got EOP, this buf is the packet 1566 * copybreak to save the put_page/alloc_page 1567 */ 1568 if (length <= copybreak && 1569 skb_tailroom(skb) >= length) { 1570 u8 *vaddr; 1571 vaddr = kmap_atomic(buffer_info->page); 1572 memcpy(skb_tail_pointer(skb), vaddr, 1573 length); 1574 kunmap_atomic(vaddr); 1575 /* re-use the page, so don't erase 1576 * buffer_info->page 1577 */ 1578 skb_put(skb, length); 1579 } else { 1580 skb_fill_page_desc(skb, 0, 1581 buffer_info->page, 0, 1582 length); 1583 e1000_consume_page(buffer_info, skb, 1584 length); 1585 } 1586 } 1587 } 1588 1589 /* Receive Checksum Offload */ 1590 e1000_rx_checksum(adapter, staterr, skb); 1591 1592 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb); 1593 1594 /* probably a little skewed due to removing CRC */ 1595 total_rx_bytes += skb->len; 1596 total_rx_packets++; 1597 1598 /* eth type trans needs skb->data to point to something */ 1599 if (!pskb_may_pull(skb, ETH_HLEN)) { 1600 e_err("pskb_may_pull failed.\n"); 1601 dev_kfree_skb_irq(skb); 1602 goto next_desc; 1603 } 1604 1605 e1000_receive_skb(adapter, netdev, skb, staterr, 1606 rx_desc->wb.upper.vlan); 1607 1608 next_desc: 1609 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF); 1610 1611 /* return some buffers to hardware, one at a time is too slow */ 1612 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) { 1613 adapter->alloc_rx_buf(rx_ring, cleaned_count, 1614 GFP_ATOMIC); 1615 cleaned_count = 0; 1616 } 1617 1618 /* use prefetched values */ 1619 rx_desc = next_rxd; 1620 buffer_info = next_buffer; 1621 1622 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 1623 } 1624 rx_ring->next_to_clean = i; 1625 1626 cleaned_count = e1000_desc_unused(rx_ring); 1627 if (cleaned_count) 1628 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC); 1629 1630 adapter->total_rx_bytes += total_rx_bytes; 1631 adapter->total_rx_packets += total_rx_packets; 1632 return cleaned; 1633 } 1634 1635 /** 1636 * e1000_clean_rx_ring - Free Rx Buffers per Queue 1637 * @rx_ring: Rx descriptor ring 1638 **/ 1639 static void e1000_clean_rx_ring(struct e1000_ring *rx_ring) 1640 { 1641 struct e1000_adapter *adapter = rx_ring->adapter; 1642 struct e1000_buffer *buffer_info; 1643 struct e1000_ps_page *ps_page; 1644 struct pci_dev *pdev = adapter->pdev; 1645 unsigned int i, j; 1646 1647 /* Free all the Rx ring sk_buffs */ 1648 for (i = 0; i < rx_ring->count; i++) { 1649 buffer_info = &rx_ring->buffer_info[i]; 1650 if (buffer_info->dma) { 1651 if (adapter->clean_rx == e1000_clean_rx_irq) 1652 dma_unmap_single(&pdev->dev, buffer_info->dma, 1653 adapter->rx_buffer_len, 1654 DMA_FROM_DEVICE); 1655 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq) 1656 dma_unmap_page(&pdev->dev, buffer_info->dma, 1657 PAGE_SIZE, DMA_FROM_DEVICE); 1658 else if (adapter->clean_rx == e1000_clean_rx_irq_ps) 1659 dma_unmap_single(&pdev->dev, buffer_info->dma, 1660 adapter->rx_ps_bsize0, 1661 DMA_FROM_DEVICE); 1662 buffer_info->dma = 0; 1663 } 1664 1665 if (buffer_info->page) { 1666 put_page(buffer_info->page); 1667 buffer_info->page = NULL; 1668 } 1669 1670 if (buffer_info->skb) { 1671 dev_kfree_skb(buffer_info->skb); 1672 buffer_info->skb = NULL; 1673 } 1674 1675 for (j = 0; j < PS_PAGE_BUFFERS; j++) { 1676 ps_page = &buffer_info->ps_pages[j]; 1677 if (!ps_page->page) 1678 break; 1679 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE, 1680 DMA_FROM_DEVICE); 1681 ps_page->dma = 0; 1682 put_page(ps_page->page); 1683 ps_page->page = NULL; 1684 } 1685 } 1686 1687 /* there also may be some cached data from a chained receive */ 1688 if (rx_ring->rx_skb_top) { 1689 dev_kfree_skb(rx_ring->rx_skb_top); 1690 rx_ring->rx_skb_top = NULL; 1691 } 1692 1693 /* Zero out the descriptor ring */ 1694 memset(rx_ring->desc, 0, rx_ring->size); 1695 1696 rx_ring->next_to_clean = 0; 1697 rx_ring->next_to_use = 0; 1698 adapter->flags2 &= ~FLAG2_IS_DISCARDING; 1699 1700 writel(0, rx_ring->head); 1701 if (rx_ring->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) 1702 e1000e_update_rdt_wa(rx_ring, 0); 1703 else 1704 writel(0, rx_ring->tail); 1705 } 1706 1707 static void e1000e_downshift_workaround(struct work_struct *work) 1708 { 1709 struct e1000_adapter *adapter = container_of(work, 1710 struct e1000_adapter, 1711 downshift_task); 1712 1713 if (test_bit(__E1000_DOWN, &adapter->state)) 1714 return; 1715 1716 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw); 1717 } 1718 1719 /** 1720 * e1000_intr_msi - Interrupt Handler 1721 * @irq: interrupt number 1722 * @data: pointer to a network interface device structure 1723 **/ 1724 static irqreturn_t e1000_intr_msi(int __always_unused irq, void *data) 1725 { 1726 struct net_device *netdev = data; 1727 struct e1000_adapter *adapter = netdev_priv(netdev); 1728 struct e1000_hw *hw = &adapter->hw; 1729 u32 icr = er32(ICR); 1730 1731 /* read ICR disables interrupts using IAM */ 1732 if (icr & E1000_ICR_LSC) { 1733 hw->mac.get_link_status = true; 1734 /* ICH8 workaround-- Call gig speed drop workaround on cable 1735 * disconnect (LSC) before accessing any PHY registers 1736 */ 1737 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) && 1738 (!(er32(STATUS) & E1000_STATUS_LU))) 1739 schedule_work(&adapter->downshift_task); 1740 1741 /* 80003ES2LAN workaround-- For packet buffer work-around on 1742 * link down event; disable receives here in the ISR and reset 1743 * adapter in watchdog 1744 */ 1745 if (netif_carrier_ok(netdev) && 1746 adapter->flags & FLAG_RX_NEEDS_RESTART) { 1747 /* disable receives */ 1748 u32 rctl = er32(RCTL); 1749 ew32(RCTL, rctl & ~E1000_RCTL_EN); 1750 adapter->flags |= FLAG_RESTART_NOW; 1751 } 1752 /* guard against interrupt when we're going down */ 1753 if (!test_bit(__E1000_DOWN, &adapter->state)) 1754 mod_timer(&adapter->watchdog_timer, jiffies + 1); 1755 } 1756 1757 /* Reset on uncorrectable ECC error */ 1758 if ((icr & E1000_ICR_ECCER) && (hw->mac.type == e1000_pch_lpt)) { 1759 u32 pbeccsts = er32(PBECCSTS); 1760 1761 adapter->corr_errors += 1762 pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK; 1763 adapter->uncorr_errors += 1764 (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >> 1765 E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT; 1766 1767 /* Do the reset outside of interrupt context */ 1768 schedule_work(&adapter->reset_task); 1769 1770 /* return immediately since reset is imminent */ 1771 return IRQ_HANDLED; 1772 } 1773 1774 if (napi_schedule_prep(&adapter->napi)) { 1775 adapter->total_tx_bytes = 0; 1776 adapter->total_tx_packets = 0; 1777 adapter->total_rx_bytes = 0; 1778 adapter->total_rx_packets = 0; 1779 __napi_schedule(&adapter->napi); 1780 } 1781 1782 return IRQ_HANDLED; 1783 } 1784 1785 /** 1786 * e1000_intr - Interrupt Handler 1787 * @irq: interrupt number 1788 * @data: pointer to a network interface device structure 1789 **/ 1790 static irqreturn_t e1000_intr(int __always_unused irq, void *data) 1791 { 1792 struct net_device *netdev = data; 1793 struct e1000_adapter *adapter = netdev_priv(netdev); 1794 struct e1000_hw *hw = &adapter->hw; 1795 u32 rctl, icr = er32(ICR); 1796 1797 if (!icr || test_bit(__E1000_DOWN, &adapter->state)) 1798 return IRQ_NONE; /* Not our interrupt */ 1799 1800 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is 1801 * not set, then the adapter didn't send an interrupt 1802 */ 1803 if (!(icr & E1000_ICR_INT_ASSERTED)) 1804 return IRQ_NONE; 1805 1806 /* Interrupt Auto-Mask...upon reading ICR, 1807 * interrupts are masked. No need for the 1808 * IMC write 1809 */ 1810 1811 if (icr & E1000_ICR_LSC) { 1812 hw->mac.get_link_status = true; 1813 /* ICH8 workaround-- Call gig speed drop workaround on cable 1814 * disconnect (LSC) before accessing any PHY registers 1815 */ 1816 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) && 1817 (!(er32(STATUS) & E1000_STATUS_LU))) 1818 schedule_work(&adapter->downshift_task); 1819 1820 /* 80003ES2LAN workaround-- 1821 * For packet buffer work-around on link down event; 1822 * disable receives here in the ISR and 1823 * reset adapter in watchdog 1824 */ 1825 if (netif_carrier_ok(netdev) && 1826 (adapter->flags & FLAG_RX_NEEDS_RESTART)) { 1827 /* disable receives */ 1828 rctl = er32(RCTL); 1829 ew32(RCTL, rctl & ~E1000_RCTL_EN); 1830 adapter->flags |= FLAG_RESTART_NOW; 1831 } 1832 /* guard against interrupt when we're going down */ 1833 if (!test_bit(__E1000_DOWN, &adapter->state)) 1834 mod_timer(&adapter->watchdog_timer, jiffies + 1); 1835 } 1836 1837 /* Reset on uncorrectable ECC error */ 1838 if ((icr & E1000_ICR_ECCER) && (hw->mac.type == e1000_pch_lpt)) { 1839 u32 pbeccsts = er32(PBECCSTS); 1840 1841 adapter->corr_errors += 1842 pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK; 1843 adapter->uncorr_errors += 1844 (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >> 1845 E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT; 1846 1847 /* Do the reset outside of interrupt context */ 1848 schedule_work(&adapter->reset_task); 1849 1850 /* return immediately since reset is imminent */ 1851 return IRQ_HANDLED; 1852 } 1853 1854 if (napi_schedule_prep(&adapter->napi)) { 1855 adapter->total_tx_bytes = 0; 1856 adapter->total_tx_packets = 0; 1857 adapter->total_rx_bytes = 0; 1858 adapter->total_rx_packets = 0; 1859 __napi_schedule(&adapter->napi); 1860 } 1861 1862 return IRQ_HANDLED; 1863 } 1864 1865 static irqreturn_t e1000_msix_other(int __always_unused irq, void *data) 1866 { 1867 struct net_device *netdev = data; 1868 struct e1000_adapter *adapter = netdev_priv(netdev); 1869 struct e1000_hw *hw = &adapter->hw; 1870 u32 icr = er32(ICR); 1871 1872 if (!(icr & E1000_ICR_INT_ASSERTED)) { 1873 if (!test_bit(__E1000_DOWN, &adapter->state)) 1874 ew32(IMS, E1000_IMS_OTHER); 1875 return IRQ_NONE; 1876 } 1877 1878 if (icr & adapter->eiac_mask) 1879 ew32(ICS, (icr & adapter->eiac_mask)); 1880 1881 if (icr & E1000_ICR_OTHER) { 1882 if (!(icr & E1000_ICR_LSC)) 1883 goto no_link_interrupt; 1884 hw->mac.get_link_status = true; 1885 /* guard against interrupt when we're going down */ 1886 if (!test_bit(__E1000_DOWN, &adapter->state)) 1887 mod_timer(&adapter->watchdog_timer, jiffies + 1); 1888 } 1889 1890 no_link_interrupt: 1891 if (!test_bit(__E1000_DOWN, &adapter->state)) 1892 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER); 1893 1894 return IRQ_HANDLED; 1895 } 1896 1897 static irqreturn_t e1000_intr_msix_tx(int __always_unused irq, void *data) 1898 { 1899 struct net_device *netdev = data; 1900 struct e1000_adapter *adapter = netdev_priv(netdev); 1901 struct e1000_hw *hw = &adapter->hw; 1902 struct e1000_ring *tx_ring = adapter->tx_ring; 1903 1904 adapter->total_tx_bytes = 0; 1905 adapter->total_tx_packets = 0; 1906 1907 if (!e1000_clean_tx_irq(tx_ring)) 1908 /* Ring was not completely cleaned, so fire another interrupt */ 1909 ew32(ICS, tx_ring->ims_val); 1910 1911 return IRQ_HANDLED; 1912 } 1913 1914 static irqreturn_t e1000_intr_msix_rx(int __always_unused irq, void *data) 1915 { 1916 struct net_device *netdev = data; 1917 struct e1000_adapter *adapter = netdev_priv(netdev); 1918 struct e1000_ring *rx_ring = adapter->rx_ring; 1919 1920 /* Write the ITR value calculated at the end of the 1921 * previous interrupt. 1922 */ 1923 if (rx_ring->set_itr) { 1924 writel(1000000000 / (rx_ring->itr_val * 256), 1925 rx_ring->itr_register); 1926 rx_ring->set_itr = 0; 1927 } 1928 1929 if (napi_schedule_prep(&adapter->napi)) { 1930 adapter->total_rx_bytes = 0; 1931 adapter->total_rx_packets = 0; 1932 __napi_schedule(&adapter->napi); 1933 } 1934 return IRQ_HANDLED; 1935 } 1936 1937 /** 1938 * e1000_configure_msix - Configure MSI-X hardware 1939 * 1940 * e1000_configure_msix sets up the hardware to properly 1941 * generate MSI-X interrupts. 1942 **/ 1943 static void e1000_configure_msix(struct e1000_adapter *adapter) 1944 { 1945 struct e1000_hw *hw = &adapter->hw; 1946 struct e1000_ring *rx_ring = adapter->rx_ring; 1947 struct e1000_ring *tx_ring = adapter->tx_ring; 1948 int vector = 0; 1949 u32 ctrl_ext, ivar = 0; 1950 1951 adapter->eiac_mask = 0; 1952 1953 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */ 1954 if (hw->mac.type == e1000_82574) { 1955 u32 rfctl = er32(RFCTL); 1956 rfctl |= E1000_RFCTL_ACK_DIS; 1957 ew32(RFCTL, rfctl); 1958 } 1959 1960 /* Configure Rx vector */ 1961 rx_ring->ims_val = E1000_IMS_RXQ0; 1962 adapter->eiac_mask |= rx_ring->ims_val; 1963 if (rx_ring->itr_val) 1964 writel(1000000000 / (rx_ring->itr_val * 256), 1965 rx_ring->itr_register); 1966 else 1967 writel(1, rx_ring->itr_register); 1968 ivar = E1000_IVAR_INT_ALLOC_VALID | vector; 1969 1970 /* Configure Tx vector */ 1971 tx_ring->ims_val = E1000_IMS_TXQ0; 1972 vector++; 1973 if (tx_ring->itr_val) 1974 writel(1000000000 / (tx_ring->itr_val * 256), 1975 tx_ring->itr_register); 1976 else 1977 writel(1, tx_ring->itr_register); 1978 adapter->eiac_mask |= tx_ring->ims_val; 1979 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8); 1980 1981 /* set vector for Other Causes, e.g. link changes */ 1982 vector++; 1983 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16); 1984 if (rx_ring->itr_val) 1985 writel(1000000000 / (rx_ring->itr_val * 256), 1986 hw->hw_addr + E1000_EITR_82574(vector)); 1987 else 1988 writel(1, hw->hw_addr + E1000_EITR_82574(vector)); 1989 1990 /* Cause Tx interrupts on every write back */ 1991 ivar |= (1 << 31); 1992 1993 ew32(IVAR, ivar); 1994 1995 /* enable MSI-X PBA support */ 1996 ctrl_ext = er32(CTRL_EXT); 1997 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR; 1998 1999 /* Auto-Mask Other interrupts upon ICR read */ 2000 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER); 2001 ctrl_ext |= E1000_CTRL_EXT_EIAME; 2002 ew32(CTRL_EXT, ctrl_ext); 2003 e1e_flush(); 2004 } 2005 2006 void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter) 2007 { 2008 if (adapter->msix_entries) { 2009 pci_disable_msix(adapter->pdev); 2010 kfree(adapter->msix_entries); 2011 adapter->msix_entries = NULL; 2012 } else if (adapter->flags & FLAG_MSI_ENABLED) { 2013 pci_disable_msi(adapter->pdev); 2014 adapter->flags &= ~FLAG_MSI_ENABLED; 2015 } 2016 } 2017 2018 /** 2019 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported 2020 * 2021 * Attempt to configure interrupts using the best available 2022 * capabilities of the hardware and kernel. 2023 **/ 2024 void e1000e_set_interrupt_capability(struct e1000_adapter *adapter) 2025 { 2026 int err; 2027 int i; 2028 2029 switch (adapter->int_mode) { 2030 case E1000E_INT_MODE_MSIX: 2031 if (adapter->flags & FLAG_HAS_MSIX) { 2032 adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */ 2033 adapter->msix_entries = kcalloc(adapter->num_vectors, 2034 sizeof(struct 2035 msix_entry), 2036 GFP_KERNEL); 2037 if (adapter->msix_entries) { 2038 for (i = 0; i < adapter->num_vectors; i++) 2039 adapter->msix_entries[i].entry = i; 2040 2041 err = pci_enable_msix(adapter->pdev, 2042 adapter->msix_entries, 2043 adapter->num_vectors); 2044 if (err == 0) 2045 return; 2046 } 2047 /* MSI-X failed, so fall through and try MSI */ 2048 e_err("Failed to initialize MSI-X interrupts. Falling back to MSI interrupts.\n"); 2049 e1000e_reset_interrupt_capability(adapter); 2050 } 2051 adapter->int_mode = E1000E_INT_MODE_MSI; 2052 /* Fall through */ 2053 case E1000E_INT_MODE_MSI: 2054 if (!pci_enable_msi(adapter->pdev)) { 2055 adapter->flags |= FLAG_MSI_ENABLED; 2056 } else { 2057 adapter->int_mode = E1000E_INT_MODE_LEGACY; 2058 e_err("Failed to initialize MSI interrupts. Falling back to legacy interrupts.\n"); 2059 } 2060 /* Fall through */ 2061 case E1000E_INT_MODE_LEGACY: 2062 /* Don't do anything; this is the system default */ 2063 break; 2064 } 2065 2066 /* store the number of vectors being used */ 2067 adapter->num_vectors = 1; 2068 } 2069 2070 /** 2071 * e1000_request_msix - Initialize MSI-X interrupts 2072 * 2073 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the 2074 * kernel. 2075 **/ 2076 static int e1000_request_msix(struct e1000_adapter *adapter) 2077 { 2078 struct net_device *netdev = adapter->netdev; 2079 int err = 0, vector = 0; 2080 2081 if (strlen(netdev->name) < (IFNAMSIZ - 5)) 2082 snprintf(adapter->rx_ring->name, 2083 sizeof(adapter->rx_ring->name) - 1, 2084 "%s-rx-0", netdev->name); 2085 else 2086 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ); 2087 err = request_irq(adapter->msix_entries[vector].vector, 2088 e1000_intr_msix_rx, 0, adapter->rx_ring->name, 2089 netdev); 2090 if (err) 2091 return err; 2092 adapter->rx_ring->itr_register = adapter->hw.hw_addr + 2093 E1000_EITR_82574(vector); 2094 adapter->rx_ring->itr_val = adapter->itr; 2095 vector++; 2096 2097 if (strlen(netdev->name) < (IFNAMSIZ - 5)) 2098 snprintf(adapter->tx_ring->name, 2099 sizeof(adapter->tx_ring->name) - 1, 2100 "%s-tx-0", netdev->name); 2101 else 2102 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ); 2103 err = request_irq(adapter->msix_entries[vector].vector, 2104 e1000_intr_msix_tx, 0, adapter->tx_ring->name, 2105 netdev); 2106 if (err) 2107 return err; 2108 adapter->tx_ring->itr_register = adapter->hw.hw_addr + 2109 E1000_EITR_82574(vector); 2110 adapter->tx_ring->itr_val = adapter->itr; 2111 vector++; 2112 2113 err = request_irq(adapter->msix_entries[vector].vector, 2114 e1000_msix_other, 0, netdev->name, netdev); 2115 if (err) 2116 return err; 2117 2118 e1000_configure_msix(adapter); 2119 2120 return 0; 2121 } 2122 2123 /** 2124 * e1000_request_irq - initialize interrupts 2125 * 2126 * Attempts to configure interrupts using the best available 2127 * capabilities of the hardware and kernel. 2128 **/ 2129 static int e1000_request_irq(struct e1000_adapter *adapter) 2130 { 2131 struct net_device *netdev = adapter->netdev; 2132 int err; 2133 2134 if (adapter->msix_entries) { 2135 err = e1000_request_msix(adapter); 2136 if (!err) 2137 return err; 2138 /* fall back to MSI */ 2139 e1000e_reset_interrupt_capability(adapter); 2140 adapter->int_mode = E1000E_INT_MODE_MSI; 2141 e1000e_set_interrupt_capability(adapter); 2142 } 2143 if (adapter->flags & FLAG_MSI_ENABLED) { 2144 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0, 2145 netdev->name, netdev); 2146 if (!err) 2147 return err; 2148 2149 /* fall back to legacy interrupt */ 2150 e1000e_reset_interrupt_capability(adapter); 2151 adapter->int_mode = E1000E_INT_MODE_LEGACY; 2152 } 2153 2154 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED, 2155 netdev->name, netdev); 2156 if (err) 2157 e_err("Unable to allocate interrupt, Error: %d\n", err); 2158 2159 return err; 2160 } 2161 2162 static void e1000_free_irq(struct e1000_adapter *adapter) 2163 { 2164 struct net_device *netdev = adapter->netdev; 2165 2166 if (adapter->msix_entries) { 2167 int vector = 0; 2168 2169 free_irq(adapter->msix_entries[vector].vector, netdev); 2170 vector++; 2171 2172 free_irq(adapter->msix_entries[vector].vector, netdev); 2173 vector++; 2174 2175 /* Other Causes interrupt vector */ 2176 free_irq(adapter->msix_entries[vector].vector, netdev); 2177 return; 2178 } 2179 2180 free_irq(adapter->pdev->irq, netdev); 2181 } 2182 2183 /** 2184 * e1000_irq_disable - Mask off interrupt generation on the NIC 2185 **/ 2186 static void e1000_irq_disable(struct e1000_adapter *adapter) 2187 { 2188 struct e1000_hw *hw = &adapter->hw; 2189 2190 ew32(IMC, ~0); 2191 if (adapter->msix_entries) 2192 ew32(EIAC_82574, 0); 2193 e1e_flush(); 2194 2195 if (adapter->msix_entries) { 2196 int i; 2197 for (i = 0; i < adapter->num_vectors; i++) 2198 synchronize_irq(adapter->msix_entries[i].vector); 2199 } else { 2200 synchronize_irq(adapter->pdev->irq); 2201 } 2202 } 2203 2204 /** 2205 * e1000_irq_enable - Enable default interrupt generation settings 2206 **/ 2207 static void e1000_irq_enable(struct e1000_adapter *adapter) 2208 { 2209 struct e1000_hw *hw = &adapter->hw; 2210 2211 if (adapter->msix_entries) { 2212 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574); 2213 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC); 2214 } else if (hw->mac.type == e1000_pch_lpt) { 2215 ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER); 2216 } else { 2217 ew32(IMS, IMS_ENABLE_MASK); 2218 } 2219 e1e_flush(); 2220 } 2221 2222 /** 2223 * e1000e_get_hw_control - get control of the h/w from f/w 2224 * @adapter: address of board private structure 2225 * 2226 * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit. 2227 * For ASF and Pass Through versions of f/w this means that 2228 * the driver is loaded. For AMT version (only with 82573) 2229 * of the f/w this means that the network i/f is open. 2230 **/ 2231 void e1000e_get_hw_control(struct e1000_adapter *adapter) 2232 { 2233 struct e1000_hw *hw = &adapter->hw; 2234 u32 ctrl_ext; 2235 u32 swsm; 2236 2237 /* Let firmware know the driver has taken over */ 2238 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) { 2239 swsm = er32(SWSM); 2240 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD); 2241 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) { 2242 ctrl_ext = er32(CTRL_EXT); 2243 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); 2244 } 2245 } 2246 2247 /** 2248 * e1000e_release_hw_control - release control of the h/w to f/w 2249 * @adapter: address of board private structure 2250 * 2251 * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit. 2252 * For ASF and Pass Through versions of f/w this means that the 2253 * driver is no longer loaded. For AMT version (only with 82573) i 2254 * of the f/w this means that the network i/f is closed. 2255 * 2256 **/ 2257 void e1000e_release_hw_control(struct e1000_adapter *adapter) 2258 { 2259 struct e1000_hw *hw = &adapter->hw; 2260 u32 ctrl_ext; 2261 u32 swsm; 2262 2263 /* Let firmware taken over control of h/w */ 2264 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) { 2265 swsm = er32(SWSM); 2266 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD); 2267 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) { 2268 ctrl_ext = er32(CTRL_EXT); 2269 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); 2270 } 2271 } 2272 2273 /** 2274 * e1000_alloc_ring_dma - allocate memory for a ring structure 2275 **/ 2276 static int e1000_alloc_ring_dma(struct e1000_adapter *adapter, 2277 struct e1000_ring *ring) 2278 { 2279 struct pci_dev *pdev = adapter->pdev; 2280 2281 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma, 2282 GFP_KERNEL); 2283 if (!ring->desc) 2284 return -ENOMEM; 2285 2286 return 0; 2287 } 2288 2289 /** 2290 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors) 2291 * @tx_ring: Tx descriptor ring 2292 * 2293 * Return 0 on success, negative on failure 2294 **/ 2295 int e1000e_setup_tx_resources(struct e1000_ring *tx_ring) 2296 { 2297 struct e1000_adapter *adapter = tx_ring->adapter; 2298 int err = -ENOMEM, size; 2299 2300 size = sizeof(struct e1000_buffer) * tx_ring->count; 2301 tx_ring->buffer_info = vzalloc(size); 2302 if (!tx_ring->buffer_info) 2303 goto err; 2304 2305 /* round up to nearest 4K */ 2306 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc); 2307 tx_ring->size = ALIGN(tx_ring->size, 4096); 2308 2309 err = e1000_alloc_ring_dma(adapter, tx_ring); 2310 if (err) 2311 goto err; 2312 2313 tx_ring->next_to_use = 0; 2314 tx_ring->next_to_clean = 0; 2315 2316 return 0; 2317 err: 2318 vfree(tx_ring->buffer_info); 2319 e_err("Unable to allocate memory for the transmit descriptor ring\n"); 2320 return err; 2321 } 2322 2323 /** 2324 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors) 2325 * @rx_ring: Rx descriptor ring 2326 * 2327 * Returns 0 on success, negative on failure 2328 **/ 2329 int e1000e_setup_rx_resources(struct e1000_ring *rx_ring) 2330 { 2331 struct e1000_adapter *adapter = rx_ring->adapter; 2332 struct e1000_buffer *buffer_info; 2333 int i, size, desc_len, err = -ENOMEM; 2334 2335 size = sizeof(struct e1000_buffer) * rx_ring->count; 2336 rx_ring->buffer_info = vzalloc(size); 2337 if (!rx_ring->buffer_info) 2338 goto err; 2339 2340 for (i = 0; i < rx_ring->count; i++) { 2341 buffer_info = &rx_ring->buffer_info[i]; 2342 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS, 2343 sizeof(struct e1000_ps_page), 2344 GFP_KERNEL); 2345 if (!buffer_info->ps_pages) 2346 goto err_pages; 2347 } 2348 2349 desc_len = sizeof(union e1000_rx_desc_packet_split); 2350 2351 /* Round up to nearest 4K */ 2352 rx_ring->size = rx_ring->count * desc_len; 2353 rx_ring->size = ALIGN(rx_ring->size, 4096); 2354 2355 err = e1000_alloc_ring_dma(adapter, rx_ring); 2356 if (err) 2357 goto err_pages; 2358 2359 rx_ring->next_to_clean = 0; 2360 rx_ring->next_to_use = 0; 2361 rx_ring->rx_skb_top = NULL; 2362 2363 return 0; 2364 2365 err_pages: 2366 for (i = 0; i < rx_ring->count; i++) { 2367 buffer_info = &rx_ring->buffer_info[i]; 2368 kfree(buffer_info->ps_pages); 2369 } 2370 err: 2371 vfree(rx_ring->buffer_info); 2372 e_err("Unable to allocate memory for the receive descriptor ring\n"); 2373 return err; 2374 } 2375 2376 /** 2377 * e1000_clean_tx_ring - Free Tx Buffers 2378 * @tx_ring: Tx descriptor ring 2379 **/ 2380 static void e1000_clean_tx_ring(struct e1000_ring *tx_ring) 2381 { 2382 struct e1000_adapter *adapter = tx_ring->adapter; 2383 struct e1000_buffer *buffer_info; 2384 unsigned long size; 2385 unsigned int i; 2386 2387 for (i = 0; i < tx_ring->count; i++) { 2388 buffer_info = &tx_ring->buffer_info[i]; 2389 e1000_put_txbuf(tx_ring, buffer_info); 2390 } 2391 2392 netdev_reset_queue(adapter->netdev); 2393 size = sizeof(struct e1000_buffer) * tx_ring->count; 2394 memset(tx_ring->buffer_info, 0, size); 2395 2396 memset(tx_ring->desc, 0, tx_ring->size); 2397 2398 tx_ring->next_to_use = 0; 2399 tx_ring->next_to_clean = 0; 2400 2401 writel(0, tx_ring->head); 2402 if (tx_ring->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) 2403 e1000e_update_tdt_wa(tx_ring, 0); 2404 else 2405 writel(0, tx_ring->tail); 2406 } 2407 2408 /** 2409 * e1000e_free_tx_resources - Free Tx Resources per Queue 2410 * @tx_ring: Tx descriptor ring 2411 * 2412 * Free all transmit software resources 2413 **/ 2414 void e1000e_free_tx_resources(struct e1000_ring *tx_ring) 2415 { 2416 struct e1000_adapter *adapter = tx_ring->adapter; 2417 struct pci_dev *pdev = adapter->pdev; 2418 2419 e1000_clean_tx_ring(tx_ring); 2420 2421 vfree(tx_ring->buffer_info); 2422 tx_ring->buffer_info = NULL; 2423 2424 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc, 2425 tx_ring->dma); 2426 tx_ring->desc = NULL; 2427 } 2428 2429 /** 2430 * e1000e_free_rx_resources - Free Rx Resources 2431 * @rx_ring: Rx descriptor ring 2432 * 2433 * Free all receive software resources 2434 **/ 2435 void e1000e_free_rx_resources(struct e1000_ring *rx_ring) 2436 { 2437 struct e1000_adapter *adapter = rx_ring->adapter; 2438 struct pci_dev *pdev = adapter->pdev; 2439 int i; 2440 2441 e1000_clean_rx_ring(rx_ring); 2442 2443 for (i = 0; i < rx_ring->count; i++) 2444 kfree(rx_ring->buffer_info[i].ps_pages); 2445 2446 vfree(rx_ring->buffer_info); 2447 rx_ring->buffer_info = NULL; 2448 2449 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc, 2450 rx_ring->dma); 2451 rx_ring->desc = NULL; 2452 } 2453 2454 /** 2455 * e1000_update_itr - update the dynamic ITR value based on statistics 2456 * @adapter: pointer to adapter 2457 * @itr_setting: current adapter->itr 2458 * @packets: the number of packets during this measurement interval 2459 * @bytes: the number of bytes during this measurement interval 2460 * 2461 * Stores a new ITR value based on packets and byte 2462 * counts during the last interrupt. The advantage of per interrupt 2463 * computation is faster updates and more accurate ITR for the current 2464 * traffic pattern. Constants in this function were computed 2465 * based on theoretical maximum wire speed and thresholds were set based 2466 * on testing data as well as attempting to minimize response time 2467 * while increasing bulk throughput. This functionality is controlled 2468 * by the InterruptThrottleRate module parameter. 2469 **/ 2470 static unsigned int e1000_update_itr(u16 itr_setting, int packets, int bytes) 2471 { 2472 unsigned int retval = itr_setting; 2473 2474 if (packets == 0) 2475 return itr_setting; 2476 2477 switch (itr_setting) { 2478 case lowest_latency: 2479 /* handle TSO and jumbo frames */ 2480 if (bytes / packets > 8000) 2481 retval = bulk_latency; 2482 else if ((packets < 5) && (bytes > 512)) 2483 retval = low_latency; 2484 break; 2485 case low_latency: /* 50 usec aka 20000 ints/s */ 2486 if (bytes > 10000) { 2487 /* this if handles the TSO accounting */ 2488 if (bytes / packets > 8000) 2489 retval = bulk_latency; 2490 else if ((packets < 10) || ((bytes / packets) > 1200)) 2491 retval = bulk_latency; 2492 else if ((packets > 35)) 2493 retval = lowest_latency; 2494 } else if (bytes / packets > 2000) { 2495 retval = bulk_latency; 2496 } else if (packets <= 2 && bytes < 512) { 2497 retval = lowest_latency; 2498 } 2499 break; 2500 case bulk_latency: /* 250 usec aka 4000 ints/s */ 2501 if (bytes > 25000) { 2502 if (packets > 35) 2503 retval = low_latency; 2504 } else if (bytes < 6000) { 2505 retval = low_latency; 2506 } 2507 break; 2508 } 2509 2510 return retval; 2511 } 2512 2513 static void e1000_set_itr(struct e1000_adapter *adapter) 2514 { 2515 u16 current_itr; 2516 u32 new_itr = adapter->itr; 2517 2518 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */ 2519 if (adapter->link_speed != SPEED_1000) { 2520 current_itr = 0; 2521 new_itr = 4000; 2522 goto set_itr_now; 2523 } 2524 2525 if (adapter->flags2 & FLAG2_DISABLE_AIM) { 2526 new_itr = 0; 2527 goto set_itr_now; 2528 } 2529 2530 adapter->tx_itr = e1000_update_itr(adapter->tx_itr, 2531 adapter->total_tx_packets, 2532 adapter->total_tx_bytes); 2533 /* conservative mode (itr 3) eliminates the lowest_latency setting */ 2534 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency) 2535 adapter->tx_itr = low_latency; 2536 2537 adapter->rx_itr = e1000_update_itr(adapter->rx_itr, 2538 adapter->total_rx_packets, 2539 adapter->total_rx_bytes); 2540 /* conservative mode (itr 3) eliminates the lowest_latency setting */ 2541 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency) 2542 adapter->rx_itr = low_latency; 2543 2544 current_itr = max(adapter->rx_itr, adapter->tx_itr); 2545 2546 /* counts and packets in update_itr are dependent on these numbers */ 2547 switch (current_itr) { 2548 case lowest_latency: 2549 new_itr = 70000; 2550 break; 2551 case low_latency: 2552 new_itr = 20000; /* aka hwitr = ~200 */ 2553 break; 2554 case bulk_latency: 2555 new_itr = 4000; 2556 break; 2557 default: 2558 break; 2559 } 2560 2561 set_itr_now: 2562 if (new_itr != adapter->itr) { 2563 /* this attempts to bias the interrupt rate towards Bulk 2564 * by adding intermediate steps when interrupt rate is 2565 * increasing 2566 */ 2567 new_itr = new_itr > adapter->itr ? 2568 min(adapter->itr + (new_itr >> 2), new_itr) : new_itr; 2569 adapter->itr = new_itr; 2570 adapter->rx_ring->itr_val = new_itr; 2571 if (adapter->msix_entries) 2572 adapter->rx_ring->set_itr = 1; 2573 else 2574 e1000e_write_itr(adapter, new_itr); 2575 } 2576 } 2577 2578 /** 2579 * e1000e_write_itr - write the ITR value to the appropriate registers 2580 * @adapter: address of board private structure 2581 * @itr: new ITR value to program 2582 * 2583 * e1000e_write_itr determines if the adapter is in MSI-X mode 2584 * and, if so, writes the EITR registers with the ITR value. 2585 * Otherwise, it writes the ITR value into the ITR register. 2586 **/ 2587 void e1000e_write_itr(struct e1000_adapter *adapter, u32 itr) 2588 { 2589 struct e1000_hw *hw = &adapter->hw; 2590 u32 new_itr = itr ? 1000000000 / (itr * 256) : 0; 2591 2592 if (adapter->msix_entries) { 2593 int vector; 2594 2595 for (vector = 0; vector < adapter->num_vectors; vector++) 2596 writel(new_itr, hw->hw_addr + E1000_EITR_82574(vector)); 2597 } else { 2598 ew32(ITR, new_itr); 2599 } 2600 } 2601 2602 /** 2603 * e1000_alloc_queues - Allocate memory for all rings 2604 * @adapter: board private structure to initialize 2605 **/ 2606 static int e1000_alloc_queues(struct e1000_adapter *adapter) 2607 { 2608 int size = sizeof(struct e1000_ring); 2609 2610 adapter->tx_ring = kzalloc(size, GFP_KERNEL); 2611 if (!adapter->tx_ring) 2612 goto err; 2613 adapter->tx_ring->count = adapter->tx_ring_count; 2614 adapter->tx_ring->adapter = adapter; 2615 2616 adapter->rx_ring = kzalloc(size, GFP_KERNEL); 2617 if (!adapter->rx_ring) 2618 goto err; 2619 adapter->rx_ring->count = adapter->rx_ring_count; 2620 adapter->rx_ring->adapter = adapter; 2621 2622 return 0; 2623 err: 2624 e_err("Unable to allocate memory for queues\n"); 2625 kfree(adapter->rx_ring); 2626 kfree(adapter->tx_ring); 2627 return -ENOMEM; 2628 } 2629 2630 /** 2631 * e1000e_poll - NAPI Rx polling callback 2632 * @napi: struct associated with this polling callback 2633 * @weight: number of packets driver is allowed to process this poll 2634 **/ 2635 static int e1000e_poll(struct napi_struct *napi, int weight) 2636 { 2637 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, 2638 napi); 2639 struct e1000_hw *hw = &adapter->hw; 2640 struct net_device *poll_dev = adapter->netdev; 2641 int tx_cleaned = 1, work_done = 0; 2642 2643 adapter = netdev_priv(poll_dev); 2644 2645 if (!adapter->msix_entries || 2646 (adapter->rx_ring->ims_val & adapter->tx_ring->ims_val)) 2647 tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring); 2648 2649 adapter->clean_rx(adapter->rx_ring, &work_done, weight); 2650 2651 if (!tx_cleaned) 2652 work_done = weight; 2653 2654 /* If weight not fully consumed, exit the polling mode */ 2655 if (work_done < weight) { 2656 if (adapter->itr_setting & 3) 2657 e1000_set_itr(adapter); 2658 napi_complete(napi); 2659 if (!test_bit(__E1000_DOWN, &adapter->state)) { 2660 if (adapter->msix_entries) 2661 ew32(IMS, adapter->rx_ring->ims_val); 2662 else 2663 e1000_irq_enable(adapter); 2664 } 2665 } 2666 2667 return work_done; 2668 } 2669 2670 static int e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid) 2671 { 2672 struct e1000_adapter *adapter = netdev_priv(netdev); 2673 struct e1000_hw *hw = &adapter->hw; 2674 u32 vfta, index; 2675 2676 /* don't update vlan cookie if already programmed */ 2677 if ((adapter->hw.mng_cookie.status & 2678 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) && 2679 (vid == adapter->mng_vlan_id)) 2680 return 0; 2681 2682 /* add VID to filter table */ 2683 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2684 index = (vid >> 5) & 0x7F; 2685 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index); 2686 vfta |= (1 << (vid & 0x1F)); 2687 hw->mac.ops.write_vfta(hw, index, vfta); 2688 } 2689 2690 set_bit(vid, adapter->active_vlans); 2691 2692 return 0; 2693 } 2694 2695 static int e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid) 2696 { 2697 struct e1000_adapter *adapter = netdev_priv(netdev); 2698 struct e1000_hw *hw = &adapter->hw; 2699 u32 vfta, index; 2700 2701 if ((adapter->hw.mng_cookie.status & 2702 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) && 2703 (vid == adapter->mng_vlan_id)) { 2704 /* release control to f/w */ 2705 e1000e_release_hw_control(adapter); 2706 return 0; 2707 } 2708 2709 /* remove VID from filter table */ 2710 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2711 index = (vid >> 5) & 0x7F; 2712 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index); 2713 vfta &= ~(1 << (vid & 0x1F)); 2714 hw->mac.ops.write_vfta(hw, index, vfta); 2715 } 2716 2717 clear_bit(vid, adapter->active_vlans); 2718 2719 return 0; 2720 } 2721 2722 /** 2723 * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering 2724 * @adapter: board private structure to initialize 2725 **/ 2726 static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter) 2727 { 2728 struct net_device *netdev = adapter->netdev; 2729 struct e1000_hw *hw = &adapter->hw; 2730 u32 rctl; 2731 2732 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2733 /* disable VLAN receive filtering */ 2734 rctl = er32(RCTL); 2735 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN); 2736 ew32(RCTL, rctl); 2737 2738 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) { 2739 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); 2740 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; 2741 } 2742 } 2743 } 2744 2745 /** 2746 * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering 2747 * @adapter: board private structure to initialize 2748 **/ 2749 static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter) 2750 { 2751 struct e1000_hw *hw = &adapter->hw; 2752 u32 rctl; 2753 2754 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2755 /* enable VLAN receive filtering */ 2756 rctl = er32(RCTL); 2757 rctl |= E1000_RCTL_VFE; 2758 rctl &= ~E1000_RCTL_CFIEN; 2759 ew32(RCTL, rctl); 2760 } 2761 } 2762 2763 /** 2764 * e1000e_vlan_strip_enable - helper to disable HW VLAN stripping 2765 * @adapter: board private structure to initialize 2766 **/ 2767 static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter) 2768 { 2769 struct e1000_hw *hw = &adapter->hw; 2770 u32 ctrl; 2771 2772 /* disable VLAN tag insert/strip */ 2773 ctrl = er32(CTRL); 2774 ctrl &= ~E1000_CTRL_VME; 2775 ew32(CTRL, ctrl); 2776 } 2777 2778 /** 2779 * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping 2780 * @adapter: board private structure to initialize 2781 **/ 2782 static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter) 2783 { 2784 struct e1000_hw *hw = &adapter->hw; 2785 u32 ctrl; 2786 2787 /* enable VLAN tag insert/strip */ 2788 ctrl = er32(CTRL); 2789 ctrl |= E1000_CTRL_VME; 2790 ew32(CTRL, ctrl); 2791 } 2792 2793 static void e1000_update_mng_vlan(struct e1000_adapter *adapter) 2794 { 2795 struct net_device *netdev = adapter->netdev; 2796 u16 vid = adapter->hw.mng_cookie.vlan_id; 2797 u16 old_vid = adapter->mng_vlan_id; 2798 2799 if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) { 2800 e1000_vlan_rx_add_vid(netdev, vid); 2801 adapter->mng_vlan_id = vid; 2802 } 2803 2804 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid)) 2805 e1000_vlan_rx_kill_vid(netdev, old_vid); 2806 } 2807 2808 static void e1000_restore_vlan(struct e1000_adapter *adapter) 2809 { 2810 u16 vid; 2811 2812 e1000_vlan_rx_add_vid(adapter->netdev, 0); 2813 2814 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID) 2815 e1000_vlan_rx_add_vid(adapter->netdev, vid); 2816 } 2817 2818 static void e1000_init_manageability_pt(struct e1000_adapter *adapter) 2819 { 2820 struct e1000_hw *hw = &adapter->hw; 2821 u32 manc, manc2h, mdef, i, j; 2822 2823 if (!(adapter->flags & FLAG_MNG_PT_ENABLED)) 2824 return; 2825 2826 manc = er32(MANC); 2827 2828 /* enable receiving management packets to the host. this will probably 2829 * generate destination unreachable messages from the host OS, but 2830 * the packets will be handled on SMBUS 2831 */ 2832 manc |= E1000_MANC_EN_MNG2HOST; 2833 manc2h = er32(MANC2H); 2834 2835 switch (hw->mac.type) { 2836 default: 2837 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664); 2838 break; 2839 case e1000_82574: 2840 case e1000_82583: 2841 /* Check if IPMI pass-through decision filter already exists; 2842 * if so, enable it. 2843 */ 2844 for (i = 0, j = 0; i < 8; i++) { 2845 mdef = er32(MDEF(i)); 2846 2847 /* Ignore filters with anything other than IPMI ports */ 2848 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664)) 2849 continue; 2850 2851 /* Enable this decision filter in MANC2H */ 2852 if (mdef) 2853 manc2h |= (1 << i); 2854 2855 j |= mdef; 2856 } 2857 2858 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664)) 2859 break; 2860 2861 /* Create new decision filter in an empty filter */ 2862 for (i = 0, j = 0; i < 8; i++) 2863 if (er32(MDEF(i)) == 0) { 2864 ew32(MDEF(i), (E1000_MDEF_PORT_623 | 2865 E1000_MDEF_PORT_664)); 2866 manc2h |= (1 << 1); 2867 j++; 2868 break; 2869 } 2870 2871 if (!j) 2872 e_warn("Unable to create IPMI pass-through filter\n"); 2873 break; 2874 } 2875 2876 ew32(MANC2H, manc2h); 2877 ew32(MANC, manc); 2878 } 2879 2880 /** 2881 * e1000_configure_tx - Configure Transmit Unit after Reset 2882 * @adapter: board private structure 2883 * 2884 * Configure the Tx unit of the MAC after a reset. 2885 **/ 2886 static void e1000_configure_tx(struct e1000_adapter *adapter) 2887 { 2888 struct e1000_hw *hw = &adapter->hw; 2889 struct e1000_ring *tx_ring = adapter->tx_ring; 2890 u64 tdba; 2891 u32 tdlen, tarc; 2892 2893 /* Setup the HW Tx Head and Tail descriptor pointers */ 2894 tdba = tx_ring->dma; 2895 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc); 2896 ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32))); 2897 ew32(TDBAH(0), (tdba >> 32)); 2898 ew32(TDLEN(0), tdlen); 2899 ew32(TDH(0), 0); 2900 ew32(TDT(0), 0); 2901 tx_ring->head = adapter->hw.hw_addr + E1000_TDH(0); 2902 tx_ring->tail = adapter->hw.hw_addr + E1000_TDT(0); 2903 2904 /* Set the Tx Interrupt Delay register */ 2905 ew32(TIDV, adapter->tx_int_delay); 2906 /* Tx irq moderation */ 2907 ew32(TADV, adapter->tx_abs_int_delay); 2908 2909 if (adapter->flags2 & FLAG2_DMA_BURST) { 2910 u32 txdctl = er32(TXDCTL(0)); 2911 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH | 2912 E1000_TXDCTL_WTHRESH); 2913 /* set up some performance related parameters to encourage the 2914 * hardware to use the bus more efficiently in bursts, depends 2915 * on the tx_int_delay to be enabled, 2916 * wthresh = 1 ==> burst write is disabled to avoid Tx stalls 2917 * hthresh = 1 ==> prefetch when one or more available 2918 * pthresh = 0x1f ==> prefetch if internal cache 31 or less 2919 * BEWARE: this seems to work but should be considered first if 2920 * there are Tx hangs or other Tx related bugs 2921 */ 2922 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE; 2923 ew32(TXDCTL(0), txdctl); 2924 } 2925 /* erratum work around: set txdctl the same for both queues */ 2926 ew32(TXDCTL(1), er32(TXDCTL(0))); 2927 2928 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) { 2929 tarc = er32(TARC(0)); 2930 /* set the speed mode bit, we'll clear it if we're not at 2931 * gigabit link later 2932 */ 2933 #define SPEED_MODE_BIT (1 << 21) 2934 tarc |= SPEED_MODE_BIT; 2935 ew32(TARC(0), tarc); 2936 } 2937 2938 /* errata: program both queues to unweighted RR */ 2939 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) { 2940 tarc = er32(TARC(0)); 2941 tarc |= 1; 2942 ew32(TARC(0), tarc); 2943 tarc = er32(TARC(1)); 2944 tarc |= 1; 2945 ew32(TARC(1), tarc); 2946 } 2947 2948 /* Setup Transmit Descriptor Settings for eop descriptor */ 2949 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS; 2950 2951 /* only set IDE if we are delaying interrupts using the timers */ 2952 if (adapter->tx_int_delay) 2953 adapter->txd_cmd |= E1000_TXD_CMD_IDE; 2954 2955 /* enable Report Status bit */ 2956 adapter->txd_cmd |= E1000_TXD_CMD_RS; 2957 2958 hw->mac.ops.config_collision_dist(hw); 2959 } 2960 2961 /** 2962 * e1000_setup_rctl - configure the receive control registers 2963 * @adapter: Board private structure 2964 **/ 2965 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \ 2966 (((S) & (PAGE_SIZE - 1)) ? 1 : 0)) 2967 static void e1000_setup_rctl(struct e1000_adapter *adapter) 2968 { 2969 struct e1000_hw *hw = &adapter->hw; 2970 u32 rctl, rfctl; 2971 u32 pages = 0; 2972 2973 /* Workaround Si errata on PCHx - configure jumbo frame flow */ 2974 if (hw->mac.type >= e1000_pch2lan) { 2975 s32 ret_val; 2976 2977 if (adapter->netdev->mtu > ETH_DATA_LEN) 2978 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true); 2979 else 2980 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false); 2981 2982 if (ret_val) 2983 e_dbg("failed to enable jumbo frame workaround mode\n"); 2984 } 2985 2986 /* Program MC offset vector base */ 2987 rctl = er32(RCTL); 2988 rctl &= ~(3 << E1000_RCTL_MO_SHIFT); 2989 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | 2990 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF | 2991 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT); 2992 2993 /* Do not Store bad packets */ 2994 rctl &= ~E1000_RCTL_SBP; 2995 2996 /* Enable Long Packet receive */ 2997 if (adapter->netdev->mtu <= ETH_DATA_LEN) 2998 rctl &= ~E1000_RCTL_LPE; 2999 else 3000 rctl |= E1000_RCTL_LPE; 3001 3002 /* Some systems expect that the CRC is included in SMBUS traffic. The 3003 * hardware strips the CRC before sending to both SMBUS (BMC) and to 3004 * host memory when this is enabled 3005 */ 3006 if (adapter->flags2 & FLAG2_CRC_STRIPPING) 3007 rctl |= E1000_RCTL_SECRC; 3008 3009 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */ 3010 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) { 3011 u16 phy_data; 3012 3013 e1e_rphy(hw, PHY_REG(770, 26), &phy_data); 3014 phy_data &= 0xfff8; 3015 phy_data |= (1 << 2); 3016 e1e_wphy(hw, PHY_REG(770, 26), phy_data); 3017 3018 e1e_rphy(hw, 22, &phy_data); 3019 phy_data &= 0x0fff; 3020 phy_data |= (1 << 14); 3021 e1e_wphy(hw, 0x10, 0x2823); 3022 e1e_wphy(hw, 0x11, 0x0003); 3023 e1e_wphy(hw, 22, phy_data); 3024 } 3025 3026 /* Setup buffer sizes */ 3027 rctl &= ~E1000_RCTL_SZ_4096; 3028 rctl |= E1000_RCTL_BSEX; 3029 switch (adapter->rx_buffer_len) { 3030 case 2048: 3031 default: 3032 rctl |= E1000_RCTL_SZ_2048; 3033 rctl &= ~E1000_RCTL_BSEX; 3034 break; 3035 case 4096: 3036 rctl |= E1000_RCTL_SZ_4096; 3037 break; 3038 case 8192: 3039 rctl |= E1000_RCTL_SZ_8192; 3040 break; 3041 case 16384: 3042 rctl |= E1000_RCTL_SZ_16384; 3043 break; 3044 } 3045 3046 /* Enable Extended Status in all Receive Descriptors */ 3047 rfctl = er32(RFCTL); 3048 rfctl |= E1000_RFCTL_EXTEN; 3049 ew32(RFCTL, rfctl); 3050 3051 /* 82571 and greater support packet-split where the protocol 3052 * header is placed in skb->data and the packet data is 3053 * placed in pages hanging off of skb_shinfo(skb)->nr_frags. 3054 * In the case of a non-split, skb->data is linearly filled, 3055 * followed by the page buffers. Therefore, skb->data is 3056 * sized to hold the largest protocol header. 3057 * 3058 * allocations using alloc_page take too long for regular MTU 3059 * so only enable packet split for jumbo frames 3060 * 3061 * Using pages when the page size is greater than 16k wastes 3062 * a lot of memory, since we allocate 3 pages at all times 3063 * per packet. 3064 */ 3065 pages = PAGE_USE_COUNT(adapter->netdev->mtu); 3066 if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE)) 3067 adapter->rx_ps_pages = pages; 3068 else 3069 adapter->rx_ps_pages = 0; 3070 3071 if (adapter->rx_ps_pages) { 3072 u32 psrctl = 0; 3073 3074 /* Enable Packet split descriptors */ 3075 rctl |= E1000_RCTL_DTYP_PS; 3076 3077 psrctl |= adapter->rx_ps_bsize0 >> E1000_PSRCTL_BSIZE0_SHIFT; 3078 3079 switch (adapter->rx_ps_pages) { 3080 case 3: 3081 psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE3_SHIFT; 3082 /* fall-through */ 3083 case 2: 3084 psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE2_SHIFT; 3085 /* fall-through */ 3086 case 1: 3087 psrctl |= PAGE_SIZE >> E1000_PSRCTL_BSIZE1_SHIFT; 3088 break; 3089 } 3090 3091 ew32(PSRCTL, psrctl); 3092 } 3093 3094 /* This is useful for sniffing bad packets. */ 3095 if (adapter->netdev->features & NETIF_F_RXALL) { 3096 /* UPE and MPE will be handled by normal PROMISC logic 3097 * in e1000e_set_rx_mode 3098 */ 3099 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */ 3100 E1000_RCTL_BAM | /* RX All Bcast Pkts */ 3101 E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */ 3102 3103 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */ 3104 E1000_RCTL_DPF | /* Allow filtered pause */ 3105 E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */ 3106 /* Do not mess with E1000_CTRL_VME, it affects transmit as well, 3107 * and that breaks VLANs. 3108 */ 3109 } 3110 3111 ew32(RCTL, rctl); 3112 /* just started the receive unit, no need to restart */ 3113 adapter->flags &= ~FLAG_RESTART_NOW; 3114 } 3115 3116 /** 3117 * e1000_configure_rx - Configure Receive Unit after Reset 3118 * @adapter: board private structure 3119 * 3120 * Configure the Rx unit of the MAC after a reset. 3121 **/ 3122 static void e1000_configure_rx(struct e1000_adapter *adapter) 3123 { 3124 struct e1000_hw *hw = &adapter->hw; 3125 struct e1000_ring *rx_ring = adapter->rx_ring; 3126 u64 rdba; 3127 u32 rdlen, rctl, rxcsum, ctrl_ext; 3128 3129 if (adapter->rx_ps_pages) { 3130 /* this is a 32 byte descriptor */ 3131 rdlen = rx_ring->count * 3132 sizeof(union e1000_rx_desc_packet_split); 3133 adapter->clean_rx = e1000_clean_rx_irq_ps; 3134 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps; 3135 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) { 3136 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended); 3137 adapter->clean_rx = e1000_clean_jumbo_rx_irq; 3138 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers; 3139 } else { 3140 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended); 3141 adapter->clean_rx = e1000_clean_rx_irq; 3142 adapter->alloc_rx_buf = e1000_alloc_rx_buffers; 3143 } 3144 3145 /* disable receives while setting up the descriptors */ 3146 rctl = er32(RCTL); 3147 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX)) 3148 ew32(RCTL, rctl & ~E1000_RCTL_EN); 3149 e1e_flush(); 3150 usleep_range(10000, 20000); 3151 3152 if (adapter->flags2 & FLAG2_DMA_BURST) { 3153 /* set the writeback threshold (only takes effect if the RDTR 3154 * is set). set GRAN=1 and write back up to 0x4 worth, and 3155 * enable prefetching of 0x20 Rx descriptors 3156 * granularity = 01 3157 * wthresh = 04, 3158 * hthresh = 04, 3159 * pthresh = 0x20 3160 */ 3161 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE); 3162 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE); 3163 3164 /* override the delay timers for enabling bursting, only if 3165 * the value was not set by the user via module options 3166 */ 3167 if (adapter->rx_int_delay == DEFAULT_RDTR) 3168 adapter->rx_int_delay = BURST_RDTR; 3169 if (adapter->rx_abs_int_delay == DEFAULT_RADV) 3170 adapter->rx_abs_int_delay = BURST_RADV; 3171 } 3172 3173 /* set the Receive Delay Timer Register */ 3174 ew32(RDTR, adapter->rx_int_delay); 3175 3176 /* irq moderation */ 3177 ew32(RADV, adapter->rx_abs_int_delay); 3178 if ((adapter->itr_setting != 0) && (adapter->itr != 0)) 3179 e1000e_write_itr(adapter, adapter->itr); 3180 3181 ctrl_ext = er32(CTRL_EXT); 3182 /* Auto-Mask interrupts upon ICR access */ 3183 ctrl_ext |= E1000_CTRL_EXT_IAME; 3184 ew32(IAM, 0xffffffff); 3185 ew32(CTRL_EXT, ctrl_ext); 3186 e1e_flush(); 3187 3188 /* Setup the HW Rx Head and Tail Descriptor Pointers and 3189 * the Base and Length of the Rx Descriptor Ring 3190 */ 3191 rdba = rx_ring->dma; 3192 ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32))); 3193 ew32(RDBAH(0), (rdba >> 32)); 3194 ew32(RDLEN(0), rdlen); 3195 ew32(RDH(0), 0); 3196 ew32(RDT(0), 0); 3197 rx_ring->head = adapter->hw.hw_addr + E1000_RDH(0); 3198 rx_ring->tail = adapter->hw.hw_addr + E1000_RDT(0); 3199 3200 /* Enable Receive Checksum Offload for TCP and UDP */ 3201 rxcsum = er32(RXCSUM); 3202 if (adapter->netdev->features & NETIF_F_RXCSUM) 3203 rxcsum |= E1000_RXCSUM_TUOFL; 3204 else 3205 rxcsum &= ~E1000_RXCSUM_TUOFL; 3206 ew32(RXCSUM, rxcsum); 3207 3208 /* With jumbo frames, excessive C-state transition latencies result 3209 * in dropped transactions. 3210 */ 3211 if (adapter->netdev->mtu > ETH_DATA_LEN) { 3212 u32 lat = 3213 ((er32(PBA) & E1000_PBA_RXA_MASK) * 1024 - 3214 adapter->max_frame_size) * 8 / 1000; 3215 3216 if (adapter->flags & FLAG_IS_ICH) { 3217 u32 rxdctl = er32(RXDCTL(0)); 3218 ew32(RXDCTL(0), rxdctl | 0x3); 3219 } 3220 3221 pm_qos_update_request(&adapter->netdev->pm_qos_req, lat); 3222 } else { 3223 pm_qos_update_request(&adapter->netdev->pm_qos_req, 3224 PM_QOS_DEFAULT_VALUE); 3225 } 3226 3227 /* Enable Receives */ 3228 ew32(RCTL, rctl); 3229 } 3230 3231 /** 3232 * e1000e_write_mc_addr_list - write multicast addresses to MTA 3233 * @netdev: network interface device structure 3234 * 3235 * Writes multicast address list to the MTA hash table. 3236 * Returns: -ENOMEM on failure 3237 * 0 on no addresses written 3238 * X on writing X addresses to MTA 3239 */ 3240 static int e1000e_write_mc_addr_list(struct net_device *netdev) 3241 { 3242 struct e1000_adapter *adapter = netdev_priv(netdev); 3243 struct e1000_hw *hw = &adapter->hw; 3244 struct netdev_hw_addr *ha; 3245 u8 *mta_list; 3246 int i; 3247 3248 if (netdev_mc_empty(netdev)) { 3249 /* nothing to program, so clear mc list */ 3250 hw->mac.ops.update_mc_addr_list(hw, NULL, 0); 3251 return 0; 3252 } 3253 3254 mta_list = kzalloc(netdev_mc_count(netdev) * ETH_ALEN, GFP_ATOMIC); 3255 if (!mta_list) 3256 return -ENOMEM; 3257 3258 /* update_mc_addr_list expects a packed array of only addresses. */ 3259 i = 0; 3260 netdev_for_each_mc_addr(ha, netdev) 3261 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN); 3262 3263 hw->mac.ops.update_mc_addr_list(hw, mta_list, i); 3264 kfree(mta_list); 3265 3266 return netdev_mc_count(netdev); 3267 } 3268 3269 /** 3270 * e1000e_write_uc_addr_list - write unicast addresses to RAR table 3271 * @netdev: network interface device structure 3272 * 3273 * Writes unicast address list to the RAR table. 3274 * Returns: -ENOMEM on failure/insufficient address space 3275 * 0 on no addresses written 3276 * X on writing X addresses to the RAR table 3277 **/ 3278 static int e1000e_write_uc_addr_list(struct net_device *netdev) 3279 { 3280 struct e1000_adapter *adapter = netdev_priv(netdev); 3281 struct e1000_hw *hw = &adapter->hw; 3282 unsigned int rar_entries = hw->mac.rar_entry_count; 3283 int count = 0; 3284 3285 /* save a rar entry for our hardware address */ 3286 rar_entries--; 3287 3288 /* save a rar entry for the LAA workaround */ 3289 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) 3290 rar_entries--; 3291 3292 /* return ENOMEM indicating insufficient memory for addresses */ 3293 if (netdev_uc_count(netdev) > rar_entries) 3294 return -ENOMEM; 3295 3296 if (!netdev_uc_empty(netdev) && rar_entries) { 3297 struct netdev_hw_addr *ha; 3298 3299 /* write the addresses in reverse order to avoid write 3300 * combining 3301 */ 3302 netdev_for_each_uc_addr(ha, netdev) { 3303 if (!rar_entries) 3304 break; 3305 hw->mac.ops.rar_set(hw, ha->addr, rar_entries--); 3306 count++; 3307 } 3308 } 3309 3310 /* zero out the remaining RAR entries not used above */ 3311 for (; rar_entries > 0; rar_entries--) { 3312 ew32(RAH(rar_entries), 0); 3313 ew32(RAL(rar_entries), 0); 3314 } 3315 e1e_flush(); 3316 3317 return count; 3318 } 3319 3320 /** 3321 * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set 3322 * @netdev: network interface device structure 3323 * 3324 * The ndo_set_rx_mode entry point is called whenever the unicast or multicast 3325 * address list or the network interface flags are updated. This routine is 3326 * responsible for configuring the hardware for proper unicast, multicast, 3327 * promiscuous mode, and all-multi behavior. 3328 **/ 3329 static void e1000e_set_rx_mode(struct net_device *netdev) 3330 { 3331 struct e1000_adapter *adapter = netdev_priv(netdev); 3332 struct e1000_hw *hw = &adapter->hw; 3333 u32 rctl; 3334 3335 /* Check for Promiscuous and All Multicast modes */ 3336 rctl = er32(RCTL); 3337 3338 /* clear the affected bits */ 3339 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE); 3340 3341 if (netdev->flags & IFF_PROMISC) { 3342 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); 3343 /* Do not hardware filter VLANs in promisc mode */ 3344 e1000e_vlan_filter_disable(adapter); 3345 } else { 3346 int count; 3347 3348 if (netdev->flags & IFF_ALLMULTI) { 3349 rctl |= E1000_RCTL_MPE; 3350 } else { 3351 /* Write addresses to the MTA, if the attempt fails 3352 * then we should just turn on promiscuous mode so 3353 * that we can at least receive multicast traffic 3354 */ 3355 count = e1000e_write_mc_addr_list(netdev); 3356 if (count < 0) 3357 rctl |= E1000_RCTL_MPE; 3358 } 3359 e1000e_vlan_filter_enable(adapter); 3360 /* Write addresses to available RAR registers, if there is not 3361 * sufficient space to store all the addresses then enable 3362 * unicast promiscuous mode 3363 */ 3364 count = e1000e_write_uc_addr_list(netdev); 3365 if (count < 0) 3366 rctl |= E1000_RCTL_UPE; 3367 } 3368 3369 ew32(RCTL, rctl); 3370 3371 if (netdev->features & NETIF_F_HW_VLAN_RX) 3372 e1000e_vlan_strip_enable(adapter); 3373 else 3374 e1000e_vlan_strip_disable(adapter); 3375 } 3376 3377 static void e1000e_setup_rss_hash(struct e1000_adapter *adapter) 3378 { 3379 struct e1000_hw *hw = &adapter->hw; 3380 u32 mrqc, rxcsum; 3381 int i; 3382 static const u32 rsskey[10] = { 3383 0xda565a6d, 0xc20e5b25, 0x3d256741, 0xb08fa343, 0xcb2bcad0, 3384 0xb4307bae, 0xa32dcb77, 0x0cf23080, 0x3bb7426a, 0xfa01acbe 3385 }; 3386 3387 /* Fill out hash function seed */ 3388 for (i = 0; i < 10; i++) 3389 ew32(RSSRK(i), rsskey[i]); 3390 3391 /* Direct all traffic to queue 0 */ 3392 for (i = 0; i < 32; i++) 3393 ew32(RETA(i), 0); 3394 3395 /* Disable raw packet checksumming so that RSS hash is placed in 3396 * descriptor on writeback. 3397 */ 3398 rxcsum = er32(RXCSUM); 3399 rxcsum |= E1000_RXCSUM_PCSD; 3400 3401 ew32(RXCSUM, rxcsum); 3402 3403 mrqc = (E1000_MRQC_RSS_FIELD_IPV4 | 3404 E1000_MRQC_RSS_FIELD_IPV4_TCP | 3405 E1000_MRQC_RSS_FIELD_IPV6 | 3406 E1000_MRQC_RSS_FIELD_IPV6_TCP | 3407 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX); 3408 3409 ew32(MRQC, mrqc); 3410 } 3411 3412 /** 3413 * e1000e_get_base_timinca - get default SYSTIM time increment attributes 3414 * @adapter: board private structure 3415 * @timinca: pointer to returned time increment attributes 3416 * 3417 * Get attributes for incrementing the System Time Register SYSTIML/H at 3418 * the default base frequency, and set the cyclecounter shift value. 3419 **/ 3420 s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca) 3421 { 3422 struct e1000_hw *hw = &adapter->hw; 3423 u32 incvalue, incperiod, shift; 3424 3425 /* Make sure clock is enabled on I217 before checking the frequency */ 3426 if ((hw->mac.type == e1000_pch_lpt) && 3427 !(er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) && 3428 !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_ENABLED)) { 3429 u32 fextnvm7 = er32(FEXTNVM7); 3430 3431 if (!(fextnvm7 & (1 << 0))) { 3432 ew32(FEXTNVM7, fextnvm7 | (1 << 0)); 3433 e1e_flush(); 3434 } 3435 } 3436 3437 switch (hw->mac.type) { 3438 case e1000_pch2lan: 3439 case e1000_pch_lpt: 3440 /* On I217, the clock frequency is 25MHz or 96MHz as 3441 * indicated by the System Clock Frequency Indication 3442 */ 3443 if ((hw->mac.type != e1000_pch_lpt) || 3444 (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)) { 3445 /* Stable 96MHz frequency */ 3446 incperiod = INCPERIOD_96MHz; 3447 incvalue = INCVALUE_96MHz; 3448 shift = INCVALUE_SHIFT_96MHz; 3449 adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHz; 3450 break; 3451 } 3452 /* fall-through */ 3453 case e1000_82574: 3454 case e1000_82583: 3455 /* Stable 25MHz frequency */ 3456 incperiod = INCPERIOD_25MHz; 3457 incvalue = INCVALUE_25MHz; 3458 shift = INCVALUE_SHIFT_25MHz; 3459 adapter->cc.shift = shift; 3460 break; 3461 default: 3462 return -EINVAL; 3463 } 3464 3465 *timinca = ((incperiod << E1000_TIMINCA_INCPERIOD_SHIFT) | 3466 ((incvalue << shift) & E1000_TIMINCA_INCVALUE_MASK)); 3467 3468 return 0; 3469 } 3470 3471 /** 3472 * e1000e_config_hwtstamp - configure the hwtstamp registers and enable/disable 3473 * @adapter: board private structure 3474 * 3475 * Outgoing time stamping can be enabled and disabled. Play nice and 3476 * disable it when requested, although it shouldn't cause any overhead 3477 * when no packet needs it. At most one packet in the queue may be 3478 * marked for time stamping, otherwise it would be impossible to tell 3479 * for sure to which packet the hardware time stamp belongs. 3480 * 3481 * Incoming time stamping has to be configured via the hardware filters. 3482 * Not all combinations are supported, in particular event type has to be 3483 * specified. Matching the kind of event packet is not supported, with the 3484 * exception of "all V2 events regardless of level 2 or 4". 3485 **/ 3486 static int e1000e_config_hwtstamp(struct e1000_adapter *adapter) 3487 { 3488 struct e1000_hw *hw = &adapter->hw; 3489 struct hwtstamp_config *config = &adapter->hwtstamp_config; 3490 u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED; 3491 u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED; 3492 u32 rxmtrl = 0; 3493 u16 rxudp = 0; 3494 bool is_l4 = false; 3495 bool is_l2 = false; 3496 u32 regval; 3497 s32 ret_val; 3498 3499 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP)) 3500 return -EINVAL; 3501 3502 /* flags reserved for future extensions - must be zero */ 3503 if (config->flags) 3504 return -EINVAL; 3505 3506 switch (config->tx_type) { 3507 case HWTSTAMP_TX_OFF: 3508 tsync_tx_ctl = 0; 3509 break; 3510 case HWTSTAMP_TX_ON: 3511 break; 3512 default: 3513 return -ERANGE; 3514 } 3515 3516 switch (config->rx_filter) { 3517 case HWTSTAMP_FILTER_NONE: 3518 tsync_rx_ctl = 0; 3519 break; 3520 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: 3521 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1; 3522 rxmtrl = E1000_RXMTRL_PTP_V1_SYNC_MESSAGE; 3523 is_l4 = true; 3524 break; 3525 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: 3526 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1; 3527 rxmtrl = E1000_RXMTRL_PTP_V1_DELAY_REQ_MESSAGE; 3528 is_l4 = true; 3529 break; 3530 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: 3531 /* Also time stamps V2 L2 Path Delay Request/Response */ 3532 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2; 3533 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE; 3534 is_l2 = true; 3535 break; 3536 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: 3537 /* Also time stamps V2 L2 Path Delay Request/Response. */ 3538 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2; 3539 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE; 3540 is_l2 = true; 3541 break; 3542 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: 3543 /* Hardware cannot filter just V2 L4 Sync messages; 3544 * fall-through to V2 (both L2 and L4) Sync. 3545 */ 3546 case HWTSTAMP_FILTER_PTP_V2_SYNC: 3547 /* Also time stamps V2 Path Delay Request/Response. */ 3548 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2; 3549 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE; 3550 is_l2 = true; 3551 is_l4 = true; 3552 break; 3553 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: 3554 /* Hardware cannot filter just V2 L4 Delay Request messages; 3555 * fall-through to V2 (both L2 and L4) Delay Request. 3556 */ 3557 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: 3558 /* Also time stamps V2 Path Delay Request/Response. */ 3559 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2; 3560 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE; 3561 is_l2 = true; 3562 is_l4 = true; 3563 break; 3564 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: 3565 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: 3566 /* Hardware cannot filter just V2 L4 or L2 Event messages; 3567 * fall-through to all V2 (both L2 and L4) Events. 3568 */ 3569 case HWTSTAMP_FILTER_PTP_V2_EVENT: 3570 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2; 3571 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT; 3572 is_l2 = true; 3573 is_l4 = true; 3574 break; 3575 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: 3576 /* For V1, the hardware can only filter Sync messages or 3577 * Delay Request messages but not both so fall-through to 3578 * time stamp all packets. 3579 */ 3580 case HWTSTAMP_FILTER_ALL: 3581 is_l2 = true; 3582 is_l4 = true; 3583 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL; 3584 config->rx_filter = HWTSTAMP_FILTER_ALL; 3585 break; 3586 default: 3587 return -ERANGE; 3588 } 3589 3590 /* enable/disable Tx h/w time stamping */ 3591 regval = er32(TSYNCTXCTL); 3592 regval &= ~E1000_TSYNCTXCTL_ENABLED; 3593 regval |= tsync_tx_ctl; 3594 ew32(TSYNCTXCTL, regval); 3595 if ((er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) != 3596 (regval & E1000_TSYNCTXCTL_ENABLED)) { 3597 e_err("Timesync Tx Control register not set as expected\n"); 3598 return -EAGAIN; 3599 } 3600 3601 /* enable/disable Rx h/w time stamping */ 3602 regval = er32(TSYNCRXCTL); 3603 regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK); 3604 regval |= tsync_rx_ctl; 3605 ew32(TSYNCRXCTL, regval); 3606 if ((er32(TSYNCRXCTL) & (E1000_TSYNCRXCTL_ENABLED | 3607 E1000_TSYNCRXCTL_TYPE_MASK)) != 3608 (regval & (E1000_TSYNCRXCTL_ENABLED | 3609 E1000_TSYNCRXCTL_TYPE_MASK))) { 3610 e_err("Timesync Rx Control register not set as expected\n"); 3611 return -EAGAIN; 3612 } 3613 3614 /* L2: define ethertype filter for time stamped packets */ 3615 if (is_l2) 3616 rxmtrl |= ETH_P_1588; 3617 3618 /* define which PTP packets get time stamped */ 3619 ew32(RXMTRL, rxmtrl); 3620 3621 /* Filter by destination port */ 3622 if (is_l4) { 3623 rxudp = PTP_EV_PORT; 3624 cpu_to_be16s(&rxudp); 3625 } 3626 ew32(RXUDP, rxudp); 3627 3628 e1e_flush(); 3629 3630 /* Clear TSYNCRXCTL_VALID & TSYNCTXCTL_VALID bit */ 3631 er32(RXSTMPH); 3632 er32(TXSTMPH); 3633 3634 /* Get and set the System Time Register SYSTIM base frequency */ 3635 ret_val = e1000e_get_base_timinca(adapter, ®val); 3636 if (ret_val) 3637 return ret_val; 3638 ew32(TIMINCA, regval); 3639 3640 /* reset the ns time counter */ 3641 timecounter_init(&adapter->tc, &adapter->cc, 3642 ktime_to_ns(ktime_get_real())); 3643 3644 return 0; 3645 } 3646 3647 /** 3648 * e1000_configure - configure the hardware for Rx and Tx 3649 * @adapter: private board structure 3650 **/ 3651 static void e1000_configure(struct e1000_adapter *adapter) 3652 { 3653 struct e1000_ring *rx_ring = adapter->rx_ring; 3654 3655 e1000e_set_rx_mode(adapter->netdev); 3656 3657 e1000_restore_vlan(adapter); 3658 e1000_init_manageability_pt(adapter); 3659 3660 e1000_configure_tx(adapter); 3661 3662 if (adapter->netdev->features & NETIF_F_RXHASH) 3663 e1000e_setup_rss_hash(adapter); 3664 e1000_setup_rctl(adapter); 3665 e1000_configure_rx(adapter); 3666 adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL); 3667 } 3668 3669 /** 3670 * e1000e_power_up_phy - restore link in case the phy was powered down 3671 * @adapter: address of board private structure 3672 * 3673 * The phy may be powered down to save power and turn off link when the 3674 * driver is unloaded and wake on lan is not enabled (among others) 3675 * *** this routine MUST be followed by a call to e1000e_reset *** 3676 **/ 3677 void e1000e_power_up_phy(struct e1000_adapter *adapter) 3678 { 3679 if (adapter->hw.phy.ops.power_up) 3680 adapter->hw.phy.ops.power_up(&adapter->hw); 3681 3682 adapter->hw.mac.ops.setup_link(&adapter->hw); 3683 } 3684 3685 /** 3686 * e1000_power_down_phy - Power down the PHY 3687 * 3688 * Power down the PHY so no link is implied when interface is down. 3689 * The PHY cannot be powered down if management or WoL is active. 3690 */ 3691 static void e1000_power_down_phy(struct e1000_adapter *adapter) 3692 { 3693 /* WoL is enabled */ 3694 if (adapter->wol) 3695 return; 3696 3697 if (adapter->hw.phy.ops.power_down) 3698 adapter->hw.phy.ops.power_down(&adapter->hw); 3699 } 3700 3701 /** 3702 * e1000e_reset - bring the hardware into a known good state 3703 * 3704 * This function boots the hardware and enables some settings that 3705 * require a configuration cycle of the hardware - those cannot be 3706 * set/changed during runtime. After reset the device needs to be 3707 * properly configured for Rx, Tx etc. 3708 */ 3709 void e1000e_reset(struct e1000_adapter *adapter) 3710 { 3711 struct e1000_mac_info *mac = &adapter->hw.mac; 3712 struct e1000_fc_info *fc = &adapter->hw.fc; 3713 struct e1000_hw *hw = &adapter->hw; 3714 u32 tx_space, min_tx_space, min_rx_space; 3715 u32 pba = adapter->pba; 3716 u16 hwm; 3717 3718 /* reset Packet Buffer Allocation to default */ 3719 ew32(PBA, pba); 3720 3721 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) { 3722 /* To maintain wire speed transmits, the Tx FIFO should be 3723 * large enough to accommodate two full transmit packets, 3724 * rounded up to the next 1KB and expressed in KB. Likewise, 3725 * the Rx FIFO should be large enough to accommodate at least 3726 * one full receive packet and is similarly rounded up and 3727 * expressed in KB. 3728 */ 3729 pba = er32(PBA); 3730 /* upper 16 bits has Tx packet buffer allocation size in KB */ 3731 tx_space = pba >> 16; 3732 /* lower 16 bits has Rx packet buffer allocation size in KB */ 3733 pba &= 0xffff; 3734 /* the Tx fifo also stores 16 bytes of information about the Tx 3735 * but don't include ethernet FCS because hardware appends it 3736 */ 3737 min_tx_space = (adapter->max_frame_size + 3738 sizeof(struct e1000_tx_desc) - ETH_FCS_LEN) * 2; 3739 min_tx_space = ALIGN(min_tx_space, 1024); 3740 min_tx_space >>= 10; 3741 /* software strips receive CRC, so leave room for it */ 3742 min_rx_space = adapter->max_frame_size; 3743 min_rx_space = ALIGN(min_rx_space, 1024); 3744 min_rx_space >>= 10; 3745 3746 /* If current Tx allocation is less than the min Tx FIFO size, 3747 * and the min Tx FIFO size is less than the current Rx FIFO 3748 * allocation, take space away from current Rx allocation 3749 */ 3750 if ((tx_space < min_tx_space) && 3751 ((min_tx_space - tx_space) < pba)) { 3752 pba -= min_tx_space - tx_space; 3753 3754 /* if short on Rx space, Rx wins and must trump Tx 3755 * adjustment 3756 */ 3757 if (pba < min_rx_space) 3758 pba = min_rx_space; 3759 } 3760 3761 ew32(PBA, pba); 3762 } 3763 3764 /* flow control settings 3765 * 3766 * The high water mark must be low enough to fit one full frame 3767 * (or the size used for early receive) above it in the Rx FIFO. 3768 * Set it to the lower of: 3769 * - 90% of the Rx FIFO size, and 3770 * - the full Rx FIFO size minus one full frame 3771 */ 3772 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME) 3773 fc->pause_time = 0xFFFF; 3774 else 3775 fc->pause_time = E1000_FC_PAUSE_TIME; 3776 fc->send_xon = true; 3777 fc->current_mode = fc->requested_mode; 3778 3779 switch (hw->mac.type) { 3780 case e1000_ich9lan: 3781 case e1000_ich10lan: 3782 if (adapter->netdev->mtu > ETH_DATA_LEN) { 3783 pba = 14; 3784 ew32(PBA, pba); 3785 fc->high_water = 0x2800; 3786 fc->low_water = fc->high_water - 8; 3787 break; 3788 } 3789 /* fall-through */ 3790 default: 3791 hwm = min(((pba << 10) * 9 / 10), 3792 ((pba << 10) - adapter->max_frame_size)); 3793 3794 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */ 3795 fc->low_water = fc->high_water - 8; 3796 break; 3797 case e1000_pchlan: 3798 /* Workaround PCH LOM adapter hangs with certain network 3799 * loads. If hangs persist, try disabling Tx flow control. 3800 */ 3801 if (adapter->netdev->mtu > ETH_DATA_LEN) { 3802 fc->high_water = 0x3500; 3803 fc->low_water = 0x1500; 3804 } else { 3805 fc->high_water = 0x5000; 3806 fc->low_water = 0x3000; 3807 } 3808 fc->refresh_time = 0x1000; 3809 break; 3810 case e1000_pch2lan: 3811 case e1000_pch_lpt: 3812 fc->refresh_time = 0x0400; 3813 3814 if (adapter->netdev->mtu <= ETH_DATA_LEN) { 3815 fc->high_water = 0x05C20; 3816 fc->low_water = 0x05048; 3817 fc->pause_time = 0x0650; 3818 break; 3819 } 3820 3821 fc->high_water = ((pba << 10) * 9 / 10) & E1000_FCRTH_RTH; 3822 fc->low_water = ((pba << 10) * 8 / 10) & E1000_FCRTL_RTL; 3823 break; 3824 } 3825 3826 /* Alignment of Tx data is on an arbitrary byte boundary with the 3827 * maximum size per Tx descriptor limited only to the transmit 3828 * allocation of the packet buffer minus 96 bytes with an upper 3829 * limit of 24KB due to receive synchronization limitations. 3830 */ 3831 adapter->tx_fifo_limit = min_t(u32, ((er32(PBA) >> 16) << 10) - 96, 3832 24 << 10); 3833 3834 /* Disable Adaptive Interrupt Moderation if 2 full packets cannot 3835 * fit in receive buffer. 3836 */ 3837 if (adapter->itr_setting & 0x3) { 3838 if ((adapter->max_frame_size * 2) > (pba << 10)) { 3839 if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) { 3840 dev_info(&adapter->pdev->dev, 3841 "Interrupt Throttle Rate off\n"); 3842 adapter->flags2 |= FLAG2_DISABLE_AIM; 3843 e1000e_write_itr(adapter, 0); 3844 } 3845 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) { 3846 dev_info(&adapter->pdev->dev, 3847 "Interrupt Throttle Rate on\n"); 3848 adapter->flags2 &= ~FLAG2_DISABLE_AIM; 3849 adapter->itr = 20000; 3850 e1000e_write_itr(adapter, adapter->itr); 3851 } 3852 } 3853 3854 /* Allow time for pending master requests to run */ 3855 mac->ops.reset_hw(hw); 3856 3857 /* For parts with AMT enabled, let the firmware know 3858 * that the network interface is in control 3859 */ 3860 if (adapter->flags & FLAG_HAS_AMT) 3861 e1000e_get_hw_control(adapter); 3862 3863 ew32(WUC, 0); 3864 3865 if (mac->ops.init_hw(hw)) 3866 e_err("Hardware Error\n"); 3867 3868 e1000_update_mng_vlan(adapter); 3869 3870 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */ 3871 ew32(VET, ETH_P_8021Q); 3872 3873 e1000e_reset_adaptive(hw); 3874 3875 /* initialize systim and reset the ns time counter */ 3876 e1000e_config_hwtstamp(adapter); 3877 3878 if (!netif_running(adapter->netdev) && 3879 !test_bit(__E1000_TESTING, &adapter->state)) { 3880 e1000_power_down_phy(adapter); 3881 return; 3882 } 3883 3884 e1000_get_phy_info(hw); 3885 3886 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) && 3887 !(adapter->flags & FLAG_SMART_POWER_DOWN)) { 3888 u16 phy_data = 0; 3889 /* speed up time to link by disabling smart power down, ignore 3890 * the return value of this function because there is nothing 3891 * different we would do if it failed 3892 */ 3893 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data); 3894 phy_data &= ~IGP02E1000_PM_SPD; 3895 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data); 3896 } 3897 } 3898 3899 int e1000e_up(struct e1000_adapter *adapter) 3900 { 3901 struct e1000_hw *hw = &adapter->hw; 3902 3903 /* hardware has been reset, we need to reload some things */ 3904 e1000_configure(adapter); 3905 3906 clear_bit(__E1000_DOWN, &adapter->state); 3907 3908 if (adapter->msix_entries) 3909 e1000_configure_msix(adapter); 3910 e1000_irq_enable(adapter); 3911 3912 netif_start_queue(adapter->netdev); 3913 3914 /* fire a link change interrupt to start the watchdog */ 3915 if (adapter->msix_entries) 3916 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER); 3917 else 3918 ew32(ICS, E1000_ICS_LSC); 3919 3920 return 0; 3921 } 3922 3923 static void e1000e_flush_descriptors(struct e1000_adapter *adapter) 3924 { 3925 struct e1000_hw *hw = &adapter->hw; 3926 3927 if (!(adapter->flags2 & FLAG2_DMA_BURST)) 3928 return; 3929 3930 /* flush pending descriptor writebacks to memory */ 3931 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); 3932 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD); 3933 3934 /* execute the writes immediately */ 3935 e1e_flush(); 3936 3937 /* due to rare timing issues, write to TIDV/RDTR again to ensure the 3938 * write is successful 3939 */ 3940 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); 3941 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD); 3942 3943 /* execute the writes immediately */ 3944 e1e_flush(); 3945 } 3946 3947 static void e1000e_update_stats(struct e1000_adapter *adapter); 3948 3949 void e1000e_down(struct e1000_adapter *adapter) 3950 { 3951 struct net_device *netdev = adapter->netdev; 3952 struct e1000_hw *hw = &adapter->hw; 3953 u32 tctl, rctl; 3954 3955 /* signal that we're down so the interrupt handler does not 3956 * reschedule our watchdog timer 3957 */ 3958 set_bit(__E1000_DOWN, &adapter->state); 3959 3960 /* disable receives in the hardware */ 3961 rctl = er32(RCTL); 3962 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX)) 3963 ew32(RCTL, rctl & ~E1000_RCTL_EN); 3964 /* flush and sleep below */ 3965 3966 netif_stop_queue(netdev); 3967 3968 /* disable transmits in the hardware */ 3969 tctl = er32(TCTL); 3970 tctl &= ~E1000_TCTL_EN; 3971 ew32(TCTL, tctl); 3972 3973 /* flush both disables and wait for them to finish */ 3974 e1e_flush(); 3975 usleep_range(10000, 20000); 3976 3977 e1000_irq_disable(adapter); 3978 3979 del_timer_sync(&adapter->watchdog_timer); 3980 del_timer_sync(&adapter->phy_info_timer); 3981 3982 netif_carrier_off(netdev); 3983 3984 spin_lock(&adapter->stats64_lock); 3985 e1000e_update_stats(adapter); 3986 spin_unlock(&adapter->stats64_lock); 3987 3988 e1000e_flush_descriptors(adapter); 3989 e1000_clean_tx_ring(adapter->tx_ring); 3990 e1000_clean_rx_ring(adapter->rx_ring); 3991 3992 adapter->link_speed = 0; 3993 adapter->link_duplex = 0; 3994 3995 if (!pci_channel_offline(adapter->pdev)) 3996 e1000e_reset(adapter); 3997 3998 /* TODO: for power management, we could drop the link and 3999 * pci_disable_device here. 4000 */ 4001 } 4002 4003 void e1000e_reinit_locked(struct e1000_adapter *adapter) 4004 { 4005 might_sleep(); 4006 while (test_and_set_bit(__E1000_RESETTING, &adapter->state)) 4007 usleep_range(1000, 2000); 4008 e1000e_down(adapter); 4009 e1000e_up(adapter); 4010 clear_bit(__E1000_RESETTING, &adapter->state); 4011 } 4012 4013 /** 4014 * e1000e_cyclecounter_read - read raw cycle counter (used by time counter) 4015 * @cc: cyclecounter structure 4016 **/ 4017 static cycle_t e1000e_cyclecounter_read(const struct cyclecounter *cc) 4018 { 4019 struct e1000_adapter *adapter = container_of(cc, struct e1000_adapter, 4020 cc); 4021 struct e1000_hw *hw = &adapter->hw; 4022 cycle_t systim; 4023 4024 /* latch SYSTIMH on read of SYSTIML */ 4025 systim = (cycle_t)er32(SYSTIML); 4026 systim |= (cycle_t)er32(SYSTIMH) << 32; 4027 4028 return systim; 4029 } 4030 4031 /** 4032 * e1000_sw_init - Initialize general software structures (struct e1000_adapter) 4033 * @adapter: board private structure to initialize 4034 * 4035 * e1000_sw_init initializes the Adapter private data structure. 4036 * Fields are initialized based on PCI device information and 4037 * OS network device settings (MTU size). 4038 **/ 4039 static int e1000_sw_init(struct e1000_adapter *adapter) 4040 { 4041 struct net_device *netdev = adapter->netdev; 4042 4043 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN; 4044 adapter->rx_ps_bsize0 = 128; 4045 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; 4046 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN; 4047 adapter->tx_ring_count = E1000_DEFAULT_TXD; 4048 adapter->rx_ring_count = E1000_DEFAULT_RXD; 4049 4050 spin_lock_init(&adapter->stats64_lock); 4051 4052 e1000e_set_interrupt_capability(adapter); 4053 4054 if (e1000_alloc_queues(adapter)) 4055 return -ENOMEM; 4056 4057 /* Setup hardware time stamping cyclecounter */ 4058 if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) { 4059 adapter->cc.read = e1000e_cyclecounter_read; 4060 adapter->cc.mask = CLOCKSOURCE_MASK(64); 4061 adapter->cc.mult = 1; 4062 /* cc.shift set in e1000e_get_base_tininca() */ 4063 4064 spin_lock_init(&adapter->systim_lock); 4065 INIT_WORK(&adapter->tx_hwtstamp_work, e1000e_tx_hwtstamp_work); 4066 } 4067 4068 /* Explicitly disable IRQ since the NIC can be in any state. */ 4069 e1000_irq_disable(adapter); 4070 4071 set_bit(__E1000_DOWN, &adapter->state); 4072 return 0; 4073 } 4074 4075 /** 4076 * e1000_intr_msi_test - Interrupt Handler 4077 * @irq: interrupt number 4078 * @data: pointer to a network interface device structure 4079 **/ 4080 static irqreturn_t e1000_intr_msi_test(int __always_unused irq, void *data) 4081 { 4082 struct net_device *netdev = data; 4083 struct e1000_adapter *adapter = netdev_priv(netdev); 4084 struct e1000_hw *hw = &adapter->hw; 4085 u32 icr = er32(ICR); 4086 4087 e_dbg("icr is %08X\n", icr); 4088 if (icr & E1000_ICR_RXSEQ) { 4089 adapter->flags &= ~FLAG_MSI_TEST_FAILED; 4090 /* Force memory writes to complete before acknowledging the 4091 * interrupt is handled. 4092 */ 4093 wmb(); 4094 } 4095 4096 return IRQ_HANDLED; 4097 } 4098 4099 /** 4100 * e1000_test_msi_interrupt - Returns 0 for successful test 4101 * @adapter: board private struct 4102 * 4103 * code flow taken from tg3.c 4104 **/ 4105 static int e1000_test_msi_interrupt(struct e1000_adapter *adapter) 4106 { 4107 struct net_device *netdev = adapter->netdev; 4108 struct e1000_hw *hw = &adapter->hw; 4109 int err; 4110 4111 /* poll_enable hasn't been called yet, so don't need disable */ 4112 /* clear any pending events */ 4113 er32(ICR); 4114 4115 /* free the real vector and request a test handler */ 4116 e1000_free_irq(adapter); 4117 e1000e_reset_interrupt_capability(adapter); 4118 4119 /* Assume that the test fails, if it succeeds then the test 4120 * MSI irq handler will unset this flag 4121 */ 4122 adapter->flags |= FLAG_MSI_TEST_FAILED; 4123 4124 err = pci_enable_msi(adapter->pdev); 4125 if (err) 4126 goto msi_test_failed; 4127 4128 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0, 4129 netdev->name, netdev); 4130 if (err) { 4131 pci_disable_msi(adapter->pdev); 4132 goto msi_test_failed; 4133 } 4134 4135 /* Force memory writes to complete before enabling and firing an 4136 * interrupt. 4137 */ 4138 wmb(); 4139 4140 e1000_irq_enable(adapter); 4141 4142 /* fire an unusual interrupt on the test handler */ 4143 ew32(ICS, E1000_ICS_RXSEQ); 4144 e1e_flush(); 4145 msleep(100); 4146 4147 e1000_irq_disable(adapter); 4148 4149 rmb(); /* read flags after interrupt has been fired */ 4150 4151 if (adapter->flags & FLAG_MSI_TEST_FAILED) { 4152 adapter->int_mode = E1000E_INT_MODE_LEGACY; 4153 e_info("MSI interrupt test failed, using legacy interrupt.\n"); 4154 } else { 4155 e_dbg("MSI interrupt test succeeded!\n"); 4156 } 4157 4158 free_irq(adapter->pdev->irq, netdev); 4159 pci_disable_msi(adapter->pdev); 4160 4161 msi_test_failed: 4162 e1000e_set_interrupt_capability(adapter); 4163 return e1000_request_irq(adapter); 4164 } 4165 4166 /** 4167 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored 4168 * @adapter: board private struct 4169 * 4170 * code flow taken from tg3.c, called with e1000 interrupts disabled. 4171 **/ 4172 static int e1000_test_msi(struct e1000_adapter *adapter) 4173 { 4174 int err; 4175 u16 pci_cmd; 4176 4177 if (!(adapter->flags & FLAG_MSI_ENABLED)) 4178 return 0; 4179 4180 /* disable SERR in case the MSI write causes a master abort */ 4181 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd); 4182 if (pci_cmd & PCI_COMMAND_SERR) 4183 pci_write_config_word(adapter->pdev, PCI_COMMAND, 4184 pci_cmd & ~PCI_COMMAND_SERR); 4185 4186 err = e1000_test_msi_interrupt(adapter); 4187 4188 /* re-enable SERR */ 4189 if (pci_cmd & PCI_COMMAND_SERR) { 4190 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd); 4191 pci_cmd |= PCI_COMMAND_SERR; 4192 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd); 4193 } 4194 4195 return err; 4196 } 4197 4198 /** 4199 * e1000_open - Called when a network interface is made active 4200 * @netdev: network interface device structure 4201 * 4202 * Returns 0 on success, negative value on failure 4203 * 4204 * The open entry point is called when a network interface is made 4205 * active by the system (IFF_UP). At this point all resources needed 4206 * for transmit and receive operations are allocated, the interrupt 4207 * handler is registered with the OS, the watchdog timer is started, 4208 * and the stack is notified that the interface is ready. 4209 **/ 4210 static int e1000_open(struct net_device *netdev) 4211 { 4212 struct e1000_adapter *adapter = netdev_priv(netdev); 4213 struct e1000_hw *hw = &adapter->hw; 4214 struct pci_dev *pdev = adapter->pdev; 4215 int err; 4216 4217 /* disallow open during test */ 4218 if (test_bit(__E1000_TESTING, &adapter->state)) 4219 return -EBUSY; 4220 4221 pm_runtime_get_sync(&pdev->dev); 4222 4223 netif_carrier_off(netdev); 4224 4225 /* allocate transmit descriptors */ 4226 err = e1000e_setup_tx_resources(adapter->tx_ring); 4227 if (err) 4228 goto err_setup_tx; 4229 4230 /* allocate receive descriptors */ 4231 err = e1000e_setup_rx_resources(adapter->rx_ring); 4232 if (err) 4233 goto err_setup_rx; 4234 4235 /* If AMT is enabled, let the firmware know that the network 4236 * interface is now open and reset the part to a known state. 4237 */ 4238 if (adapter->flags & FLAG_HAS_AMT) { 4239 e1000e_get_hw_control(adapter); 4240 e1000e_reset(adapter); 4241 } 4242 4243 e1000e_power_up_phy(adapter); 4244 4245 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; 4246 if ((adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN)) 4247 e1000_update_mng_vlan(adapter); 4248 4249 /* DMA latency requirement to workaround jumbo issue */ 4250 pm_qos_add_request(&adapter->netdev->pm_qos_req, PM_QOS_CPU_DMA_LATENCY, 4251 PM_QOS_DEFAULT_VALUE); 4252 4253 /* before we allocate an interrupt, we must be ready to handle it. 4254 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt 4255 * as soon as we call pci_request_irq, so we have to setup our 4256 * clean_rx handler before we do so. 4257 */ 4258 e1000_configure(adapter); 4259 4260 err = e1000_request_irq(adapter); 4261 if (err) 4262 goto err_req_irq; 4263 4264 /* Work around PCIe errata with MSI interrupts causing some chipsets to 4265 * ignore e1000e MSI messages, which means we need to test our MSI 4266 * interrupt now 4267 */ 4268 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) { 4269 err = e1000_test_msi(adapter); 4270 if (err) { 4271 e_err("Interrupt allocation failed\n"); 4272 goto err_req_irq; 4273 } 4274 } 4275 4276 /* From here on the code is the same as e1000e_up() */ 4277 clear_bit(__E1000_DOWN, &adapter->state); 4278 4279 napi_enable(&adapter->napi); 4280 4281 e1000_irq_enable(adapter); 4282 4283 adapter->tx_hang_recheck = false; 4284 netif_start_queue(netdev); 4285 4286 adapter->idle_check = true; 4287 hw->mac.get_link_status = true; 4288 pm_runtime_put(&pdev->dev); 4289 4290 /* fire a link status change interrupt to start the watchdog */ 4291 if (adapter->msix_entries) 4292 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER); 4293 else 4294 ew32(ICS, E1000_ICS_LSC); 4295 4296 return 0; 4297 4298 err_req_irq: 4299 e1000e_release_hw_control(adapter); 4300 e1000_power_down_phy(adapter); 4301 e1000e_free_rx_resources(adapter->rx_ring); 4302 err_setup_rx: 4303 e1000e_free_tx_resources(adapter->tx_ring); 4304 err_setup_tx: 4305 e1000e_reset(adapter); 4306 pm_runtime_put_sync(&pdev->dev); 4307 4308 return err; 4309 } 4310 4311 /** 4312 * e1000_close - Disables a network interface 4313 * @netdev: network interface device structure 4314 * 4315 * Returns 0, this is not allowed to fail 4316 * 4317 * The close entry point is called when an interface is de-activated 4318 * by the OS. The hardware is still under the drivers control, but 4319 * needs to be disabled. A global MAC reset is issued to stop the 4320 * hardware, and all transmit and receive resources are freed. 4321 **/ 4322 static int e1000_close(struct net_device *netdev) 4323 { 4324 struct e1000_adapter *adapter = netdev_priv(netdev); 4325 struct pci_dev *pdev = adapter->pdev; 4326 int count = E1000_CHECK_RESET_COUNT; 4327 4328 while (test_bit(__E1000_RESETTING, &adapter->state) && count--) 4329 usleep_range(10000, 20000); 4330 4331 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state)); 4332 4333 pm_runtime_get_sync(&pdev->dev); 4334 4335 napi_disable(&adapter->napi); 4336 4337 if (!test_bit(__E1000_DOWN, &adapter->state)) { 4338 e1000e_down(adapter); 4339 e1000_free_irq(adapter); 4340 } 4341 e1000_power_down_phy(adapter); 4342 4343 e1000e_free_tx_resources(adapter->tx_ring); 4344 e1000e_free_rx_resources(adapter->rx_ring); 4345 4346 /* kill manageability vlan ID if supported, but not if a vlan with 4347 * the same ID is registered on the host OS (let 8021q kill it) 4348 */ 4349 if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) 4350 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); 4351 4352 /* If AMT is enabled, let the firmware know that the network 4353 * interface is now closed 4354 */ 4355 if ((adapter->flags & FLAG_HAS_AMT) && 4356 !test_bit(__E1000_TESTING, &adapter->state)) 4357 e1000e_release_hw_control(adapter); 4358 4359 pm_qos_remove_request(&adapter->netdev->pm_qos_req); 4360 4361 pm_runtime_put_sync(&pdev->dev); 4362 4363 return 0; 4364 } 4365 4366 /** 4367 * e1000_set_mac - Change the Ethernet Address of the NIC 4368 * @netdev: network interface device structure 4369 * @p: pointer to an address structure 4370 * 4371 * Returns 0 on success, negative on failure 4372 **/ 4373 static int e1000_set_mac(struct net_device *netdev, void *p) 4374 { 4375 struct e1000_adapter *adapter = netdev_priv(netdev); 4376 struct e1000_hw *hw = &adapter->hw; 4377 struct sockaddr *addr = p; 4378 4379 if (!is_valid_ether_addr(addr->sa_data)) 4380 return -EADDRNOTAVAIL; 4381 4382 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 4383 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len); 4384 4385 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0); 4386 4387 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) { 4388 /* activate the work around */ 4389 e1000e_set_laa_state_82571(&adapter->hw, 1); 4390 4391 /* Hold a copy of the LAA in RAR[14] This is done so that 4392 * between the time RAR[0] gets clobbered and the time it 4393 * gets fixed (in e1000_watchdog), the actual LAA is in one 4394 * of the RARs and no incoming packets directed to this port 4395 * are dropped. Eventually the LAA will be in RAR[0] and 4396 * RAR[14] 4397 */ 4398 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 4399 adapter->hw.mac.rar_entry_count - 1); 4400 } 4401 4402 return 0; 4403 } 4404 4405 /** 4406 * e1000e_update_phy_task - work thread to update phy 4407 * @work: pointer to our work struct 4408 * 4409 * this worker thread exists because we must acquire a 4410 * semaphore to read the phy, which we could msleep while 4411 * waiting for it, and we can't msleep in a timer. 4412 **/ 4413 static void e1000e_update_phy_task(struct work_struct *work) 4414 { 4415 struct e1000_adapter *adapter = container_of(work, 4416 struct e1000_adapter, 4417 update_phy_task); 4418 4419 if (test_bit(__E1000_DOWN, &adapter->state)) 4420 return; 4421 4422 e1000_get_phy_info(&adapter->hw); 4423 } 4424 4425 /** 4426 * e1000_update_phy_info - timre call-back to update PHY info 4427 * @data: pointer to adapter cast into an unsigned long 4428 * 4429 * Need to wait a few seconds after link up to get diagnostic information from 4430 * the phy 4431 **/ 4432 static void e1000_update_phy_info(unsigned long data) 4433 { 4434 struct e1000_adapter *adapter = (struct e1000_adapter *)data; 4435 4436 if (test_bit(__E1000_DOWN, &adapter->state)) 4437 return; 4438 4439 schedule_work(&adapter->update_phy_task); 4440 } 4441 4442 /** 4443 * e1000e_update_phy_stats - Update the PHY statistics counters 4444 * @adapter: board private structure 4445 * 4446 * Read/clear the upper 16-bit PHY registers and read/accumulate lower 4447 **/ 4448 static void e1000e_update_phy_stats(struct e1000_adapter *adapter) 4449 { 4450 struct e1000_hw *hw = &adapter->hw; 4451 s32 ret_val; 4452 u16 phy_data; 4453 4454 ret_val = hw->phy.ops.acquire(hw); 4455 if (ret_val) 4456 return; 4457 4458 /* A page set is expensive so check if already on desired page. 4459 * If not, set to the page with the PHY status registers. 4460 */ 4461 hw->phy.addr = 1; 4462 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, 4463 &phy_data); 4464 if (ret_val) 4465 goto release; 4466 if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) { 4467 ret_val = hw->phy.ops.set_page(hw, 4468 HV_STATS_PAGE << IGP_PAGE_SHIFT); 4469 if (ret_val) 4470 goto release; 4471 } 4472 4473 /* Single Collision Count */ 4474 hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data); 4475 ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data); 4476 if (!ret_val) 4477 adapter->stats.scc += phy_data; 4478 4479 /* Excessive Collision Count */ 4480 hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data); 4481 ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data); 4482 if (!ret_val) 4483 adapter->stats.ecol += phy_data; 4484 4485 /* Multiple Collision Count */ 4486 hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data); 4487 ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data); 4488 if (!ret_val) 4489 adapter->stats.mcc += phy_data; 4490 4491 /* Late Collision Count */ 4492 hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data); 4493 ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data); 4494 if (!ret_val) 4495 adapter->stats.latecol += phy_data; 4496 4497 /* Collision Count - also used for adaptive IFS */ 4498 hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data); 4499 ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data); 4500 if (!ret_val) 4501 hw->mac.collision_delta = phy_data; 4502 4503 /* Defer Count */ 4504 hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data); 4505 ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data); 4506 if (!ret_val) 4507 adapter->stats.dc += phy_data; 4508 4509 /* Transmit with no CRS */ 4510 hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data); 4511 ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data); 4512 if (!ret_val) 4513 adapter->stats.tncrs += phy_data; 4514 4515 release: 4516 hw->phy.ops.release(hw); 4517 } 4518 4519 /** 4520 * e1000e_update_stats - Update the board statistics counters 4521 * @adapter: board private structure 4522 **/ 4523 static void e1000e_update_stats(struct e1000_adapter *adapter) 4524 { 4525 struct net_device *netdev = adapter->netdev; 4526 struct e1000_hw *hw = &adapter->hw; 4527 struct pci_dev *pdev = adapter->pdev; 4528 4529 /* Prevent stats update while adapter is being reset, or if the pci 4530 * connection is down. 4531 */ 4532 if (adapter->link_speed == 0) 4533 return; 4534 if (pci_channel_offline(pdev)) 4535 return; 4536 4537 adapter->stats.crcerrs += er32(CRCERRS); 4538 adapter->stats.gprc += er32(GPRC); 4539 adapter->stats.gorc += er32(GORCL); 4540 er32(GORCH); /* Clear gorc */ 4541 adapter->stats.bprc += er32(BPRC); 4542 adapter->stats.mprc += er32(MPRC); 4543 adapter->stats.roc += er32(ROC); 4544 4545 adapter->stats.mpc += er32(MPC); 4546 4547 /* Half-duplex statistics */ 4548 if (adapter->link_duplex == HALF_DUPLEX) { 4549 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) { 4550 e1000e_update_phy_stats(adapter); 4551 } else { 4552 adapter->stats.scc += er32(SCC); 4553 adapter->stats.ecol += er32(ECOL); 4554 adapter->stats.mcc += er32(MCC); 4555 adapter->stats.latecol += er32(LATECOL); 4556 adapter->stats.dc += er32(DC); 4557 4558 hw->mac.collision_delta = er32(COLC); 4559 4560 if ((hw->mac.type != e1000_82574) && 4561 (hw->mac.type != e1000_82583)) 4562 adapter->stats.tncrs += er32(TNCRS); 4563 } 4564 adapter->stats.colc += hw->mac.collision_delta; 4565 } 4566 4567 adapter->stats.xonrxc += er32(XONRXC); 4568 adapter->stats.xontxc += er32(XONTXC); 4569 adapter->stats.xoffrxc += er32(XOFFRXC); 4570 adapter->stats.xofftxc += er32(XOFFTXC); 4571 adapter->stats.gptc += er32(GPTC); 4572 adapter->stats.gotc += er32(GOTCL); 4573 er32(GOTCH); /* Clear gotc */ 4574 adapter->stats.rnbc += er32(RNBC); 4575 adapter->stats.ruc += er32(RUC); 4576 4577 adapter->stats.mptc += er32(MPTC); 4578 adapter->stats.bptc += er32(BPTC); 4579 4580 /* used for adaptive IFS */ 4581 4582 hw->mac.tx_packet_delta = er32(TPT); 4583 adapter->stats.tpt += hw->mac.tx_packet_delta; 4584 4585 adapter->stats.algnerrc += er32(ALGNERRC); 4586 adapter->stats.rxerrc += er32(RXERRC); 4587 adapter->stats.cexterr += er32(CEXTERR); 4588 adapter->stats.tsctc += er32(TSCTC); 4589 adapter->stats.tsctfc += er32(TSCTFC); 4590 4591 /* Fill out the OS statistics structure */ 4592 netdev->stats.multicast = adapter->stats.mprc; 4593 netdev->stats.collisions = adapter->stats.colc; 4594 4595 /* Rx Errors */ 4596 4597 /* RLEC on some newer hardware can be incorrect so build 4598 * our own version based on RUC and ROC 4599 */ 4600 netdev->stats.rx_errors = adapter->stats.rxerrc + 4601 adapter->stats.crcerrs + adapter->stats.algnerrc + 4602 adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr; 4603 netdev->stats.rx_length_errors = adapter->stats.ruc + 4604 adapter->stats.roc; 4605 netdev->stats.rx_crc_errors = adapter->stats.crcerrs; 4606 netdev->stats.rx_frame_errors = adapter->stats.algnerrc; 4607 netdev->stats.rx_missed_errors = adapter->stats.mpc; 4608 4609 /* Tx Errors */ 4610 netdev->stats.tx_errors = adapter->stats.ecol + adapter->stats.latecol; 4611 netdev->stats.tx_aborted_errors = adapter->stats.ecol; 4612 netdev->stats.tx_window_errors = adapter->stats.latecol; 4613 netdev->stats.tx_carrier_errors = adapter->stats.tncrs; 4614 4615 /* Tx Dropped needs to be maintained elsewhere */ 4616 4617 /* Management Stats */ 4618 adapter->stats.mgptc += er32(MGTPTC); 4619 adapter->stats.mgprc += er32(MGTPRC); 4620 adapter->stats.mgpdc += er32(MGTPDC); 4621 4622 /* Correctable ECC Errors */ 4623 if (hw->mac.type == e1000_pch_lpt) { 4624 u32 pbeccsts = er32(PBECCSTS); 4625 adapter->corr_errors += 4626 pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK; 4627 adapter->uncorr_errors += 4628 (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >> 4629 E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT; 4630 } 4631 } 4632 4633 /** 4634 * e1000_phy_read_status - Update the PHY register status snapshot 4635 * @adapter: board private structure 4636 **/ 4637 static void e1000_phy_read_status(struct e1000_adapter *adapter) 4638 { 4639 struct e1000_hw *hw = &adapter->hw; 4640 struct e1000_phy_regs *phy = &adapter->phy_regs; 4641 4642 if ((er32(STATUS) & E1000_STATUS_LU) && 4643 (adapter->hw.phy.media_type == e1000_media_type_copper)) { 4644 int ret_val; 4645 4646 pm_runtime_get_sync(&adapter->pdev->dev); 4647 ret_val = e1e_rphy(hw, MII_BMCR, &phy->bmcr); 4648 ret_val |= e1e_rphy(hw, MII_BMSR, &phy->bmsr); 4649 ret_val |= e1e_rphy(hw, MII_ADVERTISE, &phy->advertise); 4650 ret_val |= e1e_rphy(hw, MII_LPA, &phy->lpa); 4651 ret_val |= e1e_rphy(hw, MII_EXPANSION, &phy->expansion); 4652 ret_val |= e1e_rphy(hw, MII_CTRL1000, &phy->ctrl1000); 4653 ret_val |= e1e_rphy(hw, MII_STAT1000, &phy->stat1000); 4654 ret_val |= e1e_rphy(hw, MII_ESTATUS, &phy->estatus); 4655 if (ret_val) 4656 e_warn("Error reading PHY register\n"); 4657 pm_runtime_put_sync(&adapter->pdev->dev); 4658 } else { 4659 /* Do not read PHY registers if link is not up 4660 * Set values to typical power-on defaults 4661 */ 4662 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX); 4663 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL | 4664 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE | 4665 BMSR_ERCAP); 4666 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP | 4667 ADVERTISE_ALL | ADVERTISE_CSMA); 4668 phy->lpa = 0; 4669 phy->expansion = EXPANSION_ENABLENPAGE; 4670 phy->ctrl1000 = ADVERTISE_1000FULL; 4671 phy->stat1000 = 0; 4672 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF); 4673 } 4674 } 4675 4676 static void e1000_print_link_info(struct e1000_adapter *adapter) 4677 { 4678 struct e1000_hw *hw = &adapter->hw; 4679 u32 ctrl = er32(CTRL); 4680 4681 /* Link status message must follow this format for user tools */ 4682 pr_info("%s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n", 4683 adapter->netdev->name, adapter->link_speed, 4684 adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half", 4685 (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" : 4686 (ctrl & E1000_CTRL_RFCE) ? "Rx" : 4687 (ctrl & E1000_CTRL_TFCE) ? "Tx" : "None"); 4688 } 4689 4690 static bool e1000e_has_link(struct e1000_adapter *adapter) 4691 { 4692 struct e1000_hw *hw = &adapter->hw; 4693 bool link_active = false; 4694 s32 ret_val = 0; 4695 4696 /* get_link_status is set on LSC (link status) interrupt or 4697 * Rx sequence error interrupt. get_link_status will stay 4698 * false until the check_for_link establishes link 4699 * for copper adapters ONLY 4700 */ 4701 switch (hw->phy.media_type) { 4702 case e1000_media_type_copper: 4703 if (hw->mac.get_link_status) { 4704 ret_val = hw->mac.ops.check_for_link(hw); 4705 link_active = !hw->mac.get_link_status; 4706 } else { 4707 link_active = true; 4708 } 4709 break; 4710 case e1000_media_type_fiber: 4711 ret_val = hw->mac.ops.check_for_link(hw); 4712 link_active = !!(er32(STATUS) & E1000_STATUS_LU); 4713 break; 4714 case e1000_media_type_internal_serdes: 4715 ret_val = hw->mac.ops.check_for_link(hw); 4716 link_active = adapter->hw.mac.serdes_has_link; 4717 break; 4718 default: 4719 case e1000_media_type_unknown: 4720 break; 4721 } 4722 4723 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) && 4724 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) { 4725 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */ 4726 e_info("Gigabit has been disabled, downgrading speed\n"); 4727 } 4728 4729 return link_active; 4730 } 4731 4732 static void e1000e_enable_receives(struct e1000_adapter *adapter) 4733 { 4734 /* make sure the receive unit is started */ 4735 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) && 4736 (adapter->flags & FLAG_RESTART_NOW)) { 4737 struct e1000_hw *hw = &adapter->hw; 4738 u32 rctl = er32(RCTL); 4739 ew32(RCTL, rctl | E1000_RCTL_EN); 4740 adapter->flags &= ~FLAG_RESTART_NOW; 4741 } 4742 } 4743 4744 static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter) 4745 { 4746 struct e1000_hw *hw = &adapter->hw; 4747 4748 /* With 82574 controllers, PHY needs to be checked periodically 4749 * for hung state and reset, if two calls return true 4750 */ 4751 if (e1000_check_phy_82574(hw)) 4752 adapter->phy_hang_count++; 4753 else 4754 adapter->phy_hang_count = 0; 4755 4756 if (adapter->phy_hang_count > 1) { 4757 adapter->phy_hang_count = 0; 4758 schedule_work(&adapter->reset_task); 4759 } 4760 } 4761 4762 /** 4763 * e1000_watchdog - Timer Call-back 4764 * @data: pointer to adapter cast into an unsigned long 4765 **/ 4766 static void e1000_watchdog(unsigned long data) 4767 { 4768 struct e1000_adapter *adapter = (struct e1000_adapter *)data; 4769 4770 /* Do the rest outside of interrupt context */ 4771 schedule_work(&adapter->watchdog_task); 4772 4773 /* TODO: make this use queue_delayed_work() */ 4774 } 4775 4776 static void e1000_watchdog_task(struct work_struct *work) 4777 { 4778 struct e1000_adapter *adapter = container_of(work, 4779 struct e1000_adapter, 4780 watchdog_task); 4781 struct net_device *netdev = adapter->netdev; 4782 struct e1000_mac_info *mac = &adapter->hw.mac; 4783 struct e1000_phy_info *phy = &adapter->hw.phy; 4784 struct e1000_ring *tx_ring = adapter->tx_ring; 4785 struct e1000_hw *hw = &adapter->hw; 4786 u32 link, tctl; 4787 4788 if (test_bit(__E1000_DOWN, &adapter->state)) 4789 return; 4790 4791 link = e1000e_has_link(adapter); 4792 if ((netif_carrier_ok(netdev)) && link) { 4793 /* Cancel scheduled suspend requests. */ 4794 pm_runtime_resume(netdev->dev.parent); 4795 4796 e1000e_enable_receives(adapter); 4797 goto link_up; 4798 } 4799 4800 if ((e1000e_enable_tx_pkt_filtering(hw)) && 4801 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)) 4802 e1000_update_mng_vlan(adapter); 4803 4804 if (link) { 4805 if (!netif_carrier_ok(netdev)) { 4806 bool txb2b = true; 4807 4808 /* Cancel scheduled suspend requests. */ 4809 pm_runtime_resume(netdev->dev.parent); 4810 4811 /* update snapshot of PHY registers on LSC */ 4812 e1000_phy_read_status(adapter); 4813 mac->ops.get_link_up_info(&adapter->hw, 4814 &adapter->link_speed, 4815 &adapter->link_duplex); 4816 e1000_print_link_info(adapter); 4817 4818 /* check if SmartSpeed worked */ 4819 e1000e_check_downshift(hw); 4820 if (phy->speed_downgraded) 4821 netdev_warn(netdev, 4822 "Link Speed was downgraded by SmartSpeed\n"); 4823 4824 /* On supported PHYs, check for duplex mismatch only 4825 * if link has autonegotiated at 10/100 half 4826 */ 4827 if ((hw->phy.type == e1000_phy_igp_3 || 4828 hw->phy.type == e1000_phy_bm) && 4829 (hw->mac.autoneg == true) && 4830 (adapter->link_speed == SPEED_10 || 4831 adapter->link_speed == SPEED_100) && 4832 (adapter->link_duplex == HALF_DUPLEX)) { 4833 u16 autoneg_exp; 4834 4835 e1e_rphy(hw, MII_EXPANSION, &autoneg_exp); 4836 4837 if (!(autoneg_exp & EXPANSION_NWAY)) 4838 e_info("Autonegotiated half duplex but link partner cannot autoneg. Try forcing full duplex if link gets many collisions.\n"); 4839 } 4840 4841 /* adjust timeout factor according to speed/duplex */ 4842 adapter->tx_timeout_factor = 1; 4843 switch (adapter->link_speed) { 4844 case SPEED_10: 4845 txb2b = false; 4846 adapter->tx_timeout_factor = 16; 4847 break; 4848 case SPEED_100: 4849 txb2b = false; 4850 adapter->tx_timeout_factor = 10; 4851 break; 4852 } 4853 4854 /* workaround: re-program speed mode bit after 4855 * link-up event 4856 */ 4857 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) && 4858 !txb2b) { 4859 u32 tarc0; 4860 tarc0 = er32(TARC(0)); 4861 tarc0 &= ~SPEED_MODE_BIT; 4862 ew32(TARC(0), tarc0); 4863 } 4864 4865 /* disable TSO for pcie and 10/100 speeds, to avoid 4866 * some hardware issues 4867 */ 4868 if (!(adapter->flags & FLAG_TSO_FORCE)) { 4869 switch (adapter->link_speed) { 4870 case SPEED_10: 4871 case SPEED_100: 4872 e_info("10/100 speed: disabling TSO\n"); 4873 netdev->features &= ~NETIF_F_TSO; 4874 netdev->features &= ~NETIF_F_TSO6; 4875 break; 4876 case SPEED_1000: 4877 netdev->features |= NETIF_F_TSO; 4878 netdev->features |= NETIF_F_TSO6; 4879 break; 4880 default: 4881 /* oops */ 4882 break; 4883 } 4884 } 4885 4886 /* enable transmits in the hardware, need to do this 4887 * after setting TARC(0) 4888 */ 4889 tctl = er32(TCTL); 4890 tctl |= E1000_TCTL_EN; 4891 ew32(TCTL, tctl); 4892 4893 /* Perform any post-link-up configuration before 4894 * reporting link up. 4895 */ 4896 if (phy->ops.cfg_on_link_up) 4897 phy->ops.cfg_on_link_up(hw); 4898 4899 netif_carrier_on(netdev); 4900 4901 if (!test_bit(__E1000_DOWN, &adapter->state)) 4902 mod_timer(&adapter->phy_info_timer, 4903 round_jiffies(jiffies + 2 * HZ)); 4904 } 4905 } else { 4906 if (netif_carrier_ok(netdev)) { 4907 adapter->link_speed = 0; 4908 adapter->link_duplex = 0; 4909 /* Link status message must follow this format */ 4910 pr_info("%s NIC Link is Down\n", adapter->netdev->name); 4911 netif_carrier_off(netdev); 4912 if (!test_bit(__E1000_DOWN, &adapter->state)) 4913 mod_timer(&adapter->phy_info_timer, 4914 round_jiffies(jiffies + 2 * HZ)); 4915 4916 /* The link is lost so the controller stops DMA. 4917 * If there is queued Tx work that cannot be done 4918 * or if on an 8000ES2LAN which requires a Rx packet 4919 * buffer work-around on link down event, reset the 4920 * controller to flush the Tx/Rx packet buffers. 4921 * (Do the reset outside of interrupt context). 4922 */ 4923 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) || 4924 (e1000_desc_unused(tx_ring) + 1 < tx_ring->count)) 4925 adapter->flags |= FLAG_RESTART_NOW; 4926 else 4927 pm_schedule_suspend(netdev->dev.parent, 4928 LINK_TIMEOUT); 4929 } 4930 } 4931 4932 link_up: 4933 spin_lock(&adapter->stats64_lock); 4934 e1000e_update_stats(adapter); 4935 4936 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old; 4937 adapter->tpt_old = adapter->stats.tpt; 4938 mac->collision_delta = adapter->stats.colc - adapter->colc_old; 4939 adapter->colc_old = adapter->stats.colc; 4940 4941 adapter->gorc = adapter->stats.gorc - adapter->gorc_old; 4942 adapter->gorc_old = adapter->stats.gorc; 4943 adapter->gotc = adapter->stats.gotc - adapter->gotc_old; 4944 adapter->gotc_old = adapter->stats.gotc; 4945 spin_unlock(&adapter->stats64_lock); 4946 4947 if (adapter->flags & FLAG_RESTART_NOW) { 4948 schedule_work(&adapter->reset_task); 4949 /* return immediately since reset is imminent */ 4950 return; 4951 } 4952 4953 e1000e_update_adaptive(&adapter->hw); 4954 4955 /* Simple mode for Interrupt Throttle Rate (ITR) */ 4956 if (adapter->itr_setting == 4) { 4957 /* Symmetric Tx/Rx gets a reduced ITR=2000; 4958 * Total asymmetrical Tx or Rx gets ITR=8000; 4959 * everyone else is between 2000-8000. 4960 */ 4961 u32 goc = (adapter->gotc + adapter->gorc) / 10000; 4962 u32 dif = (adapter->gotc > adapter->gorc ? 4963 adapter->gotc - adapter->gorc : 4964 adapter->gorc - adapter->gotc) / 10000; 4965 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000; 4966 4967 e1000e_write_itr(adapter, itr); 4968 } 4969 4970 /* Cause software interrupt to ensure Rx ring is cleaned */ 4971 if (adapter->msix_entries) 4972 ew32(ICS, adapter->rx_ring->ims_val); 4973 else 4974 ew32(ICS, E1000_ICS_RXDMT0); 4975 4976 /* flush pending descriptors to memory before detecting Tx hang */ 4977 e1000e_flush_descriptors(adapter); 4978 4979 /* Force detection of hung controller every watchdog period */ 4980 adapter->detect_tx_hung = true; 4981 4982 /* With 82571 controllers, LAA may be overwritten due to controller 4983 * reset from the other port. Set the appropriate LAA in RAR[0] 4984 */ 4985 if (e1000e_get_laa_state_82571(hw)) 4986 hw->mac.ops.rar_set(hw, adapter->hw.mac.addr, 0); 4987 4988 if (adapter->flags2 & FLAG2_CHECK_PHY_HANG) 4989 e1000e_check_82574_phy_workaround(adapter); 4990 4991 /* Clear valid timestamp stuck in RXSTMPL/H due to a Rx error */ 4992 if (adapter->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE) { 4993 if ((adapter->flags2 & FLAG2_CHECK_RX_HWTSTAMP) && 4994 (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID)) { 4995 er32(RXSTMPH); 4996 adapter->rx_hwtstamp_cleared++; 4997 } else { 4998 adapter->flags2 |= FLAG2_CHECK_RX_HWTSTAMP; 4999 } 5000 } 5001 5002 /* Reset the timer */ 5003 if (!test_bit(__E1000_DOWN, &adapter->state)) 5004 mod_timer(&adapter->watchdog_timer, 5005 round_jiffies(jiffies + 2 * HZ)); 5006 } 5007 5008 #define E1000_TX_FLAGS_CSUM 0x00000001 5009 #define E1000_TX_FLAGS_VLAN 0x00000002 5010 #define E1000_TX_FLAGS_TSO 0x00000004 5011 #define E1000_TX_FLAGS_IPV4 0x00000008 5012 #define E1000_TX_FLAGS_NO_FCS 0x00000010 5013 #define E1000_TX_FLAGS_HWTSTAMP 0x00000020 5014 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000 5015 #define E1000_TX_FLAGS_VLAN_SHIFT 16 5016 5017 static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb) 5018 { 5019 struct e1000_context_desc *context_desc; 5020 struct e1000_buffer *buffer_info; 5021 unsigned int i; 5022 u32 cmd_length = 0; 5023 u16 ipcse = 0, mss; 5024 u8 ipcss, ipcso, tucss, tucso, hdr_len; 5025 5026 if (!skb_is_gso(skb)) 5027 return 0; 5028 5029 if (skb_header_cloned(skb)) { 5030 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); 5031 5032 if (err) 5033 return err; 5034 } 5035 5036 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 5037 mss = skb_shinfo(skb)->gso_size; 5038 if (skb->protocol == htons(ETH_P_IP)) { 5039 struct iphdr *iph = ip_hdr(skb); 5040 iph->tot_len = 0; 5041 iph->check = 0; 5042 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, 5043 0, IPPROTO_TCP, 0); 5044 cmd_length = E1000_TXD_CMD_IP; 5045 ipcse = skb_transport_offset(skb) - 1; 5046 } else if (skb_is_gso_v6(skb)) { 5047 ipv6_hdr(skb)->payload_len = 0; 5048 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, 5049 &ipv6_hdr(skb)->daddr, 5050 0, IPPROTO_TCP, 0); 5051 ipcse = 0; 5052 } 5053 ipcss = skb_network_offset(skb); 5054 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data; 5055 tucss = skb_transport_offset(skb); 5056 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data; 5057 5058 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE | 5059 E1000_TXD_CMD_TCP | (skb->len - (hdr_len))); 5060 5061 i = tx_ring->next_to_use; 5062 context_desc = E1000_CONTEXT_DESC(*tx_ring, i); 5063 buffer_info = &tx_ring->buffer_info[i]; 5064 5065 context_desc->lower_setup.ip_fields.ipcss = ipcss; 5066 context_desc->lower_setup.ip_fields.ipcso = ipcso; 5067 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse); 5068 context_desc->upper_setup.tcp_fields.tucss = tucss; 5069 context_desc->upper_setup.tcp_fields.tucso = tucso; 5070 context_desc->upper_setup.tcp_fields.tucse = 0; 5071 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss); 5072 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len; 5073 context_desc->cmd_and_length = cpu_to_le32(cmd_length); 5074 5075 buffer_info->time_stamp = jiffies; 5076 buffer_info->next_to_watch = i; 5077 5078 i++; 5079 if (i == tx_ring->count) 5080 i = 0; 5081 tx_ring->next_to_use = i; 5082 5083 return 1; 5084 } 5085 5086 static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb) 5087 { 5088 struct e1000_adapter *adapter = tx_ring->adapter; 5089 struct e1000_context_desc *context_desc; 5090 struct e1000_buffer *buffer_info; 5091 unsigned int i; 5092 u8 css; 5093 u32 cmd_len = E1000_TXD_CMD_DEXT; 5094 __be16 protocol; 5095 5096 if (skb->ip_summed != CHECKSUM_PARTIAL) 5097 return 0; 5098 5099 if (skb->protocol == cpu_to_be16(ETH_P_8021Q)) 5100 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto; 5101 else 5102 protocol = skb->protocol; 5103 5104 switch (protocol) { 5105 case cpu_to_be16(ETH_P_IP): 5106 if (ip_hdr(skb)->protocol == IPPROTO_TCP) 5107 cmd_len |= E1000_TXD_CMD_TCP; 5108 break; 5109 case cpu_to_be16(ETH_P_IPV6): 5110 /* XXX not handling all IPV6 headers */ 5111 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP) 5112 cmd_len |= E1000_TXD_CMD_TCP; 5113 break; 5114 default: 5115 if (unlikely(net_ratelimit())) 5116 e_warn("checksum_partial proto=%x!\n", 5117 be16_to_cpu(protocol)); 5118 break; 5119 } 5120 5121 css = skb_checksum_start_offset(skb); 5122 5123 i = tx_ring->next_to_use; 5124 buffer_info = &tx_ring->buffer_info[i]; 5125 context_desc = E1000_CONTEXT_DESC(*tx_ring, i); 5126 5127 context_desc->lower_setup.ip_config = 0; 5128 context_desc->upper_setup.tcp_fields.tucss = css; 5129 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum_offset; 5130 context_desc->upper_setup.tcp_fields.tucse = 0; 5131 context_desc->tcp_seg_setup.data = 0; 5132 context_desc->cmd_and_length = cpu_to_le32(cmd_len); 5133 5134 buffer_info->time_stamp = jiffies; 5135 buffer_info->next_to_watch = i; 5136 5137 i++; 5138 if (i == tx_ring->count) 5139 i = 0; 5140 tx_ring->next_to_use = i; 5141 5142 return 1; 5143 } 5144 5145 static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb, 5146 unsigned int first, unsigned int max_per_txd, 5147 unsigned int nr_frags) 5148 { 5149 struct e1000_adapter *adapter = tx_ring->adapter; 5150 struct pci_dev *pdev = adapter->pdev; 5151 struct e1000_buffer *buffer_info; 5152 unsigned int len = skb_headlen(skb); 5153 unsigned int offset = 0, size, count = 0, i; 5154 unsigned int f, bytecount, segs; 5155 5156 i = tx_ring->next_to_use; 5157 5158 while (len) { 5159 buffer_info = &tx_ring->buffer_info[i]; 5160 size = min(len, max_per_txd); 5161 5162 buffer_info->length = size; 5163 buffer_info->time_stamp = jiffies; 5164 buffer_info->next_to_watch = i; 5165 buffer_info->dma = dma_map_single(&pdev->dev, 5166 skb->data + offset, 5167 size, DMA_TO_DEVICE); 5168 buffer_info->mapped_as_page = false; 5169 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) 5170 goto dma_error; 5171 5172 len -= size; 5173 offset += size; 5174 count++; 5175 5176 if (len) { 5177 i++; 5178 if (i == tx_ring->count) 5179 i = 0; 5180 } 5181 } 5182 5183 for (f = 0; f < nr_frags; f++) { 5184 const struct skb_frag_struct *frag; 5185 5186 frag = &skb_shinfo(skb)->frags[f]; 5187 len = skb_frag_size(frag); 5188 offset = 0; 5189 5190 while (len) { 5191 i++; 5192 if (i == tx_ring->count) 5193 i = 0; 5194 5195 buffer_info = &tx_ring->buffer_info[i]; 5196 size = min(len, max_per_txd); 5197 5198 buffer_info->length = size; 5199 buffer_info->time_stamp = jiffies; 5200 buffer_info->next_to_watch = i; 5201 buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag, 5202 offset, size, 5203 DMA_TO_DEVICE); 5204 buffer_info->mapped_as_page = true; 5205 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) 5206 goto dma_error; 5207 5208 len -= size; 5209 offset += size; 5210 count++; 5211 } 5212 } 5213 5214 segs = skb_shinfo(skb)->gso_segs ? : 1; 5215 /* multiply data chunks by size of headers */ 5216 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len; 5217 5218 tx_ring->buffer_info[i].skb = skb; 5219 tx_ring->buffer_info[i].segs = segs; 5220 tx_ring->buffer_info[i].bytecount = bytecount; 5221 tx_ring->buffer_info[first].next_to_watch = i; 5222 5223 return count; 5224 5225 dma_error: 5226 dev_err(&pdev->dev, "Tx DMA map failed\n"); 5227 buffer_info->dma = 0; 5228 if (count) 5229 count--; 5230 5231 while (count--) { 5232 if (i == 0) 5233 i += tx_ring->count; 5234 i--; 5235 buffer_info = &tx_ring->buffer_info[i]; 5236 e1000_put_txbuf(tx_ring, buffer_info); 5237 } 5238 5239 return 0; 5240 } 5241 5242 static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count) 5243 { 5244 struct e1000_adapter *adapter = tx_ring->adapter; 5245 struct e1000_tx_desc *tx_desc = NULL; 5246 struct e1000_buffer *buffer_info; 5247 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS; 5248 unsigned int i; 5249 5250 if (tx_flags & E1000_TX_FLAGS_TSO) { 5251 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D | 5252 E1000_TXD_CMD_TSE; 5253 txd_upper |= E1000_TXD_POPTS_TXSM << 8; 5254 5255 if (tx_flags & E1000_TX_FLAGS_IPV4) 5256 txd_upper |= E1000_TXD_POPTS_IXSM << 8; 5257 } 5258 5259 if (tx_flags & E1000_TX_FLAGS_CSUM) { 5260 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; 5261 txd_upper |= E1000_TXD_POPTS_TXSM << 8; 5262 } 5263 5264 if (tx_flags & E1000_TX_FLAGS_VLAN) { 5265 txd_lower |= E1000_TXD_CMD_VLE; 5266 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK); 5267 } 5268 5269 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS)) 5270 txd_lower &= ~(E1000_TXD_CMD_IFCS); 5271 5272 if (unlikely(tx_flags & E1000_TX_FLAGS_HWTSTAMP)) { 5273 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; 5274 txd_upper |= E1000_TXD_EXTCMD_TSTAMP; 5275 } 5276 5277 i = tx_ring->next_to_use; 5278 5279 do { 5280 buffer_info = &tx_ring->buffer_info[i]; 5281 tx_desc = E1000_TX_DESC(*tx_ring, i); 5282 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); 5283 tx_desc->lower.data = cpu_to_le32(txd_lower | 5284 buffer_info->length); 5285 tx_desc->upper.data = cpu_to_le32(txd_upper); 5286 5287 i++; 5288 if (i == tx_ring->count) 5289 i = 0; 5290 } while (--count > 0); 5291 5292 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd); 5293 5294 /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */ 5295 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS)) 5296 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS)); 5297 5298 /* Force memory writes to complete before letting h/w 5299 * know there are new descriptors to fetch. (Only 5300 * applicable for weak-ordered memory model archs, 5301 * such as IA-64). 5302 */ 5303 wmb(); 5304 5305 tx_ring->next_to_use = i; 5306 5307 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) 5308 e1000e_update_tdt_wa(tx_ring, i); 5309 else 5310 writel(i, tx_ring->tail); 5311 5312 /* we need this if more than one processor can write to our tail 5313 * at a time, it synchronizes IO on IA64/Altix systems 5314 */ 5315 mmiowb(); 5316 } 5317 5318 #define MINIMUM_DHCP_PACKET_SIZE 282 5319 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter, 5320 struct sk_buff *skb) 5321 { 5322 struct e1000_hw *hw = &adapter->hw; 5323 u16 length, offset; 5324 5325 if (vlan_tx_tag_present(skb) && 5326 !((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) && 5327 (adapter->hw.mng_cookie.status & 5328 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))) 5329 return 0; 5330 5331 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE) 5332 return 0; 5333 5334 if (((struct ethhdr *)skb->data)->h_proto != htons(ETH_P_IP)) 5335 return 0; 5336 5337 { 5338 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data + 14); 5339 struct udphdr *udp; 5340 5341 if (ip->protocol != IPPROTO_UDP) 5342 return 0; 5343 5344 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2)); 5345 if (ntohs(udp->dest) != 67) 5346 return 0; 5347 5348 offset = (u8 *)udp + 8 - skb->data; 5349 length = skb->len - offset; 5350 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length); 5351 } 5352 5353 return 0; 5354 } 5355 5356 static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size) 5357 { 5358 struct e1000_adapter *adapter = tx_ring->adapter; 5359 5360 netif_stop_queue(adapter->netdev); 5361 /* Herbert's original patch had: 5362 * smp_mb__after_netif_stop_queue(); 5363 * but since that doesn't exist yet, just open code it. 5364 */ 5365 smp_mb(); 5366 5367 /* We need to check again in a case another CPU has just 5368 * made room available. 5369 */ 5370 if (e1000_desc_unused(tx_ring) < size) 5371 return -EBUSY; 5372 5373 /* A reprieve! */ 5374 netif_start_queue(adapter->netdev); 5375 ++adapter->restart_queue; 5376 return 0; 5377 } 5378 5379 static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size) 5380 { 5381 BUG_ON(size > tx_ring->count); 5382 5383 if (e1000_desc_unused(tx_ring) >= size) 5384 return 0; 5385 return __e1000_maybe_stop_tx(tx_ring, size); 5386 } 5387 5388 static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb, 5389 struct net_device *netdev) 5390 { 5391 struct e1000_adapter *adapter = netdev_priv(netdev); 5392 struct e1000_ring *tx_ring = adapter->tx_ring; 5393 unsigned int first; 5394 unsigned int tx_flags = 0; 5395 unsigned int len = skb_headlen(skb); 5396 unsigned int nr_frags; 5397 unsigned int mss; 5398 int count = 0; 5399 int tso; 5400 unsigned int f; 5401 5402 if (test_bit(__E1000_DOWN, &adapter->state)) { 5403 dev_kfree_skb_any(skb); 5404 return NETDEV_TX_OK; 5405 } 5406 5407 if (skb->len <= 0) { 5408 dev_kfree_skb_any(skb); 5409 return NETDEV_TX_OK; 5410 } 5411 5412 /* The minimum packet size with TCTL.PSP set is 17 bytes so 5413 * pad skb in order to meet this minimum size requirement 5414 */ 5415 if (unlikely(skb->len < 17)) { 5416 if (skb_pad(skb, 17 - skb->len)) 5417 return NETDEV_TX_OK; 5418 skb->len = 17; 5419 skb_set_tail_pointer(skb, 17); 5420 } 5421 5422 mss = skb_shinfo(skb)->gso_size; 5423 if (mss) { 5424 u8 hdr_len; 5425 5426 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data 5427 * points to just header, pull a few bytes of payload from 5428 * frags into skb->data 5429 */ 5430 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 5431 /* we do this workaround for ES2LAN, but it is un-necessary, 5432 * avoiding it could save a lot of cycles 5433 */ 5434 if (skb->data_len && (hdr_len == len)) { 5435 unsigned int pull_size; 5436 5437 pull_size = min_t(unsigned int, 4, skb->data_len); 5438 if (!__pskb_pull_tail(skb, pull_size)) { 5439 e_err("__pskb_pull_tail failed.\n"); 5440 dev_kfree_skb_any(skb); 5441 return NETDEV_TX_OK; 5442 } 5443 len = skb_headlen(skb); 5444 } 5445 } 5446 5447 /* reserve a descriptor for the offload context */ 5448 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL)) 5449 count++; 5450 count++; 5451 5452 count += DIV_ROUND_UP(len, adapter->tx_fifo_limit); 5453 5454 nr_frags = skb_shinfo(skb)->nr_frags; 5455 for (f = 0; f < nr_frags; f++) 5456 count += DIV_ROUND_UP(skb_frag_size(&skb_shinfo(skb)->frags[f]), 5457 adapter->tx_fifo_limit); 5458 5459 if (adapter->hw.mac.tx_pkt_filtering) 5460 e1000_transfer_dhcp_info(adapter, skb); 5461 5462 /* need: count + 2 desc gap to keep tail from touching 5463 * head, otherwise try next time 5464 */ 5465 if (e1000_maybe_stop_tx(tx_ring, count + 2)) 5466 return NETDEV_TX_BUSY; 5467 5468 if (vlan_tx_tag_present(skb)) { 5469 tx_flags |= E1000_TX_FLAGS_VLAN; 5470 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT); 5471 } 5472 5473 first = tx_ring->next_to_use; 5474 5475 tso = e1000_tso(tx_ring, skb); 5476 if (tso < 0) { 5477 dev_kfree_skb_any(skb); 5478 return NETDEV_TX_OK; 5479 } 5480 5481 if (tso) 5482 tx_flags |= E1000_TX_FLAGS_TSO; 5483 else if (e1000_tx_csum(tx_ring, skb)) 5484 tx_flags |= E1000_TX_FLAGS_CSUM; 5485 5486 /* Old method was to assume IPv4 packet by default if TSO was enabled. 5487 * 82571 hardware supports TSO capabilities for IPv6 as well... 5488 * no longer assume, we must. 5489 */ 5490 if (skb->protocol == htons(ETH_P_IP)) 5491 tx_flags |= E1000_TX_FLAGS_IPV4; 5492 5493 if (unlikely(skb->no_fcs)) 5494 tx_flags |= E1000_TX_FLAGS_NO_FCS; 5495 5496 /* if count is 0 then mapping error has occurred */ 5497 count = e1000_tx_map(tx_ring, skb, first, adapter->tx_fifo_limit, 5498 nr_frags); 5499 if (count) { 5500 if (unlikely((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) && 5501 !adapter->tx_hwtstamp_skb)) { 5502 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; 5503 tx_flags |= E1000_TX_FLAGS_HWTSTAMP; 5504 adapter->tx_hwtstamp_skb = skb_get(skb); 5505 schedule_work(&adapter->tx_hwtstamp_work); 5506 } else { 5507 skb_tx_timestamp(skb); 5508 } 5509 5510 netdev_sent_queue(netdev, skb->len); 5511 e1000_tx_queue(tx_ring, tx_flags, count); 5512 /* Make sure there is space in the ring for the next send. */ 5513 e1000_maybe_stop_tx(tx_ring, 5514 (MAX_SKB_FRAGS * 5515 DIV_ROUND_UP(PAGE_SIZE, 5516 adapter->tx_fifo_limit) + 2)); 5517 } else { 5518 dev_kfree_skb_any(skb); 5519 tx_ring->buffer_info[first].time_stamp = 0; 5520 tx_ring->next_to_use = first; 5521 } 5522 5523 return NETDEV_TX_OK; 5524 } 5525 5526 /** 5527 * e1000_tx_timeout - Respond to a Tx Hang 5528 * @netdev: network interface device structure 5529 **/ 5530 static void e1000_tx_timeout(struct net_device *netdev) 5531 { 5532 struct e1000_adapter *adapter = netdev_priv(netdev); 5533 5534 /* Do the reset outside of interrupt context */ 5535 adapter->tx_timeout_count++; 5536 schedule_work(&adapter->reset_task); 5537 } 5538 5539 static void e1000_reset_task(struct work_struct *work) 5540 { 5541 struct e1000_adapter *adapter; 5542 adapter = container_of(work, struct e1000_adapter, reset_task); 5543 5544 /* don't run the task if already down */ 5545 if (test_bit(__E1000_DOWN, &adapter->state)) 5546 return; 5547 5548 if (!(adapter->flags & FLAG_RESTART_NOW)) { 5549 e1000e_dump(adapter); 5550 e_err("Reset adapter unexpectedly\n"); 5551 } 5552 e1000e_reinit_locked(adapter); 5553 } 5554 5555 /** 5556 * e1000_get_stats64 - Get System Network Statistics 5557 * @netdev: network interface device structure 5558 * @stats: rtnl_link_stats64 pointer 5559 * 5560 * Returns the address of the device statistics structure. 5561 **/ 5562 struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev, 5563 struct rtnl_link_stats64 *stats) 5564 { 5565 struct e1000_adapter *adapter = netdev_priv(netdev); 5566 5567 memset(stats, 0, sizeof(struct rtnl_link_stats64)); 5568 spin_lock(&adapter->stats64_lock); 5569 e1000e_update_stats(adapter); 5570 /* Fill out the OS statistics structure */ 5571 stats->rx_bytes = adapter->stats.gorc; 5572 stats->rx_packets = adapter->stats.gprc; 5573 stats->tx_bytes = adapter->stats.gotc; 5574 stats->tx_packets = adapter->stats.gptc; 5575 stats->multicast = adapter->stats.mprc; 5576 stats->collisions = adapter->stats.colc; 5577 5578 /* Rx Errors */ 5579 5580 /* RLEC on some newer hardware can be incorrect so build 5581 * our own version based on RUC and ROC 5582 */ 5583 stats->rx_errors = adapter->stats.rxerrc + 5584 adapter->stats.crcerrs + adapter->stats.algnerrc + 5585 adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr; 5586 stats->rx_length_errors = adapter->stats.ruc + adapter->stats.roc; 5587 stats->rx_crc_errors = adapter->stats.crcerrs; 5588 stats->rx_frame_errors = adapter->stats.algnerrc; 5589 stats->rx_missed_errors = adapter->stats.mpc; 5590 5591 /* Tx Errors */ 5592 stats->tx_errors = adapter->stats.ecol + adapter->stats.latecol; 5593 stats->tx_aborted_errors = adapter->stats.ecol; 5594 stats->tx_window_errors = adapter->stats.latecol; 5595 stats->tx_carrier_errors = adapter->stats.tncrs; 5596 5597 /* Tx Dropped needs to be maintained elsewhere */ 5598 5599 spin_unlock(&adapter->stats64_lock); 5600 return stats; 5601 } 5602 5603 /** 5604 * e1000_change_mtu - Change the Maximum Transfer Unit 5605 * @netdev: network interface device structure 5606 * @new_mtu: new value for maximum frame size 5607 * 5608 * Returns 0 on success, negative on failure 5609 **/ 5610 static int e1000_change_mtu(struct net_device *netdev, int new_mtu) 5611 { 5612 struct e1000_adapter *adapter = netdev_priv(netdev); 5613 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN; 5614 5615 /* Jumbo frame support */ 5616 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) && 5617 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) { 5618 e_err("Jumbo Frames not supported.\n"); 5619 return -EINVAL; 5620 } 5621 5622 /* Supported frame sizes */ 5623 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) || 5624 (max_frame > adapter->max_hw_frame_size)) { 5625 e_err("Unsupported MTU setting\n"); 5626 return -EINVAL; 5627 } 5628 5629 /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */ 5630 if ((adapter->hw.mac.type >= e1000_pch2lan) && 5631 !(adapter->flags2 & FLAG2_CRC_STRIPPING) && 5632 (new_mtu > ETH_DATA_LEN)) { 5633 e_err("Jumbo Frames not supported on this device when CRC stripping is disabled.\n"); 5634 return -EINVAL; 5635 } 5636 5637 while (test_and_set_bit(__E1000_RESETTING, &adapter->state)) 5638 usleep_range(1000, 2000); 5639 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */ 5640 adapter->max_frame_size = max_frame; 5641 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu); 5642 netdev->mtu = new_mtu; 5643 if (netif_running(netdev)) 5644 e1000e_down(adapter); 5645 5646 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN 5647 * means we reserve 2 more, this pushes us to allocate from the next 5648 * larger slab size. 5649 * i.e. RXBUFFER_2048 --> size-4096 slab 5650 * However with the new *_jumbo_rx* routines, jumbo receives will use 5651 * fragmented skbs 5652 */ 5653 5654 if (max_frame <= 2048) 5655 adapter->rx_buffer_len = 2048; 5656 else 5657 adapter->rx_buffer_len = 4096; 5658 5659 /* adjust allocation if LPE protects us, and we aren't using SBP */ 5660 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) || 5661 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN)) 5662 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN 5663 + ETH_FCS_LEN; 5664 5665 if (netif_running(netdev)) 5666 e1000e_up(adapter); 5667 else 5668 e1000e_reset(adapter); 5669 5670 clear_bit(__E1000_RESETTING, &adapter->state); 5671 5672 return 0; 5673 } 5674 5675 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, 5676 int cmd) 5677 { 5678 struct e1000_adapter *adapter = netdev_priv(netdev); 5679 struct mii_ioctl_data *data = if_mii(ifr); 5680 5681 if (adapter->hw.phy.media_type != e1000_media_type_copper) 5682 return -EOPNOTSUPP; 5683 5684 switch (cmd) { 5685 case SIOCGMIIPHY: 5686 data->phy_id = adapter->hw.phy.addr; 5687 break; 5688 case SIOCGMIIREG: 5689 e1000_phy_read_status(adapter); 5690 5691 switch (data->reg_num & 0x1F) { 5692 case MII_BMCR: 5693 data->val_out = adapter->phy_regs.bmcr; 5694 break; 5695 case MII_BMSR: 5696 data->val_out = adapter->phy_regs.bmsr; 5697 break; 5698 case MII_PHYSID1: 5699 data->val_out = (adapter->hw.phy.id >> 16); 5700 break; 5701 case MII_PHYSID2: 5702 data->val_out = (adapter->hw.phy.id & 0xFFFF); 5703 break; 5704 case MII_ADVERTISE: 5705 data->val_out = adapter->phy_regs.advertise; 5706 break; 5707 case MII_LPA: 5708 data->val_out = adapter->phy_regs.lpa; 5709 break; 5710 case MII_EXPANSION: 5711 data->val_out = adapter->phy_regs.expansion; 5712 break; 5713 case MII_CTRL1000: 5714 data->val_out = adapter->phy_regs.ctrl1000; 5715 break; 5716 case MII_STAT1000: 5717 data->val_out = adapter->phy_regs.stat1000; 5718 break; 5719 case MII_ESTATUS: 5720 data->val_out = adapter->phy_regs.estatus; 5721 break; 5722 default: 5723 return -EIO; 5724 } 5725 break; 5726 case SIOCSMIIREG: 5727 default: 5728 return -EOPNOTSUPP; 5729 } 5730 return 0; 5731 } 5732 5733 /** 5734 * e1000e_hwtstamp_ioctl - control hardware time stamping 5735 * @netdev: network interface device structure 5736 * @ifreq: interface request 5737 * 5738 * Outgoing time stamping can be enabled and disabled. Play nice and 5739 * disable it when requested, although it shouldn't cause any overhead 5740 * when no packet needs it. At most one packet in the queue may be 5741 * marked for time stamping, otherwise it would be impossible to tell 5742 * for sure to which packet the hardware time stamp belongs. 5743 * 5744 * Incoming time stamping has to be configured via the hardware filters. 5745 * Not all combinations are supported, in particular event type has to be 5746 * specified. Matching the kind of event packet is not supported, with the 5747 * exception of "all V2 events regardless of level 2 or 4". 5748 **/ 5749 static int e1000e_hwtstamp_ioctl(struct net_device *netdev, struct ifreq *ifr) 5750 { 5751 struct e1000_adapter *adapter = netdev_priv(netdev); 5752 struct hwtstamp_config config; 5753 int ret_val; 5754 5755 if (copy_from_user(&config, ifr->ifr_data, sizeof(config))) 5756 return -EFAULT; 5757 5758 adapter->hwtstamp_config = config; 5759 5760 ret_val = e1000e_config_hwtstamp(adapter); 5761 if (ret_val) 5762 return ret_val; 5763 5764 config = adapter->hwtstamp_config; 5765 5766 switch (config.rx_filter) { 5767 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: 5768 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: 5769 case HWTSTAMP_FILTER_PTP_V2_SYNC: 5770 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: 5771 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: 5772 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: 5773 /* With V2 type filters which specify a Sync or Delay Request, 5774 * Path Delay Request/Response messages are also time stamped 5775 * by hardware so notify the caller the requested packets plus 5776 * some others are time stamped. 5777 */ 5778 config.rx_filter = HWTSTAMP_FILTER_SOME; 5779 break; 5780 default: 5781 break; 5782 } 5783 5784 return copy_to_user(ifr->ifr_data, &config, 5785 sizeof(config)) ? -EFAULT : 0; 5786 } 5787 5788 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 5789 { 5790 switch (cmd) { 5791 case SIOCGMIIPHY: 5792 case SIOCGMIIREG: 5793 case SIOCSMIIREG: 5794 return e1000_mii_ioctl(netdev, ifr, cmd); 5795 case SIOCSHWTSTAMP: 5796 return e1000e_hwtstamp_ioctl(netdev, ifr); 5797 default: 5798 return -EOPNOTSUPP; 5799 } 5800 } 5801 5802 static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc) 5803 { 5804 struct e1000_hw *hw = &adapter->hw; 5805 u32 i, mac_reg; 5806 u16 phy_reg, wuc_enable; 5807 int retval; 5808 5809 /* copy MAC RARs to PHY RARs */ 5810 e1000_copy_rx_addrs_to_phy_ich8lan(hw); 5811 5812 retval = hw->phy.ops.acquire(hw); 5813 if (retval) { 5814 e_err("Could not acquire PHY\n"); 5815 return retval; 5816 } 5817 5818 /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */ 5819 retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable); 5820 if (retval) 5821 goto release; 5822 5823 /* copy MAC MTA to PHY MTA - only needed for pchlan */ 5824 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) { 5825 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i); 5826 hw->phy.ops.write_reg_page(hw, BM_MTA(i), 5827 (u16)(mac_reg & 0xFFFF)); 5828 hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1, 5829 (u16)((mac_reg >> 16) & 0xFFFF)); 5830 } 5831 5832 /* configure PHY Rx Control register */ 5833 hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg); 5834 mac_reg = er32(RCTL); 5835 if (mac_reg & E1000_RCTL_UPE) 5836 phy_reg |= BM_RCTL_UPE; 5837 if (mac_reg & E1000_RCTL_MPE) 5838 phy_reg |= BM_RCTL_MPE; 5839 phy_reg &= ~(BM_RCTL_MO_MASK); 5840 if (mac_reg & E1000_RCTL_MO_3) 5841 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT) 5842 << BM_RCTL_MO_SHIFT); 5843 if (mac_reg & E1000_RCTL_BAM) 5844 phy_reg |= BM_RCTL_BAM; 5845 if (mac_reg & E1000_RCTL_PMCF) 5846 phy_reg |= BM_RCTL_PMCF; 5847 mac_reg = er32(CTRL); 5848 if (mac_reg & E1000_CTRL_RFCE) 5849 phy_reg |= BM_RCTL_RFCE; 5850 hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg); 5851 5852 /* enable PHY wakeup in MAC register */ 5853 ew32(WUFC, wufc); 5854 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN); 5855 5856 /* configure and enable PHY wakeup in PHY registers */ 5857 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc); 5858 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, E1000_WUC_PME_EN); 5859 5860 /* activate PHY wakeup */ 5861 wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT; 5862 retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable); 5863 if (retval) 5864 e_err("Could not set PHY Host Wakeup bit\n"); 5865 release: 5866 hw->phy.ops.release(hw); 5867 5868 return retval; 5869 } 5870 5871 static int __e1000_shutdown(struct pci_dev *pdev, bool runtime) 5872 { 5873 struct net_device *netdev = pci_get_drvdata(pdev); 5874 struct e1000_adapter *adapter = netdev_priv(netdev); 5875 struct e1000_hw *hw = &adapter->hw; 5876 u32 ctrl, ctrl_ext, rctl, status; 5877 /* Runtime suspend should only enable wakeup for link changes */ 5878 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol; 5879 int retval = 0; 5880 5881 netif_device_detach(netdev); 5882 5883 if (netif_running(netdev)) { 5884 int count = E1000_CHECK_RESET_COUNT; 5885 5886 while (test_bit(__E1000_RESETTING, &adapter->state) && count--) 5887 usleep_range(10000, 20000); 5888 5889 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state)); 5890 e1000e_down(adapter); 5891 e1000_free_irq(adapter); 5892 } 5893 e1000e_reset_interrupt_capability(adapter); 5894 5895 status = er32(STATUS); 5896 if (status & E1000_STATUS_LU) 5897 wufc &= ~E1000_WUFC_LNKC; 5898 5899 if (wufc) { 5900 e1000_setup_rctl(adapter); 5901 e1000e_set_rx_mode(netdev); 5902 5903 /* turn on all-multi mode if wake on multicast is enabled */ 5904 if (wufc & E1000_WUFC_MC) { 5905 rctl = er32(RCTL); 5906 rctl |= E1000_RCTL_MPE; 5907 ew32(RCTL, rctl); 5908 } 5909 5910 ctrl = er32(CTRL); 5911 ctrl |= E1000_CTRL_ADVD3WUC; 5912 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP)) 5913 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT; 5914 ew32(CTRL, ctrl); 5915 5916 if (adapter->hw.phy.media_type == e1000_media_type_fiber || 5917 adapter->hw.phy.media_type == 5918 e1000_media_type_internal_serdes) { 5919 /* keep the laser running in D3 */ 5920 ctrl_ext = er32(CTRL_EXT); 5921 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA; 5922 ew32(CTRL_EXT, ctrl_ext); 5923 } 5924 5925 if (adapter->flags & FLAG_IS_ICH) 5926 e1000_suspend_workarounds_ich8lan(&adapter->hw); 5927 5928 /* Allow time for pending master requests to run */ 5929 e1000e_disable_pcie_master(&adapter->hw); 5930 5931 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) { 5932 /* enable wakeup by the PHY */ 5933 retval = e1000_init_phy_wakeup(adapter, wufc); 5934 if (retval) 5935 return retval; 5936 } else { 5937 /* enable wakeup by the MAC */ 5938 ew32(WUFC, wufc); 5939 ew32(WUC, E1000_WUC_PME_EN); 5940 } 5941 } else { 5942 ew32(WUC, 0); 5943 ew32(WUFC, 0); 5944 } 5945 5946 if (adapter->hw.phy.type == e1000_phy_igp_3) 5947 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw); 5948 5949 /* Release control of h/w to f/w. If f/w is AMT enabled, this 5950 * would have already happened in close and is redundant. 5951 */ 5952 e1000e_release_hw_control(adapter); 5953 5954 /* The pci-e switch on some quad port adapters will report a 5955 * correctable error when the MAC transitions from D0 to D3. To 5956 * prevent this we need to mask off the correctable errors on the 5957 * downstream port of the pci-e switch. 5958 */ 5959 if (adapter->flags & FLAG_IS_QUAD_PORT) { 5960 struct pci_dev *us_dev = pdev->bus->self; 5961 u16 devctl; 5962 5963 pcie_capability_read_word(us_dev, PCI_EXP_DEVCTL, &devctl); 5964 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL, 5965 (devctl & ~PCI_EXP_DEVCTL_CERE)); 5966 5967 pci_save_state(pdev); 5968 pci_prepare_to_sleep(pdev); 5969 5970 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL, devctl); 5971 } 5972 5973 return 0; 5974 } 5975 5976 #ifdef CONFIG_PCIEASPM 5977 static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state) 5978 { 5979 pci_disable_link_state_locked(pdev, state); 5980 } 5981 #else 5982 static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state) 5983 { 5984 u16 aspm_ctl = 0; 5985 5986 if (state & PCIE_LINK_STATE_L0S) 5987 aspm_ctl |= PCI_EXP_LNKCTL_ASPM_L0S; 5988 if (state & PCIE_LINK_STATE_L1) 5989 aspm_ctl |= PCI_EXP_LNKCTL_ASPM_L1; 5990 5991 /* Both device and parent should have the same ASPM setting. 5992 * Disable ASPM in downstream component first and then upstream. 5993 */ 5994 pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, aspm_ctl); 5995 5996 if (pdev->bus->self) 5997 pcie_capability_clear_word(pdev->bus->self, PCI_EXP_LNKCTL, 5998 aspm_ctl); 5999 } 6000 #endif 6001 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state) 6002 { 6003 dev_info(&pdev->dev, "Disabling ASPM %s %s\n", 6004 (state & PCIE_LINK_STATE_L0S) ? "L0s" : "", 6005 (state & PCIE_LINK_STATE_L1) ? "L1" : ""); 6006 6007 __e1000e_disable_aspm(pdev, state); 6008 } 6009 6010 #ifdef CONFIG_PM 6011 static bool e1000e_pm_ready(struct e1000_adapter *adapter) 6012 { 6013 return !!adapter->tx_ring->buffer_info; 6014 } 6015 6016 static int __e1000_resume(struct pci_dev *pdev) 6017 { 6018 struct net_device *netdev = pci_get_drvdata(pdev); 6019 struct e1000_adapter *adapter = netdev_priv(netdev); 6020 struct e1000_hw *hw = &adapter->hw; 6021 u16 aspm_disable_flag = 0; 6022 u32 err; 6023 6024 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S) 6025 aspm_disable_flag = PCIE_LINK_STATE_L0S; 6026 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1) 6027 aspm_disable_flag |= PCIE_LINK_STATE_L1; 6028 if (aspm_disable_flag) 6029 e1000e_disable_aspm(pdev, aspm_disable_flag); 6030 6031 pci_set_master(pdev); 6032 6033 e1000e_set_interrupt_capability(adapter); 6034 if (netif_running(netdev)) { 6035 err = e1000_request_irq(adapter); 6036 if (err) 6037 return err; 6038 } 6039 6040 if (hw->mac.type >= e1000_pch2lan) 6041 e1000_resume_workarounds_pchlan(&adapter->hw); 6042 6043 e1000e_power_up_phy(adapter); 6044 6045 /* report the system wakeup cause from S3/S4 */ 6046 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) { 6047 u16 phy_data; 6048 6049 e1e_rphy(&adapter->hw, BM_WUS, &phy_data); 6050 if (phy_data) { 6051 e_info("PHY Wakeup cause - %s\n", 6052 phy_data & E1000_WUS_EX ? "Unicast Packet" : 6053 phy_data & E1000_WUS_MC ? "Multicast Packet" : 6054 phy_data & E1000_WUS_BC ? "Broadcast Packet" : 6055 phy_data & E1000_WUS_MAG ? "Magic Packet" : 6056 phy_data & E1000_WUS_LNKC ? 6057 "Link Status Change" : "other"); 6058 } 6059 e1e_wphy(&adapter->hw, BM_WUS, ~0); 6060 } else { 6061 u32 wus = er32(WUS); 6062 if (wus) { 6063 e_info("MAC Wakeup cause - %s\n", 6064 wus & E1000_WUS_EX ? "Unicast Packet" : 6065 wus & E1000_WUS_MC ? "Multicast Packet" : 6066 wus & E1000_WUS_BC ? "Broadcast Packet" : 6067 wus & E1000_WUS_MAG ? "Magic Packet" : 6068 wus & E1000_WUS_LNKC ? "Link Status Change" : 6069 "other"); 6070 } 6071 ew32(WUS, ~0); 6072 } 6073 6074 e1000e_reset(adapter); 6075 6076 e1000_init_manageability_pt(adapter); 6077 6078 if (netif_running(netdev)) 6079 e1000e_up(adapter); 6080 6081 netif_device_attach(netdev); 6082 6083 /* If the controller has AMT, do not set DRV_LOAD until the interface 6084 * is up. For all other cases, let the f/w know that the h/w is now 6085 * under the control of the driver. 6086 */ 6087 if (!(adapter->flags & FLAG_HAS_AMT)) 6088 e1000e_get_hw_control(adapter); 6089 6090 return 0; 6091 } 6092 6093 #ifdef CONFIG_PM_SLEEP 6094 static int e1000_suspend(struct device *dev) 6095 { 6096 struct pci_dev *pdev = to_pci_dev(dev); 6097 6098 return __e1000_shutdown(pdev, false); 6099 } 6100 6101 static int e1000_resume(struct device *dev) 6102 { 6103 struct pci_dev *pdev = to_pci_dev(dev); 6104 struct net_device *netdev = pci_get_drvdata(pdev); 6105 struct e1000_adapter *adapter = netdev_priv(netdev); 6106 6107 if (e1000e_pm_ready(adapter)) 6108 adapter->idle_check = true; 6109 6110 return __e1000_resume(pdev); 6111 } 6112 #endif /* CONFIG_PM_SLEEP */ 6113 6114 #ifdef CONFIG_PM_RUNTIME 6115 static int e1000_runtime_suspend(struct device *dev) 6116 { 6117 struct pci_dev *pdev = to_pci_dev(dev); 6118 struct net_device *netdev = pci_get_drvdata(pdev); 6119 struct e1000_adapter *adapter = netdev_priv(netdev); 6120 6121 if (!e1000e_pm_ready(adapter)) 6122 return 0; 6123 6124 return __e1000_shutdown(pdev, true); 6125 } 6126 6127 static int e1000_idle(struct device *dev) 6128 { 6129 struct pci_dev *pdev = to_pci_dev(dev); 6130 struct net_device *netdev = pci_get_drvdata(pdev); 6131 struct e1000_adapter *adapter = netdev_priv(netdev); 6132 6133 if (!e1000e_pm_ready(adapter)) 6134 return 0; 6135 6136 if (adapter->idle_check) { 6137 adapter->idle_check = false; 6138 if (!e1000e_has_link(adapter)) 6139 pm_schedule_suspend(dev, MSEC_PER_SEC); 6140 } 6141 6142 return -EBUSY; 6143 } 6144 6145 static int e1000_runtime_resume(struct device *dev) 6146 { 6147 struct pci_dev *pdev = to_pci_dev(dev); 6148 struct net_device *netdev = pci_get_drvdata(pdev); 6149 struct e1000_adapter *adapter = netdev_priv(netdev); 6150 6151 if (!e1000e_pm_ready(adapter)) 6152 return 0; 6153 6154 adapter->idle_check = !dev->power.runtime_auto; 6155 return __e1000_resume(pdev); 6156 } 6157 #endif /* CONFIG_PM_RUNTIME */ 6158 #endif /* CONFIG_PM */ 6159 6160 static void e1000_shutdown(struct pci_dev *pdev) 6161 { 6162 __e1000_shutdown(pdev, false); 6163 } 6164 6165 #ifdef CONFIG_NET_POLL_CONTROLLER 6166 6167 static irqreturn_t e1000_intr_msix(int __always_unused irq, void *data) 6168 { 6169 struct net_device *netdev = data; 6170 struct e1000_adapter *adapter = netdev_priv(netdev); 6171 6172 if (adapter->msix_entries) { 6173 int vector, msix_irq; 6174 6175 vector = 0; 6176 msix_irq = adapter->msix_entries[vector].vector; 6177 disable_irq(msix_irq); 6178 e1000_intr_msix_rx(msix_irq, netdev); 6179 enable_irq(msix_irq); 6180 6181 vector++; 6182 msix_irq = adapter->msix_entries[vector].vector; 6183 disable_irq(msix_irq); 6184 e1000_intr_msix_tx(msix_irq, netdev); 6185 enable_irq(msix_irq); 6186 6187 vector++; 6188 msix_irq = adapter->msix_entries[vector].vector; 6189 disable_irq(msix_irq); 6190 e1000_msix_other(msix_irq, netdev); 6191 enable_irq(msix_irq); 6192 } 6193 6194 return IRQ_HANDLED; 6195 } 6196 6197 /** 6198 * e1000_netpoll 6199 * @netdev: network interface device structure 6200 * 6201 * Polling 'interrupt' - used by things like netconsole to send skbs 6202 * without having to re-enable interrupts. It's not called while 6203 * the interrupt routine is executing. 6204 */ 6205 static void e1000_netpoll(struct net_device *netdev) 6206 { 6207 struct e1000_adapter *adapter = netdev_priv(netdev); 6208 6209 switch (adapter->int_mode) { 6210 case E1000E_INT_MODE_MSIX: 6211 e1000_intr_msix(adapter->pdev->irq, netdev); 6212 break; 6213 case E1000E_INT_MODE_MSI: 6214 disable_irq(adapter->pdev->irq); 6215 e1000_intr_msi(adapter->pdev->irq, netdev); 6216 enable_irq(adapter->pdev->irq); 6217 break; 6218 default: /* E1000E_INT_MODE_LEGACY */ 6219 disable_irq(adapter->pdev->irq); 6220 e1000_intr(adapter->pdev->irq, netdev); 6221 enable_irq(adapter->pdev->irq); 6222 break; 6223 } 6224 } 6225 #endif 6226 6227 /** 6228 * e1000_io_error_detected - called when PCI error is detected 6229 * @pdev: Pointer to PCI device 6230 * @state: The current pci connection state 6231 * 6232 * This function is called after a PCI bus error affecting 6233 * this device has been detected. 6234 */ 6235 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, 6236 pci_channel_state_t state) 6237 { 6238 struct net_device *netdev = pci_get_drvdata(pdev); 6239 struct e1000_adapter *adapter = netdev_priv(netdev); 6240 6241 netif_device_detach(netdev); 6242 6243 if (state == pci_channel_io_perm_failure) 6244 return PCI_ERS_RESULT_DISCONNECT; 6245 6246 if (netif_running(netdev)) 6247 e1000e_down(adapter); 6248 pci_disable_device(pdev); 6249 6250 /* Request a slot slot reset. */ 6251 return PCI_ERS_RESULT_NEED_RESET; 6252 } 6253 6254 /** 6255 * e1000_io_slot_reset - called after the pci bus has been reset. 6256 * @pdev: Pointer to PCI device 6257 * 6258 * Restart the card from scratch, as if from a cold-boot. Implementation 6259 * resembles the first-half of the e1000_resume routine. 6260 */ 6261 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev) 6262 { 6263 struct net_device *netdev = pci_get_drvdata(pdev); 6264 struct e1000_adapter *adapter = netdev_priv(netdev); 6265 struct e1000_hw *hw = &adapter->hw; 6266 u16 aspm_disable_flag = 0; 6267 int err; 6268 pci_ers_result_t result; 6269 6270 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S) 6271 aspm_disable_flag = PCIE_LINK_STATE_L0S; 6272 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1) 6273 aspm_disable_flag |= PCIE_LINK_STATE_L1; 6274 if (aspm_disable_flag) 6275 e1000e_disable_aspm(pdev, aspm_disable_flag); 6276 6277 err = pci_enable_device_mem(pdev); 6278 if (err) { 6279 dev_err(&pdev->dev, 6280 "Cannot re-enable PCI device after reset.\n"); 6281 result = PCI_ERS_RESULT_DISCONNECT; 6282 } else { 6283 pdev->state_saved = true; 6284 pci_restore_state(pdev); 6285 pci_set_master(pdev); 6286 6287 pci_enable_wake(pdev, PCI_D3hot, 0); 6288 pci_enable_wake(pdev, PCI_D3cold, 0); 6289 6290 e1000e_reset(adapter); 6291 ew32(WUS, ~0); 6292 result = PCI_ERS_RESULT_RECOVERED; 6293 } 6294 6295 pci_cleanup_aer_uncorrect_error_status(pdev); 6296 6297 return result; 6298 } 6299 6300 /** 6301 * e1000_io_resume - called when traffic can start flowing again. 6302 * @pdev: Pointer to PCI device 6303 * 6304 * This callback is called when the error recovery driver tells us that 6305 * its OK to resume normal operation. Implementation resembles the 6306 * second-half of the e1000_resume routine. 6307 */ 6308 static void e1000_io_resume(struct pci_dev *pdev) 6309 { 6310 struct net_device *netdev = pci_get_drvdata(pdev); 6311 struct e1000_adapter *adapter = netdev_priv(netdev); 6312 6313 e1000_init_manageability_pt(adapter); 6314 6315 if (netif_running(netdev)) { 6316 if (e1000e_up(adapter)) { 6317 dev_err(&pdev->dev, 6318 "can't bring device back up after reset\n"); 6319 return; 6320 } 6321 } 6322 6323 netif_device_attach(netdev); 6324 6325 /* If the controller has AMT, do not set DRV_LOAD until the interface 6326 * is up. For all other cases, let the f/w know that the h/w is now 6327 * under the control of the driver. 6328 */ 6329 if (!(adapter->flags & FLAG_HAS_AMT)) 6330 e1000e_get_hw_control(adapter); 6331 } 6332 6333 static void e1000_print_device_info(struct e1000_adapter *adapter) 6334 { 6335 struct e1000_hw *hw = &adapter->hw; 6336 struct net_device *netdev = adapter->netdev; 6337 u32 ret_val; 6338 u8 pba_str[E1000_PBANUM_LENGTH]; 6339 6340 /* print bus type/speed/width info */ 6341 e_info("(PCI Express:2.5GT/s:%s) %pM\n", 6342 /* bus width */ 6343 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" : 6344 "Width x1"), 6345 /* MAC address */ 6346 netdev->dev_addr); 6347 e_info("Intel(R) PRO/%s Network Connection\n", 6348 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000"); 6349 ret_val = e1000_read_pba_string_generic(hw, pba_str, 6350 E1000_PBANUM_LENGTH); 6351 if (ret_val) 6352 strlcpy((char *)pba_str, "Unknown", sizeof(pba_str)); 6353 e_info("MAC: %d, PHY: %d, PBA No: %s\n", 6354 hw->mac.type, hw->phy.type, pba_str); 6355 } 6356 6357 static void e1000_eeprom_checks(struct e1000_adapter *adapter) 6358 { 6359 struct e1000_hw *hw = &adapter->hw; 6360 int ret_val; 6361 u16 buf = 0; 6362 6363 if (hw->mac.type != e1000_82573) 6364 return; 6365 6366 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf); 6367 le16_to_cpus(&buf); 6368 if (!ret_val && (!(buf & (1 << 0)))) { 6369 /* Deep Smart Power Down (DSPD) */ 6370 dev_warn(&adapter->pdev->dev, 6371 "Warning: detected DSPD enabled in EEPROM\n"); 6372 } 6373 } 6374 6375 static int e1000_set_features(struct net_device *netdev, 6376 netdev_features_t features) 6377 { 6378 struct e1000_adapter *adapter = netdev_priv(netdev); 6379 netdev_features_t changed = features ^ netdev->features; 6380 6381 if (changed & (NETIF_F_TSO | NETIF_F_TSO6)) 6382 adapter->flags |= FLAG_TSO_FORCE; 6383 6384 if (!(changed & (NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_TX | 6385 NETIF_F_RXCSUM | NETIF_F_RXHASH | NETIF_F_RXFCS | 6386 NETIF_F_RXALL))) 6387 return 0; 6388 6389 if (changed & NETIF_F_RXFCS) { 6390 if (features & NETIF_F_RXFCS) { 6391 adapter->flags2 &= ~FLAG2_CRC_STRIPPING; 6392 } else { 6393 /* We need to take it back to defaults, which might mean 6394 * stripping is still disabled at the adapter level. 6395 */ 6396 if (adapter->flags2 & FLAG2_DFLT_CRC_STRIPPING) 6397 adapter->flags2 |= FLAG2_CRC_STRIPPING; 6398 else 6399 adapter->flags2 &= ~FLAG2_CRC_STRIPPING; 6400 } 6401 } 6402 6403 netdev->features = features; 6404 6405 if (netif_running(netdev)) 6406 e1000e_reinit_locked(adapter); 6407 else 6408 e1000e_reset(adapter); 6409 6410 return 0; 6411 } 6412 6413 static const struct net_device_ops e1000e_netdev_ops = { 6414 .ndo_open = e1000_open, 6415 .ndo_stop = e1000_close, 6416 .ndo_start_xmit = e1000_xmit_frame, 6417 .ndo_get_stats64 = e1000e_get_stats64, 6418 .ndo_set_rx_mode = e1000e_set_rx_mode, 6419 .ndo_set_mac_address = e1000_set_mac, 6420 .ndo_change_mtu = e1000_change_mtu, 6421 .ndo_do_ioctl = e1000_ioctl, 6422 .ndo_tx_timeout = e1000_tx_timeout, 6423 .ndo_validate_addr = eth_validate_addr, 6424 6425 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid, 6426 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid, 6427 #ifdef CONFIG_NET_POLL_CONTROLLER 6428 .ndo_poll_controller = e1000_netpoll, 6429 #endif 6430 .ndo_set_features = e1000_set_features, 6431 }; 6432 6433 /** 6434 * e1000_probe - Device Initialization Routine 6435 * @pdev: PCI device information struct 6436 * @ent: entry in e1000_pci_tbl 6437 * 6438 * Returns 0 on success, negative on failure 6439 * 6440 * e1000_probe initializes an adapter identified by a pci_dev structure. 6441 * The OS initialization, configuring of the adapter private structure, 6442 * and a hardware reset occur. 6443 **/ 6444 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 6445 { 6446 struct net_device *netdev; 6447 struct e1000_adapter *adapter; 6448 struct e1000_hw *hw; 6449 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data]; 6450 resource_size_t mmio_start, mmio_len; 6451 resource_size_t flash_start, flash_len; 6452 static int cards_found; 6453 u16 aspm_disable_flag = 0; 6454 int bars, i, err, pci_using_dac; 6455 u16 eeprom_data = 0; 6456 u16 eeprom_apme_mask = E1000_EEPROM_APME; 6457 6458 if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S) 6459 aspm_disable_flag = PCIE_LINK_STATE_L0S; 6460 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1) 6461 aspm_disable_flag |= PCIE_LINK_STATE_L1; 6462 if (aspm_disable_flag) 6463 e1000e_disable_aspm(pdev, aspm_disable_flag); 6464 6465 err = pci_enable_device_mem(pdev); 6466 if (err) 6467 return err; 6468 6469 pci_using_dac = 0; 6470 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)); 6471 if (!err) { 6472 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64)); 6473 if (!err) 6474 pci_using_dac = 1; 6475 } else { 6476 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); 6477 if (err) { 6478 err = dma_set_coherent_mask(&pdev->dev, 6479 DMA_BIT_MASK(32)); 6480 if (err) { 6481 dev_err(&pdev->dev, 6482 "No usable DMA configuration, aborting\n"); 6483 goto err_dma; 6484 } 6485 } 6486 } 6487 6488 bars = pci_select_bars(pdev, IORESOURCE_MEM); 6489 err = pci_request_selected_regions_exclusive(pdev, bars, 6490 e1000e_driver_name); 6491 if (err) 6492 goto err_pci_reg; 6493 6494 /* AER (Advanced Error Reporting) hooks */ 6495 pci_enable_pcie_error_reporting(pdev); 6496 6497 pci_set_master(pdev); 6498 /* PCI config space info */ 6499 err = pci_save_state(pdev); 6500 if (err) 6501 goto err_alloc_etherdev; 6502 6503 err = -ENOMEM; 6504 netdev = alloc_etherdev(sizeof(struct e1000_adapter)); 6505 if (!netdev) 6506 goto err_alloc_etherdev; 6507 6508 SET_NETDEV_DEV(netdev, &pdev->dev); 6509 6510 netdev->irq = pdev->irq; 6511 6512 pci_set_drvdata(pdev, netdev); 6513 adapter = netdev_priv(netdev); 6514 hw = &adapter->hw; 6515 adapter->netdev = netdev; 6516 adapter->pdev = pdev; 6517 adapter->ei = ei; 6518 adapter->pba = ei->pba; 6519 adapter->flags = ei->flags; 6520 adapter->flags2 = ei->flags2; 6521 adapter->hw.adapter = adapter; 6522 adapter->hw.mac.type = ei->mac; 6523 adapter->max_hw_frame_size = ei->max_hw_frame_size; 6524 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE); 6525 6526 mmio_start = pci_resource_start(pdev, 0); 6527 mmio_len = pci_resource_len(pdev, 0); 6528 6529 err = -EIO; 6530 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len); 6531 if (!adapter->hw.hw_addr) 6532 goto err_ioremap; 6533 6534 if ((adapter->flags & FLAG_HAS_FLASH) && 6535 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) { 6536 flash_start = pci_resource_start(pdev, 1); 6537 flash_len = pci_resource_len(pdev, 1); 6538 adapter->hw.flash_address = ioremap(flash_start, flash_len); 6539 if (!adapter->hw.flash_address) 6540 goto err_flashmap; 6541 } 6542 6543 /* construct the net_device struct */ 6544 netdev->netdev_ops = &e1000e_netdev_ops; 6545 e1000e_set_ethtool_ops(netdev); 6546 netdev->watchdog_timeo = 5 * HZ; 6547 netif_napi_add(netdev, &adapter->napi, e1000e_poll, 64); 6548 strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name)); 6549 6550 netdev->mem_start = mmio_start; 6551 netdev->mem_end = mmio_start + mmio_len; 6552 6553 adapter->bd_number = cards_found++; 6554 6555 e1000e_check_options(adapter); 6556 6557 /* setup adapter struct */ 6558 err = e1000_sw_init(adapter); 6559 if (err) 6560 goto err_sw_init; 6561 6562 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops)); 6563 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops)); 6564 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops)); 6565 6566 err = ei->get_variants(adapter); 6567 if (err) 6568 goto err_hw_init; 6569 6570 if ((adapter->flags & FLAG_IS_ICH) && 6571 (adapter->flags & FLAG_READ_ONLY_NVM)) 6572 e1000e_write_protect_nvm_ich8lan(&adapter->hw); 6573 6574 hw->mac.ops.get_bus_info(&adapter->hw); 6575 6576 adapter->hw.phy.autoneg_wait_to_complete = 0; 6577 6578 /* Copper options */ 6579 if (adapter->hw.phy.media_type == e1000_media_type_copper) { 6580 adapter->hw.phy.mdix = AUTO_ALL_MODES; 6581 adapter->hw.phy.disable_polarity_correction = 0; 6582 adapter->hw.phy.ms_type = e1000_ms_hw_default; 6583 } 6584 6585 if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw)) 6586 dev_info(&pdev->dev, 6587 "PHY reset is blocked due to SOL/IDER session.\n"); 6588 6589 /* Set initial default active device features */ 6590 netdev->features = (NETIF_F_SG | 6591 NETIF_F_HW_VLAN_RX | 6592 NETIF_F_HW_VLAN_TX | 6593 NETIF_F_TSO | 6594 NETIF_F_TSO6 | 6595 NETIF_F_RXHASH | 6596 NETIF_F_RXCSUM | 6597 NETIF_F_HW_CSUM); 6598 6599 /* Set user-changeable features (subset of all device features) */ 6600 netdev->hw_features = netdev->features; 6601 netdev->hw_features |= NETIF_F_RXFCS; 6602 netdev->priv_flags |= IFF_SUPP_NOFCS; 6603 netdev->hw_features |= NETIF_F_RXALL; 6604 6605 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) 6606 netdev->features |= NETIF_F_HW_VLAN_FILTER; 6607 6608 netdev->vlan_features |= (NETIF_F_SG | 6609 NETIF_F_TSO | 6610 NETIF_F_TSO6 | 6611 NETIF_F_HW_CSUM); 6612 6613 netdev->priv_flags |= IFF_UNICAST_FLT; 6614 6615 if (pci_using_dac) { 6616 netdev->features |= NETIF_F_HIGHDMA; 6617 netdev->vlan_features |= NETIF_F_HIGHDMA; 6618 } 6619 6620 if (e1000e_enable_mng_pass_thru(&adapter->hw)) 6621 adapter->flags |= FLAG_MNG_PT_ENABLED; 6622 6623 /* before reading the NVM, reset the controller to 6624 * put the device in a known good starting state 6625 */ 6626 adapter->hw.mac.ops.reset_hw(&adapter->hw); 6627 6628 /* systems with ASPM and others may see the checksum fail on the first 6629 * attempt. Let's give it a few tries 6630 */ 6631 for (i = 0;; i++) { 6632 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0) 6633 break; 6634 if (i == 2) { 6635 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n"); 6636 err = -EIO; 6637 goto err_eeprom; 6638 } 6639 } 6640 6641 e1000_eeprom_checks(adapter); 6642 6643 /* copy the MAC address */ 6644 if (e1000e_read_mac_addr(&adapter->hw)) 6645 dev_err(&pdev->dev, 6646 "NVM Read Error while reading MAC address\n"); 6647 6648 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len); 6649 6650 if (!is_valid_ether_addr(netdev->dev_addr)) { 6651 dev_err(&pdev->dev, "Invalid MAC Address: %pM\n", 6652 netdev->dev_addr); 6653 err = -EIO; 6654 goto err_eeprom; 6655 } 6656 6657 init_timer(&adapter->watchdog_timer); 6658 adapter->watchdog_timer.function = e1000_watchdog; 6659 adapter->watchdog_timer.data = (unsigned long)adapter; 6660 6661 init_timer(&adapter->phy_info_timer); 6662 adapter->phy_info_timer.function = e1000_update_phy_info; 6663 adapter->phy_info_timer.data = (unsigned long)adapter; 6664 6665 INIT_WORK(&adapter->reset_task, e1000_reset_task); 6666 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task); 6667 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround); 6668 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task); 6669 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang); 6670 6671 /* Initialize link parameters. User can change them with ethtool */ 6672 adapter->hw.mac.autoneg = 1; 6673 adapter->fc_autoneg = true; 6674 adapter->hw.fc.requested_mode = e1000_fc_default; 6675 adapter->hw.fc.current_mode = e1000_fc_default; 6676 adapter->hw.phy.autoneg_advertised = 0x2f; 6677 6678 /* ring size defaults */ 6679 adapter->rx_ring->count = E1000_DEFAULT_RXD; 6680 adapter->tx_ring->count = E1000_DEFAULT_TXD; 6681 6682 /* Initial Wake on LAN setting - If APM wake is enabled in 6683 * the EEPROM, enable the ACPI Magic Packet filter 6684 */ 6685 if (adapter->flags & FLAG_APME_IN_WUC) { 6686 /* APME bit in EEPROM is mapped to WUC.APME */ 6687 eeprom_data = er32(WUC); 6688 eeprom_apme_mask = E1000_WUC_APME; 6689 if ((hw->mac.type > e1000_ich10lan) && 6690 (eeprom_data & E1000_WUC_PHY_WAKE)) 6691 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP; 6692 } else if (adapter->flags & FLAG_APME_IN_CTRL3) { 6693 if (adapter->flags & FLAG_APME_CHECK_PORT_B && 6694 (adapter->hw.bus.func == 1)) 6695 e1000_read_nvm(&adapter->hw, NVM_INIT_CONTROL3_PORT_B, 6696 1, &eeprom_data); 6697 else 6698 e1000_read_nvm(&adapter->hw, NVM_INIT_CONTROL3_PORT_A, 6699 1, &eeprom_data); 6700 } 6701 6702 /* fetch WoL from EEPROM */ 6703 if (eeprom_data & eeprom_apme_mask) 6704 adapter->eeprom_wol |= E1000_WUFC_MAG; 6705 6706 /* now that we have the eeprom settings, apply the special cases 6707 * where the eeprom may be wrong or the board simply won't support 6708 * wake on lan on a particular port 6709 */ 6710 if (!(adapter->flags & FLAG_HAS_WOL)) 6711 adapter->eeprom_wol = 0; 6712 6713 /* initialize the wol settings based on the eeprom settings */ 6714 adapter->wol = adapter->eeprom_wol; 6715 6716 /* make sure adapter isn't asleep if manageability is enabled */ 6717 if (adapter->wol || (adapter->flags & FLAG_MNG_PT_ENABLED) || 6718 (hw->mac.ops.check_mng_mode(hw))) 6719 device_wakeup_enable(&pdev->dev); 6720 6721 /* save off EEPROM version number */ 6722 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers); 6723 6724 /* reset the hardware with the new settings */ 6725 e1000e_reset(adapter); 6726 6727 /* If the controller has AMT, do not set DRV_LOAD until the interface 6728 * is up. For all other cases, let the f/w know that the h/w is now 6729 * under the control of the driver. 6730 */ 6731 if (!(adapter->flags & FLAG_HAS_AMT)) 6732 e1000e_get_hw_control(adapter); 6733 6734 strlcpy(netdev->name, "eth%d", sizeof(netdev->name)); 6735 err = register_netdev(netdev); 6736 if (err) 6737 goto err_register; 6738 6739 /* carrier off reporting is important to ethtool even BEFORE open */ 6740 netif_carrier_off(netdev); 6741 6742 /* init PTP hardware clock */ 6743 e1000e_ptp_init(adapter); 6744 6745 e1000_print_device_info(adapter); 6746 6747 if (pci_dev_run_wake(pdev)) 6748 pm_runtime_put_noidle(&pdev->dev); 6749 6750 return 0; 6751 6752 err_register: 6753 if (!(adapter->flags & FLAG_HAS_AMT)) 6754 e1000e_release_hw_control(adapter); 6755 err_eeprom: 6756 if (hw->phy.ops.check_reset_block && !hw->phy.ops.check_reset_block(hw)) 6757 e1000_phy_hw_reset(&adapter->hw); 6758 err_hw_init: 6759 kfree(adapter->tx_ring); 6760 kfree(adapter->rx_ring); 6761 err_sw_init: 6762 if (adapter->hw.flash_address) 6763 iounmap(adapter->hw.flash_address); 6764 e1000e_reset_interrupt_capability(adapter); 6765 err_flashmap: 6766 iounmap(adapter->hw.hw_addr); 6767 err_ioremap: 6768 free_netdev(netdev); 6769 err_alloc_etherdev: 6770 pci_release_selected_regions(pdev, 6771 pci_select_bars(pdev, IORESOURCE_MEM)); 6772 err_pci_reg: 6773 err_dma: 6774 pci_disable_device(pdev); 6775 return err; 6776 } 6777 6778 /** 6779 * e1000_remove - Device Removal Routine 6780 * @pdev: PCI device information struct 6781 * 6782 * e1000_remove is called by the PCI subsystem to alert the driver 6783 * that it should release a PCI device. The could be caused by a 6784 * Hot-Plug event, or because the driver is going to be removed from 6785 * memory. 6786 **/ 6787 static void e1000_remove(struct pci_dev *pdev) 6788 { 6789 struct net_device *netdev = pci_get_drvdata(pdev); 6790 struct e1000_adapter *adapter = netdev_priv(netdev); 6791 bool down = test_bit(__E1000_DOWN, &adapter->state); 6792 6793 e1000e_ptp_remove(adapter); 6794 6795 /* The timers may be rescheduled, so explicitly disable them 6796 * from being rescheduled. 6797 */ 6798 if (!down) 6799 set_bit(__E1000_DOWN, &adapter->state); 6800 del_timer_sync(&adapter->watchdog_timer); 6801 del_timer_sync(&adapter->phy_info_timer); 6802 6803 cancel_work_sync(&adapter->reset_task); 6804 cancel_work_sync(&adapter->watchdog_task); 6805 cancel_work_sync(&adapter->downshift_task); 6806 cancel_work_sync(&adapter->update_phy_task); 6807 cancel_work_sync(&adapter->print_hang_task); 6808 6809 if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) { 6810 cancel_work_sync(&adapter->tx_hwtstamp_work); 6811 if (adapter->tx_hwtstamp_skb) { 6812 dev_kfree_skb_any(adapter->tx_hwtstamp_skb); 6813 adapter->tx_hwtstamp_skb = NULL; 6814 } 6815 } 6816 6817 if (!(netdev->flags & IFF_UP)) 6818 e1000_power_down_phy(adapter); 6819 6820 /* Don't lie to e1000_close() down the road. */ 6821 if (!down) 6822 clear_bit(__E1000_DOWN, &adapter->state); 6823 unregister_netdev(netdev); 6824 6825 if (pci_dev_run_wake(pdev)) 6826 pm_runtime_get_noresume(&pdev->dev); 6827 6828 /* Release control of h/w to f/w. If f/w is AMT enabled, this 6829 * would have already happened in close and is redundant. 6830 */ 6831 e1000e_release_hw_control(adapter); 6832 6833 e1000e_reset_interrupt_capability(adapter); 6834 kfree(adapter->tx_ring); 6835 kfree(adapter->rx_ring); 6836 6837 iounmap(adapter->hw.hw_addr); 6838 if (adapter->hw.flash_address) 6839 iounmap(adapter->hw.flash_address); 6840 pci_release_selected_regions(pdev, 6841 pci_select_bars(pdev, IORESOURCE_MEM)); 6842 6843 free_netdev(netdev); 6844 6845 /* AER disable */ 6846 pci_disable_pcie_error_reporting(pdev); 6847 6848 pci_disable_device(pdev); 6849 } 6850 6851 /* PCI Error Recovery (ERS) */ 6852 static const struct pci_error_handlers e1000_err_handler = { 6853 .error_detected = e1000_io_error_detected, 6854 .slot_reset = e1000_io_slot_reset, 6855 .resume = e1000_io_resume, 6856 }; 6857 6858 static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = { 6859 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 }, 6860 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 }, 6861 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 }, 6862 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), 6863 board_82571 }, 6864 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 }, 6865 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 }, 6866 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 }, 6867 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 }, 6868 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 }, 6869 6870 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 }, 6871 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 }, 6872 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 }, 6873 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 }, 6874 6875 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 }, 6876 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 }, 6877 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 }, 6878 6879 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 }, 6880 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 }, 6881 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 }, 6882 6883 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT), 6884 board_80003es2lan }, 6885 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT), 6886 board_80003es2lan }, 6887 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT), 6888 board_80003es2lan }, 6889 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT), 6890 board_80003es2lan }, 6891 6892 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan }, 6893 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan }, 6894 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan }, 6895 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan }, 6896 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan }, 6897 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan }, 6898 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan }, 6899 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan }, 6900 6901 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan }, 6902 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan }, 6903 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan }, 6904 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan }, 6905 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan }, 6906 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan }, 6907 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan }, 6908 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan }, 6909 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan }, 6910 6911 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan }, 6912 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan }, 6913 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan }, 6914 6915 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan }, 6916 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan }, 6917 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan }, 6918 6919 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan }, 6920 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan }, 6921 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan }, 6922 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan }, 6923 6924 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan }, 6925 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan }, 6926 6927 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt }, 6928 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt }, 6929 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_LM), board_pch_lpt }, 6930 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_V), board_pch_lpt }, 6931 6932 { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */ 6933 }; 6934 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl); 6935 6936 #ifdef CONFIG_PM 6937 static const struct dev_pm_ops e1000_pm_ops = { 6938 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume) 6939 SET_RUNTIME_PM_OPS(e1000_runtime_suspend, e1000_runtime_resume, 6940 e1000_idle) 6941 }; 6942 #endif 6943 6944 /* PCI Device API Driver */ 6945 static struct pci_driver e1000_driver = { 6946 .name = e1000e_driver_name, 6947 .id_table = e1000_pci_tbl, 6948 .probe = e1000_probe, 6949 .remove = e1000_remove, 6950 #ifdef CONFIG_PM 6951 .driver = { 6952 .pm = &e1000_pm_ops, 6953 }, 6954 #endif 6955 .shutdown = e1000_shutdown, 6956 .err_handler = &e1000_err_handler 6957 }; 6958 6959 /** 6960 * e1000_init_module - Driver Registration Routine 6961 * 6962 * e1000_init_module is the first routine called when the driver is 6963 * loaded. All it does is register with the PCI subsystem. 6964 **/ 6965 static int __init e1000_init_module(void) 6966 { 6967 int ret; 6968 pr_info("Intel(R) PRO/1000 Network Driver - %s\n", 6969 e1000e_driver_version); 6970 pr_info("Copyright(c) 1999 - 2013 Intel Corporation.\n"); 6971 ret = pci_register_driver(&e1000_driver); 6972 6973 return ret; 6974 } 6975 module_init(e1000_init_module); 6976 6977 /** 6978 * e1000_exit_module - Driver Exit Cleanup Routine 6979 * 6980 * e1000_exit_module is called just before the driver is removed 6981 * from memory. 6982 **/ 6983 static void __exit e1000_exit_module(void) 6984 { 6985 pci_unregister_driver(&e1000_driver); 6986 } 6987 module_exit(e1000_exit_module); 6988 6989 6990 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); 6991 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver"); 6992 MODULE_LICENSE("GPL"); 6993 MODULE_VERSION(DRV_VERSION); 6994 6995 /* netdev.c */ 6996