1 /******************************************************************************* 2 3 Intel PRO/1000 Linux driver 4 Copyright(c) 1999 - 2013 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, 8 version 2, as published by the Free Software Foundation. 9 10 This program is distributed in the hope it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 You should have received a copy of the GNU General Public License along with 16 this program; if not, write to the Free Software Foundation, Inc., 17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 18 19 The full GNU General Public License is included in this distribution in 20 the file called "COPYING". 21 22 Contact Information: 23 Linux NICS <linux.nics@intel.com> 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 26 27 *******************************************************************************/ 28 29 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 30 31 #include <linux/module.h> 32 #include <linux/types.h> 33 #include <linux/init.h> 34 #include <linux/pci.h> 35 #include <linux/vmalloc.h> 36 #include <linux/pagemap.h> 37 #include <linux/delay.h> 38 #include <linux/netdevice.h> 39 #include <linux/interrupt.h> 40 #include <linux/tcp.h> 41 #include <linux/ipv6.h> 42 #include <linux/slab.h> 43 #include <net/checksum.h> 44 #include <net/ip6_checksum.h> 45 #include <linux/ethtool.h> 46 #include <linux/if_vlan.h> 47 #include <linux/cpu.h> 48 #include <linux/smp.h> 49 #include <linux/pm_qos.h> 50 #include <linux/pm_runtime.h> 51 #include <linux/aer.h> 52 #include <linux/prefetch.h> 53 54 #include "e1000.h" 55 56 #define DRV_EXTRAVERSION "-k" 57 58 #define DRV_VERSION "2.2.14" DRV_EXTRAVERSION 59 char e1000e_driver_name[] = "e1000e"; 60 const char e1000e_driver_version[] = DRV_VERSION; 61 62 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK) 63 static int debug = -1; 64 module_param(debug, int, 0); 65 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); 66 67 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state); 68 69 static const struct e1000_info *e1000_info_tbl[] = { 70 [board_82571] = &e1000_82571_info, 71 [board_82572] = &e1000_82572_info, 72 [board_82573] = &e1000_82573_info, 73 [board_82574] = &e1000_82574_info, 74 [board_82583] = &e1000_82583_info, 75 [board_80003es2lan] = &e1000_es2_info, 76 [board_ich8lan] = &e1000_ich8_info, 77 [board_ich9lan] = &e1000_ich9_info, 78 [board_ich10lan] = &e1000_ich10_info, 79 [board_pchlan] = &e1000_pch_info, 80 [board_pch2lan] = &e1000_pch2_info, 81 [board_pch_lpt] = &e1000_pch_lpt_info, 82 }; 83 84 struct e1000_reg_info { 85 u32 ofs; 86 char *name; 87 }; 88 89 static const struct e1000_reg_info e1000_reg_info_tbl[] = { 90 /* General Registers */ 91 {E1000_CTRL, "CTRL"}, 92 {E1000_STATUS, "STATUS"}, 93 {E1000_CTRL_EXT, "CTRL_EXT"}, 94 95 /* Interrupt Registers */ 96 {E1000_ICR, "ICR"}, 97 98 /* Rx Registers */ 99 {E1000_RCTL, "RCTL"}, 100 {E1000_RDLEN(0), "RDLEN"}, 101 {E1000_RDH(0), "RDH"}, 102 {E1000_RDT(0), "RDT"}, 103 {E1000_RDTR, "RDTR"}, 104 {E1000_RXDCTL(0), "RXDCTL"}, 105 {E1000_ERT, "ERT"}, 106 {E1000_RDBAL(0), "RDBAL"}, 107 {E1000_RDBAH(0), "RDBAH"}, 108 {E1000_RDFH, "RDFH"}, 109 {E1000_RDFT, "RDFT"}, 110 {E1000_RDFHS, "RDFHS"}, 111 {E1000_RDFTS, "RDFTS"}, 112 {E1000_RDFPC, "RDFPC"}, 113 114 /* Tx Registers */ 115 {E1000_TCTL, "TCTL"}, 116 {E1000_TDBAL(0), "TDBAL"}, 117 {E1000_TDBAH(0), "TDBAH"}, 118 {E1000_TDLEN(0), "TDLEN"}, 119 {E1000_TDH(0), "TDH"}, 120 {E1000_TDT(0), "TDT"}, 121 {E1000_TIDV, "TIDV"}, 122 {E1000_TXDCTL(0), "TXDCTL"}, 123 {E1000_TADV, "TADV"}, 124 {E1000_TARC(0), "TARC"}, 125 {E1000_TDFH, "TDFH"}, 126 {E1000_TDFT, "TDFT"}, 127 {E1000_TDFHS, "TDFHS"}, 128 {E1000_TDFTS, "TDFTS"}, 129 {E1000_TDFPC, "TDFPC"}, 130 131 /* List Terminator */ 132 {0, NULL} 133 }; 134 135 /** 136 * e1000_regdump - register printout routine 137 * @hw: pointer to the HW structure 138 * @reginfo: pointer to the register info table 139 **/ 140 static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo) 141 { 142 int n = 0; 143 char rname[16]; 144 u32 regs[8]; 145 146 switch (reginfo->ofs) { 147 case E1000_RXDCTL(0): 148 for (n = 0; n < 2; n++) 149 regs[n] = __er32(hw, E1000_RXDCTL(n)); 150 break; 151 case E1000_TXDCTL(0): 152 for (n = 0; n < 2; n++) 153 regs[n] = __er32(hw, E1000_TXDCTL(n)); 154 break; 155 case E1000_TARC(0): 156 for (n = 0; n < 2; n++) 157 regs[n] = __er32(hw, E1000_TARC(n)); 158 break; 159 default: 160 pr_info("%-15s %08x\n", 161 reginfo->name, __er32(hw, reginfo->ofs)); 162 return; 163 } 164 165 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]"); 166 pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]); 167 } 168 169 static void e1000e_dump_ps_pages(struct e1000_adapter *adapter, 170 struct e1000_buffer *bi) 171 { 172 int i; 173 struct e1000_ps_page *ps_page; 174 175 for (i = 0; i < adapter->rx_ps_pages; i++) { 176 ps_page = &bi->ps_pages[i]; 177 178 if (ps_page->page) { 179 pr_info("packet dump for ps_page %d:\n", i); 180 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS, 181 16, 1, page_address(ps_page->page), 182 PAGE_SIZE, true); 183 } 184 } 185 } 186 187 /** 188 * e1000e_dump - Print registers, Tx-ring and Rx-ring 189 * @adapter: board private structure 190 **/ 191 static void e1000e_dump(struct e1000_adapter *adapter) 192 { 193 struct net_device *netdev = adapter->netdev; 194 struct e1000_hw *hw = &adapter->hw; 195 struct e1000_reg_info *reginfo; 196 struct e1000_ring *tx_ring = adapter->tx_ring; 197 struct e1000_tx_desc *tx_desc; 198 struct my_u0 { 199 __le64 a; 200 __le64 b; 201 } *u0; 202 struct e1000_buffer *buffer_info; 203 struct e1000_ring *rx_ring = adapter->rx_ring; 204 union e1000_rx_desc_packet_split *rx_desc_ps; 205 union e1000_rx_desc_extended *rx_desc; 206 struct my_u1 { 207 __le64 a; 208 __le64 b; 209 __le64 c; 210 __le64 d; 211 } *u1; 212 u32 staterr; 213 int i = 0; 214 215 if (!netif_msg_hw(adapter)) 216 return; 217 218 /* Print netdevice Info */ 219 if (netdev) { 220 dev_info(&adapter->pdev->dev, "Net device Info\n"); 221 pr_info("Device Name state trans_start last_rx\n"); 222 pr_info("%-15s %016lX %016lX %016lX\n", 223 netdev->name, netdev->state, netdev->trans_start, 224 netdev->last_rx); 225 } 226 227 /* Print Registers */ 228 dev_info(&adapter->pdev->dev, "Register Dump\n"); 229 pr_info(" Register Name Value\n"); 230 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl; 231 reginfo->name; reginfo++) { 232 e1000_regdump(hw, reginfo); 233 } 234 235 /* Print Tx Ring Summary */ 236 if (!netdev || !netif_running(netdev)) 237 return; 238 239 dev_info(&adapter->pdev->dev, "Tx Ring Summary\n"); 240 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n"); 241 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean]; 242 pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n", 243 0, tx_ring->next_to_use, tx_ring->next_to_clean, 244 (unsigned long long)buffer_info->dma, 245 buffer_info->length, 246 buffer_info->next_to_watch, 247 (unsigned long long)buffer_info->time_stamp); 248 249 /* Print Tx Ring */ 250 if (!netif_msg_tx_done(adapter)) 251 goto rx_ring_summary; 252 253 dev_info(&adapter->pdev->dev, "Tx Ring Dump\n"); 254 255 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended) 256 * 257 * Legacy Transmit Descriptor 258 * +--------------------------------------------------------------+ 259 * 0 | Buffer Address [63:0] (Reserved on Write Back) | 260 * +--------------------------------------------------------------+ 261 * 8 | Special | CSS | Status | CMD | CSO | Length | 262 * +--------------------------------------------------------------+ 263 * 63 48 47 36 35 32 31 24 23 16 15 0 264 * 265 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload 266 * 63 48 47 40 39 32 31 16 15 8 7 0 267 * +----------------------------------------------------------------+ 268 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS | 269 * +----------------------------------------------------------------+ 270 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN | 271 * +----------------------------------------------------------------+ 272 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0 273 * 274 * Extended Data Descriptor (DTYP=0x1) 275 * +----------------------------------------------------------------+ 276 * 0 | Buffer Address [63:0] | 277 * +----------------------------------------------------------------+ 278 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN | 279 * +----------------------------------------------------------------+ 280 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0 281 */ 282 pr_info("Tl[desc] [address 63:0 ] [SpeCssSCmCsLen] [bi->dma ] leng ntw timestamp bi->skb <-- Legacy format\n"); 283 pr_info("Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Context format\n"); 284 pr_info("Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Data format\n"); 285 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) { 286 const char *next_desc; 287 tx_desc = E1000_TX_DESC(*tx_ring, i); 288 buffer_info = &tx_ring->buffer_info[i]; 289 u0 = (struct my_u0 *)tx_desc; 290 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean) 291 next_desc = " NTC/U"; 292 else if (i == tx_ring->next_to_use) 293 next_desc = " NTU"; 294 else if (i == tx_ring->next_to_clean) 295 next_desc = " NTC"; 296 else 297 next_desc = ""; 298 pr_info("T%c[0x%03X] %016llX %016llX %016llX %04X %3X %016llX %p%s\n", 299 (!(le64_to_cpu(u0->b) & (1 << 29)) ? 'l' : 300 ((le64_to_cpu(u0->b) & (1 << 20)) ? 'd' : 'c')), 301 i, 302 (unsigned long long)le64_to_cpu(u0->a), 303 (unsigned long long)le64_to_cpu(u0->b), 304 (unsigned long long)buffer_info->dma, 305 buffer_info->length, buffer_info->next_to_watch, 306 (unsigned long long)buffer_info->time_stamp, 307 buffer_info->skb, next_desc); 308 309 if (netif_msg_pktdata(adapter) && buffer_info->skb) 310 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS, 311 16, 1, buffer_info->skb->data, 312 buffer_info->skb->len, true); 313 } 314 315 /* Print Rx Ring Summary */ 316 rx_ring_summary: 317 dev_info(&adapter->pdev->dev, "Rx Ring Summary\n"); 318 pr_info("Queue [NTU] [NTC]\n"); 319 pr_info(" %5d %5X %5X\n", 320 0, rx_ring->next_to_use, rx_ring->next_to_clean); 321 322 /* Print Rx Ring */ 323 if (!netif_msg_rx_status(adapter)) 324 return; 325 326 dev_info(&adapter->pdev->dev, "Rx Ring Dump\n"); 327 switch (adapter->rx_ps_pages) { 328 case 1: 329 case 2: 330 case 3: 331 /* [Extended] Packet Split Receive Descriptor Format 332 * 333 * +-----------------------------------------------------+ 334 * 0 | Buffer Address 0 [63:0] | 335 * +-----------------------------------------------------+ 336 * 8 | Buffer Address 1 [63:0] | 337 * +-----------------------------------------------------+ 338 * 16 | Buffer Address 2 [63:0] | 339 * +-----------------------------------------------------+ 340 * 24 | Buffer Address 3 [63:0] | 341 * +-----------------------------------------------------+ 342 */ 343 pr_info("R [desc] [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] [bi->skb] <-- Ext Pkt Split format\n"); 344 /* [Extended] Receive Descriptor (Write-Back) Format 345 * 346 * 63 48 47 32 31 13 12 8 7 4 3 0 347 * +------------------------------------------------------+ 348 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS | 349 * | Checksum | Ident | | Queue | | Type | 350 * +------------------------------------------------------+ 351 * 8 | VLAN Tag | Length | Extended Error | Extended Status | 352 * +------------------------------------------------------+ 353 * 63 48 47 32 31 20 19 0 354 */ 355 pr_info("RWB[desc] [ck ipid mrqhsh] [vl l0 ee es] [ l3 l2 l1 hs] [reserved ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n"); 356 for (i = 0; i < rx_ring->count; i++) { 357 const char *next_desc; 358 buffer_info = &rx_ring->buffer_info[i]; 359 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i); 360 u1 = (struct my_u1 *)rx_desc_ps; 361 staterr = 362 le32_to_cpu(rx_desc_ps->wb.middle.status_error); 363 364 if (i == rx_ring->next_to_use) 365 next_desc = " NTU"; 366 else if (i == rx_ring->next_to_clean) 367 next_desc = " NTC"; 368 else 369 next_desc = ""; 370 371 if (staterr & E1000_RXD_STAT_DD) { 372 /* Descriptor Done */ 373 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX ---------------- %p%s\n", 374 "RWB", i, 375 (unsigned long long)le64_to_cpu(u1->a), 376 (unsigned long long)le64_to_cpu(u1->b), 377 (unsigned long long)le64_to_cpu(u1->c), 378 (unsigned long long)le64_to_cpu(u1->d), 379 buffer_info->skb, next_desc); 380 } else { 381 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX %016llX %p%s\n", 382 "R ", i, 383 (unsigned long long)le64_to_cpu(u1->a), 384 (unsigned long long)le64_to_cpu(u1->b), 385 (unsigned long long)le64_to_cpu(u1->c), 386 (unsigned long long)le64_to_cpu(u1->d), 387 (unsigned long long)buffer_info->dma, 388 buffer_info->skb, next_desc); 389 390 if (netif_msg_pktdata(adapter)) 391 e1000e_dump_ps_pages(adapter, 392 buffer_info); 393 } 394 } 395 break; 396 default: 397 case 0: 398 /* Extended Receive Descriptor (Read) Format 399 * 400 * +-----------------------------------------------------+ 401 * 0 | Buffer Address [63:0] | 402 * +-----------------------------------------------------+ 403 * 8 | Reserved | 404 * +-----------------------------------------------------+ 405 */ 406 pr_info("R [desc] [buf addr 63:0 ] [reserved 63:0 ] [bi->dma ] [bi->skb] <-- Ext (Read) format\n"); 407 /* Extended Receive Descriptor (Write-Back) Format 408 * 409 * 63 48 47 32 31 24 23 4 3 0 410 * +------------------------------------------------------+ 411 * | RSS Hash | | | | 412 * 0 +-------------------+ Rsvd | Reserved | MRQ RSS | 413 * | Packet | IP | | | Type | 414 * | Checksum | Ident | | | | 415 * +------------------------------------------------------+ 416 * 8 | VLAN Tag | Length | Extended Error | Extended Status | 417 * +------------------------------------------------------+ 418 * 63 48 47 32 31 20 19 0 419 */ 420 pr_info("RWB[desc] [cs ipid mrq] [vt ln xe xs] [bi->skb] <-- Ext (Write-Back) format\n"); 421 422 for (i = 0; i < rx_ring->count; i++) { 423 const char *next_desc; 424 425 buffer_info = &rx_ring->buffer_info[i]; 426 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); 427 u1 = (struct my_u1 *)rx_desc; 428 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 429 430 if (i == rx_ring->next_to_use) 431 next_desc = " NTU"; 432 else if (i == rx_ring->next_to_clean) 433 next_desc = " NTC"; 434 else 435 next_desc = ""; 436 437 if (staterr & E1000_RXD_STAT_DD) { 438 /* Descriptor Done */ 439 pr_info("%s[0x%03X] %016llX %016llX ---------------- %p%s\n", 440 "RWB", i, 441 (unsigned long long)le64_to_cpu(u1->a), 442 (unsigned long long)le64_to_cpu(u1->b), 443 buffer_info->skb, next_desc); 444 } else { 445 pr_info("%s[0x%03X] %016llX %016llX %016llX %p%s\n", 446 "R ", i, 447 (unsigned long long)le64_to_cpu(u1->a), 448 (unsigned long long)le64_to_cpu(u1->b), 449 (unsigned long long)buffer_info->dma, 450 buffer_info->skb, next_desc); 451 452 if (netif_msg_pktdata(adapter) && 453 buffer_info->skb) 454 print_hex_dump(KERN_INFO, "", 455 DUMP_PREFIX_ADDRESS, 16, 456 1, 457 buffer_info->skb->data, 458 adapter->rx_buffer_len, 459 true); 460 } 461 } 462 } 463 } 464 465 /** 466 * e1000_desc_unused - calculate if we have unused descriptors 467 **/ 468 static int e1000_desc_unused(struct e1000_ring *ring) 469 { 470 if (ring->next_to_clean > ring->next_to_use) 471 return ring->next_to_clean - ring->next_to_use - 1; 472 473 return ring->count + ring->next_to_clean - ring->next_to_use - 1; 474 } 475 476 /** 477 * e1000e_systim_to_hwtstamp - convert system time value to hw time stamp 478 * @adapter: board private structure 479 * @hwtstamps: time stamp structure to update 480 * @systim: unsigned 64bit system time value. 481 * 482 * Convert the system time value stored in the RX/TXSTMP registers into a 483 * hwtstamp which can be used by the upper level time stamping functions. 484 * 485 * The 'systim_lock' spinlock is used to protect the consistency of the 486 * system time value. This is needed because reading the 64 bit time 487 * value involves reading two 32 bit registers. The first read latches the 488 * value. 489 **/ 490 static void e1000e_systim_to_hwtstamp(struct e1000_adapter *adapter, 491 struct skb_shared_hwtstamps *hwtstamps, 492 u64 systim) 493 { 494 u64 ns; 495 unsigned long flags; 496 497 spin_lock_irqsave(&adapter->systim_lock, flags); 498 ns = timecounter_cyc2time(&adapter->tc, systim); 499 spin_unlock_irqrestore(&adapter->systim_lock, flags); 500 501 memset(hwtstamps, 0, sizeof(*hwtstamps)); 502 hwtstamps->hwtstamp = ns_to_ktime(ns); 503 } 504 505 /** 506 * e1000e_rx_hwtstamp - utility function which checks for Rx time stamp 507 * @adapter: board private structure 508 * @status: descriptor extended error and status field 509 * @skb: particular skb to include time stamp 510 * 511 * If the time stamp is valid, convert it into the timecounter ns value 512 * and store that result into the shhwtstamps structure which is passed 513 * up the network stack. 514 **/ 515 static void e1000e_rx_hwtstamp(struct e1000_adapter *adapter, u32 status, 516 struct sk_buff *skb) 517 { 518 struct e1000_hw *hw = &adapter->hw; 519 u64 rxstmp; 520 521 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP) || 522 !(status & E1000_RXDEXT_STATERR_TST) || 523 !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID)) 524 return; 525 526 /* The Rx time stamp registers contain the time stamp. No other 527 * received packet will be time stamped until the Rx time stamp 528 * registers are read. Because only one packet can be time stamped 529 * at a time, the register values must belong to this packet and 530 * therefore none of the other additional attributes need to be 531 * compared. 532 */ 533 rxstmp = (u64)er32(RXSTMPL); 534 rxstmp |= (u64)er32(RXSTMPH) << 32; 535 e1000e_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), rxstmp); 536 537 adapter->flags2 &= ~FLAG2_CHECK_RX_HWTSTAMP; 538 } 539 540 /** 541 * e1000_receive_skb - helper function to handle Rx indications 542 * @adapter: board private structure 543 * @staterr: descriptor extended error and status field as written by hardware 544 * @vlan: descriptor vlan field as written by hardware (no le/be conversion) 545 * @skb: pointer to sk_buff to be indicated to stack 546 **/ 547 static void e1000_receive_skb(struct e1000_adapter *adapter, 548 struct net_device *netdev, struct sk_buff *skb, 549 u32 staterr, __le16 vlan) 550 { 551 u16 tag = le16_to_cpu(vlan); 552 553 e1000e_rx_hwtstamp(adapter, staterr, skb); 554 555 skb->protocol = eth_type_trans(skb, netdev); 556 557 if (staterr & E1000_RXD_STAT_VP) 558 __vlan_hwaccel_put_tag(skb, tag); 559 560 napi_gro_receive(&adapter->napi, skb); 561 } 562 563 /** 564 * e1000_rx_checksum - Receive Checksum Offload 565 * @adapter: board private structure 566 * @status_err: receive descriptor status and error fields 567 * @csum: receive descriptor csum field 568 * @sk_buff: socket buffer with received data 569 **/ 570 static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err, 571 struct sk_buff *skb) 572 { 573 u16 status = (u16)status_err; 574 u8 errors = (u8)(status_err >> 24); 575 576 skb_checksum_none_assert(skb); 577 578 /* Rx checksum disabled */ 579 if (!(adapter->netdev->features & NETIF_F_RXCSUM)) 580 return; 581 582 /* Ignore Checksum bit is set */ 583 if (status & E1000_RXD_STAT_IXSM) 584 return; 585 586 /* TCP/UDP checksum error bit or IP checksum error bit is set */ 587 if (errors & (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) { 588 /* let the stack verify checksum errors */ 589 adapter->hw_csum_err++; 590 return; 591 } 592 593 /* TCP/UDP Checksum has not been calculated */ 594 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))) 595 return; 596 597 /* It must be a TCP or UDP packet with a valid checksum */ 598 skb->ip_summed = CHECKSUM_UNNECESSARY; 599 adapter->hw_csum_good++; 600 } 601 602 static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i) 603 { 604 struct e1000_adapter *adapter = rx_ring->adapter; 605 struct e1000_hw *hw = &adapter->hw; 606 s32 ret_val = __ew32_prepare(hw); 607 608 writel(i, rx_ring->tail); 609 610 if (unlikely(!ret_val && (i != readl(rx_ring->tail)))) { 611 u32 rctl = er32(RCTL); 612 ew32(RCTL, rctl & ~E1000_RCTL_EN); 613 e_err("ME firmware caused invalid RDT - resetting\n"); 614 schedule_work(&adapter->reset_task); 615 } 616 } 617 618 static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i) 619 { 620 struct e1000_adapter *adapter = tx_ring->adapter; 621 struct e1000_hw *hw = &adapter->hw; 622 s32 ret_val = __ew32_prepare(hw); 623 624 writel(i, tx_ring->tail); 625 626 if (unlikely(!ret_val && (i != readl(tx_ring->tail)))) { 627 u32 tctl = er32(TCTL); 628 ew32(TCTL, tctl & ~E1000_TCTL_EN); 629 e_err("ME firmware caused invalid TDT - resetting\n"); 630 schedule_work(&adapter->reset_task); 631 } 632 } 633 634 /** 635 * e1000_alloc_rx_buffers - Replace used receive buffers 636 * @rx_ring: Rx descriptor ring 637 **/ 638 static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring, 639 int cleaned_count, gfp_t gfp) 640 { 641 struct e1000_adapter *adapter = rx_ring->adapter; 642 struct net_device *netdev = adapter->netdev; 643 struct pci_dev *pdev = adapter->pdev; 644 union e1000_rx_desc_extended *rx_desc; 645 struct e1000_buffer *buffer_info; 646 struct sk_buff *skb; 647 unsigned int i; 648 unsigned int bufsz = adapter->rx_buffer_len; 649 650 i = rx_ring->next_to_use; 651 buffer_info = &rx_ring->buffer_info[i]; 652 653 while (cleaned_count--) { 654 skb = buffer_info->skb; 655 if (skb) { 656 skb_trim(skb, 0); 657 goto map_skb; 658 } 659 660 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp); 661 if (!skb) { 662 /* Better luck next round */ 663 adapter->alloc_rx_buff_failed++; 664 break; 665 } 666 667 buffer_info->skb = skb; 668 map_skb: 669 buffer_info->dma = dma_map_single(&pdev->dev, skb->data, 670 adapter->rx_buffer_len, 671 DMA_FROM_DEVICE); 672 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) { 673 dev_err(&pdev->dev, "Rx DMA map failed\n"); 674 adapter->rx_dma_failed++; 675 break; 676 } 677 678 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); 679 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma); 680 681 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) { 682 /* Force memory writes to complete before letting h/w 683 * know there are new descriptors to fetch. (Only 684 * applicable for weak-ordered memory model archs, 685 * such as IA-64). 686 */ 687 wmb(); 688 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) 689 e1000e_update_rdt_wa(rx_ring, i); 690 else 691 writel(i, rx_ring->tail); 692 } 693 i++; 694 if (i == rx_ring->count) 695 i = 0; 696 buffer_info = &rx_ring->buffer_info[i]; 697 } 698 699 rx_ring->next_to_use = i; 700 } 701 702 /** 703 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split 704 * @rx_ring: Rx descriptor ring 705 **/ 706 static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring, 707 int cleaned_count, gfp_t gfp) 708 { 709 struct e1000_adapter *adapter = rx_ring->adapter; 710 struct net_device *netdev = adapter->netdev; 711 struct pci_dev *pdev = adapter->pdev; 712 union e1000_rx_desc_packet_split *rx_desc; 713 struct e1000_buffer *buffer_info; 714 struct e1000_ps_page *ps_page; 715 struct sk_buff *skb; 716 unsigned int i, j; 717 718 i = rx_ring->next_to_use; 719 buffer_info = &rx_ring->buffer_info[i]; 720 721 while (cleaned_count--) { 722 rx_desc = E1000_RX_DESC_PS(*rx_ring, i); 723 724 for (j = 0; j < PS_PAGE_BUFFERS; j++) { 725 ps_page = &buffer_info->ps_pages[j]; 726 if (j >= adapter->rx_ps_pages) { 727 /* all unused desc entries get hw null ptr */ 728 rx_desc->read.buffer_addr[j + 1] = 729 ~cpu_to_le64(0); 730 continue; 731 } 732 if (!ps_page->page) { 733 ps_page->page = alloc_page(gfp); 734 if (!ps_page->page) { 735 adapter->alloc_rx_buff_failed++; 736 goto no_buffers; 737 } 738 ps_page->dma = dma_map_page(&pdev->dev, 739 ps_page->page, 740 0, PAGE_SIZE, 741 DMA_FROM_DEVICE); 742 if (dma_mapping_error(&pdev->dev, 743 ps_page->dma)) { 744 dev_err(&adapter->pdev->dev, 745 "Rx DMA page map failed\n"); 746 adapter->rx_dma_failed++; 747 goto no_buffers; 748 } 749 } 750 /* Refresh the desc even if buffer_addrs 751 * didn't change because each write-back 752 * erases this info. 753 */ 754 rx_desc->read.buffer_addr[j + 1] = 755 cpu_to_le64(ps_page->dma); 756 } 757 758 skb = __netdev_alloc_skb_ip_align(netdev, 759 adapter->rx_ps_bsize0, 760 gfp); 761 762 if (!skb) { 763 adapter->alloc_rx_buff_failed++; 764 break; 765 } 766 767 buffer_info->skb = skb; 768 buffer_info->dma = dma_map_single(&pdev->dev, skb->data, 769 adapter->rx_ps_bsize0, 770 DMA_FROM_DEVICE); 771 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) { 772 dev_err(&pdev->dev, "Rx DMA map failed\n"); 773 adapter->rx_dma_failed++; 774 /* cleanup skb */ 775 dev_kfree_skb_any(skb); 776 buffer_info->skb = NULL; 777 break; 778 } 779 780 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma); 781 782 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) { 783 /* Force memory writes to complete before letting h/w 784 * know there are new descriptors to fetch. (Only 785 * applicable for weak-ordered memory model archs, 786 * such as IA-64). 787 */ 788 wmb(); 789 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) 790 e1000e_update_rdt_wa(rx_ring, i << 1); 791 else 792 writel(i << 1, rx_ring->tail); 793 } 794 795 i++; 796 if (i == rx_ring->count) 797 i = 0; 798 buffer_info = &rx_ring->buffer_info[i]; 799 } 800 801 no_buffers: 802 rx_ring->next_to_use = i; 803 } 804 805 /** 806 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers 807 * @rx_ring: Rx descriptor ring 808 * @cleaned_count: number of buffers to allocate this pass 809 **/ 810 811 static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring, 812 int cleaned_count, gfp_t gfp) 813 { 814 struct e1000_adapter *adapter = rx_ring->adapter; 815 struct net_device *netdev = adapter->netdev; 816 struct pci_dev *pdev = adapter->pdev; 817 union e1000_rx_desc_extended *rx_desc; 818 struct e1000_buffer *buffer_info; 819 struct sk_buff *skb; 820 unsigned int i; 821 unsigned int bufsz = 256 - 16; /* for skb_reserve */ 822 823 i = rx_ring->next_to_use; 824 buffer_info = &rx_ring->buffer_info[i]; 825 826 while (cleaned_count--) { 827 skb = buffer_info->skb; 828 if (skb) { 829 skb_trim(skb, 0); 830 goto check_page; 831 } 832 833 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp); 834 if (unlikely(!skb)) { 835 /* Better luck next round */ 836 adapter->alloc_rx_buff_failed++; 837 break; 838 } 839 840 buffer_info->skb = skb; 841 check_page: 842 /* allocate a new page if necessary */ 843 if (!buffer_info->page) { 844 buffer_info->page = alloc_page(gfp); 845 if (unlikely(!buffer_info->page)) { 846 adapter->alloc_rx_buff_failed++; 847 break; 848 } 849 } 850 851 if (!buffer_info->dma) { 852 buffer_info->dma = dma_map_page(&pdev->dev, 853 buffer_info->page, 0, 854 PAGE_SIZE, 855 DMA_FROM_DEVICE); 856 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) { 857 adapter->alloc_rx_buff_failed++; 858 break; 859 } 860 } 861 862 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); 863 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma); 864 865 if (unlikely(++i == rx_ring->count)) 866 i = 0; 867 buffer_info = &rx_ring->buffer_info[i]; 868 } 869 870 if (likely(rx_ring->next_to_use != i)) { 871 rx_ring->next_to_use = i; 872 if (unlikely(i-- == 0)) 873 i = (rx_ring->count - 1); 874 875 /* Force memory writes to complete before letting h/w 876 * know there are new descriptors to fetch. (Only 877 * applicable for weak-ordered memory model archs, 878 * such as IA-64). 879 */ 880 wmb(); 881 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) 882 e1000e_update_rdt_wa(rx_ring, i); 883 else 884 writel(i, rx_ring->tail); 885 } 886 } 887 888 static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss, 889 struct sk_buff *skb) 890 { 891 if (netdev->features & NETIF_F_RXHASH) 892 skb->rxhash = le32_to_cpu(rss); 893 } 894 895 /** 896 * e1000_clean_rx_irq - Send received data up the network stack 897 * @rx_ring: Rx descriptor ring 898 * 899 * the return value indicates whether actual cleaning was done, there 900 * is no guarantee that everything was cleaned 901 **/ 902 static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done, 903 int work_to_do) 904 { 905 struct e1000_adapter *adapter = rx_ring->adapter; 906 struct net_device *netdev = adapter->netdev; 907 struct pci_dev *pdev = adapter->pdev; 908 struct e1000_hw *hw = &adapter->hw; 909 union e1000_rx_desc_extended *rx_desc, *next_rxd; 910 struct e1000_buffer *buffer_info, *next_buffer; 911 u32 length, staterr; 912 unsigned int i; 913 int cleaned_count = 0; 914 bool cleaned = false; 915 unsigned int total_rx_bytes = 0, total_rx_packets = 0; 916 917 i = rx_ring->next_to_clean; 918 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); 919 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 920 buffer_info = &rx_ring->buffer_info[i]; 921 922 while (staterr & E1000_RXD_STAT_DD) { 923 struct sk_buff *skb; 924 925 if (*work_done >= work_to_do) 926 break; 927 (*work_done)++; 928 rmb(); /* read descriptor and rx_buffer_info after status DD */ 929 930 skb = buffer_info->skb; 931 buffer_info->skb = NULL; 932 933 prefetch(skb->data - NET_IP_ALIGN); 934 935 i++; 936 if (i == rx_ring->count) 937 i = 0; 938 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i); 939 prefetch(next_rxd); 940 941 next_buffer = &rx_ring->buffer_info[i]; 942 943 cleaned = true; 944 cleaned_count++; 945 dma_unmap_single(&pdev->dev, 946 buffer_info->dma, 947 adapter->rx_buffer_len, 948 DMA_FROM_DEVICE); 949 buffer_info->dma = 0; 950 951 length = le16_to_cpu(rx_desc->wb.upper.length); 952 953 /* !EOP means multiple descriptors were used to store a single 954 * packet, if that's the case we need to toss it. In fact, we 955 * need to toss every packet with the EOP bit clear and the 956 * next frame that _does_ have the EOP bit set, as it is by 957 * definition only a frame fragment 958 */ 959 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) 960 adapter->flags2 |= FLAG2_IS_DISCARDING; 961 962 if (adapter->flags2 & FLAG2_IS_DISCARDING) { 963 /* All receives must fit into a single buffer */ 964 e_dbg("Receive packet consumed multiple buffers\n"); 965 /* recycle */ 966 buffer_info->skb = skb; 967 if (staterr & E1000_RXD_STAT_EOP) 968 adapter->flags2 &= ~FLAG2_IS_DISCARDING; 969 goto next_desc; 970 } 971 972 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) && 973 !(netdev->features & NETIF_F_RXALL))) { 974 /* recycle */ 975 buffer_info->skb = skb; 976 goto next_desc; 977 } 978 979 /* adjust length to remove Ethernet CRC */ 980 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) { 981 /* If configured to store CRC, don't subtract FCS, 982 * but keep the FCS bytes out of the total_rx_bytes 983 * counter 984 */ 985 if (netdev->features & NETIF_F_RXFCS) 986 total_rx_bytes -= 4; 987 else 988 length -= 4; 989 } 990 991 total_rx_bytes += length; 992 total_rx_packets++; 993 994 /* code added for copybreak, this should improve 995 * performance for small packets with large amounts 996 * of reassembly being done in the stack 997 */ 998 if (length < copybreak) { 999 struct sk_buff *new_skb = 1000 netdev_alloc_skb_ip_align(netdev, length); 1001 if (new_skb) { 1002 skb_copy_to_linear_data_offset(new_skb, 1003 -NET_IP_ALIGN, 1004 (skb->data - 1005 NET_IP_ALIGN), 1006 (length + 1007 NET_IP_ALIGN)); 1008 /* save the skb in buffer_info as good */ 1009 buffer_info->skb = skb; 1010 skb = new_skb; 1011 } 1012 /* else just continue with the old one */ 1013 } 1014 /* end copybreak code */ 1015 skb_put(skb, length); 1016 1017 /* Receive Checksum Offload */ 1018 e1000_rx_checksum(adapter, staterr, skb); 1019 1020 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb); 1021 1022 e1000_receive_skb(adapter, netdev, skb, staterr, 1023 rx_desc->wb.upper.vlan); 1024 1025 next_desc: 1026 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF); 1027 1028 /* return some buffers to hardware, one at a time is too slow */ 1029 if (cleaned_count >= E1000_RX_BUFFER_WRITE) { 1030 adapter->alloc_rx_buf(rx_ring, cleaned_count, 1031 GFP_ATOMIC); 1032 cleaned_count = 0; 1033 } 1034 1035 /* use prefetched values */ 1036 rx_desc = next_rxd; 1037 buffer_info = next_buffer; 1038 1039 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 1040 } 1041 rx_ring->next_to_clean = i; 1042 1043 cleaned_count = e1000_desc_unused(rx_ring); 1044 if (cleaned_count) 1045 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC); 1046 1047 adapter->total_rx_bytes += total_rx_bytes; 1048 adapter->total_rx_packets += total_rx_packets; 1049 return cleaned; 1050 } 1051 1052 static void e1000_put_txbuf(struct e1000_ring *tx_ring, 1053 struct e1000_buffer *buffer_info) 1054 { 1055 struct e1000_adapter *adapter = tx_ring->adapter; 1056 1057 if (buffer_info->dma) { 1058 if (buffer_info->mapped_as_page) 1059 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma, 1060 buffer_info->length, DMA_TO_DEVICE); 1061 else 1062 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma, 1063 buffer_info->length, DMA_TO_DEVICE); 1064 buffer_info->dma = 0; 1065 } 1066 if (buffer_info->skb) { 1067 dev_kfree_skb_any(buffer_info->skb); 1068 buffer_info->skb = NULL; 1069 } 1070 buffer_info->time_stamp = 0; 1071 } 1072 1073 static void e1000_print_hw_hang(struct work_struct *work) 1074 { 1075 struct e1000_adapter *adapter = container_of(work, 1076 struct e1000_adapter, 1077 print_hang_task); 1078 struct net_device *netdev = adapter->netdev; 1079 struct e1000_ring *tx_ring = adapter->tx_ring; 1080 unsigned int i = tx_ring->next_to_clean; 1081 unsigned int eop = tx_ring->buffer_info[i].next_to_watch; 1082 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop); 1083 struct e1000_hw *hw = &adapter->hw; 1084 u16 phy_status, phy_1000t_status, phy_ext_status; 1085 u16 pci_status; 1086 1087 if (test_bit(__E1000_DOWN, &adapter->state)) 1088 return; 1089 1090 if (!adapter->tx_hang_recheck && 1091 (adapter->flags2 & FLAG2_DMA_BURST)) { 1092 /* May be block on write-back, flush and detect again 1093 * flush pending descriptor writebacks to memory 1094 */ 1095 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); 1096 /* execute the writes immediately */ 1097 e1e_flush(); 1098 /* Due to rare timing issues, write to TIDV again to ensure 1099 * the write is successful 1100 */ 1101 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); 1102 /* execute the writes immediately */ 1103 e1e_flush(); 1104 adapter->tx_hang_recheck = true; 1105 return; 1106 } 1107 /* Real hang detected */ 1108 adapter->tx_hang_recheck = false; 1109 netif_stop_queue(netdev); 1110 1111 e1e_rphy(hw, MII_BMSR, &phy_status); 1112 e1e_rphy(hw, MII_STAT1000, &phy_1000t_status); 1113 e1e_rphy(hw, MII_ESTATUS, &phy_ext_status); 1114 1115 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status); 1116 1117 /* detected Hardware unit hang */ 1118 e_err("Detected Hardware Unit Hang:\n" 1119 " TDH <%x>\n" 1120 " TDT <%x>\n" 1121 " next_to_use <%x>\n" 1122 " next_to_clean <%x>\n" 1123 "buffer_info[next_to_clean]:\n" 1124 " time_stamp <%lx>\n" 1125 " next_to_watch <%x>\n" 1126 " jiffies <%lx>\n" 1127 " next_to_watch.status <%x>\n" 1128 "MAC Status <%x>\n" 1129 "PHY Status <%x>\n" 1130 "PHY 1000BASE-T Status <%x>\n" 1131 "PHY Extended Status <%x>\n" 1132 "PCI Status <%x>\n", 1133 readl(tx_ring->head), 1134 readl(tx_ring->tail), 1135 tx_ring->next_to_use, 1136 tx_ring->next_to_clean, 1137 tx_ring->buffer_info[eop].time_stamp, 1138 eop, 1139 jiffies, 1140 eop_desc->upper.fields.status, 1141 er32(STATUS), 1142 phy_status, 1143 phy_1000t_status, 1144 phy_ext_status, 1145 pci_status); 1146 1147 /* Suggest workaround for known h/w issue */ 1148 if ((hw->mac.type == e1000_pchlan) && (er32(CTRL) & E1000_CTRL_TFCE)) 1149 e_err("Try turning off Tx pause (flow control) via ethtool\n"); 1150 } 1151 1152 /** 1153 * e1000e_tx_hwtstamp_work - check for Tx time stamp 1154 * @work: pointer to work struct 1155 * 1156 * This work function polls the TSYNCTXCTL valid bit to determine when a 1157 * timestamp has been taken for the current stored skb. The timestamp must 1158 * be for this skb because only one such packet is allowed in the queue. 1159 */ 1160 static void e1000e_tx_hwtstamp_work(struct work_struct *work) 1161 { 1162 struct e1000_adapter *adapter = container_of(work, struct e1000_adapter, 1163 tx_hwtstamp_work); 1164 struct e1000_hw *hw = &adapter->hw; 1165 1166 if (!adapter->tx_hwtstamp_skb) 1167 return; 1168 1169 if (er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID) { 1170 struct skb_shared_hwtstamps shhwtstamps; 1171 u64 txstmp; 1172 1173 txstmp = er32(TXSTMPL); 1174 txstmp |= (u64)er32(TXSTMPH) << 32; 1175 1176 e1000e_systim_to_hwtstamp(adapter, &shhwtstamps, txstmp); 1177 1178 skb_tstamp_tx(adapter->tx_hwtstamp_skb, &shhwtstamps); 1179 dev_kfree_skb_any(adapter->tx_hwtstamp_skb); 1180 adapter->tx_hwtstamp_skb = NULL; 1181 } else { 1182 /* reschedule to check later */ 1183 schedule_work(&adapter->tx_hwtstamp_work); 1184 } 1185 } 1186 1187 /** 1188 * e1000_clean_tx_irq - Reclaim resources after transmit completes 1189 * @tx_ring: Tx descriptor ring 1190 * 1191 * the return value indicates whether actual cleaning was done, there 1192 * is no guarantee that everything was cleaned 1193 **/ 1194 static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring) 1195 { 1196 struct e1000_adapter *adapter = tx_ring->adapter; 1197 struct net_device *netdev = adapter->netdev; 1198 struct e1000_hw *hw = &adapter->hw; 1199 struct e1000_tx_desc *tx_desc, *eop_desc; 1200 struct e1000_buffer *buffer_info; 1201 unsigned int i, eop; 1202 unsigned int count = 0; 1203 unsigned int total_tx_bytes = 0, total_tx_packets = 0; 1204 unsigned int bytes_compl = 0, pkts_compl = 0; 1205 1206 i = tx_ring->next_to_clean; 1207 eop = tx_ring->buffer_info[i].next_to_watch; 1208 eop_desc = E1000_TX_DESC(*tx_ring, eop); 1209 1210 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) && 1211 (count < tx_ring->count)) { 1212 bool cleaned = false; 1213 rmb(); /* read buffer_info after eop_desc */ 1214 for (; !cleaned; count++) { 1215 tx_desc = E1000_TX_DESC(*tx_ring, i); 1216 buffer_info = &tx_ring->buffer_info[i]; 1217 cleaned = (i == eop); 1218 1219 if (cleaned) { 1220 total_tx_packets += buffer_info->segs; 1221 total_tx_bytes += buffer_info->bytecount; 1222 if (buffer_info->skb) { 1223 bytes_compl += buffer_info->skb->len; 1224 pkts_compl++; 1225 } 1226 } 1227 1228 e1000_put_txbuf(tx_ring, buffer_info); 1229 tx_desc->upper.data = 0; 1230 1231 i++; 1232 if (i == tx_ring->count) 1233 i = 0; 1234 } 1235 1236 if (i == tx_ring->next_to_use) 1237 break; 1238 eop = tx_ring->buffer_info[i].next_to_watch; 1239 eop_desc = E1000_TX_DESC(*tx_ring, eop); 1240 } 1241 1242 tx_ring->next_to_clean = i; 1243 1244 netdev_completed_queue(netdev, pkts_compl, bytes_compl); 1245 1246 #define TX_WAKE_THRESHOLD 32 1247 if (count && netif_carrier_ok(netdev) && 1248 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) { 1249 /* Make sure that anybody stopping the queue after this 1250 * sees the new next_to_clean. 1251 */ 1252 smp_mb(); 1253 1254 if (netif_queue_stopped(netdev) && 1255 !(test_bit(__E1000_DOWN, &adapter->state))) { 1256 netif_wake_queue(netdev); 1257 ++adapter->restart_queue; 1258 } 1259 } 1260 1261 if (adapter->detect_tx_hung) { 1262 /* Detect a transmit hang in hardware, this serializes the 1263 * check with the clearing of time_stamp and movement of i 1264 */ 1265 adapter->detect_tx_hung = false; 1266 if (tx_ring->buffer_info[i].time_stamp && 1267 time_after(jiffies, tx_ring->buffer_info[i].time_stamp 1268 + (adapter->tx_timeout_factor * HZ)) && 1269 !(er32(STATUS) & E1000_STATUS_TXOFF)) 1270 schedule_work(&adapter->print_hang_task); 1271 else 1272 adapter->tx_hang_recheck = false; 1273 } 1274 adapter->total_tx_bytes += total_tx_bytes; 1275 adapter->total_tx_packets += total_tx_packets; 1276 return count < tx_ring->count; 1277 } 1278 1279 /** 1280 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split 1281 * @rx_ring: Rx descriptor ring 1282 * 1283 * the return value indicates whether actual cleaning was done, there 1284 * is no guarantee that everything was cleaned 1285 **/ 1286 static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done, 1287 int work_to_do) 1288 { 1289 struct e1000_adapter *adapter = rx_ring->adapter; 1290 struct e1000_hw *hw = &adapter->hw; 1291 union e1000_rx_desc_packet_split *rx_desc, *next_rxd; 1292 struct net_device *netdev = adapter->netdev; 1293 struct pci_dev *pdev = adapter->pdev; 1294 struct e1000_buffer *buffer_info, *next_buffer; 1295 struct e1000_ps_page *ps_page; 1296 struct sk_buff *skb; 1297 unsigned int i, j; 1298 u32 length, staterr; 1299 int cleaned_count = 0; 1300 bool cleaned = false; 1301 unsigned int total_rx_bytes = 0, total_rx_packets = 0; 1302 1303 i = rx_ring->next_to_clean; 1304 rx_desc = E1000_RX_DESC_PS(*rx_ring, i); 1305 staterr = le32_to_cpu(rx_desc->wb.middle.status_error); 1306 buffer_info = &rx_ring->buffer_info[i]; 1307 1308 while (staterr & E1000_RXD_STAT_DD) { 1309 if (*work_done >= work_to_do) 1310 break; 1311 (*work_done)++; 1312 skb = buffer_info->skb; 1313 rmb(); /* read descriptor and rx_buffer_info after status DD */ 1314 1315 /* in the packet split case this is header only */ 1316 prefetch(skb->data - NET_IP_ALIGN); 1317 1318 i++; 1319 if (i == rx_ring->count) 1320 i = 0; 1321 next_rxd = E1000_RX_DESC_PS(*rx_ring, i); 1322 prefetch(next_rxd); 1323 1324 next_buffer = &rx_ring->buffer_info[i]; 1325 1326 cleaned = true; 1327 cleaned_count++; 1328 dma_unmap_single(&pdev->dev, buffer_info->dma, 1329 adapter->rx_ps_bsize0, DMA_FROM_DEVICE); 1330 buffer_info->dma = 0; 1331 1332 /* see !EOP comment in other Rx routine */ 1333 if (!(staterr & E1000_RXD_STAT_EOP)) 1334 adapter->flags2 |= FLAG2_IS_DISCARDING; 1335 1336 if (adapter->flags2 & FLAG2_IS_DISCARDING) { 1337 e_dbg("Packet Split buffers didn't pick up the full packet\n"); 1338 dev_kfree_skb_irq(skb); 1339 if (staterr & E1000_RXD_STAT_EOP) 1340 adapter->flags2 &= ~FLAG2_IS_DISCARDING; 1341 goto next_desc; 1342 } 1343 1344 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) && 1345 !(netdev->features & NETIF_F_RXALL))) { 1346 dev_kfree_skb_irq(skb); 1347 goto next_desc; 1348 } 1349 1350 length = le16_to_cpu(rx_desc->wb.middle.length0); 1351 1352 if (!length) { 1353 e_dbg("Last part of the packet spanning multiple descriptors\n"); 1354 dev_kfree_skb_irq(skb); 1355 goto next_desc; 1356 } 1357 1358 /* Good Receive */ 1359 skb_put(skb, length); 1360 1361 { 1362 /* this looks ugly, but it seems compiler issues make 1363 * it more efficient than reusing j 1364 */ 1365 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]); 1366 1367 /* page alloc/put takes too long and effects small 1368 * packet throughput, so unsplit small packets and 1369 * save the alloc/put only valid in softirq (napi) 1370 * context to call kmap_* 1371 */ 1372 if (l1 && (l1 <= copybreak) && 1373 ((length + l1) <= adapter->rx_ps_bsize0)) { 1374 u8 *vaddr; 1375 1376 ps_page = &buffer_info->ps_pages[0]; 1377 1378 /* there is no documentation about how to call 1379 * kmap_atomic, so we can't hold the mapping 1380 * very long 1381 */ 1382 dma_sync_single_for_cpu(&pdev->dev, 1383 ps_page->dma, 1384 PAGE_SIZE, 1385 DMA_FROM_DEVICE); 1386 vaddr = kmap_atomic(ps_page->page); 1387 memcpy(skb_tail_pointer(skb), vaddr, l1); 1388 kunmap_atomic(vaddr); 1389 dma_sync_single_for_device(&pdev->dev, 1390 ps_page->dma, 1391 PAGE_SIZE, 1392 DMA_FROM_DEVICE); 1393 1394 /* remove the CRC */ 1395 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) { 1396 if (!(netdev->features & NETIF_F_RXFCS)) 1397 l1 -= 4; 1398 } 1399 1400 skb_put(skb, l1); 1401 goto copydone; 1402 } /* if */ 1403 } 1404 1405 for (j = 0; j < PS_PAGE_BUFFERS; j++) { 1406 length = le16_to_cpu(rx_desc->wb.upper.length[j]); 1407 if (!length) 1408 break; 1409 1410 ps_page = &buffer_info->ps_pages[j]; 1411 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE, 1412 DMA_FROM_DEVICE); 1413 ps_page->dma = 0; 1414 skb_fill_page_desc(skb, j, ps_page->page, 0, length); 1415 ps_page->page = NULL; 1416 skb->len += length; 1417 skb->data_len += length; 1418 skb->truesize += PAGE_SIZE; 1419 } 1420 1421 /* strip the ethernet crc, problem is we're using pages now so 1422 * this whole operation can get a little cpu intensive 1423 */ 1424 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) { 1425 if (!(netdev->features & NETIF_F_RXFCS)) 1426 pskb_trim(skb, skb->len - 4); 1427 } 1428 1429 copydone: 1430 total_rx_bytes += skb->len; 1431 total_rx_packets++; 1432 1433 e1000_rx_checksum(adapter, staterr, skb); 1434 1435 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb); 1436 1437 if (rx_desc->wb.upper.header_status & 1438 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)) 1439 adapter->rx_hdr_split++; 1440 1441 e1000_receive_skb(adapter, netdev, skb, staterr, 1442 rx_desc->wb.middle.vlan); 1443 1444 next_desc: 1445 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF); 1446 buffer_info->skb = NULL; 1447 1448 /* return some buffers to hardware, one at a time is too slow */ 1449 if (cleaned_count >= E1000_RX_BUFFER_WRITE) { 1450 adapter->alloc_rx_buf(rx_ring, cleaned_count, 1451 GFP_ATOMIC); 1452 cleaned_count = 0; 1453 } 1454 1455 /* use prefetched values */ 1456 rx_desc = next_rxd; 1457 buffer_info = next_buffer; 1458 1459 staterr = le32_to_cpu(rx_desc->wb.middle.status_error); 1460 } 1461 rx_ring->next_to_clean = i; 1462 1463 cleaned_count = e1000_desc_unused(rx_ring); 1464 if (cleaned_count) 1465 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC); 1466 1467 adapter->total_rx_bytes += total_rx_bytes; 1468 adapter->total_rx_packets += total_rx_packets; 1469 return cleaned; 1470 } 1471 1472 /** 1473 * e1000_consume_page - helper function 1474 **/ 1475 static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb, 1476 u16 length) 1477 { 1478 bi->page = NULL; 1479 skb->len += length; 1480 skb->data_len += length; 1481 skb->truesize += PAGE_SIZE; 1482 } 1483 1484 /** 1485 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy 1486 * @adapter: board private structure 1487 * 1488 * the return value indicates whether actual cleaning was done, there 1489 * is no guarantee that everything was cleaned 1490 **/ 1491 static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done, 1492 int work_to_do) 1493 { 1494 struct e1000_adapter *adapter = rx_ring->adapter; 1495 struct net_device *netdev = adapter->netdev; 1496 struct pci_dev *pdev = adapter->pdev; 1497 union e1000_rx_desc_extended *rx_desc, *next_rxd; 1498 struct e1000_buffer *buffer_info, *next_buffer; 1499 u32 length, staterr; 1500 unsigned int i; 1501 int cleaned_count = 0; 1502 bool cleaned = false; 1503 unsigned int total_rx_bytes=0, total_rx_packets=0; 1504 1505 i = rx_ring->next_to_clean; 1506 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); 1507 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 1508 buffer_info = &rx_ring->buffer_info[i]; 1509 1510 while (staterr & E1000_RXD_STAT_DD) { 1511 struct sk_buff *skb; 1512 1513 if (*work_done >= work_to_do) 1514 break; 1515 (*work_done)++; 1516 rmb(); /* read descriptor and rx_buffer_info after status DD */ 1517 1518 skb = buffer_info->skb; 1519 buffer_info->skb = NULL; 1520 1521 ++i; 1522 if (i == rx_ring->count) 1523 i = 0; 1524 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i); 1525 prefetch(next_rxd); 1526 1527 next_buffer = &rx_ring->buffer_info[i]; 1528 1529 cleaned = true; 1530 cleaned_count++; 1531 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE, 1532 DMA_FROM_DEVICE); 1533 buffer_info->dma = 0; 1534 1535 length = le16_to_cpu(rx_desc->wb.upper.length); 1536 1537 /* errors is only valid for DD + EOP descriptors */ 1538 if (unlikely((staterr & E1000_RXD_STAT_EOP) && 1539 ((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) && 1540 !(netdev->features & NETIF_F_RXALL)))) { 1541 /* recycle both page and skb */ 1542 buffer_info->skb = skb; 1543 /* an error means any chain goes out the window too */ 1544 if (rx_ring->rx_skb_top) 1545 dev_kfree_skb_irq(rx_ring->rx_skb_top); 1546 rx_ring->rx_skb_top = NULL; 1547 goto next_desc; 1548 } 1549 1550 #define rxtop (rx_ring->rx_skb_top) 1551 if (!(staterr & E1000_RXD_STAT_EOP)) { 1552 /* this descriptor is only the beginning (or middle) */ 1553 if (!rxtop) { 1554 /* this is the beginning of a chain */ 1555 rxtop = skb; 1556 skb_fill_page_desc(rxtop, 0, buffer_info->page, 1557 0, length); 1558 } else { 1559 /* this is the middle of a chain */ 1560 skb_fill_page_desc(rxtop, 1561 skb_shinfo(rxtop)->nr_frags, 1562 buffer_info->page, 0, length); 1563 /* re-use the skb, only consumed the page */ 1564 buffer_info->skb = skb; 1565 } 1566 e1000_consume_page(buffer_info, rxtop, length); 1567 goto next_desc; 1568 } else { 1569 if (rxtop) { 1570 /* end of the chain */ 1571 skb_fill_page_desc(rxtop, 1572 skb_shinfo(rxtop)->nr_frags, 1573 buffer_info->page, 0, length); 1574 /* re-use the current skb, we only consumed the 1575 * page 1576 */ 1577 buffer_info->skb = skb; 1578 skb = rxtop; 1579 rxtop = NULL; 1580 e1000_consume_page(buffer_info, skb, length); 1581 } else { 1582 /* no chain, got EOP, this buf is the packet 1583 * copybreak to save the put_page/alloc_page 1584 */ 1585 if (length <= copybreak && 1586 skb_tailroom(skb) >= length) { 1587 u8 *vaddr; 1588 vaddr = kmap_atomic(buffer_info->page); 1589 memcpy(skb_tail_pointer(skb), vaddr, 1590 length); 1591 kunmap_atomic(vaddr); 1592 /* re-use the page, so don't erase 1593 * buffer_info->page 1594 */ 1595 skb_put(skb, length); 1596 } else { 1597 skb_fill_page_desc(skb, 0, 1598 buffer_info->page, 0, 1599 length); 1600 e1000_consume_page(buffer_info, skb, 1601 length); 1602 } 1603 } 1604 } 1605 1606 /* Receive Checksum Offload */ 1607 e1000_rx_checksum(adapter, staterr, skb); 1608 1609 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb); 1610 1611 /* probably a little skewed due to removing CRC */ 1612 total_rx_bytes += skb->len; 1613 total_rx_packets++; 1614 1615 /* eth type trans needs skb->data to point to something */ 1616 if (!pskb_may_pull(skb, ETH_HLEN)) { 1617 e_err("pskb_may_pull failed.\n"); 1618 dev_kfree_skb_irq(skb); 1619 goto next_desc; 1620 } 1621 1622 e1000_receive_skb(adapter, netdev, skb, staterr, 1623 rx_desc->wb.upper.vlan); 1624 1625 next_desc: 1626 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF); 1627 1628 /* return some buffers to hardware, one at a time is too slow */ 1629 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) { 1630 adapter->alloc_rx_buf(rx_ring, cleaned_count, 1631 GFP_ATOMIC); 1632 cleaned_count = 0; 1633 } 1634 1635 /* use prefetched values */ 1636 rx_desc = next_rxd; 1637 buffer_info = next_buffer; 1638 1639 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 1640 } 1641 rx_ring->next_to_clean = i; 1642 1643 cleaned_count = e1000_desc_unused(rx_ring); 1644 if (cleaned_count) 1645 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC); 1646 1647 adapter->total_rx_bytes += total_rx_bytes; 1648 adapter->total_rx_packets += total_rx_packets; 1649 return cleaned; 1650 } 1651 1652 /** 1653 * e1000_clean_rx_ring - Free Rx Buffers per Queue 1654 * @rx_ring: Rx descriptor ring 1655 **/ 1656 static void e1000_clean_rx_ring(struct e1000_ring *rx_ring) 1657 { 1658 struct e1000_adapter *adapter = rx_ring->adapter; 1659 struct e1000_buffer *buffer_info; 1660 struct e1000_ps_page *ps_page; 1661 struct pci_dev *pdev = adapter->pdev; 1662 unsigned int i, j; 1663 1664 /* Free all the Rx ring sk_buffs */ 1665 for (i = 0; i < rx_ring->count; i++) { 1666 buffer_info = &rx_ring->buffer_info[i]; 1667 if (buffer_info->dma) { 1668 if (adapter->clean_rx == e1000_clean_rx_irq) 1669 dma_unmap_single(&pdev->dev, buffer_info->dma, 1670 adapter->rx_buffer_len, 1671 DMA_FROM_DEVICE); 1672 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq) 1673 dma_unmap_page(&pdev->dev, buffer_info->dma, 1674 PAGE_SIZE, 1675 DMA_FROM_DEVICE); 1676 else if (adapter->clean_rx == e1000_clean_rx_irq_ps) 1677 dma_unmap_single(&pdev->dev, buffer_info->dma, 1678 adapter->rx_ps_bsize0, 1679 DMA_FROM_DEVICE); 1680 buffer_info->dma = 0; 1681 } 1682 1683 if (buffer_info->page) { 1684 put_page(buffer_info->page); 1685 buffer_info->page = NULL; 1686 } 1687 1688 if (buffer_info->skb) { 1689 dev_kfree_skb(buffer_info->skb); 1690 buffer_info->skb = NULL; 1691 } 1692 1693 for (j = 0; j < PS_PAGE_BUFFERS; j++) { 1694 ps_page = &buffer_info->ps_pages[j]; 1695 if (!ps_page->page) 1696 break; 1697 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE, 1698 DMA_FROM_DEVICE); 1699 ps_page->dma = 0; 1700 put_page(ps_page->page); 1701 ps_page->page = NULL; 1702 } 1703 } 1704 1705 /* there also may be some cached data from a chained receive */ 1706 if (rx_ring->rx_skb_top) { 1707 dev_kfree_skb(rx_ring->rx_skb_top); 1708 rx_ring->rx_skb_top = NULL; 1709 } 1710 1711 /* Zero out the descriptor ring */ 1712 memset(rx_ring->desc, 0, rx_ring->size); 1713 1714 rx_ring->next_to_clean = 0; 1715 rx_ring->next_to_use = 0; 1716 adapter->flags2 &= ~FLAG2_IS_DISCARDING; 1717 1718 writel(0, rx_ring->head); 1719 if (rx_ring->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) 1720 e1000e_update_rdt_wa(rx_ring, 0); 1721 else 1722 writel(0, rx_ring->tail); 1723 } 1724 1725 static void e1000e_downshift_workaround(struct work_struct *work) 1726 { 1727 struct e1000_adapter *adapter = container_of(work, 1728 struct e1000_adapter, downshift_task); 1729 1730 if (test_bit(__E1000_DOWN, &adapter->state)) 1731 return; 1732 1733 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw); 1734 } 1735 1736 /** 1737 * e1000_intr_msi - Interrupt Handler 1738 * @irq: interrupt number 1739 * @data: pointer to a network interface device structure 1740 **/ 1741 static irqreturn_t e1000_intr_msi(int __always_unused irq, void *data) 1742 { 1743 struct net_device *netdev = data; 1744 struct e1000_adapter *adapter = netdev_priv(netdev); 1745 struct e1000_hw *hw = &adapter->hw; 1746 u32 icr = er32(ICR); 1747 1748 /* read ICR disables interrupts using IAM */ 1749 if (icr & E1000_ICR_LSC) { 1750 hw->mac.get_link_status = true; 1751 /* ICH8 workaround-- Call gig speed drop workaround on cable 1752 * disconnect (LSC) before accessing any PHY registers 1753 */ 1754 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) && 1755 (!(er32(STATUS) & E1000_STATUS_LU))) 1756 schedule_work(&adapter->downshift_task); 1757 1758 /* 80003ES2LAN workaround-- For packet buffer work-around on 1759 * link down event; disable receives here in the ISR and reset 1760 * adapter in watchdog 1761 */ 1762 if (netif_carrier_ok(netdev) && 1763 adapter->flags & FLAG_RX_NEEDS_RESTART) { 1764 /* disable receives */ 1765 u32 rctl = er32(RCTL); 1766 ew32(RCTL, rctl & ~E1000_RCTL_EN); 1767 adapter->flags |= FLAG_RESTART_NOW; 1768 } 1769 /* guard against interrupt when we're going down */ 1770 if (!test_bit(__E1000_DOWN, &adapter->state)) 1771 mod_timer(&adapter->watchdog_timer, jiffies + 1); 1772 } 1773 1774 /* Reset on uncorrectable ECC error */ 1775 if ((icr & E1000_ICR_ECCER) && (hw->mac.type == e1000_pch_lpt)) { 1776 u32 pbeccsts = er32(PBECCSTS); 1777 1778 adapter->corr_errors += 1779 pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK; 1780 adapter->uncorr_errors += 1781 (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >> 1782 E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT; 1783 1784 /* Do the reset outside of interrupt context */ 1785 schedule_work(&adapter->reset_task); 1786 1787 /* return immediately since reset is imminent */ 1788 return IRQ_HANDLED; 1789 } 1790 1791 if (napi_schedule_prep(&adapter->napi)) { 1792 adapter->total_tx_bytes = 0; 1793 adapter->total_tx_packets = 0; 1794 adapter->total_rx_bytes = 0; 1795 adapter->total_rx_packets = 0; 1796 __napi_schedule(&adapter->napi); 1797 } 1798 1799 return IRQ_HANDLED; 1800 } 1801 1802 /** 1803 * e1000_intr - Interrupt Handler 1804 * @irq: interrupt number 1805 * @data: pointer to a network interface device structure 1806 **/ 1807 static irqreturn_t e1000_intr(int __always_unused irq, void *data) 1808 { 1809 struct net_device *netdev = data; 1810 struct e1000_adapter *adapter = netdev_priv(netdev); 1811 struct e1000_hw *hw = &adapter->hw; 1812 u32 rctl, icr = er32(ICR); 1813 1814 if (!icr || test_bit(__E1000_DOWN, &adapter->state)) 1815 return IRQ_NONE; /* Not our interrupt */ 1816 1817 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is 1818 * not set, then the adapter didn't send an interrupt 1819 */ 1820 if (!(icr & E1000_ICR_INT_ASSERTED)) 1821 return IRQ_NONE; 1822 1823 /* Interrupt Auto-Mask...upon reading ICR, 1824 * interrupts are masked. No need for the 1825 * IMC write 1826 */ 1827 1828 if (icr & E1000_ICR_LSC) { 1829 hw->mac.get_link_status = true; 1830 /* ICH8 workaround-- Call gig speed drop workaround on cable 1831 * disconnect (LSC) before accessing any PHY registers 1832 */ 1833 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) && 1834 (!(er32(STATUS) & E1000_STATUS_LU))) 1835 schedule_work(&adapter->downshift_task); 1836 1837 /* 80003ES2LAN workaround-- 1838 * For packet buffer work-around on link down event; 1839 * disable receives here in the ISR and 1840 * reset adapter in watchdog 1841 */ 1842 if (netif_carrier_ok(netdev) && 1843 (adapter->flags & FLAG_RX_NEEDS_RESTART)) { 1844 /* disable receives */ 1845 rctl = er32(RCTL); 1846 ew32(RCTL, rctl & ~E1000_RCTL_EN); 1847 adapter->flags |= FLAG_RESTART_NOW; 1848 } 1849 /* guard against interrupt when we're going down */ 1850 if (!test_bit(__E1000_DOWN, &adapter->state)) 1851 mod_timer(&adapter->watchdog_timer, jiffies + 1); 1852 } 1853 1854 /* Reset on uncorrectable ECC error */ 1855 if ((icr & E1000_ICR_ECCER) && (hw->mac.type == e1000_pch_lpt)) { 1856 u32 pbeccsts = er32(PBECCSTS); 1857 1858 adapter->corr_errors += 1859 pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK; 1860 adapter->uncorr_errors += 1861 (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >> 1862 E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT; 1863 1864 /* Do the reset outside of interrupt context */ 1865 schedule_work(&adapter->reset_task); 1866 1867 /* return immediately since reset is imminent */ 1868 return IRQ_HANDLED; 1869 } 1870 1871 if (napi_schedule_prep(&adapter->napi)) { 1872 adapter->total_tx_bytes = 0; 1873 adapter->total_tx_packets = 0; 1874 adapter->total_rx_bytes = 0; 1875 adapter->total_rx_packets = 0; 1876 __napi_schedule(&adapter->napi); 1877 } 1878 1879 return IRQ_HANDLED; 1880 } 1881 1882 static irqreturn_t e1000_msix_other(int __always_unused irq, void *data) 1883 { 1884 struct net_device *netdev = data; 1885 struct e1000_adapter *adapter = netdev_priv(netdev); 1886 struct e1000_hw *hw = &adapter->hw; 1887 u32 icr = er32(ICR); 1888 1889 if (!(icr & E1000_ICR_INT_ASSERTED)) { 1890 if (!test_bit(__E1000_DOWN, &adapter->state)) 1891 ew32(IMS, E1000_IMS_OTHER); 1892 return IRQ_NONE; 1893 } 1894 1895 if (icr & adapter->eiac_mask) 1896 ew32(ICS, (icr & adapter->eiac_mask)); 1897 1898 if (icr & E1000_ICR_OTHER) { 1899 if (!(icr & E1000_ICR_LSC)) 1900 goto no_link_interrupt; 1901 hw->mac.get_link_status = true; 1902 /* guard against interrupt when we're going down */ 1903 if (!test_bit(__E1000_DOWN, &adapter->state)) 1904 mod_timer(&adapter->watchdog_timer, jiffies + 1); 1905 } 1906 1907 no_link_interrupt: 1908 if (!test_bit(__E1000_DOWN, &adapter->state)) 1909 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER); 1910 1911 return IRQ_HANDLED; 1912 } 1913 1914 static irqreturn_t e1000_intr_msix_tx(int __always_unused irq, void *data) 1915 { 1916 struct net_device *netdev = data; 1917 struct e1000_adapter *adapter = netdev_priv(netdev); 1918 struct e1000_hw *hw = &adapter->hw; 1919 struct e1000_ring *tx_ring = adapter->tx_ring; 1920 1921 1922 adapter->total_tx_bytes = 0; 1923 adapter->total_tx_packets = 0; 1924 1925 if (!e1000_clean_tx_irq(tx_ring)) 1926 /* Ring was not completely cleaned, so fire another interrupt */ 1927 ew32(ICS, tx_ring->ims_val); 1928 1929 return IRQ_HANDLED; 1930 } 1931 1932 static irqreturn_t e1000_intr_msix_rx(int __always_unused irq, void *data) 1933 { 1934 struct net_device *netdev = data; 1935 struct e1000_adapter *adapter = netdev_priv(netdev); 1936 struct e1000_ring *rx_ring = adapter->rx_ring; 1937 1938 /* Write the ITR value calculated at the end of the 1939 * previous interrupt. 1940 */ 1941 if (rx_ring->set_itr) { 1942 writel(1000000000 / (rx_ring->itr_val * 256), 1943 rx_ring->itr_register); 1944 rx_ring->set_itr = 0; 1945 } 1946 1947 if (napi_schedule_prep(&adapter->napi)) { 1948 adapter->total_rx_bytes = 0; 1949 adapter->total_rx_packets = 0; 1950 __napi_schedule(&adapter->napi); 1951 } 1952 return IRQ_HANDLED; 1953 } 1954 1955 /** 1956 * e1000_configure_msix - Configure MSI-X hardware 1957 * 1958 * e1000_configure_msix sets up the hardware to properly 1959 * generate MSI-X interrupts. 1960 **/ 1961 static void e1000_configure_msix(struct e1000_adapter *adapter) 1962 { 1963 struct e1000_hw *hw = &adapter->hw; 1964 struct e1000_ring *rx_ring = adapter->rx_ring; 1965 struct e1000_ring *tx_ring = adapter->tx_ring; 1966 int vector = 0; 1967 u32 ctrl_ext, ivar = 0; 1968 1969 adapter->eiac_mask = 0; 1970 1971 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */ 1972 if (hw->mac.type == e1000_82574) { 1973 u32 rfctl = er32(RFCTL); 1974 rfctl |= E1000_RFCTL_ACK_DIS; 1975 ew32(RFCTL, rfctl); 1976 } 1977 1978 #define E1000_IVAR_INT_ALLOC_VALID 0x8 1979 /* Configure Rx vector */ 1980 rx_ring->ims_val = E1000_IMS_RXQ0; 1981 adapter->eiac_mask |= rx_ring->ims_val; 1982 if (rx_ring->itr_val) 1983 writel(1000000000 / (rx_ring->itr_val * 256), 1984 rx_ring->itr_register); 1985 else 1986 writel(1, rx_ring->itr_register); 1987 ivar = E1000_IVAR_INT_ALLOC_VALID | vector; 1988 1989 /* Configure Tx vector */ 1990 tx_ring->ims_val = E1000_IMS_TXQ0; 1991 vector++; 1992 if (tx_ring->itr_val) 1993 writel(1000000000 / (tx_ring->itr_val * 256), 1994 tx_ring->itr_register); 1995 else 1996 writel(1, tx_ring->itr_register); 1997 adapter->eiac_mask |= tx_ring->ims_val; 1998 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8); 1999 2000 /* set vector for Other Causes, e.g. link changes */ 2001 vector++; 2002 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16); 2003 if (rx_ring->itr_val) 2004 writel(1000000000 / (rx_ring->itr_val * 256), 2005 hw->hw_addr + E1000_EITR_82574(vector)); 2006 else 2007 writel(1, hw->hw_addr + E1000_EITR_82574(vector)); 2008 2009 /* Cause Tx interrupts on every write back */ 2010 ivar |= (1 << 31); 2011 2012 ew32(IVAR, ivar); 2013 2014 /* enable MSI-X PBA support */ 2015 ctrl_ext = er32(CTRL_EXT); 2016 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR; 2017 2018 /* Auto-Mask Other interrupts upon ICR read */ 2019 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER); 2020 ctrl_ext |= E1000_CTRL_EXT_EIAME; 2021 ew32(CTRL_EXT, ctrl_ext); 2022 e1e_flush(); 2023 } 2024 2025 void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter) 2026 { 2027 if (adapter->msix_entries) { 2028 pci_disable_msix(adapter->pdev); 2029 kfree(adapter->msix_entries); 2030 adapter->msix_entries = NULL; 2031 } else if (adapter->flags & FLAG_MSI_ENABLED) { 2032 pci_disable_msi(adapter->pdev); 2033 adapter->flags &= ~FLAG_MSI_ENABLED; 2034 } 2035 } 2036 2037 /** 2038 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported 2039 * 2040 * Attempt to configure interrupts using the best available 2041 * capabilities of the hardware and kernel. 2042 **/ 2043 void e1000e_set_interrupt_capability(struct e1000_adapter *adapter) 2044 { 2045 int err; 2046 int i; 2047 2048 switch (adapter->int_mode) { 2049 case E1000E_INT_MODE_MSIX: 2050 if (adapter->flags & FLAG_HAS_MSIX) { 2051 adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */ 2052 adapter->msix_entries = kcalloc(adapter->num_vectors, 2053 sizeof(struct msix_entry), 2054 GFP_KERNEL); 2055 if (adapter->msix_entries) { 2056 for (i = 0; i < adapter->num_vectors; i++) 2057 adapter->msix_entries[i].entry = i; 2058 2059 err = pci_enable_msix(adapter->pdev, 2060 adapter->msix_entries, 2061 adapter->num_vectors); 2062 if (err == 0) 2063 return; 2064 } 2065 /* MSI-X failed, so fall through and try MSI */ 2066 e_err("Failed to initialize MSI-X interrupts. Falling back to MSI interrupts.\n"); 2067 e1000e_reset_interrupt_capability(adapter); 2068 } 2069 adapter->int_mode = E1000E_INT_MODE_MSI; 2070 /* Fall through */ 2071 case E1000E_INT_MODE_MSI: 2072 if (!pci_enable_msi(adapter->pdev)) { 2073 adapter->flags |= FLAG_MSI_ENABLED; 2074 } else { 2075 adapter->int_mode = E1000E_INT_MODE_LEGACY; 2076 e_err("Failed to initialize MSI interrupts. Falling back to legacy interrupts.\n"); 2077 } 2078 /* Fall through */ 2079 case E1000E_INT_MODE_LEGACY: 2080 /* Don't do anything; this is the system default */ 2081 break; 2082 } 2083 2084 /* store the number of vectors being used */ 2085 adapter->num_vectors = 1; 2086 } 2087 2088 /** 2089 * e1000_request_msix - Initialize MSI-X interrupts 2090 * 2091 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the 2092 * kernel. 2093 **/ 2094 static int e1000_request_msix(struct e1000_adapter *adapter) 2095 { 2096 struct net_device *netdev = adapter->netdev; 2097 int err = 0, vector = 0; 2098 2099 if (strlen(netdev->name) < (IFNAMSIZ - 5)) 2100 snprintf(adapter->rx_ring->name, 2101 sizeof(adapter->rx_ring->name) - 1, 2102 "%s-rx-0", netdev->name); 2103 else 2104 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ); 2105 err = request_irq(adapter->msix_entries[vector].vector, 2106 e1000_intr_msix_rx, 0, adapter->rx_ring->name, 2107 netdev); 2108 if (err) 2109 return err; 2110 adapter->rx_ring->itr_register = adapter->hw.hw_addr + 2111 E1000_EITR_82574(vector); 2112 adapter->rx_ring->itr_val = adapter->itr; 2113 vector++; 2114 2115 if (strlen(netdev->name) < (IFNAMSIZ - 5)) 2116 snprintf(adapter->tx_ring->name, 2117 sizeof(adapter->tx_ring->name) - 1, 2118 "%s-tx-0", netdev->name); 2119 else 2120 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ); 2121 err = request_irq(adapter->msix_entries[vector].vector, 2122 e1000_intr_msix_tx, 0, adapter->tx_ring->name, 2123 netdev); 2124 if (err) 2125 return err; 2126 adapter->tx_ring->itr_register = adapter->hw.hw_addr + 2127 E1000_EITR_82574(vector); 2128 adapter->tx_ring->itr_val = adapter->itr; 2129 vector++; 2130 2131 err = request_irq(adapter->msix_entries[vector].vector, 2132 e1000_msix_other, 0, netdev->name, netdev); 2133 if (err) 2134 return err; 2135 2136 e1000_configure_msix(adapter); 2137 2138 return 0; 2139 } 2140 2141 /** 2142 * e1000_request_irq - initialize interrupts 2143 * 2144 * Attempts to configure interrupts using the best available 2145 * capabilities of the hardware and kernel. 2146 **/ 2147 static int e1000_request_irq(struct e1000_adapter *adapter) 2148 { 2149 struct net_device *netdev = adapter->netdev; 2150 int err; 2151 2152 if (adapter->msix_entries) { 2153 err = e1000_request_msix(adapter); 2154 if (!err) 2155 return err; 2156 /* fall back to MSI */ 2157 e1000e_reset_interrupt_capability(adapter); 2158 adapter->int_mode = E1000E_INT_MODE_MSI; 2159 e1000e_set_interrupt_capability(adapter); 2160 } 2161 if (adapter->flags & FLAG_MSI_ENABLED) { 2162 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0, 2163 netdev->name, netdev); 2164 if (!err) 2165 return err; 2166 2167 /* fall back to legacy interrupt */ 2168 e1000e_reset_interrupt_capability(adapter); 2169 adapter->int_mode = E1000E_INT_MODE_LEGACY; 2170 } 2171 2172 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED, 2173 netdev->name, netdev); 2174 if (err) 2175 e_err("Unable to allocate interrupt, Error: %d\n", err); 2176 2177 return err; 2178 } 2179 2180 static void e1000_free_irq(struct e1000_adapter *adapter) 2181 { 2182 struct net_device *netdev = adapter->netdev; 2183 2184 if (adapter->msix_entries) { 2185 int vector = 0; 2186 2187 free_irq(adapter->msix_entries[vector].vector, netdev); 2188 vector++; 2189 2190 free_irq(adapter->msix_entries[vector].vector, netdev); 2191 vector++; 2192 2193 /* Other Causes interrupt vector */ 2194 free_irq(adapter->msix_entries[vector].vector, netdev); 2195 return; 2196 } 2197 2198 free_irq(adapter->pdev->irq, netdev); 2199 } 2200 2201 /** 2202 * e1000_irq_disable - Mask off interrupt generation on the NIC 2203 **/ 2204 static void e1000_irq_disable(struct e1000_adapter *adapter) 2205 { 2206 struct e1000_hw *hw = &adapter->hw; 2207 2208 ew32(IMC, ~0); 2209 if (adapter->msix_entries) 2210 ew32(EIAC_82574, 0); 2211 e1e_flush(); 2212 2213 if (adapter->msix_entries) { 2214 int i; 2215 for (i = 0; i < adapter->num_vectors; i++) 2216 synchronize_irq(adapter->msix_entries[i].vector); 2217 } else { 2218 synchronize_irq(adapter->pdev->irq); 2219 } 2220 } 2221 2222 /** 2223 * e1000_irq_enable - Enable default interrupt generation settings 2224 **/ 2225 static void e1000_irq_enable(struct e1000_adapter *adapter) 2226 { 2227 struct e1000_hw *hw = &adapter->hw; 2228 2229 if (adapter->msix_entries) { 2230 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574); 2231 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC); 2232 } else if (hw->mac.type == e1000_pch_lpt) { 2233 ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER); 2234 } else { 2235 ew32(IMS, IMS_ENABLE_MASK); 2236 } 2237 e1e_flush(); 2238 } 2239 2240 /** 2241 * e1000e_get_hw_control - get control of the h/w from f/w 2242 * @adapter: address of board private structure 2243 * 2244 * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit. 2245 * For ASF and Pass Through versions of f/w this means that 2246 * the driver is loaded. For AMT version (only with 82573) 2247 * of the f/w this means that the network i/f is open. 2248 **/ 2249 void e1000e_get_hw_control(struct e1000_adapter *adapter) 2250 { 2251 struct e1000_hw *hw = &adapter->hw; 2252 u32 ctrl_ext; 2253 u32 swsm; 2254 2255 /* Let firmware know the driver has taken over */ 2256 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) { 2257 swsm = er32(SWSM); 2258 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD); 2259 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) { 2260 ctrl_ext = er32(CTRL_EXT); 2261 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); 2262 } 2263 } 2264 2265 /** 2266 * e1000e_release_hw_control - release control of the h/w to f/w 2267 * @adapter: address of board private structure 2268 * 2269 * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit. 2270 * For ASF and Pass Through versions of f/w this means that the 2271 * driver is no longer loaded. For AMT version (only with 82573) i 2272 * of the f/w this means that the network i/f is closed. 2273 * 2274 **/ 2275 void e1000e_release_hw_control(struct e1000_adapter *adapter) 2276 { 2277 struct e1000_hw *hw = &adapter->hw; 2278 u32 ctrl_ext; 2279 u32 swsm; 2280 2281 /* Let firmware taken over control of h/w */ 2282 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) { 2283 swsm = er32(SWSM); 2284 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD); 2285 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) { 2286 ctrl_ext = er32(CTRL_EXT); 2287 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); 2288 } 2289 } 2290 2291 /** 2292 * e1000_alloc_ring_dma - allocate memory for a ring structure 2293 **/ 2294 static int e1000_alloc_ring_dma(struct e1000_adapter *adapter, 2295 struct e1000_ring *ring) 2296 { 2297 struct pci_dev *pdev = adapter->pdev; 2298 2299 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma, 2300 GFP_KERNEL); 2301 if (!ring->desc) 2302 return -ENOMEM; 2303 2304 return 0; 2305 } 2306 2307 /** 2308 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors) 2309 * @tx_ring: Tx descriptor ring 2310 * 2311 * Return 0 on success, negative on failure 2312 **/ 2313 int e1000e_setup_tx_resources(struct e1000_ring *tx_ring) 2314 { 2315 struct e1000_adapter *adapter = tx_ring->adapter; 2316 int err = -ENOMEM, size; 2317 2318 size = sizeof(struct e1000_buffer) * tx_ring->count; 2319 tx_ring->buffer_info = vzalloc(size); 2320 if (!tx_ring->buffer_info) 2321 goto err; 2322 2323 /* round up to nearest 4K */ 2324 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc); 2325 tx_ring->size = ALIGN(tx_ring->size, 4096); 2326 2327 err = e1000_alloc_ring_dma(adapter, tx_ring); 2328 if (err) 2329 goto err; 2330 2331 tx_ring->next_to_use = 0; 2332 tx_ring->next_to_clean = 0; 2333 2334 return 0; 2335 err: 2336 vfree(tx_ring->buffer_info); 2337 e_err("Unable to allocate memory for the transmit descriptor ring\n"); 2338 return err; 2339 } 2340 2341 /** 2342 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors) 2343 * @rx_ring: Rx descriptor ring 2344 * 2345 * Returns 0 on success, negative on failure 2346 **/ 2347 int e1000e_setup_rx_resources(struct e1000_ring *rx_ring) 2348 { 2349 struct e1000_adapter *adapter = rx_ring->adapter; 2350 struct e1000_buffer *buffer_info; 2351 int i, size, desc_len, err = -ENOMEM; 2352 2353 size = sizeof(struct e1000_buffer) * rx_ring->count; 2354 rx_ring->buffer_info = vzalloc(size); 2355 if (!rx_ring->buffer_info) 2356 goto err; 2357 2358 for (i = 0; i < rx_ring->count; i++) { 2359 buffer_info = &rx_ring->buffer_info[i]; 2360 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS, 2361 sizeof(struct e1000_ps_page), 2362 GFP_KERNEL); 2363 if (!buffer_info->ps_pages) 2364 goto err_pages; 2365 } 2366 2367 desc_len = sizeof(union e1000_rx_desc_packet_split); 2368 2369 /* Round up to nearest 4K */ 2370 rx_ring->size = rx_ring->count * desc_len; 2371 rx_ring->size = ALIGN(rx_ring->size, 4096); 2372 2373 err = e1000_alloc_ring_dma(adapter, rx_ring); 2374 if (err) 2375 goto err_pages; 2376 2377 rx_ring->next_to_clean = 0; 2378 rx_ring->next_to_use = 0; 2379 rx_ring->rx_skb_top = NULL; 2380 2381 return 0; 2382 2383 err_pages: 2384 for (i = 0; i < rx_ring->count; i++) { 2385 buffer_info = &rx_ring->buffer_info[i]; 2386 kfree(buffer_info->ps_pages); 2387 } 2388 err: 2389 vfree(rx_ring->buffer_info); 2390 e_err("Unable to allocate memory for the receive descriptor ring\n"); 2391 return err; 2392 } 2393 2394 /** 2395 * e1000_clean_tx_ring - Free Tx Buffers 2396 * @tx_ring: Tx descriptor ring 2397 **/ 2398 static void e1000_clean_tx_ring(struct e1000_ring *tx_ring) 2399 { 2400 struct e1000_adapter *adapter = tx_ring->adapter; 2401 struct e1000_buffer *buffer_info; 2402 unsigned long size; 2403 unsigned int i; 2404 2405 for (i = 0; i < tx_ring->count; i++) { 2406 buffer_info = &tx_ring->buffer_info[i]; 2407 e1000_put_txbuf(tx_ring, buffer_info); 2408 } 2409 2410 netdev_reset_queue(adapter->netdev); 2411 size = sizeof(struct e1000_buffer) * tx_ring->count; 2412 memset(tx_ring->buffer_info, 0, size); 2413 2414 memset(tx_ring->desc, 0, tx_ring->size); 2415 2416 tx_ring->next_to_use = 0; 2417 tx_ring->next_to_clean = 0; 2418 2419 writel(0, tx_ring->head); 2420 if (tx_ring->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) 2421 e1000e_update_tdt_wa(tx_ring, 0); 2422 else 2423 writel(0, tx_ring->tail); 2424 } 2425 2426 /** 2427 * e1000e_free_tx_resources - Free Tx Resources per Queue 2428 * @tx_ring: Tx descriptor ring 2429 * 2430 * Free all transmit software resources 2431 **/ 2432 void e1000e_free_tx_resources(struct e1000_ring *tx_ring) 2433 { 2434 struct e1000_adapter *adapter = tx_ring->adapter; 2435 struct pci_dev *pdev = adapter->pdev; 2436 2437 e1000_clean_tx_ring(tx_ring); 2438 2439 vfree(tx_ring->buffer_info); 2440 tx_ring->buffer_info = NULL; 2441 2442 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc, 2443 tx_ring->dma); 2444 tx_ring->desc = NULL; 2445 } 2446 2447 /** 2448 * e1000e_free_rx_resources - Free Rx Resources 2449 * @rx_ring: Rx descriptor ring 2450 * 2451 * Free all receive software resources 2452 **/ 2453 void e1000e_free_rx_resources(struct e1000_ring *rx_ring) 2454 { 2455 struct e1000_adapter *adapter = rx_ring->adapter; 2456 struct pci_dev *pdev = adapter->pdev; 2457 int i; 2458 2459 e1000_clean_rx_ring(rx_ring); 2460 2461 for (i = 0; i < rx_ring->count; i++) 2462 kfree(rx_ring->buffer_info[i].ps_pages); 2463 2464 vfree(rx_ring->buffer_info); 2465 rx_ring->buffer_info = NULL; 2466 2467 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc, 2468 rx_ring->dma); 2469 rx_ring->desc = NULL; 2470 } 2471 2472 /** 2473 * e1000_update_itr - update the dynamic ITR value based on statistics 2474 * @adapter: pointer to adapter 2475 * @itr_setting: current adapter->itr 2476 * @packets: the number of packets during this measurement interval 2477 * @bytes: the number of bytes during this measurement interval 2478 * 2479 * Stores a new ITR value based on packets and byte 2480 * counts during the last interrupt. The advantage of per interrupt 2481 * computation is faster updates and more accurate ITR for the current 2482 * traffic pattern. Constants in this function were computed 2483 * based on theoretical maximum wire speed and thresholds were set based 2484 * on testing data as well as attempting to minimize response time 2485 * while increasing bulk throughput. This functionality is controlled 2486 * by the InterruptThrottleRate module parameter. 2487 **/ 2488 static unsigned int e1000_update_itr(u16 itr_setting, int packets, int bytes) 2489 { 2490 unsigned int retval = itr_setting; 2491 2492 if (packets == 0) 2493 return itr_setting; 2494 2495 switch (itr_setting) { 2496 case lowest_latency: 2497 /* handle TSO and jumbo frames */ 2498 if (bytes/packets > 8000) 2499 retval = bulk_latency; 2500 else if ((packets < 5) && (bytes > 512)) 2501 retval = low_latency; 2502 break; 2503 case low_latency: /* 50 usec aka 20000 ints/s */ 2504 if (bytes > 10000) { 2505 /* this if handles the TSO accounting */ 2506 if (bytes/packets > 8000) 2507 retval = bulk_latency; 2508 else if ((packets < 10) || ((bytes/packets) > 1200)) 2509 retval = bulk_latency; 2510 else if ((packets > 35)) 2511 retval = lowest_latency; 2512 } else if (bytes/packets > 2000) { 2513 retval = bulk_latency; 2514 } else if (packets <= 2 && bytes < 512) { 2515 retval = lowest_latency; 2516 } 2517 break; 2518 case bulk_latency: /* 250 usec aka 4000 ints/s */ 2519 if (bytes > 25000) { 2520 if (packets > 35) 2521 retval = low_latency; 2522 } else if (bytes < 6000) { 2523 retval = low_latency; 2524 } 2525 break; 2526 } 2527 2528 return retval; 2529 } 2530 2531 static void e1000_set_itr(struct e1000_adapter *adapter) 2532 { 2533 u16 current_itr; 2534 u32 new_itr = adapter->itr; 2535 2536 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */ 2537 if (adapter->link_speed != SPEED_1000) { 2538 current_itr = 0; 2539 new_itr = 4000; 2540 goto set_itr_now; 2541 } 2542 2543 if (adapter->flags2 & FLAG2_DISABLE_AIM) { 2544 new_itr = 0; 2545 goto set_itr_now; 2546 } 2547 2548 adapter->tx_itr = e1000_update_itr(adapter->tx_itr, 2549 adapter->total_tx_packets, 2550 adapter->total_tx_bytes); 2551 /* conservative mode (itr 3) eliminates the lowest_latency setting */ 2552 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency) 2553 adapter->tx_itr = low_latency; 2554 2555 adapter->rx_itr = e1000_update_itr(adapter->rx_itr, 2556 adapter->total_rx_packets, 2557 adapter->total_rx_bytes); 2558 /* conservative mode (itr 3) eliminates the lowest_latency setting */ 2559 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency) 2560 adapter->rx_itr = low_latency; 2561 2562 current_itr = max(adapter->rx_itr, adapter->tx_itr); 2563 2564 switch (current_itr) { 2565 /* counts and packets in update_itr are dependent on these numbers */ 2566 case lowest_latency: 2567 new_itr = 70000; 2568 break; 2569 case low_latency: 2570 new_itr = 20000; /* aka hwitr = ~200 */ 2571 break; 2572 case bulk_latency: 2573 new_itr = 4000; 2574 break; 2575 default: 2576 break; 2577 } 2578 2579 set_itr_now: 2580 if (new_itr != adapter->itr) { 2581 /* this attempts to bias the interrupt rate towards Bulk 2582 * by adding intermediate steps when interrupt rate is 2583 * increasing 2584 */ 2585 new_itr = new_itr > adapter->itr ? 2586 min(adapter->itr + (new_itr >> 2), new_itr) : 2587 new_itr; 2588 adapter->itr = new_itr; 2589 adapter->rx_ring->itr_val = new_itr; 2590 if (adapter->msix_entries) 2591 adapter->rx_ring->set_itr = 1; 2592 else 2593 e1000e_write_itr(adapter, new_itr); 2594 } 2595 } 2596 2597 /** 2598 * e1000e_write_itr - write the ITR value to the appropriate registers 2599 * @adapter: address of board private structure 2600 * @itr: new ITR value to program 2601 * 2602 * e1000e_write_itr determines if the adapter is in MSI-X mode 2603 * and, if so, writes the EITR registers with the ITR value. 2604 * Otherwise, it writes the ITR value into the ITR register. 2605 **/ 2606 void e1000e_write_itr(struct e1000_adapter *adapter, u32 itr) 2607 { 2608 struct e1000_hw *hw = &adapter->hw; 2609 u32 new_itr = itr ? 1000000000 / (itr * 256) : 0; 2610 2611 if (adapter->msix_entries) { 2612 int vector; 2613 2614 for (vector = 0; vector < adapter->num_vectors; vector++) 2615 writel(new_itr, hw->hw_addr + E1000_EITR_82574(vector)); 2616 } else { 2617 ew32(ITR, new_itr); 2618 } 2619 } 2620 2621 /** 2622 * e1000_alloc_queues - Allocate memory for all rings 2623 * @adapter: board private structure to initialize 2624 **/ 2625 static int e1000_alloc_queues(struct e1000_adapter *adapter) 2626 { 2627 int size = sizeof(struct e1000_ring); 2628 2629 adapter->tx_ring = kzalloc(size, GFP_KERNEL); 2630 if (!adapter->tx_ring) 2631 goto err; 2632 adapter->tx_ring->count = adapter->tx_ring_count; 2633 adapter->tx_ring->adapter = adapter; 2634 2635 adapter->rx_ring = kzalloc(size, GFP_KERNEL); 2636 if (!adapter->rx_ring) 2637 goto err; 2638 adapter->rx_ring->count = adapter->rx_ring_count; 2639 adapter->rx_ring->adapter = adapter; 2640 2641 return 0; 2642 err: 2643 e_err("Unable to allocate memory for queues\n"); 2644 kfree(adapter->rx_ring); 2645 kfree(adapter->tx_ring); 2646 return -ENOMEM; 2647 } 2648 2649 /** 2650 * e1000e_poll - NAPI Rx polling callback 2651 * @napi: struct associated with this polling callback 2652 * @weight: number of packets driver is allowed to process this poll 2653 **/ 2654 static int e1000e_poll(struct napi_struct *napi, int weight) 2655 { 2656 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, 2657 napi); 2658 struct e1000_hw *hw = &adapter->hw; 2659 struct net_device *poll_dev = adapter->netdev; 2660 int tx_cleaned = 1, work_done = 0; 2661 2662 adapter = netdev_priv(poll_dev); 2663 2664 if (!adapter->msix_entries || 2665 (adapter->rx_ring->ims_val & adapter->tx_ring->ims_val)) 2666 tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring); 2667 2668 adapter->clean_rx(adapter->rx_ring, &work_done, weight); 2669 2670 if (!tx_cleaned) 2671 work_done = weight; 2672 2673 /* If weight not fully consumed, exit the polling mode */ 2674 if (work_done < weight) { 2675 if (adapter->itr_setting & 3) 2676 e1000_set_itr(adapter); 2677 napi_complete(napi); 2678 if (!test_bit(__E1000_DOWN, &adapter->state)) { 2679 if (adapter->msix_entries) 2680 ew32(IMS, adapter->rx_ring->ims_val); 2681 else 2682 e1000_irq_enable(adapter); 2683 } 2684 } 2685 2686 return work_done; 2687 } 2688 2689 static int e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid) 2690 { 2691 struct e1000_adapter *adapter = netdev_priv(netdev); 2692 struct e1000_hw *hw = &adapter->hw; 2693 u32 vfta, index; 2694 2695 /* don't update vlan cookie if already programmed */ 2696 if ((adapter->hw.mng_cookie.status & 2697 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) && 2698 (vid == adapter->mng_vlan_id)) 2699 return 0; 2700 2701 /* add VID to filter table */ 2702 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2703 index = (vid >> 5) & 0x7F; 2704 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index); 2705 vfta |= (1 << (vid & 0x1F)); 2706 hw->mac.ops.write_vfta(hw, index, vfta); 2707 } 2708 2709 set_bit(vid, adapter->active_vlans); 2710 2711 return 0; 2712 } 2713 2714 static int e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid) 2715 { 2716 struct e1000_adapter *adapter = netdev_priv(netdev); 2717 struct e1000_hw *hw = &adapter->hw; 2718 u32 vfta, index; 2719 2720 if ((adapter->hw.mng_cookie.status & 2721 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) && 2722 (vid == adapter->mng_vlan_id)) { 2723 /* release control to f/w */ 2724 e1000e_release_hw_control(adapter); 2725 return 0; 2726 } 2727 2728 /* remove VID from filter table */ 2729 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2730 index = (vid >> 5) & 0x7F; 2731 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index); 2732 vfta &= ~(1 << (vid & 0x1F)); 2733 hw->mac.ops.write_vfta(hw, index, vfta); 2734 } 2735 2736 clear_bit(vid, adapter->active_vlans); 2737 2738 return 0; 2739 } 2740 2741 /** 2742 * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering 2743 * @adapter: board private structure to initialize 2744 **/ 2745 static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter) 2746 { 2747 struct net_device *netdev = adapter->netdev; 2748 struct e1000_hw *hw = &adapter->hw; 2749 u32 rctl; 2750 2751 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2752 /* disable VLAN receive filtering */ 2753 rctl = er32(RCTL); 2754 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN); 2755 ew32(RCTL, rctl); 2756 2757 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) { 2758 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); 2759 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; 2760 } 2761 } 2762 } 2763 2764 /** 2765 * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering 2766 * @adapter: board private structure to initialize 2767 **/ 2768 static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter) 2769 { 2770 struct e1000_hw *hw = &adapter->hw; 2771 u32 rctl; 2772 2773 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2774 /* enable VLAN receive filtering */ 2775 rctl = er32(RCTL); 2776 rctl |= E1000_RCTL_VFE; 2777 rctl &= ~E1000_RCTL_CFIEN; 2778 ew32(RCTL, rctl); 2779 } 2780 } 2781 2782 /** 2783 * e1000e_vlan_strip_enable - helper to disable HW VLAN stripping 2784 * @adapter: board private structure to initialize 2785 **/ 2786 static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter) 2787 { 2788 struct e1000_hw *hw = &adapter->hw; 2789 u32 ctrl; 2790 2791 /* disable VLAN tag insert/strip */ 2792 ctrl = er32(CTRL); 2793 ctrl &= ~E1000_CTRL_VME; 2794 ew32(CTRL, ctrl); 2795 } 2796 2797 /** 2798 * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping 2799 * @adapter: board private structure to initialize 2800 **/ 2801 static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter) 2802 { 2803 struct e1000_hw *hw = &adapter->hw; 2804 u32 ctrl; 2805 2806 /* enable VLAN tag insert/strip */ 2807 ctrl = er32(CTRL); 2808 ctrl |= E1000_CTRL_VME; 2809 ew32(CTRL, ctrl); 2810 } 2811 2812 static void e1000_update_mng_vlan(struct e1000_adapter *adapter) 2813 { 2814 struct net_device *netdev = adapter->netdev; 2815 u16 vid = adapter->hw.mng_cookie.vlan_id; 2816 u16 old_vid = adapter->mng_vlan_id; 2817 2818 if (adapter->hw.mng_cookie.status & 2819 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) { 2820 e1000_vlan_rx_add_vid(netdev, vid); 2821 adapter->mng_vlan_id = vid; 2822 } 2823 2824 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid)) 2825 e1000_vlan_rx_kill_vid(netdev, old_vid); 2826 } 2827 2828 static void e1000_restore_vlan(struct e1000_adapter *adapter) 2829 { 2830 u16 vid; 2831 2832 e1000_vlan_rx_add_vid(adapter->netdev, 0); 2833 2834 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID) 2835 e1000_vlan_rx_add_vid(adapter->netdev, vid); 2836 } 2837 2838 static void e1000_init_manageability_pt(struct e1000_adapter *adapter) 2839 { 2840 struct e1000_hw *hw = &adapter->hw; 2841 u32 manc, manc2h, mdef, i, j; 2842 2843 if (!(adapter->flags & FLAG_MNG_PT_ENABLED)) 2844 return; 2845 2846 manc = er32(MANC); 2847 2848 /* enable receiving management packets to the host. this will probably 2849 * generate destination unreachable messages from the host OS, but 2850 * the packets will be handled on SMBUS 2851 */ 2852 manc |= E1000_MANC_EN_MNG2HOST; 2853 manc2h = er32(MANC2H); 2854 2855 switch (hw->mac.type) { 2856 default: 2857 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664); 2858 break; 2859 case e1000_82574: 2860 case e1000_82583: 2861 /* Check if IPMI pass-through decision filter already exists; 2862 * if so, enable it. 2863 */ 2864 for (i = 0, j = 0; i < 8; i++) { 2865 mdef = er32(MDEF(i)); 2866 2867 /* Ignore filters with anything other than IPMI ports */ 2868 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664)) 2869 continue; 2870 2871 /* Enable this decision filter in MANC2H */ 2872 if (mdef) 2873 manc2h |= (1 << i); 2874 2875 j |= mdef; 2876 } 2877 2878 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664)) 2879 break; 2880 2881 /* Create new decision filter in an empty filter */ 2882 for (i = 0, j = 0; i < 8; i++) 2883 if (er32(MDEF(i)) == 0) { 2884 ew32(MDEF(i), (E1000_MDEF_PORT_623 | 2885 E1000_MDEF_PORT_664)); 2886 manc2h |= (1 << 1); 2887 j++; 2888 break; 2889 } 2890 2891 if (!j) 2892 e_warn("Unable to create IPMI pass-through filter\n"); 2893 break; 2894 } 2895 2896 ew32(MANC2H, manc2h); 2897 ew32(MANC, manc); 2898 } 2899 2900 /** 2901 * e1000_configure_tx - Configure Transmit Unit after Reset 2902 * @adapter: board private structure 2903 * 2904 * Configure the Tx unit of the MAC after a reset. 2905 **/ 2906 static void e1000_configure_tx(struct e1000_adapter *adapter) 2907 { 2908 struct e1000_hw *hw = &adapter->hw; 2909 struct e1000_ring *tx_ring = adapter->tx_ring; 2910 u64 tdba; 2911 u32 tdlen, tarc; 2912 2913 /* Setup the HW Tx Head and Tail descriptor pointers */ 2914 tdba = tx_ring->dma; 2915 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc); 2916 ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32))); 2917 ew32(TDBAH(0), (tdba >> 32)); 2918 ew32(TDLEN(0), tdlen); 2919 ew32(TDH(0), 0); 2920 ew32(TDT(0), 0); 2921 tx_ring->head = adapter->hw.hw_addr + E1000_TDH(0); 2922 tx_ring->tail = adapter->hw.hw_addr + E1000_TDT(0); 2923 2924 /* Set the Tx Interrupt Delay register */ 2925 ew32(TIDV, adapter->tx_int_delay); 2926 /* Tx irq moderation */ 2927 ew32(TADV, adapter->tx_abs_int_delay); 2928 2929 if (adapter->flags2 & FLAG2_DMA_BURST) { 2930 u32 txdctl = er32(TXDCTL(0)); 2931 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH | 2932 E1000_TXDCTL_WTHRESH); 2933 /* set up some performance related parameters to encourage the 2934 * hardware to use the bus more efficiently in bursts, depends 2935 * on the tx_int_delay to be enabled, 2936 * wthresh = 1 ==> burst write is disabled to avoid Tx stalls 2937 * hthresh = 1 ==> prefetch when one or more available 2938 * pthresh = 0x1f ==> prefetch if internal cache 31 or less 2939 * BEWARE: this seems to work but should be considered first if 2940 * there are Tx hangs or other Tx related bugs 2941 */ 2942 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE; 2943 ew32(TXDCTL(0), txdctl); 2944 } 2945 /* erratum work around: set txdctl the same for both queues */ 2946 ew32(TXDCTL(1), er32(TXDCTL(0))); 2947 2948 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) { 2949 tarc = er32(TARC(0)); 2950 /* set the speed mode bit, we'll clear it if we're not at 2951 * gigabit link later 2952 */ 2953 #define SPEED_MODE_BIT (1 << 21) 2954 tarc |= SPEED_MODE_BIT; 2955 ew32(TARC(0), tarc); 2956 } 2957 2958 /* errata: program both queues to unweighted RR */ 2959 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) { 2960 tarc = er32(TARC(0)); 2961 tarc |= 1; 2962 ew32(TARC(0), tarc); 2963 tarc = er32(TARC(1)); 2964 tarc |= 1; 2965 ew32(TARC(1), tarc); 2966 } 2967 2968 /* Setup Transmit Descriptor Settings for eop descriptor */ 2969 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS; 2970 2971 /* only set IDE if we are delaying interrupts using the timers */ 2972 if (adapter->tx_int_delay) 2973 adapter->txd_cmd |= E1000_TXD_CMD_IDE; 2974 2975 /* enable Report Status bit */ 2976 adapter->txd_cmd |= E1000_TXD_CMD_RS; 2977 2978 hw->mac.ops.config_collision_dist(hw); 2979 } 2980 2981 /** 2982 * e1000_setup_rctl - configure the receive control registers 2983 * @adapter: Board private structure 2984 **/ 2985 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \ 2986 (((S) & (PAGE_SIZE - 1)) ? 1 : 0)) 2987 static void e1000_setup_rctl(struct e1000_adapter *adapter) 2988 { 2989 struct e1000_hw *hw = &adapter->hw; 2990 u32 rctl, rfctl; 2991 u32 pages = 0; 2992 2993 /* Workaround Si errata on PCHx - configure jumbo frame flow */ 2994 if (hw->mac.type >= e1000_pch2lan) { 2995 s32 ret_val; 2996 2997 if (adapter->netdev->mtu > ETH_DATA_LEN) 2998 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true); 2999 else 3000 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false); 3001 3002 if (ret_val) 3003 e_dbg("failed to enable jumbo frame workaround mode\n"); 3004 } 3005 3006 /* Program MC offset vector base */ 3007 rctl = er32(RCTL); 3008 rctl &= ~(3 << E1000_RCTL_MO_SHIFT); 3009 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | 3010 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF | 3011 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT); 3012 3013 /* Do not Store bad packets */ 3014 rctl &= ~E1000_RCTL_SBP; 3015 3016 /* Enable Long Packet receive */ 3017 if (adapter->netdev->mtu <= ETH_DATA_LEN) 3018 rctl &= ~E1000_RCTL_LPE; 3019 else 3020 rctl |= E1000_RCTL_LPE; 3021 3022 /* Some systems expect that the CRC is included in SMBUS traffic. The 3023 * hardware strips the CRC before sending to both SMBUS (BMC) and to 3024 * host memory when this is enabled 3025 */ 3026 if (adapter->flags2 & FLAG2_CRC_STRIPPING) 3027 rctl |= E1000_RCTL_SECRC; 3028 3029 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */ 3030 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) { 3031 u16 phy_data; 3032 3033 e1e_rphy(hw, PHY_REG(770, 26), &phy_data); 3034 phy_data &= 0xfff8; 3035 phy_data |= (1 << 2); 3036 e1e_wphy(hw, PHY_REG(770, 26), phy_data); 3037 3038 e1e_rphy(hw, 22, &phy_data); 3039 phy_data &= 0x0fff; 3040 phy_data |= (1 << 14); 3041 e1e_wphy(hw, 0x10, 0x2823); 3042 e1e_wphy(hw, 0x11, 0x0003); 3043 e1e_wphy(hw, 22, phy_data); 3044 } 3045 3046 /* Setup buffer sizes */ 3047 rctl &= ~E1000_RCTL_SZ_4096; 3048 rctl |= E1000_RCTL_BSEX; 3049 switch (adapter->rx_buffer_len) { 3050 case 2048: 3051 default: 3052 rctl |= E1000_RCTL_SZ_2048; 3053 rctl &= ~E1000_RCTL_BSEX; 3054 break; 3055 case 4096: 3056 rctl |= E1000_RCTL_SZ_4096; 3057 break; 3058 case 8192: 3059 rctl |= E1000_RCTL_SZ_8192; 3060 break; 3061 case 16384: 3062 rctl |= E1000_RCTL_SZ_16384; 3063 break; 3064 } 3065 3066 /* Enable Extended Status in all Receive Descriptors */ 3067 rfctl = er32(RFCTL); 3068 rfctl |= E1000_RFCTL_EXTEN; 3069 ew32(RFCTL, rfctl); 3070 3071 /* 82571 and greater support packet-split where the protocol 3072 * header is placed in skb->data and the packet data is 3073 * placed in pages hanging off of skb_shinfo(skb)->nr_frags. 3074 * In the case of a non-split, skb->data is linearly filled, 3075 * followed by the page buffers. Therefore, skb->data is 3076 * sized to hold the largest protocol header. 3077 * 3078 * allocations using alloc_page take too long for regular MTU 3079 * so only enable packet split for jumbo frames 3080 * 3081 * Using pages when the page size is greater than 16k wastes 3082 * a lot of memory, since we allocate 3 pages at all times 3083 * per packet. 3084 */ 3085 pages = PAGE_USE_COUNT(adapter->netdev->mtu); 3086 if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE)) 3087 adapter->rx_ps_pages = pages; 3088 else 3089 adapter->rx_ps_pages = 0; 3090 3091 if (adapter->rx_ps_pages) { 3092 u32 psrctl = 0; 3093 3094 /* Enable Packet split descriptors */ 3095 rctl |= E1000_RCTL_DTYP_PS; 3096 3097 psrctl |= adapter->rx_ps_bsize0 >> 3098 E1000_PSRCTL_BSIZE0_SHIFT; 3099 3100 switch (adapter->rx_ps_pages) { 3101 case 3: 3102 psrctl |= PAGE_SIZE << 3103 E1000_PSRCTL_BSIZE3_SHIFT; 3104 case 2: 3105 psrctl |= PAGE_SIZE << 3106 E1000_PSRCTL_BSIZE2_SHIFT; 3107 case 1: 3108 psrctl |= PAGE_SIZE >> 3109 E1000_PSRCTL_BSIZE1_SHIFT; 3110 break; 3111 } 3112 3113 ew32(PSRCTL, psrctl); 3114 } 3115 3116 /* This is useful for sniffing bad packets. */ 3117 if (adapter->netdev->features & NETIF_F_RXALL) { 3118 /* UPE and MPE will be handled by normal PROMISC logic 3119 * in e1000e_set_rx_mode 3120 */ 3121 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */ 3122 E1000_RCTL_BAM | /* RX All Bcast Pkts */ 3123 E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */ 3124 3125 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */ 3126 E1000_RCTL_DPF | /* Allow filtered pause */ 3127 E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */ 3128 /* Do not mess with E1000_CTRL_VME, it affects transmit as well, 3129 * and that breaks VLANs. 3130 */ 3131 } 3132 3133 ew32(RCTL, rctl); 3134 /* just started the receive unit, no need to restart */ 3135 adapter->flags &= ~FLAG_RESTART_NOW; 3136 } 3137 3138 /** 3139 * e1000_configure_rx - Configure Receive Unit after Reset 3140 * @adapter: board private structure 3141 * 3142 * Configure the Rx unit of the MAC after a reset. 3143 **/ 3144 static void e1000_configure_rx(struct e1000_adapter *adapter) 3145 { 3146 struct e1000_hw *hw = &adapter->hw; 3147 struct e1000_ring *rx_ring = adapter->rx_ring; 3148 u64 rdba; 3149 u32 rdlen, rctl, rxcsum, ctrl_ext; 3150 3151 if (adapter->rx_ps_pages) { 3152 /* this is a 32 byte descriptor */ 3153 rdlen = rx_ring->count * 3154 sizeof(union e1000_rx_desc_packet_split); 3155 adapter->clean_rx = e1000_clean_rx_irq_ps; 3156 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps; 3157 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) { 3158 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended); 3159 adapter->clean_rx = e1000_clean_jumbo_rx_irq; 3160 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers; 3161 } else { 3162 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended); 3163 adapter->clean_rx = e1000_clean_rx_irq; 3164 adapter->alloc_rx_buf = e1000_alloc_rx_buffers; 3165 } 3166 3167 /* disable receives while setting up the descriptors */ 3168 rctl = er32(RCTL); 3169 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX)) 3170 ew32(RCTL, rctl & ~E1000_RCTL_EN); 3171 e1e_flush(); 3172 usleep_range(10000, 20000); 3173 3174 if (adapter->flags2 & FLAG2_DMA_BURST) { 3175 /* set the writeback threshold (only takes effect if the RDTR 3176 * is set). set GRAN=1 and write back up to 0x4 worth, and 3177 * enable prefetching of 0x20 Rx descriptors 3178 * granularity = 01 3179 * wthresh = 04, 3180 * hthresh = 04, 3181 * pthresh = 0x20 3182 */ 3183 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE); 3184 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE); 3185 3186 /* override the delay timers for enabling bursting, only if 3187 * the value was not set by the user via module options 3188 */ 3189 if (adapter->rx_int_delay == DEFAULT_RDTR) 3190 adapter->rx_int_delay = BURST_RDTR; 3191 if (adapter->rx_abs_int_delay == DEFAULT_RADV) 3192 adapter->rx_abs_int_delay = BURST_RADV; 3193 } 3194 3195 /* set the Receive Delay Timer Register */ 3196 ew32(RDTR, adapter->rx_int_delay); 3197 3198 /* irq moderation */ 3199 ew32(RADV, adapter->rx_abs_int_delay); 3200 if ((adapter->itr_setting != 0) && (adapter->itr != 0)) 3201 e1000e_write_itr(adapter, adapter->itr); 3202 3203 ctrl_ext = er32(CTRL_EXT); 3204 /* Auto-Mask interrupts upon ICR access */ 3205 ctrl_ext |= E1000_CTRL_EXT_IAME; 3206 ew32(IAM, 0xffffffff); 3207 ew32(CTRL_EXT, ctrl_ext); 3208 e1e_flush(); 3209 3210 /* Setup the HW Rx Head and Tail Descriptor Pointers and 3211 * the Base and Length of the Rx Descriptor Ring 3212 */ 3213 rdba = rx_ring->dma; 3214 ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32))); 3215 ew32(RDBAH(0), (rdba >> 32)); 3216 ew32(RDLEN(0), rdlen); 3217 ew32(RDH(0), 0); 3218 ew32(RDT(0), 0); 3219 rx_ring->head = adapter->hw.hw_addr + E1000_RDH(0); 3220 rx_ring->tail = adapter->hw.hw_addr + E1000_RDT(0); 3221 3222 /* Enable Receive Checksum Offload for TCP and UDP */ 3223 rxcsum = er32(RXCSUM); 3224 if (adapter->netdev->features & NETIF_F_RXCSUM) 3225 rxcsum |= E1000_RXCSUM_TUOFL; 3226 else 3227 rxcsum &= ~E1000_RXCSUM_TUOFL; 3228 ew32(RXCSUM, rxcsum); 3229 3230 /* With jumbo frames, excessive C-state transition latencies result 3231 * in dropped transactions. 3232 */ 3233 if (adapter->netdev->mtu > ETH_DATA_LEN) { 3234 u32 lat = 3235 ((er32(PBA) & E1000_PBA_RXA_MASK) * 1024 - 3236 adapter->max_frame_size) * 8 / 1000; 3237 3238 if (adapter->flags & FLAG_IS_ICH) { 3239 u32 rxdctl = er32(RXDCTL(0)); 3240 ew32(RXDCTL(0), rxdctl | 0x3); 3241 } 3242 3243 pm_qos_update_request(&adapter->netdev->pm_qos_req, lat); 3244 } else { 3245 pm_qos_update_request(&adapter->netdev->pm_qos_req, 3246 PM_QOS_DEFAULT_VALUE); 3247 } 3248 3249 /* Enable Receives */ 3250 ew32(RCTL, rctl); 3251 } 3252 3253 /** 3254 * e1000e_write_mc_addr_list - write multicast addresses to MTA 3255 * @netdev: network interface device structure 3256 * 3257 * Writes multicast address list to the MTA hash table. 3258 * Returns: -ENOMEM on failure 3259 * 0 on no addresses written 3260 * X on writing X addresses to MTA 3261 */ 3262 static int e1000e_write_mc_addr_list(struct net_device *netdev) 3263 { 3264 struct e1000_adapter *adapter = netdev_priv(netdev); 3265 struct e1000_hw *hw = &adapter->hw; 3266 struct netdev_hw_addr *ha; 3267 u8 *mta_list; 3268 int i; 3269 3270 if (netdev_mc_empty(netdev)) { 3271 /* nothing to program, so clear mc list */ 3272 hw->mac.ops.update_mc_addr_list(hw, NULL, 0); 3273 return 0; 3274 } 3275 3276 mta_list = kzalloc(netdev_mc_count(netdev) * ETH_ALEN, GFP_ATOMIC); 3277 if (!mta_list) 3278 return -ENOMEM; 3279 3280 /* update_mc_addr_list expects a packed array of only addresses. */ 3281 i = 0; 3282 netdev_for_each_mc_addr(ha, netdev) 3283 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN); 3284 3285 hw->mac.ops.update_mc_addr_list(hw, mta_list, i); 3286 kfree(mta_list); 3287 3288 return netdev_mc_count(netdev); 3289 } 3290 3291 /** 3292 * e1000e_write_uc_addr_list - write unicast addresses to RAR table 3293 * @netdev: network interface device structure 3294 * 3295 * Writes unicast address list to the RAR table. 3296 * Returns: -ENOMEM on failure/insufficient address space 3297 * 0 on no addresses written 3298 * X on writing X addresses to the RAR table 3299 **/ 3300 static int e1000e_write_uc_addr_list(struct net_device *netdev) 3301 { 3302 struct e1000_adapter *adapter = netdev_priv(netdev); 3303 struct e1000_hw *hw = &adapter->hw; 3304 unsigned int rar_entries = hw->mac.rar_entry_count; 3305 int count = 0; 3306 3307 /* save a rar entry for our hardware address */ 3308 rar_entries--; 3309 3310 /* save a rar entry for the LAA workaround */ 3311 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) 3312 rar_entries--; 3313 3314 /* return ENOMEM indicating insufficient memory for addresses */ 3315 if (netdev_uc_count(netdev) > rar_entries) 3316 return -ENOMEM; 3317 3318 if (!netdev_uc_empty(netdev) && rar_entries) { 3319 struct netdev_hw_addr *ha; 3320 3321 /* write the addresses in reverse order to avoid write 3322 * combining 3323 */ 3324 netdev_for_each_uc_addr(ha, netdev) { 3325 if (!rar_entries) 3326 break; 3327 hw->mac.ops.rar_set(hw, ha->addr, rar_entries--); 3328 count++; 3329 } 3330 } 3331 3332 /* zero out the remaining RAR entries not used above */ 3333 for (; rar_entries > 0; rar_entries--) { 3334 ew32(RAH(rar_entries), 0); 3335 ew32(RAL(rar_entries), 0); 3336 } 3337 e1e_flush(); 3338 3339 return count; 3340 } 3341 3342 /** 3343 * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set 3344 * @netdev: network interface device structure 3345 * 3346 * The ndo_set_rx_mode entry point is called whenever the unicast or multicast 3347 * address list or the network interface flags are updated. This routine is 3348 * responsible for configuring the hardware for proper unicast, multicast, 3349 * promiscuous mode, and all-multi behavior. 3350 **/ 3351 static void e1000e_set_rx_mode(struct net_device *netdev) 3352 { 3353 struct e1000_adapter *adapter = netdev_priv(netdev); 3354 struct e1000_hw *hw = &adapter->hw; 3355 u32 rctl; 3356 3357 /* Check for Promiscuous and All Multicast modes */ 3358 rctl = er32(RCTL); 3359 3360 /* clear the affected bits */ 3361 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE); 3362 3363 if (netdev->flags & IFF_PROMISC) { 3364 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); 3365 /* Do not hardware filter VLANs in promisc mode */ 3366 e1000e_vlan_filter_disable(adapter); 3367 } else { 3368 int count; 3369 3370 if (netdev->flags & IFF_ALLMULTI) { 3371 rctl |= E1000_RCTL_MPE; 3372 } else { 3373 /* Write addresses to the MTA, if the attempt fails 3374 * then we should just turn on promiscuous mode so 3375 * that we can at least receive multicast traffic 3376 */ 3377 count = e1000e_write_mc_addr_list(netdev); 3378 if (count < 0) 3379 rctl |= E1000_RCTL_MPE; 3380 } 3381 e1000e_vlan_filter_enable(adapter); 3382 /* Write addresses to available RAR registers, if there is not 3383 * sufficient space to store all the addresses then enable 3384 * unicast promiscuous mode 3385 */ 3386 count = e1000e_write_uc_addr_list(netdev); 3387 if (count < 0) 3388 rctl |= E1000_RCTL_UPE; 3389 } 3390 3391 ew32(RCTL, rctl); 3392 3393 if (netdev->features & NETIF_F_HW_VLAN_RX) 3394 e1000e_vlan_strip_enable(adapter); 3395 else 3396 e1000e_vlan_strip_disable(adapter); 3397 } 3398 3399 static void e1000e_setup_rss_hash(struct e1000_adapter *adapter) 3400 { 3401 struct e1000_hw *hw = &adapter->hw; 3402 u32 mrqc, rxcsum; 3403 int i; 3404 static const u32 rsskey[10] = { 3405 0xda565a6d, 0xc20e5b25, 0x3d256741, 0xb08fa343, 0xcb2bcad0, 3406 0xb4307bae, 0xa32dcb77, 0x0cf23080, 0x3bb7426a, 0xfa01acbe 3407 }; 3408 3409 /* Fill out hash function seed */ 3410 for (i = 0; i < 10; i++) 3411 ew32(RSSRK(i), rsskey[i]); 3412 3413 /* Direct all traffic to queue 0 */ 3414 for (i = 0; i < 32; i++) 3415 ew32(RETA(i), 0); 3416 3417 /* Disable raw packet checksumming so that RSS hash is placed in 3418 * descriptor on writeback. 3419 */ 3420 rxcsum = er32(RXCSUM); 3421 rxcsum |= E1000_RXCSUM_PCSD; 3422 3423 ew32(RXCSUM, rxcsum); 3424 3425 mrqc = (E1000_MRQC_RSS_FIELD_IPV4 | 3426 E1000_MRQC_RSS_FIELD_IPV4_TCP | 3427 E1000_MRQC_RSS_FIELD_IPV6 | 3428 E1000_MRQC_RSS_FIELD_IPV6_TCP | 3429 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX); 3430 3431 ew32(MRQC, mrqc); 3432 } 3433 3434 /** 3435 * e1000e_get_base_timinca - get default SYSTIM time increment attributes 3436 * @adapter: board private structure 3437 * @timinca: pointer to returned time increment attributes 3438 * 3439 * Get attributes for incrementing the System Time Register SYSTIML/H at 3440 * the default base frequency, and set the cyclecounter shift value. 3441 **/ 3442 s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca) 3443 { 3444 struct e1000_hw *hw = &adapter->hw; 3445 u32 incvalue, incperiod, shift; 3446 3447 /* Make sure clock is enabled on I217 before checking the frequency */ 3448 if ((hw->mac.type == e1000_pch_lpt) && 3449 !(er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) && 3450 !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_ENABLED)) { 3451 u32 fextnvm7 = er32(FEXTNVM7); 3452 3453 if (!(fextnvm7 & (1 << 0))) { 3454 ew32(FEXTNVM7, fextnvm7 | (1 << 0)); 3455 e1e_flush(); 3456 } 3457 } 3458 3459 switch (hw->mac.type) { 3460 case e1000_pch2lan: 3461 case e1000_pch_lpt: 3462 /* On I217, the clock frequency is 25MHz or 96MHz as 3463 * indicated by the System Clock Frequency Indication 3464 */ 3465 if ((hw->mac.type != e1000_pch_lpt) || 3466 (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)) { 3467 /* Stable 96MHz frequency */ 3468 incperiod = INCPERIOD_96MHz; 3469 incvalue = INCVALUE_96MHz; 3470 shift = INCVALUE_SHIFT_96MHz; 3471 adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHz; 3472 break; 3473 } 3474 /* fall-through */ 3475 case e1000_82574: 3476 case e1000_82583: 3477 /* Stable 25MHz frequency */ 3478 incperiod = INCPERIOD_25MHz; 3479 incvalue = INCVALUE_25MHz; 3480 shift = INCVALUE_SHIFT_25MHz; 3481 adapter->cc.shift = shift; 3482 break; 3483 default: 3484 return -EINVAL; 3485 } 3486 3487 *timinca = ((incperiod << E1000_TIMINCA_INCPERIOD_SHIFT) | 3488 ((incvalue << shift) & E1000_TIMINCA_INCVALUE_MASK)); 3489 3490 return 0; 3491 } 3492 3493 /** 3494 * e1000e_config_hwtstamp - configure the hwtstamp registers and enable/disable 3495 * @adapter: board private structure 3496 * 3497 * Outgoing time stamping can be enabled and disabled. Play nice and 3498 * disable it when requested, although it shouldn't cause any overhead 3499 * when no packet needs it. At most one packet in the queue may be 3500 * marked for time stamping, otherwise it would be impossible to tell 3501 * for sure to which packet the hardware time stamp belongs. 3502 * 3503 * Incoming time stamping has to be configured via the hardware filters. 3504 * Not all combinations are supported, in particular event type has to be 3505 * specified. Matching the kind of event packet is not supported, with the 3506 * exception of "all V2 events regardless of level 2 or 4". 3507 **/ 3508 static int e1000e_config_hwtstamp(struct e1000_adapter *adapter) 3509 { 3510 struct e1000_hw *hw = &adapter->hw; 3511 struct hwtstamp_config *config = &adapter->hwtstamp_config; 3512 u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED; 3513 u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED; 3514 u32 rxmtrl = 0; 3515 u16 rxudp = 0; 3516 bool is_l4 = false; 3517 bool is_l2 = false; 3518 u32 regval; 3519 s32 ret_val; 3520 3521 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP)) 3522 return -EINVAL; 3523 3524 /* flags reserved for future extensions - must be zero */ 3525 if (config->flags) 3526 return -EINVAL; 3527 3528 switch (config->tx_type) { 3529 case HWTSTAMP_TX_OFF: 3530 tsync_tx_ctl = 0; 3531 break; 3532 case HWTSTAMP_TX_ON: 3533 break; 3534 default: 3535 return -ERANGE; 3536 } 3537 3538 switch (config->rx_filter) { 3539 case HWTSTAMP_FILTER_NONE: 3540 tsync_rx_ctl = 0; 3541 break; 3542 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: 3543 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1; 3544 rxmtrl = E1000_RXMTRL_PTP_V1_SYNC_MESSAGE; 3545 is_l4 = true; 3546 break; 3547 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: 3548 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1; 3549 rxmtrl = E1000_RXMTRL_PTP_V1_DELAY_REQ_MESSAGE; 3550 is_l4 = true; 3551 break; 3552 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: 3553 /* Also time stamps V2 L2 Path Delay Request/Response */ 3554 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2; 3555 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE; 3556 is_l2 = true; 3557 break; 3558 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: 3559 /* Also time stamps V2 L2 Path Delay Request/Response. */ 3560 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2; 3561 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE; 3562 is_l2 = true; 3563 break; 3564 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: 3565 /* Hardware cannot filter just V2 L4 Sync messages; 3566 * fall-through to V2 (both L2 and L4) Sync. 3567 */ 3568 case HWTSTAMP_FILTER_PTP_V2_SYNC: 3569 /* Also time stamps V2 Path Delay Request/Response. */ 3570 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2; 3571 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE; 3572 is_l2 = true; 3573 is_l4 = true; 3574 break; 3575 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: 3576 /* Hardware cannot filter just V2 L4 Delay Request messages; 3577 * fall-through to V2 (both L2 and L4) Delay Request. 3578 */ 3579 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: 3580 /* Also time stamps V2 Path Delay Request/Response. */ 3581 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2; 3582 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE; 3583 is_l2 = true; 3584 is_l4 = true; 3585 break; 3586 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: 3587 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: 3588 /* Hardware cannot filter just V2 L4 or L2 Event messages; 3589 * fall-through to all V2 (both L2 and L4) Events. 3590 */ 3591 case HWTSTAMP_FILTER_PTP_V2_EVENT: 3592 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2; 3593 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT; 3594 is_l2 = true; 3595 is_l4 = true; 3596 break; 3597 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: 3598 /* For V1, the hardware can only filter Sync messages or 3599 * Delay Request messages but not both so fall-through to 3600 * time stamp all packets. 3601 */ 3602 case HWTSTAMP_FILTER_ALL: 3603 is_l2 = true; 3604 is_l4 = true; 3605 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL; 3606 config->rx_filter = HWTSTAMP_FILTER_ALL; 3607 break; 3608 default: 3609 return -ERANGE; 3610 } 3611 3612 /* enable/disable Tx h/w time stamping */ 3613 regval = er32(TSYNCTXCTL); 3614 regval &= ~E1000_TSYNCTXCTL_ENABLED; 3615 regval |= tsync_tx_ctl; 3616 ew32(TSYNCTXCTL, regval); 3617 if ((er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) != 3618 (regval & E1000_TSYNCTXCTL_ENABLED)) { 3619 e_err("Timesync Tx Control register not set as expected\n"); 3620 return -EAGAIN; 3621 } 3622 3623 /* enable/disable Rx h/w time stamping */ 3624 regval = er32(TSYNCRXCTL); 3625 regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK); 3626 regval |= tsync_rx_ctl; 3627 ew32(TSYNCRXCTL, regval); 3628 if ((er32(TSYNCRXCTL) & (E1000_TSYNCRXCTL_ENABLED | 3629 E1000_TSYNCRXCTL_TYPE_MASK)) != 3630 (regval & (E1000_TSYNCRXCTL_ENABLED | 3631 E1000_TSYNCRXCTL_TYPE_MASK))) { 3632 e_err("Timesync Rx Control register not set as expected\n"); 3633 return -EAGAIN; 3634 } 3635 3636 /* L2: define ethertype filter for time stamped packets */ 3637 if (is_l2) 3638 rxmtrl |= ETH_P_1588; 3639 3640 /* define which PTP packets get time stamped */ 3641 ew32(RXMTRL, rxmtrl); 3642 3643 /* Filter by destination port */ 3644 if (is_l4) { 3645 rxudp = PTP_EV_PORT; 3646 cpu_to_be16s(&rxudp); 3647 } 3648 ew32(RXUDP, rxudp); 3649 3650 e1e_flush(); 3651 3652 /* Clear TSYNCRXCTL_VALID & TSYNCTXCTL_VALID bit */ 3653 er32(RXSTMPH); 3654 er32(TXSTMPH); 3655 3656 /* Get and set the System Time Register SYSTIM base frequency */ 3657 ret_val = e1000e_get_base_timinca(adapter, ®val); 3658 if (ret_val) 3659 return ret_val; 3660 ew32(TIMINCA, regval); 3661 3662 /* reset the ns time counter */ 3663 timecounter_init(&adapter->tc, &adapter->cc, 3664 ktime_to_ns(ktime_get_real())); 3665 3666 return 0; 3667 } 3668 3669 /** 3670 * e1000_configure - configure the hardware for Rx and Tx 3671 * @adapter: private board structure 3672 **/ 3673 static void e1000_configure(struct e1000_adapter *adapter) 3674 { 3675 struct e1000_ring *rx_ring = adapter->rx_ring; 3676 3677 e1000e_set_rx_mode(adapter->netdev); 3678 3679 e1000_restore_vlan(adapter); 3680 e1000_init_manageability_pt(adapter); 3681 3682 e1000_configure_tx(adapter); 3683 3684 if (adapter->netdev->features & NETIF_F_RXHASH) 3685 e1000e_setup_rss_hash(adapter); 3686 e1000_setup_rctl(adapter); 3687 e1000_configure_rx(adapter); 3688 adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL); 3689 } 3690 3691 /** 3692 * e1000e_power_up_phy - restore link in case the phy was powered down 3693 * @adapter: address of board private structure 3694 * 3695 * The phy may be powered down to save power and turn off link when the 3696 * driver is unloaded and wake on lan is not enabled (among others) 3697 * *** this routine MUST be followed by a call to e1000e_reset *** 3698 **/ 3699 void e1000e_power_up_phy(struct e1000_adapter *adapter) 3700 { 3701 if (adapter->hw.phy.ops.power_up) 3702 adapter->hw.phy.ops.power_up(&adapter->hw); 3703 3704 adapter->hw.mac.ops.setup_link(&adapter->hw); 3705 } 3706 3707 /** 3708 * e1000_power_down_phy - Power down the PHY 3709 * 3710 * Power down the PHY so no link is implied when interface is down. 3711 * The PHY cannot be powered down if management or WoL is active. 3712 */ 3713 static void e1000_power_down_phy(struct e1000_adapter *adapter) 3714 { 3715 /* WoL is enabled */ 3716 if (adapter->wol) 3717 return; 3718 3719 if (adapter->hw.phy.ops.power_down) 3720 adapter->hw.phy.ops.power_down(&adapter->hw); 3721 } 3722 3723 /** 3724 * e1000e_reset - bring the hardware into a known good state 3725 * 3726 * This function boots the hardware and enables some settings that 3727 * require a configuration cycle of the hardware - those cannot be 3728 * set/changed during runtime. After reset the device needs to be 3729 * properly configured for Rx, Tx etc. 3730 */ 3731 void e1000e_reset(struct e1000_adapter *adapter) 3732 { 3733 struct e1000_mac_info *mac = &adapter->hw.mac; 3734 struct e1000_fc_info *fc = &adapter->hw.fc; 3735 struct e1000_hw *hw = &adapter->hw; 3736 u32 tx_space, min_tx_space, min_rx_space; 3737 u32 pba = adapter->pba; 3738 u16 hwm; 3739 3740 /* reset Packet Buffer Allocation to default */ 3741 ew32(PBA, pba); 3742 3743 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) { 3744 /* To maintain wire speed transmits, the Tx FIFO should be 3745 * large enough to accommodate two full transmit packets, 3746 * rounded up to the next 1KB and expressed in KB. Likewise, 3747 * the Rx FIFO should be large enough to accommodate at least 3748 * one full receive packet and is similarly rounded up and 3749 * expressed in KB. 3750 */ 3751 pba = er32(PBA); 3752 /* upper 16 bits has Tx packet buffer allocation size in KB */ 3753 tx_space = pba >> 16; 3754 /* lower 16 bits has Rx packet buffer allocation size in KB */ 3755 pba &= 0xffff; 3756 /* the Tx fifo also stores 16 bytes of information about the Tx 3757 * but don't include ethernet FCS because hardware appends it 3758 */ 3759 min_tx_space = (adapter->max_frame_size + 3760 sizeof(struct e1000_tx_desc) - 3761 ETH_FCS_LEN) * 2; 3762 min_tx_space = ALIGN(min_tx_space, 1024); 3763 min_tx_space >>= 10; 3764 /* software strips receive CRC, so leave room for it */ 3765 min_rx_space = adapter->max_frame_size; 3766 min_rx_space = ALIGN(min_rx_space, 1024); 3767 min_rx_space >>= 10; 3768 3769 /* If current Tx allocation is less than the min Tx FIFO size, 3770 * and the min Tx FIFO size is less than the current Rx FIFO 3771 * allocation, take space away from current Rx allocation 3772 */ 3773 if ((tx_space < min_tx_space) && 3774 ((min_tx_space - tx_space) < pba)) { 3775 pba -= min_tx_space - tx_space; 3776 3777 /* if short on Rx space, Rx wins and must trump Tx 3778 * adjustment 3779 */ 3780 if (pba < min_rx_space) 3781 pba = min_rx_space; 3782 } 3783 3784 ew32(PBA, pba); 3785 } 3786 3787 /* flow control settings 3788 * 3789 * The high water mark must be low enough to fit one full frame 3790 * (or the size used for early receive) above it in the Rx FIFO. 3791 * Set it to the lower of: 3792 * - 90% of the Rx FIFO size, and 3793 * - the full Rx FIFO size minus one full frame 3794 */ 3795 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME) 3796 fc->pause_time = 0xFFFF; 3797 else 3798 fc->pause_time = E1000_FC_PAUSE_TIME; 3799 fc->send_xon = true; 3800 fc->current_mode = fc->requested_mode; 3801 3802 switch (hw->mac.type) { 3803 case e1000_ich9lan: 3804 case e1000_ich10lan: 3805 if (adapter->netdev->mtu > ETH_DATA_LEN) { 3806 pba = 14; 3807 ew32(PBA, pba); 3808 fc->high_water = 0x2800; 3809 fc->low_water = fc->high_water - 8; 3810 break; 3811 } 3812 /* fall-through */ 3813 default: 3814 hwm = min(((pba << 10) * 9 / 10), 3815 ((pba << 10) - adapter->max_frame_size)); 3816 3817 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */ 3818 fc->low_water = fc->high_water - 8; 3819 break; 3820 case e1000_pchlan: 3821 /* Workaround PCH LOM adapter hangs with certain network 3822 * loads. If hangs persist, try disabling Tx flow control. 3823 */ 3824 if (adapter->netdev->mtu > ETH_DATA_LEN) { 3825 fc->high_water = 0x3500; 3826 fc->low_water = 0x1500; 3827 } else { 3828 fc->high_water = 0x5000; 3829 fc->low_water = 0x3000; 3830 } 3831 fc->refresh_time = 0x1000; 3832 break; 3833 case e1000_pch2lan: 3834 case e1000_pch_lpt: 3835 fc->refresh_time = 0x0400; 3836 3837 if (adapter->netdev->mtu <= ETH_DATA_LEN) { 3838 fc->high_water = 0x05C20; 3839 fc->low_water = 0x05048; 3840 fc->pause_time = 0x0650; 3841 break; 3842 } 3843 3844 fc->high_water = ((pba << 10) * 9 / 10) & E1000_FCRTH_RTH; 3845 fc->low_water = ((pba << 10) * 8 / 10) & E1000_FCRTL_RTL; 3846 break; 3847 } 3848 3849 /* Alignment of Tx data is on an arbitrary byte boundary with the 3850 * maximum size per Tx descriptor limited only to the transmit 3851 * allocation of the packet buffer minus 96 bytes with an upper 3852 * limit of 24KB due to receive synchronization limitations. 3853 */ 3854 adapter->tx_fifo_limit = min_t(u32, ((er32(PBA) >> 16) << 10) - 96, 3855 24 << 10); 3856 3857 /* Disable Adaptive Interrupt Moderation if 2 full packets cannot 3858 * fit in receive buffer. 3859 */ 3860 if (adapter->itr_setting & 0x3) { 3861 if ((adapter->max_frame_size * 2) > (pba << 10)) { 3862 if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) { 3863 dev_info(&adapter->pdev->dev, 3864 "Interrupt Throttle Rate turned off\n"); 3865 adapter->flags2 |= FLAG2_DISABLE_AIM; 3866 e1000e_write_itr(adapter, 0); 3867 } 3868 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) { 3869 dev_info(&adapter->pdev->dev, 3870 "Interrupt Throttle Rate turned on\n"); 3871 adapter->flags2 &= ~FLAG2_DISABLE_AIM; 3872 adapter->itr = 20000; 3873 e1000e_write_itr(adapter, adapter->itr); 3874 } 3875 } 3876 3877 /* Allow time for pending master requests to run */ 3878 mac->ops.reset_hw(hw); 3879 3880 /* For parts with AMT enabled, let the firmware know 3881 * that the network interface is in control 3882 */ 3883 if (adapter->flags & FLAG_HAS_AMT) 3884 e1000e_get_hw_control(adapter); 3885 3886 ew32(WUC, 0); 3887 3888 if (mac->ops.init_hw(hw)) 3889 e_err("Hardware Error\n"); 3890 3891 e1000_update_mng_vlan(adapter); 3892 3893 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */ 3894 ew32(VET, ETH_P_8021Q); 3895 3896 e1000e_reset_adaptive(hw); 3897 3898 /* initialize systim and reset the ns time counter */ 3899 e1000e_config_hwtstamp(adapter); 3900 3901 if (!netif_running(adapter->netdev) && 3902 !test_bit(__E1000_TESTING, &adapter->state)) { 3903 e1000_power_down_phy(adapter); 3904 return; 3905 } 3906 3907 e1000_get_phy_info(hw); 3908 3909 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) && 3910 !(adapter->flags & FLAG_SMART_POWER_DOWN)) { 3911 u16 phy_data = 0; 3912 /* speed up time to link by disabling smart power down, ignore 3913 * the return value of this function because there is nothing 3914 * different we would do if it failed 3915 */ 3916 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data); 3917 phy_data &= ~IGP02E1000_PM_SPD; 3918 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data); 3919 } 3920 } 3921 3922 int e1000e_up(struct e1000_adapter *adapter) 3923 { 3924 struct e1000_hw *hw = &adapter->hw; 3925 3926 /* hardware has been reset, we need to reload some things */ 3927 e1000_configure(adapter); 3928 3929 clear_bit(__E1000_DOWN, &adapter->state); 3930 3931 if (adapter->msix_entries) 3932 e1000_configure_msix(adapter); 3933 e1000_irq_enable(adapter); 3934 3935 netif_start_queue(adapter->netdev); 3936 3937 /* fire a link change interrupt to start the watchdog */ 3938 if (adapter->msix_entries) 3939 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER); 3940 else 3941 ew32(ICS, E1000_ICS_LSC); 3942 3943 return 0; 3944 } 3945 3946 static void e1000e_flush_descriptors(struct e1000_adapter *adapter) 3947 { 3948 struct e1000_hw *hw = &adapter->hw; 3949 3950 if (!(adapter->flags2 & FLAG2_DMA_BURST)) 3951 return; 3952 3953 /* flush pending descriptor writebacks to memory */ 3954 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); 3955 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD); 3956 3957 /* execute the writes immediately */ 3958 e1e_flush(); 3959 3960 /* due to rare timing issues, write to TIDV/RDTR again to ensure the 3961 * write is successful 3962 */ 3963 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); 3964 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD); 3965 3966 /* execute the writes immediately */ 3967 e1e_flush(); 3968 } 3969 3970 static void e1000e_update_stats(struct e1000_adapter *adapter); 3971 3972 void e1000e_down(struct e1000_adapter *adapter) 3973 { 3974 struct net_device *netdev = adapter->netdev; 3975 struct e1000_hw *hw = &adapter->hw; 3976 u32 tctl, rctl; 3977 3978 /* signal that we're down so the interrupt handler does not 3979 * reschedule our watchdog timer 3980 */ 3981 set_bit(__E1000_DOWN, &adapter->state); 3982 3983 /* disable receives in the hardware */ 3984 rctl = er32(RCTL); 3985 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX)) 3986 ew32(RCTL, rctl & ~E1000_RCTL_EN); 3987 /* flush and sleep below */ 3988 3989 netif_stop_queue(netdev); 3990 3991 /* disable transmits in the hardware */ 3992 tctl = er32(TCTL); 3993 tctl &= ~E1000_TCTL_EN; 3994 ew32(TCTL, tctl); 3995 3996 /* flush both disables and wait for them to finish */ 3997 e1e_flush(); 3998 usleep_range(10000, 20000); 3999 4000 e1000_irq_disable(adapter); 4001 4002 del_timer_sync(&adapter->watchdog_timer); 4003 del_timer_sync(&adapter->phy_info_timer); 4004 4005 netif_carrier_off(netdev); 4006 4007 spin_lock(&adapter->stats64_lock); 4008 e1000e_update_stats(adapter); 4009 spin_unlock(&adapter->stats64_lock); 4010 4011 e1000e_flush_descriptors(adapter); 4012 e1000_clean_tx_ring(adapter->tx_ring); 4013 e1000_clean_rx_ring(adapter->rx_ring); 4014 4015 adapter->link_speed = 0; 4016 adapter->link_duplex = 0; 4017 4018 if (!pci_channel_offline(adapter->pdev)) 4019 e1000e_reset(adapter); 4020 4021 /* TODO: for power management, we could drop the link and 4022 * pci_disable_device here. 4023 */ 4024 } 4025 4026 void e1000e_reinit_locked(struct e1000_adapter *adapter) 4027 { 4028 might_sleep(); 4029 while (test_and_set_bit(__E1000_RESETTING, &adapter->state)) 4030 usleep_range(1000, 2000); 4031 e1000e_down(adapter); 4032 e1000e_up(adapter); 4033 clear_bit(__E1000_RESETTING, &adapter->state); 4034 } 4035 4036 /** 4037 * e1000e_cyclecounter_read - read raw cycle counter (used by time counter) 4038 * @cc: cyclecounter structure 4039 **/ 4040 static cycle_t e1000e_cyclecounter_read(const struct cyclecounter *cc) 4041 { 4042 struct e1000_adapter *adapter = container_of(cc, struct e1000_adapter, 4043 cc); 4044 struct e1000_hw *hw = &adapter->hw; 4045 cycle_t systim; 4046 4047 /* latch SYSTIMH on read of SYSTIML */ 4048 systim = (cycle_t)er32(SYSTIML); 4049 systim |= (cycle_t)er32(SYSTIMH) << 32; 4050 4051 return systim; 4052 } 4053 4054 /** 4055 * e1000_sw_init - Initialize general software structures (struct e1000_adapter) 4056 * @adapter: board private structure to initialize 4057 * 4058 * e1000_sw_init initializes the Adapter private data structure. 4059 * Fields are initialized based on PCI device information and 4060 * OS network device settings (MTU size). 4061 **/ 4062 static int e1000_sw_init(struct e1000_adapter *adapter) 4063 { 4064 struct net_device *netdev = adapter->netdev; 4065 4066 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN; 4067 adapter->rx_ps_bsize0 = 128; 4068 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; 4069 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN; 4070 adapter->tx_ring_count = E1000_DEFAULT_TXD; 4071 adapter->rx_ring_count = E1000_DEFAULT_RXD; 4072 4073 spin_lock_init(&adapter->stats64_lock); 4074 4075 e1000e_set_interrupt_capability(adapter); 4076 4077 if (e1000_alloc_queues(adapter)) 4078 return -ENOMEM; 4079 4080 /* Setup hardware time stamping cyclecounter */ 4081 if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) { 4082 adapter->cc.read = e1000e_cyclecounter_read; 4083 adapter->cc.mask = CLOCKSOURCE_MASK(64); 4084 adapter->cc.mult = 1; 4085 /* cc.shift set in e1000e_get_base_tininca() */ 4086 4087 spin_lock_init(&adapter->systim_lock); 4088 INIT_WORK(&adapter->tx_hwtstamp_work, e1000e_tx_hwtstamp_work); 4089 } 4090 4091 /* Explicitly disable IRQ since the NIC can be in any state. */ 4092 e1000_irq_disable(adapter); 4093 4094 set_bit(__E1000_DOWN, &adapter->state); 4095 return 0; 4096 } 4097 4098 /** 4099 * e1000_intr_msi_test - Interrupt Handler 4100 * @irq: interrupt number 4101 * @data: pointer to a network interface device structure 4102 **/ 4103 static irqreturn_t e1000_intr_msi_test(int __always_unused irq, void *data) 4104 { 4105 struct net_device *netdev = data; 4106 struct e1000_adapter *adapter = netdev_priv(netdev); 4107 struct e1000_hw *hw = &adapter->hw; 4108 u32 icr = er32(ICR); 4109 4110 e_dbg("icr is %08X\n", icr); 4111 if (icr & E1000_ICR_RXSEQ) { 4112 adapter->flags &= ~FLAG_MSI_TEST_FAILED; 4113 /* Force memory writes to complete before acknowledging the 4114 * interrupt is handled. 4115 */ 4116 wmb(); 4117 } 4118 4119 return IRQ_HANDLED; 4120 } 4121 4122 /** 4123 * e1000_test_msi_interrupt - Returns 0 for successful test 4124 * @adapter: board private struct 4125 * 4126 * code flow taken from tg3.c 4127 **/ 4128 static int e1000_test_msi_interrupt(struct e1000_adapter *adapter) 4129 { 4130 struct net_device *netdev = adapter->netdev; 4131 struct e1000_hw *hw = &adapter->hw; 4132 int err; 4133 4134 /* poll_enable hasn't been called yet, so don't need disable */ 4135 /* clear any pending events */ 4136 er32(ICR); 4137 4138 /* free the real vector and request a test handler */ 4139 e1000_free_irq(adapter); 4140 e1000e_reset_interrupt_capability(adapter); 4141 4142 /* Assume that the test fails, if it succeeds then the test 4143 * MSI irq handler will unset this flag 4144 */ 4145 adapter->flags |= FLAG_MSI_TEST_FAILED; 4146 4147 err = pci_enable_msi(adapter->pdev); 4148 if (err) 4149 goto msi_test_failed; 4150 4151 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0, 4152 netdev->name, netdev); 4153 if (err) { 4154 pci_disable_msi(adapter->pdev); 4155 goto msi_test_failed; 4156 } 4157 4158 /* Force memory writes to complete before enabling and firing an 4159 * interrupt. 4160 */ 4161 wmb(); 4162 4163 e1000_irq_enable(adapter); 4164 4165 /* fire an unusual interrupt on the test handler */ 4166 ew32(ICS, E1000_ICS_RXSEQ); 4167 e1e_flush(); 4168 msleep(100); 4169 4170 e1000_irq_disable(adapter); 4171 4172 rmb(); /* read flags after interrupt has been fired */ 4173 4174 if (adapter->flags & FLAG_MSI_TEST_FAILED) { 4175 adapter->int_mode = E1000E_INT_MODE_LEGACY; 4176 e_info("MSI interrupt test failed, using legacy interrupt.\n"); 4177 } else { 4178 e_dbg("MSI interrupt test succeeded!\n"); 4179 } 4180 4181 free_irq(adapter->pdev->irq, netdev); 4182 pci_disable_msi(adapter->pdev); 4183 4184 msi_test_failed: 4185 e1000e_set_interrupt_capability(adapter); 4186 return e1000_request_irq(adapter); 4187 } 4188 4189 /** 4190 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored 4191 * @adapter: board private struct 4192 * 4193 * code flow taken from tg3.c, called with e1000 interrupts disabled. 4194 **/ 4195 static int e1000_test_msi(struct e1000_adapter *adapter) 4196 { 4197 int err; 4198 u16 pci_cmd; 4199 4200 if (!(adapter->flags & FLAG_MSI_ENABLED)) 4201 return 0; 4202 4203 /* disable SERR in case the MSI write causes a master abort */ 4204 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd); 4205 if (pci_cmd & PCI_COMMAND_SERR) 4206 pci_write_config_word(adapter->pdev, PCI_COMMAND, 4207 pci_cmd & ~PCI_COMMAND_SERR); 4208 4209 err = e1000_test_msi_interrupt(adapter); 4210 4211 /* re-enable SERR */ 4212 if (pci_cmd & PCI_COMMAND_SERR) { 4213 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd); 4214 pci_cmd |= PCI_COMMAND_SERR; 4215 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd); 4216 } 4217 4218 return err; 4219 } 4220 4221 /** 4222 * e1000_open - Called when a network interface is made active 4223 * @netdev: network interface device structure 4224 * 4225 * Returns 0 on success, negative value on failure 4226 * 4227 * The open entry point is called when a network interface is made 4228 * active by the system (IFF_UP). At this point all resources needed 4229 * for transmit and receive operations are allocated, the interrupt 4230 * handler is registered with the OS, the watchdog timer is started, 4231 * and the stack is notified that the interface is ready. 4232 **/ 4233 static int e1000_open(struct net_device *netdev) 4234 { 4235 struct e1000_adapter *adapter = netdev_priv(netdev); 4236 struct e1000_hw *hw = &adapter->hw; 4237 struct pci_dev *pdev = adapter->pdev; 4238 int err; 4239 4240 /* disallow open during test */ 4241 if (test_bit(__E1000_TESTING, &adapter->state)) 4242 return -EBUSY; 4243 4244 pm_runtime_get_sync(&pdev->dev); 4245 4246 netif_carrier_off(netdev); 4247 4248 /* allocate transmit descriptors */ 4249 err = e1000e_setup_tx_resources(adapter->tx_ring); 4250 if (err) 4251 goto err_setup_tx; 4252 4253 /* allocate receive descriptors */ 4254 err = e1000e_setup_rx_resources(adapter->rx_ring); 4255 if (err) 4256 goto err_setup_rx; 4257 4258 /* If AMT is enabled, let the firmware know that the network 4259 * interface is now open and reset the part to a known state. 4260 */ 4261 if (adapter->flags & FLAG_HAS_AMT) { 4262 e1000e_get_hw_control(adapter); 4263 e1000e_reset(adapter); 4264 } 4265 4266 e1000e_power_up_phy(adapter); 4267 4268 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; 4269 if ((adapter->hw.mng_cookie.status & 4270 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)) 4271 e1000_update_mng_vlan(adapter); 4272 4273 /* DMA latency requirement to workaround jumbo issue */ 4274 pm_qos_add_request(&adapter->netdev->pm_qos_req, PM_QOS_CPU_DMA_LATENCY, 4275 PM_QOS_DEFAULT_VALUE); 4276 4277 /* before we allocate an interrupt, we must be ready to handle it. 4278 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt 4279 * as soon as we call pci_request_irq, so we have to setup our 4280 * clean_rx handler before we do so. 4281 */ 4282 e1000_configure(adapter); 4283 4284 err = e1000_request_irq(adapter); 4285 if (err) 4286 goto err_req_irq; 4287 4288 /* Work around PCIe errata with MSI interrupts causing some chipsets to 4289 * ignore e1000e MSI messages, which means we need to test our MSI 4290 * interrupt now 4291 */ 4292 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) { 4293 err = e1000_test_msi(adapter); 4294 if (err) { 4295 e_err("Interrupt allocation failed\n"); 4296 goto err_req_irq; 4297 } 4298 } 4299 4300 /* From here on the code is the same as e1000e_up() */ 4301 clear_bit(__E1000_DOWN, &adapter->state); 4302 4303 napi_enable(&adapter->napi); 4304 4305 e1000_irq_enable(adapter); 4306 4307 adapter->tx_hang_recheck = false; 4308 netif_start_queue(netdev); 4309 4310 adapter->idle_check = true; 4311 hw->mac.get_link_status = true; 4312 pm_runtime_put(&pdev->dev); 4313 4314 /* fire a link status change interrupt to start the watchdog */ 4315 if (adapter->msix_entries) 4316 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER); 4317 else 4318 ew32(ICS, E1000_ICS_LSC); 4319 4320 return 0; 4321 4322 err_req_irq: 4323 e1000e_release_hw_control(adapter); 4324 e1000_power_down_phy(adapter); 4325 e1000e_free_rx_resources(adapter->rx_ring); 4326 err_setup_rx: 4327 e1000e_free_tx_resources(adapter->tx_ring); 4328 err_setup_tx: 4329 e1000e_reset(adapter); 4330 pm_runtime_put_sync(&pdev->dev); 4331 4332 return err; 4333 } 4334 4335 /** 4336 * e1000_close - Disables a network interface 4337 * @netdev: network interface device structure 4338 * 4339 * Returns 0, this is not allowed to fail 4340 * 4341 * The close entry point is called when an interface is de-activated 4342 * by the OS. The hardware is still under the drivers control, but 4343 * needs to be disabled. A global MAC reset is issued to stop the 4344 * hardware, and all transmit and receive resources are freed. 4345 **/ 4346 static int e1000_close(struct net_device *netdev) 4347 { 4348 struct e1000_adapter *adapter = netdev_priv(netdev); 4349 struct pci_dev *pdev = adapter->pdev; 4350 int count = E1000_CHECK_RESET_COUNT; 4351 4352 while (test_bit(__E1000_RESETTING, &adapter->state) && count--) 4353 usleep_range(10000, 20000); 4354 4355 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state)); 4356 4357 pm_runtime_get_sync(&pdev->dev); 4358 4359 napi_disable(&adapter->napi); 4360 4361 if (!test_bit(__E1000_DOWN, &adapter->state)) { 4362 e1000e_down(adapter); 4363 e1000_free_irq(adapter); 4364 } 4365 e1000_power_down_phy(adapter); 4366 4367 e1000e_free_tx_resources(adapter->tx_ring); 4368 e1000e_free_rx_resources(adapter->rx_ring); 4369 4370 /* kill manageability vlan ID if supported, but not if a vlan with 4371 * the same ID is registered on the host OS (let 8021q kill it) 4372 */ 4373 if (adapter->hw.mng_cookie.status & 4374 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) 4375 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); 4376 4377 /* If AMT is enabled, let the firmware know that the network 4378 * interface is now closed 4379 */ 4380 if ((adapter->flags & FLAG_HAS_AMT) && 4381 !test_bit(__E1000_TESTING, &adapter->state)) 4382 e1000e_release_hw_control(adapter); 4383 4384 pm_qos_remove_request(&adapter->netdev->pm_qos_req); 4385 4386 pm_runtime_put_sync(&pdev->dev); 4387 4388 return 0; 4389 } 4390 /** 4391 * e1000_set_mac - Change the Ethernet Address of the NIC 4392 * @netdev: network interface device structure 4393 * @p: pointer to an address structure 4394 * 4395 * Returns 0 on success, negative on failure 4396 **/ 4397 static int e1000_set_mac(struct net_device *netdev, void *p) 4398 { 4399 struct e1000_adapter *adapter = netdev_priv(netdev); 4400 struct e1000_hw *hw = &adapter->hw; 4401 struct sockaddr *addr = p; 4402 4403 if (!is_valid_ether_addr(addr->sa_data)) 4404 return -EADDRNOTAVAIL; 4405 4406 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 4407 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len); 4408 4409 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0); 4410 4411 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) { 4412 /* activate the work around */ 4413 e1000e_set_laa_state_82571(&adapter->hw, 1); 4414 4415 /* Hold a copy of the LAA in RAR[14] This is done so that 4416 * between the time RAR[0] gets clobbered and the time it 4417 * gets fixed (in e1000_watchdog), the actual LAA is in one 4418 * of the RARs and no incoming packets directed to this port 4419 * are dropped. Eventually the LAA will be in RAR[0] and 4420 * RAR[14] 4421 */ 4422 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 4423 adapter->hw.mac.rar_entry_count - 1); 4424 } 4425 4426 return 0; 4427 } 4428 4429 /** 4430 * e1000e_update_phy_task - work thread to update phy 4431 * @work: pointer to our work struct 4432 * 4433 * this worker thread exists because we must acquire a 4434 * semaphore to read the phy, which we could msleep while 4435 * waiting for it, and we can't msleep in a timer. 4436 **/ 4437 static void e1000e_update_phy_task(struct work_struct *work) 4438 { 4439 struct e1000_adapter *adapter = container_of(work, 4440 struct e1000_adapter, update_phy_task); 4441 4442 if (test_bit(__E1000_DOWN, &adapter->state)) 4443 return; 4444 4445 e1000_get_phy_info(&adapter->hw); 4446 } 4447 4448 /** 4449 * e1000_update_phy_info - timre call-back to update PHY info 4450 * @data: pointer to adapter cast into an unsigned long 4451 * 4452 * Need to wait a few seconds after link up to get diagnostic information from 4453 * the phy 4454 **/ 4455 static void e1000_update_phy_info(unsigned long data) 4456 { 4457 struct e1000_adapter *adapter = (struct e1000_adapter *) data; 4458 4459 if (test_bit(__E1000_DOWN, &adapter->state)) 4460 return; 4461 4462 schedule_work(&adapter->update_phy_task); 4463 } 4464 4465 /** 4466 * e1000e_update_phy_stats - Update the PHY statistics counters 4467 * @adapter: board private structure 4468 * 4469 * Read/clear the upper 16-bit PHY registers and read/accumulate lower 4470 **/ 4471 static void e1000e_update_phy_stats(struct e1000_adapter *adapter) 4472 { 4473 struct e1000_hw *hw = &adapter->hw; 4474 s32 ret_val; 4475 u16 phy_data; 4476 4477 ret_val = hw->phy.ops.acquire(hw); 4478 if (ret_val) 4479 return; 4480 4481 /* A page set is expensive so check if already on desired page. 4482 * If not, set to the page with the PHY status registers. 4483 */ 4484 hw->phy.addr = 1; 4485 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, 4486 &phy_data); 4487 if (ret_val) 4488 goto release; 4489 if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) { 4490 ret_val = hw->phy.ops.set_page(hw, 4491 HV_STATS_PAGE << IGP_PAGE_SHIFT); 4492 if (ret_val) 4493 goto release; 4494 } 4495 4496 /* Single Collision Count */ 4497 hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data); 4498 ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data); 4499 if (!ret_val) 4500 adapter->stats.scc += phy_data; 4501 4502 /* Excessive Collision Count */ 4503 hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data); 4504 ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data); 4505 if (!ret_val) 4506 adapter->stats.ecol += phy_data; 4507 4508 /* Multiple Collision Count */ 4509 hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data); 4510 ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data); 4511 if (!ret_val) 4512 adapter->stats.mcc += phy_data; 4513 4514 /* Late Collision Count */ 4515 hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data); 4516 ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data); 4517 if (!ret_val) 4518 adapter->stats.latecol += phy_data; 4519 4520 /* Collision Count - also used for adaptive IFS */ 4521 hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data); 4522 ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data); 4523 if (!ret_val) 4524 hw->mac.collision_delta = phy_data; 4525 4526 /* Defer Count */ 4527 hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data); 4528 ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data); 4529 if (!ret_val) 4530 adapter->stats.dc += phy_data; 4531 4532 /* Transmit with no CRS */ 4533 hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data); 4534 ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data); 4535 if (!ret_val) 4536 adapter->stats.tncrs += phy_data; 4537 4538 release: 4539 hw->phy.ops.release(hw); 4540 } 4541 4542 /** 4543 * e1000e_update_stats - Update the board statistics counters 4544 * @adapter: board private structure 4545 **/ 4546 static void e1000e_update_stats(struct e1000_adapter *adapter) 4547 { 4548 struct net_device *netdev = adapter->netdev; 4549 struct e1000_hw *hw = &adapter->hw; 4550 struct pci_dev *pdev = adapter->pdev; 4551 4552 /* Prevent stats update while adapter is being reset, or if the pci 4553 * connection is down. 4554 */ 4555 if (adapter->link_speed == 0) 4556 return; 4557 if (pci_channel_offline(pdev)) 4558 return; 4559 4560 adapter->stats.crcerrs += er32(CRCERRS); 4561 adapter->stats.gprc += er32(GPRC); 4562 adapter->stats.gorc += er32(GORCL); 4563 er32(GORCH); /* Clear gorc */ 4564 adapter->stats.bprc += er32(BPRC); 4565 adapter->stats.mprc += er32(MPRC); 4566 adapter->stats.roc += er32(ROC); 4567 4568 adapter->stats.mpc += er32(MPC); 4569 4570 /* Half-duplex statistics */ 4571 if (adapter->link_duplex == HALF_DUPLEX) { 4572 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) { 4573 e1000e_update_phy_stats(adapter); 4574 } else { 4575 adapter->stats.scc += er32(SCC); 4576 adapter->stats.ecol += er32(ECOL); 4577 adapter->stats.mcc += er32(MCC); 4578 adapter->stats.latecol += er32(LATECOL); 4579 adapter->stats.dc += er32(DC); 4580 4581 hw->mac.collision_delta = er32(COLC); 4582 4583 if ((hw->mac.type != e1000_82574) && 4584 (hw->mac.type != e1000_82583)) 4585 adapter->stats.tncrs += er32(TNCRS); 4586 } 4587 adapter->stats.colc += hw->mac.collision_delta; 4588 } 4589 4590 adapter->stats.xonrxc += er32(XONRXC); 4591 adapter->stats.xontxc += er32(XONTXC); 4592 adapter->stats.xoffrxc += er32(XOFFRXC); 4593 adapter->stats.xofftxc += er32(XOFFTXC); 4594 adapter->stats.gptc += er32(GPTC); 4595 adapter->stats.gotc += er32(GOTCL); 4596 er32(GOTCH); /* Clear gotc */ 4597 adapter->stats.rnbc += er32(RNBC); 4598 adapter->stats.ruc += er32(RUC); 4599 4600 adapter->stats.mptc += er32(MPTC); 4601 adapter->stats.bptc += er32(BPTC); 4602 4603 /* used for adaptive IFS */ 4604 4605 hw->mac.tx_packet_delta = er32(TPT); 4606 adapter->stats.tpt += hw->mac.tx_packet_delta; 4607 4608 adapter->stats.algnerrc += er32(ALGNERRC); 4609 adapter->stats.rxerrc += er32(RXERRC); 4610 adapter->stats.cexterr += er32(CEXTERR); 4611 adapter->stats.tsctc += er32(TSCTC); 4612 adapter->stats.tsctfc += er32(TSCTFC); 4613 4614 /* Fill out the OS statistics structure */ 4615 netdev->stats.multicast = adapter->stats.mprc; 4616 netdev->stats.collisions = adapter->stats.colc; 4617 4618 /* Rx Errors */ 4619 4620 /* RLEC on some newer hardware can be incorrect so build 4621 * our own version based on RUC and ROC 4622 */ 4623 netdev->stats.rx_errors = adapter->stats.rxerrc + 4624 adapter->stats.crcerrs + adapter->stats.algnerrc + 4625 adapter->stats.ruc + adapter->stats.roc + 4626 adapter->stats.cexterr; 4627 netdev->stats.rx_length_errors = adapter->stats.ruc + 4628 adapter->stats.roc; 4629 netdev->stats.rx_crc_errors = adapter->stats.crcerrs; 4630 netdev->stats.rx_frame_errors = adapter->stats.algnerrc; 4631 netdev->stats.rx_missed_errors = adapter->stats.mpc; 4632 4633 /* Tx Errors */ 4634 netdev->stats.tx_errors = adapter->stats.ecol + 4635 adapter->stats.latecol; 4636 netdev->stats.tx_aborted_errors = adapter->stats.ecol; 4637 netdev->stats.tx_window_errors = adapter->stats.latecol; 4638 netdev->stats.tx_carrier_errors = adapter->stats.tncrs; 4639 4640 /* Tx Dropped needs to be maintained elsewhere */ 4641 4642 /* Management Stats */ 4643 adapter->stats.mgptc += er32(MGTPTC); 4644 adapter->stats.mgprc += er32(MGTPRC); 4645 adapter->stats.mgpdc += er32(MGTPDC); 4646 4647 /* Correctable ECC Errors */ 4648 if (hw->mac.type == e1000_pch_lpt) { 4649 u32 pbeccsts = er32(PBECCSTS); 4650 adapter->corr_errors += 4651 pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK; 4652 adapter->uncorr_errors += 4653 (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >> 4654 E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT; 4655 } 4656 } 4657 4658 /** 4659 * e1000_phy_read_status - Update the PHY register status snapshot 4660 * @adapter: board private structure 4661 **/ 4662 static void e1000_phy_read_status(struct e1000_adapter *adapter) 4663 { 4664 struct e1000_hw *hw = &adapter->hw; 4665 struct e1000_phy_regs *phy = &adapter->phy_regs; 4666 4667 if ((er32(STATUS) & E1000_STATUS_LU) && 4668 (adapter->hw.phy.media_type == e1000_media_type_copper)) { 4669 int ret_val; 4670 4671 pm_runtime_get_sync(&adapter->pdev->dev); 4672 ret_val = e1e_rphy(hw, MII_BMCR, &phy->bmcr); 4673 ret_val |= e1e_rphy(hw, MII_BMSR, &phy->bmsr); 4674 ret_val |= e1e_rphy(hw, MII_ADVERTISE, &phy->advertise); 4675 ret_val |= e1e_rphy(hw, MII_LPA, &phy->lpa); 4676 ret_val |= e1e_rphy(hw, MII_EXPANSION, &phy->expansion); 4677 ret_val |= e1e_rphy(hw, MII_CTRL1000, &phy->ctrl1000); 4678 ret_val |= e1e_rphy(hw, MII_STAT1000, &phy->stat1000); 4679 ret_val |= e1e_rphy(hw, MII_ESTATUS, &phy->estatus); 4680 if (ret_val) 4681 e_warn("Error reading PHY register\n"); 4682 pm_runtime_put_sync(&adapter->pdev->dev); 4683 } else { 4684 /* Do not read PHY registers if link is not up 4685 * Set values to typical power-on defaults 4686 */ 4687 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX); 4688 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL | 4689 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE | 4690 BMSR_ERCAP); 4691 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP | 4692 ADVERTISE_ALL | ADVERTISE_CSMA); 4693 phy->lpa = 0; 4694 phy->expansion = EXPANSION_ENABLENPAGE; 4695 phy->ctrl1000 = ADVERTISE_1000FULL; 4696 phy->stat1000 = 0; 4697 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF); 4698 } 4699 } 4700 4701 static void e1000_print_link_info(struct e1000_adapter *adapter) 4702 { 4703 struct e1000_hw *hw = &adapter->hw; 4704 u32 ctrl = er32(CTRL); 4705 4706 /* Link status message must follow this format for user tools */ 4707 pr_info("%s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n", 4708 adapter->netdev->name, adapter->link_speed, 4709 adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half", 4710 (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" : 4711 (ctrl & E1000_CTRL_RFCE) ? "Rx" : 4712 (ctrl & E1000_CTRL_TFCE) ? "Tx" : "None"); 4713 } 4714 4715 static bool e1000e_has_link(struct e1000_adapter *adapter) 4716 { 4717 struct e1000_hw *hw = &adapter->hw; 4718 bool link_active = false; 4719 s32 ret_val = 0; 4720 4721 /* get_link_status is set on LSC (link status) interrupt or 4722 * Rx sequence error interrupt. get_link_status will stay 4723 * false until the check_for_link establishes link 4724 * for copper adapters ONLY 4725 */ 4726 switch (hw->phy.media_type) { 4727 case e1000_media_type_copper: 4728 if (hw->mac.get_link_status) { 4729 ret_val = hw->mac.ops.check_for_link(hw); 4730 link_active = !hw->mac.get_link_status; 4731 } else { 4732 link_active = true; 4733 } 4734 break; 4735 case e1000_media_type_fiber: 4736 ret_val = hw->mac.ops.check_for_link(hw); 4737 link_active = !!(er32(STATUS) & E1000_STATUS_LU); 4738 break; 4739 case e1000_media_type_internal_serdes: 4740 ret_val = hw->mac.ops.check_for_link(hw); 4741 link_active = adapter->hw.mac.serdes_has_link; 4742 break; 4743 default: 4744 case e1000_media_type_unknown: 4745 break; 4746 } 4747 4748 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) && 4749 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) { 4750 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */ 4751 e_info("Gigabit has been disabled, downgrading speed\n"); 4752 } 4753 4754 return link_active; 4755 } 4756 4757 static void e1000e_enable_receives(struct e1000_adapter *adapter) 4758 { 4759 /* make sure the receive unit is started */ 4760 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) && 4761 (adapter->flags & FLAG_RESTART_NOW)) { 4762 struct e1000_hw *hw = &adapter->hw; 4763 u32 rctl = er32(RCTL); 4764 ew32(RCTL, rctl | E1000_RCTL_EN); 4765 adapter->flags &= ~FLAG_RESTART_NOW; 4766 } 4767 } 4768 4769 static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter) 4770 { 4771 struct e1000_hw *hw = &adapter->hw; 4772 4773 /* With 82574 controllers, PHY needs to be checked periodically 4774 * for hung state and reset, if two calls return true 4775 */ 4776 if (e1000_check_phy_82574(hw)) 4777 adapter->phy_hang_count++; 4778 else 4779 adapter->phy_hang_count = 0; 4780 4781 if (adapter->phy_hang_count > 1) { 4782 adapter->phy_hang_count = 0; 4783 schedule_work(&adapter->reset_task); 4784 } 4785 } 4786 4787 /** 4788 * e1000_watchdog - Timer Call-back 4789 * @data: pointer to adapter cast into an unsigned long 4790 **/ 4791 static void e1000_watchdog(unsigned long data) 4792 { 4793 struct e1000_adapter *adapter = (struct e1000_adapter *) data; 4794 4795 /* Do the rest outside of interrupt context */ 4796 schedule_work(&adapter->watchdog_task); 4797 4798 /* TODO: make this use queue_delayed_work() */ 4799 } 4800 4801 static void e1000_watchdog_task(struct work_struct *work) 4802 { 4803 struct e1000_adapter *adapter = container_of(work, 4804 struct e1000_adapter, watchdog_task); 4805 struct net_device *netdev = adapter->netdev; 4806 struct e1000_mac_info *mac = &adapter->hw.mac; 4807 struct e1000_phy_info *phy = &adapter->hw.phy; 4808 struct e1000_ring *tx_ring = adapter->tx_ring; 4809 struct e1000_hw *hw = &adapter->hw; 4810 u32 link, tctl; 4811 4812 if (test_bit(__E1000_DOWN, &adapter->state)) 4813 return; 4814 4815 link = e1000e_has_link(adapter); 4816 if ((netif_carrier_ok(netdev)) && link) { 4817 /* Cancel scheduled suspend requests. */ 4818 pm_runtime_resume(netdev->dev.parent); 4819 4820 e1000e_enable_receives(adapter); 4821 goto link_up; 4822 } 4823 4824 if ((e1000e_enable_tx_pkt_filtering(hw)) && 4825 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)) 4826 e1000_update_mng_vlan(adapter); 4827 4828 if (link) { 4829 if (!netif_carrier_ok(netdev)) { 4830 bool txb2b = true; 4831 4832 /* Cancel scheduled suspend requests. */ 4833 pm_runtime_resume(netdev->dev.parent); 4834 4835 /* update snapshot of PHY registers on LSC */ 4836 e1000_phy_read_status(adapter); 4837 mac->ops.get_link_up_info(&adapter->hw, 4838 &adapter->link_speed, 4839 &adapter->link_duplex); 4840 e1000_print_link_info(adapter); 4841 4842 /* check if SmartSpeed worked */ 4843 e1000e_check_downshift(hw); 4844 if (phy->speed_downgraded) 4845 netdev_warn(netdev, 4846 "Link Speed was downgraded by SmartSpeed\n"); 4847 4848 /* On supported PHYs, check for duplex mismatch only 4849 * if link has autonegotiated at 10/100 half 4850 */ 4851 if ((hw->phy.type == e1000_phy_igp_3 || 4852 hw->phy.type == e1000_phy_bm) && 4853 (hw->mac.autoneg == true) && 4854 (adapter->link_speed == SPEED_10 || 4855 adapter->link_speed == SPEED_100) && 4856 (adapter->link_duplex == HALF_DUPLEX)) { 4857 u16 autoneg_exp; 4858 4859 e1e_rphy(hw, MII_EXPANSION, &autoneg_exp); 4860 4861 if (!(autoneg_exp & EXPANSION_NWAY)) 4862 e_info("Autonegotiated half duplex but link partner cannot autoneg. Try forcing full duplex if link gets many collisions.\n"); 4863 } 4864 4865 /* adjust timeout factor according to speed/duplex */ 4866 adapter->tx_timeout_factor = 1; 4867 switch (adapter->link_speed) { 4868 case SPEED_10: 4869 txb2b = false; 4870 adapter->tx_timeout_factor = 16; 4871 break; 4872 case SPEED_100: 4873 txb2b = false; 4874 adapter->tx_timeout_factor = 10; 4875 break; 4876 } 4877 4878 /* workaround: re-program speed mode bit after 4879 * link-up event 4880 */ 4881 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) && 4882 !txb2b) { 4883 u32 tarc0; 4884 tarc0 = er32(TARC(0)); 4885 tarc0 &= ~SPEED_MODE_BIT; 4886 ew32(TARC(0), tarc0); 4887 } 4888 4889 /* disable TSO for pcie and 10/100 speeds, to avoid 4890 * some hardware issues 4891 */ 4892 if (!(adapter->flags & FLAG_TSO_FORCE)) { 4893 switch (adapter->link_speed) { 4894 case SPEED_10: 4895 case SPEED_100: 4896 e_info("10/100 speed: disabling TSO\n"); 4897 netdev->features &= ~NETIF_F_TSO; 4898 netdev->features &= ~NETIF_F_TSO6; 4899 break; 4900 case SPEED_1000: 4901 netdev->features |= NETIF_F_TSO; 4902 netdev->features |= NETIF_F_TSO6; 4903 break; 4904 default: 4905 /* oops */ 4906 break; 4907 } 4908 } 4909 4910 /* enable transmits in the hardware, need to do this 4911 * after setting TARC(0) 4912 */ 4913 tctl = er32(TCTL); 4914 tctl |= E1000_TCTL_EN; 4915 ew32(TCTL, tctl); 4916 4917 /* Perform any post-link-up configuration before 4918 * reporting link up. 4919 */ 4920 if (phy->ops.cfg_on_link_up) 4921 phy->ops.cfg_on_link_up(hw); 4922 4923 netif_carrier_on(netdev); 4924 4925 if (!test_bit(__E1000_DOWN, &adapter->state)) 4926 mod_timer(&adapter->phy_info_timer, 4927 round_jiffies(jiffies + 2 * HZ)); 4928 } 4929 } else { 4930 if (netif_carrier_ok(netdev)) { 4931 adapter->link_speed = 0; 4932 adapter->link_duplex = 0; 4933 /* Link status message must follow this format */ 4934 pr_info("%s NIC Link is Down\n", adapter->netdev->name); 4935 netif_carrier_off(netdev); 4936 if (!test_bit(__E1000_DOWN, &adapter->state)) 4937 mod_timer(&adapter->phy_info_timer, 4938 round_jiffies(jiffies + 2 * HZ)); 4939 4940 /* The link is lost so the controller stops DMA. 4941 * If there is queued Tx work that cannot be done 4942 * or if on an 8000ES2LAN which requires a Rx packet 4943 * buffer work-around on link down event, reset the 4944 * controller to flush the Tx/Rx packet buffers. 4945 * (Do the reset outside of interrupt context). 4946 */ 4947 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) || 4948 (e1000_desc_unused(tx_ring) + 1 < tx_ring->count)) 4949 adapter->flags |= FLAG_RESTART_NOW; 4950 else 4951 pm_schedule_suspend(netdev->dev.parent, 4952 LINK_TIMEOUT); 4953 } 4954 } 4955 4956 link_up: 4957 spin_lock(&adapter->stats64_lock); 4958 e1000e_update_stats(adapter); 4959 4960 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old; 4961 adapter->tpt_old = adapter->stats.tpt; 4962 mac->collision_delta = adapter->stats.colc - adapter->colc_old; 4963 adapter->colc_old = adapter->stats.colc; 4964 4965 adapter->gorc = adapter->stats.gorc - adapter->gorc_old; 4966 adapter->gorc_old = adapter->stats.gorc; 4967 adapter->gotc = adapter->stats.gotc - adapter->gotc_old; 4968 adapter->gotc_old = adapter->stats.gotc; 4969 spin_unlock(&adapter->stats64_lock); 4970 4971 if (adapter->flags & FLAG_RESTART_NOW) { 4972 schedule_work(&adapter->reset_task); 4973 /* return immediately since reset is imminent */ 4974 return; 4975 } 4976 4977 e1000e_update_adaptive(&adapter->hw); 4978 4979 /* Simple mode for Interrupt Throttle Rate (ITR) */ 4980 if (adapter->itr_setting == 4) { 4981 /* Symmetric Tx/Rx gets a reduced ITR=2000; 4982 * Total asymmetrical Tx or Rx gets ITR=8000; 4983 * everyone else is between 2000-8000. 4984 */ 4985 u32 goc = (adapter->gotc + adapter->gorc) / 10000; 4986 u32 dif = (adapter->gotc > adapter->gorc ? 4987 adapter->gotc - adapter->gorc : 4988 adapter->gorc - adapter->gotc) / 10000; 4989 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000; 4990 4991 e1000e_write_itr(adapter, itr); 4992 } 4993 4994 /* Cause software interrupt to ensure Rx ring is cleaned */ 4995 if (adapter->msix_entries) 4996 ew32(ICS, adapter->rx_ring->ims_val); 4997 else 4998 ew32(ICS, E1000_ICS_RXDMT0); 4999 5000 /* flush pending descriptors to memory before detecting Tx hang */ 5001 e1000e_flush_descriptors(adapter); 5002 5003 /* Force detection of hung controller every watchdog period */ 5004 adapter->detect_tx_hung = true; 5005 5006 /* With 82571 controllers, LAA may be overwritten due to controller 5007 * reset from the other port. Set the appropriate LAA in RAR[0] 5008 */ 5009 if (e1000e_get_laa_state_82571(hw)) 5010 hw->mac.ops.rar_set(hw, adapter->hw.mac.addr, 0); 5011 5012 if (adapter->flags2 & FLAG2_CHECK_PHY_HANG) 5013 e1000e_check_82574_phy_workaround(adapter); 5014 5015 /* Clear valid timestamp stuck in RXSTMPL/H due to a Rx error */ 5016 if (adapter->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE) { 5017 if ((adapter->flags2 & FLAG2_CHECK_RX_HWTSTAMP) && 5018 (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID)) { 5019 er32(RXSTMPH); 5020 adapter->rx_hwtstamp_cleared++; 5021 } else { 5022 adapter->flags2 |= FLAG2_CHECK_RX_HWTSTAMP; 5023 } 5024 } 5025 5026 /* Reset the timer */ 5027 if (!test_bit(__E1000_DOWN, &adapter->state)) 5028 mod_timer(&adapter->watchdog_timer, 5029 round_jiffies(jiffies + 2 * HZ)); 5030 } 5031 5032 #define E1000_TX_FLAGS_CSUM 0x00000001 5033 #define E1000_TX_FLAGS_VLAN 0x00000002 5034 #define E1000_TX_FLAGS_TSO 0x00000004 5035 #define E1000_TX_FLAGS_IPV4 0x00000008 5036 #define E1000_TX_FLAGS_NO_FCS 0x00000010 5037 #define E1000_TX_FLAGS_HWTSTAMP 0x00000020 5038 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000 5039 #define E1000_TX_FLAGS_VLAN_SHIFT 16 5040 5041 static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb) 5042 { 5043 struct e1000_context_desc *context_desc; 5044 struct e1000_buffer *buffer_info; 5045 unsigned int i; 5046 u32 cmd_length = 0; 5047 u16 ipcse = 0, mss; 5048 u8 ipcss, ipcso, tucss, tucso, hdr_len; 5049 5050 if (!skb_is_gso(skb)) 5051 return 0; 5052 5053 if (skb_header_cloned(skb)) { 5054 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); 5055 5056 if (err) 5057 return err; 5058 } 5059 5060 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 5061 mss = skb_shinfo(skb)->gso_size; 5062 if (skb->protocol == htons(ETH_P_IP)) { 5063 struct iphdr *iph = ip_hdr(skb); 5064 iph->tot_len = 0; 5065 iph->check = 0; 5066 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, 5067 0, IPPROTO_TCP, 0); 5068 cmd_length = E1000_TXD_CMD_IP; 5069 ipcse = skb_transport_offset(skb) - 1; 5070 } else if (skb_is_gso_v6(skb)) { 5071 ipv6_hdr(skb)->payload_len = 0; 5072 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, 5073 &ipv6_hdr(skb)->daddr, 5074 0, IPPROTO_TCP, 0); 5075 ipcse = 0; 5076 } 5077 ipcss = skb_network_offset(skb); 5078 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data; 5079 tucss = skb_transport_offset(skb); 5080 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data; 5081 5082 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE | 5083 E1000_TXD_CMD_TCP | (skb->len - (hdr_len))); 5084 5085 i = tx_ring->next_to_use; 5086 context_desc = E1000_CONTEXT_DESC(*tx_ring, i); 5087 buffer_info = &tx_ring->buffer_info[i]; 5088 5089 context_desc->lower_setup.ip_fields.ipcss = ipcss; 5090 context_desc->lower_setup.ip_fields.ipcso = ipcso; 5091 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse); 5092 context_desc->upper_setup.tcp_fields.tucss = tucss; 5093 context_desc->upper_setup.tcp_fields.tucso = tucso; 5094 context_desc->upper_setup.tcp_fields.tucse = 0; 5095 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss); 5096 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len; 5097 context_desc->cmd_and_length = cpu_to_le32(cmd_length); 5098 5099 buffer_info->time_stamp = jiffies; 5100 buffer_info->next_to_watch = i; 5101 5102 i++; 5103 if (i == tx_ring->count) 5104 i = 0; 5105 tx_ring->next_to_use = i; 5106 5107 return 1; 5108 } 5109 5110 static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb) 5111 { 5112 struct e1000_adapter *adapter = tx_ring->adapter; 5113 struct e1000_context_desc *context_desc; 5114 struct e1000_buffer *buffer_info; 5115 unsigned int i; 5116 u8 css; 5117 u32 cmd_len = E1000_TXD_CMD_DEXT; 5118 __be16 protocol; 5119 5120 if (skb->ip_summed != CHECKSUM_PARTIAL) 5121 return 0; 5122 5123 if (skb->protocol == cpu_to_be16(ETH_P_8021Q)) 5124 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto; 5125 else 5126 protocol = skb->protocol; 5127 5128 switch (protocol) { 5129 case cpu_to_be16(ETH_P_IP): 5130 if (ip_hdr(skb)->protocol == IPPROTO_TCP) 5131 cmd_len |= E1000_TXD_CMD_TCP; 5132 break; 5133 case cpu_to_be16(ETH_P_IPV6): 5134 /* XXX not handling all IPV6 headers */ 5135 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP) 5136 cmd_len |= E1000_TXD_CMD_TCP; 5137 break; 5138 default: 5139 if (unlikely(net_ratelimit())) 5140 e_warn("checksum_partial proto=%x!\n", 5141 be16_to_cpu(protocol)); 5142 break; 5143 } 5144 5145 css = skb_checksum_start_offset(skb); 5146 5147 i = tx_ring->next_to_use; 5148 buffer_info = &tx_ring->buffer_info[i]; 5149 context_desc = E1000_CONTEXT_DESC(*tx_ring, i); 5150 5151 context_desc->lower_setup.ip_config = 0; 5152 context_desc->upper_setup.tcp_fields.tucss = css; 5153 context_desc->upper_setup.tcp_fields.tucso = 5154 css + skb->csum_offset; 5155 context_desc->upper_setup.tcp_fields.tucse = 0; 5156 context_desc->tcp_seg_setup.data = 0; 5157 context_desc->cmd_and_length = cpu_to_le32(cmd_len); 5158 5159 buffer_info->time_stamp = jiffies; 5160 buffer_info->next_to_watch = i; 5161 5162 i++; 5163 if (i == tx_ring->count) 5164 i = 0; 5165 tx_ring->next_to_use = i; 5166 5167 return 1; 5168 } 5169 5170 static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb, 5171 unsigned int first, unsigned int max_per_txd, 5172 unsigned int nr_frags) 5173 { 5174 struct e1000_adapter *adapter = tx_ring->adapter; 5175 struct pci_dev *pdev = adapter->pdev; 5176 struct e1000_buffer *buffer_info; 5177 unsigned int len = skb_headlen(skb); 5178 unsigned int offset = 0, size, count = 0, i; 5179 unsigned int f, bytecount, segs; 5180 5181 i = tx_ring->next_to_use; 5182 5183 while (len) { 5184 buffer_info = &tx_ring->buffer_info[i]; 5185 size = min(len, max_per_txd); 5186 5187 buffer_info->length = size; 5188 buffer_info->time_stamp = jiffies; 5189 buffer_info->next_to_watch = i; 5190 buffer_info->dma = dma_map_single(&pdev->dev, 5191 skb->data + offset, 5192 size, DMA_TO_DEVICE); 5193 buffer_info->mapped_as_page = false; 5194 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) 5195 goto dma_error; 5196 5197 len -= size; 5198 offset += size; 5199 count++; 5200 5201 if (len) { 5202 i++; 5203 if (i == tx_ring->count) 5204 i = 0; 5205 } 5206 } 5207 5208 for (f = 0; f < nr_frags; f++) { 5209 const struct skb_frag_struct *frag; 5210 5211 frag = &skb_shinfo(skb)->frags[f]; 5212 len = skb_frag_size(frag); 5213 offset = 0; 5214 5215 while (len) { 5216 i++; 5217 if (i == tx_ring->count) 5218 i = 0; 5219 5220 buffer_info = &tx_ring->buffer_info[i]; 5221 size = min(len, max_per_txd); 5222 5223 buffer_info->length = size; 5224 buffer_info->time_stamp = jiffies; 5225 buffer_info->next_to_watch = i; 5226 buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag, 5227 offset, size, DMA_TO_DEVICE); 5228 buffer_info->mapped_as_page = true; 5229 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) 5230 goto dma_error; 5231 5232 len -= size; 5233 offset += size; 5234 count++; 5235 } 5236 } 5237 5238 segs = skb_shinfo(skb)->gso_segs ? : 1; 5239 /* multiply data chunks by size of headers */ 5240 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len; 5241 5242 tx_ring->buffer_info[i].skb = skb; 5243 tx_ring->buffer_info[i].segs = segs; 5244 tx_ring->buffer_info[i].bytecount = bytecount; 5245 tx_ring->buffer_info[first].next_to_watch = i; 5246 5247 return count; 5248 5249 dma_error: 5250 dev_err(&pdev->dev, "Tx DMA map failed\n"); 5251 buffer_info->dma = 0; 5252 if (count) 5253 count--; 5254 5255 while (count--) { 5256 if (i == 0) 5257 i += tx_ring->count; 5258 i--; 5259 buffer_info = &tx_ring->buffer_info[i]; 5260 e1000_put_txbuf(tx_ring, buffer_info); 5261 } 5262 5263 return 0; 5264 } 5265 5266 static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count) 5267 { 5268 struct e1000_adapter *adapter = tx_ring->adapter; 5269 struct e1000_tx_desc *tx_desc = NULL; 5270 struct e1000_buffer *buffer_info; 5271 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS; 5272 unsigned int i; 5273 5274 if (tx_flags & E1000_TX_FLAGS_TSO) { 5275 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D | 5276 E1000_TXD_CMD_TSE; 5277 txd_upper |= E1000_TXD_POPTS_TXSM << 8; 5278 5279 if (tx_flags & E1000_TX_FLAGS_IPV4) 5280 txd_upper |= E1000_TXD_POPTS_IXSM << 8; 5281 } 5282 5283 if (tx_flags & E1000_TX_FLAGS_CSUM) { 5284 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; 5285 txd_upper |= E1000_TXD_POPTS_TXSM << 8; 5286 } 5287 5288 if (tx_flags & E1000_TX_FLAGS_VLAN) { 5289 txd_lower |= E1000_TXD_CMD_VLE; 5290 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK); 5291 } 5292 5293 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS)) 5294 txd_lower &= ~(E1000_TXD_CMD_IFCS); 5295 5296 if (unlikely(tx_flags & E1000_TX_FLAGS_HWTSTAMP)) { 5297 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; 5298 txd_upper |= E1000_TXD_EXTCMD_TSTAMP; 5299 } 5300 5301 i = tx_ring->next_to_use; 5302 5303 do { 5304 buffer_info = &tx_ring->buffer_info[i]; 5305 tx_desc = E1000_TX_DESC(*tx_ring, i); 5306 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); 5307 tx_desc->lower.data = 5308 cpu_to_le32(txd_lower | buffer_info->length); 5309 tx_desc->upper.data = cpu_to_le32(txd_upper); 5310 5311 i++; 5312 if (i == tx_ring->count) 5313 i = 0; 5314 } while (--count > 0); 5315 5316 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd); 5317 5318 /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */ 5319 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS)) 5320 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS)); 5321 5322 /* Force memory writes to complete before letting h/w 5323 * know there are new descriptors to fetch. (Only 5324 * applicable for weak-ordered memory model archs, 5325 * such as IA-64). 5326 */ 5327 wmb(); 5328 5329 tx_ring->next_to_use = i; 5330 5331 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) 5332 e1000e_update_tdt_wa(tx_ring, i); 5333 else 5334 writel(i, tx_ring->tail); 5335 5336 /* we need this if more than one processor can write to our tail 5337 * at a time, it synchronizes IO on IA64/Altix systems 5338 */ 5339 mmiowb(); 5340 } 5341 5342 #define MINIMUM_DHCP_PACKET_SIZE 282 5343 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter, 5344 struct sk_buff *skb) 5345 { 5346 struct e1000_hw *hw = &adapter->hw; 5347 u16 length, offset; 5348 5349 if (vlan_tx_tag_present(skb) && 5350 !((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) && 5351 (adapter->hw.mng_cookie.status & 5352 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))) 5353 return 0; 5354 5355 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE) 5356 return 0; 5357 5358 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP)) 5359 return 0; 5360 5361 { 5362 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14); 5363 struct udphdr *udp; 5364 5365 if (ip->protocol != IPPROTO_UDP) 5366 return 0; 5367 5368 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2)); 5369 if (ntohs(udp->dest) != 67) 5370 return 0; 5371 5372 offset = (u8 *)udp + 8 - skb->data; 5373 length = skb->len - offset; 5374 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length); 5375 } 5376 5377 return 0; 5378 } 5379 5380 static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size) 5381 { 5382 struct e1000_adapter *adapter = tx_ring->adapter; 5383 5384 netif_stop_queue(adapter->netdev); 5385 /* Herbert's original patch had: 5386 * smp_mb__after_netif_stop_queue(); 5387 * but since that doesn't exist yet, just open code it. 5388 */ 5389 smp_mb(); 5390 5391 /* We need to check again in a case another CPU has just 5392 * made room available. 5393 */ 5394 if (e1000_desc_unused(tx_ring) < size) 5395 return -EBUSY; 5396 5397 /* A reprieve! */ 5398 netif_start_queue(adapter->netdev); 5399 ++adapter->restart_queue; 5400 return 0; 5401 } 5402 5403 static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size) 5404 { 5405 BUG_ON(size > tx_ring->count); 5406 5407 if (e1000_desc_unused(tx_ring) >= size) 5408 return 0; 5409 return __e1000_maybe_stop_tx(tx_ring, size); 5410 } 5411 5412 static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb, 5413 struct net_device *netdev) 5414 { 5415 struct e1000_adapter *adapter = netdev_priv(netdev); 5416 struct e1000_ring *tx_ring = adapter->tx_ring; 5417 unsigned int first; 5418 unsigned int tx_flags = 0; 5419 unsigned int len = skb_headlen(skb); 5420 unsigned int nr_frags; 5421 unsigned int mss; 5422 int count = 0; 5423 int tso; 5424 unsigned int f; 5425 5426 if (test_bit(__E1000_DOWN, &adapter->state)) { 5427 dev_kfree_skb_any(skb); 5428 return NETDEV_TX_OK; 5429 } 5430 5431 if (skb->len <= 0) { 5432 dev_kfree_skb_any(skb); 5433 return NETDEV_TX_OK; 5434 } 5435 5436 /* The minimum packet size with TCTL.PSP set is 17 bytes so 5437 * pad skb in order to meet this minimum size requirement 5438 */ 5439 if (unlikely(skb->len < 17)) { 5440 if (skb_pad(skb, 17 - skb->len)) 5441 return NETDEV_TX_OK; 5442 skb->len = 17; 5443 skb_set_tail_pointer(skb, 17); 5444 } 5445 5446 mss = skb_shinfo(skb)->gso_size; 5447 if (mss) { 5448 u8 hdr_len; 5449 5450 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data 5451 * points to just header, pull a few bytes of payload from 5452 * frags into skb->data 5453 */ 5454 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 5455 /* we do this workaround for ES2LAN, but it is un-necessary, 5456 * avoiding it could save a lot of cycles 5457 */ 5458 if (skb->data_len && (hdr_len == len)) { 5459 unsigned int pull_size; 5460 5461 pull_size = min_t(unsigned int, 4, skb->data_len); 5462 if (!__pskb_pull_tail(skb, pull_size)) { 5463 e_err("__pskb_pull_tail failed.\n"); 5464 dev_kfree_skb_any(skb); 5465 return NETDEV_TX_OK; 5466 } 5467 len = skb_headlen(skb); 5468 } 5469 } 5470 5471 /* reserve a descriptor for the offload context */ 5472 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL)) 5473 count++; 5474 count++; 5475 5476 count += DIV_ROUND_UP(len, adapter->tx_fifo_limit); 5477 5478 nr_frags = skb_shinfo(skb)->nr_frags; 5479 for (f = 0; f < nr_frags; f++) 5480 count += DIV_ROUND_UP(skb_frag_size(&skb_shinfo(skb)->frags[f]), 5481 adapter->tx_fifo_limit); 5482 5483 if (adapter->hw.mac.tx_pkt_filtering) 5484 e1000_transfer_dhcp_info(adapter, skb); 5485 5486 /* need: count + 2 desc gap to keep tail from touching 5487 * head, otherwise try next time 5488 */ 5489 if (e1000_maybe_stop_tx(tx_ring, count + 2)) 5490 return NETDEV_TX_BUSY; 5491 5492 if (vlan_tx_tag_present(skb)) { 5493 tx_flags |= E1000_TX_FLAGS_VLAN; 5494 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT); 5495 } 5496 5497 first = tx_ring->next_to_use; 5498 5499 tso = e1000_tso(tx_ring, skb); 5500 if (tso < 0) { 5501 dev_kfree_skb_any(skb); 5502 return NETDEV_TX_OK; 5503 } 5504 5505 if (tso) 5506 tx_flags |= E1000_TX_FLAGS_TSO; 5507 else if (e1000_tx_csum(tx_ring, skb)) 5508 tx_flags |= E1000_TX_FLAGS_CSUM; 5509 5510 /* Old method was to assume IPv4 packet by default if TSO was enabled. 5511 * 82571 hardware supports TSO capabilities for IPv6 as well... 5512 * no longer assume, we must. 5513 */ 5514 if (skb->protocol == htons(ETH_P_IP)) 5515 tx_flags |= E1000_TX_FLAGS_IPV4; 5516 5517 if (unlikely(skb->no_fcs)) 5518 tx_flags |= E1000_TX_FLAGS_NO_FCS; 5519 5520 /* if count is 0 then mapping error has occurred */ 5521 count = e1000_tx_map(tx_ring, skb, first, adapter->tx_fifo_limit, 5522 nr_frags); 5523 if (count) { 5524 if (unlikely((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) && 5525 !adapter->tx_hwtstamp_skb)) { 5526 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; 5527 tx_flags |= E1000_TX_FLAGS_HWTSTAMP; 5528 adapter->tx_hwtstamp_skb = skb_get(skb); 5529 schedule_work(&adapter->tx_hwtstamp_work); 5530 } else { 5531 skb_tx_timestamp(skb); 5532 } 5533 5534 netdev_sent_queue(netdev, skb->len); 5535 e1000_tx_queue(tx_ring, tx_flags, count); 5536 /* Make sure there is space in the ring for the next send. */ 5537 e1000_maybe_stop_tx(tx_ring, 5538 (MAX_SKB_FRAGS * 5539 DIV_ROUND_UP(PAGE_SIZE, 5540 adapter->tx_fifo_limit) + 2)); 5541 } else { 5542 dev_kfree_skb_any(skb); 5543 tx_ring->buffer_info[first].time_stamp = 0; 5544 tx_ring->next_to_use = first; 5545 } 5546 5547 return NETDEV_TX_OK; 5548 } 5549 5550 /** 5551 * e1000_tx_timeout - Respond to a Tx Hang 5552 * @netdev: network interface device structure 5553 **/ 5554 static void e1000_tx_timeout(struct net_device *netdev) 5555 { 5556 struct e1000_adapter *adapter = netdev_priv(netdev); 5557 5558 /* Do the reset outside of interrupt context */ 5559 adapter->tx_timeout_count++; 5560 schedule_work(&adapter->reset_task); 5561 } 5562 5563 static void e1000_reset_task(struct work_struct *work) 5564 { 5565 struct e1000_adapter *adapter; 5566 adapter = container_of(work, struct e1000_adapter, reset_task); 5567 5568 /* don't run the task if already down */ 5569 if (test_bit(__E1000_DOWN, &adapter->state)) 5570 return; 5571 5572 if (!(adapter->flags & FLAG_RESTART_NOW)) { 5573 e1000e_dump(adapter); 5574 e_err("Reset adapter unexpectedly\n"); 5575 } 5576 e1000e_reinit_locked(adapter); 5577 } 5578 5579 /** 5580 * e1000_get_stats64 - Get System Network Statistics 5581 * @netdev: network interface device structure 5582 * @stats: rtnl_link_stats64 pointer 5583 * 5584 * Returns the address of the device statistics structure. 5585 **/ 5586 struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev, 5587 struct rtnl_link_stats64 *stats) 5588 { 5589 struct e1000_adapter *adapter = netdev_priv(netdev); 5590 5591 memset(stats, 0, sizeof(struct rtnl_link_stats64)); 5592 spin_lock(&adapter->stats64_lock); 5593 e1000e_update_stats(adapter); 5594 /* Fill out the OS statistics structure */ 5595 stats->rx_bytes = adapter->stats.gorc; 5596 stats->rx_packets = adapter->stats.gprc; 5597 stats->tx_bytes = adapter->stats.gotc; 5598 stats->tx_packets = adapter->stats.gptc; 5599 stats->multicast = adapter->stats.mprc; 5600 stats->collisions = adapter->stats.colc; 5601 5602 /* Rx Errors */ 5603 5604 /* RLEC on some newer hardware can be incorrect so build 5605 * our own version based on RUC and ROC 5606 */ 5607 stats->rx_errors = adapter->stats.rxerrc + 5608 adapter->stats.crcerrs + adapter->stats.algnerrc + 5609 adapter->stats.ruc + adapter->stats.roc + 5610 adapter->stats.cexterr; 5611 stats->rx_length_errors = adapter->stats.ruc + 5612 adapter->stats.roc; 5613 stats->rx_crc_errors = adapter->stats.crcerrs; 5614 stats->rx_frame_errors = adapter->stats.algnerrc; 5615 stats->rx_missed_errors = adapter->stats.mpc; 5616 5617 /* Tx Errors */ 5618 stats->tx_errors = adapter->stats.ecol + 5619 adapter->stats.latecol; 5620 stats->tx_aborted_errors = adapter->stats.ecol; 5621 stats->tx_window_errors = adapter->stats.latecol; 5622 stats->tx_carrier_errors = adapter->stats.tncrs; 5623 5624 /* Tx Dropped needs to be maintained elsewhere */ 5625 5626 spin_unlock(&adapter->stats64_lock); 5627 return stats; 5628 } 5629 5630 /** 5631 * e1000_change_mtu - Change the Maximum Transfer Unit 5632 * @netdev: network interface device structure 5633 * @new_mtu: new value for maximum frame size 5634 * 5635 * Returns 0 on success, negative on failure 5636 **/ 5637 static int e1000_change_mtu(struct net_device *netdev, int new_mtu) 5638 { 5639 struct e1000_adapter *adapter = netdev_priv(netdev); 5640 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN; 5641 5642 /* Jumbo frame support */ 5643 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) && 5644 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) { 5645 e_err("Jumbo Frames not supported.\n"); 5646 return -EINVAL; 5647 } 5648 5649 /* Supported frame sizes */ 5650 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) || 5651 (max_frame > adapter->max_hw_frame_size)) { 5652 e_err("Unsupported MTU setting\n"); 5653 return -EINVAL; 5654 } 5655 5656 /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */ 5657 if ((adapter->hw.mac.type >= e1000_pch2lan) && 5658 !(adapter->flags2 & FLAG2_CRC_STRIPPING) && 5659 (new_mtu > ETH_DATA_LEN)) { 5660 e_err("Jumbo Frames not supported on this device when CRC stripping is disabled.\n"); 5661 return -EINVAL; 5662 } 5663 5664 while (test_and_set_bit(__E1000_RESETTING, &adapter->state)) 5665 usleep_range(1000, 2000); 5666 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */ 5667 adapter->max_frame_size = max_frame; 5668 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu); 5669 netdev->mtu = new_mtu; 5670 if (netif_running(netdev)) 5671 e1000e_down(adapter); 5672 5673 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN 5674 * means we reserve 2 more, this pushes us to allocate from the next 5675 * larger slab size. 5676 * i.e. RXBUFFER_2048 --> size-4096 slab 5677 * However with the new *_jumbo_rx* routines, jumbo receives will use 5678 * fragmented skbs 5679 */ 5680 5681 if (max_frame <= 2048) 5682 adapter->rx_buffer_len = 2048; 5683 else 5684 adapter->rx_buffer_len = 4096; 5685 5686 /* adjust allocation if LPE protects us, and we aren't using SBP */ 5687 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) || 5688 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN)) 5689 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN 5690 + ETH_FCS_LEN; 5691 5692 if (netif_running(netdev)) 5693 e1000e_up(adapter); 5694 else 5695 e1000e_reset(adapter); 5696 5697 clear_bit(__E1000_RESETTING, &adapter->state); 5698 5699 return 0; 5700 } 5701 5702 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, 5703 int cmd) 5704 { 5705 struct e1000_adapter *adapter = netdev_priv(netdev); 5706 struct mii_ioctl_data *data = if_mii(ifr); 5707 5708 if (adapter->hw.phy.media_type != e1000_media_type_copper) 5709 return -EOPNOTSUPP; 5710 5711 switch (cmd) { 5712 case SIOCGMIIPHY: 5713 data->phy_id = adapter->hw.phy.addr; 5714 break; 5715 case SIOCGMIIREG: 5716 e1000_phy_read_status(adapter); 5717 5718 switch (data->reg_num & 0x1F) { 5719 case MII_BMCR: 5720 data->val_out = adapter->phy_regs.bmcr; 5721 break; 5722 case MII_BMSR: 5723 data->val_out = adapter->phy_regs.bmsr; 5724 break; 5725 case MII_PHYSID1: 5726 data->val_out = (adapter->hw.phy.id >> 16); 5727 break; 5728 case MII_PHYSID2: 5729 data->val_out = (adapter->hw.phy.id & 0xFFFF); 5730 break; 5731 case MII_ADVERTISE: 5732 data->val_out = adapter->phy_regs.advertise; 5733 break; 5734 case MII_LPA: 5735 data->val_out = adapter->phy_regs.lpa; 5736 break; 5737 case MII_EXPANSION: 5738 data->val_out = adapter->phy_regs.expansion; 5739 break; 5740 case MII_CTRL1000: 5741 data->val_out = adapter->phy_regs.ctrl1000; 5742 break; 5743 case MII_STAT1000: 5744 data->val_out = adapter->phy_regs.stat1000; 5745 break; 5746 case MII_ESTATUS: 5747 data->val_out = adapter->phy_regs.estatus; 5748 break; 5749 default: 5750 return -EIO; 5751 } 5752 break; 5753 case SIOCSMIIREG: 5754 default: 5755 return -EOPNOTSUPP; 5756 } 5757 return 0; 5758 } 5759 5760 /** 5761 * e1000e_hwtstamp_ioctl - control hardware time stamping 5762 * @netdev: network interface device structure 5763 * @ifreq: interface request 5764 * 5765 * Outgoing time stamping can be enabled and disabled. Play nice and 5766 * disable it when requested, although it shouldn't cause any overhead 5767 * when no packet needs it. At most one packet in the queue may be 5768 * marked for time stamping, otherwise it would be impossible to tell 5769 * for sure to which packet the hardware time stamp belongs. 5770 * 5771 * Incoming time stamping has to be configured via the hardware filters. 5772 * Not all combinations are supported, in particular event type has to be 5773 * specified. Matching the kind of event packet is not supported, with the 5774 * exception of "all V2 events regardless of level 2 or 4". 5775 **/ 5776 static int e1000e_hwtstamp_ioctl(struct net_device *netdev, struct ifreq *ifr) 5777 { 5778 struct e1000_adapter *adapter = netdev_priv(netdev); 5779 struct hwtstamp_config config; 5780 int ret_val; 5781 5782 if (copy_from_user(&config, ifr->ifr_data, sizeof(config))) 5783 return -EFAULT; 5784 5785 adapter->hwtstamp_config = config; 5786 5787 ret_val = e1000e_config_hwtstamp(adapter); 5788 if (ret_val) 5789 return ret_val; 5790 5791 config = adapter->hwtstamp_config; 5792 5793 switch (config.rx_filter) { 5794 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: 5795 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: 5796 case HWTSTAMP_FILTER_PTP_V2_SYNC: 5797 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: 5798 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: 5799 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: 5800 /* With V2 type filters which specify a Sync or Delay Request, 5801 * Path Delay Request/Response messages are also time stamped 5802 * by hardware so notify the caller the requested packets plus 5803 * some others are time stamped. 5804 */ 5805 config.rx_filter = HWTSTAMP_FILTER_SOME; 5806 break; 5807 default: 5808 break; 5809 } 5810 5811 return copy_to_user(ifr->ifr_data, &config, 5812 sizeof(config)) ? -EFAULT : 0; 5813 } 5814 5815 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 5816 { 5817 switch (cmd) { 5818 case SIOCGMIIPHY: 5819 case SIOCGMIIREG: 5820 case SIOCSMIIREG: 5821 return e1000_mii_ioctl(netdev, ifr, cmd); 5822 case SIOCSHWTSTAMP: 5823 return e1000e_hwtstamp_ioctl(netdev, ifr); 5824 default: 5825 return -EOPNOTSUPP; 5826 } 5827 } 5828 5829 static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc) 5830 { 5831 struct e1000_hw *hw = &adapter->hw; 5832 u32 i, mac_reg; 5833 u16 phy_reg, wuc_enable; 5834 int retval; 5835 5836 /* copy MAC RARs to PHY RARs */ 5837 e1000_copy_rx_addrs_to_phy_ich8lan(hw); 5838 5839 retval = hw->phy.ops.acquire(hw); 5840 if (retval) { 5841 e_err("Could not acquire PHY\n"); 5842 return retval; 5843 } 5844 5845 /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */ 5846 retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable); 5847 if (retval) 5848 goto release; 5849 5850 /* copy MAC MTA to PHY MTA - only needed for pchlan */ 5851 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) { 5852 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i); 5853 hw->phy.ops.write_reg_page(hw, BM_MTA(i), 5854 (u16)(mac_reg & 0xFFFF)); 5855 hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1, 5856 (u16)((mac_reg >> 16) & 0xFFFF)); 5857 } 5858 5859 /* configure PHY Rx Control register */ 5860 hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg); 5861 mac_reg = er32(RCTL); 5862 if (mac_reg & E1000_RCTL_UPE) 5863 phy_reg |= BM_RCTL_UPE; 5864 if (mac_reg & E1000_RCTL_MPE) 5865 phy_reg |= BM_RCTL_MPE; 5866 phy_reg &= ~(BM_RCTL_MO_MASK); 5867 if (mac_reg & E1000_RCTL_MO_3) 5868 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT) 5869 << BM_RCTL_MO_SHIFT); 5870 if (mac_reg & E1000_RCTL_BAM) 5871 phy_reg |= BM_RCTL_BAM; 5872 if (mac_reg & E1000_RCTL_PMCF) 5873 phy_reg |= BM_RCTL_PMCF; 5874 mac_reg = er32(CTRL); 5875 if (mac_reg & E1000_CTRL_RFCE) 5876 phy_reg |= BM_RCTL_RFCE; 5877 hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg); 5878 5879 /* enable PHY wakeup in MAC register */ 5880 ew32(WUFC, wufc); 5881 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN); 5882 5883 /* configure and enable PHY wakeup in PHY registers */ 5884 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc); 5885 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, E1000_WUC_PME_EN); 5886 5887 /* activate PHY wakeup */ 5888 wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT; 5889 retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable); 5890 if (retval) 5891 e_err("Could not set PHY Host Wakeup bit\n"); 5892 release: 5893 hw->phy.ops.release(hw); 5894 5895 return retval; 5896 } 5897 5898 static int __e1000_shutdown(struct pci_dev *pdev, bool runtime) 5899 { 5900 struct net_device *netdev = pci_get_drvdata(pdev); 5901 struct e1000_adapter *adapter = netdev_priv(netdev); 5902 struct e1000_hw *hw = &adapter->hw; 5903 u32 ctrl, ctrl_ext, rctl, status; 5904 /* Runtime suspend should only enable wakeup for link changes */ 5905 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol; 5906 int retval = 0; 5907 5908 netif_device_detach(netdev); 5909 5910 if (netif_running(netdev)) { 5911 int count = E1000_CHECK_RESET_COUNT; 5912 5913 while (test_bit(__E1000_RESETTING, &adapter->state) && count--) 5914 usleep_range(10000, 20000); 5915 5916 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state)); 5917 e1000e_down(adapter); 5918 e1000_free_irq(adapter); 5919 } 5920 e1000e_reset_interrupt_capability(adapter); 5921 5922 status = er32(STATUS); 5923 if (status & E1000_STATUS_LU) 5924 wufc &= ~E1000_WUFC_LNKC; 5925 5926 if (wufc) { 5927 e1000_setup_rctl(adapter); 5928 e1000e_set_rx_mode(netdev); 5929 5930 /* turn on all-multi mode if wake on multicast is enabled */ 5931 if (wufc & E1000_WUFC_MC) { 5932 rctl = er32(RCTL); 5933 rctl |= E1000_RCTL_MPE; 5934 ew32(RCTL, rctl); 5935 } 5936 5937 ctrl = er32(CTRL); 5938 /* advertise wake from D3Cold */ 5939 #define E1000_CTRL_ADVD3WUC 0x00100000 5940 /* phy power management enable */ 5941 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000 5942 ctrl |= E1000_CTRL_ADVD3WUC; 5943 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP)) 5944 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT; 5945 ew32(CTRL, ctrl); 5946 5947 if (adapter->hw.phy.media_type == e1000_media_type_fiber || 5948 adapter->hw.phy.media_type == 5949 e1000_media_type_internal_serdes) { 5950 /* keep the laser running in D3 */ 5951 ctrl_ext = er32(CTRL_EXT); 5952 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA; 5953 ew32(CTRL_EXT, ctrl_ext); 5954 } 5955 5956 if (adapter->flags & FLAG_IS_ICH) 5957 e1000_suspend_workarounds_ich8lan(&adapter->hw); 5958 5959 /* Allow time for pending master requests to run */ 5960 e1000e_disable_pcie_master(&adapter->hw); 5961 5962 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) { 5963 /* enable wakeup by the PHY */ 5964 retval = e1000_init_phy_wakeup(adapter, wufc); 5965 if (retval) 5966 return retval; 5967 } else { 5968 /* enable wakeup by the MAC */ 5969 ew32(WUFC, wufc); 5970 ew32(WUC, E1000_WUC_PME_EN); 5971 } 5972 } else { 5973 ew32(WUC, 0); 5974 ew32(WUFC, 0); 5975 } 5976 5977 if (adapter->hw.phy.type == e1000_phy_igp_3) 5978 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw); 5979 5980 /* Release control of h/w to f/w. If f/w is AMT enabled, this 5981 * would have already happened in close and is redundant. 5982 */ 5983 e1000e_release_hw_control(adapter); 5984 5985 pci_clear_master(pdev); 5986 5987 /* The pci-e switch on some quad port adapters will report a 5988 * correctable error when the MAC transitions from D0 to D3. To 5989 * prevent this we need to mask off the correctable errors on the 5990 * downstream port of the pci-e switch. 5991 */ 5992 if (adapter->flags & FLAG_IS_QUAD_PORT) { 5993 struct pci_dev *us_dev = pdev->bus->self; 5994 u16 devctl; 5995 5996 pcie_capability_read_word(us_dev, PCI_EXP_DEVCTL, &devctl); 5997 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL, 5998 (devctl & ~PCI_EXP_DEVCTL_CERE)); 5999 6000 pci_save_state(pdev); 6001 pci_prepare_to_sleep(pdev); 6002 6003 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL, devctl); 6004 } 6005 6006 return 0; 6007 } 6008 6009 #ifdef CONFIG_PCIEASPM 6010 static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state) 6011 { 6012 pci_disable_link_state_locked(pdev, state); 6013 } 6014 #else 6015 static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state) 6016 { 6017 u16 aspm_ctl = 0; 6018 6019 if (state & PCIE_LINK_STATE_L0S) 6020 aspm_ctl |= PCI_EXP_LNKCTL_ASPM_L0S; 6021 if (state & PCIE_LINK_STATE_L1) 6022 aspm_ctl |= PCI_EXP_LNKCTL_ASPM_L1; 6023 6024 /* Both device and parent should have the same ASPM setting. 6025 * Disable ASPM in downstream component first and then upstream. 6026 */ 6027 pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, aspm_ctl); 6028 6029 if (pdev->bus->self) 6030 pcie_capability_clear_word(pdev->bus->self, PCI_EXP_LNKCTL, 6031 aspm_ctl); 6032 } 6033 #endif 6034 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state) 6035 { 6036 dev_info(&pdev->dev, "Disabling ASPM %s %s\n", 6037 (state & PCIE_LINK_STATE_L0S) ? "L0s" : "", 6038 (state & PCIE_LINK_STATE_L1) ? "L1" : ""); 6039 6040 __e1000e_disable_aspm(pdev, state); 6041 } 6042 6043 #ifdef CONFIG_PM 6044 static bool e1000e_pm_ready(struct e1000_adapter *adapter) 6045 { 6046 return !!adapter->tx_ring->buffer_info; 6047 } 6048 6049 static int __e1000_resume(struct pci_dev *pdev) 6050 { 6051 struct net_device *netdev = pci_get_drvdata(pdev); 6052 struct e1000_adapter *adapter = netdev_priv(netdev); 6053 struct e1000_hw *hw = &adapter->hw; 6054 u16 aspm_disable_flag = 0; 6055 u32 err; 6056 6057 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S) 6058 aspm_disable_flag = PCIE_LINK_STATE_L0S; 6059 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1) 6060 aspm_disable_flag |= PCIE_LINK_STATE_L1; 6061 if (aspm_disable_flag) 6062 e1000e_disable_aspm(pdev, aspm_disable_flag); 6063 6064 pci_set_master(pdev); 6065 6066 e1000e_set_interrupt_capability(adapter); 6067 if (netif_running(netdev)) { 6068 err = e1000_request_irq(adapter); 6069 if (err) 6070 return err; 6071 } 6072 6073 if (hw->mac.type >= e1000_pch2lan) 6074 e1000_resume_workarounds_pchlan(&adapter->hw); 6075 6076 e1000e_power_up_phy(adapter); 6077 6078 /* report the system wakeup cause from S3/S4 */ 6079 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) { 6080 u16 phy_data; 6081 6082 e1e_rphy(&adapter->hw, BM_WUS, &phy_data); 6083 if (phy_data) { 6084 e_info("PHY Wakeup cause - %s\n", 6085 phy_data & E1000_WUS_EX ? "Unicast Packet" : 6086 phy_data & E1000_WUS_MC ? "Multicast Packet" : 6087 phy_data & E1000_WUS_BC ? "Broadcast Packet" : 6088 phy_data & E1000_WUS_MAG ? "Magic Packet" : 6089 phy_data & E1000_WUS_LNKC ? 6090 "Link Status Change" : "other"); 6091 } 6092 e1e_wphy(&adapter->hw, BM_WUS, ~0); 6093 } else { 6094 u32 wus = er32(WUS); 6095 if (wus) { 6096 e_info("MAC Wakeup cause - %s\n", 6097 wus & E1000_WUS_EX ? "Unicast Packet" : 6098 wus & E1000_WUS_MC ? "Multicast Packet" : 6099 wus & E1000_WUS_BC ? "Broadcast Packet" : 6100 wus & E1000_WUS_MAG ? "Magic Packet" : 6101 wus & E1000_WUS_LNKC ? "Link Status Change" : 6102 "other"); 6103 } 6104 ew32(WUS, ~0); 6105 } 6106 6107 e1000e_reset(adapter); 6108 6109 e1000_init_manageability_pt(adapter); 6110 6111 if (netif_running(netdev)) 6112 e1000e_up(adapter); 6113 6114 netif_device_attach(netdev); 6115 6116 /* If the controller has AMT, do not set DRV_LOAD until the interface 6117 * is up. For all other cases, let the f/w know that the h/w is now 6118 * under the control of the driver. 6119 */ 6120 if (!(adapter->flags & FLAG_HAS_AMT)) 6121 e1000e_get_hw_control(adapter); 6122 6123 return 0; 6124 } 6125 6126 #ifdef CONFIG_PM_SLEEP 6127 static int e1000_suspend(struct device *dev) 6128 { 6129 struct pci_dev *pdev = to_pci_dev(dev); 6130 6131 return __e1000_shutdown(pdev, false); 6132 } 6133 6134 static int e1000_resume(struct device *dev) 6135 { 6136 struct pci_dev *pdev = to_pci_dev(dev); 6137 struct net_device *netdev = pci_get_drvdata(pdev); 6138 struct e1000_adapter *adapter = netdev_priv(netdev); 6139 6140 if (e1000e_pm_ready(adapter)) 6141 adapter->idle_check = true; 6142 6143 return __e1000_resume(pdev); 6144 } 6145 #endif /* CONFIG_PM_SLEEP */ 6146 6147 #ifdef CONFIG_PM_RUNTIME 6148 static int e1000_runtime_suspend(struct device *dev) 6149 { 6150 struct pci_dev *pdev = to_pci_dev(dev); 6151 struct net_device *netdev = pci_get_drvdata(pdev); 6152 struct e1000_adapter *adapter = netdev_priv(netdev); 6153 6154 if (!e1000e_pm_ready(adapter)) 6155 return 0; 6156 6157 return __e1000_shutdown(pdev, true); 6158 } 6159 6160 static int e1000_idle(struct device *dev) 6161 { 6162 struct pci_dev *pdev = to_pci_dev(dev); 6163 struct net_device *netdev = pci_get_drvdata(pdev); 6164 struct e1000_adapter *adapter = netdev_priv(netdev); 6165 6166 if (!e1000e_pm_ready(adapter)) 6167 return 0; 6168 6169 if (adapter->idle_check) { 6170 adapter->idle_check = false; 6171 if (!e1000e_has_link(adapter)) 6172 pm_schedule_suspend(dev, MSEC_PER_SEC); 6173 } 6174 6175 return -EBUSY; 6176 } 6177 6178 static int e1000_runtime_resume(struct device *dev) 6179 { 6180 struct pci_dev *pdev = to_pci_dev(dev); 6181 struct net_device *netdev = pci_get_drvdata(pdev); 6182 struct e1000_adapter *adapter = netdev_priv(netdev); 6183 6184 if (!e1000e_pm_ready(adapter)) 6185 return 0; 6186 6187 adapter->idle_check = !dev->power.runtime_auto; 6188 return __e1000_resume(pdev); 6189 } 6190 #endif /* CONFIG_PM_RUNTIME */ 6191 #endif /* CONFIG_PM */ 6192 6193 static void e1000_shutdown(struct pci_dev *pdev) 6194 { 6195 __e1000_shutdown(pdev, false); 6196 } 6197 6198 #ifdef CONFIG_NET_POLL_CONTROLLER 6199 6200 static irqreturn_t e1000_intr_msix(int __always_unused irq, void *data) 6201 { 6202 struct net_device *netdev = data; 6203 struct e1000_adapter *adapter = netdev_priv(netdev); 6204 6205 if (adapter->msix_entries) { 6206 int vector, msix_irq; 6207 6208 vector = 0; 6209 msix_irq = adapter->msix_entries[vector].vector; 6210 disable_irq(msix_irq); 6211 e1000_intr_msix_rx(msix_irq, netdev); 6212 enable_irq(msix_irq); 6213 6214 vector++; 6215 msix_irq = adapter->msix_entries[vector].vector; 6216 disable_irq(msix_irq); 6217 e1000_intr_msix_tx(msix_irq, netdev); 6218 enable_irq(msix_irq); 6219 6220 vector++; 6221 msix_irq = adapter->msix_entries[vector].vector; 6222 disable_irq(msix_irq); 6223 e1000_msix_other(msix_irq, netdev); 6224 enable_irq(msix_irq); 6225 } 6226 6227 return IRQ_HANDLED; 6228 } 6229 6230 /** 6231 * e1000_netpoll 6232 * @netdev: network interface device structure 6233 * 6234 * Polling 'interrupt' - used by things like netconsole to send skbs 6235 * without having to re-enable interrupts. It's not called while 6236 * the interrupt routine is executing. 6237 */ 6238 static void e1000_netpoll(struct net_device *netdev) 6239 { 6240 struct e1000_adapter *adapter = netdev_priv(netdev); 6241 6242 switch (adapter->int_mode) { 6243 case E1000E_INT_MODE_MSIX: 6244 e1000_intr_msix(adapter->pdev->irq, netdev); 6245 break; 6246 case E1000E_INT_MODE_MSI: 6247 disable_irq(adapter->pdev->irq); 6248 e1000_intr_msi(adapter->pdev->irq, netdev); 6249 enable_irq(adapter->pdev->irq); 6250 break; 6251 default: /* E1000E_INT_MODE_LEGACY */ 6252 disable_irq(adapter->pdev->irq); 6253 e1000_intr(adapter->pdev->irq, netdev); 6254 enable_irq(adapter->pdev->irq); 6255 break; 6256 } 6257 } 6258 #endif 6259 6260 /** 6261 * e1000_io_error_detected - called when PCI error is detected 6262 * @pdev: Pointer to PCI device 6263 * @state: The current pci connection state 6264 * 6265 * This function is called after a PCI bus error affecting 6266 * this device has been detected. 6267 */ 6268 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, 6269 pci_channel_state_t state) 6270 { 6271 struct net_device *netdev = pci_get_drvdata(pdev); 6272 struct e1000_adapter *adapter = netdev_priv(netdev); 6273 6274 netif_device_detach(netdev); 6275 6276 if (state == pci_channel_io_perm_failure) 6277 return PCI_ERS_RESULT_DISCONNECT; 6278 6279 if (netif_running(netdev)) 6280 e1000e_down(adapter); 6281 pci_disable_device(pdev); 6282 6283 /* Request a slot slot reset. */ 6284 return PCI_ERS_RESULT_NEED_RESET; 6285 } 6286 6287 /** 6288 * e1000_io_slot_reset - called after the pci bus has been reset. 6289 * @pdev: Pointer to PCI device 6290 * 6291 * Restart the card from scratch, as if from a cold-boot. Implementation 6292 * resembles the first-half of the e1000_resume routine. 6293 */ 6294 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev) 6295 { 6296 struct net_device *netdev = pci_get_drvdata(pdev); 6297 struct e1000_adapter *adapter = netdev_priv(netdev); 6298 struct e1000_hw *hw = &adapter->hw; 6299 u16 aspm_disable_flag = 0; 6300 int err; 6301 pci_ers_result_t result; 6302 6303 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S) 6304 aspm_disable_flag = PCIE_LINK_STATE_L0S; 6305 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1) 6306 aspm_disable_flag |= PCIE_LINK_STATE_L1; 6307 if (aspm_disable_flag) 6308 e1000e_disable_aspm(pdev, aspm_disable_flag); 6309 6310 err = pci_enable_device_mem(pdev); 6311 if (err) { 6312 dev_err(&pdev->dev, 6313 "Cannot re-enable PCI device after reset.\n"); 6314 result = PCI_ERS_RESULT_DISCONNECT; 6315 } else { 6316 pdev->state_saved = true; 6317 pci_restore_state(pdev); 6318 pci_set_master(pdev); 6319 6320 pci_enable_wake(pdev, PCI_D3hot, 0); 6321 pci_enable_wake(pdev, PCI_D3cold, 0); 6322 6323 e1000e_reset(adapter); 6324 ew32(WUS, ~0); 6325 result = PCI_ERS_RESULT_RECOVERED; 6326 } 6327 6328 pci_cleanup_aer_uncorrect_error_status(pdev); 6329 6330 return result; 6331 } 6332 6333 /** 6334 * e1000_io_resume - called when traffic can start flowing again. 6335 * @pdev: Pointer to PCI device 6336 * 6337 * This callback is called when the error recovery driver tells us that 6338 * its OK to resume normal operation. Implementation resembles the 6339 * second-half of the e1000_resume routine. 6340 */ 6341 static void e1000_io_resume(struct pci_dev *pdev) 6342 { 6343 struct net_device *netdev = pci_get_drvdata(pdev); 6344 struct e1000_adapter *adapter = netdev_priv(netdev); 6345 6346 e1000_init_manageability_pt(adapter); 6347 6348 if (netif_running(netdev)) { 6349 if (e1000e_up(adapter)) { 6350 dev_err(&pdev->dev, 6351 "can't bring device back up after reset\n"); 6352 return; 6353 } 6354 } 6355 6356 netif_device_attach(netdev); 6357 6358 /* If the controller has AMT, do not set DRV_LOAD until the interface 6359 * is up. For all other cases, let the f/w know that the h/w is now 6360 * under the control of the driver. 6361 */ 6362 if (!(adapter->flags & FLAG_HAS_AMT)) 6363 e1000e_get_hw_control(adapter); 6364 } 6365 6366 static void e1000_print_device_info(struct e1000_adapter *adapter) 6367 { 6368 struct e1000_hw *hw = &adapter->hw; 6369 struct net_device *netdev = adapter->netdev; 6370 u32 ret_val; 6371 u8 pba_str[E1000_PBANUM_LENGTH]; 6372 6373 /* print bus type/speed/width info */ 6374 e_info("(PCI Express:2.5GT/s:%s) %pM\n", 6375 /* bus width */ 6376 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" : 6377 "Width x1"), 6378 /* MAC address */ 6379 netdev->dev_addr); 6380 e_info("Intel(R) PRO/%s Network Connection\n", 6381 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000"); 6382 ret_val = e1000_read_pba_string_generic(hw, pba_str, 6383 E1000_PBANUM_LENGTH); 6384 if (ret_val) 6385 strlcpy((char *)pba_str, "Unknown", sizeof(pba_str)); 6386 e_info("MAC: %d, PHY: %d, PBA No: %s\n", 6387 hw->mac.type, hw->phy.type, pba_str); 6388 } 6389 6390 static void e1000_eeprom_checks(struct e1000_adapter *adapter) 6391 { 6392 struct e1000_hw *hw = &adapter->hw; 6393 int ret_val; 6394 u16 buf = 0; 6395 6396 if (hw->mac.type != e1000_82573) 6397 return; 6398 6399 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf); 6400 le16_to_cpus(&buf); 6401 if (!ret_val && (!(buf & (1 << 0)))) { 6402 /* Deep Smart Power Down (DSPD) */ 6403 dev_warn(&adapter->pdev->dev, 6404 "Warning: detected DSPD enabled in EEPROM\n"); 6405 } 6406 } 6407 6408 static int e1000_set_features(struct net_device *netdev, 6409 netdev_features_t features) 6410 { 6411 struct e1000_adapter *adapter = netdev_priv(netdev); 6412 netdev_features_t changed = features ^ netdev->features; 6413 6414 if (changed & (NETIF_F_TSO | NETIF_F_TSO6)) 6415 adapter->flags |= FLAG_TSO_FORCE; 6416 6417 if (!(changed & (NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_TX | 6418 NETIF_F_RXCSUM | NETIF_F_RXHASH | NETIF_F_RXFCS | 6419 NETIF_F_RXALL))) 6420 return 0; 6421 6422 if (changed & NETIF_F_RXFCS) { 6423 if (features & NETIF_F_RXFCS) { 6424 adapter->flags2 &= ~FLAG2_CRC_STRIPPING; 6425 } else { 6426 /* We need to take it back to defaults, which might mean 6427 * stripping is still disabled at the adapter level. 6428 */ 6429 if (adapter->flags2 & FLAG2_DFLT_CRC_STRIPPING) 6430 adapter->flags2 |= FLAG2_CRC_STRIPPING; 6431 else 6432 adapter->flags2 &= ~FLAG2_CRC_STRIPPING; 6433 } 6434 } 6435 6436 netdev->features = features; 6437 6438 if (netif_running(netdev)) 6439 e1000e_reinit_locked(adapter); 6440 else 6441 e1000e_reset(adapter); 6442 6443 return 0; 6444 } 6445 6446 static const struct net_device_ops e1000e_netdev_ops = { 6447 .ndo_open = e1000_open, 6448 .ndo_stop = e1000_close, 6449 .ndo_start_xmit = e1000_xmit_frame, 6450 .ndo_get_stats64 = e1000e_get_stats64, 6451 .ndo_set_rx_mode = e1000e_set_rx_mode, 6452 .ndo_set_mac_address = e1000_set_mac, 6453 .ndo_change_mtu = e1000_change_mtu, 6454 .ndo_do_ioctl = e1000_ioctl, 6455 .ndo_tx_timeout = e1000_tx_timeout, 6456 .ndo_validate_addr = eth_validate_addr, 6457 6458 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid, 6459 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid, 6460 #ifdef CONFIG_NET_POLL_CONTROLLER 6461 .ndo_poll_controller = e1000_netpoll, 6462 #endif 6463 .ndo_set_features = e1000_set_features, 6464 }; 6465 6466 /** 6467 * e1000_probe - Device Initialization Routine 6468 * @pdev: PCI device information struct 6469 * @ent: entry in e1000_pci_tbl 6470 * 6471 * Returns 0 on success, negative on failure 6472 * 6473 * e1000_probe initializes an adapter identified by a pci_dev structure. 6474 * The OS initialization, configuring of the adapter private structure, 6475 * and a hardware reset occur. 6476 **/ 6477 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 6478 { 6479 struct net_device *netdev; 6480 struct e1000_adapter *adapter; 6481 struct e1000_hw *hw; 6482 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data]; 6483 resource_size_t mmio_start, mmio_len; 6484 resource_size_t flash_start, flash_len; 6485 static int cards_found; 6486 u16 aspm_disable_flag = 0; 6487 int i, err, pci_using_dac; 6488 u16 eeprom_data = 0; 6489 u16 eeprom_apme_mask = E1000_EEPROM_APME; 6490 6491 if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S) 6492 aspm_disable_flag = PCIE_LINK_STATE_L0S; 6493 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1) 6494 aspm_disable_flag |= PCIE_LINK_STATE_L1; 6495 if (aspm_disable_flag) 6496 e1000e_disable_aspm(pdev, aspm_disable_flag); 6497 6498 err = pci_enable_device_mem(pdev); 6499 if (err) 6500 return err; 6501 6502 pci_using_dac = 0; 6503 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)); 6504 if (!err) { 6505 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64)); 6506 if (!err) 6507 pci_using_dac = 1; 6508 } else { 6509 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); 6510 if (err) { 6511 err = dma_set_coherent_mask(&pdev->dev, 6512 DMA_BIT_MASK(32)); 6513 if (err) { 6514 dev_err(&pdev->dev, "No usable DMA configuration, aborting\n"); 6515 goto err_dma; 6516 } 6517 } 6518 } 6519 6520 err = pci_request_selected_regions_exclusive(pdev, 6521 pci_select_bars(pdev, IORESOURCE_MEM), 6522 e1000e_driver_name); 6523 if (err) 6524 goto err_pci_reg; 6525 6526 /* AER (Advanced Error Reporting) hooks */ 6527 pci_enable_pcie_error_reporting(pdev); 6528 6529 pci_set_master(pdev); 6530 /* PCI config space info */ 6531 err = pci_save_state(pdev); 6532 if (err) 6533 goto err_alloc_etherdev; 6534 6535 err = -ENOMEM; 6536 netdev = alloc_etherdev(sizeof(struct e1000_adapter)); 6537 if (!netdev) 6538 goto err_alloc_etherdev; 6539 6540 SET_NETDEV_DEV(netdev, &pdev->dev); 6541 6542 netdev->irq = pdev->irq; 6543 6544 pci_set_drvdata(pdev, netdev); 6545 adapter = netdev_priv(netdev); 6546 hw = &adapter->hw; 6547 adapter->netdev = netdev; 6548 adapter->pdev = pdev; 6549 adapter->ei = ei; 6550 adapter->pba = ei->pba; 6551 adapter->flags = ei->flags; 6552 adapter->flags2 = ei->flags2; 6553 adapter->hw.adapter = adapter; 6554 adapter->hw.mac.type = ei->mac; 6555 adapter->max_hw_frame_size = ei->max_hw_frame_size; 6556 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE); 6557 6558 mmio_start = pci_resource_start(pdev, 0); 6559 mmio_len = pci_resource_len(pdev, 0); 6560 6561 err = -EIO; 6562 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len); 6563 if (!adapter->hw.hw_addr) 6564 goto err_ioremap; 6565 6566 if ((adapter->flags & FLAG_HAS_FLASH) && 6567 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) { 6568 flash_start = pci_resource_start(pdev, 1); 6569 flash_len = pci_resource_len(pdev, 1); 6570 adapter->hw.flash_address = ioremap(flash_start, flash_len); 6571 if (!adapter->hw.flash_address) 6572 goto err_flashmap; 6573 } 6574 6575 /* construct the net_device struct */ 6576 netdev->netdev_ops = &e1000e_netdev_ops; 6577 e1000e_set_ethtool_ops(netdev); 6578 netdev->watchdog_timeo = 5 * HZ; 6579 netif_napi_add(netdev, &adapter->napi, e1000e_poll, 64); 6580 strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name)); 6581 6582 netdev->mem_start = mmio_start; 6583 netdev->mem_end = mmio_start + mmio_len; 6584 6585 adapter->bd_number = cards_found++; 6586 6587 e1000e_check_options(adapter); 6588 6589 /* setup adapter struct */ 6590 err = e1000_sw_init(adapter); 6591 if (err) 6592 goto err_sw_init; 6593 6594 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops)); 6595 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops)); 6596 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops)); 6597 6598 err = ei->get_variants(adapter); 6599 if (err) 6600 goto err_hw_init; 6601 6602 if ((adapter->flags & FLAG_IS_ICH) && 6603 (adapter->flags & FLAG_READ_ONLY_NVM)) 6604 e1000e_write_protect_nvm_ich8lan(&adapter->hw); 6605 6606 hw->mac.ops.get_bus_info(&adapter->hw); 6607 6608 adapter->hw.phy.autoneg_wait_to_complete = 0; 6609 6610 /* Copper options */ 6611 if (adapter->hw.phy.media_type == e1000_media_type_copper) { 6612 adapter->hw.phy.mdix = AUTO_ALL_MODES; 6613 adapter->hw.phy.disable_polarity_correction = 0; 6614 adapter->hw.phy.ms_type = e1000_ms_hw_default; 6615 } 6616 6617 if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw)) 6618 dev_info(&pdev->dev, 6619 "PHY reset is blocked due to SOL/IDER session.\n"); 6620 6621 /* Set initial default active device features */ 6622 netdev->features = (NETIF_F_SG | 6623 NETIF_F_HW_VLAN_RX | 6624 NETIF_F_HW_VLAN_TX | 6625 NETIF_F_TSO | 6626 NETIF_F_TSO6 | 6627 NETIF_F_RXHASH | 6628 NETIF_F_RXCSUM | 6629 NETIF_F_HW_CSUM); 6630 6631 /* Set user-changeable features (subset of all device features) */ 6632 netdev->hw_features = netdev->features; 6633 netdev->hw_features |= NETIF_F_RXFCS; 6634 netdev->priv_flags |= IFF_SUPP_NOFCS; 6635 netdev->hw_features |= NETIF_F_RXALL; 6636 6637 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) 6638 netdev->features |= NETIF_F_HW_VLAN_FILTER; 6639 6640 netdev->vlan_features |= (NETIF_F_SG | 6641 NETIF_F_TSO | 6642 NETIF_F_TSO6 | 6643 NETIF_F_HW_CSUM); 6644 6645 netdev->priv_flags |= IFF_UNICAST_FLT; 6646 6647 if (pci_using_dac) { 6648 netdev->features |= NETIF_F_HIGHDMA; 6649 netdev->vlan_features |= NETIF_F_HIGHDMA; 6650 } 6651 6652 if (e1000e_enable_mng_pass_thru(&adapter->hw)) 6653 adapter->flags |= FLAG_MNG_PT_ENABLED; 6654 6655 /* before reading the NVM, reset the controller to 6656 * put the device in a known good starting state 6657 */ 6658 adapter->hw.mac.ops.reset_hw(&adapter->hw); 6659 6660 /* systems with ASPM and others may see the checksum fail on the first 6661 * attempt. Let's give it a few tries 6662 */ 6663 for (i = 0;; i++) { 6664 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0) 6665 break; 6666 if (i == 2) { 6667 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n"); 6668 err = -EIO; 6669 goto err_eeprom; 6670 } 6671 } 6672 6673 e1000_eeprom_checks(adapter); 6674 6675 /* copy the MAC address */ 6676 if (e1000e_read_mac_addr(&adapter->hw)) 6677 dev_err(&pdev->dev, 6678 "NVM Read Error while reading MAC address\n"); 6679 6680 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len); 6681 6682 if (!is_valid_ether_addr(netdev->dev_addr)) { 6683 dev_err(&pdev->dev, "Invalid MAC Address: %pM\n", 6684 netdev->dev_addr); 6685 err = -EIO; 6686 goto err_eeprom; 6687 } 6688 6689 init_timer(&adapter->watchdog_timer); 6690 adapter->watchdog_timer.function = e1000_watchdog; 6691 adapter->watchdog_timer.data = (unsigned long) adapter; 6692 6693 init_timer(&adapter->phy_info_timer); 6694 adapter->phy_info_timer.function = e1000_update_phy_info; 6695 adapter->phy_info_timer.data = (unsigned long) adapter; 6696 6697 INIT_WORK(&adapter->reset_task, e1000_reset_task); 6698 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task); 6699 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround); 6700 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task); 6701 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang); 6702 6703 /* Initialize link parameters. User can change them with ethtool */ 6704 adapter->hw.mac.autoneg = 1; 6705 adapter->fc_autoneg = true; 6706 adapter->hw.fc.requested_mode = e1000_fc_default; 6707 adapter->hw.fc.current_mode = e1000_fc_default; 6708 adapter->hw.phy.autoneg_advertised = 0x2f; 6709 6710 /* ring size defaults */ 6711 adapter->rx_ring->count = E1000_DEFAULT_RXD; 6712 adapter->tx_ring->count = E1000_DEFAULT_TXD; 6713 6714 /* Initial Wake on LAN setting - If APM wake is enabled in 6715 * the EEPROM, enable the ACPI Magic Packet filter 6716 */ 6717 if (adapter->flags & FLAG_APME_IN_WUC) { 6718 /* APME bit in EEPROM is mapped to WUC.APME */ 6719 eeprom_data = er32(WUC); 6720 eeprom_apme_mask = E1000_WUC_APME; 6721 if ((hw->mac.type > e1000_ich10lan) && 6722 (eeprom_data & E1000_WUC_PHY_WAKE)) 6723 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP; 6724 } else if (adapter->flags & FLAG_APME_IN_CTRL3) { 6725 if (adapter->flags & FLAG_APME_CHECK_PORT_B && 6726 (adapter->hw.bus.func == 1)) 6727 e1000_read_nvm(&adapter->hw, NVM_INIT_CONTROL3_PORT_B, 6728 1, &eeprom_data); 6729 else 6730 e1000_read_nvm(&adapter->hw, NVM_INIT_CONTROL3_PORT_A, 6731 1, &eeprom_data); 6732 } 6733 6734 /* fetch WoL from EEPROM */ 6735 if (eeprom_data & eeprom_apme_mask) 6736 adapter->eeprom_wol |= E1000_WUFC_MAG; 6737 6738 /* now that we have the eeprom settings, apply the special cases 6739 * where the eeprom may be wrong or the board simply won't support 6740 * wake on lan on a particular port 6741 */ 6742 if (!(adapter->flags & FLAG_HAS_WOL)) 6743 adapter->eeprom_wol = 0; 6744 6745 /* initialize the wol settings based on the eeprom settings */ 6746 adapter->wol = adapter->eeprom_wol; 6747 6748 /* make sure adapter isn't asleep if manageability is enabled */ 6749 if (adapter->wol || (adapter->flags & FLAG_MNG_PT_ENABLED) || 6750 (hw->mac.ops.check_mng_mode(hw))) 6751 device_wakeup_enable(&pdev->dev); 6752 6753 /* save off EEPROM version number */ 6754 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers); 6755 6756 /* reset the hardware with the new settings */ 6757 e1000e_reset(adapter); 6758 6759 /* If the controller has AMT, do not set DRV_LOAD until the interface 6760 * is up. For all other cases, let the f/w know that the h/w is now 6761 * under the control of the driver. 6762 */ 6763 if (!(adapter->flags & FLAG_HAS_AMT)) 6764 e1000e_get_hw_control(adapter); 6765 6766 strlcpy(netdev->name, "eth%d", sizeof(netdev->name)); 6767 err = register_netdev(netdev); 6768 if (err) 6769 goto err_register; 6770 6771 /* carrier off reporting is important to ethtool even BEFORE open */ 6772 netif_carrier_off(netdev); 6773 6774 /* init PTP hardware clock */ 6775 e1000e_ptp_init(adapter); 6776 6777 e1000_print_device_info(adapter); 6778 6779 if (pci_dev_run_wake(pdev)) 6780 pm_runtime_put_noidle(&pdev->dev); 6781 6782 return 0; 6783 6784 err_register: 6785 if (!(adapter->flags & FLAG_HAS_AMT)) 6786 e1000e_release_hw_control(adapter); 6787 err_eeprom: 6788 if (hw->phy.ops.check_reset_block && !hw->phy.ops.check_reset_block(hw)) 6789 e1000_phy_hw_reset(&adapter->hw); 6790 err_hw_init: 6791 kfree(adapter->tx_ring); 6792 kfree(adapter->rx_ring); 6793 err_sw_init: 6794 if (adapter->hw.flash_address) 6795 iounmap(adapter->hw.flash_address); 6796 e1000e_reset_interrupt_capability(adapter); 6797 err_flashmap: 6798 iounmap(adapter->hw.hw_addr); 6799 err_ioremap: 6800 free_netdev(netdev); 6801 err_alloc_etherdev: 6802 pci_release_selected_regions(pdev, 6803 pci_select_bars(pdev, IORESOURCE_MEM)); 6804 err_pci_reg: 6805 err_dma: 6806 pci_disable_device(pdev); 6807 return err; 6808 } 6809 6810 /** 6811 * e1000_remove - Device Removal Routine 6812 * @pdev: PCI device information struct 6813 * 6814 * e1000_remove is called by the PCI subsystem to alert the driver 6815 * that it should release a PCI device. The could be caused by a 6816 * Hot-Plug event, or because the driver is going to be removed from 6817 * memory. 6818 **/ 6819 static void e1000_remove(struct pci_dev *pdev) 6820 { 6821 struct net_device *netdev = pci_get_drvdata(pdev); 6822 struct e1000_adapter *adapter = netdev_priv(netdev); 6823 bool down = test_bit(__E1000_DOWN, &adapter->state); 6824 6825 e1000e_ptp_remove(adapter); 6826 6827 /* The timers may be rescheduled, so explicitly disable them 6828 * from being rescheduled. 6829 */ 6830 if (!down) 6831 set_bit(__E1000_DOWN, &adapter->state); 6832 del_timer_sync(&adapter->watchdog_timer); 6833 del_timer_sync(&adapter->phy_info_timer); 6834 6835 cancel_work_sync(&adapter->reset_task); 6836 cancel_work_sync(&adapter->watchdog_task); 6837 cancel_work_sync(&adapter->downshift_task); 6838 cancel_work_sync(&adapter->update_phy_task); 6839 cancel_work_sync(&adapter->print_hang_task); 6840 6841 if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) { 6842 cancel_work_sync(&adapter->tx_hwtstamp_work); 6843 if (adapter->tx_hwtstamp_skb) { 6844 dev_kfree_skb_any(adapter->tx_hwtstamp_skb); 6845 adapter->tx_hwtstamp_skb = NULL; 6846 } 6847 } 6848 6849 if (!(netdev->flags & IFF_UP)) 6850 e1000_power_down_phy(adapter); 6851 6852 /* Don't lie to e1000_close() down the road. */ 6853 if (!down) 6854 clear_bit(__E1000_DOWN, &adapter->state); 6855 unregister_netdev(netdev); 6856 6857 if (pci_dev_run_wake(pdev)) 6858 pm_runtime_get_noresume(&pdev->dev); 6859 6860 /* Release control of h/w to f/w. If f/w is AMT enabled, this 6861 * would have already happened in close and is redundant. 6862 */ 6863 e1000e_release_hw_control(adapter); 6864 6865 e1000e_reset_interrupt_capability(adapter); 6866 kfree(adapter->tx_ring); 6867 kfree(adapter->rx_ring); 6868 6869 iounmap(adapter->hw.hw_addr); 6870 if (adapter->hw.flash_address) 6871 iounmap(adapter->hw.flash_address); 6872 pci_release_selected_regions(pdev, 6873 pci_select_bars(pdev, IORESOURCE_MEM)); 6874 6875 free_netdev(netdev); 6876 6877 /* AER disable */ 6878 pci_disable_pcie_error_reporting(pdev); 6879 6880 pci_disable_device(pdev); 6881 } 6882 6883 /* PCI Error Recovery (ERS) */ 6884 static const struct pci_error_handlers e1000_err_handler = { 6885 .error_detected = e1000_io_error_detected, 6886 .slot_reset = e1000_io_slot_reset, 6887 .resume = e1000_io_resume, 6888 }; 6889 6890 static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = { 6891 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 }, 6892 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 }, 6893 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 }, 6894 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 }, 6895 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 }, 6896 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 }, 6897 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 }, 6898 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 }, 6899 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 }, 6900 6901 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 }, 6902 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 }, 6903 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 }, 6904 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 }, 6905 6906 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 }, 6907 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 }, 6908 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 }, 6909 6910 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 }, 6911 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 }, 6912 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 }, 6913 6914 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT), 6915 board_80003es2lan }, 6916 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT), 6917 board_80003es2lan }, 6918 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT), 6919 board_80003es2lan }, 6920 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT), 6921 board_80003es2lan }, 6922 6923 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan }, 6924 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan }, 6925 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan }, 6926 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan }, 6927 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan }, 6928 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan }, 6929 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan }, 6930 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan }, 6931 6932 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan }, 6933 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan }, 6934 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan }, 6935 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan }, 6936 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan }, 6937 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan }, 6938 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan }, 6939 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan }, 6940 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan }, 6941 6942 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan }, 6943 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan }, 6944 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan }, 6945 6946 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan }, 6947 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan }, 6948 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan }, 6949 6950 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan }, 6951 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan }, 6952 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan }, 6953 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan }, 6954 6955 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan }, 6956 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan }, 6957 6958 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt }, 6959 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt }, 6960 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_LM), board_pch_lpt }, 6961 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_V), board_pch_lpt }, 6962 6963 { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */ 6964 }; 6965 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl); 6966 6967 #ifdef CONFIG_PM 6968 static const struct dev_pm_ops e1000_pm_ops = { 6969 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume) 6970 SET_RUNTIME_PM_OPS(e1000_runtime_suspend, 6971 e1000_runtime_resume, e1000_idle) 6972 }; 6973 #endif 6974 6975 /* PCI Device API Driver */ 6976 static struct pci_driver e1000_driver = { 6977 .name = e1000e_driver_name, 6978 .id_table = e1000_pci_tbl, 6979 .probe = e1000_probe, 6980 .remove = e1000_remove, 6981 #ifdef CONFIG_PM 6982 .driver = { 6983 .pm = &e1000_pm_ops, 6984 }, 6985 #endif 6986 .shutdown = e1000_shutdown, 6987 .err_handler = &e1000_err_handler 6988 }; 6989 6990 /** 6991 * e1000_init_module - Driver Registration Routine 6992 * 6993 * e1000_init_module is the first routine called when the driver is 6994 * loaded. All it does is register with the PCI subsystem. 6995 **/ 6996 static int __init e1000_init_module(void) 6997 { 6998 int ret; 6999 pr_info("Intel(R) PRO/1000 Network Driver - %s\n", 7000 e1000e_driver_version); 7001 pr_info("Copyright(c) 1999 - 2013 Intel Corporation.\n"); 7002 ret = pci_register_driver(&e1000_driver); 7003 7004 return ret; 7005 } 7006 module_init(e1000_init_module); 7007 7008 /** 7009 * e1000_exit_module - Driver Exit Cleanup Routine 7010 * 7011 * e1000_exit_module is called just before the driver is removed 7012 * from memory. 7013 **/ 7014 static void __exit e1000_exit_module(void) 7015 { 7016 pci_unregister_driver(&e1000_driver); 7017 } 7018 module_exit(e1000_exit_module); 7019 7020 7021 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); 7022 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver"); 7023 MODULE_LICENSE("GPL"); 7024 MODULE_VERSION(DRV_VERSION); 7025 7026 /* netdev.c */ 7027