xref: /linux/drivers/net/ethernet/intel/e1000e/netdev.c (revision bfd5bb6f90af092aa345b15cd78143956a13c2a8)
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
3 
4 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
5 
6 #include <linux/module.h>
7 #include <linux/types.h>
8 #include <linux/init.h>
9 #include <linux/pci.h>
10 #include <linux/vmalloc.h>
11 #include <linux/pagemap.h>
12 #include <linux/delay.h>
13 #include <linux/netdevice.h>
14 #include <linux/interrupt.h>
15 #include <linux/tcp.h>
16 #include <linux/ipv6.h>
17 #include <linux/slab.h>
18 #include <net/checksum.h>
19 #include <net/ip6_checksum.h>
20 #include <linux/ethtool.h>
21 #include <linux/if_vlan.h>
22 #include <linux/cpu.h>
23 #include <linux/smp.h>
24 #include <linux/pm_qos.h>
25 #include <linux/pm_runtime.h>
26 #include <linux/aer.h>
27 #include <linux/prefetch.h>
28 
29 #include "e1000.h"
30 
31 #define DRV_EXTRAVERSION "-k"
32 
33 #define DRV_VERSION "3.2.6" DRV_EXTRAVERSION
34 char e1000e_driver_name[] = "e1000e";
35 const char e1000e_driver_version[] = DRV_VERSION;
36 
37 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
38 static int debug = -1;
39 module_param(debug, int, 0);
40 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
41 
42 static const struct e1000_info *e1000_info_tbl[] = {
43 	[board_82571]		= &e1000_82571_info,
44 	[board_82572]		= &e1000_82572_info,
45 	[board_82573]		= &e1000_82573_info,
46 	[board_82574]		= &e1000_82574_info,
47 	[board_82583]		= &e1000_82583_info,
48 	[board_80003es2lan]	= &e1000_es2_info,
49 	[board_ich8lan]		= &e1000_ich8_info,
50 	[board_ich9lan]		= &e1000_ich9_info,
51 	[board_ich10lan]	= &e1000_ich10_info,
52 	[board_pchlan]		= &e1000_pch_info,
53 	[board_pch2lan]		= &e1000_pch2_info,
54 	[board_pch_lpt]		= &e1000_pch_lpt_info,
55 	[board_pch_spt]		= &e1000_pch_spt_info,
56 	[board_pch_cnp]		= &e1000_pch_cnp_info,
57 };
58 
59 struct e1000_reg_info {
60 	u32 ofs;
61 	char *name;
62 };
63 
64 static const struct e1000_reg_info e1000_reg_info_tbl[] = {
65 	/* General Registers */
66 	{E1000_CTRL, "CTRL"},
67 	{E1000_STATUS, "STATUS"},
68 	{E1000_CTRL_EXT, "CTRL_EXT"},
69 
70 	/* Interrupt Registers */
71 	{E1000_ICR, "ICR"},
72 
73 	/* Rx Registers */
74 	{E1000_RCTL, "RCTL"},
75 	{E1000_RDLEN(0), "RDLEN"},
76 	{E1000_RDH(0), "RDH"},
77 	{E1000_RDT(0), "RDT"},
78 	{E1000_RDTR, "RDTR"},
79 	{E1000_RXDCTL(0), "RXDCTL"},
80 	{E1000_ERT, "ERT"},
81 	{E1000_RDBAL(0), "RDBAL"},
82 	{E1000_RDBAH(0), "RDBAH"},
83 	{E1000_RDFH, "RDFH"},
84 	{E1000_RDFT, "RDFT"},
85 	{E1000_RDFHS, "RDFHS"},
86 	{E1000_RDFTS, "RDFTS"},
87 	{E1000_RDFPC, "RDFPC"},
88 
89 	/* Tx Registers */
90 	{E1000_TCTL, "TCTL"},
91 	{E1000_TDBAL(0), "TDBAL"},
92 	{E1000_TDBAH(0), "TDBAH"},
93 	{E1000_TDLEN(0), "TDLEN"},
94 	{E1000_TDH(0), "TDH"},
95 	{E1000_TDT(0), "TDT"},
96 	{E1000_TIDV, "TIDV"},
97 	{E1000_TXDCTL(0), "TXDCTL"},
98 	{E1000_TADV, "TADV"},
99 	{E1000_TARC(0), "TARC"},
100 	{E1000_TDFH, "TDFH"},
101 	{E1000_TDFT, "TDFT"},
102 	{E1000_TDFHS, "TDFHS"},
103 	{E1000_TDFTS, "TDFTS"},
104 	{E1000_TDFPC, "TDFPC"},
105 
106 	/* List Terminator */
107 	{0, NULL}
108 };
109 
110 /**
111  * __ew32_prepare - prepare to write to MAC CSR register on certain parts
112  * @hw: pointer to the HW structure
113  *
114  * When updating the MAC CSR registers, the Manageability Engine (ME) could
115  * be accessing the registers at the same time.  Normally, this is handled in
116  * h/w by an arbiter but on some parts there is a bug that acknowledges Host
117  * accesses later than it should which could result in the register to have
118  * an incorrect value.  Workaround this by checking the FWSM register which
119  * has bit 24 set while ME is accessing MAC CSR registers, wait if it is set
120  * and try again a number of times.
121  **/
122 s32 __ew32_prepare(struct e1000_hw *hw)
123 {
124 	s32 i = E1000_ICH_FWSM_PCIM2PCI_COUNT;
125 
126 	while ((er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI) && --i)
127 		udelay(50);
128 
129 	return i;
130 }
131 
132 void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
133 {
134 	if (hw->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
135 		__ew32_prepare(hw);
136 
137 	writel(val, hw->hw_addr + reg);
138 }
139 
140 /**
141  * e1000_regdump - register printout routine
142  * @hw: pointer to the HW structure
143  * @reginfo: pointer to the register info table
144  **/
145 static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
146 {
147 	int n = 0;
148 	char rname[16];
149 	u32 regs[8];
150 
151 	switch (reginfo->ofs) {
152 	case E1000_RXDCTL(0):
153 		for (n = 0; n < 2; n++)
154 			regs[n] = __er32(hw, E1000_RXDCTL(n));
155 		break;
156 	case E1000_TXDCTL(0):
157 		for (n = 0; n < 2; n++)
158 			regs[n] = __er32(hw, E1000_TXDCTL(n));
159 		break;
160 	case E1000_TARC(0):
161 		for (n = 0; n < 2; n++)
162 			regs[n] = __er32(hw, E1000_TARC(n));
163 		break;
164 	default:
165 		pr_info("%-15s %08x\n",
166 			reginfo->name, __er32(hw, reginfo->ofs));
167 		return;
168 	}
169 
170 	snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
171 	pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]);
172 }
173 
174 static void e1000e_dump_ps_pages(struct e1000_adapter *adapter,
175 				 struct e1000_buffer *bi)
176 {
177 	int i;
178 	struct e1000_ps_page *ps_page;
179 
180 	for (i = 0; i < adapter->rx_ps_pages; i++) {
181 		ps_page = &bi->ps_pages[i];
182 
183 		if (ps_page->page) {
184 			pr_info("packet dump for ps_page %d:\n", i);
185 			print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
186 				       16, 1, page_address(ps_page->page),
187 				       PAGE_SIZE, true);
188 		}
189 	}
190 }
191 
192 /**
193  * e1000e_dump - Print registers, Tx-ring and Rx-ring
194  * @adapter: board private structure
195  **/
196 static void e1000e_dump(struct e1000_adapter *adapter)
197 {
198 	struct net_device *netdev = adapter->netdev;
199 	struct e1000_hw *hw = &adapter->hw;
200 	struct e1000_reg_info *reginfo;
201 	struct e1000_ring *tx_ring = adapter->tx_ring;
202 	struct e1000_tx_desc *tx_desc;
203 	struct my_u0 {
204 		__le64 a;
205 		__le64 b;
206 	} *u0;
207 	struct e1000_buffer *buffer_info;
208 	struct e1000_ring *rx_ring = adapter->rx_ring;
209 	union e1000_rx_desc_packet_split *rx_desc_ps;
210 	union e1000_rx_desc_extended *rx_desc;
211 	struct my_u1 {
212 		__le64 a;
213 		__le64 b;
214 		__le64 c;
215 		__le64 d;
216 	} *u1;
217 	u32 staterr;
218 	int i = 0;
219 
220 	if (!netif_msg_hw(adapter))
221 		return;
222 
223 	/* Print netdevice Info */
224 	if (netdev) {
225 		dev_info(&adapter->pdev->dev, "Net device Info\n");
226 		pr_info("Device Name     state            trans_start\n");
227 		pr_info("%-15s %016lX %016lX\n", netdev->name,
228 			netdev->state, dev_trans_start(netdev));
229 	}
230 
231 	/* Print Registers */
232 	dev_info(&adapter->pdev->dev, "Register Dump\n");
233 	pr_info(" Register Name   Value\n");
234 	for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
235 	     reginfo->name; reginfo++) {
236 		e1000_regdump(hw, reginfo);
237 	}
238 
239 	/* Print Tx Ring Summary */
240 	if (!netdev || !netif_running(netdev))
241 		return;
242 
243 	dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
244 	pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
245 	buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
246 	pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n",
247 		0, tx_ring->next_to_use, tx_ring->next_to_clean,
248 		(unsigned long long)buffer_info->dma,
249 		buffer_info->length,
250 		buffer_info->next_to_watch,
251 		(unsigned long long)buffer_info->time_stamp);
252 
253 	/* Print Tx Ring */
254 	if (!netif_msg_tx_done(adapter))
255 		goto rx_ring_summary;
256 
257 	dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
258 
259 	/* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
260 	 *
261 	 * Legacy Transmit Descriptor
262 	 *   +--------------------------------------------------------------+
263 	 * 0 |         Buffer Address [63:0] (Reserved on Write Back)       |
264 	 *   +--------------------------------------------------------------+
265 	 * 8 | Special  |    CSS     | Status |  CMD    |  CSO   |  Length  |
266 	 *   +--------------------------------------------------------------+
267 	 *   63       48 47        36 35    32 31     24 23    16 15        0
268 	 *
269 	 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
270 	 *   63      48 47    40 39       32 31             16 15    8 7      0
271 	 *   +----------------------------------------------------------------+
272 	 * 0 |  TUCSE  | TUCS0  |   TUCSS   |     IPCSE       | IPCS0 | IPCSS |
273 	 *   +----------------------------------------------------------------+
274 	 * 8 |   MSS   | HDRLEN | RSV | STA | TUCMD | DTYP |      PAYLEN      |
275 	 *   +----------------------------------------------------------------+
276 	 *   63      48 47    40 39 36 35 32 31   24 23  20 19                0
277 	 *
278 	 * Extended Data Descriptor (DTYP=0x1)
279 	 *   +----------------------------------------------------------------+
280 	 * 0 |                     Buffer Address [63:0]                      |
281 	 *   +----------------------------------------------------------------+
282 	 * 8 | VLAN tag |  POPTS  | Rsvd | Status | Command | DTYP |  DTALEN  |
283 	 *   +----------------------------------------------------------------+
284 	 *   63       48 47     40 39  36 35    32 31     24 23  20 19        0
285 	 */
286 	pr_info("Tl[desc]     [address 63:0  ] [SpeCssSCmCsLen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Legacy format\n");
287 	pr_info("Tc[desc]     [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Ext Context format\n");
288 	pr_info("Td[desc]     [address 63:0  ] [VlaPoRSCm1Dlen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Ext Data format\n");
289 	for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
290 		const char *next_desc;
291 		tx_desc = E1000_TX_DESC(*tx_ring, i);
292 		buffer_info = &tx_ring->buffer_info[i];
293 		u0 = (struct my_u0 *)tx_desc;
294 		if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
295 			next_desc = " NTC/U";
296 		else if (i == tx_ring->next_to_use)
297 			next_desc = " NTU";
298 		else if (i == tx_ring->next_to_clean)
299 			next_desc = " NTC";
300 		else
301 			next_desc = "";
302 		pr_info("T%c[0x%03X]    %016llX %016llX %016llX %04X  %3X %016llX %p%s\n",
303 			(!(le64_to_cpu(u0->b) & BIT(29)) ? 'l' :
304 			 ((le64_to_cpu(u0->b) & BIT(20)) ? 'd' : 'c')),
305 			i,
306 			(unsigned long long)le64_to_cpu(u0->a),
307 			(unsigned long long)le64_to_cpu(u0->b),
308 			(unsigned long long)buffer_info->dma,
309 			buffer_info->length, buffer_info->next_to_watch,
310 			(unsigned long long)buffer_info->time_stamp,
311 			buffer_info->skb, next_desc);
312 
313 		if (netif_msg_pktdata(adapter) && buffer_info->skb)
314 			print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
315 				       16, 1, buffer_info->skb->data,
316 				       buffer_info->skb->len, true);
317 	}
318 
319 	/* Print Rx Ring Summary */
320 rx_ring_summary:
321 	dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
322 	pr_info("Queue [NTU] [NTC]\n");
323 	pr_info(" %5d %5X %5X\n",
324 		0, rx_ring->next_to_use, rx_ring->next_to_clean);
325 
326 	/* Print Rx Ring */
327 	if (!netif_msg_rx_status(adapter))
328 		return;
329 
330 	dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
331 	switch (adapter->rx_ps_pages) {
332 	case 1:
333 	case 2:
334 	case 3:
335 		/* [Extended] Packet Split Receive Descriptor Format
336 		 *
337 		 *    +-----------------------------------------------------+
338 		 *  0 |                Buffer Address 0 [63:0]              |
339 		 *    +-----------------------------------------------------+
340 		 *  8 |                Buffer Address 1 [63:0]              |
341 		 *    +-----------------------------------------------------+
342 		 * 16 |                Buffer Address 2 [63:0]              |
343 		 *    +-----------------------------------------------------+
344 		 * 24 |                Buffer Address 3 [63:0]              |
345 		 *    +-----------------------------------------------------+
346 		 */
347 		pr_info("R  [desc]      [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma       ] [bi->skb] <-- Ext Pkt Split format\n");
348 		/* [Extended] Receive Descriptor (Write-Back) Format
349 		 *
350 		 *   63       48 47    32 31     13 12    8 7    4 3        0
351 		 *   +------------------------------------------------------+
352 		 * 0 | Packet   | IP     |  Rsvd   | MRQ   | Rsvd | MRQ RSS |
353 		 *   | Checksum | Ident  |         | Queue |      |  Type   |
354 		 *   +------------------------------------------------------+
355 		 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
356 		 *   +------------------------------------------------------+
357 		 *   63       48 47    32 31            20 19               0
358 		 */
359 		pr_info("RWB[desc]      [ck ipid mrqhsh] [vl   l0 ee  es] [ l3  l2  l1 hs] [reserved      ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n");
360 		for (i = 0; i < rx_ring->count; i++) {
361 			const char *next_desc;
362 			buffer_info = &rx_ring->buffer_info[i];
363 			rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
364 			u1 = (struct my_u1 *)rx_desc_ps;
365 			staterr =
366 			    le32_to_cpu(rx_desc_ps->wb.middle.status_error);
367 
368 			if (i == rx_ring->next_to_use)
369 				next_desc = " NTU";
370 			else if (i == rx_ring->next_to_clean)
371 				next_desc = " NTC";
372 			else
373 				next_desc = "";
374 
375 			if (staterr & E1000_RXD_STAT_DD) {
376 				/* Descriptor Done */
377 				pr_info("%s[0x%03X]     %016llX %016llX %016llX %016llX ---------------- %p%s\n",
378 					"RWB", i,
379 					(unsigned long long)le64_to_cpu(u1->a),
380 					(unsigned long long)le64_to_cpu(u1->b),
381 					(unsigned long long)le64_to_cpu(u1->c),
382 					(unsigned long long)le64_to_cpu(u1->d),
383 					buffer_info->skb, next_desc);
384 			} else {
385 				pr_info("%s[0x%03X]     %016llX %016llX %016llX %016llX %016llX %p%s\n",
386 					"R  ", i,
387 					(unsigned long long)le64_to_cpu(u1->a),
388 					(unsigned long long)le64_to_cpu(u1->b),
389 					(unsigned long long)le64_to_cpu(u1->c),
390 					(unsigned long long)le64_to_cpu(u1->d),
391 					(unsigned long long)buffer_info->dma,
392 					buffer_info->skb, next_desc);
393 
394 				if (netif_msg_pktdata(adapter))
395 					e1000e_dump_ps_pages(adapter,
396 							     buffer_info);
397 			}
398 		}
399 		break;
400 	default:
401 	case 0:
402 		/* Extended Receive Descriptor (Read) Format
403 		 *
404 		 *   +-----------------------------------------------------+
405 		 * 0 |                Buffer Address [63:0]                |
406 		 *   +-----------------------------------------------------+
407 		 * 8 |                      Reserved                       |
408 		 *   +-----------------------------------------------------+
409 		 */
410 		pr_info("R  [desc]      [buf addr 63:0 ] [reserved 63:0 ] [bi->dma       ] [bi->skb] <-- Ext (Read) format\n");
411 		/* Extended Receive Descriptor (Write-Back) Format
412 		 *
413 		 *   63       48 47    32 31    24 23            4 3        0
414 		 *   +------------------------------------------------------+
415 		 *   |     RSS Hash      |        |               |         |
416 		 * 0 +-------------------+  Rsvd  |   Reserved    | MRQ RSS |
417 		 *   | Packet   | IP     |        |               |  Type   |
418 		 *   | Checksum | Ident  |        |               |         |
419 		 *   +------------------------------------------------------+
420 		 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
421 		 *   +------------------------------------------------------+
422 		 *   63       48 47    32 31            20 19               0
423 		 */
424 		pr_info("RWB[desc]      [cs ipid    mrq] [vt   ln xe  xs] [bi->skb] <-- Ext (Write-Back) format\n");
425 
426 		for (i = 0; i < rx_ring->count; i++) {
427 			const char *next_desc;
428 
429 			buffer_info = &rx_ring->buffer_info[i];
430 			rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
431 			u1 = (struct my_u1 *)rx_desc;
432 			staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
433 
434 			if (i == rx_ring->next_to_use)
435 				next_desc = " NTU";
436 			else if (i == rx_ring->next_to_clean)
437 				next_desc = " NTC";
438 			else
439 				next_desc = "";
440 
441 			if (staterr & E1000_RXD_STAT_DD) {
442 				/* Descriptor Done */
443 				pr_info("%s[0x%03X]     %016llX %016llX ---------------- %p%s\n",
444 					"RWB", i,
445 					(unsigned long long)le64_to_cpu(u1->a),
446 					(unsigned long long)le64_to_cpu(u1->b),
447 					buffer_info->skb, next_desc);
448 			} else {
449 				pr_info("%s[0x%03X]     %016llX %016llX %016llX %p%s\n",
450 					"R  ", i,
451 					(unsigned long long)le64_to_cpu(u1->a),
452 					(unsigned long long)le64_to_cpu(u1->b),
453 					(unsigned long long)buffer_info->dma,
454 					buffer_info->skb, next_desc);
455 
456 				if (netif_msg_pktdata(adapter) &&
457 				    buffer_info->skb)
458 					print_hex_dump(KERN_INFO, "",
459 						       DUMP_PREFIX_ADDRESS, 16,
460 						       1,
461 						       buffer_info->skb->data,
462 						       adapter->rx_buffer_len,
463 						       true);
464 			}
465 		}
466 	}
467 }
468 
469 /**
470  * e1000_desc_unused - calculate if we have unused descriptors
471  **/
472 static int e1000_desc_unused(struct e1000_ring *ring)
473 {
474 	if (ring->next_to_clean > ring->next_to_use)
475 		return ring->next_to_clean - ring->next_to_use - 1;
476 
477 	return ring->count + ring->next_to_clean - ring->next_to_use - 1;
478 }
479 
480 /**
481  * e1000e_systim_to_hwtstamp - convert system time value to hw time stamp
482  * @adapter: board private structure
483  * @hwtstamps: time stamp structure to update
484  * @systim: unsigned 64bit system time value.
485  *
486  * Convert the system time value stored in the RX/TXSTMP registers into a
487  * hwtstamp which can be used by the upper level time stamping functions.
488  *
489  * The 'systim_lock' spinlock is used to protect the consistency of the
490  * system time value. This is needed because reading the 64 bit time
491  * value involves reading two 32 bit registers. The first read latches the
492  * value.
493  **/
494 static void e1000e_systim_to_hwtstamp(struct e1000_adapter *adapter,
495 				      struct skb_shared_hwtstamps *hwtstamps,
496 				      u64 systim)
497 {
498 	u64 ns;
499 	unsigned long flags;
500 
501 	spin_lock_irqsave(&adapter->systim_lock, flags);
502 	ns = timecounter_cyc2time(&adapter->tc, systim);
503 	spin_unlock_irqrestore(&adapter->systim_lock, flags);
504 
505 	memset(hwtstamps, 0, sizeof(*hwtstamps));
506 	hwtstamps->hwtstamp = ns_to_ktime(ns);
507 }
508 
509 /**
510  * e1000e_rx_hwtstamp - utility function which checks for Rx time stamp
511  * @adapter: board private structure
512  * @status: descriptor extended error and status field
513  * @skb: particular skb to include time stamp
514  *
515  * If the time stamp is valid, convert it into the timecounter ns value
516  * and store that result into the shhwtstamps structure which is passed
517  * up the network stack.
518  **/
519 static void e1000e_rx_hwtstamp(struct e1000_adapter *adapter, u32 status,
520 			       struct sk_buff *skb)
521 {
522 	struct e1000_hw *hw = &adapter->hw;
523 	u64 rxstmp;
524 
525 	if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP) ||
526 	    !(status & E1000_RXDEXT_STATERR_TST) ||
527 	    !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
528 		return;
529 
530 	/* The Rx time stamp registers contain the time stamp.  No other
531 	 * received packet will be time stamped until the Rx time stamp
532 	 * registers are read.  Because only one packet can be time stamped
533 	 * at a time, the register values must belong to this packet and
534 	 * therefore none of the other additional attributes need to be
535 	 * compared.
536 	 */
537 	rxstmp = (u64)er32(RXSTMPL);
538 	rxstmp |= (u64)er32(RXSTMPH) << 32;
539 	e1000e_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), rxstmp);
540 
541 	adapter->flags2 &= ~FLAG2_CHECK_RX_HWTSTAMP;
542 }
543 
544 /**
545  * e1000_receive_skb - helper function to handle Rx indications
546  * @adapter: board private structure
547  * @staterr: descriptor extended error and status field as written by hardware
548  * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
549  * @skb: pointer to sk_buff to be indicated to stack
550  **/
551 static void e1000_receive_skb(struct e1000_adapter *adapter,
552 			      struct net_device *netdev, struct sk_buff *skb,
553 			      u32 staterr, __le16 vlan)
554 {
555 	u16 tag = le16_to_cpu(vlan);
556 
557 	e1000e_rx_hwtstamp(adapter, staterr, skb);
558 
559 	skb->protocol = eth_type_trans(skb, netdev);
560 
561 	if (staterr & E1000_RXD_STAT_VP)
562 		__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), tag);
563 
564 	napi_gro_receive(&adapter->napi, skb);
565 }
566 
567 /**
568  * e1000_rx_checksum - Receive Checksum Offload
569  * @adapter: board private structure
570  * @status_err: receive descriptor status and error fields
571  * @csum: receive descriptor csum field
572  * @sk_buff: socket buffer with received data
573  **/
574 static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
575 			      struct sk_buff *skb)
576 {
577 	u16 status = (u16)status_err;
578 	u8 errors = (u8)(status_err >> 24);
579 
580 	skb_checksum_none_assert(skb);
581 
582 	/* Rx checksum disabled */
583 	if (!(adapter->netdev->features & NETIF_F_RXCSUM))
584 		return;
585 
586 	/* Ignore Checksum bit is set */
587 	if (status & E1000_RXD_STAT_IXSM)
588 		return;
589 
590 	/* TCP/UDP checksum error bit or IP checksum error bit is set */
591 	if (errors & (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) {
592 		/* let the stack verify checksum errors */
593 		adapter->hw_csum_err++;
594 		return;
595 	}
596 
597 	/* TCP/UDP Checksum has not been calculated */
598 	if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
599 		return;
600 
601 	/* It must be a TCP or UDP packet with a valid checksum */
602 	skb->ip_summed = CHECKSUM_UNNECESSARY;
603 	adapter->hw_csum_good++;
604 }
605 
606 static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i)
607 {
608 	struct e1000_adapter *adapter = rx_ring->adapter;
609 	struct e1000_hw *hw = &adapter->hw;
610 	s32 ret_val = __ew32_prepare(hw);
611 
612 	writel(i, rx_ring->tail);
613 
614 	if (unlikely(!ret_val && (i != readl(rx_ring->tail)))) {
615 		u32 rctl = er32(RCTL);
616 
617 		ew32(RCTL, rctl & ~E1000_RCTL_EN);
618 		e_err("ME firmware caused invalid RDT - resetting\n");
619 		schedule_work(&adapter->reset_task);
620 	}
621 }
622 
623 static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i)
624 {
625 	struct e1000_adapter *adapter = tx_ring->adapter;
626 	struct e1000_hw *hw = &adapter->hw;
627 	s32 ret_val = __ew32_prepare(hw);
628 
629 	writel(i, tx_ring->tail);
630 
631 	if (unlikely(!ret_val && (i != readl(tx_ring->tail)))) {
632 		u32 tctl = er32(TCTL);
633 
634 		ew32(TCTL, tctl & ~E1000_TCTL_EN);
635 		e_err("ME firmware caused invalid TDT - resetting\n");
636 		schedule_work(&adapter->reset_task);
637 	}
638 }
639 
640 /**
641  * e1000_alloc_rx_buffers - Replace used receive buffers
642  * @rx_ring: Rx descriptor ring
643  **/
644 static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring,
645 				   int cleaned_count, gfp_t gfp)
646 {
647 	struct e1000_adapter *adapter = rx_ring->adapter;
648 	struct net_device *netdev = adapter->netdev;
649 	struct pci_dev *pdev = adapter->pdev;
650 	union e1000_rx_desc_extended *rx_desc;
651 	struct e1000_buffer *buffer_info;
652 	struct sk_buff *skb;
653 	unsigned int i;
654 	unsigned int bufsz = adapter->rx_buffer_len;
655 
656 	i = rx_ring->next_to_use;
657 	buffer_info = &rx_ring->buffer_info[i];
658 
659 	while (cleaned_count--) {
660 		skb = buffer_info->skb;
661 		if (skb) {
662 			skb_trim(skb, 0);
663 			goto map_skb;
664 		}
665 
666 		skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
667 		if (!skb) {
668 			/* Better luck next round */
669 			adapter->alloc_rx_buff_failed++;
670 			break;
671 		}
672 
673 		buffer_info->skb = skb;
674 map_skb:
675 		buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
676 						  adapter->rx_buffer_len,
677 						  DMA_FROM_DEVICE);
678 		if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
679 			dev_err(&pdev->dev, "Rx DMA map failed\n");
680 			adapter->rx_dma_failed++;
681 			break;
682 		}
683 
684 		rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
685 		rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
686 
687 		if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
688 			/* Force memory writes to complete before letting h/w
689 			 * know there are new descriptors to fetch.  (Only
690 			 * applicable for weak-ordered memory model archs,
691 			 * such as IA-64).
692 			 */
693 			wmb();
694 			if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
695 				e1000e_update_rdt_wa(rx_ring, i);
696 			else
697 				writel(i, rx_ring->tail);
698 		}
699 		i++;
700 		if (i == rx_ring->count)
701 			i = 0;
702 		buffer_info = &rx_ring->buffer_info[i];
703 	}
704 
705 	rx_ring->next_to_use = i;
706 }
707 
708 /**
709  * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
710  * @rx_ring: Rx descriptor ring
711  **/
712 static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring,
713 				      int cleaned_count, gfp_t gfp)
714 {
715 	struct e1000_adapter *adapter = rx_ring->adapter;
716 	struct net_device *netdev = adapter->netdev;
717 	struct pci_dev *pdev = adapter->pdev;
718 	union e1000_rx_desc_packet_split *rx_desc;
719 	struct e1000_buffer *buffer_info;
720 	struct e1000_ps_page *ps_page;
721 	struct sk_buff *skb;
722 	unsigned int i, j;
723 
724 	i = rx_ring->next_to_use;
725 	buffer_info = &rx_ring->buffer_info[i];
726 
727 	while (cleaned_count--) {
728 		rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
729 
730 		for (j = 0; j < PS_PAGE_BUFFERS; j++) {
731 			ps_page = &buffer_info->ps_pages[j];
732 			if (j >= adapter->rx_ps_pages) {
733 				/* all unused desc entries get hw null ptr */
734 				rx_desc->read.buffer_addr[j + 1] =
735 				    ~cpu_to_le64(0);
736 				continue;
737 			}
738 			if (!ps_page->page) {
739 				ps_page->page = alloc_page(gfp);
740 				if (!ps_page->page) {
741 					adapter->alloc_rx_buff_failed++;
742 					goto no_buffers;
743 				}
744 				ps_page->dma = dma_map_page(&pdev->dev,
745 							    ps_page->page,
746 							    0, PAGE_SIZE,
747 							    DMA_FROM_DEVICE);
748 				if (dma_mapping_error(&pdev->dev,
749 						      ps_page->dma)) {
750 					dev_err(&adapter->pdev->dev,
751 						"Rx DMA page map failed\n");
752 					adapter->rx_dma_failed++;
753 					goto no_buffers;
754 				}
755 			}
756 			/* Refresh the desc even if buffer_addrs
757 			 * didn't change because each write-back
758 			 * erases this info.
759 			 */
760 			rx_desc->read.buffer_addr[j + 1] =
761 			    cpu_to_le64(ps_page->dma);
762 		}
763 
764 		skb = __netdev_alloc_skb_ip_align(netdev, adapter->rx_ps_bsize0,
765 						  gfp);
766 
767 		if (!skb) {
768 			adapter->alloc_rx_buff_failed++;
769 			break;
770 		}
771 
772 		buffer_info->skb = skb;
773 		buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
774 						  adapter->rx_ps_bsize0,
775 						  DMA_FROM_DEVICE);
776 		if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
777 			dev_err(&pdev->dev, "Rx DMA map failed\n");
778 			adapter->rx_dma_failed++;
779 			/* cleanup skb */
780 			dev_kfree_skb_any(skb);
781 			buffer_info->skb = NULL;
782 			break;
783 		}
784 
785 		rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
786 
787 		if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
788 			/* Force memory writes to complete before letting h/w
789 			 * know there are new descriptors to fetch.  (Only
790 			 * applicable for weak-ordered memory model archs,
791 			 * such as IA-64).
792 			 */
793 			wmb();
794 			if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
795 				e1000e_update_rdt_wa(rx_ring, i << 1);
796 			else
797 				writel(i << 1, rx_ring->tail);
798 		}
799 
800 		i++;
801 		if (i == rx_ring->count)
802 			i = 0;
803 		buffer_info = &rx_ring->buffer_info[i];
804 	}
805 
806 no_buffers:
807 	rx_ring->next_to_use = i;
808 }
809 
810 /**
811  * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
812  * @rx_ring: Rx descriptor ring
813  * @cleaned_count: number of buffers to allocate this pass
814  **/
815 
816 static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring,
817 					 int cleaned_count, gfp_t gfp)
818 {
819 	struct e1000_adapter *adapter = rx_ring->adapter;
820 	struct net_device *netdev = adapter->netdev;
821 	struct pci_dev *pdev = adapter->pdev;
822 	union e1000_rx_desc_extended *rx_desc;
823 	struct e1000_buffer *buffer_info;
824 	struct sk_buff *skb;
825 	unsigned int i;
826 	unsigned int bufsz = 256 - 16;	/* for skb_reserve */
827 
828 	i = rx_ring->next_to_use;
829 	buffer_info = &rx_ring->buffer_info[i];
830 
831 	while (cleaned_count--) {
832 		skb = buffer_info->skb;
833 		if (skb) {
834 			skb_trim(skb, 0);
835 			goto check_page;
836 		}
837 
838 		skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
839 		if (unlikely(!skb)) {
840 			/* Better luck next round */
841 			adapter->alloc_rx_buff_failed++;
842 			break;
843 		}
844 
845 		buffer_info->skb = skb;
846 check_page:
847 		/* allocate a new page if necessary */
848 		if (!buffer_info->page) {
849 			buffer_info->page = alloc_page(gfp);
850 			if (unlikely(!buffer_info->page)) {
851 				adapter->alloc_rx_buff_failed++;
852 				break;
853 			}
854 		}
855 
856 		if (!buffer_info->dma) {
857 			buffer_info->dma = dma_map_page(&pdev->dev,
858 							buffer_info->page, 0,
859 							PAGE_SIZE,
860 							DMA_FROM_DEVICE);
861 			if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
862 				adapter->alloc_rx_buff_failed++;
863 				break;
864 			}
865 		}
866 
867 		rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
868 		rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
869 
870 		if (unlikely(++i == rx_ring->count))
871 			i = 0;
872 		buffer_info = &rx_ring->buffer_info[i];
873 	}
874 
875 	if (likely(rx_ring->next_to_use != i)) {
876 		rx_ring->next_to_use = i;
877 		if (unlikely(i-- == 0))
878 			i = (rx_ring->count - 1);
879 
880 		/* Force memory writes to complete before letting h/w
881 		 * know there are new descriptors to fetch.  (Only
882 		 * applicable for weak-ordered memory model archs,
883 		 * such as IA-64).
884 		 */
885 		wmb();
886 		if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
887 			e1000e_update_rdt_wa(rx_ring, i);
888 		else
889 			writel(i, rx_ring->tail);
890 	}
891 }
892 
893 static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss,
894 				 struct sk_buff *skb)
895 {
896 	if (netdev->features & NETIF_F_RXHASH)
897 		skb_set_hash(skb, le32_to_cpu(rss), PKT_HASH_TYPE_L3);
898 }
899 
900 /**
901  * e1000_clean_rx_irq - Send received data up the network stack
902  * @rx_ring: Rx descriptor ring
903  *
904  * the return value indicates whether actual cleaning was done, there
905  * is no guarantee that everything was cleaned
906  **/
907 static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done,
908 			       int work_to_do)
909 {
910 	struct e1000_adapter *adapter = rx_ring->adapter;
911 	struct net_device *netdev = adapter->netdev;
912 	struct pci_dev *pdev = adapter->pdev;
913 	struct e1000_hw *hw = &adapter->hw;
914 	union e1000_rx_desc_extended *rx_desc, *next_rxd;
915 	struct e1000_buffer *buffer_info, *next_buffer;
916 	u32 length, staterr;
917 	unsigned int i;
918 	int cleaned_count = 0;
919 	bool cleaned = false;
920 	unsigned int total_rx_bytes = 0, total_rx_packets = 0;
921 
922 	i = rx_ring->next_to_clean;
923 	rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
924 	staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
925 	buffer_info = &rx_ring->buffer_info[i];
926 
927 	while (staterr & E1000_RXD_STAT_DD) {
928 		struct sk_buff *skb;
929 
930 		if (*work_done >= work_to_do)
931 			break;
932 		(*work_done)++;
933 		dma_rmb();	/* read descriptor and rx_buffer_info after status DD */
934 
935 		skb = buffer_info->skb;
936 		buffer_info->skb = NULL;
937 
938 		prefetch(skb->data - NET_IP_ALIGN);
939 
940 		i++;
941 		if (i == rx_ring->count)
942 			i = 0;
943 		next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
944 		prefetch(next_rxd);
945 
946 		next_buffer = &rx_ring->buffer_info[i];
947 
948 		cleaned = true;
949 		cleaned_count++;
950 		dma_unmap_single(&pdev->dev, buffer_info->dma,
951 				 adapter->rx_buffer_len, DMA_FROM_DEVICE);
952 		buffer_info->dma = 0;
953 
954 		length = le16_to_cpu(rx_desc->wb.upper.length);
955 
956 		/* !EOP means multiple descriptors were used to store a single
957 		 * packet, if that's the case we need to toss it.  In fact, we
958 		 * need to toss every packet with the EOP bit clear and the
959 		 * next frame that _does_ have the EOP bit set, as it is by
960 		 * definition only a frame fragment
961 		 */
962 		if (unlikely(!(staterr & E1000_RXD_STAT_EOP)))
963 			adapter->flags2 |= FLAG2_IS_DISCARDING;
964 
965 		if (adapter->flags2 & FLAG2_IS_DISCARDING) {
966 			/* All receives must fit into a single buffer */
967 			e_dbg("Receive packet consumed multiple buffers\n");
968 			/* recycle */
969 			buffer_info->skb = skb;
970 			if (staterr & E1000_RXD_STAT_EOP)
971 				adapter->flags2 &= ~FLAG2_IS_DISCARDING;
972 			goto next_desc;
973 		}
974 
975 		if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
976 			     !(netdev->features & NETIF_F_RXALL))) {
977 			/* recycle */
978 			buffer_info->skb = skb;
979 			goto next_desc;
980 		}
981 
982 		/* adjust length to remove Ethernet CRC */
983 		if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
984 			/* If configured to store CRC, don't subtract FCS,
985 			 * but keep the FCS bytes out of the total_rx_bytes
986 			 * counter
987 			 */
988 			if (netdev->features & NETIF_F_RXFCS)
989 				total_rx_bytes -= 4;
990 			else
991 				length -= 4;
992 		}
993 
994 		total_rx_bytes += length;
995 		total_rx_packets++;
996 
997 		/* code added for copybreak, this should improve
998 		 * performance for small packets with large amounts
999 		 * of reassembly being done in the stack
1000 		 */
1001 		if (length < copybreak) {
1002 			struct sk_buff *new_skb =
1003 				napi_alloc_skb(&adapter->napi, length);
1004 			if (new_skb) {
1005 				skb_copy_to_linear_data_offset(new_skb,
1006 							       -NET_IP_ALIGN,
1007 							       (skb->data -
1008 								NET_IP_ALIGN),
1009 							       (length +
1010 								NET_IP_ALIGN));
1011 				/* save the skb in buffer_info as good */
1012 				buffer_info->skb = skb;
1013 				skb = new_skb;
1014 			}
1015 			/* else just continue with the old one */
1016 		}
1017 		/* end copybreak code */
1018 		skb_put(skb, length);
1019 
1020 		/* Receive Checksum Offload */
1021 		e1000_rx_checksum(adapter, staterr, skb);
1022 
1023 		e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1024 
1025 		e1000_receive_skb(adapter, netdev, skb, staterr,
1026 				  rx_desc->wb.upper.vlan);
1027 
1028 next_desc:
1029 		rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1030 
1031 		/* return some buffers to hardware, one at a time is too slow */
1032 		if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1033 			adapter->alloc_rx_buf(rx_ring, cleaned_count,
1034 					      GFP_ATOMIC);
1035 			cleaned_count = 0;
1036 		}
1037 
1038 		/* use prefetched values */
1039 		rx_desc = next_rxd;
1040 		buffer_info = next_buffer;
1041 
1042 		staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1043 	}
1044 	rx_ring->next_to_clean = i;
1045 
1046 	cleaned_count = e1000_desc_unused(rx_ring);
1047 	if (cleaned_count)
1048 		adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1049 
1050 	adapter->total_rx_bytes += total_rx_bytes;
1051 	adapter->total_rx_packets += total_rx_packets;
1052 	return cleaned;
1053 }
1054 
1055 static void e1000_put_txbuf(struct e1000_ring *tx_ring,
1056 			    struct e1000_buffer *buffer_info,
1057 			    bool drop)
1058 {
1059 	struct e1000_adapter *adapter = tx_ring->adapter;
1060 
1061 	if (buffer_info->dma) {
1062 		if (buffer_info->mapped_as_page)
1063 			dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1064 				       buffer_info->length, DMA_TO_DEVICE);
1065 		else
1066 			dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
1067 					 buffer_info->length, DMA_TO_DEVICE);
1068 		buffer_info->dma = 0;
1069 	}
1070 	if (buffer_info->skb) {
1071 		if (drop)
1072 			dev_kfree_skb_any(buffer_info->skb);
1073 		else
1074 			dev_consume_skb_any(buffer_info->skb);
1075 		buffer_info->skb = NULL;
1076 	}
1077 	buffer_info->time_stamp = 0;
1078 }
1079 
1080 static void e1000_print_hw_hang(struct work_struct *work)
1081 {
1082 	struct e1000_adapter *adapter = container_of(work,
1083 						     struct e1000_adapter,
1084 						     print_hang_task);
1085 	struct net_device *netdev = adapter->netdev;
1086 	struct e1000_ring *tx_ring = adapter->tx_ring;
1087 	unsigned int i = tx_ring->next_to_clean;
1088 	unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
1089 	struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
1090 	struct e1000_hw *hw = &adapter->hw;
1091 	u16 phy_status, phy_1000t_status, phy_ext_status;
1092 	u16 pci_status;
1093 
1094 	if (test_bit(__E1000_DOWN, &adapter->state))
1095 		return;
1096 
1097 	if (!adapter->tx_hang_recheck && (adapter->flags2 & FLAG2_DMA_BURST)) {
1098 		/* May be block on write-back, flush and detect again
1099 		 * flush pending descriptor writebacks to memory
1100 		 */
1101 		ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1102 		/* execute the writes immediately */
1103 		e1e_flush();
1104 		/* Due to rare timing issues, write to TIDV again to ensure
1105 		 * the write is successful
1106 		 */
1107 		ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1108 		/* execute the writes immediately */
1109 		e1e_flush();
1110 		adapter->tx_hang_recheck = true;
1111 		return;
1112 	}
1113 	adapter->tx_hang_recheck = false;
1114 
1115 	if (er32(TDH(0)) == er32(TDT(0))) {
1116 		e_dbg("false hang detected, ignoring\n");
1117 		return;
1118 	}
1119 
1120 	/* Real hang detected */
1121 	netif_stop_queue(netdev);
1122 
1123 	e1e_rphy(hw, MII_BMSR, &phy_status);
1124 	e1e_rphy(hw, MII_STAT1000, &phy_1000t_status);
1125 	e1e_rphy(hw, MII_ESTATUS, &phy_ext_status);
1126 
1127 	pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
1128 
1129 	/* detected Hardware unit hang */
1130 	e_err("Detected Hardware Unit Hang:\n"
1131 	      "  TDH                  <%x>\n"
1132 	      "  TDT                  <%x>\n"
1133 	      "  next_to_use          <%x>\n"
1134 	      "  next_to_clean        <%x>\n"
1135 	      "buffer_info[next_to_clean]:\n"
1136 	      "  time_stamp           <%lx>\n"
1137 	      "  next_to_watch        <%x>\n"
1138 	      "  jiffies              <%lx>\n"
1139 	      "  next_to_watch.status <%x>\n"
1140 	      "MAC Status             <%x>\n"
1141 	      "PHY Status             <%x>\n"
1142 	      "PHY 1000BASE-T Status  <%x>\n"
1143 	      "PHY Extended Status    <%x>\n"
1144 	      "PCI Status             <%x>\n",
1145 	      readl(tx_ring->head), readl(tx_ring->tail), tx_ring->next_to_use,
1146 	      tx_ring->next_to_clean, tx_ring->buffer_info[eop].time_stamp,
1147 	      eop, jiffies, eop_desc->upper.fields.status, er32(STATUS),
1148 	      phy_status, phy_1000t_status, phy_ext_status, pci_status);
1149 
1150 	e1000e_dump(adapter);
1151 
1152 	/* Suggest workaround for known h/w issue */
1153 	if ((hw->mac.type == e1000_pchlan) && (er32(CTRL) & E1000_CTRL_TFCE))
1154 		e_err("Try turning off Tx pause (flow control) via ethtool\n");
1155 }
1156 
1157 /**
1158  * e1000e_tx_hwtstamp_work - check for Tx time stamp
1159  * @work: pointer to work struct
1160  *
1161  * This work function polls the TSYNCTXCTL valid bit to determine when a
1162  * timestamp has been taken for the current stored skb.  The timestamp must
1163  * be for this skb because only one such packet is allowed in the queue.
1164  */
1165 static void e1000e_tx_hwtstamp_work(struct work_struct *work)
1166 {
1167 	struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
1168 						     tx_hwtstamp_work);
1169 	struct e1000_hw *hw = &adapter->hw;
1170 
1171 	if (er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID) {
1172 		struct sk_buff *skb = adapter->tx_hwtstamp_skb;
1173 		struct skb_shared_hwtstamps shhwtstamps;
1174 		u64 txstmp;
1175 
1176 		txstmp = er32(TXSTMPL);
1177 		txstmp |= (u64)er32(TXSTMPH) << 32;
1178 
1179 		e1000e_systim_to_hwtstamp(adapter, &shhwtstamps, txstmp);
1180 
1181 		/* Clear the global tx_hwtstamp_skb pointer and force writes
1182 		 * prior to notifying the stack of a Tx timestamp.
1183 		 */
1184 		adapter->tx_hwtstamp_skb = NULL;
1185 		wmb(); /* force write prior to skb_tstamp_tx */
1186 
1187 		skb_tstamp_tx(skb, &shhwtstamps);
1188 		dev_consume_skb_any(skb);
1189 	} else if (time_after(jiffies, adapter->tx_hwtstamp_start
1190 			      + adapter->tx_timeout_factor * HZ)) {
1191 		dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
1192 		adapter->tx_hwtstamp_skb = NULL;
1193 		adapter->tx_hwtstamp_timeouts++;
1194 		e_warn("clearing Tx timestamp hang\n");
1195 	} else {
1196 		/* reschedule to check later */
1197 		schedule_work(&adapter->tx_hwtstamp_work);
1198 	}
1199 }
1200 
1201 /**
1202  * e1000_clean_tx_irq - Reclaim resources after transmit completes
1203  * @tx_ring: Tx descriptor ring
1204  *
1205  * the return value indicates whether actual cleaning was done, there
1206  * is no guarantee that everything was cleaned
1207  **/
1208 static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring)
1209 {
1210 	struct e1000_adapter *adapter = tx_ring->adapter;
1211 	struct net_device *netdev = adapter->netdev;
1212 	struct e1000_hw *hw = &adapter->hw;
1213 	struct e1000_tx_desc *tx_desc, *eop_desc;
1214 	struct e1000_buffer *buffer_info;
1215 	unsigned int i, eop;
1216 	unsigned int count = 0;
1217 	unsigned int total_tx_bytes = 0, total_tx_packets = 0;
1218 	unsigned int bytes_compl = 0, pkts_compl = 0;
1219 
1220 	i = tx_ring->next_to_clean;
1221 	eop = tx_ring->buffer_info[i].next_to_watch;
1222 	eop_desc = E1000_TX_DESC(*tx_ring, eop);
1223 
1224 	while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
1225 	       (count < tx_ring->count)) {
1226 		bool cleaned = false;
1227 
1228 		dma_rmb();		/* read buffer_info after eop_desc */
1229 		for (; !cleaned; count++) {
1230 			tx_desc = E1000_TX_DESC(*tx_ring, i);
1231 			buffer_info = &tx_ring->buffer_info[i];
1232 			cleaned = (i == eop);
1233 
1234 			if (cleaned) {
1235 				total_tx_packets += buffer_info->segs;
1236 				total_tx_bytes += buffer_info->bytecount;
1237 				if (buffer_info->skb) {
1238 					bytes_compl += buffer_info->skb->len;
1239 					pkts_compl++;
1240 				}
1241 			}
1242 
1243 			e1000_put_txbuf(tx_ring, buffer_info, false);
1244 			tx_desc->upper.data = 0;
1245 
1246 			i++;
1247 			if (i == tx_ring->count)
1248 				i = 0;
1249 		}
1250 
1251 		if (i == tx_ring->next_to_use)
1252 			break;
1253 		eop = tx_ring->buffer_info[i].next_to_watch;
1254 		eop_desc = E1000_TX_DESC(*tx_ring, eop);
1255 	}
1256 
1257 	tx_ring->next_to_clean = i;
1258 
1259 	netdev_completed_queue(netdev, pkts_compl, bytes_compl);
1260 
1261 #define TX_WAKE_THRESHOLD 32
1262 	if (count && netif_carrier_ok(netdev) &&
1263 	    e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
1264 		/* Make sure that anybody stopping the queue after this
1265 		 * sees the new next_to_clean.
1266 		 */
1267 		smp_mb();
1268 
1269 		if (netif_queue_stopped(netdev) &&
1270 		    !(test_bit(__E1000_DOWN, &adapter->state))) {
1271 			netif_wake_queue(netdev);
1272 			++adapter->restart_queue;
1273 		}
1274 	}
1275 
1276 	if (adapter->detect_tx_hung) {
1277 		/* Detect a transmit hang in hardware, this serializes the
1278 		 * check with the clearing of time_stamp and movement of i
1279 		 */
1280 		adapter->detect_tx_hung = false;
1281 		if (tx_ring->buffer_info[i].time_stamp &&
1282 		    time_after(jiffies, tx_ring->buffer_info[i].time_stamp
1283 			       + (adapter->tx_timeout_factor * HZ)) &&
1284 		    !(er32(STATUS) & E1000_STATUS_TXOFF))
1285 			schedule_work(&adapter->print_hang_task);
1286 		else
1287 			adapter->tx_hang_recheck = false;
1288 	}
1289 	adapter->total_tx_bytes += total_tx_bytes;
1290 	adapter->total_tx_packets += total_tx_packets;
1291 	return count < tx_ring->count;
1292 }
1293 
1294 /**
1295  * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1296  * @rx_ring: Rx descriptor ring
1297  *
1298  * the return value indicates whether actual cleaning was done, there
1299  * is no guarantee that everything was cleaned
1300  **/
1301 static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done,
1302 				  int work_to_do)
1303 {
1304 	struct e1000_adapter *adapter = rx_ring->adapter;
1305 	struct e1000_hw *hw = &adapter->hw;
1306 	union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1307 	struct net_device *netdev = adapter->netdev;
1308 	struct pci_dev *pdev = adapter->pdev;
1309 	struct e1000_buffer *buffer_info, *next_buffer;
1310 	struct e1000_ps_page *ps_page;
1311 	struct sk_buff *skb;
1312 	unsigned int i, j;
1313 	u32 length, staterr;
1314 	int cleaned_count = 0;
1315 	bool cleaned = false;
1316 	unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1317 
1318 	i = rx_ring->next_to_clean;
1319 	rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1320 	staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1321 	buffer_info = &rx_ring->buffer_info[i];
1322 
1323 	while (staterr & E1000_RXD_STAT_DD) {
1324 		if (*work_done >= work_to_do)
1325 			break;
1326 		(*work_done)++;
1327 		skb = buffer_info->skb;
1328 		dma_rmb();	/* read descriptor and rx_buffer_info after status DD */
1329 
1330 		/* in the packet split case this is header only */
1331 		prefetch(skb->data - NET_IP_ALIGN);
1332 
1333 		i++;
1334 		if (i == rx_ring->count)
1335 			i = 0;
1336 		next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1337 		prefetch(next_rxd);
1338 
1339 		next_buffer = &rx_ring->buffer_info[i];
1340 
1341 		cleaned = true;
1342 		cleaned_count++;
1343 		dma_unmap_single(&pdev->dev, buffer_info->dma,
1344 				 adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
1345 		buffer_info->dma = 0;
1346 
1347 		/* see !EOP comment in other Rx routine */
1348 		if (!(staterr & E1000_RXD_STAT_EOP))
1349 			adapter->flags2 |= FLAG2_IS_DISCARDING;
1350 
1351 		if (adapter->flags2 & FLAG2_IS_DISCARDING) {
1352 			e_dbg("Packet Split buffers didn't pick up the full packet\n");
1353 			dev_kfree_skb_irq(skb);
1354 			if (staterr & E1000_RXD_STAT_EOP)
1355 				adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1356 			goto next_desc;
1357 		}
1358 
1359 		if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1360 			     !(netdev->features & NETIF_F_RXALL))) {
1361 			dev_kfree_skb_irq(skb);
1362 			goto next_desc;
1363 		}
1364 
1365 		length = le16_to_cpu(rx_desc->wb.middle.length0);
1366 
1367 		if (!length) {
1368 			e_dbg("Last part of the packet spanning multiple descriptors\n");
1369 			dev_kfree_skb_irq(skb);
1370 			goto next_desc;
1371 		}
1372 
1373 		/* Good Receive */
1374 		skb_put(skb, length);
1375 
1376 		{
1377 			/* this looks ugly, but it seems compiler issues make
1378 			 * it more efficient than reusing j
1379 			 */
1380 			int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1381 
1382 			/* page alloc/put takes too long and effects small
1383 			 * packet throughput, so unsplit small packets and
1384 			 * save the alloc/put only valid in softirq (napi)
1385 			 * context to call kmap_*
1386 			 */
1387 			if (l1 && (l1 <= copybreak) &&
1388 			    ((length + l1) <= adapter->rx_ps_bsize0)) {
1389 				u8 *vaddr;
1390 
1391 				ps_page = &buffer_info->ps_pages[0];
1392 
1393 				/* there is no documentation about how to call
1394 				 * kmap_atomic, so we can't hold the mapping
1395 				 * very long
1396 				 */
1397 				dma_sync_single_for_cpu(&pdev->dev,
1398 							ps_page->dma,
1399 							PAGE_SIZE,
1400 							DMA_FROM_DEVICE);
1401 				vaddr = kmap_atomic(ps_page->page);
1402 				memcpy(skb_tail_pointer(skb), vaddr, l1);
1403 				kunmap_atomic(vaddr);
1404 				dma_sync_single_for_device(&pdev->dev,
1405 							   ps_page->dma,
1406 							   PAGE_SIZE,
1407 							   DMA_FROM_DEVICE);
1408 
1409 				/* remove the CRC */
1410 				if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1411 					if (!(netdev->features & NETIF_F_RXFCS))
1412 						l1 -= 4;
1413 				}
1414 
1415 				skb_put(skb, l1);
1416 				goto copydone;
1417 			}	/* if */
1418 		}
1419 
1420 		for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1421 			length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1422 			if (!length)
1423 				break;
1424 
1425 			ps_page = &buffer_info->ps_pages[j];
1426 			dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1427 				       DMA_FROM_DEVICE);
1428 			ps_page->dma = 0;
1429 			skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1430 			ps_page->page = NULL;
1431 			skb->len += length;
1432 			skb->data_len += length;
1433 			skb->truesize += PAGE_SIZE;
1434 		}
1435 
1436 		/* strip the ethernet crc, problem is we're using pages now so
1437 		 * this whole operation can get a little cpu intensive
1438 		 */
1439 		if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1440 			if (!(netdev->features & NETIF_F_RXFCS))
1441 				pskb_trim(skb, skb->len - 4);
1442 		}
1443 
1444 copydone:
1445 		total_rx_bytes += skb->len;
1446 		total_rx_packets++;
1447 
1448 		e1000_rx_checksum(adapter, staterr, skb);
1449 
1450 		e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1451 
1452 		if (rx_desc->wb.upper.header_status &
1453 		    cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1454 			adapter->rx_hdr_split++;
1455 
1456 		e1000_receive_skb(adapter, netdev, skb, staterr,
1457 				  rx_desc->wb.middle.vlan);
1458 
1459 next_desc:
1460 		rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1461 		buffer_info->skb = NULL;
1462 
1463 		/* return some buffers to hardware, one at a time is too slow */
1464 		if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1465 			adapter->alloc_rx_buf(rx_ring, cleaned_count,
1466 					      GFP_ATOMIC);
1467 			cleaned_count = 0;
1468 		}
1469 
1470 		/* use prefetched values */
1471 		rx_desc = next_rxd;
1472 		buffer_info = next_buffer;
1473 
1474 		staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1475 	}
1476 	rx_ring->next_to_clean = i;
1477 
1478 	cleaned_count = e1000_desc_unused(rx_ring);
1479 	if (cleaned_count)
1480 		adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1481 
1482 	adapter->total_rx_bytes += total_rx_bytes;
1483 	adapter->total_rx_packets += total_rx_packets;
1484 	return cleaned;
1485 }
1486 
1487 /**
1488  * e1000_consume_page - helper function
1489  **/
1490 static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1491 			       u16 length)
1492 {
1493 	bi->page = NULL;
1494 	skb->len += length;
1495 	skb->data_len += length;
1496 	skb->truesize += PAGE_SIZE;
1497 }
1498 
1499 /**
1500  * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1501  * @adapter: board private structure
1502  *
1503  * the return value indicates whether actual cleaning was done, there
1504  * is no guarantee that everything was cleaned
1505  **/
1506 static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done,
1507 				     int work_to_do)
1508 {
1509 	struct e1000_adapter *adapter = rx_ring->adapter;
1510 	struct net_device *netdev = adapter->netdev;
1511 	struct pci_dev *pdev = adapter->pdev;
1512 	union e1000_rx_desc_extended *rx_desc, *next_rxd;
1513 	struct e1000_buffer *buffer_info, *next_buffer;
1514 	u32 length, staterr;
1515 	unsigned int i;
1516 	int cleaned_count = 0;
1517 	bool cleaned = false;
1518 	unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1519 	struct skb_shared_info *shinfo;
1520 
1521 	i = rx_ring->next_to_clean;
1522 	rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
1523 	staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1524 	buffer_info = &rx_ring->buffer_info[i];
1525 
1526 	while (staterr & E1000_RXD_STAT_DD) {
1527 		struct sk_buff *skb;
1528 
1529 		if (*work_done >= work_to_do)
1530 			break;
1531 		(*work_done)++;
1532 		dma_rmb();	/* read descriptor and rx_buffer_info after status DD */
1533 
1534 		skb = buffer_info->skb;
1535 		buffer_info->skb = NULL;
1536 
1537 		++i;
1538 		if (i == rx_ring->count)
1539 			i = 0;
1540 		next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
1541 		prefetch(next_rxd);
1542 
1543 		next_buffer = &rx_ring->buffer_info[i];
1544 
1545 		cleaned = true;
1546 		cleaned_count++;
1547 		dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1548 			       DMA_FROM_DEVICE);
1549 		buffer_info->dma = 0;
1550 
1551 		length = le16_to_cpu(rx_desc->wb.upper.length);
1552 
1553 		/* errors is only valid for DD + EOP descriptors */
1554 		if (unlikely((staterr & E1000_RXD_STAT_EOP) &&
1555 			     ((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1556 			      !(netdev->features & NETIF_F_RXALL)))) {
1557 			/* recycle both page and skb */
1558 			buffer_info->skb = skb;
1559 			/* an error means any chain goes out the window too */
1560 			if (rx_ring->rx_skb_top)
1561 				dev_kfree_skb_irq(rx_ring->rx_skb_top);
1562 			rx_ring->rx_skb_top = NULL;
1563 			goto next_desc;
1564 		}
1565 #define rxtop (rx_ring->rx_skb_top)
1566 		if (!(staterr & E1000_RXD_STAT_EOP)) {
1567 			/* this descriptor is only the beginning (or middle) */
1568 			if (!rxtop) {
1569 				/* this is the beginning of a chain */
1570 				rxtop = skb;
1571 				skb_fill_page_desc(rxtop, 0, buffer_info->page,
1572 						   0, length);
1573 			} else {
1574 				/* this is the middle of a chain */
1575 				shinfo = skb_shinfo(rxtop);
1576 				skb_fill_page_desc(rxtop, shinfo->nr_frags,
1577 						   buffer_info->page, 0,
1578 						   length);
1579 				/* re-use the skb, only consumed the page */
1580 				buffer_info->skb = skb;
1581 			}
1582 			e1000_consume_page(buffer_info, rxtop, length);
1583 			goto next_desc;
1584 		} else {
1585 			if (rxtop) {
1586 				/* end of the chain */
1587 				shinfo = skb_shinfo(rxtop);
1588 				skb_fill_page_desc(rxtop, shinfo->nr_frags,
1589 						   buffer_info->page, 0,
1590 						   length);
1591 				/* re-use the current skb, we only consumed the
1592 				 * page
1593 				 */
1594 				buffer_info->skb = skb;
1595 				skb = rxtop;
1596 				rxtop = NULL;
1597 				e1000_consume_page(buffer_info, skb, length);
1598 			} else {
1599 				/* no chain, got EOP, this buf is the packet
1600 				 * copybreak to save the put_page/alloc_page
1601 				 */
1602 				if (length <= copybreak &&
1603 				    skb_tailroom(skb) >= length) {
1604 					u8 *vaddr;
1605 					vaddr = kmap_atomic(buffer_info->page);
1606 					memcpy(skb_tail_pointer(skb), vaddr,
1607 					       length);
1608 					kunmap_atomic(vaddr);
1609 					/* re-use the page, so don't erase
1610 					 * buffer_info->page
1611 					 */
1612 					skb_put(skb, length);
1613 				} else {
1614 					skb_fill_page_desc(skb, 0,
1615 							   buffer_info->page, 0,
1616 							   length);
1617 					e1000_consume_page(buffer_info, skb,
1618 							   length);
1619 				}
1620 			}
1621 		}
1622 
1623 		/* Receive Checksum Offload */
1624 		e1000_rx_checksum(adapter, staterr, skb);
1625 
1626 		e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1627 
1628 		/* probably a little skewed due to removing CRC */
1629 		total_rx_bytes += skb->len;
1630 		total_rx_packets++;
1631 
1632 		/* eth type trans needs skb->data to point to something */
1633 		if (!pskb_may_pull(skb, ETH_HLEN)) {
1634 			e_err("pskb_may_pull failed.\n");
1635 			dev_kfree_skb_irq(skb);
1636 			goto next_desc;
1637 		}
1638 
1639 		e1000_receive_skb(adapter, netdev, skb, staterr,
1640 				  rx_desc->wb.upper.vlan);
1641 
1642 next_desc:
1643 		rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1644 
1645 		/* return some buffers to hardware, one at a time is too slow */
1646 		if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1647 			adapter->alloc_rx_buf(rx_ring, cleaned_count,
1648 					      GFP_ATOMIC);
1649 			cleaned_count = 0;
1650 		}
1651 
1652 		/* use prefetched values */
1653 		rx_desc = next_rxd;
1654 		buffer_info = next_buffer;
1655 
1656 		staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1657 	}
1658 	rx_ring->next_to_clean = i;
1659 
1660 	cleaned_count = e1000_desc_unused(rx_ring);
1661 	if (cleaned_count)
1662 		adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1663 
1664 	adapter->total_rx_bytes += total_rx_bytes;
1665 	adapter->total_rx_packets += total_rx_packets;
1666 	return cleaned;
1667 }
1668 
1669 /**
1670  * e1000_clean_rx_ring - Free Rx Buffers per Queue
1671  * @rx_ring: Rx descriptor ring
1672  **/
1673 static void e1000_clean_rx_ring(struct e1000_ring *rx_ring)
1674 {
1675 	struct e1000_adapter *adapter = rx_ring->adapter;
1676 	struct e1000_buffer *buffer_info;
1677 	struct e1000_ps_page *ps_page;
1678 	struct pci_dev *pdev = adapter->pdev;
1679 	unsigned int i, j;
1680 
1681 	/* Free all the Rx ring sk_buffs */
1682 	for (i = 0; i < rx_ring->count; i++) {
1683 		buffer_info = &rx_ring->buffer_info[i];
1684 		if (buffer_info->dma) {
1685 			if (adapter->clean_rx == e1000_clean_rx_irq)
1686 				dma_unmap_single(&pdev->dev, buffer_info->dma,
1687 						 adapter->rx_buffer_len,
1688 						 DMA_FROM_DEVICE);
1689 			else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1690 				dma_unmap_page(&pdev->dev, buffer_info->dma,
1691 					       PAGE_SIZE, DMA_FROM_DEVICE);
1692 			else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1693 				dma_unmap_single(&pdev->dev, buffer_info->dma,
1694 						 adapter->rx_ps_bsize0,
1695 						 DMA_FROM_DEVICE);
1696 			buffer_info->dma = 0;
1697 		}
1698 
1699 		if (buffer_info->page) {
1700 			put_page(buffer_info->page);
1701 			buffer_info->page = NULL;
1702 		}
1703 
1704 		if (buffer_info->skb) {
1705 			dev_kfree_skb(buffer_info->skb);
1706 			buffer_info->skb = NULL;
1707 		}
1708 
1709 		for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1710 			ps_page = &buffer_info->ps_pages[j];
1711 			if (!ps_page->page)
1712 				break;
1713 			dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1714 				       DMA_FROM_DEVICE);
1715 			ps_page->dma = 0;
1716 			put_page(ps_page->page);
1717 			ps_page->page = NULL;
1718 		}
1719 	}
1720 
1721 	/* there also may be some cached data from a chained receive */
1722 	if (rx_ring->rx_skb_top) {
1723 		dev_kfree_skb(rx_ring->rx_skb_top);
1724 		rx_ring->rx_skb_top = NULL;
1725 	}
1726 
1727 	/* Zero out the descriptor ring */
1728 	memset(rx_ring->desc, 0, rx_ring->size);
1729 
1730 	rx_ring->next_to_clean = 0;
1731 	rx_ring->next_to_use = 0;
1732 	adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1733 }
1734 
1735 static void e1000e_downshift_workaround(struct work_struct *work)
1736 {
1737 	struct e1000_adapter *adapter = container_of(work,
1738 						     struct e1000_adapter,
1739 						     downshift_task);
1740 
1741 	if (test_bit(__E1000_DOWN, &adapter->state))
1742 		return;
1743 
1744 	e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1745 }
1746 
1747 /**
1748  * e1000_intr_msi - Interrupt Handler
1749  * @irq: interrupt number
1750  * @data: pointer to a network interface device structure
1751  **/
1752 static irqreturn_t e1000_intr_msi(int __always_unused irq, void *data)
1753 {
1754 	struct net_device *netdev = data;
1755 	struct e1000_adapter *adapter = netdev_priv(netdev);
1756 	struct e1000_hw *hw = &adapter->hw;
1757 	u32 icr = er32(ICR);
1758 
1759 	/* read ICR disables interrupts using IAM */
1760 	if (icr & E1000_ICR_LSC) {
1761 		hw->mac.get_link_status = true;
1762 		/* ICH8 workaround-- Call gig speed drop workaround on cable
1763 		 * disconnect (LSC) before accessing any PHY registers
1764 		 */
1765 		if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1766 		    (!(er32(STATUS) & E1000_STATUS_LU)))
1767 			schedule_work(&adapter->downshift_task);
1768 
1769 		/* 80003ES2LAN workaround-- For packet buffer work-around on
1770 		 * link down event; disable receives here in the ISR and reset
1771 		 * adapter in watchdog
1772 		 */
1773 		if (netif_carrier_ok(netdev) &&
1774 		    adapter->flags & FLAG_RX_NEEDS_RESTART) {
1775 			/* disable receives */
1776 			u32 rctl = er32(RCTL);
1777 
1778 			ew32(RCTL, rctl & ~E1000_RCTL_EN);
1779 			adapter->flags |= FLAG_RESTART_NOW;
1780 		}
1781 		/* guard against interrupt when we're going down */
1782 		if (!test_bit(__E1000_DOWN, &adapter->state))
1783 			mod_timer(&adapter->watchdog_timer, jiffies + 1);
1784 	}
1785 
1786 	/* Reset on uncorrectable ECC error */
1787 	if ((icr & E1000_ICR_ECCER) && (hw->mac.type >= e1000_pch_lpt)) {
1788 		u32 pbeccsts = er32(PBECCSTS);
1789 
1790 		adapter->corr_errors +=
1791 		    pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1792 		adapter->uncorr_errors +=
1793 		    (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1794 		    E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1795 
1796 		/* Do the reset outside of interrupt context */
1797 		schedule_work(&adapter->reset_task);
1798 
1799 		/* return immediately since reset is imminent */
1800 		return IRQ_HANDLED;
1801 	}
1802 
1803 	if (napi_schedule_prep(&adapter->napi)) {
1804 		adapter->total_tx_bytes = 0;
1805 		adapter->total_tx_packets = 0;
1806 		adapter->total_rx_bytes = 0;
1807 		adapter->total_rx_packets = 0;
1808 		__napi_schedule(&adapter->napi);
1809 	}
1810 
1811 	return IRQ_HANDLED;
1812 }
1813 
1814 /**
1815  * e1000_intr - Interrupt Handler
1816  * @irq: interrupt number
1817  * @data: pointer to a network interface device structure
1818  **/
1819 static irqreturn_t e1000_intr(int __always_unused irq, void *data)
1820 {
1821 	struct net_device *netdev = data;
1822 	struct e1000_adapter *adapter = netdev_priv(netdev);
1823 	struct e1000_hw *hw = &adapter->hw;
1824 	u32 rctl, icr = er32(ICR);
1825 
1826 	if (!icr || test_bit(__E1000_DOWN, &adapter->state))
1827 		return IRQ_NONE;	/* Not our interrupt */
1828 
1829 	/* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1830 	 * not set, then the adapter didn't send an interrupt
1831 	 */
1832 	if (!(icr & E1000_ICR_INT_ASSERTED))
1833 		return IRQ_NONE;
1834 
1835 	/* Interrupt Auto-Mask...upon reading ICR,
1836 	 * interrupts are masked.  No need for the
1837 	 * IMC write
1838 	 */
1839 
1840 	if (icr & E1000_ICR_LSC) {
1841 		hw->mac.get_link_status = true;
1842 		/* ICH8 workaround-- Call gig speed drop workaround on cable
1843 		 * disconnect (LSC) before accessing any PHY registers
1844 		 */
1845 		if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1846 		    (!(er32(STATUS) & E1000_STATUS_LU)))
1847 			schedule_work(&adapter->downshift_task);
1848 
1849 		/* 80003ES2LAN workaround--
1850 		 * For packet buffer work-around on link down event;
1851 		 * disable receives here in the ISR and
1852 		 * reset adapter in watchdog
1853 		 */
1854 		if (netif_carrier_ok(netdev) &&
1855 		    (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1856 			/* disable receives */
1857 			rctl = er32(RCTL);
1858 			ew32(RCTL, rctl & ~E1000_RCTL_EN);
1859 			adapter->flags |= FLAG_RESTART_NOW;
1860 		}
1861 		/* guard against interrupt when we're going down */
1862 		if (!test_bit(__E1000_DOWN, &adapter->state))
1863 			mod_timer(&adapter->watchdog_timer, jiffies + 1);
1864 	}
1865 
1866 	/* Reset on uncorrectable ECC error */
1867 	if ((icr & E1000_ICR_ECCER) && (hw->mac.type >= e1000_pch_lpt)) {
1868 		u32 pbeccsts = er32(PBECCSTS);
1869 
1870 		adapter->corr_errors +=
1871 		    pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1872 		adapter->uncorr_errors +=
1873 		    (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1874 		    E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1875 
1876 		/* Do the reset outside of interrupt context */
1877 		schedule_work(&adapter->reset_task);
1878 
1879 		/* return immediately since reset is imminent */
1880 		return IRQ_HANDLED;
1881 	}
1882 
1883 	if (napi_schedule_prep(&adapter->napi)) {
1884 		adapter->total_tx_bytes = 0;
1885 		adapter->total_tx_packets = 0;
1886 		adapter->total_rx_bytes = 0;
1887 		adapter->total_rx_packets = 0;
1888 		__napi_schedule(&adapter->napi);
1889 	}
1890 
1891 	return IRQ_HANDLED;
1892 }
1893 
1894 static irqreturn_t e1000_msix_other(int __always_unused irq, void *data)
1895 {
1896 	struct net_device *netdev = data;
1897 	struct e1000_adapter *adapter = netdev_priv(netdev);
1898 	struct e1000_hw *hw = &adapter->hw;
1899 	u32 icr = er32(ICR);
1900 
1901 	if (icr & adapter->eiac_mask)
1902 		ew32(ICS, (icr & adapter->eiac_mask));
1903 
1904 	if (icr & E1000_ICR_LSC) {
1905 		hw->mac.get_link_status = true;
1906 		/* guard against interrupt when we're going down */
1907 		if (!test_bit(__E1000_DOWN, &adapter->state))
1908 			mod_timer(&adapter->watchdog_timer, jiffies + 1);
1909 	}
1910 
1911 	if (!test_bit(__E1000_DOWN, &adapter->state))
1912 		ew32(IMS, E1000_IMS_OTHER | IMS_OTHER_MASK);
1913 
1914 	return IRQ_HANDLED;
1915 }
1916 
1917 static irqreturn_t e1000_intr_msix_tx(int __always_unused irq, void *data)
1918 {
1919 	struct net_device *netdev = data;
1920 	struct e1000_adapter *adapter = netdev_priv(netdev);
1921 	struct e1000_hw *hw = &adapter->hw;
1922 	struct e1000_ring *tx_ring = adapter->tx_ring;
1923 
1924 	adapter->total_tx_bytes = 0;
1925 	adapter->total_tx_packets = 0;
1926 
1927 	if (!e1000_clean_tx_irq(tx_ring))
1928 		/* Ring was not completely cleaned, so fire another interrupt */
1929 		ew32(ICS, tx_ring->ims_val);
1930 
1931 	if (!test_bit(__E1000_DOWN, &adapter->state))
1932 		ew32(IMS, adapter->tx_ring->ims_val);
1933 
1934 	return IRQ_HANDLED;
1935 }
1936 
1937 static irqreturn_t e1000_intr_msix_rx(int __always_unused irq, void *data)
1938 {
1939 	struct net_device *netdev = data;
1940 	struct e1000_adapter *adapter = netdev_priv(netdev);
1941 	struct e1000_ring *rx_ring = adapter->rx_ring;
1942 
1943 	/* Write the ITR value calculated at the end of the
1944 	 * previous interrupt.
1945 	 */
1946 	if (rx_ring->set_itr) {
1947 		u32 itr = rx_ring->itr_val ?
1948 			  1000000000 / (rx_ring->itr_val * 256) : 0;
1949 
1950 		writel(itr, rx_ring->itr_register);
1951 		rx_ring->set_itr = 0;
1952 	}
1953 
1954 	if (napi_schedule_prep(&adapter->napi)) {
1955 		adapter->total_rx_bytes = 0;
1956 		adapter->total_rx_packets = 0;
1957 		__napi_schedule(&adapter->napi);
1958 	}
1959 	return IRQ_HANDLED;
1960 }
1961 
1962 /**
1963  * e1000_configure_msix - Configure MSI-X hardware
1964  *
1965  * e1000_configure_msix sets up the hardware to properly
1966  * generate MSI-X interrupts.
1967  **/
1968 static void e1000_configure_msix(struct e1000_adapter *adapter)
1969 {
1970 	struct e1000_hw *hw = &adapter->hw;
1971 	struct e1000_ring *rx_ring = adapter->rx_ring;
1972 	struct e1000_ring *tx_ring = adapter->tx_ring;
1973 	int vector = 0;
1974 	u32 ctrl_ext, ivar = 0;
1975 
1976 	adapter->eiac_mask = 0;
1977 
1978 	/* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1979 	if (hw->mac.type == e1000_82574) {
1980 		u32 rfctl = er32(RFCTL);
1981 
1982 		rfctl |= E1000_RFCTL_ACK_DIS;
1983 		ew32(RFCTL, rfctl);
1984 	}
1985 
1986 	/* Configure Rx vector */
1987 	rx_ring->ims_val = E1000_IMS_RXQ0;
1988 	adapter->eiac_mask |= rx_ring->ims_val;
1989 	if (rx_ring->itr_val)
1990 		writel(1000000000 / (rx_ring->itr_val * 256),
1991 		       rx_ring->itr_register);
1992 	else
1993 		writel(1, rx_ring->itr_register);
1994 	ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1995 
1996 	/* Configure Tx vector */
1997 	tx_ring->ims_val = E1000_IMS_TXQ0;
1998 	vector++;
1999 	if (tx_ring->itr_val)
2000 		writel(1000000000 / (tx_ring->itr_val * 256),
2001 		       tx_ring->itr_register);
2002 	else
2003 		writel(1, tx_ring->itr_register);
2004 	adapter->eiac_mask |= tx_ring->ims_val;
2005 	ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
2006 
2007 	/* set vector for Other Causes, e.g. link changes */
2008 	vector++;
2009 	ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
2010 	if (rx_ring->itr_val)
2011 		writel(1000000000 / (rx_ring->itr_val * 256),
2012 		       hw->hw_addr + E1000_EITR_82574(vector));
2013 	else
2014 		writel(1, hw->hw_addr + E1000_EITR_82574(vector));
2015 
2016 	/* Cause Tx interrupts on every write back */
2017 	ivar |= BIT(31);
2018 
2019 	ew32(IVAR, ivar);
2020 
2021 	/* enable MSI-X PBA support */
2022 	ctrl_ext = er32(CTRL_EXT) & ~E1000_CTRL_EXT_IAME;
2023 	ctrl_ext |= E1000_CTRL_EXT_PBA_CLR | E1000_CTRL_EXT_EIAME;
2024 	ew32(CTRL_EXT, ctrl_ext);
2025 	e1e_flush();
2026 }
2027 
2028 void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
2029 {
2030 	if (adapter->msix_entries) {
2031 		pci_disable_msix(adapter->pdev);
2032 		kfree(adapter->msix_entries);
2033 		adapter->msix_entries = NULL;
2034 	} else if (adapter->flags & FLAG_MSI_ENABLED) {
2035 		pci_disable_msi(adapter->pdev);
2036 		adapter->flags &= ~FLAG_MSI_ENABLED;
2037 	}
2038 }
2039 
2040 /**
2041  * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
2042  *
2043  * Attempt to configure interrupts using the best available
2044  * capabilities of the hardware and kernel.
2045  **/
2046 void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
2047 {
2048 	int err;
2049 	int i;
2050 
2051 	switch (adapter->int_mode) {
2052 	case E1000E_INT_MODE_MSIX:
2053 		if (adapter->flags & FLAG_HAS_MSIX) {
2054 			adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
2055 			adapter->msix_entries = kcalloc(adapter->num_vectors,
2056 							sizeof(struct
2057 							       msix_entry),
2058 							GFP_KERNEL);
2059 			if (adapter->msix_entries) {
2060 				struct e1000_adapter *a = adapter;
2061 
2062 				for (i = 0; i < adapter->num_vectors; i++)
2063 					adapter->msix_entries[i].entry = i;
2064 
2065 				err = pci_enable_msix_range(a->pdev,
2066 							    a->msix_entries,
2067 							    a->num_vectors,
2068 							    a->num_vectors);
2069 				if (err > 0)
2070 					return;
2071 			}
2072 			/* MSI-X failed, so fall through and try MSI */
2073 			e_err("Failed to initialize MSI-X interrupts.  Falling back to MSI interrupts.\n");
2074 			e1000e_reset_interrupt_capability(adapter);
2075 		}
2076 		adapter->int_mode = E1000E_INT_MODE_MSI;
2077 		/* Fall through */
2078 	case E1000E_INT_MODE_MSI:
2079 		if (!pci_enable_msi(adapter->pdev)) {
2080 			adapter->flags |= FLAG_MSI_ENABLED;
2081 		} else {
2082 			adapter->int_mode = E1000E_INT_MODE_LEGACY;
2083 			e_err("Failed to initialize MSI interrupts.  Falling back to legacy interrupts.\n");
2084 		}
2085 		/* Fall through */
2086 	case E1000E_INT_MODE_LEGACY:
2087 		/* Don't do anything; this is the system default */
2088 		break;
2089 	}
2090 
2091 	/* store the number of vectors being used */
2092 	adapter->num_vectors = 1;
2093 }
2094 
2095 /**
2096  * e1000_request_msix - Initialize MSI-X interrupts
2097  *
2098  * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
2099  * kernel.
2100  **/
2101 static int e1000_request_msix(struct e1000_adapter *adapter)
2102 {
2103 	struct net_device *netdev = adapter->netdev;
2104 	int err = 0, vector = 0;
2105 
2106 	if (strlen(netdev->name) < (IFNAMSIZ - 5))
2107 		snprintf(adapter->rx_ring->name,
2108 			 sizeof(adapter->rx_ring->name) - 1,
2109 			 "%s-rx-0", netdev->name);
2110 	else
2111 		memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
2112 	err = request_irq(adapter->msix_entries[vector].vector,
2113 			  e1000_intr_msix_rx, 0, adapter->rx_ring->name,
2114 			  netdev);
2115 	if (err)
2116 		return err;
2117 	adapter->rx_ring->itr_register = adapter->hw.hw_addr +
2118 	    E1000_EITR_82574(vector);
2119 	adapter->rx_ring->itr_val = adapter->itr;
2120 	vector++;
2121 
2122 	if (strlen(netdev->name) < (IFNAMSIZ - 5))
2123 		snprintf(adapter->tx_ring->name,
2124 			 sizeof(adapter->tx_ring->name) - 1,
2125 			 "%s-tx-0", netdev->name);
2126 	else
2127 		memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
2128 	err = request_irq(adapter->msix_entries[vector].vector,
2129 			  e1000_intr_msix_tx, 0, adapter->tx_ring->name,
2130 			  netdev);
2131 	if (err)
2132 		return err;
2133 	adapter->tx_ring->itr_register = adapter->hw.hw_addr +
2134 	    E1000_EITR_82574(vector);
2135 	adapter->tx_ring->itr_val = adapter->itr;
2136 	vector++;
2137 
2138 	err = request_irq(adapter->msix_entries[vector].vector,
2139 			  e1000_msix_other, 0, netdev->name, netdev);
2140 	if (err)
2141 		return err;
2142 
2143 	e1000_configure_msix(adapter);
2144 
2145 	return 0;
2146 }
2147 
2148 /**
2149  * e1000_request_irq - initialize interrupts
2150  *
2151  * Attempts to configure interrupts using the best available
2152  * capabilities of the hardware and kernel.
2153  **/
2154 static int e1000_request_irq(struct e1000_adapter *adapter)
2155 {
2156 	struct net_device *netdev = adapter->netdev;
2157 	int err;
2158 
2159 	if (adapter->msix_entries) {
2160 		err = e1000_request_msix(adapter);
2161 		if (!err)
2162 			return err;
2163 		/* fall back to MSI */
2164 		e1000e_reset_interrupt_capability(adapter);
2165 		adapter->int_mode = E1000E_INT_MODE_MSI;
2166 		e1000e_set_interrupt_capability(adapter);
2167 	}
2168 	if (adapter->flags & FLAG_MSI_ENABLED) {
2169 		err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
2170 				  netdev->name, netdev);
2171 		if (!err)
2172 			return err;
2173 
2174 		/* fall back to legacy interrupt */
2175 		e1000e_reset_interrupt_capability(adapter);
2176 		adapter->int_mode = E1000E_INT_MODE_LEGACY;
2177 	}
2178 
2179 	err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
2180 			  netdev->name, netdev);
2181 	if (err)
2182 		e_err("Unable to allocate interrupt, Error: %d\n", err);
2183 
2184 	return err;
2185 }
2186 
2187 static void e1000_free_irq(struct e1000_adapter *adapter)
2188 {
2189 	struct net_device *netdev = adapter->netdev;
2190 
2191 	if (adapter->msix_entries) {
2192 		int vector = 0;
2193 
2194 		free_irq(adapter->msix_entries[vector].vector, netdev);
2195 		vector++;
2196 
2197 		free_irq(adapter->msix_entries[vector].vector, netdev);
2198 		vector++;
2199 
2200 		/* Other Causes interrupt vector */
2201 		free_irq(adapter->msix_entries[vector].vector, netdev);
2202 		return;
2203 	}
2204 
2205 	free_irq(adapter->pdev->irq, netdev);
2206 }
2207 
2208 /**
2209  * e1000_irq_disable - Mask off interrupt generation on the NIC
2210  **/
2211 static void e1000_irq_disable(struct e1000_adapter *adapter)
2212 {
2213 	struct e1000_hw *hw = &adapter->hw;
2214 
2215 	ew32(IMC, ~0);
2216 	if (adapter->msix_entries)
2217 		ew32(EIAC_82574, 0);
2218 	e1e_flush();
2219 
2220 	if (adapter->msix_entries) {
2221 		int i;
2222 
2223 		for (i = 0; i < adapter->num_vectors; i++)
2224 			synchronize_irq(adapter->msix_entries[i].vector);
2225 	} else {
2226 		synchronize_irq(adapter->pdev->irq);
2227 	}
2228 }
2229 
2230 /**
2231  * e1000_irq_enable - Enable default interrupt generation settings
2232  **/
2233 static void e1000_irq_enable(struct e1000_adapter *adapter)
2234 {
2235 	struct e1000_hw *hw = &adapter->hw;
2236 
2237 	if (adapter->msix_entries) {
2238 		ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
2239 		ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER |
2240 		     IMS_OTHER_MASK);
2241 	} else if (hw->mac.type >= e1000_pch_lpt) {
2242 		ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER);
2243 	} else {
2244 		ew32(IMS, IMS_ENABLE_MASK);
2245 	}
2246 	e1e_flush();
2247 }
2248 
2249 /**
2250  * e1000e_get_hw_control - get control of the h/w from f/w
2251  * @adapter: address of board private structure
2252  *
2253  * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2254  * For ASF and Pass Through versions of f/w this means that
2255  * the driver is loaded. For AMT version (only with 82573)
2256  * of the f/w this means that the network i/f is open.
2257  **/
2258 void e1000e_get_hw_control(struct e1000_adapter *adapter)
2259 {
2260 	struct e1000_hw *hw = &adapter->hw;
2261 	u32 ctrl_ext;
2262 	u32 swsm;
2263 
2264 	/* Let firmware know the driver has taken over */
2265 	if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2266 		swsm = er32(SWSM);
2267 		ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2268 	} else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2269 		ctrl_ext = er32(CTRL_EXT);
2270 		ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
2271 	}
2272 }
2273 
2274 /**
2275  * e1000e_release_hw_control - release control of the h/w to f/w
2276  * @adapter: address of board private structure
2277  *
2278  * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2279  * For ASF and Pass Through versions of f/w this means that the
2280  * driver is no longer loaded. For AMT version (only with 82573) i
2281  * of the f/w this means that the network i/f is closed.
2282  *
2283  **/
2284 void e1000e_release_hw_control(struct e1000_adapter *adapter)
2285 {
2286 	struct e1000_hw *hw = &adapter->hw;
2287 	u32 ctrl_ext;
2288 	u32 swsm;
2289 
2290 	/* Let firmware taken over control of h/w */
2291 	if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2292 		swsm = er32(SWSM);
2293 		ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2294 	} else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2295 		ctrl_ext = er32(CTRL_EXT);
2296 		ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
2297 	}
2298 }
2299 
2300 /**
2301  * e1000_alloc_ring_dma - allocate memory for a ring structure
2302  **/
2303 static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2304 				struct e1000_ring *ring)
2305 {
2306 	struct pci_dev *pdev = adapter->pdev;
2307 
2308 	ring->desc = dma_zalloc_coherent(&pdev->dev, ring->size, &ring->dma,
2309 					 GFP_KERNEL);
2310 	if (!ring->desc)
2311 		return -ENOMEM;
2312 
2313 	return 0;
2314 }
2315 
2316 /**
2317  * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2318  * @tx_ring: Tx descriptor ring
2319  *
2320  * Return 0 on success, negative on failure
2321  **/
2322 int e1000e_setup_tx_resources(struct e1000_ring *tx_ring)
2323 {
2324 	struct e1000_adapter *adapter = tx_ring->adapter;
2325 	int err = -ENOMEM, size;
2326 
2327 	size = sizeof(struct e1000_buffer) * tx_ring->count;
2328 	tx_ring->buffer_info = vzalloc(size);
2329 	if (!tx_ring->buffer_info)
2330 		goto err;
2331 
2332 	/* round up to nearest 4K */
2333 	tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2334 	tx_ring->size = ALIGN(tx_ring->size, 4096);
2335 
2336 	err = e1000_alloc_ring_dma(adapter, tx_ring);
2337 	if (err)
2338 		goto err;
2339 
2340 	tx_ring->next_to_use = 0;
2341 	tx_ring->next_to_clean = 0;
2342 
2343 	return 0;
2344 err:
2345 	vfree(tx_ring->buffer_info);
2346 	e_err("Unable to allocate memory for the transmit descriptor ring\n");
2347 	return err;
2348 }
2349 
2350 /**
2351  * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2352  * @rx_ring: Rx descriptor ring
2353  *
2354  * Returns 0 on success, negative on failure
2355  **/
2356 int e1000e_setup_rx_resources(struct e1000_ring *rx_ring)
2357 {
2358 	struct e1000_adapter *adapter = rx_ring->adapter;
2359 	struct e1000_buffer *buffer_info;
2360 	int i, size, desc_len, err = -ENOMEM;
2361 
2362 	size = sizeof(struct e1000_buffer) * rx_ring->count;
2363 	rx_ring->buffer_info = vzalloc(size);
2364 	if (!rx_ring->buffer_info)
2365 		goto err;
2366 
2367 	for (i = 0; i < rx_ring->count; i++) {
2368 		buffer_info = &rx_ring->buffer_info[i];
2369 		buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2370 						sizeof(struct e1000_ps_page),
2371 						GFP_KERNEL);
2372 		if (!buffer_info->ps_pages)
2373 			goto err_pages;
2374 	}
2375 
2376 	desc_len = sizeof(union e1000_rx_desc_packet_split);
2377 
2378 	/* Round up to nearest 4K */
2379 	rx_ring->size = rx_ring->count * desc_len;
2380 	rx_ring->size = ALIGN(rx_ring->size, 4096);
2381 
2382 	err = e1000_alloc_ring_dma(adapter, rx_ring);
2383 	if (err)
2384 		goto err_pages;
2385 
2386 	rx_ring->next_to_clean = 0;
2387 	rx_ring->next_to_use = 0;
2388 	rx_ring->rx_skb_top = NULL;
2389 
2390 	return 0;
2391 
2392 err_pages:
2393 	for (i = 0; i < rx_ring->count; i++) {
2394 		buffer_info = &rx_ring->buffer_info[i];
2395 		kfree(buffer_info->ps_pages);
2396 	}
2397 err:
2398 	vfree(rx_ring->buffer_info);
2399 	e_err("Unable to allocate memory for the receive descriptor ring\n");
2400 	return err;
2401 }
2402 
2403 /**
2404  * e1000_clean_tx_ring - Free Tx Buffers
2405  * @tx_ring: Tx descriptor ring
2406  **/
2407 static void e1000_clean_tx_ring(struct e1000_ring *tx_ring)
2408 {
2409 	struct e1000_adapter *adapter = tx_ring->adapter;
2410 	struct e1000_buffer *buffer_info;
2411 	unsigned long size;
2412 	unsigned int i;
2413 
2414 	for (i = 0; i < tx_ring->count; i++) {
2415 		buffer_info = &tx_ring->buffer_info[i];
2416 		e1000_put_txbuf(tx_ring, buffer_info, false);
2417 	}
2418 
2419 	netdev_reset_queue(adapter->netdev);
2420 	size = sizeof(struct e1000_buffer) * tx_ring->count;
2421 	memset(tx_ring->buffer_info, 0, size);
2422 
2423 	memset(tx_ring->desc, 0, tx_ring->size);
2424 
2425 	tx_ring->next_to_use = 0;
2426 	tx_ring->next_to_clean = 0;
2427 }
2428 
2429 /**
2430  * e1000e_free_tx_resources - Free Tx Resources per Queue
2431  * @tx_ring: Tx descriptor ring
2432  *
2433  * Free all transmit software resources
2434  **/
2435 void e1000e_free_tx_resources(struct e1000_ring *tx_ring)
2436 {
2437 	struct e1000_adapter *adapter = tx_ring->adapter;
2438 	struct pci_dev *pdev = adapter->pdev;
2439 
2440 	e1000_clean_tx_ring(tx_ring);
2441 
2442 	vfree(tx_ring->buffer_info);
2443 	tx_ring->buffer_info = NULL;
2444 
2445 	dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2446 			  tx_ring->dma);
2447 	tx_ring->desc = NULL;
2448 }
2449 
2450 /**
2451  * e1000e_free_rx_resources - Free Rx Resources
2452  * @rx_ring: Rx descriptor ring
2453  *
2454  * Free all receive software resources
2455  **/
2456 void e1000e_free_rx_resources(struct e1000_ring *rx_ring)
2457 {
2458 	struct e1000_adapter *adapter = rx_ring->adapter;
2459 	struct pci_dev *pdev = adapter->pdev;
2460 	int i;
2461 
2462 	e1000_clean_rx_ring(rx_ring);
2463 
2464 	for (i = 0; i < rx_ring->count; i++)
2465 		kfree(rx_ring->buffer_info[i].ps_pages);
2466 
2467 	vfree(rx_ring->buffer_info);
2468 	rx_ring->buffer_info = NULL;
2469 
2470 	dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2471 			  rx_ring->dma);
2472 	rx_ring->desc = NULL;
2473 }
2474 
2475 /**
2476  * e1000_update_itr - update the dynamic ITR value based on statistics
2477  * @adapter: pointer to adapter
2478  * @itr_setting: current adapter->itr
2479  * @packets: the number of packets during this measurement interval
2480  * @bytes: the number of bytes during this measurement interval
2481  *
2482  *      Stores a new ITR value based on packets and byte
2483  *      counts during the last interrupt.  The advantage of per interrupt
2484  *      computation is faster updates and more accurate ITR for the current
2485  *      traffic pattern.  Constants in this function were computed
2486  *      based on theoretical maximum wire speed and thresholds were set based
2487  *      on testing data as well as attempting to minimize response time
2488  *      while increasing bulk throughput.  This functionality is controlled
2489  *      by the InterruptThrottleRate module parameter.
2490  **/
2491 static unsigned int e1000_update_itr(u16 itr_setting, int packets, int bytes)
2492 {
2493 	unsigned int retval = itr_setting;
2494 
2495 	if (packets == 0)
2496 		return itr_setting;
2497 
2498 	switch (itr_setting) {
2499 	case lowest_latency:
2500 		/* handle TSO and jumbo frames */
2501 		if (bytes / packets > 8000)
2502 			retval = bulk_latency;
2503 		else if ((packets < 5) && (bytes > 512))
2504 			retval = low_latency;
2505 		break;
2506 	case low_latency:	/* 50 usec aka 20000 ints/s */
2507 		if (bytes > 10000) {
2508 			/* this if handles the TSO accounting */
2509 			if (bytes / packets > 8000)
2510 				retval = bulk_latency;
2511 			else if ((packets < 10) || ((bytes / packets) > 1200))
2512 				retval = bulk_latency;
2513 			else if ((packets > 35))
2514 				retval = lowest_latency;
2515 		} else if (bytes / packets > 2000) {
2516 			retval = bulk_latency;
2517 		} else if (packets <= 2 && bytes < 512) {
2518 			retval = lowest_latency;
2519 		}
2520 		break;
2521 	case bulk_latency:	/* 250 usec aka 4000 ints/s */
2522 		if (bytes > 25000) {
2523 			if (packets > 35)
2524 				retval = low_latency;
2525 		} else if (bytes < 6000) {
2526 			retval = low_latency;
2527 		}
2528 		break;
2529 	}
2530 
2531 	return retval;
2532 }
2533 
2534 static void e1000_set_itr(struct e1000_adapter *adapter)
2535 {
2536 	u16 current_itr;
2537 	u32 new_itr = adapter->itr;
2538 
2539 	/* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2540 	if (adapter->link_speed != SPEED_1000) {
2541 		current_itr = 0;
2542 		new_itr = 4000;
2543 		goto set_itr_now;
2544 	}
2545 
2546 	if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2547 		new_itr = 0;
2548 		goto set_itr_now;
2549 	}
2550 
2551 	adapter->tx_itr = e1000_update_itr(adapter->tx_itr,
2552 					   adapter->total_tx_packets,
2553 					   adapter->total_tx_bytes);
2554 	/* conservative mode (itr 3) eliminates the lowest_latency setting */
2555 	if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2556 		adapter->tx_itr = low_latency;
2557 
2558 	adapter->rx_itr = e1000_update_itr(adapter->rx_itr,
2559 					   adapter->total_rx_packets,
2560 					   adapter->total_rx_bytes);
2561 	/* conservative mode (itr 3) eliminates the lowest_latency setting */
2562 	if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2563 		adapter->rx_itr = low_latency;
2564 
2565 	current_itr = max(adapter->rx_itr, adapter->tx_itr);
2566 
2567 	/* counts and packets in update_itr are dependent on these numbers */
2568 	switch (current_itr) {
2569 	case lowest_latency:
2570 		new_itr = 70000;
2571 		break;
2572 	case low_latency:
2573 		new_itr = 20000;	/* aka hwitr = ~200 */
2574 		break;
2575 	case bulk_latency:
2576 		new_itr = 4000;
2577 		break;
2578 	default:
2579 		break;
2580 	}
2581 
2582 set_itr_now:
2583 	if (new_itr != adapter->itr) {
2584 		/* this attempts to bias the interrupt rate towards Bulk
2585 		 * by adding intermediate steps when interrupt rate is
2586 		 * increasing
2587 		 */
2588 		new_itr = new_itr > adapter->itr ?
2589 		    min(adapter->itr + (new_itr >> 2), new_itr) : new_itr;
2590 		adapter->itr = new_itr;
2591 		adapter->rx_ring->itr_val = new_itr;
2592 		if (adapter->msix_entries)
2593 			adapter->rx_ring->set_itr = 1;
2594 		else
2595 			e1000e_write_itr(adapter, new_itr);
2596 	}
2597 }
2598 
2599 /**
2600  * e1000e_write_itr - write the ITR value to the appropriate registers
2601  * @adapter: address of board private structure
2602  * @itr: new ITR value to program
2603  *
2604  * e1000e_write_itr determines if the adapter is in MSI-X mode
2605  * and, if so, writes the EITR registers with the ITR value.
2606  * Otherwise, it writes the ITR value into the ITR register.
2607  **/
2608 void e1000e_write_itr(struct e1000_adapter *adapter, u32 itr)
2609 {
2610 	struct e1000_hw *hw = &adapter->hw;
2611 	u32 new_itr = itr ? 1000000000 / (itr * 256) : 0;
2612 
2613 	if (adapter->msix_entries) {
2614 		int vector;
2615 
2616 		for (vector = 0; vector < adapter->num_vectors; vector++)
2617 			writel(new_itr, hw->hw_addr + E1000_EITR_82574(vector));
2618 	} else {
2619 		ew32(ITR, new_itr);
2620 	}
2621 }
2622 
2623 /**
2624  * e1000_alloc_queues - Allocate memory for all rings
2625  * @adapter: board private structure to initialize
2626  **/
2627 static int e1000_alloc_queues(struct e1000_adapter *adapter)
2628 {
2629 	int size = sizeof(struct e1000_ring);
2630 
2631 	adapter->tx_ring = kzalloc(size, GFP_KERNEL);
2632 	if (!adapter->tx_ring)
2633 		goto err;
2634 	adapter->tx_ring->count = adapter->tx_ring_count;
2635 	adapter->tx_ring->adapter = adapter;
2636 
2637 	adapter->rx_ring = kzalloc(size, GFP_KERNEL);
2638 	if (!adapter->rx_ring)
2639 		goto err;
2640 	adapter->rx_ring->count = adapter->rx_ring_count;
2641 	adapter->rx_ring->adapter = adapter;
2642 
2643 	return 0;
2644 err:
2645 	e_err("Unable to allocate memory for queues\n");
2646 	kfree(adapter->rx_ring);
2647 	kfree(adapter->tx_ring);
2648 	return -ENOMEM;
2649 }
2650 
2651 /**
2652  * e1000e_poll - NAPI Rx polling callback
2653  * @napi: struct associated with this polling callback
2654  * @weight: number of packets driver is allowed to process this poll
2655  **/
2656 static int e1000e_poll(struct napi_struct *napi, int weight)
2657 {
2658 	struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
2659 						     napi);
2660 	struct e1000_hw *hw = &adapter->hw;
2661 	struct net_device *poll_dev = adapter->netdev;
2662 	int tx_cleaned = 1, work_done = 0;
2663 
2664 	adapter = netdev_priv(poll_dev);
2665 
2666 	if (!adapter->msix_entries ||
2667 	    (adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2668 		tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring);
2669 
2670 	adapter->clean_rx(adapter->rx_ring, &work_done, weight);
2671 
2672 	if (!tx_cleaned)
2673 		work_done = weight;
2674 
2675 	/* If weight not fully consumed, exit the polling mode */
2676 	if (work_done < weight) {
2677 		if (adapter->itr_setting & 3)
2678 			e1000_set_itr(adapter);
2679 		napi_complete_done(napi, work_done);
2680 		if (!test_bit(__E1000_DOWN, &adapter->state)) {
2681 			if (adapter->msix_entries)
2682 				ew32(IMS, adapter->rx_ring->ims_val);
2683 			else
2684 				e1000_irq_enable(adapter);
2685 		}
2686 	}
2687 
2688 	return work_done;
2689 }
2690 
2691 static int e1000_vlan_rx_add_vid(struct net_device *netdev,
2692 				 __always_unused __be16 proto, u16 vid)
2693 {
2694 	struct e1000_adapter *adapter = netdev_priv(netdev);
2695 	struct e1000_hw *hw = &adapter->hw;
2696 	u32 vfta, index;
2697 
2698 	/* don't update vlan cookie if already programmed */
2699 	if ((adapter->hw.mng_cookie.status &
2700 	     E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2701 	    (vid == adapter->mng_vlan_id))
2702 		return 0;
2703 
2704 	/* add VID to filter table */
2705 	if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2706 		index = (vid >> 5) & 0x7F;
2707 		vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2708 		vfta |= BIT((vid & 0x1F));
2709 		hw->mac.ops.write_vfta(hw, index, vfta);
2710 	}
2711 
2712 	set_bit(vid, adapter->active_vlans);
2713 
2714 	return 0;
2715 }
2716 
2717 static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
2718 				  __always_unused __be16 proto, u16 vid)
2719 {
2720 	struct e1000_adapter *adapter = netdev_priv(netdev);
2721 	struct e1000_hw *hw = &adapter->hw;
2722 	u32 vfta, index;
2723 
2724 	if ((adapter->hw.mng_cookie.status &
2725 	     E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2726 	    (vid == adapter->mng_vlan_id)) {
2727 		/* release control to f/w */
2728 		e1000e_release_hw_control(adapter);
2729 		return 0;
2730 	}
2731 
2732 	/* remove VID from filter table */
2733 	if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2734 		index = (vid >> 5) & 0x7F;
2735 		vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2736 		vfta &= ~BIT((vid & 0x1F));
2737 		hw->mac.ops.write_vfta(hw, index, vfta);
2738 	}
2739 
2740 	clear_bit(vid, adapter->active_vlans);
2741 
2742 	return 0;
2743 }
2744 
2745 /**
2746  * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering
2747  * @adapter: board private structure to initialize
2748  **/
2749 static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter)
2750 {
2751 	struct net_device *netdev = adapter->netdev;
2752 	struct e1000_hw *hw = &adapter->hw;
2753 	u32 rctl;
2754 
2755 	if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2756 		/* disable VLAN receive filtering */
2757 		rctl = er32(RCTL);
2758 		rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN);
2759 		ew32(RCTL, rctl);
2760 
2761 		if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
2762 			e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
2763 					       adapter->mng_vlan_id);
2764 			adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2765 		}
2766 	}
2767 }
2768 
2769 /**
2770  * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering
2771  * @adapter: board private structure to initialize
2772  **/
2773 static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter)
2774 {
2775 	struct e1000_hw *hw = &adapter->hw;
2776 	u32 rctl;
2777 
2778 	if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2779 		/* enable VLAN receive filtering */
2780 		rctl = er32(RCTL);
2781 		rctl |= E1000_RCTL_VFE;
2782 		rctl &= ~E1000_RCTL_CFIEN;
2783 		ew32(RCTL, rctl);
2784 	}
2785 }
2786 
2787 /**
2788  * e1000e_vlan_strip_disable - helper to disable HW VLAN stripping
2789  * @adapter: board private structure to initialize
2790  **/
2791 static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter)
2792 {
2793 	struct e1000_hw *hw = &adapter->hw;
2794 	u32 ctrl;
2795 
2796 	/* disable VLAN tag insert/strip */
2797 	ctrl = er32(CTRL);
2798 	ctrl &= ~E1000_CTRL_VME;
2799 	ew32(CTRL, ctrl);
2800 }
2801 
2802 /**
2803  * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping
2804  * @adapter: board private structure to initialize
2805  **/
2806 static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter)
2807 {
2808 	struct e1000_hw *hw = &adapter->hw;
2809 	u32 ctrl;
2810 
2811 	/* enable VLAN tag insert/strip */
2812 	ctrl = er32(CTRL);
2813 	ctrl |= E1000_CTRL_VME;
2814 	ew32(CTRL, ctrl);
2815 }
2816 
2817 static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2818 {
2819 	struct net_device *netdev = adapter->netdev;
2820 	u16 vid = adapter->hw.mng_cookie.vlan_id;
2821 	u16 old_vid = adapter->mng_vlan_id;
2822 
2823 	if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2824 		e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
2825 		adapter->mng_vlan_id = vid;
2826 	}
2827 
2828 	if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid))
2829 		e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q), old_vid);
2830 }
2831 
2832 static void e1000_restore_vlan(struct e1000_adapter *adapter)
2833 {
2834 	u16 vid;
2835 
2836 	e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
2837 
2838 	for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2839 	    e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
2840 }
2841 
2842 static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
2843 {
2844 	struct e1000_hw *hw = &adapter->hw;
2845 	u32 manc, manc2h, mdef, i, j;
2846 
2847 	if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2848 		return;
2849 
2850 	manc = er32(MANC);
2851 
2852 	/* enable receiving management packets to the host. this will probably
2853 	 * generate destination unreachable messages from the host OS, but
2854 	 * the packets will be handled on SMBUS
2855 	 */
2856 	manc |= E1000_MANC_EN_MNG2HOST;
2857 	manc2h = er32(MANC2H);
2858 
2859 	switch (hw->mac.type) {
2860 	default:
2861 		manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2862 		break;
2863 	case e1000_82574:
2864 	case e1000_82583:
2865 		/* Check if IPMI pass-through decision filter already exists;
2866 		 * if so, enable it.
2867 		 */
2868 		for (i = 0, j = 0; i < 8; i++) {
2869 			mdef = er32(MDEF(i));
2870 
2871 			/* Ignore filters with anything other than IPMI ports */
2872 			if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2873 				continue;
2874 
2875 			/* Enable this decision filter in MANC2H */
2876 			if (mdef)
2877 				manc2h |= BIT(i);
2878 
2879 			j |= mdef;
2880 		}
2881 
2882 		if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2883 			break;
2884 
2885 		/* Create new decision filter in an empty filter */
2886 		for (i = 0, j = 0; i < 8; i++)
2887 			if (er32(MDEF(i)) == 0) {
2888 				ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2889 					       E1000_MDEF_PORT_664));
2890 				manc2h |= BIT(1);
2891 				j++;
2892 				break;
2893 			}
2894 
2895 		if (!j)
2896 			e_warn("Unable to create IPMI pass-through filter\n");
2897 		break;
2898 	}
2899 
2900 	ew32(MANC2H, manc2h);
2901 	ew32(MANC, manc);
2902 }
2903 
2904 /**
2905  * e1000_configure_tx - Configure Transmit Unit after Reset
2906  * @adapter: board private structure
2907  *
2908  * Configure the Tx unit of the MAC after a reset.
2909  **/
2910 static void e1000_configure_tx(struct e1000_adapter *adapter)
2911 {
2912 	struct e1000_hw *hw = &adapter->hw;
2913 	struct e1000_ring *tx_ring = adapter->tx_ring;
2914 	u64 tdba;
2915 	u32 tdlen, tctl, tarc;
2916 
2917 	/* Setup the HW Tx Head and Tail descriptor pointers */
2918 	tdba = tx_ring->dma;
2919 	tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
2920 	ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32)));
2921 	ew32(TDBAH(0), (tdba >> 32));
2922 	ew32(TDLEN(0), tdlen);
2923 	ew32(TDH(0), 0);
2924 	ew32(TDT(0), 0);
2925 	tx_ring->head = adapter->hw.hw_addr + E1000_TDH(0);
2926 	tx_ring->tail = adapter->hw.hw_addr + E1000_TDT(0);
2927 
2928 	writel(0, tx_ring->head);
2929 	if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
2930 		e1000e_update_tdt_wa(tx_ring, 0);
2931 	else
2932 		writel(0, tx_ring->tail);
2933 
2934 	/* Set the Tx Interrupt Delay register */
2935 	ew32(TIDV, adapter->tx_int_delay);
2936 	/* Tx irq moderation */
2937 	ew32(TADV, adapter->tx_abs_int_delay);
2938 
2939 	if (adapter->flags2 & FLAG2_DMA_BURST) {
2940 		u32 txdctl = er32(TXDCTL(0));
2941 
2942 		txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2943 			    E1000_TXDCTL_WTHRESH);
2944 		/* set up some performance related parameters to encourage the
2945 		 * hardware to use the bus more efficiently in bursts, depends
2946 		 * on the tx_int_delay to be enabled,
2947 		 * wthresh = 1 ==> burst write is disabled to avoid Tx stalls
2948 		 * hthresh = 1 ==> prefetch when one or more available
2949 		 * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2950 		 * BEWARE: this seems to work but should be considered first if
2951 		 * there are Tx hangs or other Tx related bugs
2952 		 */
2953 		txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2954 		ew32(TXDCTL(0), txdctl);
2955 	}
2956 	/* erratum work around: set txdctl the same for both queues */
2957 	ew32(TXDCTL(1), er32(TXDCTL(0)));
2958 
2959 	/* Program the Transmit Control Register */
2960 	tctl = er32(TCTL);
2961 	tctl &= ~E1000_TCTL_CT;
2962 	tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2963 		(E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2964 
2965 	if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
2966 		tarc = er32(TARC(0));
2967 		/* set the speed mode bit, we'll clear it if we're not at
2968 		 * gigabit link later
2969 		 */
2970 #define SPEED_MODE_BIT BIT(21)
2971 		tarc |= SPEED_MODE_BIT;
2972 		ew32(TARC(0), tarc);
2973 	}
2974 
2975 	/* errata: program both queues to unweighted RR */
2976 	if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
2977 		tarc = er32(TARC(0));
2978 		tarc |= 1;
2979 		ew32(TARC(0), tarc);
2980 		tarc = er32(TARC(1));
2981 		tarc |= 1;
2982 		ew32(TARC(1), tarc);
2983 	}
2984 
2985 	/* Setup Transmit Descriptor Settings for eop descriptor */
2986 	adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2987 
2988 	/* only set IDE if we are delaying interrupts using the timers */
2989 	if (adapter->tx_int_delay)
2990 		adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2991 
2992 	/* enable Report Status bit */
2993 	adapter->txd_cmd |= E1000_TXD_CMD_RS;
2994 
2995 	ew32(TCTL, tctl);
2996 
2997 	hw->mac.ops.config_collision_dist(hw);
2998 
2999 	/* SPT and KBL Si errata workaround to avoid data corruption */
3000 	if (hw->mac.type == e1000_pch_spt) {
3001 		u32 reg_val;
3002 
3003 		reg_val = er32(IOSFPC);
3004 		reg_val |= E1000_RCTL_RDMTS_HEX;
3005 		ew32(IOSFPC, reg_val);
3006 
3007 		reg_val = er32(TARC(0));
3008 		/* SPT and KBL Si errata workaround to avoid Tx hang.
3009 		 * Dropping the number of outstanding requests from
3010 		 * 3 to 2 in order to avoid a buffer overrun.
3011 		 */
3012 		reg_val &= ~E1000_TARC0_CB_MULTIQ_3_REQ;
3013 		reg_val |= E1000_TARC0_CB_MULTIQ_2_REQ;
3014 		ew32(TARC(0), reg_val);
3015 	}
3016 }
3017 
3018 /**
3019  * e1000_setup_rctl - configure the receive control registers
3020  * @adapter: Board private structure
3021  **/
3022 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
3023 			   (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
3024 static void e1000_setup_rctl(struct e1000_adapter *adapter)
3025 {
3026 	struct e1000_hw *hw = &adapter->hw;
3027 	u32 rctl, rfctl;
3028 	u32 pages = 0;
3029 
3030 	/* Workaround Si errata on PCHx - configure jumbo frame flow.
3031 	 * If jumbo frames not set, program related MAC/PHY registers
3032 	 * to h/w defaults
3033 	 */
3034 	if (hw->mac.type >= e1000_pch2lan) {
3035 		s32 ret_val;
3036 
3037 		if (adapter->netdev->mtu > ETH_DATA_LEN)
3038 			ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
3039 		else
3040 			ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
3041 
3042 		if (ret_val)
3043 			e_dbg("failed to enable|disable jumbo frame workaround mode\n");
3044 	}
3045 
3046 	/* Program MC offset vector base */
3047 	rctl = er32(RCTL);
3048 	rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3049 	rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
3050 	    E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
3051 	    (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3052 
3053 	/* Do not Store bad packets */
3054 	rctl &= ~E1000_RCTL_SBP;
3055 
3056 	/* Enable Long Packet receive */
3057 	if (adapter->netdev->mtu <= ETH_DATA_LEN)
3058 		rctl &= ~E1000_RCTL_LPE;
3059 	else
3060 		rctl |= E1000_RCTL_LPE;
3061 
3062 	/* Some systems expect that the CRC is included in SMBUS traffic. The
3063 	 * hardware strips the CRC before sending to both SMBUS (BMC) and to
3064 	 * host memory when this is enabled
3065 	 */
3066 	if (adapter->flags2 & FLAG2_CRC_STRIPPING)
3067 		rctl |= E1000_RCTL_SECRC;
3068 
3069 	/* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
3070 	if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
3071 		u16 phy_data;
3072 
3073 		e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
3074 		phy_data &= 0xfff8;
3075 		phy_data |= BIT(2);
3076 		e1e_wphy(hw, PHY_REG(770, 26), phy_data);
3077 
3078 		e1e_rphy(hw, 22, &phy_data);
3079 		phy_data &= 0x0fff;
3080 		phy_data |= BIT(14);
3081 		e1e_wphy(hw, 0x10, 0x2823);
3082 		e1e_wphy(hw, 0x11, 0x0003);
3083 		e1e_wphy(hw, 22, phy_data);
3084 	}
3085 
3086 	/* Setup buffer sizes */
3087 	rctl &= ~E1000_RCTL_SZ_4096;
3088 	rctl |= E1000_RCTL_BSEX;
3089 	switch (adapter->rx_buffer_len) {
3090 	case 2048:
3091 	default:
3092 		rctl |= E1000_RCTL_SZ_2048;
3093 		rctl &= ~E1000_RCTL_BSEX;
3094 		break;
3095 	case 4096:
3096 		rctl |= E1000_RCTL_SZ_4096;
3097 		break;
3098 	case 8192:
3099 		rctl |= E1000_RCTL_SZ_8192;
3100 		break;
3101 	case 16384:
3102 		rctl |= E1000_RCTL_SZ_16384;
3103 		break;
3104 	}
3105 
3106 	/* Enable Extended Status in all Receive Descriptors */
3107 	rfctl = er32(RFCTL);
3108 	rfctl |= E1000_RFCTL_EXTEN;
3109 	ew32(RFCTL, rfctl);
3110 
3111 	/* 82571 and greater support packet-split where the protocol
3112 	 * header is placed in skb->data and the packet data is
3113 	 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
3114 	 * In the case of a non-split, skb->data is linearly filled,
3115 	 * followed by the page buffers.  Therefore, skb->data is
3116 	 * sized to hold the largest protocol header.
3117 	 *
3118 	 * allocations using alloc_page take too long for regular MTU
3119 	 * so only enable packet split for jumbo frames
3120 	 *
3121 	 * Using pages when the page size is greater than 16k wastes
3122 	 * a lot of memory, since we allocate 3 pages at all times
3123 	 * per packet.
3124 	 */
3125 	pages = PAGE_USE_COUNT(adapter->netdev->mtu);
3126 	if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
3127 		adapter->rx_ps_pages = pages;
3128 	else
3129 		adapter->rx_ps_pages = 0;
3130 
3131 	if (adapter->rx_ps_pages) {
3132 		u32 psrctl = 0;
3133 
3134 		/* Enable Packet split descriptors */
3135 		rctl |= E1000_RCTL_DTYP_PS;
3136 
3137 		psrctl |= adapter->rx_ps_bsize0 >> E1000_PSRCTL_BSIZE0_SHIFT;
3138 
3139 		switch (adapter->rx_ps_pages) {
3140 		case 3:
3141 			psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE3_SHIFT;
3142 			/* fall-through */
3143 		case 2:
3144 			psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE2_SHIFT;
3145 			/* fall-through */
3146 		case 1:
3147 			psrctl |= PAGE_SIZE >> E1000_PSRCTL_BSIZE1_SHIFT;
3148 			break;
3149 		}
3150 
3151 		ew32(PSRCTL, psrctl);
3152 	}
3153 
3154 	/* This is useful for sniffing bad packets. */
3155 	if (adapter->netdev->features & NETIF_F_RXALL) {
3156 		/* UPE and MPE will be handled by normal PROMISC logic
3157 		 * in e1000e_set_rx_mode
3158 		 */
3159 		rctl |= (E1000_RCTL_SBP |	/* Receive bad packets */
3160 			 E1000_RCTL_BAM |	/* RX All Bcast Pkts */
3161 			 E1000_RCTL_PMCF);	/* RX All MAC Ctrl Pkts */
3162 
3163 		rctl &= ~(E1000_RCTL_VFE |	/* Disable VLAN filter */
3164 			  E1000_RCTL_DPF |	/* Allow filtered pause */
3165 			  E1000_RCTL_CFIEN);	/* Dis VLAN CFIEN Filter */
3166 		/* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3167 		 * and that breaks VLANs.
3168 		 */
3169 	}
3170 
3171 	ew32(RCTL, rctl);
3172 	/* just started the receive unit, no need to restart */
3173 	adapter->flags &= ~FLAG_RESTART_NOW;
3174 }
3175 
3176 /**
3177  * e1000_configure_rx - Configure Receive Unit after Reset
3178  * @adapter: board private structure
3179  *
3180  * Configure the Rx unit of the MAC after a reset.
3181  **/
3182 static void e1000_configure_rx(struct e1000_adapter *adapter)
3183 {
3184 	struct e1000_hw *hw = &adapter->hw;
3185 	struct e1000_ring *rx_ring = adapter->rx_ring;
3186 	u64 rdba;
3187 	u32 rdlen, rctl, rxcsum, ctrl_ext;
3188 
3189 	if (adapter->rx_ps_pages) {
3190 		/* this is a 32 byte descriptor */
3191 		rdlen = rx_ring->count *
3192 		    sizeof(union e1000_rx_desc_packet_split);
3193 		adapter->clean_rx = e1000_clean_rx_irq_ps;
3194 		adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
3195 	} else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
3196 		rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3197 		adapter->clean_rx = e1000_clean_jumbo_rx_irq;
3198 		adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
3199 	} else {
3200 		rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3201 		adapter->clean_rx = e1000_clean_rx_irq;
3202 		adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
3203 	}
3204 
3205 	/* disable receives while setting up the descriptors */
3206 	rctl = er32(RCTL);
3207 	if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3208 		ew32(RCTL, rctl & ~E1000_RCTL_EN);
3209 	e1e_flush();
3210 	usleep_range(10000, 20000);
3211 
3212 	if (adapter->flags2 & FLAG2_DMA_BURST) {
3213 		/* set the writeback threshold (only takes effect if the RDTR
3214 		 * is set). set GRAN=1 and write back up to 0x4 worth, and
3215 		 * enable prefetching of 0x20 Rx descriptors
3216 		 * granularity = 01
3217 		 * wthresh = 04,
3218 		 * hthresh = 04,
3219 		 * pthresh = 0x20
3220 		 */
3221 		ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
3222 		ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
3223 	}
3224 
3225 	/* set the Receive Delay Timer Register */
3226 	ew32(RDTR, adapter->rx_int_delay);
3227 
3228 	/* irq moderation */
3229 	ew32(RADV, adapter->rx_abs_int_delay);
3230 	if ((adapter->itr_setting != 0) && (adapter->itr != 0))
3231 		e1000e_write_itr(adapter, adapter->itr);
3232 
3233 	ctrl_ext = er32(CTRL_EXT);
3234 	/* Auto-Mask interrupts upon ICR access */
3235 	ctrl_ext |= E1000_CTRL_EXT_IAME;
3236 	ew32(IAM, 0xffffffff);
3237 	ew32(CTRL_EXT, ctrl_ext);
3238 	e1e_flush();
3239 
3240 	/* Setup the HW Rx Head and Tail Descriptor Pointers and
3241 	 * the Base and Length of the Rx Descriptor Ring
3242 	 */
3243 	rdba = rx_ring->dma;
3244 	ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32)));
3245 	ew32(RDBAH(0), (rdba >> 32));
3246 	ew32(RDLEN(0), rdlen);
3247 	ew32(RDH(0), 0);
3248 	ew32(RDT(0), 0);
3249 	rx_ring->head = adapter->hw.hw_addr + E1000_RDH(0);
3250 	rx_ring->tail = adapter->hw.hw_addr + E1000_RDT(0);
3251 
3252 	writel(0, rx_ring->head);
3253 	if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
3254 		e1000e_update_rdt_wa(rx_ring, 0);
3255 	else
3256 		writel(0, rx_ring->tail);
3257 
3258 	/* Enable Receive Checksum Offload for TCP and UDP */
3259 	rxcsum = er32(RXCSUM);
3260 	if (adapter->netdev->features & NETIF_F_RXCSUM)
3261 		rxcsum |= E1000_RXCSUM_TUOFL;
3262 	else
3263 		rxcsum &= ~E1000_RXCSUM_TUOFL;
3264 	ew32(RXCSUM, rxcsum);
3265 
3266 	/* With jumbo frames, excessive C-state transition latencies result
3267 	 * in dropped transactions.
3268 	 */
3269 	if (adapter->netdev->mtu > ETH_DATA_LEN) {
3270 		u32 lat =
3271 		    ((er32(PBA) & E1000_PBA_RXA_MASK) * 1024 -
3272 		     adapter->max_frame_size) * 8 / 1000;
3273 
3274 		if (adapter->flags & FLAG_IS_ICH) {
3275 			u32 rxdctl = er32(RXDCTL(0));
3276 
3277 			ew32(RXDCTL(0), rxdctl | 0x3 | BIT(8));
3278 		}
3279 
3280 		dev_info(&adapter->pdev->dev,
3281 			 "Some CPU C-states have been disabled in order to enable jumbo frames\n");
3282 		pm_qos_update_request(&adapter->pm_qos_req, lat);
3283 	} else {
3284 		pm_qos_update_request(&adapter->pm_qos_req,
3285 				      PM_QOS_DEFAULT_VALUE);
3286 	}
3287 
3288 	/* Enable Receives */
3289 	ew32(RCTL, rctl);
3290 }
3291 
3292 /**
3293  * e1000e_write_mc_addr_list - write multicast addresses to MTA
3294  * @netdev: network interface device structure
3295  *
3296  * Writes multicast address list to the MTA hash table.
3297  * Returns: -ENOMEM on failure
3298  *                0 on no addresses written
3299  *                X on writing X addresses to MTA
3300  */
3301 static int e1000e_write_mc_addr_list(struct net_device *netdev)
3302 {
3303 	struct e1000_adapter *adapter = netdev_priv(netdev);
3304 	struct e1000_hw *hw = &adapter->hw;
3305 	struct netdev_hw_addr *ha;
3306 	u8 *mta_list;
3307 	int i;
3308 
3309 	if (netdev_mc_empty(netdev)) {
3310 		/* nothing to program, so clear mc list */
3311 		hw->mac.ops.update_mc_addr_list(hw, NULL, 0);
3312 		return 0;
3313 	}
3314 
3315 	mta_list = kcalloc(netdev_mc_count(netdev), ETH_ALEN, GFP_ATOMIC);
3316 	if (!mta_list)
3317 		return -ENOMEM;
3318 
3319 	/* update_mc_addr_list expects a packed array of only addresses. */
3320 	i = 0;
3321 	netdev_for_each_mc_addr(ha, netdev)
3322 	    memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3323 
3324 	hw->mac.ops.update_mc_addr_list(hw, mta_list, i);
3325 	kfree(mta_list);
3326 
3327 	return netdev_mc_count(netdev);
3328 }
3329 
3330 /**
3331  * e1000e_write_uc_addr_list - write unicast addresses to RAR table
3332  * @netdev: network interface device structure
3333  *
3334  * Writes unicast address list to the RAR table.
3335  * Returns: -ENOMEM on failure/insufficient address space
3336  *                0 on no addresses written
3337  *                X on writing X addresses to the RAR table
3338  **/
3339 static int e1000e_write_uc_addr_list(struct net_device *netdev)
3340 {
3341 	struct e1000_adapter *adapter = netdev_priv(netdev);
3342 	struct e1000_hw *hw = &adapter->hw;
3343 	unsigned int rar_entries;
3344 	int count = 0;
3345 
3346 	rar_entries = hw->mac.ops.rar_get_count(hw);
3347 
3348 	/* save a rar entry for our hardware address */
3349 	rar_entries--;
3350 
3351 	/* save a rar entry for the LAA workaround */
3352 	if (adapter->flags & FLAG_RESET_OVERWRITES_LAA)
3353 		rar_entries--;
3354 
3355 	/* return ENOMEM indicating insufficient memory for addresses */
3356 	if (netdev_uc_count(netdev) > rar_entries)
3357 		return -ENOMEM;
3358 
3359 	if (!netdev_uc_empty(netdev) && rar_entries) {
3360 		struct netdev_hw_addr *ha;
3361 
3362 		/* write the addresses in reverse order to avoid write
3363 		 * combining
3364 		 */
3365 		netdev_for_each_uc_addr(ha, netdev) {
3366 			int ret_val;
3367 
3368 			if (!rar_entries)
3369 				break;
3370 			ret_val = hw->mac.ops.rar_set(hw, ha->addr, rar_entries--);
3371 			if (ret_val < 0)
3372 				return -ENOMEM;
3373 			count++;
3374 		}
3375 	}
3376 
3377 	/* zero out the remaining RAR entries not used above */
3378 	for (; rar_entries > 0; rar_entries--) {
3379 		ew32(RAH(rar_entries), 0);
3380 		ew32(RAL(rar_entries), 0);
3381 	}
3382 	e1e_flush();
3383 
3384 	return count;
3385 }
3386 
3387 /**
3388  * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set
3389  * @netdev: network interface device structure
3390  *
3391  * The ndo_set_rx_mode entry point is called whenever the unicast or multicast
3392  * address list or the network interface flags are updated.  This routine is
3393  * responsible for configuring the hardware for proper unicast, multicast,
3394  * promiscuous mode, and all-multi behavior.
3395  **/
3396 static void e1000e_set_rx_mode(struct net_device *netdev)
3397 {
3398 	struct e1000_adapter *adapter = netdev_priv(netdev);
3399 	struct e1000_hw *hw = &adapter->hw;
3400 	u32 rctl;
3401 
3402 	if (pm_runtime_suspended(netdev->dev.parent))
3403 		return;
3404 
3405 	/* Check for Promiscuous and All Multicast modes */
3406 	rctl = er32(RCTL);
3407 
3408 	/* clear the affected bits */
3409 	rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3410 
3411 	if (netdev->flags & IFF_PROMISC) {
3412 		rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3413 		/* Do not hardware filter VLANs in promisc mode */
3414 		e1000e_vlan_filter_disable(adapter);
3415 	} else {
3416 		int count;
3417 
3418 		if (netdev->flags & IFF_ALLMULTI) {
3419 			rctl |= E1000_RCTL_MPE;
3420 		} else {
3421 			/* Write addresses to the MTA, if the attempt fails
3422 			 * then we should just turn on promiscuous mode so
3423 			 * that we can at least receive multicast traffic
3424 			 */
3425 			count = e1000e_write_mc_addr_list(netdev);
3426 			if (count < 0)
3427 				rctl |= E1000_RCTL_MPE;
3428 		}
3429 		e1000e_vlan_filter_enable(adapter);
3430 		/* Write addresses to available RAR registers, if there is not
3431 		 * sufficient space to store all the addresses then enable
3432 		 * unicast promiscuous mode
3433 		 */
3434 		count = e1000e_write_uc_addr_list(netdev);
3435 		if (count < 0)
3436 			rctl |= E1000_RCTL_UPE;
3437 	}
3438 
3439 	ew32(RCTL, rctl);
3440 
3441 	if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3442 		e1000e_vlan_strip_enable(adapter);
3443 	else
3444 		e1000e_vlan_strip_disable(adapter);
3445 }
3446 
3447 static void e1000e_setup_rss_hash(struct e1000_adapter *adapter)
3448 {
3449 	struct e1000_hw *hw = &adapter->hw;
3450 	u32 mrqc, rxcsum;
3451 	u32 rss_key[10];
3452 	int i;
3453 
3454 	netdev_rss_key_fill(rss_key, sizeof(rss_key));
3455 	for (i = 0; i < 10; i++)
3456 		ew32(RSSRK(i), rss_key[i]);
3457 
3458 	/* Direct all traffic to queue 0 */
3459 	for (i = 0; i < 32; i++)
3460 		ew32(RETA(i), 0);
3461 
3462 	/* Disable raw packet checksumming so that RSS hash is placed in
3463 	 * descriptor on writeback.
3464 	 */
3465 	rxcsum = er32(RXCSUM);
3466 	rxcsum |= E1000_RXCSUM_PCSD;
3467 
3468 	ew32(RXCSUM, rxcsum);
3469 
3470 	mrqc = (E1000_MRQC_RSS_FIELD_IPV4 |
3471 		E1000_MRQC_RSS_FIELD_IPV4_TCP |
3472 		E1000_MRQC_RSS_FIELD_IPV6 |
3473 		E1000_MRQC_RSS_FIELD_IPV6_TCP |
3474 		E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
3475 
3476 	ew32(MRQC, mrqc);
3477 }
3478 
3479 /**
3480  * e1000e_get_base_timinca - get default SYSTIM time increment attributes
3481  * @adapter: board private structure
3482  * @timinca: pointer to returned time increment attributes
3483  *
3484  * Get attributes for incrementing the System Time Register SYSTIML/H at
3485  * the default base frequency, and set the cyclecounter shift value.
3486  **/
3487 s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
3488 {
3489 	struct e1000_hw *hw = &adapter->hw;
3490 	u32 incvalue, incperiod, shift;
3491 
3492 	/* Make sure clock is enabled on I217/I218/I219  before checking
3493 	 * the frequency
3494 	 */
3495 	if ((hw->mac.type >= e1000_pch_lpt) &&
3496 	    !(er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) &&
3497 	    !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_ENABLED)) {
3498 		u32 fextnvm7 = er32(FEXTNVM7);
3499 
3500 		if (!(fextnvm7 & BIT(0))) {
3501 			ew32(FEXTNVM7, fextnvm7 | BIT(0));
3502 			e1e_flush();
3503 		}
3504 	}
3505 
3506 	switch (hw->mac.type) {
3507 	case e1000_pch2lan:
3508 		/* Stable 96MHz frequency */
3509 		incperiod = INCPERIOD_96MHZ;
3510 		incvalue = INCVALUE_96MHZ;
3511 		shift = INCVALUE_SHIFT_96MHZ;
3512 		adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
3513 		break;
3514 	case e1000_pch_lpt:
3515 		if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3516 			/* Stable 96MHz frequency */
3517 			incperiod = INCPERIOD_96MHZ;
3518 			incvalue = INCVALUE_96MHZ;
3519 			shift = INCVALUE_SHIFT_96MHZ;
3520 			adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
3521 		} else {
3522 			/* Stable 25MHz frequency */
3523 			incperiod = INCPERIOD_25MHZ;
3524 			incvalue = INCVALUE_25MHZ;
3525 			shift = INCVALUE_SHIFT_25MHZ;
3526 			adapter->cc.shift = shift;
3527 		}
3528 		break;
3529 	case e1000_pch_spt:
3530 		/* Stable 24MHz frequency */
3531 		incperiod = INCPERIOD_24MHZ;
3532 		incvalue = INCVALUE_24MHZ;
3533 		shift = INCVALUE_SHIFT_24MHZ;
3534 		adapter->cc.shift = shift;
3535 		break;
3536 	case e1000_pch_cnp:
3537 		if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3538 			/* Stable 24MHz frequency */
3539 			incperiod = INCPERIOD_24MHZ;
3540 			incvalue = INCVALUE_24MHZ;
3541 			shift = INCVALUE_SHIFT_24MHZ;
3542 			adapter->cc.shift = shift;
3543 		} else {
3544 			/* Stable 38400KHz frequency */
3545 			incperiod = INCPERIOD_38400KHZ;
3546 			incvalue = INCVALUE_38400KHZ;
3547 			shift = INCVALUE_SHIFT_38400KHZ;
3548 			adapter->cc.shift = shift;
3549 		}
3550 		break;
3551 	case e1000_82574:
3552 	case e1000_82583:
3553 		/* Stable 25MHz frequency */
3554 		incperiod = INCPERIOD_25MHZ;
3555 		incvalue = INCVALUE_25MHZ;
3556 		shift = INCVALUE_SHIFT_25MHZ;
3557 		adapter->cc.shift = shift;
3558 		break;
3559 	default:
3560 		return -EINVAL;
3561 	}
3562 
3563 	*timinca = ((incperiod << E1000_TIMINCA_INCPERIOD_SHIFT) |
3564 		    ((incvalue << shift) & E1000_TIMINCA_INCVALUE_MASK));
3565 
3566 	return 0;
3567 }
3568 
3569 /**
3570  * e1000e_config_hwtstamp - configure the hwtstamp registers and enable/disable
3571  * @adapter: board private structure
3572  *
3573  * Outgoing time stamping can be enabled and disabled. Play nice and
3574  * disable it when requested, although it shouldn't cause any overhead
3575  * when no packet needs it. At most one packet in the queue may be
3576  * marked for time stamping, otherwise it would be impossible to tell
3577  * for sure to which packet the hardware time stamp belongs.
3578  *
3579  * Incoming time stamping has to be configured via the hardware filters.
3580  * Not all combinations are supported, in particular event type has to be
3581  * specified. Matching the kind of event packet is not supported, with the
3582  * exception of "all V2 events regardless of level 2 or 4".
3583  **/
3584 static int e1000e_config_hwtstamp(struct e1000_adapter *adapter,
3585 				  struct hwtstamp_config *config)
3586 {
3587 	struct e1000_hw *hw = &adapter->hw;
3588 	u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
3589 	u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
3590 	u32 rxmtrl = 0;
3591 	u16 rxudp = 0;
3592 	bool is_l4 = false;
3593 	bool is_l2 = false;
3594 	u32 regval;
3595 
3596 	if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3597 		return -EINVAL;
3598 
3599 	/* flags reserved for future extensions - must be zero */
3600 	if (config->flags)
3601 		return -EINVAL;
3602 
3603 	switch (config->tx_type) {
3604 	case HWTSTAMP_TX_OFF:
3605 		tsync_tx_ctl = 0;
3606 		break;
3607 	case HWTSTAMP_TX_ON:
3608 		break;
3609 	default:
3610 		return -ERANGE;
3611 	}
3612 
3613 	switch (config->rx_filter) {
3614 	case HWTSTAMP_FILTER_NONE:
3615 		tsync_rx_ctl = 0;
3616 		break;
3617 	case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
3618 		tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3619 		rxmtrl = E1000_RXMTRL_PTP_V1_SYNC_MESSAGE;
3620 		is_l4 = true;
3621 		break;
3622 	case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
3623 		tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3624 		rxmtrl = E1000_RXMTRL_PTP_V1_DELAY_REQ_MESSAGE;
3625 		is_l4 = true;
3626 		break;
3627 	case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
3628 		/* Also time stamps V2 L2 Path Delay Request/Response */
3629 		tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3630 		rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3631 		is_l2 = true;
3632 		break;
3633 	case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
3634 		/* Also time stamps V2 L2 Path Delay Request/Response. */
3635 		tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3636 		rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3637 		is_l2 = true;
3638 		break;
3639 	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
3640 		/* Hardware cannot filter just V2 L4 Sync messages;
3641 		 * fall-through to V2 (both L2 and L4) Sync.
3642 		 */
3643 	case HWTSTAMP_FILTER_PTP_V2_SYNC:
3644 		/* Also time stamps V2 Path Delay Request/Response. */
3645 		tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3646 		rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3647 		is_l2 = true;
3648 		is_l4 = true;
3649 		break;
3650 	case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
3651 		/* Hardware cannot filter just V2 L4 Delay Request messages;
3652 		 * fall-through to V2 (both L2 and L4) Delay Request.
3653 		 */
3654 	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
3655 		/* Also time stamps V2 Path Delay Request/Response. */
3656 		tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3657 		rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3658 		is_l2 = true;
3659 		is_l4 = true;
3660 		break;
3661 	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
3662 	case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
3663 		/* Hardware cannot filter just V2 L4 or L2 Event messages;
3664 		 * fall-through to all V2 (both L2 and L4) Events.
3665 		 */
3666 	case HWTSTAMP_FILTER_PTP_V2_EVENT:
3667 		tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
3668 		config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
3669 		is_l2 = true;
3670 		is_l4 = true;
3671 		break;
3672 	case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
3673 		/* For V1, the hardware can only filter Sync messages or
3674 		 * Delay Request messages but not both so fall-through to
3675 		 * time stamp all packets.
3676 		 */
3677 	case HWTSTAMP_FILTER_NTP_ALL:
3678 	case HWTSTAMP_FILTER_ALL:
3679 		is_l2 = true;
3680 		is_l4 = true;
3681 		tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
3682 		config->rx_filter = HWTSTAMP_FILTER_ALL;
3683 		break;
3684 	default:
3685 		return -ERANGE;
3686 	}
3687 
3688 	adapter->hwtstamp_config = *config;
3689 
3690 	/* enable/disable Tx h/w time stamping */
3691 	regval = er32(TSYNCTXCTL);
3692 	regval &= ~E1000_TSYNCTXCTL_ENABLED;
3693 	regval |= tsync_tx_ctl;
3694 	ew32(TSYNCTXCTL, regval);
3695 	if ((er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) !=
3696 	    (regval & E1000_TSYNCTXCTL_ENABLED)) {
3697 		e_err("Timesync Tx Control register not set as expected\n");
3698 		return -EAGAIN;
3699 	}
3700 
3701 	/* enable/disable Rx h/w time stamping */
3702 	regval = er32(TSYNCRXCTL);
3703 	regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
3704 	regval |= tsync_rx_ctl;
3705 	ew32(TSYNCRXCTL, regval);
3706 	if ((er32(TSYNCRXCTL) & (E1000_TSYNCRXCTL_ENABLED |
3707 				 E1000_TSYNCRXCTL_TYPE_MASK)) !=
3708 	    (regval & (E1000_TSYNCRXCTL_ENABLED |
3709 		       E1000_TSYNCRXCTL_TYPE_MASK))) {
3710 		e_err("Timesync Rx Control register not set as expected\n");
3711 		return -EAGAIN;
3712 	}
3713 
3714 	/* L2: define ethertype filter for time stamped packets */
3715 	if (is_l2)
3716 		rxmtrl |= ETH_P_1588;
3717 
3718 	/* define which PTP packets get time stamped */
3719 	ew32(RXMTRL, rxmtrl);
3720 
3721 	/* Filter by destination port */
3722 	if (is_l4) {
3723 		rxudp = PTP_EV_PORT;
3724 		cpu_to_be16s(&rxudp);
3725 	}
3726 	ew32(RXUDP, rxudp);
3727 
3728 	e1e_flush();
3729 
3730 	/* Clear TSYNCRXCTL_VALID & TSYNCTXCTL_VALID bit */
3731 	er32(RXSTMPH);
3732 	er32(TXSTMPH);
3733 
3734 	return 0;
3735 }
3736 
3737 /**
3738  * e1000_configure - configure the hardware for Rx and Tx
3739  * @adapter: private board structure
3740  **/
3741 static void e1000_configure(struct e1000_adapter *adapter)
3742 {
3743 	struct e1000_ring *rx_ring = adapter->rx_ring;
3744 
3745 	e1000e_set_rx_mode(adapter->netdev);
3746 
3747 	e1000_restore_vlan(adapter);
3748 	e1000_init_manageability_pt(adapter);
3749 
3750 	e1000_configure_tx(adapter);
3751 
3752 	if (adapter->netdev->features & NETIF_F_RXHASH)
3753 		e1000e_setup_rss_hash(adapter);
3754 	e1000_setup_rctl(adapter);
3755 	e1000_configure_rx(adapter);
3756 	adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL);
3757 }
3758 
3759 /**
3760  * e1000e_power_up_phy - restore link in case the phy was powered down
3761  * @adapter: address of board private structure
3762  *
3763  * The phy may be powered down to save power and turn off link when the
3764  * driver is unloaded and wake on lan is not enabled (among others)
3765  * *** this routine MUST be followed by a call to e1000e_reset ***
3766  **/
3767 void e1000e_power_up_phy(struct e1000_adapter *adapter)
3768 {
3769 	if (adapter->hw.phy.ops.power_up)
3770 		adapter->hw.phy.ops.power_up(&adapter->hw);
3771 
3772 	adapter->hw.mac.ops.setup_link(&adapter->hw);
3773 }
3774 
3775 /**
3776  * e1000_power_down_phy - Power down the PHY
3777  *
3778  * Power down the PHY so no link is implied when interface is down.
3779  * The PHY cannot be powered down if management or WoL is active.
3780  */
3781 static void e1000_power_down_phy(struct e1000_adapter *adapter)
3782 {
3783 	if (adapter->hw.phy.ops.power_down)
3784 		adapter->hw.phy.ops.power_down(&adapter->hw);
3785 }
3786 
3787 /**
3788  * e1000_flush_tx_ring - remove all descriptors from the tx_ring
3789  *
3790  * We want to clear all pending descriptors from the TX ring.
3791  * zeroing happens when the HW reads the regs. We  assign the ring itself as
3792  * the data of the next descriptor. We don't care about the data we are about
3793  * to reset the HW.
3794  */
3795 static void e1000_flush_tx_ring(struct e1000_adapter *adapter)
3796 {
3797 	struct e1000_hw *hw = &adapter->hw;
3798 	struct e1000_ring *tx_ring = adapter->tx_ring;
3799 	struct e1000_tx_desc *tx_desc = NULL;
3800 	u32 tdt, tctl, txd_lower = E1000_TXD_CMD_IFCS;
3801 	u16 size = 512;
3802 
3803 	tctl = er32(TCTL);
3804 	ew32(TCTL, tctl | E1000_TCTL_EN);
3805 	tdt = er32(TDT(0));
3806 	BUG_ON(tdt != tx_ring->next_to_use);
3807 	tx_desc =  E1000_TX_DESC(*tx_ring, tx_ring->next_to_use);
3808 	tx_desc->buffer_addr = tx_ring->dma;
3809 
3810 	tx_desc->lower.data = cpu_to_le32(txd_lower | size);
3811 	tx_desc->upper.data = 0;
3812 	/* flush descriptors to memory before notifying the HW */
3813 	wmb();
3814 	tx_ring->next_to_use++;
3815 	if (tx_ring->next_to_use == tx_ring->count)
3816 		tx_ring->next_to_use = 0;
3817 	ew32(TDT(0), tx_ring->next_to_use);
3818 	mmiowb();
3819 	usleep_range(200, 250);
3820 }
3821 
3822 /**
3823  * e1000_flush_rx_ring - remove all descriptors from the rx_ring
3824  *
3825  * Mark all descriptors in the RX ring as consumed and disable the rx ring
3826  */
3827 static void e1000_flush_rx_ring(struct e1000_adapter *adapter)
3828 {
3829 	u32 rctl, rxdctl;
3830 	struct e1000_hw *hw = &adapter->hw;
3831 
3832 	rctl = er32(RCTL);
3833 	ew32(RCTL, rctl & ~E1000_RCTL_EN);
3834 	e1e_flush();
3835 	usleep_range(100, 150);
3836 
3837 	rxdctl = er32(RXDCTL(0));
3838 	/* zero the lower 14 bits (prefetch and host thresholds) */
3839 	rxdctl &= 0xffffc000;
3840 
3841 	/* update thresholds: prefetch threshold to 31, host threshold to 1
3842 	 * and make sure the granularity is "descriptors" and not "cache lines"
3843 	 */
3844 	rxdctl |= (0x1F | BIT(8) | E1000_RXDCTL_THRESH_UNIT_DESC);
3845 
3846 	ew32(RXDCTL(0), rxdctl);
3847 	/* momentarily enable the RX ring for the changes to take effect */
3848 	ew32(RCTL, rctl | E1000_RCTL_EN);
3849 	e1e_flush();
3850 	usleep_range(100, 150);
3851 	ew32(RCTL, rctl & ~E1000_RCTL_EN);
3852 }
3853 
3854 /**
3855  * e1000_flush_desc_rings - remove all descriptors from the descriptor rings
3856  *
3857  * In i219, the descriptor rings must be emptied before resetting the HW
3858  * or before changing the device state to D3 during runtime (runtime PM).
3859  *
3860  * Failure to do this will cause the HW to enter a unit hang state which can
3861  * only be released by PCI reset on the device
3862  *
3863  */
3864 
3865 static void e1000_flush_desc_rings(struct e1000_adapter *adapter)
3866 {
3867 	u16 hang_state;
3868 	u32 fext_nvm11, tdlen;
3869 	struct e1000_hw *hw = &adapter->hw;
3870 
3871 	/* First, disable MULR fix in FEXTNVM11 */
3872 	fext_nvm11 = er32(FEXTNVM11);
3873 	fext_nvm11 |= E1000_FEXTNVM11_DISABLE_MULR_FIX;
3874 	ew32(FEXTNVM11, fext_nvm11);
3875 	/* do nothing if we're not in faulty state, or if the queue is empty */
3876 	tdlen = er32(TDLEN(0));
3877 	pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3878 			     &hang_state);
3879 	if (!(hang_state & FLUSH_DESC_REQUIRED) || !tdlen)
3880 		return;
3881 	e1000_flush_tx_ring(adapter);
3882 	/* recheck, maybe the fault is caused by the rx ring */
3883 	pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3884 			     &hang_state);
3885 	if (hang_state & FLUSH_DESC_REQUIRED)
3886 		e1000_flush_rx_ring(adapter);
3887 }
3888 
3889 /**
3890  * e1000e_systim_reset - reset the timesync registers after a hardware reset
3891  * @adapter: board private structure
3892  *
3893  * When the MAC is reset, all hardware bits for timesync will be reset to the
3894  * default values. This function will restore the settings last in place.
3895  * Since the clock SYSTIME registers are reset, we will simply restore the
3896  * cyclecounter to the kernel real clock time.
3897  **/
3898 static void e1000e_systim_reset(struct e1000_adapter *adapter)
3899 {
3900 	struct ptp_clock_info *info = &adapter->ptp_clock_info;
3901 	struct e1000_hw *hw = &adapter->hw;
3902 	unsigned long flags;
3903 	u32 timinca;
3904 	s32 ret_val;
3905 
3906 	if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3907 		return;
3908 
3909 	if (info->adjfreq) {
3910 		/* restore the previous ptp frequency delta */
3911 		ret_val = info->adjfreq(info, adapter->ptp_delta);
3912 	} else {
3913 		/* set the default base frequency if no adjustment possible */
3914 		ret_val = e1000e_get_base_timinca(adapter, &timinca);
3915 		if (!ret_val)
3916 			ew32(TIMINCA, timinca);
3917 	}
3918 
3919 	if (ret_val) {
3920 		dev_warn(&adapter->pdev->dev,
3921 			 "Failed to restore TIMINCA clock rate delta: %d\n",
3922 			 ret_val);
3923 		return;
3924 	}
3925 
3926 	/* reset the systim ns time counter */
3927 	spin_lock_irqsave(&adapter->systim_lock, flags);
3928 	timecounter_init(&adapter->tc, &adapter->cc,
3929 			 ktime_to_ns(ktime_get_real()));
3930 	spin_unlock_irqrestore(&adapter->systim_lock, flags);
3931 
3932 	/* restore the previous hwtstamp configuration settings */
3933 	e1000e_config_hwtstamp(adapter, &adapter->hwtstamp_config);
3934 }
3935 
3936 /**
3937  * e1000e_reset - bring the hardware into a known good state
3938  *
3939  * This function boots the hardware and enables some settings that
3940  * require a configuration cycle of the hardware - those cannot be
3941  * set/changed during runtime. After reset the device needs to be
3942  * properly configured for Rx, Tx etc.
3943  */
3944 void e1000e_reset(struct e1000_adapter *adapter)
3945 {
3946 	struct e1000_mac_info *mac = &adapter->hw.mac;
3947 	struct e1000_fc_info *fc = &adapter->hw.fc;
3948 	struct e1000_hw *hw = &adapter->hw;
3949 	u32 tx_space, min_tx_space, min_rx_space;
3950 	u32 pba = adapter->pba;
3951 	u16 hwm;
3952 
3953 	/* reset Packet Buffer Allocation to default */
3954 	ew32(PBA, pba);
3955 
3956 	if (adapter->max_frame_size > (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)) {
3957 		/* To maintain wire speed transmits, the Tx FIFO should be
3958 		 * large enough to accommodate two full transmit packets,
3959 		 * rounded up to the next 1KB and expressed in KB.  Likewise,
3960 		 * the Rx FIFO should be large enough to accommodate at least
3961 		 * one full receive packet and is similarly rounded up and
3962 		 * expressed in KB.
3963 		 */
3964 		pba = er32(PBA);
3965 		/* upper 16 bits has Tx packet buffer allocation size in KB */
3966 		tx_space = pba >> 16;
3967 		/* lower 16 bits has Rx packet buffer allocation size in KB */
3968 		pba &= 0xffff;
3969 		/* the Tx fifo also stores 16 bytes of information about the Tx
3970 		 * but don't include ethernet FCS because hardware appends it
3971 		 */
3972 		min_tx_space = (adapter->max_frame_size +
3973 				sizeof(struct e1000_tx_desc) - ETH_FCS_LEN) * 2;
3974 		min_tx_space = ALIGN(min_tx_space, 1024);
3975 		min_tx_space >>= 10;
3976 		/* software strips receive CRC, so leave room for it */
3977 		min_rx_space = adapter->max_frame_size;
3978 		min_rx_space = ALIGN(min_rx_space, 1024);
3979 		min_rx_space >>= 10;
3980 
3981 		/* If current Tx allocation is less than the min Tx FIFO size,
3982 		 * and the min Tx FIFO size is less than the current Rx FIFO
3983 		 * allocation, take space away from current Rx allocation
3984 		 */
3985 		if ((tx_space < min_tx_space) &&
3986 		    ((min_tx_space - tx_space) < pba)) {
3987 			pba -= min_tx_space - tx_space;
3988 
3989 			/* if short on Rx space, Rx wins and must trump Tx
3990 			 * adjustment
3991 			 */
3992 			if (pba < min_rx_space)
3993 				pba = min_rx_space;
3994 		}
3995 
3996 		ew32(PBA, pba);
3997 	}
3998 
3999 	/* flow control settings
4000 	 *
4001 	 * The high water mark must be low enough to fit one full frame
4002 	 * (or the size used for early receive) above it in the Rx FIFO.
4003 	 * Set it to the lower of:
4004 	 * - 90% of the Rx FIFO size, and
4005 	 * - the full Rx FIFO size minus one full frame
4006 	 */
4007 	if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
4008 		fc->pause_time = 0xFFFF;
4009 	else
4010 		fc->pause_time = E1000_FC_PAUSE_TIME;
4011 	fc->send_xon = true;
4012 	fc->current_mode = fc->requested_mode;
4013 
4014 	switch (hw->mac.type) {
4015 	case e1000_ich9lan:
4016 	case e1000_ich10lan:
4017 		if (adapter->netdev->mtu > ETH_DATA_LEN) {
4018 			pba = 14;
4019 			ew32(PBA, pba);
4020 			fc->high_water = 0x2800;
4021 			fc->low_water = fc->high_water - 8;
4022 			break;
4023 		}
4024 		/* fall-through */
4025 	default:
4026 		hwm = min(((pba << 10) * 9 / 10),
4027 			  ((pba << 10) - adapter->max_frame_size));
4028 
4029 		fc->high_water = hwm & E1000_FCRTH_RTH;	/* 8-byte granularity */
4030 		fc->low_water = fc->high_water - 8;
4031 		break;
4032 	case e1000_pchlan:
4033 		/* Workaround PCH LOM adapter hangs with certain network
4034 		 * loads.  If hangs persist, try disabling Tx flow control.
4035 		 */
4036 		if (adapter->netdev->mtu > ETH_DATA_LEN) {
4037 			fc->high_water = 0x3500;
4038 			fc->low_water = 0x1500;
4039 		} else {
4040 			fc->high_water = 0x5000;
4041 			fc->low_water = 0x3000;
4042 		}
4043 		fc->refresh_time = 0x1000;
4044 		break;
4045 	case e1000_pch2lan:
4046 	case e1000_pch_lpt:
4047 	case e1000_pch_spt:
4048 	case e1000_pch_cnp:
4049 		fc->refresh_time = 0x0400;
4050 
4051 		if (adapter->netdev->mtu <= ETH_DATA_LEN) {
4052 			fc->high_water = 0x05C20;
4053 			fc->low_water = 0x05048;
4054 			fc->pause_time = 0x0650;
4055 			break;
4056 		}
4057 
4058 		pba = 14;
4059 		ew32(PBA, pba);
4060 		fc->high_water = ((pba << 10) * 9 / 10) & E1000_FCRTH_RTH;
4061 		fc->low_water = ((pba << 10) * 8 / 10) & E1000_FCRTL_RTL;
4062 		break;
4063 	}
4064 
4065 	/* Alignment of Tx data is on an arbitrary byte boundary with the
4066 	 * maximum size per Tx descriptor limited only to the transmit
4067 	 * allocation of the packet buffer minus 96 bytes with an upper
4068 	 * limit of 24KB due to receive synchronization limitations.
4069 	 */
4070 	adapter->tx_fifo_limit = min_t(u32, ((er32(PBA) >> 16) << 10) - 96,
4071 				       24 << 10);
4072 
4073 	/* Disable Adaptive Interrupt Moderation if 2 full packets cannot
4074 	 * fit in receive buffer.
4075 	 */
4076 	if (adapter->itr_setting & 0x3) {
4077 		if ((adapter->max_frame_size * 2) > (pba << 10)) {
4078 			if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
4079 				dev_info(&adapter->pdev->dev,
4080 					 "Interrupt Throttle Rate off\n");
4081 				adapter->flags2 |= FLAG2_DISABLE_AIM;
4082 				e1000e_write_itr(adapter, 0);
4083 			}
4084 		} else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
4085 			dev_info(&adapter->pdev->dev,
4086 				 "Interrupt Throttle Rate on\n");
4087 			adapter->flags2 &= ~FLAG2_DISABLE_AIM;
4088 			adapter->itr = 20000;
4089 			e1000e_write_itr(adapter, adapter->itr);
4090 		}
4091 	}
4092 
4093 	if (hw->mac.type >= e1000_pch_spt)
4094 		e1000_flush_desc_rings(adapter);
4095 	/* Allow time for pending master requests to run */
4096 	mac->ops.reset_hw(hw);
4097 
4098 	/* For parts with AMT enabled, let the firmware know
4099 	 * that the network interface is in control
4100 	 */
4101 	if (adapter->flags & FLAG_HAS_AMT)
4102 		e1000e_get_hw_control(adapter);
4103 
4104 	ew32(WUC, 0);
4105 
4106 	if (mac->ops.init_hw(hw))
4107 		e_err("Hardware Error\n");
4108 
4109 	e1000_update_mng_vlan(adapter);
4110 
4111 	/* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
4112 	ew32(VET, ETH_P_8021Q);
4113 
4114 	e1000e_reset_adaptive(hw);
4115 
4116 	/* restore systim and hwtstamp settings */
4117 	e1000e_systim_reset(adapter);
4118 
4119 	/* Set EEE advertisement as appropriate */
4120 	if (adapter->flags2 & FLAG2_HAS_EEE) {
4121 		s32 ret_val;
4122 		u16 adv_addr;
4123 
4124 		switch (hw->phy.type) {
4125 		case e1000_phy_82579:
4126 			adv_addr = I82579_EEE_ADVERTISEMENT;
4127 			break;
4128 		case e1000_phy_i217:
4129 			adv_addr = I217_EEE_ADVERTISEMENT;
4130 			break;
4131 		default:
4132 			dev_err(&adapter->pdev->dev,
4133 				"Invalid PHY type setting EEE advertisement\n");
4134 			return;
4135 		}
4136 
4137 		ret_val = hw->phy.ops.acquire(hw);
4138 		if (ret_val) {
4139 			dev_err(&adapter->pdev->dev,
4140 				"EEE advertisement - unable to acquire PHY\n");
4141 			return;
4142 		}
4143 
4144 		e1000_write_emi_reg_locked(hw, adv_addr,
4145 					   hw->dev_spec.ich8lan.eee_disable ?
4146 					   0 : adapter->eee_advert);
4147 
4148 		hw->phy.ops.release(hw);
4149 	}
4150 
4151 	if (!netif_running(adapter->netdev) &&
4152 	    !test_bit(__E1000_TESTING, &adapter->state))
4153 		e1000_power_down_phy(adapter);
4154 
4155 	e1000_get_phy_info(hw);
4156 
4157 	if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
4158 	    !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
4159 		u16 phy_data = 0;
4160 		/* speed up time to link by disabling smart power down, ignore
4161 		 * the return value of this function because there is nothing
4162 		 * different we would do if it failed
4163 		 */
4164 		e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
4165 		phy_data &= ~IGP02E1000_PM_SPD;
4166 		e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
4167 	}
4168 	if (hw->mac.type >= e1000_pch_spt && adapter->int_mode == 0) {
4169 		u32 reg;
4170 
4171 		/* Fextnvm7 @ 0xe4[2] = 1 */
4172 		reg = er32(FEXTNVM7);
4173 		reg |= E1000_FEXTNVM7_SIDE_CLK_UNGATE;
4174 		ew32(FEXTNVM7, reg);
4175 		/* Fextnvm9 @ 0x5bb4[13:12] = 11 */
4176 		reg = er32(FEXTNVM9);
4177 		reg |= E1000_FEXTNVM9_IOSFSB_CLKGATE_DIS |
4178 		       E1000_FEXTNVM9_IOSFSB_CLKREQ_DIS;
4179 		ew32(FEXTNVM9, reg);
4180 	}
4181 
4182 }
4183 
4184 /**
4185  * e1000e_trigger_lsc - trigger an LSC interrupt
4186  * @adapter:
4187  *
4188  * Fire a link status change interrupt to start the watchdog.
4189  **/
4190 static void e1000e_trigger_lsc(struct e1000_adapter *adapter)
4191 {
4192 	struct e1000_hw *hw = &adapter->hw;
4193 
4194 	if (adapter->msix_entries)
4195 		ew32(ICS, E1000_ICS_LSC | E1000_ICS_OTHER);
4196 	else
4197 		ew32(ICS, E1000_ICS_LSC);
4198 }
4199 
4200 void e1000e_up(struct e1000_adapter *adapter)
4201 {
4202 	/* hardware has been reset, we need to reload some things */
4203 	e1000_configure(adapter);
4204 
4205 	clear_bit(__E1000_DOWN, &adapter->state);
4206 
4207 	if (adapter->msix_entries)
4208 		e1000_configure_msix(adapter);
4209 	e1000_irq_enable(adapter);
4210 
4211 	netif_start_queue(adapter->netdev);
4212 
4213 	e1000e_trigger_lsc(adapter);
4214 }
4215 
4216 static void e1000e_flush_descriptors(struct e1000_adapter *adapter)
4217 {
4218 	struct e1000_hw *hw = &adapter->hw;
4219 
4220 	if (!(adapter->flags2 & FLAG2_DMA_BURST))
4221 		return;
4222 
4223 	/* flush pending descriptor writebacks to memory */
4224 	ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4225 	ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4226 
4227 	/* execute the writes immediately */
4228 	e1e_flush();
4229 
4230 	/* due to rare timing issues, write to TIDV/RDTR again to ensure the
4231 	 * write is successful
4232 	 */
4233 	ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4234 	ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4235 
4236 	/* execute the writes immediately */
4237 	e1e_flush();
4238 }
4239 
4240 static void e1000e_update_stats(struct e1000_adapter *adapter);
4241 
4242 /**
4243  * e1000e_down - quiesce the device and optionally reset the hardware
4244  * @adapter: board private structure
4245  * @reset: boolean flag to reset the hardware or not
4246  */
4247 void e1000e_down(struct e1000_adapter *adapter, bool reset)
4248 {
4249 	struct net_device *netdev = adapter->netdev;
4250 	struct e1000_hw *hw = &adapter->hw;
4251 	u32 tctl, rctl;
4252 
4253 	/* signal that we're down so the interrupt handler does not
4254 	 * reschedule our watchdog timer
4255 	 */
4256 	set_bit(__E1000_DOWN, &adapter->state);
4257 
4258 	netif_carrier_off(netdev);
4259 
4260 	/* disable receives in the hardware */
4261 	rctl = er32(RCTL);
4262 	if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
4263 		ew32(RCTL, rctl & ~E1000_RCTL_EN);
4264 	/* flush and sleep below */
4265 
4266 	netif_stop_queue(netdev);
4267 
4268 	/* disable transmits in the hardware */
4269 	tctl = er32(TCTL);
4270 	tctl &= ~E1000_TCTL_EN;
4271 	ew32(TCTL, tctl);
4272 
4273 	/* flush both disables and wait for them to finish */
4274 	e1e_flush();
4275 	usleep_range(10000, 20000);
4276 
4277 	e1000_irq_disable(adapter);
4278 
4279 	napi_synchronize(&adapter->napi);
4280 
4281 	del_timer_sync(&adapter->watchdog_timer);
4282 	del_timer_sync(&adapter->phy_info_timer);
4283 
4284 	spin_lock(&adapter->stats64_lock);
4285 	e1000e_update_stats(adapter);
4286 	spin_unlock(&adapter->stats64_lock);
4287 
4288 	e1000e_flush_descriptors(adapter);
4289 
4290 	adapter->link_speed = 0;
4291 	adapter->link_duplex = 0;
4292 
4293 	/* Disable Si errata workaround on PCHx for jumbo frame flow */
4294 	if ((hw->mac.type >= e1000_pch2lan) &&
4295 	    (adapter->netdev->mtu > ETH_DATA_LEN) &&
4296 	    e1000_lv_jumbo_workaround_ich8lan(hw, false))
4297 		e_dbg("failed to disable jumbo frame workaround mode\n");
4298 
4299 	if (!pci_channel_offline(adapter->pdev)) {
4300 		if (reset)
4301 			e1000e_reset(adapter);
4302 		else if (hw->mac.type >= e1000_pch_spt)
4303 			e1000_flush_desc_rings(adapter);
4304 	}
4305 	e1000_clean_tx_ring(adapter->tx_ring);
4306 	e1000_clean_rx_ring(adapter->rx_ring);
4307 }
4308 
4309 void e1000e_reinit_locked(struct e1000_adapter *adapter)
4310 {
4311 	might_sleep();
4312 	while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4313 		usleep_range(1000, 2000);
4314 	e1000e_down(adapter, true);
4315 	e1000e_up(adapter);
4316 	clear_bit(__E1000_RESETTING, &adapter->state);
4317 }
4318 
4319 /**
4320  * e1000e_sanitize_systim - sanitize raw cycle counter reads
4321  * @hw: pointer to the HW structure
4322  * @systim: time value read, sanitized and returned
4323  *
4324  * Errata for 82574/82583 possible bad bits read from SYSTIMH/L:
4325  * check to see that the time is incrementing at a reasonable
4326  * rate and is a multiple of incvalue.
4327  **/
4328 static u64 e1000e_sanitize_systim(struct e1000_hw *hw, u64 systim)
4329 {
4330 	u64 time_delta, rem, temp;
4331 	u64 systim_next;
4332 	u32 incvalue;
4333 	int i;
4334 
4335 	incvalue = er32(TIMINCA) & E1000_TIMINCA_INCVALUE_MASK;
4336 	for (i = 0; i < E1000_MAX_82574_SYSTIM_REREADS; i++) {
4337 		/* latch SYSTIMH on read of SYSTIML */
4338 		systim_next = (u64)er32(SYSTIML);
4339 		systim_next |= (u64)er32(SYSTIMH) << 32;
4340 
4341 		time_delta = systim_next - systim;
4342 		temp = time_delta;
4343 		/* VMWare users have seen incvalue of zero, don't div / 0 */
4344 		rem = incvalue ? do_div(temp, incvalue) : (time_delta != 0);
4345 
4346 		systim = systim_next;
4347 
4348 		if ((time_delta < E1000_82574_SYSTIM_EPSILON) && (rem == 0))
4349 			break;
4350 	}
4351 
4352 	return systim;
4353 }
4354 
4355 /**
4356  * e1000e_cyclecounter_read - read raw cycle counter (used by time counter)
4357  * @cc: cyclecounter structure
4358  **/
4359 static u64 e1000e_cyclecounter_read(const struct cyclecounter *cc)
4360 {
4361 	struct e1000_adapter *adapter = container_of(cc, struct e1000_adapter,
4362 						     cc);
4363 	struct e1000_hw *hw = &adapter->hw;
4364 	u32 systimel, systimeh;
4365 	u64 systim;
4366 	/* SYSTIMH latching upon SYSTIML read does not work well.
4367 	 * This means that if SYSTIML overflows after we read it but before
4368 	 * we read SYSTIMH, the value of SYSTIMH has been incremented and we
4369 	 * will experience a huge non linear increment in the systime value
4370 	 * to fix that we test for overflow and if true, we re-read systime.
4371 	 */
4372 	systimel = er32(SYSTIML);
4373 	systimeh = er32(SYSTIMH);
4374 	/* Is systimel is so large that overflow is possible? */
4375 	if (systimel >= (u32)0xffffffff - E1000_TIMINCA_INCVALUE_MASK) {
4376 		u32 systimel_2 = er32(SYSTIML);
4377 		if (systimel > systimel_2) {
4378 			/* There was an overflow, read again SYSTIMH, and use
4379 			 * systimel_2
4380 			 */
4381 			systimeh = er32(SYSTIMH);
4382 			systimel = systimel_2;
4383 		}
4384 	}
4385 	systim = (u64)systimel;
4386 	systim |= (u64)systimeh << 32;
4387 
4388 	if (adapter->flags2 & FLAG2_CHECK_SYSTIM_OVERFLOW)
4389 		systim = e1000e_sanitize_systim(hw, systim);
4390 
4391 	return systim;
4392 }
4393 
4394 /**
4395  * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
4396  * @adapter: board private structure to initialize
4397  *
4398  * e1000_sw_init initializes the Adapter private data structure.
4399  * Fields are initialized based on PCI device information and
4400  * OS network device settings (MTU size).
4401  **/
4402 static int e1000_sw_init(struct e1000_adapter *adapter)
4403 {
4404 	struct net_device *netdev = adapter->netdev;
4405 
4406 	adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
4407 	adapter->rx_ps_bsize0 = 128;
4408 	adapter->max_frame_size = netdev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
4409 	adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
4410 	adapter->tx_ring_count = E1000_DEFAULT_TXD;
4411 	adapter->rx_ring_count = E1000_DEFAULT_RXD;
4412 
4413 	spin_lock_init(&adapter->stats64_lock);
4414 
4415 	e1000e_set_interrupt_capability(adapter);
4416 
4417 	if (e1000_alloc_queues(adapter))
4418 		return -ENOMEM;
4419 
4420 	/* Setup hardware time stamping cyclecounter */
4421 	if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
4422 		adapter->cc.read = e1000e_cyclecounter_read;
4423 		adapter->cc.mask = CYCLECOUNTER_MASK(64);
4424 		adapter->cc.mult = 1;
4425 		/* cc.shift set in e1000e_get_base_tininca() */
4426 
4427 		spin_lock_init(&adapter->systim_lock);
4428 		INIT_WORK(&adapter->tx_hwtstamp_work, e1000e_tx_hwtstamp_work);
4429 	}
4430 
4431 	/* Explicitly disable IRQ since the NIC can be in any state. */
4432 	e1000_irq_disable(adapter);
4433 
4434 	set_bit(__E1000_DOWN, &adapter->state);
4435 	return 0;
4436 }
4437 
4438 /**
4439  * e1000_intr_msi_test - Interrupt Handler
4440  * @irq: interrupt number
4441  * @data: pointer to a network interface device structure
4442  **/
4443 static irqreturn_t e1000_intr_msi_test(int __always_unused irq, void *data)
4444 {
4445 	struct net_device *netdev = data;
4446 	struct e1000_adapter *adapter = netdev_priv(netdev);
4447 	struct e1000_hw *hw = &adapter->hw;
4448 	u32 icr = er32(ICR);
4449 
4450 	e_dbg("icr is %08X\n", icr);
4451 	if (icr & E1000_ICR_RXSEQ) {
4452 		adapter->flags &= ~FLAG_MSI_TEST_FAILED;
4453 		/* Force memory writes to complete before acknowledging the
4454 		 * interrupt is handled.
4455 		 */
4456 		wmb();
4457 	}
4458 
4459 	return IRQ_HANDLED;
4460 }
4461 
4462 /**
4463  * e1000_test_msi_interrupt - Returns 0 for successful test
4464  * @adapter: board private struct
4465  *
4466  * code flow taken from tg3.c
4467  **/
4468 static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
4469 {
4470 	struct net_device *netdev = adapter->netdev;
4471 	struct e1000_hw *hw = &adapter->hw;
4472 	int err;
4473 
4474 	/* poll_enable hasn't been called yet, so don't need disable */
4475 	/* clear any pending events */
4476 	er32(ICR);
4477 
4478 	/* free the real vector and request a test handler */
4479 	e1000_free_irq(adapter);
4480 	e1000e_reset_interrupt_capability(adapter);
4481 
4482 	/* Assume that the test fails, if it succeeds then the test
4483 	 * MSI irq handler will unset this flag
4484 	 */
4485 	adapter->flags |= FLAG_MSI_TEST_FAILED;
4486 
4487 	err = pci_enable_msi(adapter->pdev);
4488 	if (err)
4489 		goto msi_test_failed;
4490 
4491 	err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
4492 			  netdev->name, netdev);
4493 	if (err) {
4494 		pci_disable_msi(adapter->pdev);
4495 		goto msi_test_failed;
4496 	}
4497 
4498 	/* Force memory writes to complete before enabling and firing an
4499 	 * interrupt.
4500 	 */
4501 	wmb();
4502 
4503 	e1000_irq_enable(adapter);
4504 
4505 	/* fire an unusual interrupt on the test handler */
4506 	ew32(ICS, E1000_ICS_RXSEQ);
4507 	e1e_flush();
4508 	msleep(100);
4509 
4510 	e1000_irq_disable(adapter);
4511 
4512 	rmb();			/* read flags after interrupt has been fired */
4513 
4514 	if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4515 		adapter->int_mode = E1000E_INT_MODE_LEGACY;
4516 		e_info("MSI interrupt test failed, using legacy interrupt.\n");
4517 	} else {
4518 		e_dbg("MSI interrupt test succeeded!\n");
4519 	}
4520 
4521 	free_irq(adapter->pdev->irq, netdev);
4522 	pci_disable_msi(adapter->pdev);
4523 
4524 msi_test_failed:
4525 	e1000e_set_interrupt_capability(adapter);
4526 	return e1000_request_irq(adapter);
4527 }
4528 
4529 /**
4530  * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
4531  * @adapter: board private struct
4532  *
4533  * code flow taken from tg3.c, called with e1000 interrupts disabled.
4534  **/
4535 static int e1000_test_msi(struct e1000_adapter *adapter)
4536 {
4537 	int err;
4538 	u16 pci_cmd;
4539 
4540 	if (!(adapter->flags & FLAG_MSI_ENABLED))
4541 		return 0;
4542 
4543 	/* disable SERR in case the MSI write causes a master abort */
4544 	pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4545 	if (pci_cmd & PCI_COMMAND_SERR)
4546 		pci_write_config_word(adapter->pdev, PCI_COMMAND,
4547 				      pci_cmd & ~PCI_COMMAND_SERR);
4548 
4549 	err = e1000_test_msi_interrupt(adapter);
4550 
4551 	/* re-enable SERR */
4552 	if (pci_cmd & PCI_COMMAND_SERR) {
4553 		pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4554 		pci_cmd |= PCI_COMMAND_SERR;
4555 		pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
4556 	}
4557 
4558 	return err;
4559 }
4560 
4561 /**
4562  * e1000e_open - Called when a network interface is made active
4563  * @netdev: network interface device structure
4564  *
4565  * Returns 0 on success, negative value on failure
4566  *
4567  * The open entry point is called when a network interface is made
4568  * active by the system (IFF_UP).  At this point all resources needed
4569  * for transmit and receive operations are allocated, the interrupt
4570  * handler is registered with the OS, the watchdog timer is started,
4571  * and the stack is notified that the interface is ready.
4572  **/
4573 int e1000e_open(struct net_device *netdev)
4574 {
4575 	struct e1000_adapter *adapter = netdev_priv(netdev);
4576 	struct e1000_hw *hw = &adapter->hw;
4577 	struct pci_dev *pdev = adapter->pdev;
4578 	int err;
4579 
4580 	/* disallow open during test */
4581 	if (test_bit(__E1000_TESTING, &adapter->state))
4582 		return -EBUSY;
4583 
4584 	pm_runtime_get_sync(&pdev->dev);
4585 
4586 	netif_carrier_off(netdev);
4587 
4588 	/* allocate transmit descriptors */
4589 	err = e1000e_setup_tx_resources(adapter->tx_ring);
4590 	if (err)
4591 		goto err_setup_tx;
4592 
4593 	/* allocate receive descriptors */
4594 	err = e1000e_setup_rx_resources(adapter->rx_ring);
4595 	if (err)
4596 		goto err_setup_rx;
4597 
4598 	/* If AMT is enabled, let the firmware know that the network
4599 	 * interface is now open and reset the part to a known state.
4600 	 */
4601 	if (adapter->flags & FLAG_HAS_AMT) {
4602 		e1000e_get_hw_control(adapter);
4603 		e1000e_reset(adapter);
4604 	}
4605 
4606 	e1000e_power_up_phy(adapter);
4607 
4608 	adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4609 	if ((adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
4610 		e1000_update_mng_vlan(adapter);
4611 
4612 	/* DMA latency requirement to workaround jumbo issue */
4613 	pm_qos_add_request(&adapter->pm_qos_req, PM_QOS_CPU_DMA_LATENCY,
4614 			   PM_QOS_DEFAULT_VALUE);
4615 
4616 	/* before we allocate an interrupt, we must be ready to handle it.
4617 	 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
4618 	 * as soon as we call pci_request_irq, so we have to setup our
4619 	 * clean_rx handler before we do so.
4620 	 */
4621 	e1000_configure(adapter);
4622 
4623 	err = e1000_request_irq(adapter);
4624 	if (err)
4625 		goto err_req_irq;
4626 
4627 	/* Work around PCIe errata with MSI interrupts causing some chipsets to
4628 	 * ignore e1000e MSI messages, which means we need to test our MSI
4629 	 * interrupt now
4630 	 */
4631 	if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
4632 		err = e1000_test_msi(adapter);
4633 		if (err) {
4634 			e_err("Interrupt allocation failed\n");
4635 			goto err_req_irq;
4636 		}
4637 	}
4638 
4639 	/* From here on the code is the same as e1000e_up() */
4640 	clear_bit(__E1000_DOWN, &adapter->state);
4641 
4642 	napi_enable(&adapter->napi);
4643 
4644 	e1000_irq_enable(adapter);
4645 
4646 	adapter->tx_hang_recheck = false;
4647 	netif_start_queue(netdev);
4648 
4649 	hw->mac.get_link_status = true;
4650 	pm_runtime_put(&pdev->dev);
4651 
4652 	e1000e_trigger_lsc(adapter);
4653 
4654 	return 0;
4655 
4656 err_req_irq:
4657 	pm_qos_remove_request(&adapter->pm_qos_req);
4658 	e1000e_release_hw_control(adapter);
4659 	e1000_power_down_phy(adapter);
4660 	e1000e_free_rx_resources(adapter->rx_ring);
4661 err_setup_rx:
4662 	e1000e_free_tx_resources(adapter->tx_ring);
4663 err_setup_tx:
4664 	e1000e_reset(adapter);
4665 	pm_runtime_put_sync(&pdev->dev);
4666 
4667 	return err;
4668 }
4669 
4670 /**
4671  * e1000e_close - Disables a network interface
4672  * @netdev: network interface device structure
4673  *
4674  * Returns 0, this is not allowed to fail
4675  *
4676  * The close entry point is called when an interface is de-activated
4677  * by the OS.  The hardware is still under the drivers control, but
4678  * needs to be disabled.  A global MAC reset is issued to stop the
4679  * hardware, and all transmit and receive resources are freed.
4680  **/
4681 int e1000e_close(struct net_device *netdev)
4682 {
4683 	struct e1000_adapter *adapter = netdev_priv(netdev);
4684 	struct pci_dev *pdev = adapter->pdev;
4685 	int count = E1000_CHECK_RESET_COUNT;
4686 
4687 	while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
4688 		usleep_range(10000, 20000);
4689 
4690 	WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4691 
4692 	pm_runtime_get_sync(&pdev->dev);
4693 
4694 	if (!test_bit(__E1000_DOWN, &adapter->state)) {
4695 		e1000e_down(adapter, true);
4696 		e1000_free_irq(adapter);
4697 
4698 		/* Link status message must follow this format */
4699 		pr_info("%s NIC Link is Down\n", adapter->netdev->name);
4700 	}
4701 
4702 	napi_disable(&adapter->napi);
4703 
4704 	e1000e_free_tx_resources(adapter->tx_ring);
4705 	e1000e_free_rx_resources(adapter->rx_ring);
4706 
4707 	/* kill manageability vlan ID if supported, but not if a vlan with
4708 	 * the same ID is registered on the host OS (let 8021q kill it)
4709 	 */
4710 	if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN)
4711 		e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
4712 				       adapter->mng_vlan_id);
4713 
4714 	/* If AMT is enabled, let the firmware know that the network
4715 	 * interface is now closed
4716 	 */
4717 	if ((adapter->flags & FLAG_HAS_AMT) &&
4718 	    !test_bit(__E1000_TESTING, &adapter->state))
4719 		e1000e_release_hw_control(adapter);
4720 
4721 	pm_qos_remove_request(&adapter->pm_qos_req);
4722 
4723 	pm_runtime_put_sync(&pdev->dev);
4724 
4725 	return 0;
4726 }
4727 
4728 /**
4729  * e1000_set_mac - Change the Ethernet Address of the NIC
4730  * @netdev: network interface device structure
4731  * @p: pointer to an address structure
4732  *
4733  * Returns 0 on success, negative on failure
4734  **/
4735 static int e1000_set_mac(struct net_device *netdev, void *p)
4736 {
4737 	struct e1000_adapter *adapter = netdev_priv(netdev);
4738 	struct e1000_hw *hw = &adapter->hw;
4739 	struct sockaddr *addr = p;
4740 
4741 	if (!is_valid_ether_addr(addr->sa_data))
4742 		return -EADDRNOTAVAIL;
4743 
4744 	memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4745 	memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
4746 
4747 	hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
4748 
4749 	if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
4750 		/* activate the work around */
4751 		e1000e_set_laa_state_82571(&adapter->hw, 1);
4752 
4753 		/* Hold a copy of the LAA in RAR[14] This is done so that
4754 		 * between the time RAR[0] gets clobbered  and the time it
4755 		 * gets fixed (in e1000_watchdog), the actual LAA is in one
4756 		 * of the RARs and no incoming packets directed to this port
4757 		 * are dropped. Eventually the LAA will be in RAR[0] and
4758 		 * RAR[14]
4759 		 */
4760 		hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr,
4761 				    adapter->hw.mac.rar_entry_count - 1);
4762 	}
4763 
4764 	return 0;
4765 }
4766 
4767 /**
4768  * e1000e_update_phy_task - work thread to update phy
4769  * @work: pointer to our work struct
4770  *
4771  * this worker thread exists because we must acquire a
4772  * semaphore to read the phy, which we could msleep while
4773  * waiting for it, and we can't msleep in a timer.
4774  **/
4775 static void e1000e_update_phy_task(struct work_struct *work)
4776 {
4777 	struct e1000_adapter *adapter = container_of(work,
4778 						     struct e1000_adapter,
4779 						     update_phy_task);
4780 	struct e1000_hw *hw = &adapter->hw;
4781 
4782 	if (test_bit(__E1000_DOWN, &adapter->state))
4783 		return;
4784 
4785 	e1000_get_phy_info(hw);
4786 
4787 	/* Enable EEE on 82579 after link up */
4788 	if (hw->phy.type >= e1000_phy_82579)
4789 		e1000_set_eee_pchlan(hw);
4790 }
4791 
4792 /**
4793  * e1000_update_phy_info - timre call-back to update PHY info
4794  * @data: pointer to adapter cast into an unsigned long
4795  *
4796  * Need to wait a few seconds after link up to get diagnostic information from
4797  * the phy
4798  **/
4799 static void e1000_update_phy_info(struct timer_list *t)
4800 {
4801 	struct e1000_adapter *adapter = from_timer(adapter, t, phy_info_timer);
4802 
4803 	if (test_bit(__E1000_DOWN, &adapter->state))
4804 		return;
4805 
4806 	schedule_work(&adapter->update_phy_task);
4807 }
4808 
4809 /**
4810  * e1000e_update_phy_stats - Update the PHY statistics counters
4811  * @adapter: board private structure
4812  *
4813  * Read/clear the upper 16-bit PHY registers and read/accumulate lower
4814  **/
4815 static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
4816 {
4817 	struct e1000_hw *hw = &adapter->hw;
4818 	s32 ret_val;
4819 	u16 phy_data;
4820 
4821 	ret_val = hw->phy.ops.acquire(hw);
4822 	if (ret_val)
4823 		return;
4824 
4825 	/* A page set is expensive so check if already on desired page.
4826 	 * If not, set to the page with the PHY status registers.
4827 	 */
4828 	hw->phy.addr = 1;
4829 	ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4830 					   &phy_data);
4831 	if (ret_val)
4832 		goto release;
4833 	if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) {
4834 		ret_val = hw->phy.ops.set_page(hw,
4835 					       HV_STATS_PAGE << IGP_PAGE_SHIFT);
4836 		if (ret_val)
4837 			goto release;
4838 	}
4839 
4840 	/* Single Collision Count */
4841 	hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);
4842 	ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);
4843 	if (!ret_val)
4844 		adapter->stats.scc += phy_data;
4845 
4846 	/* Excessive Collision Count */
4847 	hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);
4848 	ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);
4849 	if (!ret_val)
4850 		adapter->stats.ecol += phy_data;
4851 
4852 	/* Multiple Collision Count */
4853 	hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);
4854 	ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);
4855 	if (!ret_val)
4856 		adapter->stats.mcc += phy_data;
4857 
4858 	/* Late Collision Count */
4859 	hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);
4860 	ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);
4861 	if (!ret_val)
4862 		adapter->stats.latecol += phy_data;
4863 
4864 	/* Collision Count - also used for adaptive IFS */
4865 	hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);
4866 	ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);
4867 	if (!ret_val)
4868 		hw->mac.collision_delta = phy_data;
4869 
4870 	/* Defer Count */
4871 	hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);
4872 	ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);
4873 	if (!ret_val)
4874 		adapter->stats.dc += phy_data;
4875 
4876 	/* Transmit with no CRS */
4877 	hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);
4878 	ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);
4879 	if (!ret_val)
4880 		adapter->stats.tncrs += phy_data;
4881 
4882 release:
4883 	hw->phy.ops.release(hw);
4884 }
4885 
4886 /**
4887  * e1000e_update_stats - Update the board statistics counters
4888  * @adapter: board private structure
4889  **/
4890 static void e1000e_update_stats(struct e1000_adapter *adapter)
4891 {
4892 	struct net_device *netdev = adapter->netdev;
4893 	struct e1000_hw *hw = &adapter->hw;
4894 	struct pci_dev *pdev = adapter->pdev;
4895 
4896 	/* Prevent stats update while adapter is being reset, or if the pci
4897 	 * connection is down.
4898 	 */
4899 	if (adapter->link_speed == 0)
4900 		return;
4901 	if (pci_channel_offline(pdev))
4902 		return;
4903 
4904 	adapter->stats.crcerrs += er32(CRCERRS);
4905 	adapter->stats.gprc += er32(GPRC);
4906 	adapter->stats.gorc += er32(GORCL);
4907 	er32(GORCH);		/* Clear gorc */
4908 	adapter->stats.bprc += er32(BPRC);
4909 	adapter->stats.mprc += er32(MPRC);
4910 	adapter->stats.roc += er32(ROC);
4911 
4912 	adapter->stats.mpc += er32(MPC);
4913 
4914 	/* Half-duplex statistics */
4915 	if (adapter->link_duplex == HALF_DUPLEX) {
4916 		if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
4917 			e1000e_update_phy_stats(adapter);
4918 		} else {
4919 			adapter->stats.scc += er32(SCC);
4920 			adapter->stats.ecol += er32(ECOL);
4921 			adapter->stats.mcc += er32(MCC);
4922 			adapter->stats.latecol += er32(LATECOL);
4923 			adapter->stats.dc += er32(DC);
4924 
4925 			hw->mac.collision_delta = er32(COLC);
4926 
4927 			if ((hw->mac.type != e1000_82574) &&
4928 			    (hw->mac.type != e1000_82583))
4929 				adapter->stats.tncrs += er32(TNCRS);
4930 		}
4931 		adapter->stats.colc += hw->mac.collision_delta;
4932 	}
4933 
4934 	adapter->stats.xonrxc += er32(XONRXC);
4935 	adapter->stats.xontxc += er32(XONTXC);
4936 	adapter->stats.xoffrxc += er32(XOFFRXC);
4937 	adapter->stats.xofftxc += er32(XOFFTXC);
4938 	adapter->stats.gptc += er32(GPTC);
4939 	adapter->stats.gotc += er32(GOTCL);
4940 	er32(GOTCH);		/* Clear gotc */
4941 	adapter->stats.rnbc += er32(RNBC);
4942 	adapter->stats.ruc += er32(RUC);
4943 
4944 	adapter->stats.mptc += er32(MPTC);
4945 	adapter->stats.bptc += er32(BPTC);
4946 
4947 	/* used for adaptive IFS */
4948 
4949 	hw->mac.tx_packet_delta = er32(TPT);
4950 	adapter->stats.tpt += hw->mac.tx_packet_delta;
4951 
4952 	adapter->stats.algnerrc += er32(ALGNERRC);
4953 	adapter->stats.rxerrc += er32(RXERRC);
4954 	adapter->stats.cexterr += er32(CEXTERR);
4955 	adapter->stats.tsctc += er32(TSCTC);
4956 	adapter->stats.tsctfc += er32(TSCTFC);
4957 
4958 	/* Fill out the OS statistics structure */
4959 	netdev->stats.multicast = adapter->stats.mprc;
4960 	netdev->stats.collisions = adapter->stats.colc;
4961 
4962 	/* Rx Errors */
4963 
4964 	/* RLEC on some newer hardware can be incorrect so build
4965 	 * our own version based on RUC and ROC
4966 	 */
4967 	netdev->stats.rx_errors = adapter->stats.rxerrc +
4968 	    adapter->stats.crcerrs + adapter->stats.algnerrc +
4969 	    adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
4970 	netdev->stats.rx_length_errors = adapter->stats.ruc +
4971 	    adapter->stats.roc;
4972 	netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
4973 	netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
4974 	netdev->stats.rx_missed_errors = adapter->stats.mpc;
4975 
4976 	/* Tx Errors */
4977 	netdev->stats.tx_errors = adapter->stats.ecol + adapter->stats.latecol;
4978 	netdev->stats.tx_aborted_errors = adapter->stats.ecol;
4979 	netdev->stats.tx_window_errors = adapter->stats.latecol;
4980 	netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
4981 
4982 	/* Tx Dropped needs to be maintained elsewhere */
4983 
4984 	/* Management Stats */
4985 	adapter->stats.mgptc += er32(MGTPTC);
4986 	adapter->stats.mgprc += er32(MGTPRC);
4987 	adapter->stats.mgpdc += er32(MGTPDC);
4988 
4989 	/* Correctable ECC Errors */
4990 	if (hw->mac.type >= e1000_pch_lpt) {
4991 		u32 pbeccsts = er32(PBECCSTS);
4992 
4993 		adapter->corr_errors +=
4994 		    pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
4995 		adapter->uncorr_errors +=
4996 		    (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
4997 		    E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
4998 	}
4999 }
5000 
5001 /**
5002  * e1000_phy_read_status - Update the PHY register status snapshot
5003  * @adapter: board private structure
5004  **/
5005 static void e1000_phy_read_status(struct e1000_adapter *adapter)
5006 {
5007 	struct e1000_hw *hw = &adapter->hw;
5008 	struct e1000_phy_regs *phy = &adapter->phy_regs;
5009 
5010 	if (!pm_runtime_suspended((&adapter->pdev->dev)->parent) &&
5011 	    (er32(STATUS) & E1000_STATUS_LU) &&
5012 	    (adapter->hw.phy.media_type == e1000_media_type_copper)) {
5013 		int ret_val;
5014 
5015 		ret_val = e1e_rphy(hw, MII_BMCR, &phy->bmcr);
5016 		ret_val |= e1e_rphy(hw, MII_BMSR, &phy->bmsr);
5017 		ret_val |= e1e_rphy(hw, MII_ADVERTISE, &phy->advertise);
5018 		ret_val |= e1e_rphy(hw, MII_LPA, &phy->lpa);
5019 		ret_val |= e1e_rphy(hw, MII_EXPANSION, &phy->expansion);
5020 		ret_val |= e1e_rphy(hw, MII_CTRL1000, &phy->ctrl1000);
5021 		ret_val |= e1e_rphy(hw, MII_STAT1000, &phy->stat1000);
5022 		ret_val |= e1e_rphy(hw, MII_ESTATUS, &phy->estatus);
5023 		if (ret_val)
5024 			e_warn("Error reading PHY register\n");
5025 	} else {
5026 		/* Do not read PHY registers if link is not up
5027 		 * Set values to typical power-on defaults
5028 		 */
5029 		phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
5030 		phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
5031 			     BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
5032 			     BMSR_ERCAP);
5033 		phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
5034 				  ADVERTISE_ALL | ADVERTISE_CSMA);
5035 		phy->lpa = 0;
5036 		phy->expansion = EXPANSION_ENABLENPAGE;
5037 		phy->ctrl1000 = ADVERTISE_1000FULL;
5038 		phy->stat1000 = 0;
5039 		phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
5040 	}
5041 }
5042 
5043 static void e1000_print_link_info(struct e1000_adapter *adapter)
5044 {
5045 	struct e1000_hw *hw = &adapter->hw;
5046 	u32 ctrl = er32(CTRL);
5047 
5048 	/* Link status message must follow this format for user tools */
5049 	pr_info("%s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
5050 		adapter->netdev->name, adapter->link_speed,
5051 		adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half",
5052 		(ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" :
5053 		(ctrl & E1000_CTRL_RFCE) ? "Rx" :
5054 		(ctrl & E1000_CTRL_TFCE) ? "Tx" : "None");
5055 }
5056 
5057 static bool e1000e_has_link(struct e1000_adapter *adapter)
5058 {
5059 	struct e1000_hw *hw = &adapter->hw;
5060 	bool link_active = false;
5061 	s32 ret_val = 0;
5062 
5063 	/* get_link_status is set on LSC (link status) interrupt or
5064 	 * Rx sequence error interrupt.  get_link_status will stay
5065 	 * true until the check_for_link establishes link
5066 	 * for copper adapters ONLY
5067 	 */
5068 	switch (hw->phy.media_type) {
5069 	case e1000_media_type_copper:
5070 		if (hw->mac.get_link_status) {
5071 			ret_val = hw->mac.ops.check_for_link(hw);
5072 			link_active = !hw->mac.get_link_status;
5073 		} else {
5074 			link_active = true;
5075 		}
5076 		break;
5077 	case e1000_media_type_fiber:
5078 		ret_val = hw->mac.ops.check_for_link(hw);
5079 		link_active = !!(er32(STATUS) & E1000_STATUS_LU);
5080 		break;
5081 	case e1000_media_type_internal_serdes:
5082 		ret_val = hw->mac.ops.check_for_link(hw);
5083 		link_active = hw->mac.serdes_has_link;
5084 		break;
5085 	default:
5086 	case e1000_media_type_unknown:
5087 		break;
5088 	}
5089 
5090 	if ((ret_val == -E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
5091 	    (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
5092 		/* See e1000_kmrn_lock_loss_workaround_ich8lan() */
5093 		e_info("Gigabit has been disabled, downgrading speed\n");
5094 	}
5095 
5096 	return link_active;
5097 }
5098 
5099 static void e1000e_enable_receives(struct e1000_adapter *adapter)
5100 {
5101 	/* make sure the receive unit is started */
5102 	if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
5103 	    (adapter->flags & FLAG_RESTART_NOW)) {
5104 		struct e1000_hw *hw = &adapter->hw;
5105 		u32 rctl = er32(RCTL);
5106 
5107 		ew32(RCTL, rctl | E1000_RCTL_EN);
5108 		adapter->flags &= ~FLAG_RESTART_NOW;
5109 	}
5110 }
5111 
5112 static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
5113 {
5114 	struct e1000_hw *hw = &adapter->hw;
5115 
5116 	/* With 82574 controllers, PHY needs to be checked periodically
5117 	 * for hung state and reset, if two calls return true
5118 	 */
5119 	if (e1000_check_phy_82574(hw))
5120 		adapter->phy_hang_count++;
5121 	else
5122 		adapter->phy_hang_count = 0;
5123 
5124 	if (adapter->phy_hang_count > 1) {
5125 		adapter->phy_hang_count = 0;
5126 		e_dbg("PHY appears hung - resetting\n");
5127 		schedule_work(&adapter->reset_task);
5128 	}
5129 }
5130 
5131 /**
5132  * e1000_watchdog - Timer Call-back
5133  * @data: pointer to adapter cast into an unsigned long
5134  **/
5135 static void e1000_watchdog(struct timer_list *t)
5136 {
5137 	struct e1000_adapter *adapter = from_timer(adapter, t, watchdog_timer);
5138 
5139 	/* Do the rest outside of interrupt context */
5140 	schedule_work(&adapter->watchdog_task);
5141 
5142 	/* TODO: make this use queue_delayed_work() */
5143 }
5144 
5145 static void e1000_watchdog_task(struct work_struct *work)
5146 {
5147 	struct e1000_adapter *adapter = container_of(work,
5148 						     struct e1000_adapter,
5149 						     watchdog_task);
5150 	struct net_device *netdev = adapter->netdev;
5151 	struct e1000_mac_info *mac = &adapter->hw.mac;
5152 	struct e1000_phy_info *phy = &adapter->hw.phy;
5153 	struct e1000_ring *tx_ring = adapter->tx_ring;
5154 	struct e1000_hw *hw = &adapter->hw;
5155 	u32 link, tctl;
5156 
5157 	if (test_bit(__E1000_DOWN, &adapter->state))
5158 		return;
5159 
5160 	link = e1000e_has_link(adapter);
5161 	if ((netif_carrier_ok(netdev)) && link) {
5162 		/* Cancel scheduled suspend requests. */
5163 		pm_runtime_resume(netdev->dev.parent);
5164 
5165 		e1000e_enable_receives(adapter);
5166 		goto link_up;
5167 	}
5168 
5169 	if ((e1000e_enable_tx_pkt_filtering(hw)) &&
5170 	    (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
5171 		e1000_update_mng_vlan(adapter);
5172 
5173 	if (link) {
5174 		if (!netif_carrier_ok(netdev)) {
5175 			bool txb2b = true;
5176 
5177 			/* Cancel scheduled suspend requests. */
5178 			pm_runtime_resume(netdev->dev.parent);
5179 
5180 			/* update snapshot of PHY registers on LSC */
5181 			e1000_phy_read_status(adapter);
5182 			mac->ops.get_link_up_info(&adapter->hw,
5183 						  &adapter->link_speed,
5184 						  &adapter->link_duplex);
5185 			e1000_print_link_info(adapter);
5186 
5187 			/* check if SmartSpeed worked */
5188 			e1000e_check_downshift(hw);
5189 			if (phy->speed_downgraded)
5190 				netdev_warn(netdev,
5191 					    "Link Speed was downgraded by SmartSpeed\n");
5192 
5193 			/* On supported PHYs, check for duplex mismatch only
5194 			 * if link has autonegotiated at 10/100 half
5195 			 */
5196 			if ((hw->phy.type == e1000_phy_igp_3 ||
5197 			     hw->phy.type == e1000_phy_bm) &&
5198 			    hw->mac.autoneg &&
5199 			    (adapter->link_speed == SPEED_10 ||
5200 			     adapter->link_speed == SPEED_100) &&
5201 			    (adapter->link_duplex == HALF_DUPLEX)) {
5202 				u16 autoneg_exp;
5203 
5204 				e1e_rphy(hw, MII_EXPANSION, &autoneg_exp);
5205 
5206 				if (!(autoneg_exp & EXPANSION_NWAY))
5207 					e_info("Autonegotiated half duplex but link partner cannot autoneg.  Try forcing full duplex if link gets many collisions.\n");
5208 			}
5209 
5210 			/* adjust timeout factor according to speed/duplex */
5211 			adapter->tx_timeout_factor = 1;
5212 			switch (adapter->link_speed) {
5213 			case SPEED_10:
5214 				txb2b = false;
5215 				adapter->tx_timeout_factor = 16;
5216 				break;
5217 			case SPEED_100:
5218 				txb2b = false;
5219 				adapter->tx_timeout_factor = 10;
5220 				break;
5221 			}
5222 
5223 			/* workaround: re-program speed mode bit after
5224 			 * link-up event
5225 			 */
5226 			if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
5227 			    !txb2b) {
5228 				u32 tarc0;
5229 
5230 				tarc0 = er32(TARC(0));
5231 				tarc0 &= ~SPEED_MODE_BIT;
5232 				ew32(TARC(0), tarc0);
5233 			}
5234 
5235 			/* disable TSO for pcie and 10/100 speeds, to avoid
5236 			 * some hardware issues
5237 			 */
5238 			if (!(adapter->flags & FLAG_TSO_FORCE)) {
5239 				switch (adapter->link_speed) {
5240 				case SPEED_10:
5241 				case SPEED_100:
5242 					e_info("10/100 speed: disabling TSO\n");
5243 					netdev->features &= ~NETIF_F_TSO;
5244 					netdev->features &= ~NETIF_F_TSO6;
5245 					break;
5246 				case SPEED_1000:
5247 					netdev->features |= NETIF_F_TSO;
5248 					netdev->features |= NETIF_F_TSO6;
5249 					break;
5250 				default:
5251 					/* oops */
5252 					break;
5253 				}
5254 			}
5255 
5256 			/* enable transmits in the hardware, need to do this
5257 			 * after setting TARC(0)
5258 			 */
5259 			tctl = er32(TCTL);
5260 			tctl |= E1000_TCTL_EN;
5261 			ew32(TCTL, tctl);
5262 
5263 			/* Perform any post-link-up configuration before
5264 			 * reporting link up.
5265 			 */
5266 			if (phy->ops.cfg_on_link_up)
5267 				phy->ops.cfg_on_link_up(hw);
5268 
5269 			netif_carrier_on(netdev);
5270 
5271 			if (!test_bit(__E1000_DOWN, &adapter->state))
5272 				mod_timer(&adapter->phy_info_timer,
5273 					  round_jiffies(jiffies + 2 * HZ));
5274 		}
5275 	} else {
5276 		if (netif_carrier_ok(netdev)) {
5277 			adapter->link_speed = 0;
5278 			adapter->link_duplex = 0;
5279 			/* Link status message must follow this format */
5280 			pr_info("%s NIC Link is Down\n", adapter->netdev->name);
5281 			netif_carrier_off(netdev);
5282 			if (!test_bit(__E1000_DOWN, &adapter->state))
5283 				mod_timer(&adapter->phy_info_timer,
5284 					  round_jiffies(jiffies + 2 * HZ));
5285 
5286 			/* 8000ES2LAN requires a Rx packet buffer work-around
5287 			 * on link down event; reset the controller to flush
5288 			 * the Rx packet buffer.
5289 			 */
5290 			if (adapter->flags & FLAG_RX_NEEDS_RESTART)
5291 				adapter->flags |= FLAG_RESTART_NOW;
5292 			else
5293 				pm_schedule_suspend(netdev->dev.parent,
5294 						    LINK_TIMEOUT);
5295 		}
5296 	}
5297 
5298 link_up:
5299 	spin_lock(&adapter->stats64_lock);
5300 	e1000e_update_stats(adapter);
5301 
5302 	mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
5303 	adapter->tpt_old = adapter->stats.tpt;
5304 	mac->collision_delta = adapter->stats.colc - adapter->colc_old;
5305 	adapter->colc_old = adapter->stats.colc;
5306 
5307 	adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
5308 	adapter->gorc_old = adapter->stats.gorc;
5309 	adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
5310 	adapter->gotc_old = adapter->stats.gotc;
5311 	spin_unlock(&adapter->stats64_lock);
5312 
5313 	/* If the link is lost the controller stops DMA, but
5314 	 * if there is queued Tx work it cannot be done.  So
5315 	 * reset the controller to flush the Tx packet buffers.
5316 	 */
5317 	if (!netif_carrier_ok(netdev) &&
5318 	    (e1000_desc_unused(tx_ring) + 1 < tx_ring->count))
5319 		adapter->flags |= FLAG_RESTART_NOW;
5320 
5321 	/* If reset is necessary, do it outside of interrupt context. */
5322 	if (adapter->flags & FLAG_RESTART_NOW) {
5323 		schedule_work(&adapter->reset_task);
5324 		/* return immediately since reset is imminent */
5325 		return;
5326 	}
5327 
5328 	e1000e_update_adaptive(&adapter->hw);
5329 
5330 	/* Simple mode for Interrupt Throttle Rate (ITR) */
5331 	if (adapter->itr_setting == 4) {
5332 		/* Symmetric Tx/Rx gets a reduced ITR=2000;
5333 		 * Total asymmetrical Tx or Rx gets ITR=8000;
5334 		 * everyone else is between 2000-8000.
5335 		 */
5336 		u32 goc = (adapter->gotc + adapter->gorc) / 10000;
5337 		u32 dif = (adapter->gotc > adapter->gorc ?
5338 			   adapter->gotc - adapter->gorc :
5339 			   adapter->gorc - adapter->gotc) / 10000;
5340 		u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
5341 
5342 		e1000e_write_itr(adapter, itr);
5343 	}
5344 
5345 	/* Cause software interrupt to ensure Rx ring is cleaned */
5346 	if (adapter->msix_entries)
5347 		ew32(ICS, adapter->rx_ring->ims_val);
5348 	else
5349 		ew32(ICS, E1000_ICS_RXDMT0);
5350 
5351 	/* flush pending descriptors to memory before detecting Tx hang */
5352 	e1000e_flush_descriptors(adapter);
5353 
5354 	/* Force detection of hung controller every watchdog period */
5355 	adapter->detect_tx_hung = true;
5356 
5357 	/* With 82571 controllers, LAA may be overwritten due to controller
5358 	 * reset from the other port. Set the appropriate LAA in RAR[0]
5359 	 */
5360 	if (e1000e_get_laa_state_82571(hw))
5361 		hw->mac.ops.rar_set(hw, adapter->hw.mac.addr, 0);
5362 
5363 	if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
5364 		e1000e_check_82574_phy_workaround(adapter);
5365 
5366 	/* Clear valid timestamp stuck in RXSTMPL/H due to a Rx error */
5367 	if (adapter->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE) {
5368 		if ((adapter->flags2 & FLAG2_CHECK_RX_HWTSTAMP) &&
5369 		    (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID)) {
5370 			er32(RXSTMPH);
5371 			adapter->rx_hwtstamp_cleared++;
5372 		} else {
5373 			adapter->flags2 |= FLAG2_CHECK_RX_HWTSTAMP;
5374 		}
5375 	}
5376 
5377 	/* Reset the timer */
5378 	if (!test_bit(__E1000_DOWN, &adapter->state))
5379 		mod_timer(&adapter->watchdog_timer,
5380 			  round_jiffies(jiffies + 2 * HZ));
5381 }
5382 
5383 #define E1000_TX_FLAGS_CSUM		0x00000001
5384 #define E1000_TX_FLAGS_VLAN		0x00000002
5385 #define E1000_TX_FLAGS_TSO		0x00000004
5386 #define E1000_TX_FLAGS_IPV4		0x00000008
5387 #define E1000_TX_FLAGS_NO_FCS		0x00000010
5388 #define E1000_TX_FLAGS_HWTSTAMP		0x00000020
5389 #define E1000_TX_FLAGS_VLAN_MASK	0xffff0000
5390 #define E1000_TX_FLAGS_VLAN_SHIFT	16
5391 
5392 static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb,
5393 		     __be16 protocol)
5394 {
5395 	struct e1000_context_desc *context_desc;
5396 	struct e1000_buffer *buffer_info;
5397 	unsigned int i;
5398 	u32 cmd_length = 0;
5399 	u16 ipcse = 0, mss;
5400 	u8 ipcss, ipcso, tucss, tucso, hdr_len;
5401 	int err;
5402 
5403 	if (!skb_is_gso(skb))
5404 		return 0;
5405 
5406 	err = skb_cow_head(skb, 0);
5407 	if (err < 0)
5408 		return err;
5409 
5410 	hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5411 	mss = skb_shinfo(skb)->gso_size;
5412 	if (protocol == htons(ETH_P_IP)) {
5413 		struct iphdr *iph = ip_hdr(skb);
5414 		iph->tot_len = 0;
5415 		iph->check = 0;
5416 		tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
5417 							 0, IPPROTO_TCP, 0);
5418 		cmd_length = E1000_TXD_CMD_IP;
5419 		ipcse = skb_transport_offset(skb) - 1;
5420 	} else if (skb_is_gso_v6(skb)) {
5421 		ipv6_hdr(skb)->payload_len = 0;
5422 		tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5423 						       &ipv6_hdr(skb)->daddr,
5424 						       0, IPPROTO_TCP, 0);
5425 		ipcse = 0;
5426 	}
5427 	ipcss = skb_network_offset(skb);
5428 	ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
5429 	tucss = skb_transport_offset(skb);
5430 	tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
5431 
5432 	cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
5433 		       E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
5434 
5435 	i = tx_ring->next_to_use;
5436 	context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5437 	buffer_info = &tx_ring->buffer_info[i];
5438 
5439 	context_desc->lower_setup.ip_fields.ipcss = ipcss;
5440 	context_desc->lower_setup.ip_fields.ipcso = ipcso;
5441 	context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
5442 	context_desc->upper_setup.tcp_fields.tucss = tucss;
5443 	context_desc->upper_setup.tcp_fields.tucso = tucso;
5444 	context_desc->upper_setup.tcp_fields.tucse = 0;
5445 	context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
5446 	context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
5447 	context_desc->cmd_and_length = cpu_to_le32(cmd_length);
5448 
5449 	buffer_info->time_stamp = jiffies;
5450 	buffer_info->next_to_watch = i;
5451 
5452 	i++;
5453 	if (i == tx_ring->count)
5454 		i = 0;
5455 	tx_ring->next_to_use = i;
5456 
5457 	return 1;
5458 }
5459 
5460 static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb,
5461 			  __be16 protocol)
5462 {
5463 	struct e1000_adapter *adapter = tx_ring->adapter;
5464 	struct e1000_context_desc *context_desc;
5465 	struct e1000_buffer *buffer_info;
5466 	unsigned int i;
5467 	u8 css;
5468 	u32 cmd_len = E1000_TXD_CMD_DEXT;
5469 
5470 	if (skb->ip_summed != CHECKSUM_PARTIAL)
5471 		return false;
5472 
5473 	switch (protocol) {
5474 	case cpu_to_be16(ETH_P_IP):
5475 		if (ip_hdr(skb)->protocol == IPPROTO_TCP)
5476 			cmd_len |= E1000_TXD_CMD_TCP;
5477 		break;
5478 	case cpu_to_be16(ETH_P_IPV6):
5479 		/* XXX not handling all IPV6 headers */
5480 		if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
5481 			cmd_len |= E1000_TXD_CMD_TCP;
5482 		break;
5483 	default:
5484 		if (unlikely(net_ratelimit()))
5485 			e_warn("checksum_partial proto=%x!\n",
5486 			       be16_to_cpu(protocol));
5487 		break;
5488 	}
5489 
5490 	css = skb_checksum_start_offset(skb);
5491 
5492 	i = tx_ring->next_to_use;
5493 	buffer_info = &tx_ring->buffer_info[i];
5494 	context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5495 
5496 	context_desc->lower_setup.ip_config = 0;
5497 	context_desc->upper_setup.tcp_fields.tucss = css;
5498 	context_desc->upper_setup.tcp_fields.tucso = css + skb->csum_offset;
5499 	context_desc->upper_setup.tcp_fields.tucse = 0;
5500 	context_desc->tcp_seg_setup.data = 0;
5501 	context_desc->cmd_and_length = cpu_to_le32(cmd_len);
5502 
5503 	buffer_info->time_stamp = jiffies;
5504 	buffer_info->next_to_watch = i;
5505 
5506 	i++;
5507 	if (i == tx_ring->count)
5508 		i = 0;
5509 	tx_ring->next_to_use = i;
5510 
5511 	return true;
5512 }
5513 
5514 static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb,
5515 			unsigned int first, unsigned int max_per_txd,
5516 			unsigned int nr_frags)
5517 {
5518 	struct e1000_adapter *adapter = tx_ring->adapter;
5519 	struct pci_dev *pdev = adapter->pdev;
5520 	struct e1000_buffer *buffer_info;
5521 	unsigned int len = skb_headlen(skb);
5522 	unsigned int offset = 0, size, count = 0, i;
5523 	unsigned int f, bytecount, segs;
5524 
5525 	i = tx_ring->next_to_use;
5526 
5527 	while (len) {
5528 		buffer_info = &tx_ring->buffer_info[i];
5529 		size = min(len, max_per_txd);
5530 
5531 		buffer_info->length = size;
5532 		buffer_info->time_stamp = jiffies;
5533 		buffer_info->next_to_watch = i;
5534 		buffer_info->dma = dma_map_single(&pdev->dev,
5535 						  skb->data + offset,
5536 						  size, DMA_TO_DEVICE);
5537 		buffer_info->mapped_as_page = false;
5538 		if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5539 			goto dma_error;
5540 
5541 		len -= size;
5542 		offset += size;
5543 		count++;
5544 
5545 		if (len) {
5546 			i++;
5547 			if (i == tx_ring->count)
5548 				i = 0;
5549 		}
5550 	}
5551 
5552 	for (f = 0; f < nr_frags; f++) {
5553 		const struct skb_frag_struct *frag;
5554 
5555 		frag = &skb_shinfo(skb)->frags[f];
5556 		len = skb_frag_size(frag);
5557 		offset = 0;
5558 
5559 		while (len) {
5560 			i++;
5561 			if (i == tx_ring->count)
5562 				i = 0;
5563 
5564 			buffer_info = &tx_ring->buffer_info[i];
5565 			size = min(len, max_per_txd);
5566 
5567 			buffer_info->length = size;
5568 			buffer_info->time_stamp = jiffies;
5569 			buffer_info->next_to_watch = i;
5570 			buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
5571 							    offset, size,
5572 							    DMA_TO_DEVICE);
5573 			buffer_info->mapped_as_page = true;
5574 			if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5575 				goto dma_error;
5576 
5577 			len -= size;
5578 			offset += size;
5579 			count++;
5580 		}
5581 	}
5582 
5583 	segs = skb_shinfo(skb)->gso_segs ? : 1;
5584 	/* multiply data chunks by size of headers */
5585 	bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
5586 
5587 	tx_ring->buffer_info[i].skb = skb;
5588 	tx_ring->buffer_info[i].segs = segs;
5589 	tx_ring->buffer_info[i].bytecount = bytecount;
5590 	tx_ring->buffer_info[first].next_to_watch = i;
5591 
5592 	return count;
5593 
5594 dma_error:
5595 	dev_err(&pdev->dev, "Tx DMA map failed\n");
5596 	buffer_info->dma = 0;
5597 	if (count)
5598 		count--;
5599 
5600 	while (count--) {
5601 		if (i == 0)
5602 			i += tx_ring->count;
5603 		i--;
5604 		buffer_info = &tx_ring->buffer_info[i];
5605 		e1000_put_txbuf(tx_ring, buffer_info, true);
5606 	}
5607 
5608 	return 0;
5609 }
5610 
5611 static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count)
5612 {
5613 	struct e1000_adapter *adapter = tx_ring->adapter;
5614 	struct e1000_tx_desc *tx_desc = NULL;
5615 	struct e1000_buffer *buffer_info;
5616 	u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
5617 	unsigned int i;
5618 
5619 	if (tx_flags & E1000_TX_FLAGS_TSO) {
5620 		txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
5621 		    E1000_TXD_CMD_TSE;
5622 		txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5623 
5624 		if (tx_flags & E1000_TX_FLAGS_IPV4)
5625 			txd_upper |= E1000_TXD_POPTS_IXSM << 8;
5626 	}
5627 
5628 	if (tx_flags & E1000_TX_FLAGS_CSUM) {
5629 		txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5630 		txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5631 	}
5632 
5633 	if (tx_flags & E1000_TX_FLAGS_VLAN) {
5634 		txd_lower |= E1000_TXD_CMD_VLE;
5635 		txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
5636 	}
5637 
5638 	if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5639 		txd_lower &= ~(E1000_TXD_CMD_IFCS);
5640 
5641 	if (unlikely(tx_flags & E1000_TX_FLAGS_HWTSTAMP)) {
5642 		txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5643 		txd_upper |= E1000_TXD_EXTCMD_TSTAMP;
5644 	}
5645 
5646 	i = tx_ring->next_to_use;
5647 
5648 	do {
5649 		buffer_info = &tx_ring->buffer_info[i];
5650 		tx_desc = E1000_TX_DESC(*tx_ring, i);
5651 		tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
5652 		tx_desc->lower.data = cpu_to_le32(txd_lower |
5653 						  buffer_info->length);
5654 		tx_desc->upper.data = cpu_to_le32(txd_upper);
5655 
5656 		i++;
5657 		if (i == tx_ring->count)
5658 			i = 0;
5659 	} while (--count > 0);
5660 
5661 	tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
5662 
5663 	/* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
5664 	if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5665 		tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
5666 
5667 	/* Force memory writes to complete before letting h/w
5668 	 * know there are new descriptors to fetch.  (Only
5669 	 * applicable for weak-ordered memory model archs,
5670 	 * such as IA-64).
5671 	 */
5672 	wmb();
5673 
5674 	tx_ring->next_to_use = i;
5675 }
5676 
5677 #define MINIMUM_DHCP_PACKET_SIZE 282
5678 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
5679 				    struct sk_buff *skb)
5680 {
5681 	struct e1000_hw *hw = &adapter->hw;
5682 	u16 length, offset;
5683 
5684 	if (skb_vlan_tag_present(skb) &&
5685 	    !((skb_vlan_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
5686 	      (adapter->hw.mng_cookie.status &
5687 	       E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
5688 		return 0;
5689 
5690 	if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
5691 		return 0;
5692 
5693 	if (((struct ethhdr *)skb->data)->h_proto != htons(ETH_P_IP))
5694 		return 0;
5695 
5696 	{
5697 		const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data + 14);
5698 		struct udphdr *udp;
5699 
5700 		if (ip->protocol != IPPROTO_UDP)
5701 			return 0;
5702 
5703 		udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
5704 		if (ntohs(udp->dest) != 67)
5705 			return 0;
5706 
5707 		offset = (u8 *)udp + 8 - skb->data;
5708 		length = skb->len - offset;
5709 		return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
5710 	}
5711 
5712 	return 0;
5713 }
5714 
5715 static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5716 {
5717 	struct e1000_adapter *adapter = tx_ring->adapter;
5718 
5719 	netif_stop_queue(adapter->netdev);
5720 	/* Herbert's original patch had:
5721 	 *  smp_mb__after_netif_stop_queue();
5722 	 * but since that doesn't exist yet, just open code it.
5723 	 */
5724 	smp_mb();
5725 
5726 	/* We need to check again in a case another CPU has just
5727 	 * made room available.
5728 	 */
5729 	if (e1000_desc_unused(tx_ring) < size)
5730 		return -EBUSY;
5731 
5732 	/* A reprieve! */
5733 	netif_start_queue(adapter->netdev);
5734 	++adapter->restart_queue;
5735 	return 0;
5736 }
5737 
5738 static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5739 {
5740 	BUG_ON(size > tx_ring->count);
5741 
5742 	if (e1000_desc_unused(tx_ring) >= size)
5743 		return 0;
5744 	return __e1000_maybe_stop_tx(tx_ring, size);
5745 }
5746 
5747 static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
5748 				    struct net_device *netdev)
5749 {
5750 	struct e1000_adapter *adapter = netdev_priv(netdev);
5751 	struct e1000_ring *tx_ring = adapter->tx_ring;
5752 	unsigned int first;
5753 	unsigned int tx_flags = 0;
5754 	unsigned int len = skb_headlen(skb);
5755 	unsigned int nr_frags;
5756 	unsigned int mss;
5757 	int count = 0;
5758 	int tso;
5759 	unsigned int f;
5760 	__be16 protocol = vlan_get_protocol(skb);
5761 
5762 	if (test_bit(__E1000_DOWN, &adapter->state)) {
5763 		dev_kfree_skb_any(skb);
5764 		return NETDEV_TX_OK;
5765 	}
5766 
5767 	if (skb->len <= 0) {
5768 		dev_kfree_skb_any(skb);
5769 		return NETDEV_TX_OK;
5770 	}
5771 
5772 	/* The minimum packet size with TCTL.PSP set is 17 bytes so
5773 	 * pad skb in order to meet this minimum size requirement
5774 	 */
5775 	if (skb_put_padto(skb, 17))
5776 		return NETDEV_TX_OK;
5777 
5778 	mss = skb_shinfo(skb)->gso_size;
5779 	if (mss) {
5780 		u8 hdr_len;
5781 
5782 		/* TSO Workaround for 82571/2/3 Controllers -- if skb->data
5783 		 * points to just header, pull a few bytes of payload from
5784 		 * frags into skb->data
5785 		 */
5786 		hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5787 		/* we do this workaround for ES2LAN, but it is un-necessary,
5788 		 * avoiding it could save a lot of cycles
5789 		 */
5790 		if (skb->data_len && (hdr_len == len)) {
5791 			unsigned int pull_size;
5792 
5793 			pull_size = min_t(unsigned int, 4, skb->data_len);
5794 			if (!__pskb_pull_tail(skb, pull_size)) {
5795 				e_err("__pskb_pull_tail failed.\n");
5796 				dev_kfree_skb_any(skb);
5797 				return NETDEV_TX_OK;
5798 			}
5799 			len = skb_headlen(skb);
5800 		}
5801 	}
5802 
5803 	/* reserve a descriptor for the offload context */
5804 	if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
5805 		count++;
5806 	count++;
5807 
5808 	count += DIV_ROUND_UP(len, adapter->tx_fifo_limit);
5809 
5810 	nr_frags = skb_shinfo(skb)->nr_frags;
5811 	for (f = 0; f < nr_frags; f++)
5812 		count += DIV_ROUND_UP(skb_frag_size(&skb_shinfo(skb)->frags[f]),
5813 				      adapter->tx_fifo_limit);
5814 
5815 	if (adapter->hw.mac.tx_pkt_filtering)
5816 		e1000_transfer_dhcp_info(adapter, skb);
5817 
5818 	/* need: count + 2 desc gap to keep tail from touching
5819 	 * head, otherwise try next time
5820 	 */
5821 	if (e1000_maybe_stop_tx(tx_ring, count + 2))
5822 		return NETDEV_TX_BUSY;
5823 
5824 	if (skb_vlan_tag_present(skb)) {
5825 		tx_flags |= E1000_TX_FLAGS_VLAN;
5826 		tx_flags |= (skb_vlan_tag_get(skb) <<
5827 			     E1000_TX_FLAGS_VLAN_SHIFT);
5828 	}
5829 
5830 	first = tx_ring->next_to_use;
5831 
5832 	tso = e1000_tso(tx_ring, skb, protocol);
5833 	if (tso < 0) {
5834 		dev_kfree_skb_any(skb);
5835 		return NETDEV_TX_OK;
5836 	}
5837 
5838 	if (tso)
5839 		tx_flags |= E1000_TX_FLAGS_TSO;
5840 	else if (e1000_tx_csum(tx_ring, skb, protocol))
5841 		tx_flags |= E1000_TX_FLAGS_CSUM;
5842 
5843 	/* Old method was to assume IPv4 packet by default if TSO was enabled.
5844 	 * 82571 hardware supports TSO capabilities for IPv6 as well...
5845 	 * no longer assume, we must.
5846 	 */
5847 	if (protocol == htons(ETH_P_IP))
5848 		tx_flags |= E1000_TX_FLAGS_IPV4;
5849 
5850 	if (unlikely(skb->no_fcs))
5851 		tx_flags |= E1000_TX_FLAGS_NO_FCS;
5852 
5853 	/* if count is 0 then mapping error has occurred */
5854 	count = e1000_tx_map(tx_ring, skb, first, adapter->tx_fifo_limit,
5855 			     nr_frags);
5856 	if (count) {
5857 		if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
5858 		    (adapter->flags & FLAG_HAS_HW_TIMESTAMP)) {
5859 			if (!adapter->tx_hwtstamp_skb) {
5860 				skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5861 				tx_flags |= E1000_TX_FLAGS_HWTSTAMP;
5862 				adapter->tx_hwtstamp_skb = skb_get(skb);
5863 				adapter->tx_hwtstamp_start = jiffies;
5864 				schedule_work(&adapter->tx_hwtstamp_work);
5865 			} else {
5866 				adapter->tx_hwtstamp_skipped++;
5867 			}
5868 		}
5869 
5870 		skb_tx_timestamp(skb);
5871 
5872 		netdev_sent_queue(netdev, skb->len);
5873 		e1000_tx_queue(tx_ring, tx_flags, count);
5874 		/* Make sure there is space in the ring for the next send. */
5875 		e1000_maybe_stop_tx(tx_ring,
5876 				    (MAX_SKB_FRAGS *
5877 				     DIV_ROUND_UP(PAGE_SIZE,
5878 						  adapter->tx_fifo_limit) + 2));
5879 
5880 		if (!skb->xmit_more ||
5881 		    netif_xmit_stopped(netdev_get_tx_queue(netdev, 0))) {
5882 			if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
5883 				e1000e_update_tdt_wa(tx_ring,
5884 						     tx_ring->next_to_use);
5885 			else
5886 				writel(tx_ring->next_to_use, tx_ring->tail);
5887 
5888 			/* we need this if more than one processor can write
5889 			 * to our tail at a time, it synchronizes IO on
5890 			 *IA64/Altix systems
5891 			 */
5892 			mmiowb();
5893 		}
5894 	} else {
5895 		dev_kfree_skb_any(skb);
5896 		tx_ring->buffer_info[first].time_stamp = 0;
5897 		tx_ring->next_to_use = first;
5898 	}
5899 
5900 	return NETDEV_TX_OK;
5901 }
5902 
5903 /**
5904  * e1000_tx_timeout - Respond to a Tx Hang
5905  * @netdev: network interface device structure
5906  **/
5907 static void e1000_tx_timeout(struct net_device *netdev)
5908 {
5909 	struct e1000_adapter *adapter = netdev_priv(netdev);
5910 
5911 	/* Do the reset outside of interrupt context */
5912 	adapter->tx_timeout_count++;
5913 	schedule_work(&adapter->reset_task);
5914 }
5915 
5916 static void e1000_reset_task(struct work_struct *work)
5917 {
5918 	struct e1000_adapter *adapter;
5919 	adapter = container_of(work, struct e1000_adapter, reset_task);
5920 
5921 	/* don't run the task if already down */
5922 	if (test_bit(__E1000_DOWN, &adapter->state))
5923 		return;
5924 
5925 	if (!(adapter->flags & FLAG_RESTART_NOW)) {
5926 		e1000e_dump(adapter);
5927 		e_err("Reset adapter unexpectedly\n");
5928 	}
5929 	e1000e_reinit_locked(adapter);
5930 }
5931 
5932 /**
5933  * e1000_get_stats64 - Get System Network Statistics
5934  * @netdev: network interface device structure
5935  * @stats: rtnl_link_stats64 pointer
5936  *
5937  * Returns the address of the device statistics structure.
5938  **/
5939 void e1000e_get_stats64(struct net_device *netdev,
5940 			struct rtnl_link_stats64 *stats)
5941 {
5942 	struct e1000_adapter *adapter = netdev_priv(netdev);
5943 
5944 	spin_lock(&adapter->stats64_lock);
5945 	e1000e_update_stats(adapter);
5946 	/* Fill out the OS statistics structure */
5947 	stats->rx_bytes = adapter->stats.gorc;
5948 	stats->rx_packets = adapter->stats.gprc;
5949 	stats->tx_bytes = adapter->stats.gotc;
5950 	stats->tx_packets = adapter->stats.gptc;
5951 	stats->multicast = adapter->stats.mprc;
5952 	stats->collisions = adapter->stats.colc;
5953 
5954 	/* Rx Errors */
5955 
5956 	/* RLEC on some newer hardware can be incorrect so build
5957 	 * our own version based on RUC and ROC
5958 	 */
5959 	stats->rx_errors = adapter->stats.rxerrc +
5960 	    adapter->stats.crcerrs + adapter->stats.algnerrc +
5961 	    adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
5962 	stats->rx_length_errors = adapter->stats.ruc + adapter->stats.roc;
5963 	stats->rx_crc_errors = adapter->stats.crcerrs;
5964 	stats->rx_frame_errors = adapter->stats.algnerrc;
5965 	stats->rx_missed_errors = adapter->stats.mpc;
5966 
5967 	/* Tx Errors */
5968 	stats->tx_errors = adapter->stats.ecol + adapter->stats.latecol;
5969 	stats->tx_aborted_errors = adapter->stats.ecol;
5970 	stats->tx_window_errors = adapter->stats.latecol;
5971 	stats->tx_carrier_errors = adapter->stats.tncrs;
5972 
5973 	/* Tx Dropped needs to be maintained elsewhere */
5974 
5975 	spin_unlock(&adapter->stats64_lock);
5976 }
5977 
5978 /**
5979  * e1000_change_mtu - Change the Maximum Transfer Unit
5980  * @netdev: network interface device structure
5981  * @new_mtu: new value for maximum frame size
5982  *
5983  * Returns 0 on success, negative on failure
5984  **/
5985 static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
5986 {
5987 	struct e1000_adapter *adapter = netdev_priv(netdev);
5988 	int max_frame = new_mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
5989 
5990 	/* Jumbo frame support */
5991 	if ((new_mtu > ETH_DATA_LEN) &&
5992 	    !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
5993 		e_err("Jumbo Frames not supported.\n");
5994 		return -EINVAL;
5995 	}
5996 
5997 	/* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
5998 	if ((adapter->hw.mac.type >= e1000_pch2lan) &&
5999 	    !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
6000 	    (new_mtu > ETH_DATA_LEN)) {
6001 		e_err("Jumbo Frames not supported on this device when CRC stripping is disabled.\n");
6002 		return -EINVAL;
6003 	}
6004 
6005 	while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
6006 		usleep_range(1000, 2000);
6007 	/* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
6008 	adapter->max_frame_size = max_frame;
6009 	e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
6010 	netdev->mtu = new_mtu;
6011 
6012 	pm_runtime_get_sync(netdev->dev.parent);
6013 
6014 	if (netif_running(netdev))
6015 		e1000e_down(adapter, true);
6016 
6017 	/* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
6018 	 * means we reserve 2 more, this pushes us to allocate from the next
6019 	 * larger slab size.
6020 	 * i.e. RXBUFFER_2048 --> size-4096 slab
6021 	 * However with the new *_jumbo_rx* routines, jumbo receives will use
6022 	 * fragmented skbs
6023 	 */
6024 
6025 	if (max_frame <= 2048)
6026 		adapter->rx_buffer_len = 2048;
6027 	else
6028 		adapter->rx_buffer_len = 4096;
6029 
6030 	/* adjust allocation if LPE protects us, and we aren't using SBP */
6031 	if (max_frame <= (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN))
6032 		adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
6033 
6034 	if (netif_running(netdev))
6035 		e1000e_up(adapter);
6036 	else
6037 		e1000e_reset(adapter);
6038 
6039 	pm_runtime_put_sync(netdev->dev.parent);
6040 
6041 	clear_bit(__E1000_RESETTING, &adapter->state);
6042 
6043 	return 0;
6044 }
6045 
6046 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
6047 			   int cmd)
6048 {
6049 	struct e1000_adapter *adapter = netdev_priv(netdev);
6050 	struct mii_ioctl_data *data = if_mii(ifr);
6051 
6052 	if (adapter->hw.phy.media_type != e1000_media_type_copper)
6053 		return -EOPNOTSUPP;
6054 
6055 	switch (cmd) {
6056 	case SIOCGMIIPHY:
6057 		data->phy_id = adapter->hw.phy.addr;
6058 		break;
6059 	case SIOCGMIIREG:
6060 		e1000_phy_read_status(adapter);
6061 
6062 		switch (data->reg_num & 0x1F) {
6063 		case MII_BMCR:
6064 			data->val_out = adapter->phy_regs.bmcr;
6065 			break;
6066 		case MII_BMSR:
6067 			data->val_out = adapter->phy_regs.bmsr;
6068 			break;
6069 		case MII_PHYSID1:
6070 			data->val_out = (adapter->hw.phy.id >> 16);
6071 			break;
6072 		case MII_PHYSID2:
6073 			data->val_out = (adapter->hw.phy.id & 0xFFFF);
6074 			break;
6075 		case MII_ADVERTISE:
6076 			data->val_out = adapter->phy_regs.advertise;
6077 			break;
6078 		case MII_LPA:
6079 			data->val_out = adapter->phy_regs.lpa;
6080 			break;
6081 		case MII_EXPANSION:
6082 			data->val_out = adapter->phy_regs.expansion;
6083 			break;
6084 		case MII_CTRL1000:
6085 			data->val_out = adapter->phy_regs.ctrl1000;
6086 			break;
6087 		case MII_STAT1000:
6088 			data->val_out = adapter->phy_regs.stat1000;
6089 			break;
6090 		case MII_ESTATUS:
6091 			data->val_out = adapter->phy_regs.estatus;
6092 			break;
6093 		default:
6094 			return -EIO;
6095 		}
6096 		break;
6097 	case SIOCSMIIREG:
6098 	default:
6099 		return -EOPNOTSUPP;
6100 	}
6101 	return 0;
6102 }
6103 
6104 /**
6105  * e1000e_hwtstamp_ioctl - control hardware time stamping
6106  * @netdev: network interface device structure
6107  * @ifreq: interface request
6108  *
6109  * Outgoing time stamping can be enabled and disabled. Play nice and
6110  * disable it when requested, although it shouldn't cause any overhead
6111  * when no packet needs it. At most one packet in the queue may be
6112  * marked for time stamping, otherwise it would be impossible to tell
6113  * for sure to which packet the hardware time stamp belongs.
6114  *
6115  * Incoming time stamping has to be configured via the hardware filters.
6116  * Not all combinations are supported, in particular event type has to be
6117  * specified. Matching the kind of event packet is not supported, with the
6118  * exception of "all V2 events regardless of level 2 or 4".
6119  **/
6120 static int e1000e_hwtstamp_set(struct net_device *netdev, struct ifreq *ifr)
6121 {
6122 	struct e1000_adapter *adapter = netdev_priv(netdev);
6123 	struct hwtstamp_config config;
6124 	int ret_val;
6125 
6126 	if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
6127 		return -EFAULT;
6128 
6129 	ret_val = e1000e_config_hwtstamp(adapter, &config);
6130 	if (ret_val)
6131 		return ret_val;
6132 
6133 	switch (config.rx_filter) {
6134 	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
6135 	case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
6136 	case HWTSTAMP_FILTER_PTP_V2_SYNC:
6137 	case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
6138 	case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
6139 	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
6140 		/* With V2 type filters which specify a Sync or Delay Request,
6141 		 * Path Delay Request/Response messages are also time stamped
6142 		 * by hardware so notify the caller the requested packets plus
6143 		 * some others are time stamped.
6144 		 */
6145 		config.rx_filter = HWTSTAMP_FILTER_SOME;
6146 		break;
6147 	default:
6148 		break;
6149 	}
6150 
6151 	return copy_to_user(ifr->ifr_data, &config,
6152 			    sizeof(config)) ? -EFAULT : 0;
6153 }
6154 
6155 static int e1000e_hwtstamp_get(struct net_device *netdev, struct ifreq *ifr)
6156 {
6157 	struct e1000_adapter *adapter = netdev_priv(netdev);
6158 
6159 	return copy_to_user(ifr->ifr_data, &adapter->hwtstamp_config,
6160 			    sizeof(adapter->hwtstamp_config)) ? -EFAULT : 0;
6161 }
6162 
6163 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6164 {
6165 	switch (cmd) {
6166 	case SIOCGMIIPHY:
6167 	case SIOCGMIIREG:
6168 	case SIOCSMIIREG:
6169 		return e1000_mii_ioctl(netdev, ifr, cmd);
6170 	case SIOCSHWTSTAMP:
6171 		return e1000e_hwtstamp_set(netdev, ifr);
6172 	case SIOCGHWTSTAMP:
6173 		return e1000e_hwtstamp_get(netdev, ifr);
6174 	default:
6175 		return -EOPNOTSUPP;
6176 	}
6177 }
6178 
6179 static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
6180 {
6181 	struct e1000_hw *hw = &adapter->hw;
6182 	u32 i, mac_reg, wuc;
6183 	u16 phy_reg, wuc_enable;
6184 	int retval;
6185 
6186 	/* copy MAC RARs to PHY RARs */
6187 	e1000_copy_rx_addrs_to_phy_ich8lan(hw);
6188 
6189 	retval = hw->phy.ops.acquire(hw);
6190 	if (retval) {
6191 		e_err("Could not acquire PHY\n");
6192 		return retval;
6193 	}
6194 
6195 	/* Enable access to wakeup registers on and set page to BM_WUC_PAGE */
6196 	retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6197 	if (retval)
6198 		goto release;
6199 
6200 	/* copy MAC MTA to PHY MTA - only needed for pchlan */
6201 	for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
6202 		mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
6203 		hw->phy.ops.write_reg_page(hw, BM_MTA(i),
6204 					   (u16)(mac_reg & 0xFFFF));
6205 		hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1,
6206 					   (u16)((mac_reg >> 16) & 0xFFFF));
6207 	}
6208 
6209 	/* configure PHY Rx Control register */
6210 	hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg);
6211 	mac_reg = er32(RCTL);
6212 	if (mac_reg & E1000_RCTL_UPE)
6213 		phy_reg |= BM_RCTL_UPE;
6214 	if (mac_reg & E1000_RCTL_MPE)
6215 		phy_reg |= BM_RCTL_MPE;
6216 	phy_reg &= ~(BM_RCTL_MO_MASK);
6217 	if (mac_reg & E1000_RCTL_MO_3)
6218 		phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
6219 			    << BM_RCTL_MO_SHIFT);
6220 	if (mac_reg & E1000_RCTL_BAM)
6221 		phy_reg |= BM_RCTL_BAM;
6222 	if (mac_reg & E1000_RCTL_PMCF)
6223 		phy_reg |= BM_RCTL_PMCF;
6224 	mac_reg = er32(CTRL);
6225 	if (mac_reg & E1000_CTRL_RFCE)
6226 		phy_reg |= BM_RCTL_RFCE;
6227 	hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg);
6228 
6229 	wuc = E1000_WUC_PME_EN;
6230 	if (wufc & (E1000_WUFC_MAG | E1000_WUFC_LNKC))
6231 		wuc |= E1000_WUC_APME;
6232 
6233 	/* enable PHY wakeup in MAC register */
6234 	ew32(WUFC, wufc);
6235 	ew32(WUC, (E1000_WUC_PHY_WAKE | E1000_WUC_APMPME |
6236 		   E1000_WUC_PME_STATUS | wuc));
6237 
6238 	/* configure and enable PHY wakeup in PHY registers */
6239 	hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc);
6240 	hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, wuc);
6241 
6242 	/* activate PHY wakeup */
6243 	wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
6244 	retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6245 	if (retval)
6246 		e_err("Could not set PHY Host Wakeup bit\n");
6247 release:
6248 	hw->phy.ops.release(hw);
6249 
6250 	return retval;
6251 }
6252 
6253 static void e1000e_flush_lpic(struct pci_dev *pdev)
6254 {
6255 	struct net_device *netdev = pci_get_drvdata(pdev);
6256 	struct e1000_adapter *adapter = netdev_priv(netdev);
6257 	struct e1000_hw *hw = &adapter->hw;
6258 	u32 ret_val;
6259 
6260 	pm_runtime_get_sync(netdev->dev.parent);
6261 
6262 	ret_val = hw->phy.ops.acquire(hw);
6263 	if (ret_val)
6264 		goto fl_out;
6265 
6266 	pr_info("EEE TX LPI TIMER: %08X\n",
6267 		er32(LPIC) >> E1000_LPIC_LPIET_SHIFT);
6268 
6269 	hw->phy.ops.release(hw);
6270 
6271 fl_out:
6272 	pm_runtime_put_sync(netdev->dev.parent);
6273 }
6274 
6275 static int e1000e_pm_freeze(struct device *dev)
6276 {
6277 	struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6278 	struct e1000_adapter *adapter = netdev_priv(netdev);
6279 
6280 	netif_device_detach(netdev);
6281 
6282 	if (netif_running(netdev)) {
6283 		int count = E1000_CHECK_RESET_COUNT;
6284 
6285 		while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
6286 			usleep_range(10000, 20000);
6287 
6288 		WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
6289 
6290 		/* Quiesce the device without resetting the hardware */
6291 		e1000e_down(adapter, false);
6292 		e1000_free_irq(adapter);
6293 	}
6294 	e1000e_reset_interrupt_capability(adapter);
6295 
6296 	/* Allow time for pending master requests to run */
6297 	e1000e_disable_pcie_master(&adapter->hw);
6298 
6299 	return 0;
6300 }
6301 
6302 static int __e1000_shutdown(struct pci_dev *pdev, bool runtime)
6303 {
6304 	struct net_device *netdev = pci_get_drvdata(pdev);
6305 	struct e1000_adapter *adapter = netdev_priv(netdev);
6306 	struct e1000_hw *hw = &adapter->hw;
6307 	u32 ctrl, ctrl_ext, rctl, status;
6308 	/* Runtime suspend should only enable wakeup for link changes */
6309 	u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
6310 	int retval = 0;
6311 
6312 	status = er32(STATUS);
6313 	if (status & E1000_STATUS_LU)
6314 		wufc &= ~E1000_WUFC_LNKC;
6315 
6316 	if (wufc) {
6317 		e1000_setup_rctl(adapter);
6318 		e1000e_set_rx_mode(netdev);
6319 
6320 		/* turn on all-multi mode if wake on multicast is enabled */
6321 		if (wufc & E1000_WUFC_MC) {
6322 			rctl = er32(RCTL);
6323 			rctl |= E1000_RCTL_MPE;
6324 			ew32(RCTL, rctl);
6325 		}
6326 
6327 		ctrl = er32(CTRL);
6328 		ctrl |= E1000_CTRL_ADVD3WUC;
6329 		if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
6330 			ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
6331 		ew32(CTRL, ctrl);
6332 
6333 		if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
6334 		    adapter->hw.phy.media_type ==
6335 		    e1000_media_type_internal_serdes) {
6336 			/* keep the laser running in D3 */
6337 			ctrl_ext = er32(CTRL_EXT);
6338 			ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
6339 			ew32(CTRL_EXT, ctrl_ext);
6340 		}
6341 
6342 		if (!runtime)
6343 			e1000e_power_up_phy(adapter);
6344 
6345 		if (adapter->flags & FLAG_IS_ICH)
6346 			e1000_suspend_workarounds_ich8lan(&adapter->hw);
6347 
6348 		if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6349 			/* enable wakeup by the PHY */
6350 			retval = e1000_init_phy_wakeup(adapter, wufc);
6351 			if (retval)
6352 				return retval;
6353 		} else {
6354 			/* enable wakeup by the MAC */
6355 			ew32(WUFC, wufc);
6356 			ew32(WUC, E1000_WUC_PME_EN);
6357 		}
6358 	} else {
6359 		ew32(WUC, 0);
6360 		ew32(WUFC, 0);
6361 
6362 		e1000_power_down_phy(adapter);
6363 	}
6364 
6365 	if (adapter->hw.phy.type == e1000_phy_igp_3) {
6366 		e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
6367 	} else if (hw->mac.type >= e1000_pch_lpt) {
6368 		if (!(wufc & (E1000_WUFC_EX | E1000_WUFC_MC | E1000_WUFC_BC)))
6369 			/* ULP does not support wake from unicast, multicast
6370 			 * or broadcast.
6371 			 */
6372 			retval = e1000_enable_ulp_lpt_lp(hw, !runtime);
6373 
6374 		if (retval)
6375 			return retval;
6376 	}
6377 
6378 	/* Ensure that the appropriate bits are set in LPI_CTRL
6379 	 * for EEE in Sx
6380 	 */
6381 	if ((hw->phy.type >= e1000_phy_i217) &&
6382 	    adapter->eee_advert && hw->dev_spec.ich8lan.eee_lp_ability) {
6383 		u16 lpi_ctrl = 0;
6384 
6385 		retval = hw->phy.ops.acquire(hw);
6386 		if (!retval) {
6387 			retval = e1e_rphy_locked(hw, I82579_LPI_CTRL,
6388 						 &lpi_ctrl);
6389 			if (!retval) {
6390 				if (adapter->eee_advert &
6391 				    hw->dev_spec.ich8lan.eee_lp_ability &
6392 				    I82579_EEE_100_SUPPORTED)
6393 					lpi_ctrl |= I82579_LPI_CTRL_100_ENABLE;
6394 				if (adapter->eee_advert &
6395 				    hw->dev_spec.ich8lan.eee_lp_ability &
6396 				    I82579_EEE_1000_SUPPORTED)
6397 					lpi_ctrl |= I82579_LPI_CTRL_1000_ENABLE;
6398 
6399 				retval = e1e_wphy_locked(hw, I82579_LPI_CTRL,
6400 							 lpi_ctrl);
6401 			}
6402 		}
6403 		hw->phy.ops.release(hw);
6404 	}
6405 
6406 	/* Release control of h/w to f/w.  If f/w is AMT enabled, this
6407 	 * would have already happened in close and is redundant.
6408 	 */
6409 	e1000e_release_hw_control(adapter);
6410 
6411 	pci_clear_master(pdev);
6412 
6413 	/* The pci-e switch on some quad port adapters will report a
6414 	 * correctable error when the MAC transitions from D0 to D3.  To
6415 	 * prevent this we need to mask off the correctable errors on the
6416 	 * downstream port of the pci-e switch.
6417 	 *
6418 	 * We don't have the associated upstream bridge while assigning
6419 	 * the PCI device into guest. For example, the KVM on power is
6420 	 * one of the cases.
6421 	 */
6422 	if (adapter->flags & FLAG_IS_QUAD_PORT) {
6423 		struct pci_dev *us_dev = pdev->bus->self;
6424 		u16 devctl;
6425 
6426 		if (!us_dev)
6427 			return 0;
6428 
6429 		pcie_capability_read_word(us_dev, PCI_EXP_DEVCTL, &devctl);
6430 		pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL,
6431 					   (devctl & ~PCI_EXP_DEVCTL_CERE));
6432 
6433 		pci_save_state(pdev);
6434 		pci_prepare_to_sleep(pdev);
6435 
6436 		pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL, devctl);
6437 	}
6438 
6439 	return 0;
6440 }
6441 
6442 /**
6443  * __e1000e_disable_aspm - Disable ASPM states
6444  * @pdev: pointer to PCI device struct
6445  * @state: bit-mask of ASPM states to disable
6446  * @locked: indication if this context holds pci_bus_sem locked.
6447  *
6448  * Some devices *must* have certain ASPM states disabled per hardware errata.
6449  **/
6450 static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state, int locked)
6451 {
6452 	struct pci_dev *parent = pdev->bus->self;
6453 	u16 aspm_dis_mask = 0;
6454 	u16 pdev_aspmc, parent_aspmc;
6455 
6456 	switch (state) {
6457 	case PCIE_LINK_STATE_L0S:
6458 	case PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1:
6459 		aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L0S;
6460 		/* fall-through - can't have L1 without L0s */
6461 	case PCIE_LINK_STATE_L1:
6462 		aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L1;
6463 		break;
6464 	default:
6465 		return;
6466 	}
6467 
6468 	pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6469 	pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6470 
6471 	if (parent) {
6472 		pcie_capability_read_word(parent, PCI_EXP_LNKCTL,
6473 					  &parent_aspmc);
6474 		parent_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6475 	}
6476 
6477 	/* Nothing to do if the ASPM states to be disabled already are */
6478 	if (!(pdev_aspmc & aspm_dis_mask) &&
6479 	    (!parent || !(parent_aspmc & aspm_dis_mask)))
6480 		return;
6481 
6482 	dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
6483 		 (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L0S) ?
6484 		 "L0s" : "",
6485 		 (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L1) ?
6486 		 "L1" : "");
6487 
6488 #ifdef CONFIG_PCIEASPM
6489 	if (locked)
6490 		pci_disable_link_state_locked(pdev, state);
6491 	else
6492 		pci_disable_link_state(pdev, state);
6493 
6494 	/* Double-check ASPM control.  If not disabled by the above, the
6495 	 * BIOS is preventing that from happening (or CONFIG_PCIEASPM is
6496 	 * not enabled); override by writing PCI config space directly.
6497 	 */
6498 	pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6499 	pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6500 
6501 	if (!(aspm_dis_mask & pdev_aspmc))
6502 		return;
6503 #endif
6504 
6505 	/* Both device and parent should have the same ASPM setting.
6506 	 * Disable ASPM in downstream component first and then upstream.
6507 	 */
6508 	pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, aspm_dis_mask);
6509 
6510 	if (parent)
6511 		pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
6512 					   aspm_dis_mask);
6513 }
6514 
6515 /**
6516  * e1000e_disable_aspm - Disable ASPM states.
6517  * @pdev: pointer to PCI device struct
6518  * @state: bit-mask of ASPM states to disable
6519  *
6520  * This function acquires the pci_bus_sem!
6521  * Some devices *must* have certain ASPM states disabled per hardware errata.
6522  **/
6523 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
6524 {
6525 	__e1000e_disable_aspm(pdev, state, 0);
6526 }
6527 
6528 /**
6529  * e1000e_disable_aspm_locked   Disable ASPM states.
6530  * @pdev: pointer to PCI device struct
6531  * @state: bit-mask of ASPM states to disable
6532  *
6533  * This function must be called with pci_bus_sem acquired!
6534  * Some devices *must* have certain ASPM states disabled per hardware errata.
6535  **/
6536 static void e1000e_disable_aspm_locked(struct pci_dev *pdev, u16 state)
6537 {
6538 	__e1000e_disable_aspm(pdev, state, 1);
6539 }
6540 
6541 #ifdef CONFIG_PM
6542 static int __e1000_resume(struct pci_dev *pdev)
6543 {
6544 	struct net_device *netdev = pci_get_drvdata(pdev);
6545 	struct e1000_adapter *adapter = netdev_priv(netdev);
6546 	struct e1000_hw *hw = &adapter->hw;
6547 	u16 aspm_disable_flag = 0;
6548 
6549 	if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6550 		aspm_disable_flag = PCIE_LINK_STATE_L0S;
6551 	if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6552 		aspm_disable_flag |= PCIE_LINK_STATE_L1;
6553 	if (aspm_disable_flag)
6554 		e1000e_disable_aspm(pdev, aspm_disable_flag);
6555 
6556 	pci_set_master(pdev);
6557 
6558 	if (hw->mac.type >= e1000_pch2lan)
6559 		e1000_resume_workarounds_pchlan(&adapter->hw);
6560 
6561 	e1000e_power_up_phy(adapter);
6562 
6563 	/* report the system wakeup cause from S3/S4 */
6564 	if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6565 		u16 phy_data;
6566 
6567 		e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
6568 		if (phy_data) {
6569 			e_info("PHY Wakeup cause - %s\n",
6570 			       phy_data & E1000_WUS_EX ? "Unicast Packet" :
6571 			       phy_data & E1000_WUS_MC ? "Multicast Packet" :
6572 			       phy_data & E1000_WUS_BC ? "Broadcast Packet" :
6573 			       phy_data & E1000_WUS_MAG ? "Magic Packet" :
6574 			       phy_data & E1000_WUS_LNKC ?
6575 			       "Link Status Change" : "other");
6576 		}
6577 		e1e_wphy(&adapter->hw, BM_WUS, ~0);
6578 	} else {
6579 		u32 wus = er32(WUS);
6580 
6581 		if (wus) {
6582 			e_info("MAC Wakeup cause - %s\n",
6583 			       wus & E1000_WUS_EX ? "Unicast Packet" :
6584 			       wus & E1000_WUS_MC ? "Multicast Packet" :
6585 			       wus & E1000_WUS_BC ? "Broadcast Packet" :
6586 			       wus & E1000_WUS_MAG ? "Magic Packet" :
6587 			       wus & E1000_WUS_LNKC ? "Link Status Change" :
6588 			       "other");
6589 		}
6590 		ew32(WUS, ~0);
6591 	}
6592 
6593 	e1000e_reset(adapter);
6594 
6595 	e1000_init_manageability_pt(adapter);
6596 
6597 	/* If the controller has AMT, do not set DRV_LOAD until the interface
6598 	 * is up.  For all other cases, let the f/w know that the h/w is now
6599 	 * under the control of the driver.
6600 	 */
6601 	if (!(adapter->flags & FLAG_HAS_AMT))
6602 		e1000e_get_hw_control(adapter);
6603 
6604 	return 0;
6605 }
6606 
6607 #ifdef CONFIG_PM_SLEEP
6608 static int e1000e_pm_thaw(struct device *dev)
6609 {
6610 	struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6611 	struct e1000_adapter *adapter = netdev_priv(netdev);
6612 
6613 	e1000e_set_interrupt_capability(adapter);
6614 	if (netif_running(netdev)) {
6615 		u32 err = e1000_request_irq(adapter);
6616 
6617 		if (err)
6618 			return err;
6619 
6620 		e1000e_up(adapter);
6621 	}
6622 
6623 	netif_device_attach(netdev);
6624 
6625 	return 0;
6626 }
6627 
6628 static int e1000e_pm_suspend(struct device *dev)
6629 {
6630 	struct pci_dev *pdev = to_pci_dev(dev);
6631 	int rc;
6632 
6633 	e1000e_flush_lpic(pdev);
6634 
6635 	e1000e_pm_freeze(dev);
6636 
6637 	rc = __e1000_shutdown(pdev, false);
6638 	if (rc)
6639 		e1000e_pm_thaw(dev);
6640 
6641 	return rc;
6642 }
6643 
6644 static int e1000e_pm_resume(struct device *dev)
6645 {
6646 	struct pci_dev *pdev = to_pci_dev(dev);
6647 	int rc;
6648 
6649 	rc = __e1000_resume(pdev);
6650 	if (rc)
6651 		return rc;
6652 
6653 	return e1000e_pm_thaw(dev);
6654 }
6655 #endif /* CONFIG_PM_SLEEP */
6656 
6657 static int e1000e_pm_runtime_idle(struct device *dev)
6658 {
6659 	struct pci_dev *pdev = to_pci_dev(dev);
6660 	struct net_device *netdev = pci_get_drvdata(pdev);
6661 	struct e1000_adapter *adapter = netdev_priv(netdev);
6662 	u16 eee_lp;
6663 
6664 	eee_lp = adapter->hw.dev_spec.ich8lan.eee_lp_ability;
6665 
6666 	if (!e1000e_has_link(adapter)) {
6667 		adapter->hw.dev_spec.ich8lan.eee_lp_ability = eee_lp;
6668 		pm_schedule_suspend(dev, 5 * MSEC_PER_SEC);
6669 	}
6670 
6671 	return -EBUSY;
6672 }
6673 
6674 static int e1000e_pm_runtime_resume(struct device *dev)
6675 {
6676 	struct pci_dev *pdev = to_pci_dev(dev);
6677 	struct net_device *netdev = pci_get_drvdata(pdev);
6678 	struct e1000_adapter *adapter = netdev_priv(netdev);
6679 	int rc;
6680 
6681 	rc = __e1000_resume(pdev);
6682 	if (rc)
6683 		return rc;
6684 
6685 	if (netdev->flags & IFF_UP)
6686 		e1000e_up(adapter);
6687 
6688 	return rc;
6689 }
6690 
6691 static int e1000e_pm_runtime_suspend(struct device *dev)
6692 {
6693 	struct pci_dev *pdev = to_pci_dev(dev);
6694 	struct net_device *netdev = pci_get_drvdata(pdev);
6695 	struct e1000_adapter *adapter = netdev_priv(netdev);
6696 
6697 	if (netdev->flags & IFF_UP) {
6698 		int count = E1000_CHECK_RESET_COUNT;
6699 
6700 		while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
6701 			usleep_range(10000, 20000);
6702 
6703 		WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
6704 
6705 		/* Down the device without resetting the hardware */
6706 		e1000e_down(adapter, false);
6707 	}
6708 
6709 	if (__e1000_shutdown(pdev, true)) {
6710 		e1000e_pm_runtime_resume(dev);
6711 		return -EBUSY;
6712 	}
6713 
6714 	return 0;
6715 }
6716 #endif /* CONFIG_PM */
6717 
6718 static void e1000_shutdown(struct pci_dev *pdev)
6719 {
6720 	e1000e_flush_lpic(pdev);
6721 
6722 	e1000e_pm_freeze(&pdev->dev);
6723 
6724 	__e1000_shutdown(pdev, false);
6725 }
6726 
6727 #ifdef CONFIG_NET_POLL_CONTROLLER
6728 
6729 static irqreturn_t e1000_intr_msix(int __always_unused irq, void *data)
6730 {
6731 	struct net_device *netdev = data;
6732 	struct e1000_adapter *adapter = netdev_priv(netdev);
6733 
6734 	if (adapter->msix_entries) {
6735 		int vector, msix_irq;
6736 
6737 		vector = 0;
6738 		msix_irq = adapter->msix_entries[vector].vector;
6739 		if (disable_hardirq(msix_irq))
6740 			e1000_intr_msix_rx(msix_irq, netdev);
6741 		enable_irq(msix_irq);
6742 
6743 		vector++;
6744 		msix_irq = adapter->msix_entries[vector].vector;
6745 		if (disable_hardirq(msix_irq))
6746 			e1000_intr_msix_tx(msix_irq, netdev);
6747 		enable_irq(msix_irq);
6748 
6749 		vector++;
6750 		msix_irq = adapter->msix_entries[vector].vector;
6751 		if (disable_hardirq(msix_irq))
6752 			e1000_msix_other(msix_irq, netdev);
6753 		enable_irq(msix_irq);
6754 	}
6755 
6756 	return IRQ_HANDLED;
6757 }
6758 
6759 /**
6760  * e1000_netpoll
6761  * @netdev: network interface device structure
6762  *
6763  * Polling 'interrupt' - used by things like netconsole to send skbs
6764  * without having to re-enable interrupts. It's not called while
6765  * the interrupt routine is executing.
6766  */
6767 static void e1000_netpoll(struct net_device *netdev)
6768 {
6769 	struct e1000_adapter *adapter = netdev_priv(netdev);
6770 
6771 	switch (adapter->int_mode) {
6772 	case E1000E_INT_MODE_MSIX:
6773 		e1000_intr_msix(adapter->pdev->irq, netdev);
6774 		break;
6775 	case E1000E_INT_MODE_MSI:
6776 		if (disable_hardirq(adapter->pdev->irq))
6777 			e1000_intr_msi(adapter->pdev->irq, netdev);
6778 		enable_irq(adapter->pdev->irq);
6779 		break;
6780 	default:		/* E1000E_INT_MODE_LEGACY */
6781 		if (disable_hardirq(adapter->pdev->irq))
6782 			e1000_intr(adapter->pdev->irq, netdev);
6783 		enable_irq(adapter->pdev->irq);
6784 		break;
6785 	}
6786 }
6787 #endif
6788 
6789 /**
6790  * e1000_io_error_detected - called when PCI error is detected
6791  * @pdev: Pointer to PCI device
6792  * @state: The current pci connection state
6793  *
6794  * This function is called after a PCI bus error affecting
6795  * this device has been detected.
6796  */
6797 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
6798 						pci_channel_state_t state)
6799 {
6800 	struct net_device *netdev = pci_get_drvdata(pdev);
6801 	struct e1000_adapter *adapter = netdev_priv(netdev);
6802 
6803 	netif_device_detach(netdev);
6804 
6805 	if (state == pci_channel_io_perm_failure)
6806 		return PCI_ERS_RESULT_DISCONNECT;
6807 
6808 	if (netif_running(netdev))
6809 		e1000e_down(adapter, true);
6810 	pci_disable_device(pdev);
6811 
6812 	/* Request a slot slot reset. */
6813 	return PCI_ERS_RESULT_NEED_RESET;
6814 }
6815 
6816 /**
6817  * e1000_io_slot_reset - called after the pci bus has been reset.
6818  * @pdev: Pointer to PCI device
6819  *
6820  * Restart the card from scratch, as if from a cold-boot. Implementation
6821  * resembles the first-half of the e1000e_pm_resume routine.
6822  */
6823 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
6824 {
6825 	struct net_device *netdev = pci_get_drvdata(pdev);
6826 	struct e1000_adapter *adapter = netdev_priv(netdev);
6827 	struct e1000_hw *hw = &adapter->hw;
6828 	u16 aspm_disable_flag = 0;
6829 	int err;
6830 	pci_ers_result_t result;
6831 
6832 	if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6833 		aspm_disable_flag = PCIE_LINK_STATE_L0S;
6834 	if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6835 		aspm_disable_flag |= PCIE_LINK_STATE_L1;
6836 	if (aspm_disable_flag)
6837 		e1000e_disable_aspm_locked(pdev, aspm_disable_flag);
6838 
6839 	err = pci_enable_device_mem(pdev);
6840 	if (err) {
6841 		dev_err(&pdev->dev,
6842 			"Cannot re-enable PCI device after reset.\n");
6843 		result = PCI_ERS_RESULT_DISCONNECT;
6844 	} else {
6845 		pdev->state_saved = true;
6846 		pci_restore_state(pdev);
6847 		pci_set_master(pdev);
6848 
6849 		pci_enable_wake(pdev, PCI_D3hot, 0);
6850 		pci_enable_wake(pdev, PCI_D3cold, 0);
6851 
6852 		e1000e_reset(adapter);
6853 		ew32(WUS, ~0);
6854 		result = PCI_ERS_RESULT_RECOVERED;
6855 	}
6856 
6857 	pci_cleanup_aer_uncorrect_error_status(pdev);
6858 
6859 	return result;
6860 }
6861 
6862 /**
6863  * e1000_io_resume - called when traffic can start flowing again.
6864  * @pdev: Pointer to PCI device
6865  *
6866  * This callback is called when the error recovery driver tells us that
6867  * its OK to resume normal operation. Implementation resembles the
6868  * second-half of the e1000e_pm_resume routine.
6869  */
6870 static void e1000_io_resume(struct pci_dev *pdev)
6871 {
6872 	struct net_device *netdev = pci_get_drvdata(pdev);
6873 	struct e1000_adapter *adapter = netdev_priv(netdev);
6874 
6875 	e1000_init_manageability_pt(adapter);
6876 
6877 	if (netif_running(netdev))
6878 		e1000e_up(adapter);
6879 
6880 	netif_device_attach(netdev);
6881 
6882 	/* If the controller has AMT, do not set DRV_LOAD until the interface
6883 	 * is up.  For all other cases, let the f/w know that the h/w is now
6884 	 * under the control of the driver.
6885 	 */
6886 	if (!(adapter->flags & FLAG_HAS_AMT))
6887 		e1000e_get_hw_control(adapter);
6888 }
6889 
6890 static void e1000_print_device_info(struct e1000_adapter *adapter)
6891 {
6892 	struct e1000_hw *hw = &adapter->hw;
6893 	struct net_device *netdev = adapter->netdev;
6894 	u32 ret_val;
6895 	u8 pba_str[E1000_PBANUM_LENGTH];
6896 
6897 	/* print bus type/speed/width info */
6898 	e_info("(PCI Express:2.5GT/s:%s) %pM\n",
6899 	       /* bus width */
6900 	       ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
6901 		"Width x1"),
6902 	       /* MAC address */
6903 	       netdev->dev_addr);
6904 	e_info("Intel(R) PRO/%s Network Connection\n",
6905 	       (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
6906 	ret_val = e1000_read_pba_string_generic(hw, pba_str,
6907 						E1000_PBANUM_LENGTH);
6908 	if (ret_val)
6909 		strlcpy((char *)pba_str, "Unknown", sizeof(pba_str));
6910 	e_info("MAC: %d, PHY: %d, PBA No: %s\n",
6911 	       hw->mac.type, hw->phy.type, pba_str);
6912 }
6913 
6914 static void e1000_eeprom_checks(struct e1000_adapter *adapter)
6915 {
6916 	struct e1000_hw *hw = &adapter->hw;
6917 	int ret_val;
6918 	u16 buf = 0;
6919 
6920 	if (hw->mac.type != e1000_82573)
6921 		return;
6922 
6923 	ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
6924 	le16_to_cpus(&buf);
6925 	if (!ret_val && (!(buf & BIT(0)))) {
6926 		/* Deep Smart Power Down (DSPD) */
6927 		dev_warn(&adapter->pdev->dev,
6928 			 "Warning: detected DSPD enabled in EEPROM\n");
6929 	}
6930 }
6931 
6932 static netdev_features_t e1000_fix_features(struct net_device *netdev,
6933 					    netdev_features_t features)
6934 {
6935 	struct e1000_adapter *adapter = netdev_priv(netdev);
6936 	struct e1000_hw *hw = &adapter->hw;
6937 
6938 	/* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
6939 	if ((hw->mac.type >= e1000_pch2lan) && (netdev->mtu > ETH_DATA_LEN))
6940 		features &= ~NETIF_F_RXFCS;
6941 
6942 	/* Since there is no support for separate Rx/Tx vlan accel
6943 	 * enable/disable make sure Tx flag is always in same state as Rx.
6944 	 */
6945 	if (features & NETIF_F_HW_VLAN_CTAG_RX)
6946 		features |= NETIF_F_HW_VLAN_CTAG_TX;
6947 	else
6948 		features &= ~NETIF_F_HW_VLAN_CTAG_TX;
6949 
6950 	return features;
6951 }
6952 
6953 static int e1000_set_features(struct net_device *netdev,
6954 			      netdev_features_t features)
6955 {
6956 	struct e1000_adapter *adapter = netdev_priv(netdev);
6957 	netdev_features_t changed = features ^ netdev->features;
6958 
6959 	if (changed & (NETIF_F_TSO | NETIF_F_TSO6))
6960 		adapter->flags |= FLAG_TSO_FORCE;
6961 
6962 	if (!(changed & (NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX |
6963 			 NETIF_F_RXCSUM | NETIF_F_RXHASH | NETIF_F_RXFCS |
6964 			 NETIF_F_RXALL)))
6965 		return 0;
6966 
6967 	if (changed & NETIF_F_RXFCS) {
6968 		if (features & NETIF_F_RXFCS) {
6969 			adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
6970 		} else {
6971 			/* We need to take it back to defaults, which might mean
6972 			 * stripping is still disabled at the adapter level.
6973 			 */
6974 			if (adapter->flags2 & FLAG2_DFLT_CRC_STRIPPING)
6975 				adapter->flags2 |= FLAG2_CRC_STRIPPING;
6976 			else
6977 				adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
6978 		}
6979 	}
6980 
6981 	netdev->features = features;
6982 
6983 	if (netif_running(netdev))
6984 		e1000e_reinit_locked(adapter);
6985 	else
6986 		e1000e_reset(adapter);
6987 
6988 	return 0;
6989 }
6990 
6991 static const struct net_device_ops e1000e_netdev_ops = {
6992 	.ndo_open		= e1000e_open,
6993 	.ndo_stop		= e1000e_close,
6994 	.ndo_start_xmit		= e1000_xmit_frame,
6995 	.ndo_get_stats64	= e1000e_get_stats64,
6996 	.ndo_set_rx_mode	= e1000e_set_rx_mode,
6997 	.ndo_set_mac_address	= e1000_set_mac,
6998 	.ndo_change_mtu		= e1000_change_mtu,
6999 	.ndo_do_ioctl		= e1000_ioctl,
7000 	.ndo_tx_timeout		= e1000_tx_timeout,
7001 	.ndo_validate_addr	= eth_validate_addr,
7002 
7003 	.ndo_vlan_rx_add_vid	= e1000_vlan_rx_add_vid,
7004 	.ndo_vlan_rx_kill_vid	= e1000_vlan_rx_kill_vid,
7005 #ifdef CONFIG_NET_POLL_CONTROLLER
7006 	.ndo_poll_controller	= e1000_netpoll,
7007 #endif
7008 	.ndo_set_features = e1000_set_features,
7009 	.ndo_fix_features = e1000_fix_features,
7010 	.ndo_features_check	= passthru_features_check,
7011 };
7012 
7013 /**
7014  * e1000_probe - Device Initialization Routine
7015  * @pdev: PCI device information struct
7016  * @ent: entry in e1000_pci_tbl
7017  *
7018  * Returns 0 on success, negative on failure
7019  *
7020  * e1000_probe initializes an adapter identified by a pci_dev structure.
7021  * The OS initialization, configuring of the adapter private structure,
7022  * and a hardware reset occur.
7023  **/
7024 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7025 {
7026 	struct net_device *netdev;
7027 	struct e1000_adapter *adapter;
7028 	struct e1000_hw *hw;
7029 	const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
7030 	resource_size_t mmio_start, mmio_len;
7031 	resource_size_t flash_start, flash_len;
7032 	static int cards_found;
7033 	u16 aspm_disable_flag = 0;
7034 	int bars, i, err, pci_using_dac;
7035 	u16 eeprom_data = 0;
7036 	u16 eeprom_apme_mask = E1000_EEPROM_APME;
7037 	s32 ret_val = 0;
7038 
7039 	if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S)
7040 		aspm_disable_flag = PCIE_LINK_STATE_L0S;
7041 	if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
7042 		aspm_disable_flag |= PCIE_LINK_STATE_L1;
7043 	if (aspm_disable_flag)
7044 		e1000e_disable_aspm(pdev, aspm_disable_flag);
7045 
7046 	err = pci_enable_device_mem(pdev);
7047 	if (err)
7048 		return err;
7049 
7050 	pci_using_dac = 0;
7051 	err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
7052 	if (!err) {
7053 		pci_using_dac = 1;
7054 	} else {
7055 		err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
7056 		if (err) {
7057 			dev_err(&pdev->dev,
7058 				"No usable DMA configuration, aborting\n");
7059 			goto err_dma;
7060 		}
7061 	}
7062 
7063 	bars = pci_select_bars(pdev, IORESOURCE_MEM);
7064 	err = pci_request_selected_regions_exclusive(pdev, bars,
7065 						     e1000e_driver_name);
7066 	if (err)
7067 		goto err_pci_reg;
7068 
7069 	/* AER (Advanced Error Reporting) hooks */
7070 	pci_enable_pcie_error_reporting(pdev);
7071 
7072 	pci_set_master(pdev);
7073 	/* PCI config space info */
7074 	err = pci_save_state(pdev);
7075 	if (err)
7076 		goto err_alloc_etherdev;
7077 
7078 	err = -ENOMEM;
7079 	netdev = alloc_etherdev(sizeof(struct e1000_adapter));
7080 	if (!netdev)
7081 		goto err_alloc_etherdev;
7082 
7083 	SET_NETDEV_DEV(netdev, &pdev->dev);
7084 
7085 	netdev->irq = pdev->irq;
7086 
7087 	pci_set_drvdata(pdev, netdev);
7088 	adapter = netdev_priv(netdev);
7089 	hw = &adapter->hw;
7090 	adapter->netdev = netdev;
7091 	adapter->pdev = pdev;
7092 	adapter->ei = ei;
7093 	adapter->pba = ei->pba;
7094 	adapter->flags = ei->flags;
7095 	adapter->flags2 = ei->flags2;
7096 	adapter->hw.adapter = adapter;
7097 	adapter->hw.mac.type = ei->mac;
7098 	adapter->max_hw_frame_size = ei->max_hw_frame_size;
7099 	adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
7100 
7101 	mmio_start = pci_resource_start(pdev, 0);
7102 	mmio_len = pci_resource_len(pdev, 0);
7103 
7104 	err = -EIO;
7105 	adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
7106 	if (!adapter->hw.hw_addr)
7107 		goto err_ioremap;
7108 
7109 	if ((adapter->flags & FLAG_HAS_FLASH) &&
7110 	    (pci_resource_flags(pdev, 1) & IORESOURCE_MEM) &&
7111 	    (hw->mac.type < e1000_pch_spt)) {
7112 		flash_start = pci_resource_start(pdev, 1);
7113 		flash_len = pci_resource_len(pdev, 1);
7114 		adapter->hw.flash_address = ioremap(flash_start, flash_len);
7115 		if (!adapter->hw.flash_address)
7116 			goto err_flashmap;
7117 	}
7118 
7119 	/* Set default EEE advertisement */
7120 	if (adapter->flags2 & FLAG2_HAS_EEE)
7121 		adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
7122 
7123 	/* construct the net_device struct */
7124 	netdev->netdev_ops = &e1000e_netdev_ops;
7125 	e1000e_set_ethtool_ops(netdev);
7126 	netdev->watchdog_timeo = 5 * HZ;
7127 	netif_napi_add(netdev, &adapter->napi, e1000e_poll, 64);
7128 	strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
7129 
7130 	netdev->mem_start = mmio_start;
7131 	netdev->mem_end = mmio_start + mmio_len;
7132 
7133 	adapter->bd_number = cards_found++;
7134 
7135 	e1000e_check_options(adapter);
7136 
7137 	/* setup adapter struct */
7138 	err = e1000_sw_init(adapter);
7139 	if (err)
7140 		goto err_sw_init;
7141 
7142 	memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
7143 	memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
7144 	memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
7145 
7146 	err = ei->get_variants(adapter);
7147 	if (err)
7148 		goto err_hw_init;
7149 
7150 	if ((adapter->flags & FLAG_IS_ICH) &&
7151 	    (adapter->flags & FLAG_READ_ONLY_NVM) &&
7152 	    (hw->mac.type < e1000_pch_spt))
7153 		e1000e_write_protect_nvm_ich8lan(&adapter->hw);
7154 
7155 	hw->mac.ops.get_bus_info(&adapter->hw);
7156 
7157 	adapter->hw.phy.autoneg_wait_to_complete = 0;
7158 
7159 	/* Copper options */
7160 	if (adapter->hw.phy.media_type == e1000_media_type_copper) {
7161 		adapter->hw.phy.mdix = AUTO_ALL_MODES;
7162 		adapter->hw.phy.disable_polarity_correction = 0;
7163 		adapter->hw.phy.ms_type = e1000_ms_hw_default;
7164 	}
7165 
7166 	if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw))
7167 		dev_info(&pdev->dev,
7168 			 "PHY reset is blocked due to SOL/IDER session.\n");
7169 
7170 	/* Set initial default active device features */
7171 	netdev->features = (NETIF_F_SG |
7172 			    NETIF_F_HW_VLAN_CTAG_RX |
7173 			    NETIF_F_HW_VLAN_CTAG_TX |
7174 			    NETIF_F_TSO |
7175 			    NETIF_F_TSO6 |
7176 			    NETIF_F_RXHASH |
7177 			    NETIF_F_RXCSUM |
7178 			    NETIF_F_HW_CSUM);
7179 
7180 	/* Set user-changeable features (subset of all device features) */
7181 	netdev->hw_features = netdev->features;
7182 	netdev->hw_features |= NETIF_F_RXFCS;
7183 	netdev->priv_flags |= IFF_SUPP_NOFCS;
7184 	netdev->hw_features |= NETIF_F_RXALL;
7185 
7186 	if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
7187 		netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
7188 
7189 	netdev->vlan_features |= (NETIF_F_SG |
7190 				  NETIF_F_TSO |
7191 				  NETIF_F_TSO6 |
7192 				  NETIF_F_HW_CSUM);
7193 
7194 	netdev->priv_flags |= IFF_UNICAST_FLT;
7195 
7196 	if (pci_using_dac) {
7197 		netdev->features |= NETIF_F_HIGHDMA;
7198 		netdev->vlan_features |= NETIF_F_HIGHDMA;
7199 	}
7200 
7201 	/* MTU range: 68 - max_hw_frame_size */
7202 	netdev->min_mtu = ETH_MIN_MTU;
7203 	netdev->max_mtu = adapter->max_hw_frame_size -
7204 			  (VLAN_ETH_HLEN + ETH_FCS_LEN);
7205 
7206 	if (e1000e_enable_mng_pass_thru(&adapter->hw))
7207 		adapter->flags |= FLAG_MNG_PT_ENABLED;
7208 
7209 	/* before reading the NVM, reset the controller to
7210 	 * put the device in a known good starting state
7211 	 */
7212 	adapter->hw.mac.ops.reset_hw(&adapter->hw);
7213 
7214 	/* systems with ASPM and others may see the checksum fail on the first
7215 	 * attempt. Let's give it a few tries
7216 	 */
7217 	for (i = 0;; i++) {
7218 		if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
7219 			break;
7220 		if (i == 2) {
7221 			dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
7222 			err = -EIO;
7223 			goto err_eeprom;
7224 		}
7225 	}
7226 
7227 	e1000_eeprom_checks(adapter);
7228 
7229 	/* copy the MAC address */
7230 	if (e1000e_read_mac_addr(&adapter->hw))
7231 		dev_err(&pdev->dev,
7232 			"NVM Read Error while reading MAC address\n");
7233 
7234 	memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
7235 
7236 	if (!is_valid_ether_addr(netdev->dev_addr)) {
7237 		dev_err(&pdev->dev, "Invalid MAC Address: %pM\n",
7238 			netdev->dev_addr);
7239 		err = -EIO;
7240 		goto err_eeprom;
7241 	}
7242 
7243 	timer_setup(&adapter->watchdog_timer, e1000_watchdog, 0);
7244 	timer_setup(&adapter->phy_info_timer, e1000_update_phy_info, 0);
7245 
7246 	INIT_WORK(&adapter->reset_task, e1000_reset_task);
7247 	INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
7248 	INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
7249 	INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
7250 	INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
7251 
7252 	/* Initialize link parameters. User can change them with ethtool */
7253 	adapter->hw.mac.autoneg = 1;
7254 	adapter->fc_autoneg = true;
7255 	adapter->hw.fc.requested_mode = e1000_fc_default;
7256 	adapter->hw.fc.current_mode = e1000_fc_default;
7257 	adapter->hw.phy.autoneg_advertised = 0x2f;
7258 
7259 	/* Initial Wake on LAN setting - If APM wake is enabled in
7260 	 * the EEPROM, enable the ACPI Magic Packet filter
7261 	 */
7262 	if (adapter->flags & FLAG_APME_IN_WUC) {
7263 		/* APME bit in EEPROM is mapped to WUC.APME */
7264 		eeprom_data = er32(WUC);
7265 		eeprom_apme_mask = E1000_WUC_APME;
7266 		if ((hw->mac.type > e1000_ich10lan) &&
7267 		    (eeprom_data & E1000_WUC_PHY_WAKE))
7268 			adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
7269 	} else if (adapter->flags & FLAG_APME_IN_CTRL3) {
7270 		if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
7271 		    (adapter->hw.bus.func == 1))
7272 			ret_val = e1000_read_nvm(&adapter->hw,
7273 					      NVM_INIT_CONTROL3_PORT_B,
7274 					      1, &eeprom_data);
7275 		else
7276 			ret_val = e1000_read_nvm(&adapter->hw,
7277 					      NVM_INIT_CONTROL3_PORT_A,
7278 					      1, &eeprom_data);
7279 	}
7280 
7281 	/* fetch WoL from EEPROM */
7282 	if (ret_val)
7283 		e_dbg("NVM read error getting WoL initial values: %d\n", ret_val);
7284 	else if (eeprom_data & eeprom_apme_mask)
7285 		adapter->eeprom_wol |= E1000_WUFC_MAG;
7286 
7287 	/* now that we have the eeprom settings, apply the special cases
7288 	 * where the eeprom may be wrong or the board simply won't support
7289 	 * wake on lan on a particular port
7290 	 */
7291 	if (!(adapter->flags & FLAG_HAS_WOL))
7292 		adapter->eeprom_wol = 0;
7293 
7294 	/* initialize the wol settings based on the eeprom settings */
7295 	adapter->wol = adapter->eeprom_wol;
7296 
7297 	/* make sure adapter isn't asleep if manageability is enabled */
7298 	if (adapter->wol || (adapter->flags & FLAG_MNG_PT_ENABLED) ||
7299 	    (hw->mac.ops.check_mng_mode(hw)))
7300 		device_wakeup_enable(&pdev->dev);
7301 
7302 	/* save off EEPROM version number */
7303 	ret_val = e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
7304 
7305 	if (ret_val) {
7306 		e_dbg("NVM read error getting EEPROM version: %d\n", ret_val);
7307 		adapter->eeprom_vers = 0;
7308 	}
7309 
7310 	/* init PTP hardware clock */
7311 	e1000e_ptp_init(adapter);
7312 
7313 	/* reset the hardware with the new settings */
7314 	e1000e_reset(adapter);
7315 
7316 	/* If the controller has AMT, do not set DRV_LOAD until the interface
7317 	 * is up.  For all other cases, let the f/w know that the h/w is now
7318 	 * under the control of the driver.
7319 	 */
7320 	if (!(adapter->flags & FLAG_HAS_AMT))
7321 		e1000e_get_hw_control(adapter);
7322 
7323 	strlcpy(netdev->name, "eth%d", sizeof(netdev->name));
7324 	err = register_netdev(netdev);
7325 	if (err)
7326 		goto err_register;
7327 
7328 	/* carrier off reporting is important to ethtool even BEFORE open */
7329 	netif_carrier_off(netdev);
7330 
7331 	e1000_print_device_info(adapter);
7332 
7333 	if (pci_dev_run_wake(pdev))
7334 		pm_runtime_put_noidle(&pdev->dev);
7335 
7336 	return 0;
7337 
7338 err_register:
7339 	if (!(adapter->flags & FLAG_HAS_AMT))
7340 		e1000e_release_hw_control(adapter);
7341 err_eeprom:
7342 	if (hw->phy.ops.check_reset_block && !hw->phy.ops.check_reset_block(hw))
7343 		e1000_phy_hw_reset(&adapter->hw);
7344 err_hw_init:
7345 	kfree(adapter->tx_ring);
7346 	kfree(adapter->rx_ring);
7347 err_sw_init:
7348 	if ((adapter->hw.flash_address) && (hw->mac.type < e1000_pch_spt))
7349 		iounmap(adapter->hw.flash_address);
7350 	e1000e_reset_interrupt_capability(adapter);
7351 err_flashmap:
7352 	iounmap(adapter->hw.hw_addr);
7353 err_ioremap:
7354 	free_netdev(netdev);
7355 err_alloc_etherdev:
7356 	pci_release_mem_regions(pdev);
7357 err_pci_reg:
7358 err_dma:
7359 	pci_disable_device(pdev);
7360 	return err;
7361 }
7362 
7363 /**
7364  * e1000_remove - Device Removal Routine
7365  * @pdev: PCI device information struct
7366  *
7367  * e1000_remove is called by the PCI subsystem to alert the driver
7368  * that it should release a PCI device.  The could be caused by a
7369  * Hot-Plug event, or because the driver is going to be removed from
7370  * memory.
7371  **/
7372 static void e1000_remove(struct pci_dev *pdev)
7373 {
7374 	struct net_device *netdev = pci_get_drvdata(pdev);
7375 	struct e1000_adapter *adapter = netdev_priv(netdev);
7376 	bool down = test_bit(__E1000_DOWN, &adapter->state);
7377 
7378 	e1000e_ptp_remove(adapter);
7379 
7380 	/* The timers may be rescheduled, so explicitly disable them
7381 	 * from being rescheduled.
7382 	 */
7383 	if (!down)
7384 		set_bit(__E1000_DOWN, &adapter->state);
7385 	del_timer_sync(&adapter->watchdog_timer);
7386 	del_timer_sync(&adapter->phy_info_timer);
7387 
7388 	cancel_work_sync(&adapter->reset_task);
7389 	cancel_work_sync(&adapter->watchdog_task);
7390 	cancel_work_sync(&adapter->downshift_task);
7391 	cancel_work_sync(&adapter->update_phy_task);
7392 	cancel_work_sync(&adapter->print_hang_task);
7393 
7394 	if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
7395 		cancel_work_sync(&adapter->tx_hwtstamp_work);
7396 		if (adapter->tx_hwtstamp_skb) {
7397 			dev_consume_skb_any(adapter->tx_hwtstamp_skb);
7398 			adapter->tx_hwtstamp_skb = NULL;
7399 		}
7400 	}
7401 
7402 	/* Don't lie to e1000_close() down the road. */
7403 	if (!down)
7404 		clear_bit(__E1000_DOWN, &adapter->state);
7405 	unregister_netdev(netdev);
7406 
7407 	if (pci_dev_run_wake(pdev))
7408 		pm_runtime_get_noresume(&pdev->dev);
7409 
7410 	/* Release control of h/w to f/w.  If f/w is AMT enabled, this
7411 	 * would have already happened in close and is redundant.
7412 	 */
7413 	e1000e_release_hw_control(adapter);
7414 
7415 	e1000e_reset_interrupt_capability(adapter);
7416 	kfree(adapter->tx_ring);
7417 	kfree(adapter->rx_ring);
7418 
7419 	iounmap(adapter->hw.hw_addr);
7420 	if ((adapter->hw.flash_address) &&
7421 	    (adapter->hw.mac.type < e1000_pch_spt))
7422 		iounmap(adapter->hw.flash_address);
7423 	pci_release_mem_regions(pdev);
7424 
7425 	free_netdev(netdev);
7426 
7427 	/* AER disable */
7428 	pci_disable_pcie_error_reporting(pdev);
7429 
7430 	pci_disable_device(pdev);
7431 }
7432 
7433 /* PCI Error Recovery (ERS) */
7434 static const struct pci_error_handlers e1000_err_handler = {
7435 	.error_detected = e1000_io_error_detected,
7436 	.slot_reset = e1000_io_slot_reset,
7437 	.resume = e1000_io_resume,
7438 };
7439 
7440 static const struct pci_device_id e1000_pci_tbl[] = {
7441 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
7442 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
7443 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
7444 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP),
7445 	  board_82571 },
7446 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
7447 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
7448 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
7449 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
7450 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
7451 
7452 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
7453 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
7454 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
7455 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
7456 
7457 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
7458 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
7459 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
7460 
7461 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
7462 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
7463 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
7464 
7465 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
7466 	  board_80003es2lan },
7467 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
7468 	  board_80003es2lan },
7469 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
7470 	  board_80003es2lan },
7471 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
7472 	  board_80003es2lan },
7473 
7474 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
7475 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
7476 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
7477 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
7478 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
7479 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
7480 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
7481 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
7482 
7483 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
7484 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
7485 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
7486 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
7487 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
7488 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
7489 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
7490 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
7491 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
7492 
7493 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
7494 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
7495 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
7496 
7497 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
7498 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
7499 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
7500 
7501 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
7502 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
7503 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
7504 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
7505 
7506 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
7507 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
7508 
7509 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt },
7510 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt },
7511 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_LM), board_pch_lpt },
7512 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_V), board_pch_lpt },
7513 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM2), board_pch_lpt },
7514 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V2), board_pch_lpt },
7515 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM3), board_pch_lpt },
7516 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V3), board_pch_lpt },
7517 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM), board_pch_spt },
7518 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V), board_pch_spt },
7519 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM2), board_pch_spt },
7520 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V2), board_pch_spt },
7521 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LBG_I219_LM3), board_pch_spt },
7522 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM4), board_pch_spt },
7523 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V4), board_pch_spt },
7524 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM5), board_pch_spt },
7525 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V5), board_pch_spt },
7526 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_LM6), board_pch_cnp },
7527 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_V6), board_pch_cnp },
7528 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_LM7), board_pch_cnp },
7529 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_V7), board_pch_cnp },
7530 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_LM8), board_pch_cnp },
7531 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V8), board_pch_cnp },
7532 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_LM9), board_pch_cnp },
7533 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V9), board_pch_cnp },
7534 
7535 	{ 0, 0, 0, 0, 0, 0, 0 }	/* terminate list */
7536 };
7537 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
7538 
7539 static const struct dev_pm_ops e1000_pm_ops = {
7540 #ifdef CONFIG_PM_SLEEP
7541 	.suspend	= e1000e_pm_suspend,
7542 	.resume		= e1000e_pm_resume,
7543 	.freeze		= e1000e_pm_freeze,
7544 	.thaw		= e1000e_pm_thaw,
7545 	.poweroff	= e1000e_pm_suspend,
7546 	.restore	= e1000e_pm_resume,
7547 #endif
7548 	SET_RUNTIME_PM_OPS(e1000e_pm_runtime_suspend, e1000e_pm_runtime_resume,
7549 			   e1000e_pm_runtime_idle)
7550 };
7551 
7552 /* PCI Device API Driver */
7553 static struct pci_driver e1000_driver = {
7554 	.name     = e1000e_driver_name,
7555 	.id_table = e1000_pci_tbl,
7556 	.probe    = e1000_probe,
7557 	.remove   = e1000_remove,
7558 	.driver   = {
7559 		.pm = &e1000_pm_ops,
7560 	},
7561 	.shutdown = e1000_shutdown,
7562 	.err_handler = &e1000_err_handler
7563 };
7564 
7565 /**
7566  * e1000_init_module - Driver Registration Routine
7567  *
7568  * e1000_init_module is the first routine called when the driver is
7569  * loaded. All it does is register with the PCI subsystem.
7570  **/
7571 static int __init e1000_init_module(void)
7572 {
7573 	pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
7574 		e1000e_driver_version);
7575 	pr_info("Copyright(c) 1999 - 2015 Intel Corporation.\n");
7576 
7577 	return pci_register_driver(&e1000_driver);
7578 }
7579 module_init(e1000_init_module);
7580 
7581 /**
7582  * e1000_exit_module - Driver Exit Cleanup Routine
7583  *
7584  * e1000_exit_module is called just before the driver is removed
7585  * from memory.
7586  **/
7587 static void __exit e1000_exit_module(void)
7588 {
7589 	pci_unregister_driver(&e1000_driver);
7590 }
7591 module_exit(e1000_exit_module);
7592 
7593 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
7594 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
7595 MODULE_LICENSE("GPL");
7596 MODULE_VERSION(DRV_VERSION);
7597 
7598 /* netdev.c */
7599