1 /******************************************************************************* 2 3 Intel PRO/1000 Linux driver 4 Copyright(c) 1999 - 2012 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, 8 version 2, as published by the Free Software Foundation. 9 10 This program is distributed in the hope it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 You should have received a copy of the GNU General Public License along with 16 this program; if not, write to the Free Software Foundation, Inc., 17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 18 19 The full GNU General Public License is included in this distribution in 20 the file called "COPYING". 21 22 Contact Information: 23 Linux NICS <linux.nics@intel.com> 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 26 27 *******************************************************************************/ 28 29 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 30 31 #include <linux/module.h> 32 #include <linux/types.h> 33 #include <linux/init.h> 34 #include <linux/pci.h> 35 #include <linux/vmalloc.h> 36 #include <linux/pagemap.h> 37 #include <linux/delay.h> 38 #include <linux/netdevice.h> 39 #include <linux/interrupt.h> 40 #include <linux/tcp.h> 41 #include <linux/ipv6.h> 42 #include <linux/slab.h> 43 #include <net/checksum.h> 44 #include <net/ip6_checksum.h> 45 #include <linux/mii.h> 46 #include <linux/ethtool.h> 47 #include <linux/if_vlan.h> 48 #include <linux/cpu.h> 49 #include <linux/smp.h> 50 #include <linux/pm_qos.h> 51 #include <linux/pm_runtime.h> 52 #include <linux/aer.h> 53 #include <linux/prefetch.h> 54 55 #include "e1000.h" 56 57 #define DRV_EXTRAVERSION "-k" 58 59 #define DRV_VERSION "2.0.0" DRV_EXTRAVERSION 60 char e1000e_driver_name[] = "e1000e"; 61 const char e1000e_driver_version[] = DRV_VERSION; 62 63 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK) 64 static int debug = -1; 65 module_param(debug, int, 0); 66 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); 67 68 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state); 69 70 static const struct e1000_info *e1000_info_tbl[] = { 71 [board_82571] = &e1000_82571_info, 72 [board_82572] = &e1000_82572_info, 73 [board_82573] = &e1000_82573_info, 74 [board_82574] = &e1000_82574_info, 75 [board_82583] = &e1000_82583_info, 76 [board_80003es2lan] = &e1000_es2_info, 77 [board_ich8lan] = &e1000_ich8_info, 78 [board_ich9lan] = &e1000_ich9_info, 79 [board_ich10lan] = &e1000_ich10_info, 80 [board_pchlan] = &e1000_pch_info, 81 [board_pch2lan] = &e1000_pch2_info, 82 [board_pch_lpt] = &e1000_pch_lpt_info, 83 }; 84 85 struct e1000_reg_info { 86 u32 ofs; 87 char *name; 88 }; 89 90 #define E1000_RDFH 0x02410 /* Rx Data FIFO Head - RW */ 91 #define E1000_RDFT 0x02418 /* Rx Data FIFO Tail - RW */ 92 #define E1000_RDFHS 0x02420 /* Rx Data FIFO Head Saved - RW */ 93 #define E1000_RDFTS 0x02428 /* Rx Data FIFO Tail Saved - RW */ 94 #define E1000_RDFPC 0x02430 /* Rx Data FIFO Packet Count - RW */ 95 96 #define E1000_TDFH 0x03410 /* Tx Data FIFO Head - RW */ 97 #define E1000_TDFT 0x03418 /* Tx Data FIFO Tail - RW */ 98 #define E1000_TDFHS 0x03420 /* Tx Data FIFO Head Saved - RW */ 99 #define E1000_TDFTS 0x03428 /* Tx Data FIFO Tail Saved - RW */ 100 #define E1000_TDFPC 0x03430 /* Tx Data FIFO Packet Count - RW */ 101 102 static const struct e1000_reg_info e1000_reg_info_tbl[] = { 103 104 /* General Registers */ 105 {E1000_CTRL, "CTRL"}, 106 {E1000_STATUS, "STATUS"}, 107 {E1000_CTRL_EXT, "CTRL_EXT"}, 108 109 /* Interrupt Registers */ 110 {E1000_ICR, "ICR"}, 111 112 /* Rx Registers */ 113 {E1000_RCTL, "RCTL"}, 114 {E1000_RDLEN(0), "RDLEN"}, 115 {E1000_RDH(0), "RDH"}, 116 {E1000_RDT(0), "RDT"}, 117 {E1000_RDTR, "RDTR"}, 118 {E1000_RXDCTL(0), "RXDCTL"}, 119 {E1000_ERT, "ERT"}, 120 {E1000_RDBAL(0), "RDBAL"}, 121 {E1000_RDBAH(0), "RDBAH"}, 122 {E1000_RDFH, "RDFH"}, 123 {E1000_RDFT, "RDFT"}, 124 {E1000_RDFHS, "RDFHS"}, 125 {E1000_RDFTS, "RDFTS"}, 126 {E1000_RDFPC, "RDFPC"}, 127 128 /* Tx Registers */ 129 {E1000_TCTL, "TCTL"}, 130 {E1000_TDBAL(0), "TDBAL"}, 131 {E1000_TDBAH(0), "TDBAH"}, 132 {E1000_TDLEN(0), "TDLEN"}, 133 {E1000_TDH(0), "TDH"}, 134 {E1000_TDT(0), "TDT"}, 135 {E1000_TIDV, "TIDV"}, 136 {E1000_TXDCTL(0), "TXDCTL"}, 137 {E1000_TADV, "TADV"}, 138 {E1000_TARC(0), "TARC"}, 139 {E1000_TDFH, "TDFH"}, 140 {E1000_TDFT, "TDFT"}, 141 {E1000_TDFHS, "TDFHS"}, 142 {E1000_TDFTS, "TDFTS"}, 143 {E1000_TDFPC, "TDFPC"}, 144 145 /* List Terminator */ 146 {0, NULL} 147 }; 148 149 /* 150 * e1000_regdump - register printout routine 151 */ 152 static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo) 153 { 154 int n = 0; 155 char rname[16]; 156 u32 regs[8]; 157 158 switch (reginfo->ofs) { 159 case E1000_RXDCTL(0): 160 for (n = 0; n < 2; n++) 161 regs[n] = __er32(hw, E1000_RXDCTL(n)); 162 break; 163 case E1000_TXDCTL(0): 164 for (n = 0; n < 2; n++) 165 regs[n] = __er32(hw, E1000_TXDCTL(n)); 166 break; 167 case E1000_TARC(0): 168 for (n = 0; n < 2; n++) 169 regs[n] = __er32(hw, E1000_TARC(n)); 170 break; 171 default: 172 pr_info("%-15s %08x\n", 173 reginfo->name, __er32(hw, reginfo->ofs)); 174 return; 175 } 176 177 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]"); 178 pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]); 179 } 180 181 /* 182 * e1000e_dump - Print registers, Tx-ring and Rx-ring 183 */ 184 static void e1000e_dump(struct e1000_adapter *adapter) 185 { 186 struct net_device *netdev = adapter->netdev; 187 struct e1000_hw *hw = &adapter->hw; 188 struct e1000_reg_info *reginfo; 189 struct e1000_ring *tx_ring = adapter->tx_ring; 190 struct e1000_tx_desc *tx_desc; 191 struct my_u0 { 192 __le64 a; 193 __le64 b; 194 } *u0; 195 struct e1000_buffer *buffer_info; 196 struct e1000_ring *rx_ring = adapter->rx_ring; 197 union e1000_rx_desc_packet_split *rx_desc_ps; 198 union e1000_rx_desc_extended *rx_desc; 199 struct my_u1 { 200 __le64 a; 201 __le64 b; 202 __le64 c; 203 __le64 d; 204 } *u1; 205 u32 staterr; 206 int i = 0; 207 208 if (!netif_msg_hw(adapter)) 209 return; 210 211 /* Print netdevice Info */ 212 if (netdev) { 213 dev_info(&adapter->pdev->dev, "Net device Info\n"); 214 pr_info("Device Name state trans_start last_rx\n"); 215 pr_info("%-15s %016lX %016lX %016lX\n", 216 netdev->name, netdev->state, netdev->trans_start, 217 netdev->last_rx); 218 } 219 220 /* Print Registers */ 221 dev_info(&adapter->pdev->dev, "Register Dump\n"); 222 pr_info(" Register Name Value\n"); 223 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl; 224 reginfo->name; reginfo++) { 225 e1000_regdump(hw, reginfo); 226 } 227 228 /* Print Tx Ring Summary */ 229 if (!netdev || !netif_running(netdev)) 230 return; 231 232 dev_info(&adapter->pdev->dev, "Tx Ring Summary\n"); 233 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n"); 234 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean]; 235 pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n", 236 0, tx_ring->next_to_use, tx_ring->next_to_clean, 237 (unsigned long long)buffer_info->dma, 238 buffer_info->length, 239 buffer_info->next_to_watch, 240 (unsigned long long)buffer_info->time_stamp); 241 242 /* Print Tx Ring */ 243 if (!netif_msg_tx_done(adapter)) 244 goto rx_ring_summary; 245 246 dev_info(&adapter->pdev->dev, "Tx Ring Dump\n"); 247 248 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended) 249 * 250 * Legacy Transmit Descriptor 251 * +--------------------------------------------------------------+ 252 * 0 | Buffer Address [63:0] (Reserved on Write Back) | 253 * +--------------------------------------------------------------+ 254 * 8 | Special | CSS | Status | CMD | CSO | Length | 255 * +--------------------------------------------------------------+ 256 * 63 48 47 36 35 32 31 24 23 16 15 0 257 * 258 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload 259 * 63 48 47 40 39 32 31 16 15 8 7 0 260 * +----------------------------------------------------------------+ 261 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS | 262 * +----------------------------------------------------------------+ 263 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN | 264 * +----------------------------------------------------------------+ 265 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0 266 * 267 * Extended Data Descriptor (DTYP=0x1) 268 * +----------------------------------------------------------------+ 269 * 0 | Buffer Address [63:0] | 270 * +----------------------------------------------------------------+ 271 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN | 272 * +----------------------------------------------------------------+ 273 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0 274 */ 275 pr_info("Tl[desc] [address 63:0 ] [SpeCssSCmCsLen] [bi->dma ] leng ntw timestamp bi->skb <-- Legacy format\n"); 276 pr_info("Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Context format\n"); 277 pr_info("Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Data format\n"); 278 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) { 279 const char *next_desc; 280 tx_desc = E1000_TX_DESC(*tx_ring, i); 281 buffer_info = &tx_ring->buffer_info[i]; 282 u0 = (struct my_u0 *)tx_desc; 283 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean) 284 next_desc = " NTC/U"; 285 else if (i == tx_ring->next_to_use) 286 next_desc = " NTU"; 287 else if (i == tx_ring->next_to_clean) 288 next_desc = " NTC"; 289 else 290 next_desc = ""; 291 pr_info("T%c[0x%03X] %016llX %016llX %016llX %04X %3X %016llX %p%s\n", 292 (!(le64_to_cpu(u0->b) & (1 << 29)) ? 'l' : 293 ((le64_to_cpu(u0->b) & (1 << 20)) ? 'd' : 'c')), 294 i, 295 (unsigned long long)le64_to_cpu(u0->a), 296 (unsigned long long)le64_to_cpu(u0->b), 297 (unsigned long long)buffer_info->dma, 298 buffer_info->length, buffer_info->next_to_watch, 299 (unsigned long long)buffer_info->time_stamp, 300 buffer_info->skb, next_desc); 301 302 if (netif_msg_pktdata(adapter) && buffer_info->dma != 0) 303 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS, 304 16, 1, phys_to_virt(buffer_info->dma), 305 buffer_info->length, true); 306 } 307 308 /* Print Rx Ring Summary */ 309 rx_ring_summary: 310 dev_info(&adapter->pdev->dev, "Rx Ring Summary\n"); 311 pr_info("Queue [NTU] [NTC]\n"); 312 pr_info(" %5d %5X %5X\n", 313 0, rx_ring->next_to_use, rx_ring->next_to_clean); 314 315 /* Print Rx Ring */ 316 if (!netif_msg_rx_status(adapter)) 317 return; 318 319 dev_info(&adapter->pdev->dev, "Rx Ring Dump\n"); 320 switch (adapter->rx_ps_pages) { 321 case 1: 322 case 2: 323 case 3: 324 /* [Extended] Packet Split Receive Descriptor Format 325 * 326 * +-----------------------------------------------------+ 327 * 0 | Buffer Address 0 [63:0] | 328 * +-----------------------------------------------------+ 329 * 8 | Buffer Address 1 [63:0] | 330 * +-----------------------------------------------------+ 331 * 16 | Buffer Address 2 [63:0] | 332 * +-----------------------------------------------------+ 333 * 24 | Buffer Address 3 [63:0] | 334 * +-----------------------------------------------------+ 335 */ 336 pr_info("R [desc] [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] [bi->skb] <-- Ext Pkt Split format\n"); 337 /* [Extended] Receive Descriptor (Write-Back) Format 338 * 339 * 63 48 47 32 31 13 12 8 7 4 3 0 340 * +------------------------------------------------------+ 341 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS | 342 * | Checksum | Ident | | Queue | | Type | 343 * +------------------------------------------------------+ 344 * 8 | VLAN Tag | Length | Extended Error | Extended Status | 345 * +------------------------------------------------------+ 346 * 63 48 47 32 31 20 19 0 347 */ 348 pr_info("RWB[desc] [ck ipid mrqhsh] [vl l0 ee es] [ l3 l2 l1 hs] [reserved ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n"); 349 for (i = 0; i < rx_ring->count; i++) { 350 const char *next_desc; 351 buffer_info = &rx_ring->buffer_info[i]; 352 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i); 353 u1 = (struct my_u1 *)rx_desc_ps; 354 staterr = 355 le32_to_cpu(rx_desc_ps->wb.middle.status_error); 356 357 if (i == rx_ring->next_to_use) 358 next_desc = " NTU"; 359 else if (i == rx_ring->next_to_clean) 360 next_desc = " NTC"; 361 else 362 next_desc = ""; 363 364 if (staterr & E1000_RXD_STAT_DD) { 365 /* Descriptor Done */ 366 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX ---------------- %p%s\n", 367 "RWB", i, 368 (unsigned long long)le64_to_cpu(u1->a), 369 (unsigned long long)le64_to_cpu(u1->b), 370 (unsigned long long)le64_to_cpu(u1->c), 371 (unsigned long long)le64_to_cpu(u1->d), 372 buffer_info->skb, next_desc); 373 } else { 374 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX %016llX %p%s\n", 375 "R ", i, 376 (unsigned long long)le64_to_cpu(u1->a), 377 (unsigned long long)le64_to_cpu(u1->b), 378 (unsigned long long)le64_to_cpu(u1->c), 379 (unsigned long long)le64_to_cpu(u1->d), 380 (unsigned long long)buffer_info->dma, 381 buffer_info->skb, next_desc); 382 383 if (netif_msg_pktdata(adapter)) 384 print_hex_dump(KERN_INFO, "", 385 DUMP_PREFIX_ADDRESS, 16, 1, 386 phys_to_virt(buffer_info->dma), 387 adapter->rx_ps_bsize0, true); 388 } 389 } 390 break; 391 default: 392 case 0: 393 /* Extended Receive Descriptor (Read) Format 394 * 395 * +-----------------------------------------------------+ 396 * 0 | Buffer Address [63:0] | 397 * +-----------------------------------------------------+ 398 * 8 | Reserved | 399 * +-----------------------------------------------------+ 400 */ 401 pr_info("R [desc] [buf addr 63:0 ] [reserved 63:0 ] [bi->dma ] [bi->skb] <-- Ext (Read) format\n"); 402 /* Extended Receive Descriptor (Write-Back) Format 403 * 404 * 63 48 47 32 31 24 23 4 3 0 405 * +------------------------------------------------------+ 406 * | RSS Hash | | | | 407 * 0 +-------------------+ Rsvd | Reserved | MRQ RSS | 408 * | Packet | IP | | | Type | 409 * | Checksum | Ident | | | | 410 * +------------------------------------------------------+ 411 * 8 | VLAN Tag | Length | Extended Error | Extended Status | 412 * +------------------------------------------------------+ 413 * 63 48 47 32 31 20 19 0 414 */ 415 pr_info("RWB[desc] [cs ipid mrq] [vt ln xe xs] [bi->skb] <-- Ext (Write-Back) format\n"); 416 417 for (i = 0; i < rx_ring->count; i++) { 418 const char *next_desc; 419 420 buffer_info = &rx_ring->buffer_info[i]; 421 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); 422 u1 = (struct my_u1 *)rx_desc; 423 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 424 425 if (i == rx_ring->next_to_use) 426 next_desc = " NTU"; 427 else if (i == rx_ring->next_to_clean) 428 next_desc = " NTC"; 429 else 430 next_desc = ""; 431 432 if (staterr & E1000_RXD_STAT_DD) { 433 /* Descriptor Done */ 434 pr_info("%s[0x%03X] %016llX %016llX ---------------- %p%s\n", 435 "RWB", i, 436 (unsigned long long)le64_to_cpu(u1->a), 437 (unsigned long long)le64_to_cpu(u1->b), 438 buffer_info->skb, next_desc); 439 } else { 440 pr_info("%s[0x%03X] %016llX %016llX %016llX %p%s\n", 441 "R ", i, 442 (unsigned long long)le64_to_cpu(u1->a), 443 (unsigned long long)le64_to_cpu(u1->b), 444 (unsigned long long)buffer_info->dma, 445 buffer_info->skb, next_desc); 446 447 if (netif_msg_pktdata(adapter)) 448 print_hex_dump(KERN_INFO, "", 449 DUMP_PREFIX_ADDRESS, 16, 450 1, 451 phys_to_virt 452 (buffer_info->dma), 453 adapter->rx_buffer_len, 454 true); 455 } 456 } 457 } 458 } 459 460 /** 461 * e1000_desc_unused - calculate if we have unused descriptors 462 **/ 463 static int e1000_desc_unused(struct e1000_ring *ring) 464 { 465 if (ring->next_to_clean > ring->next_to_use) 466 return ring->next_to_clean - ring->next_to_use - 1; 467 468 return ring->count + ring->next_to_clean - ring->next_to_use - 1; 469 } 470 471 /** 472 * e1000_receive_skb - helper function to handle Rx indications 473 * @adapter: board private structure 474 * @status: descriptor status field as written by hardware 475 * @vlan: descriptor vlan field as written by hardware (no le/be conversion) 476 * @skb: pointer to sk_buff to be indicated to stack 477 **/ 478 static void e1000_receive_skb(struct e1000_adapter *adapter, 479 struct net_device *netdev, struct sk_buff *skb, 480 u8 status, __le16 vlan) 481 { 482 u16 tag = le16_to_cpu(vlan); 483 skb->protocol = eth_type_trans(skb, netdev); 484 485 if (status & E1000_RXD_STAT_VP) 486 __vlan_hwaccel_put_tag(skb, tag); 487 488 napi_gro_receive(&adapter->napi, skb); 489 } 490 491 /** 492 * e1000_rx_checksum - Receive Checksum Offload 493 * @adapter: board private structure 494 * @status_err: receive descriptor status and error fields 495 * @csum: receive descriptor csum field 496 * @sk_buff: socket buffer with received data 497 **/ 498 static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err, 499 struct sk_buff *skb) 500 { 501 u16 status = (u16)status_err; 502 u8 errors = (u8)(status_err >> 24); 503 504 skb_checksum_none_assert(skb); 505 506 /* Rx checksum disabled */ 507 if (!(adapter->netdev->features & NETIF_F_RXCSUM)) 508 return; 509 510 /* Ignore Checksum bit is set */ 511 if (status & E1000_RXD_STAT_IXSM) 512 return; 513 514 /* TCP/UDP checksum error bit or IP checksum error bit is set */ 515 if (errors & (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) { 516 /* let the stack verify checksum errors */ 517 adapter->hw_csum_err++; 518 return; 519 } 520 521 /* TCP/UDP Checksum has not been calculated */ 522 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))) 523 return; 524 525 /* It must be a TCP or UDP packet with a valid checksum */ 526 skb->ip_summed = CHECKSUM_UNNECESSARY; 527 adapter->hw_csum_good++; 528 } 529 530 static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i) 531 { 532 struct e1000_adapter *adapter = rx_ring->adapter; 533 struct e1000_hw *hw = &adapter->hw; 534 s32 ret_val = __ew32_prepare(hw); 535 536 writel(i, rx_ring->tail); 537 538 if (unlikely(!ret_val && (i != readl(rx_ring->tail)))) { 539 u32 rctl = er32(RCTL); 540 ew32(RCTL, rctl & ~E1000_RCTL_EN); 541 e_err("ME firmware caused invalid RDT - resetting\n"); 542 schedule_work(&adapter->reset_task); 543 } 544 } 545 546 static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i) 547 { 548 struct e1000_adapter *adapter = tx_ring->adapter; 549 struct e1000_hw *hw = &adapter->hw; 550 s32 ret_val = __ew32_prepare(hw); 551 552 writel(i, tx_ring->tail); 553 554 if (unlikely(!ret_val && (i != readl(tx_ring->tail)))) { 555 u32 tctl = er32(TCTL); 556 ew32(TCTL, tctl & ~E1000_TCTL_EN); 557 e_err("ME firmware caused invalid TDT - resetting\n"); 558 schedule_work(&adapter->reset_task); 559 } 560 } 561 562 /** 563 * e1000_alloc_rx_buffers - Replace used receive buffers 564 * @rx_ring: Rx descriptor ring 565 **/ 566 static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring, 567 int cleaned_count, gfp_t gfp) 568 { 569 struct e1000_adapter *adapter = rx_ring->adapter; 570 struct net_device *netdev = adapter->netdev; 571 struct pci_dev *pdev = adapter->pdev; 572 union e1000_rx_desc_extended *rx_desc; 573 struct e1000_buffer *buffer_info; 574 struct sk_buff *skb; 575 unsigned int i; 576 unsigned int bufsz = adapter->rx_buffer_len; 577 578 i = rx_ring->next_to_use; 579 buffer_info = &rx_ring->buffer_info[i]; 580 581 while (cleaned_count--) { 582 skb = buffer_info->skb; 583 if (skb) { 584 skb_trim(skb, 0); 585 goto map_skb; 586 } 587 588 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp); 589 if (!skb) { 590 /* Better luck next round */ 591 adapter->alloc_rx_buff_failed++; 592 break; 593 } 594 595 buffer_info->skb = skb; 596 map_skb: 597 buffer_info->dma = dma_map_single(&pdev->dev, skb->data, 598 adapter->rx_buffer_len, 599 DMA_FROM_DEVICE); 600 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) { 601 dev_err(&pdev->dev, "Rx DMA map failed\n"); 602 adapter->rx_dma_failed++; 603 break; 604 } 605 606 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); 607 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma); 608 609 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) { 610 /* 611 * Force memory writes to complete before letting h/w 612 * know there are new descriptors to fetch. (Only 613 * applicable for weak-ordered memory model archs, 614 * such as IA-64). 615 */ 616 wmb(); 617 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) 618 e1000e_update_rdt_wa(rx_ring, i); 619 else 620 writel(i, rx_ring->tail); 621 } 622 i++; 623 if (i == rx_ring->count) 624 i = 0; 625 buffer_info = &rx_ring->buffer_info[i]; 626 } 627 628 rx_ring->next_to_use = i; 629 } 630 631 /** 632 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split 633 * @rx_ring: Rx descriptor ring 634 **/ 635 static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring, 636 int cleaned_count, gfp_t gfp) 637 { 638 struct e1000_adapter *adapter = rx_ring->adapter; 639 struct net_device *netdev = adapter->netdev; 640 struct pci_dev *pdev = adapter->pdev; 641 union e1000_rx_desc_packet_split *rx_desc; 642 struct e1000_buffer *buffer_info; 643 struct e1000_ps_page *ps_page; 644 struct sk_buff *skb; 645 unsigned int i, j; 646 647 i = rx_ring->next_to_use; 648 buffer_info = &rx_ring->buffer_info[i]; 649 650 while (cleaned_count--) { 651 rx_desc = E1000_RX_DESC_PS(*rx_ring, i); 652 653 for (j = 0; j < PS_PAGE_BUFFERS; j++) { 654 ps_page = &buffer_info->ps_pages[j]; 655 if (j >= adapter->rx_ps_pages) { 656 /* all unused desc entries get hw null ptr */ 657 rx_desc->read.buffer_addr[j + 1] = 658 ~cpu_to_le64(0); 659 continue; 660 } 661 if (!ps_page->page) { 662 ps_page->page = alloc_page(gfp); 663 if (!ps_page->page) { 664 adapter->alloc_rx_buff_failed++; 665 goto no_buffers; 666 } 667 ps_page->dma = dma_map_page(&pdev->dev, 668 ps_page->page, 669 0, PAGE_SIZE, 670 DMA_FROM_DEVICE); 671 if (dma_mapping_error(&pdev->dev, 672 ps_page->dma)) { 673 dev_err(&adapter->pdev->dev, 674 "Rx DMA page map failed\n"); 675 adapter->rx_dma_failed++; 676 goto no_buffers; 677 } 678 } 679 /* 680 * Refresh the desc even if buffer_addrs 681 * didn't change because each write-back 682 * erases this info. 683 */ 684 rx_desc->read.buffer_addr[j + 1] = 685 cpu_to_le64(ps_page->dma); 686 } 687 688 skb = __netdev_alloc_skb_ip_align(netdev, 689 adapter->rx_ps_bsize0, 690 gfp); 691 692 if (!skb) { 693 adapter->alloc_rx_buff_failed++; 694 break; 695 } 696 697 buffer_info->skb = skb; 698 buffer_info->dma = dma_map_single(&pdev->dev, skb->data, 699 adapter->rx_ps_bsize0, 700 DMA_FROM_DEVICE); 701 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) { 702 dev_err(&pdev->dev, "Rx DMA map failed\n"); 703 adapter->rx_dma_failed++; 704 /* cleanup skb */ 705 dev_kfree_skb_any(skb); 706 buffer_info->skb = NULL; 707 break; 708 } 709 710 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma); 711 712 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) { 713 /* 714 * Force memory writes to complete before letting h/w 715 * know there are new descriptors to fetch. (Only 716 * applicable for weak-ordered memory model archs, 717 * such as IA-64). 718 */ 719 wmb(); 720 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) 721 e1000e_update_rdt_wa(rx_ring, i << 1); 722 else 723 writel(i << 1, rx_ring->tail); 724 } 725 726 i++; 727 if (i == rx_ring->count) 728 i = 0; 729 buffer_info = &rx_ring->buffer_info[i]; 730 } 731 732 no_buffers: 733 rx_ring->next_to_use = i; 734 } 735 736 /** 737 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers 738 * @rx_ring: Rx descriptor ring 739 * @cleaned_count: number of buffers to allocate this pass 740 **/ 741 742 static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring, 743 int cleaned_count, gfp_t gfp) 744 { 745 struct e1000_adapter *adapter = rx_ring->adapter; 746 struct net_device *netdev = adapter->netdev; 747 struct pci_dev *pdev = adapter->pdev; 748 union e1000_rx_desc_extended *rx_desc; 749 struct e1000_buffer *buffer_info; 750 struct sk_buff *skb; 751 unsigned int i; 752 unsigned int bufsz = 256 - 16 /* for skb_reserve */; 753 754 i = rx_ring->next_to_use; 755 buffer_info = &rx_ring->buffer_info[i]; 756 757 while (cleaned_count--) { 758 skb = buffer_info->skb; 759 if (skb) { 760 skb_trim(skb, 0); 761 goto check_page; 762 } 763 764 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp); 765 if (unlikely(!skb)) { 766 /* Better luck next round */ 767 adapter->alloc_rx_buff_failed++; 768 break; 769 } 770 771 buffer_info->skb = skb; 772 check_page: 773 /* allocate a new page if necessary */ 774 if (!buffer_info->page) { 775 buffer_info->page = alloc_page(gfp); 776 if (unlikely(!buffer_info->page)) { 777 adapter->alloc_rx_buff_failed++; 778 break; 779 } 780 } 781 782 if (!buffer_info->dma) 783 buffer_info->dma = dma_map_page(&pdev->dev, 784 buffer_info->page, 0, 785 PAGE_SIZE, 786 DMA_FROM_DEVICE); 787 788 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); 789 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma); 790 791 if (unlikely(++i == rx_ring->count)) 792 i = 0; 793 buffer_info = &rx_ring->buffer_info[i]; 794 } 795 796 if (likely(rx_ring->next_to_use != i)) { 797 rx_ring->next_to_use = i; 798 if (unlikely(i-- == 0)) 799 i = (rx_ring->count - 1); 800 801 /* Force memory writes to complete before letting h/w 802 * know there are new descriptors to fetch. (Only 803 * applicable for weak-ordered memory model archs, 804 * such as IA-64). */ 805 wmb(); 806 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) 807 e1000e_update_rdt_wa(rx_ring, i); 808 else 809 writel(i, rx_ring->tail); 810 } 811 } 812 813 static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss, 814 struct sk_buff *skb) 815 { 816 if (netdev->features & NETIF_F_RXHASH) 817 skb->rxhash = le32_to_cpu(rss); 818 } 819 820 /** 821 * e1000_clean_rx_irq - Send received data up the network stack 822 * @rx_ring: Rx descriptor ring 823 * 824 * the return value indicates whether actual cleaning was done, there 825 * is no guarantee that everything was cleaned 826 **/ 827 static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done, 828 int work_to_do) 829 { 830 struct e1000_adapter *adapter = rx_ring->adapter; 831 struct net_device *netdev = adapter->netdev; 832 struct pci_dev *pdev = adapter->pdev; 833 struct e1000_hw *hw = &adapter->hw; 834 union e1000_rx_desc_extended *rx_desc, *next_rxd; 835 struct e1000_buffer *buffer_info, *next_buffer; 836 u32 length, staterr; 837 unsigned int i; 838 int cleaned_count = 0; 839 bool cleaned = false; 840 unsigned int total_rx_bytes = 0, total_rx_packets = 0; 841 842 i = rx_ring->next_to_clean; 843 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); 844 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 845 buffer_info = &rx_ring->buffer_info[i]; 846 847 while (staterr & E1000_RXD_STAT_DD) { 848 struct sk_buff *skb; 849 850 if (*work_done >= work_to_do) 851 break; 852 (*work_done)++; 853 rmb(); /* read descriptor and rx_buffer_info after status DD */ 854 855 skb = buffer_info->skb; 856 buffer_info->skb = NULL; 857 858 prefetch(skb->data - NET_IP_ALIGN); 859 860 i++; 861 if (i == rx_ring->count) 862 i = 0; 863 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i); 864 prefetch(next_rxd); 865 866 next_buffer = &rx_ring->buffer_info[i]; 867 868 cleaned = true; 869 cleaned_count++; 870 dma_unmap_single(&pdev->dev, 871 buffer_info->dma, 872 adapter->rx_buffer_len, 873 DMA_FROM_DEVICE); 874 buffer_info->dma = 0; 875 876 length = le16_to_cpu(rx_desc->wb.upper.length); 877 878 /* 879 * !EOP means multiple descriptors were used to store a single 880 * packet, if that's the case we need to toss it. In fact, we 881 * need to toss every packet with the EOP bit clear and the 882 * next frame that _does_ have the EOP bit set, as it is by 883 * definition only a frame fragment 884 */ 885 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) 886 adapter->flags2 |= FLAG2_IS_DISCARDING; 887 888 if (adapter->flags2 & FLAG2_IS_DISCARDING) { 889 /* All receives must fit into a single buffer */ 890 e_dbg("Receive packet consumed multiple buffers\n"); 891 /* recycle */ 892 buffer_info->skb = skb; 893 if (staterr & E1000_RXD_STAT_EOP) 894 adapter->flags2 &= ~FLAG2_IS_DISCARDING; 895 goto next_desc; 896 } 897 898 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) && 899 !(netdev->features & NETIF_F_RXALL))) { 900 /* recycle */ 901 buffer_info->skb = skb; 902 goto next_desc; 903 } 904 905 /* adjust length to remove Ethernet CRC */ 906 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) { 907 /* If configured to store CRC, don't subtract FCS, 908 * but keep the FCS bytes out of the total_rx_bytes 909 * counter 910 */ 911 if (netdev->features & NETIF_F_RXFCS) 912 total_rx_bytes -= 4; 913 else 914 length -= 4; 915 } 916 917 total_rx_bytes += length; 918 total_rx_packets++; 919 920 /* 921 * code added for copybreak, this should improve 922 * performance for small packets with large amounts 923 * of reassembly being done in the stack 924 */ 925 if (length < copybreak) { 926 struct sk_buff *new_skb = 927 netdev_alloc_skb_ip_align(netdev, length); 928 if (new_skb) { 929 skb_copy_to_linear_data_offset(new_skb, 930 -NET_IP_ALIGN, 931 (skb->data - 932 NET_IP_ALIGN), 933 (length + 934 NET_IP_ALIGN)); 935 /* save the skb in buffer_info as good */ 936 buffer_info->skb = skb; 937 skb = new_skb; 938 } 939 /* else just continue with the old one */ 940 } 941 /* end copybreak code */ 942 skb_put(skb, length); 943 944 /* Receive Checksum Offload */ 945 e1000_rx_checksum(adapter, staterr, skb); 946 947 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb); 948 949 e1000_receive_skb(adapter, netdev, skb, staterr, 950 rx_desc->wb.upper.vlan); 951 952 next_desc: 953 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF); 954 955 /* return some buffers to hardware, one at a time is too slow */ 956 if (cleaned_count >= E1000_RX_BUFFER_WRITE) { 957 adapter->alloc_rx_buf(rx_ring, cleaned_count, 958 GFP_ATOMIC); 959 cleaned_count = 0; 960 } 961 962 /* use prefetched values */ 963 rx_desc = next_rxd; 964 buffer_info = next_buffer; 965 966 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 967 } 968 rx_ring->next_to_clean = i; 969 970 cleaned_count = e1000_desc_unused(rx_ring); 971 if (cleaned_count) 972 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC); 973 974 adapter->total_rx_bytes += total_rx_bytes; 975 adapter->total_rx_packets += total_rx_packets; 976 return cleaned; 977 } 978 979 static void e1000_put_txbuf(struct e1000_ring *tx_ring, 980 struct e1000_buffer *buffer_info) 981 { 982 struct e1000_adapter *adapter = tx_ring->adapter; 983 984 if (buffer_info->dma) { 985 if (buffer_info->mapped_as_page) 986 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma, 987 buffer_info->length, DMA_TO_DEVICE); 988 else 989 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma, 990 buffer_info->length, DMA_TO_DEVICE); 991 buffer_info->dma = 0; 992 } 993 if (buffer_info->skb) { 994 dev_kfree_skb_any(buffer_info->skb); 995 buffer_info->skb = NULL; 996 } 997 buffer_info->time_stamp = 0; 998 } 999 1000 static void e1000_print_hw_hang(struct work_struct *work) 1001 { 1002 struct e1000_adapter *adapter = container_of(work, 1003 struct e1000_adapter, 1004 print_hang_task); 1005 struct net_device *netdev = adapter->netdev; 1006 struct e1000_ring *tx_ring = adapter->tx_ring; 1007 unsigned int i = tx_ring->next_to_clean; 1008 unsigned int eop = tx_ring->buffer_info[i].next_to_watch; 1009 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop); 1010 struct e1000_hw *hw = &adapter->hw; 1011 u16 phy_status, phy_1000t_status, phy_ext_status; 1012 u16 pci_status; 1013 1014 if (test_bit(__E1000_DOWN, &adapter->state)) 1015 return; 1016 1017 if (!adapter->tx_hang_recheck && 1018 (adapter->flags2 & FLAG2_DMA_BURST)) { 1019 /* 1020 * May be block on write-back, flush and detect again 1021 * flush pending descriptor writebacks to memory 1022 */ 1023 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); 1024 /* execute the writes immediately */ 1025 e1e_flush(); 1026 /* 1027 * Due to rare timing issues, write to TIDV again to ensure 1028 * the write is successful 1029 */ 1030 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); 1031 /* execute the writes immediately */ 1032 e1e_flush(); 1033 adapter->tx_hang_recheck = true; 1034 return; 1035 } 1036 /* Real hang detected */ 1037 adapter->tx_hang_recheck = false; 1038 netif_stop_queue(netdev); 1039 1040 e1e_rphy(hw, PHY_STATUS, &phy_status); 1041 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status); 1042 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status); 1043 1044 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status); 1045 1046 /* detected Hardware unit hang */ 1047 e_err("Detected Hardware Unit Hang:\n" 1048 " TDH <%x>\n" 1049 " TDT <%x>\n" 1050 " next_to_use <%x>\n" 1051 " next_to_clean <%x>\n" 1052 "buffer_info[next_to_clean]:\n" 1053 " time_stamp <%lx>\n" 1054 " next_to_watch <%x>\n" 1055 " jiffies <%lx>\n" 1056 " next_to_watch.status <%x>\n" 1057 "MAC Status <%x>\n" 1058 "PHY Status <%x>\n" 1059 "PHY 1000BASE-T Status <%x>\n" 1060 "PHY Extended Status <%x>\n" 1061 "PCI Status <%x>\n", 1062 readl(tx_ring->head), 1063 readl(tx_ring->tail), 1064 tx_ring->next_to_use, 1065 tx_ring->next_to_clean, 1066 tx_ring->buffer_info[eop].time_stamp, 1067 eop, 1068 jiffies, 1069 eop_desc->upper.fields.status, 1070 er32(STATUS), 1071 phy_status, 1072 phy_1000t_status, 1073 phy_ext_status, 1074 pci_status); 1075 1076 /* Suggest workaround for known h/w issue */ 1077 if ((hw->mac.type == e1000_pchlan) && (er32(CTRL) & E1000_CTRL_TFCE)) 1078 e_err("Try turning off Tx pause (flow control) via ethtool\n"); 1079 } 1080 1081 /** 1082 * e1000_clean_tx_irq - Reclaim resources after transmit completes 1083 * @tx_ring: Tx descriptor ring 1084 * 1085 * the return value indicates whether actual cleaning was done, there 1086 * is no guarantee that everything was cleaned 1087 **/ 1088 static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring) 1089 { 1090 struct e1000_adapter *adapter = tx_ring->adapter; 1091 struct net_device *netdev = adapter->netdev; 1092 struct e1000_hw *hw = &adapter->hw; 1093 struct e1000_tx_desc *tx_desc, *eop_desc; 1094 struct e1000_buffer *buffer_info; 1095 unsigned int i, eop; 1096 unsigned int count = 0; 1097 unsigned int total_tx_bytes = 0, total_tx_packets = 0; 1098 unsigned int bytes_compl = 0, pkts_compl = 0; 1099 1100 i = tx_ring->next_to_clean; 1101 eop = tx_ring->buffer_info[i].next_to_watch; 1102 eop_desc = E1000_TX_DESC(*tx_ring, eop); 1103 1104 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) && 1105 (count < tx_ring->count)) { 1106 bool cleaned = false; 1107 rmb(); /* read buffer_info after eop_desc */ 1108 for (; !cleaned; count++) { 1109 tx_desc = E1000_TX_DESC(*tx_ring, i); 1110 buffer_info = &tx_ring->buffer_info[i]; 1111 cleaned = (i == eop); 1112 1113 if (cleaned) { 1114 total_tx_packets += buffer_info->segs; 1115 total_tx_bytes += buffer_info->bytecount; 1116 if (buffer_info->skb) { 1117 bytes_compl += buffer_info->skb->len; 1118 pkts_compl++; 1119 } 1120 } 1121 1122 e1000_put_txbuf(tx_ring, buffer_info); 1123 tx_desc->upper.data = 0; 1124 1125 i++; 1126 if (i == tx_ring->count) 1127 i = 0; 1128 } 1129 1130 if (i == tx_ring->next_to_use) 1131 break; 1132 eop = tx_ring->buffer_info[i].next_to_watch; 1133 eop_desc = E1000_TX_DESC(*tx_ring, eop); 1134 } 1135 1136 tx_ring->next_to_clean = i; 1137 1138 netdev_completed_queue(netdev, pkts_compl, bytes_compl); 1139 1140 #define TX_WAKE_THRESHOLD 32 1141 if (count && netif_carrier_ok(netdev) && 1142 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) { 1143 /* Make sure that anybody stopping the queue after this 1144 * sees the new next_to_clean. 1145 */ 1146 smp_mb(); 1147 1148 if (netif_queue_stopped(netdev) && 1149 !(test_bit(__E1000_DOWN, &adapter->state))) { 1150 netif_wake_queue(netdev); 1151 ++adapter->restart_queue; 1152 } 1153 } 1154 1155 if (adapter->detect_tx_hung) { 1156 /* 1157 * Detect a transmit hang in hardware, this serializes the 1158 * check with the clearing of time_stamp and movement of i 1159 */ 1160 adapter->detect_tx_hung = false; 1161 if (tx_ring->buffer_info[i].time_stamp && 1162 time_after(jiffies, tx_ring->buffer_info[i].time_stamp 1163 + (adapter->tx_timeout_factor * HZ)) && 1164 !(er32(STATUS) & E1000_STATUS_TXOFF)) 1165 schedule_work(&adapter->print_hang_task); 1166 else 1167 adapter->tx_hang_recheck = false; 1168 } 1169 adapter->total_tx_bytes += total_tx_bytes; 1170 adapter->total_tx_packets += total_tx_packets; 1171 return count < tx_ring->count; 1172 } 1173 1174 /** 1175 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split 1176 * @rx_ring: Rx descriptor ring 1177 * 1178 * the return value indicates whether actual cleaning was done, there 1179 * is no guarantee that everything was cleaned 1180 **/ 1181 static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done, 1182 int work_to_do) 1183 { 1184 struct e1000_adapter *adapter = rx_ring->adapter; 1185 struct e1000_hw *hw = &adapter->hw; 1186 union e1000_rx_desc_packet_split *rx_desc, *next_rxd; 1187 struct net_device *netdev = adapter->netdev; 1188 struct pci_dev *pdev = adapter->pdev; 1189 struct e1000_buffer *buffer_info, *next_buffer; 1190 struct e1000_ps_page *ps_page; 1191 struct sk_buff *skb; 1192 unsigned int i, j; 1193 u32 length, staterr; 1194 int cleaned_count = 0; 1195 bool cleaned = false; 1196 unsigned int total_rx_bytes = 0, total_rx_packets = 0; 1197 1198 i = rx_ring->next_to_clean; 1199 rx_desc = E1000_RX_DESC_PS(*rx_ring, i); 1200 staterr = le32_to_cpu(rx_desc->wb.middle.status_error); 1201 buffer_info = &rx_ring->buffer_info[i]; 1202 1203 while (staterr & E1000_RXD_STAT_DD) { 1204 if (*work_done >= work_to_do) 1205 break; 1206 (*work_done)++; 1207 skb = buffer_info->skb; 1208 rmb(); /* read descriptor and rx_buffer_info after status DD */ 1209 1210 /* in the packet split case this is header only */ 1211 prefetch(skb->data - NET_IP_ALIGN); 1212 1213 i++; 1214 if (i == rx_ring->count) 1215 i = 0; 1216 next_rxd = E1000_RX_DESC_PS(*rx_ring, i); 1217 prefetch(next_rxd); 1218 1219 next_buffer = &rx_ring->buffer_info[i]; 1220 1221 cleaned = true; 1222 cleaned_count++; 1223 dma_unmap_single(&pdev->dev, buffer_info->dma, 1224 adapter->rx_ps_bsize0, DMA_FROM_DEVICE); 1225 buffer_info->dma = 0; 1226 1227 /* see !EOP comment in other Rx routine */ 1228 if (!(staterr & E1000_RXD_STAT_EOP)) 1229 adapter->flags2 |= FLAG2_IS_DISCARDING; 1230 1231 if (adapter->flags2 & FLAG2_IS_DISCARDING) { 1232 e_dbg("Packet Split buffers didn't pick up the full packet\n"); 1233 dev_kfree_skb_irq(skb); 1234 if (staterr & E1000_RXD_STAT_EOP) 1235 adapter->flags2 &= ~FLAG2_IS_DISCARDING; 1236 goto next_desc; 1237 } 1238 1239 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) && 1240 !(netdev->features & NETIF_F_RXALL))) { 1241 dev_kfree_skb_irq(skb); 1242 goto next_desc; 1243 } 1244 1245 length = le16_to_cpu(rx_desc->wb.middle.length0); 1246 1247 if (!length) { 1248 e_dbg("Last part of the packet spanning multiple descriptors\n"); 1249 dev_kfree_skb_irq(skb); 1250 goto next_desc; 1251 } 1252 1253 /* Good Receive */ 1254 skb_put(skb, length); 1255 1256 { 1257 /* 1258 * this looks ugly, but it seems compiler issues make 1259 * it more efficient than reusing j 1260 */ 1261 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]); 1262 1263 /* 1264 * page alloc/put takes too long and effects small 1265 * packet throughput, so unsplit small packets and 1266 * save the alloc/put only valid in softirq (napi) 1267 * context to call kmap_* 1268 */ 1269 if (l1 && (l1 <= copybreak) && 1270 ((length + l1) <= adapter->rx_ps_bsize0)) { 1271 u8 *vaddr; 1272 1273 ps_page = &buffer_info->ps_pages[0]; 1274 1275 /* 1276 * there is no documentation about how to call 1277 * kmap_atomic, so we can't hold the mapping 1278 * very long 1279 */ 1280 dma_sync_single_for_cpu(&pdev->dev, 1281 ps_page->dma, 1282 PAGE_SIZE, 1283 DMA_FROM_DEVICE); 1284 vaddr = kmap_atomic(ps_page->page); 1285 memcpy(skb_tail_pointer(skb), vaddr, l1); 1286 kunmap_atomic(vaddr); 1287 dma_sync_single_for_device(&pdev->dev, 1288 ps_page->dma, 1289 PAGE_SIZE, 1290 DMA_FROM_DEVICE); 1291 1292 /* remove the CRC */ 1293 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) { 1294 if (!(netdev->features & NETIF_F_RXFCS)) 1295 l1 -= 4; 1296 } 1297 1298 skb_put(skb, l1); 1299 goto copydone; 1300 } /* if */ 1301 } 1302 1303 for (j = 0; j < PS_PAGE_BUFFERS; j++) { 1304 length = le16_to_cpu(rx_desc->wb.upper.length[j]); 1305 if (!length) 1306 break; 1307 1308 ps_page = &buffer_info->ps_pages[j]; 1309 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE, 1310 DMA_FROM_DEVICE); 1311 ps_page->dma = 0; 1312 skb_fill_page_desc(skb, j, ps_page->page, 0, length); 1313 ps_page->page = NULL; 1314 skb->len += length; 1315 skb->data_len += length; 1316 skb->truesize += PAGE_SIZE; 1317 } 1318 1319 /* strip the ethernet crc, problem is we're using pages now so 1320 * this whole operation can get a little cpu intensive 1321 */ 1322 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) { 1323 if (!(netdev->features & NETIF_F_RXFCS)) 1324 pskb_trim(skb, skb->len - 4); 1325 } 1326 1327 copydone: 1328 total_rx_bytes += skb->len; 1329 total_rx_packets++; 1330 1331 e1000_rx_checksum(adapter, staterr, skb); 1332 1333 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb); 1334 1335 if (rx_desc->wb.upper.header_status & 1336 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)) 1337 adapter->rx_hdr_split++; 1338 1339 e1000_receive_skb(adapter, netdev, skb, 1340 staterr, rx_desc->wb.middle.vlan); 1341 1342 next_desc: 1343 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF); 1344 buffer_info->skb = NULL; 1345 1346 /* return some buffers to hardware, one at a time is too slow */ 1347 if (cleaned_count >= E1000_RX_BUFFER_WRITE) { 1348 adapter->alloc_rx_buf(rx_ring, cleaned_count, 1349 GFP_ATOMIC); 1350 cleaned_count = 0; 1351 } 1352 1353 /* use prefetched values */ 1354 rx_desc = next_rxd; 1355 buffer_info = next_buffer; 1356 1357 staterr = le32_to_cpu(rx_desc->wb.middle.status_error); 1358 } 1359 rx_ring->next_to_clean = i; 1360 1361 cleaned_count = e1000_desc_unused(rx_ring); 1362 if (cleaned_count) 1363 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC); 1364 1365 adapter->total_rx_bytes += total_rx_bytes; 1366 adapter->total_rx_packets += total_rx_packets; 1367 return cleaned; 1368 } 1369 1370 /** 1371 * e1000_consume_page - helper function 1372 **/ 1373 static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb, 1374 u16 length) 1375 { 1376 bi->page = NULL; 1377 skb->len += length; 1378 skb->data_len += length; 1379 skb->truesize += PAGE_SIZE; 1380 } 1381 1382 /** 1383 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy 1384 * @adapter: board private structure 1385 * 1386 * the return value indicates whether actual cleaning was done, there 1387 * is no guarantee that everything was cleaned 1388 **/ 1389 static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done, 1390 int work_to_do) 1391 { 1392 struct e1000_adapter *adapter = rx_ring->adapter; 1393 struct net_device *netdev = adapter->netdev; 1394 struct pci_dev *pdev = adapter->pdev; 1395 union e1000_rx_desc_extended *rx_desc, *next_rxd; 1396 struct e1000_buffer *buffer_info, *next_buffer; 1397 u32 length, staterr; 1398 unsigned int i; 1399 int cleaned_count = 0; 1400 bool cleaned = false; 1401 unsigned int total_rx_bytes=0, total_rx_packets=0; 1402 1403 i = rx_ring->next_to_clean; 1404 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); 1405 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 1406 buffer_info = &rx_ring->buffer_info[i]; 1407 1408 while (staterr & E1000_RXD_STAT_DD) { 1409 struct sk_buff *skb; 1410 1411 if (*work_done >= work_to_do) 1412 break; 1413 (*work_done)++; 1414 rmb(); /* read descriptor and rx_buffer_info after status DD */ 1415 1416 skb = buffer_info->skb; 1417 buffer_info->skb = NULL; 1418 1419 ++i; 1420 if (i == rx_ring->count) 1421 i = 0; 1422 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i); 1423 prefetch(next_rxd); 1424 1425 next_buffer = &rx_ring->buffer_info[i]; 1426 1427 cleaned = true; 1428 cleaned_count++; 1429 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE, 1430 DMA_FROM_DEVICE); 1431 buffer_info->dma = 0; 1432 1433 length = le16_to_cpu(rx_desc->wb.upper.length); 1434 1435 /* errors is only valid for DD + EOP descriptors */ 1436 if (unlikely((staterr & E1000_RXD_STAT_EOP) && 1437 ((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) && 1438 !(netdev->features & NETIF_F_RXALL)))) { 1439 /* recycle both page and skb */ 1440 buffer_info->skb = skb; 1441 /* an error means any chain goes out the window too */ 1442 if (rx_ring->rx_skb_top) 1443 dev_kfree_skb_irq(rx_ring->rx_skb_top); 1444 rx_ring->rx_skb_top = NULL; 1445 goto next_desc; 1446 } 1447 1448 #define rxtop (rx_ring->rx_skb_top) 1449 if (!(staterr & E1000_RXD_STAT_EOP)) { 1450 /* this descriptor is only the beginning (or middle) */ 1451 if (!rxtop) { 1452 /* this is the beginning of a chain */ 1453 rxtop = skb; 1454 skb_fill_page_desc(rxtop, 0, buffer_info->page, 1455 0, length); 1456 } else { 1457 /* this is the middle of a chain */ 1458 skb_fill_page_desc(rxtop, 1459 skb_shinfo(rxtop)->nr_frags, 1460 buffer_info->page, 0, length); 1461 /* re-use the skb, only consumed the page */ 1462 buffer_info->skb = skb; 1463 } 1464 e1000_consume_page(buffer_info, rxtop, length); 1465 goto next_desc; 1466 } else { 1467 if (rxtop) { 1468 /* end of the chain */ 1469 skb_fill_page_desc(rxtop, 1470 skb_shinfo(rxtop)->nr_frags, 1471 buffer_info->page, 0, length); 1472 /* re-use the current skb, we only consumed the 1473 * page */ 1474 buffer_info->skb = skb; 1475 skb = rxtop; 1476 rxtop = NULL; 1477 e1000_consume_page(buffer_info, skb, length); 1478 } else { 1479 /* no chain, got EOP, this buf is the packet 1480 * copybreak to save the put_page/alloc_page */ 1481 if (length <= copybreak && 1482 skb_tailroom(skb) >= length) { 1483 u8 *vaddr; 1484 vaddr = kmap_atomic(buffer_info->page); 1485 memcpy(skb_tail_pointer(skb), vaddr, 1486 length); 1487 kunmap_atomic(vaddr); 1488 /* re-use the page, so don't erase 1489 * buffer_info->page */ 1490 skb_put(skb, length); 1491 } else { 1492 skb_fill_page_desc(skb, 0, 1493 buffer_info->page, 0, 1494 length); 1495 e1000_consume_page(buffer_info, skb, 1496 length); 1497 } 1498 } 1499 } 1500 1501 /* Receive Checksum Offload */ 1502 e1000_rx_checksum(adapter, staterr, skb); 1503 1504 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb); 1505 1506 /* probably a little skewed due to removing CRC */ 1507 total_rx_bytes += skb->len; 1508 total_rx_packets++; 1509 1510 /* eth type trans needs skb->data to point to something */ 1511 if (!pskb_may_pull(skb, ETH_HLEN)) { 1512 e_err("pskb_may_pull failed.\n"); 1513 dev_kfree_skb_irq(skb); 1514 goto next_desc; 1515 } 1516 1517 e1000_receive_skb(adapter, netdev, skb, staterr, 1518 rx_desc->wb.upper.vlan); 1519 1520 next_desc: 1521 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF); 1522 1523 /* return some buffers to hardware, one at a time is too slow */ 1524 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) { 1525 adapter->alloc_rx_buf(rx_ring, cleaned_count, 1526 GFP_ATOMIC); 1527 cleaned_count = 0; 1528 } 1529 1530 /* use prefetched values */ 1531 rx_desc = next_rxd; 1532 buffer_info = next_buffer; 1533 1534 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 1535 } 1536 rx_ring->next_to_clean = i; 1537 1538 cleaned_count = e1000_desc_unused(rx_ring); 1539 if (cleaned_count) 1540 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC); 1541 1542 adapter->total_rx_bytes += total_rx_bytes; 1543 adapter->total_rx_packets += total_rx_packets; 1544 return cleaned; 1545 } 1546 1547 /** 1548 * e1000_clean_rx_ring - Free Rx Buffers per Queue 1549 * @rx_ring: Rx descriptor ring 1550 **/ 1551 static void e1000_clean_rx_ring(struct e1000_ring *rx_ring) 1552 { 1553 struct e1000_adapter *adapter = rx_ring->adapter; 1554 struct e1000_buffer *buffer_info; 1555 struct e1000_ps_page *ps_page; 1556 struct pci_dev *pdev = adapter->pdev; 1557 unsigned int i, j; 1558 1559 /* Free all the Rx ring sk_buffs */ 1560 for (i = 0; i < rx_ring->count; i++) { 1561 buffer_info = &rx_ring->buffer_info[i]; 1562 if (buffer_info->dma) { 1563 if (adapter->clean_rx == e1000_clean_rx_irq) 1564 dma_unmap_single(&pdev->dev, buffer_info->dma, 1565 adapter->rx_buffer_len, 1566 DMA_FROM_DEVICE); 1567 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq) 1568 dma_unmap_page(&pdev->dev, buffer_info->dma, 1569 PAGE_SIZE, 1570 DMA_FROM_DEVICE); 1571 else if (adapter->clean_rx == e1000_clean_rx_irq_ps) 1572 dma_unmap_single(&pdev->dev, buffer_info->dma, 1573 adapter->rx_ps_bsize0, 1574 DMA_FROM_DEVICE); 1575 buffer_info->dma = 0; 1576 } 1577 1578 if (buffer_info->page) { 1579 put_page(buffer_info->page); 1580 buffer_info->page = NULL; 1581 } 1582 1583 if (buffer_info->skb) { 1584 dev_kfree_skb(buffer_info->skb); 1585 buffer_info->skb = NULL; 1586 } 1587 1588 for (j = 0; j < PS_PAGE_BUFFERS; j++) { 1589 ps_page = &buffer_info->ps_pages[j]; 1590 if (!ps_page->page) 1591 break; 1592 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE, 1593 DMA_FROM_DEVICE); 1594 ps_page->dma = 0; 1595 put_page(ps_page->page); 1596 ps_page->page = NULL; 1597 } 1598 } 1599 1600 /* there also may be some cached data from a chained receive */ 1601 if (rx_ring->rx_skb_top) { 1602 dev_kfree_skb(rx_ring->rx_skb_top); 1603 rx_ring->rx_skb_top = NULL; 1604 } 1605 1606 /* Zero out the descriptor ring */ 1607 memset(rx_ring->desc, 0, rx_ring->size); 1608 1609 rx_ring->next_to_clean = 0; 1610 rx_ring->next_to_use = 0; 1611 adapter->flags2 &= ~FLAG2_IS_DISCARDING; 1612 1613 writel(0, rx_ring->head); 1614 if (rx_ring->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) 1615 e1000e_update_rdt_wa(rx_ring, 0); 1616 else 1617 writel(0, rx_ring->tail); 1618 } 1619 1620 static void e1000e_downshift_workaround(struct work_struct *work) 1621 { 1622 struct e1000_adapter *adapter = container_of(work, 1623 struct e1000_adapter, downshift_task); 1624 1625 if (test_bit(__E1000_DOWN, &adapter->state)) 1626 return; 1627 1628 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw); 1629 } 1630 1631 /** 1632 * e1000_intr_msi - Interrupt Handler 1633 * @irq: interrupt number 1634 * @data: pointer to a network interface device structure 1635 **/ 1636 static irqreturn_t e1000_intr_msi(int irq, void *data) 1637 { 1638 struct net_device *netdev = data; 1639 struct e1000_adapter *adapter = netdev_priv(netdev); 1640 struct e1000_hw *hw = &adapter->hw; 1641 u32 icr = er32(ICR); 1642 1643 /* 1644 * read ICR disables interrupts using IAM 1645 */ 1646 1647 if (icr & E1000_ICR_LSC) { 1648 hw->mac.get_link_status = true; 1649 /* 1650 * ICH8 workaround-- Call gig speed drop workaround on cable 1651 * disconnect (LSC) before accessing any PHY registers 1652 */ 1653 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) && 1654 (!(er32(STATUS) & E1000_STATUS_LU))) 1655 schedule_work(&adapter->downshift_task); 1656 1657 /* 1658 * 80003ES2LAN workaround-- For packet buffer work-around on 1659 * link down event; disable receives here in the ISR and reset 1660 * adapter in watchdog 1661 */ 1662 if (netif_carrier_ok(netdev) && 1663 adapter->flags & FLAG_RX_NEEDS_RESTART) { 1664 /* disable receives */ 1665 u32 rctl = er32(RCTL); 1666 ew32(RCTL, rctl & ~E1000_RCTL_EN); 1667 adapter->flags |= FLAG_RX_RESTART_NOW; 1668 } 1669 /* guard against interrupt when we're going down */ 1670 if (!test_bit(__E1000_DOWN, &adapter->state)) 1671 mod_timer(&adapter->watchdog_timer, jiffies + 1); 1672 } 1673 1674 if (napi_schedule_prep(&adapter->napi)) { 1675 adapter->total_tx_bytes = 0; 1676 adapter->total_tx_packets = 0; 1677 adapter->total_rx_bytes = 0; 1678 adapter->total_rx_packets = 0; 1679 __napi_schedule(&adapter->napi); 1680 } 1681 1682 return IRQ_HANDLED; 1683 } 1684 1685 /** 1686 * e1000_intr - Interrupt Handler 1687 * @irq: interrupt number 1688 * @data: pointer to a network interface device structure 1689 **/ 1690 static irqreturn_t e1000_intr(int irq, void *data) 1691 { 1692 struct net_device *netdev = data; 1693 struct e1000_adapter *adapter = netdev_priv(netdev); 1694 struct e1000_hw *hw = &adapter->hw; 1695 u32 rctl, icr = er32(ICR); 1696 1697 if (!icr || test_bit(__E1000_DOWN, &adapter->state)) 1698 return IRQ_NONE; /* Not our interrupt */ 1699 1700 /* 1701 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is 1702 * not set, then the adapter didn't send an interrupt 1703 */ 1704 if (!(icr & E1000_ICR_INT_ASSERTED)) 1705 return IRQ_NONE; 1706 1707 /* 1708 * Interrupt Auto-Mask...upon reading ICR, 1709 * interrupts are masked. No need for the 1710 * IMC write 1711 */ 1712 1713 if (icr & E1000_ICR_LSC) { 1714 hw->mac.get_link_status = true; 1715 /* 1716 * ICH8 workaround-- Call gig speed drop workaround on cable 1717 * disconnect (LSC) before accessing any PHY registers 1718 */ 1719 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) && 1720 (!(er32(STATUS) & E1000_STATUS_LU))) 1721 schedule_work(&adapter->downshift_task); 1722 1723 /* 1724 * 80003ES2LAN workaround-- 1725 * For packet buffer work-around on link down event; 1726 * disable receives here in the ISR and 1727 * reset adapter in watchdog 1728 */ 1729 if (netif_carrier_ok(netdev) && 1730 (adapter->flags & FLAG_RX_NEEDS_RESTART)) { 1731 /* disable receives */ 1732 rctl = er32(RCTL); 1733 ew32(RCTL, rctl & ~E1000_RCTL_EN); 1734 adapter->flags |= FLAG_RX_RESTART_NOW; 1735 } 1736 /* guard against interrupt when we're going down */ 1737 if (!test_bit(__E1000_DOWN, &adapter->state)) 1738 mod_timer(&adapter->watchdog_timer, jiffies + 1); 1739 } 1740 1741 if (napi_schedule_prep(&adapter->napi)) { 1742 adapter->total_tx_bytes = 0; 1743 adapter->total_tx_packets = 0; 1744 adapter->total_rx_bytes = 0; 1745 adapter->total_rx_packets = 0; 1746 __napi_schedule(&adapter->napi); 1747 } 1748 1749 return IRQ_HANDLED; 1750 } 1751 1752 static irqreturn_t e1000_msix_other(int irq, void *data) 1753 { 1754 struct net_device *netdev = data; 1755 struct e1000_adapter *adapter = netdev_priv(netdev); 1756 struct e1000_hw *hw = &adapter->hw; 1757 u32 icr = er32(ICR); 1758 1759 if (!(icr & E1000_ICR_INT_ASSERTED)) { 1760 if (!test_bit(__E1000_DOWN, &adapter->state)) 1761 ew32(IMS, E1000_IMS_OTHER); 1762 return IRQ_NONE; 1763 } 1764 1765 if (icr & adapter->eiac_mask) 1766 ew32(ICS, (icr & adapter->eiac_mask)); 1767 1768 if (icr & E1000_ICR_OTHER) { 1769 if (!(icr & E1000_ICR_LSC)) 1770 goto no_link_interrupt; 1771 hw->mac.get_link_status = true; 1772 /* guard against interrupt when we're going down */ 1773 if (!test_bit(__E1000_DOWN, &adapter->state)) 1774 mod_timer(&adapter->watchdog_timer, jiffies + 1); 1775 } 1776 1777 no_link_interrupt: 1778 if (!test_bit(__E1000_DOWN, &adapter->state)) 1779 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER); 1780 1781 return IRQ_HANDLED; 1782 } 1783 1784 1785 static irqreturn_t e1000_intr_msix_tx(int irq, void *data) 1786 { 1787 struct net_device *netdev = data; 1788 struct e1000_adapter *adapter = netdev_priv(netdev); 1789 struct e1000_hw *hw = &adapter->hw; 1790 struct e1000_ring *tx_ring = adapter->tx_ring; 1791 1792 1793 adapter->total_tx_bytes = 0; 1794 adapter->total_tx_packets = 0; 1795 1796 if (!e1000_clean_tx_irq(tx_ring)) 1797 /* Ring was not completely cleaned, so fire another interrupt */ 1798 ew32(ICS, tx_ring->ims_val); 1799 1800 return IRQ_HANDLED; 1801 } 1802 1803 static irqreturn_t e1000_intr_msix_rx(int irq, void *data) 1804 { 1805 struct net_device *netdev = data; 1806 struct e1000_adapter *adapter = netdev_priv(netdev); 1807 struct e1000_ring *rx_ring = adapter->rx_ring; 1808 1809 /* Write the ITR value calculated at the end of the 1810 * previous interrupt. 1811 */ 1812 if (rx_ring->set_itr) { 1813 writel(1000000000 / (rx_ring->itr_val * 256), 1814 rx_ring->itr_register); 1815 rx_ring->set_itr = 0; 1816 } 1817 1818 if (napi_schedule_prep(&adapter->napi)) { 1819 adapter->total_rx_bytes = 0; 1820 adapter->total_rx_packets = 0; 1821 __napi_schedule(&adapter->napi); 1822 } 1823 return IRQ_HANDLED; 1824 } 1825 1826 /** 1827 * e1000_configure_msix - Configure MSI-X hardware 1828 * 1829 * e1000_configure_msix sets up the hardware to properly 1830 * generate MSI-X interrupts. 1831 **/ 1832 static void e1000_configure_msix(struct e1000_adapter *adapter) 1833 { 1834 struct e1000_hw *hw = &adapter->hw; 1835 struct e1000_ring *rx_ring = adapter->rx_ring; 1836 struct e1000_ring *tx_ring = adapter->tx_ring; 1837 int vector = 0; 1838 u32 ctrl_ext, ivar = 0; 1839 1840 adapter->eiac_mask = 0; 1841 1842 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */ 1843 if (hw->mac.type == e1000_82574) { 1844 u32 rfctl = er32(RFCTL); 1845 rfctl |= E1000_RFCTL_ACK_DIS; 1846 ew32(RFCTL, rfctl); 1847 } 1848 1849 #define E1000_IVAR_INT_ALLOC_VALID 0x8 1850 /* Configure Rx vector */ 1851 rx_ring->ims_val = E1000_IMS_RXQ0; 1852 adapter->eiac_mask |= rx_ring->ims_val; 1853 if (rx_ring->itr_val) 1854 writel(1000000000 / (rx_ring->itr_val * 256), 1855 rx_ring->itr_register); 1856 else 1857 writel(1, rx_ring->itr_register); 1858 ivar = E1000_IVAR_INT_ALLOC_VALID | vector; 1859 1860 /* Configure Tx vector */ 1861 tx_ring->ims_val = E1000_IMS_TXQ0; 1862 vector++; 1863 if (tx_ring->itr_val) 1864 writel(1000000000 / (tx_ring->itr_val * 256), 1865 tx_ring->itr_register); 1866 else 1867 writel(1, tx_ring->itr_register); 1868 adapter->eiac_mask |= tx_ring->ims_val; 1869 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8); 1870 1871 /* set vector for Other Causes, e.g. link changes */ 1872 vector++; 1873 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16); 1874 if (rx_ring->itr_val) 1875 writel(1000000000 / (rx_ring->itr_val * 256), 1876 hw->hw_addr + E1000_EITR_82574(vector)); 1877 else 1878 writel(1, hw->hw_addr + E1000_EITR_82574(vector)); 1879 1880 /* Cause Tx interrupts on every write back */ 1881 ivar |= (1 << 31); 1882 1883 ew32(IVAR, ivar); 1884 1885 /* enable MSI-X PBA support */ 1886 ctrl_ext = er32(CTRL_EXT); 1887 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR; 1888 1889 /* Auto-Mask Other interrupts upon ICR read */ 1890 #define E1000_EIAC_MASK_82574 0x01F00000 1891 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER); 1892 ctrl_ext |= E1000_CTRL_EXT_EIAME; 1893 ew32(CTRL_EXT, ctrl_ext); 1894 e1e_flush(); 1895 } 1896 1897 void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter) 1898 { 1899 if (adapter->msix_entries) { 1900 pci_disable_msix(adapter->pdev); 1901 kfree(adapter->msix_entries); 1902 adapter->msix_entries = NULL; 1903 } else if (adapter->flags & FLAG_MSI_ENABLED) { 1904 pci_disable_msi(adapter->pdev); 1905 adapter->flags &= ~FLAG_MSI_ENABLED; 1906 } 1907 } 1908 1909 /** 1910 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported 1911 * 1912 * Attempt to configure interrupts using the best available 1913 * capabilities of the hardware and kernel. 1914 **/ 1915 void e1000e_set_interrupt_capability(struct e1000_adapter *adapter) 1916 { 1917 int err; 1918 int i; 1919 1920 switch (adapter->int_mode) { 1921 case E1000E_INT_MODE_MSIX: 1922 if (adapter->flags & FLAG_HAS_MSIX) { 1923 adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */ 1924 adapter->msix_entries = kcalloc(adapter->num_vectors, 1925 sizeof(struct msix_entry), 1926 GFP_KERNEL); 1927 if (adapter->msix_entries) { 1928 for (i = 0; i < adapter->num_vectors; i++) 1929 adapter->msix_entries[i].entry = i; 1930 1931 err = pci_enable_msix(adapter->pdev, 1932 adapter->msix_entries, 1933 adapter->num_vectors); 1934 if (err == 0) 1935 return; 1936 } 1937 /* MSI-X failed, so fall through and try MSI */ 1938 e_err("Failed to initialize MSI-X interrupts. Falling back to MSI interrupts.\n"); 1939 e1000e_reset_interrupt_capability(adapter); 1940 } 1941 adapter->int_mode = E1000E_INT_MODE_MSI; 1942 /* Fall through */ 1943 case E1000E_INT_MODE_MSI: 1944 if (!pci_enable_msi(adapter->pdev)) { 1945 adapter->flags |= FLAG_MSI_ENABLED; 1946 } else { 1947 adapter->int_mode = E1000E_INT_MODE_LEGACY; 1948 e_err("Failed to initialize MSI interrupts. Falling back to legacy interrupts.\n"); 1949 } 1950 /* Fall through */ 1951 case E1000E_INT_MODE_LEGACY: 1952 /* Don't do anything; this is the system default */ 1953 break; 1954 } 1955 1956 /* store the number of vectors being used */ 1957 adapter->num_vectors = 1; 1958 } 1959 1960 /** 1961 * e1000_request_msix - Initialize MSI-X interrupts 1962 * 1963 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the 1964 * kernel. 1965 **/ 1966 static int e1000_request_msix(struct e1000_adapter *adapter) 1967 { 1968 struct net_device *netdev = adapter->netdev; 1969 int err = 0, vector = 0; 1970 1971 if (strlen(netdev->name) < (IFNAMSIZ - 5)) 1972 snprintf(adapter->rx_ring->name, 1973 sizeof(adapter->rx_ring->name) - 1, 1974 "%s-rx-0", netdev->name); 1975 else 1976 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ); 1977 err = request_irq(adapter->msix_entries[vector].vector, 1978 e1000_intr_msix_rx, 0, adapter->rx_ring->name, 1979 netdev); 1980 if (err) 1981 return err; 1982 adapter->rx_ring->itr_register = adapter->hw.hw_addr + 1983 E1000_EITR_82574(vector); 1984 adapter->rx_ring->itr_val = adapter->itr; 1985 vector++; 1986 1987 if (strlen(netdev->name) < (IFNAMSIZ - 5)) 1988 snprintf(adapter->tx_ring->name, 1989 sizeof(adapter->tx_ring->name) - 1, 1990 "%s-tx-0", netdev->name); 1991 else 1992 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ); 1993 err = request_irq(adapter->msix_entries[vector].vector, 1994 e1000_intr_msix_tx, 0, adapter->tx_ring->name, 1995 netdev); 1996 if (err) 1997 return err; 1998 adapter->tx_ring->itr_register = adapter->hw.hw_addr + 1999 E1000_EITR_82574(vector); 2000 adapter->tx_ring->itr_val = adapter->itr; 2001 vector++; 2002 2003 err = request_irq(adapter->msix_entries[vector].vector, 2004 e1000_msix_other, 0, netdev->name, netdev); 2005 if (err) 2006 return err; 2007 2008 e1000_configure_msix(adapter); 2009 2010 return 0; 2011 } 2012 2013 /** 2014 * e1000_request_irq - initialize interrupts 2015 * 2016 * Attempts to configure interrupts using the best available 2017 * capabilities of the hardware and kernel. 2018 **/ 2019 static int e1000_request_irq(struct e1000_adapter *adapter) 2020 { 2021 struct net_device *netdev = adapter->netdev; 2022 int err; 2023 2024 if (adapter->msix_entries) { 2025 err = e1000_request_msix(adapter); 2026 if (!err) 2027 return err; 2028 /* fall back to MSI */ 2029 e1000e_reset_interrupt_capability(adapter); 2030 adapter->int_mode = E1000E_INT_MODE_MSI; 2031 e1000e_set_interrupt_capability(adapter); 2032 } 2033 if (adapter->flags & FLAG_MSI_ENABLED) { 2034 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0, 2035 netdev->name, netdev); 2036 if (!err) 2037 return err; 2038 2039 /* fall back to legacy interrupt */ 2040 e1000e_reset_interrupt_capability(adapter); 2041 adapter->int_mode = E1000E_INT_MODE_LEGACY; 2042 } 2043 2044 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED, 2045 netdev->name, netdev); 2046 if (err) 2047 e_err("Unable to allocate interrupt, Error: %d\n", err); 2048 2049 return err; 2050 } 2051 2052 static void e1000_free_irq(struct e1000_adapter *adapter) 2053 { 2054 struct net_device *netdev = adapter->netdev; 2055 2056 if (adapter->msix_entries) { 2057 int vector = 0; 2058 2059 free_irq(adapter->msix_entries[vector].vector, netdev); 2060 vector++; 2061 2062 free_irq(adapter->msix_entries[vector].vector, netdev); 2063 vector++; 2064 2065 /* Other Causes interrupt vector */ 2066 free_irq(adapter->msix_entries[vector].vector, netdev); 2067 return; 2068 } 2069 2070 free_irq(adapter->pdev->irq, netdev); 2071 } 2072 2073 /** 2074 * e1000_irq_disable - Mask off interrupt generation on the NIC 2075 **/ 2076 static void e1000_irq_disable(struct e1000_adapter *adapter) 2077 { 2078 struct e1000_hw *hw = &adapter->hw; 2079 2080 ew32(IMC, ~0); 2081 if (adapter->msix_entries) 2082 ew32(EIAC_82574, 0); 2083 e1e_flush(); 2084 2085 if (adapter->msix_entries) { 2086 int i; 2087 for (i = 0; i < adapter->num_vectors; i++) 2088 synchronize_irq(adapter->msix_entries[i].vector); 2089 } else { 2090 synchronize_irq(adapter->pdev->irq); 2091 } 2092 } 2093 2094 /** 2095 * e1000_irq_enable - Enable default interrupt generation settings 2096 **/ 2097 static void e1000_irq_enable(struct e1000_adapter *adapter) 2098 { 2099 struct e1000_hw *hw = &adapter->hw; 2100 2101 if (adapter->msix_entries) { 2102 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574); 2103 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC); 2104 } else { 2105 ew32(IMS, IMS_ENABLE_MASK); 2106 } 2107 e1e_flush(); 2108 } 2109 2110 /** 2111 * e1000e_get_hw_control - get control of the h/w from f/w 2112 * @adapter: address of board private structure 2113 * 2114 * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit. 2115 * For ASF and Pass Through versions of f/w this means that 2116 * the driver is loaded. For AMT version (only with 82573) 2117 * of the f/w this means that the network i/f is open. 2118 **/ 2119 void e1000e_get_hw_control(struct e1000_adapter *adapter) 2120 { 2121 struct e1000_hw *hw = &adapter->hw; 2122 u32 ctrl_ext; 2123 u32 swsm; 2124 2125 /* Let firmware know the driver has taken over */ 2126 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) { 2127 swsm = er32(SWSM); 2128 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD); 2129 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) { 2130 ctrl_ext = er32(CTRL_EXT); 2131 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); 2132 } 2133 } 2134 2135 /** 2136 * e1000e_release_hw_control - release control of the h/w to f/w 2137 * @adapter: address of board private structure 2138 * 2139 * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit. 2140 * For ASF and Pass Through versions of f/w this means that the 2141 * driver is no longer loaded. For AMT version (only with 82573) i 2142 * of the f/w this means that the network i/f is closed. 2143 * 2144 **/ 2145 void e1000e_release_hw_control(struct e1000_adapter *adapter) 2146 { 2147 struct e1000_hw *hw = &adapter->hw; 2148 u32 ctrl_ext; 2149 u32 swsm; 2150 2151 /* Let firmware taken over control of h/w */ 2152 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) { 2153 swsm = er32(SWSM); 2154 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD); 2155 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) { 2156 ctrl_ext = er32(CTRL_EXT); 2157 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); 2158 } 2159 } 2160 2161 /** 2162 * @e1000_alloc_ring - allocate memory for a ring structure 2163 **/ 2164 static int e1000_alloc_ring_dma(struct e1000_adapter *adapter, 2165 struct e1000_ring *ring) 2166 { 2167 struct pci_dev *pdev = adapter->pdev; 2168 2169 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma, 2170 GFP_KERNEL); 2171 if (!ring->desc) 2172 return -ENOMEM; 2173 2174 return 0; 2175 } 2176 2177 /** 2178 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors) 2179 * @tx_ring: Tx descriptor ring 2180 * 2181 * Return 0 on success, negative on failure 2182 **/ 2183 int e1000e_setup_tx_resources(struct e1000_ring *tx_ring) 2184 { 2185 struct e1000_adapter *adapter = tx_ring->adapter; 2186 int err = -ENOMEM, size; 2187 2188 size = sizeof(struct e1000_buffer) * tx_ring->count; 2189 tx_ring->buffer_info = vzalloc(size); 2190 if (!tx_ring->buffer_info) 2191 goto err; 2192 2193 /* round up to nearest 4K */ 2194 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc); 2195 tx_ring->size = ALIGN(tx_ring->size, 4096); 2196 2197 err = e1000_alloc_ring_dma(adapter, tx_ring); 2198 if (err) 2199 goto err; 2200 2201 tx_ring->next_to_use = 0; 2202 tx_ring->next_to_clean = 0; 2203 2204 return 0; 2205 err: 2206 vfree(tx_ring->buffer_info); 2207 e_err("Unable to allocate memory for the transmit descriptor ring\n"); 2208 return err; 2209 } 2210 2211 /** 2212 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors) 2213 * @rx_ring: Rx descriptor ring 2214 * 2215 * Returns 0 on success, negative on failure 2216 **/ 2217 int e1000e_setup_rx_resources(struct e1000_ring *rx_ring) 2218 { 2219 struct e1000_adapter *adapter = rx_ring->adapter; 2220 struct e1000_buffer *buffer_info; 2221 int i, size, desc_len, err = -ENOMEM; 2222 2223 size = sizeof(struct e1000_buffer) * rx_ring->count; 2224 rx_ring->buffer_info = vzalloc(size); 2225 if (!rx_ring->buffer_info) 2226 goto err; 2227 2228 for (i = 0; i < rx_ring->count; i++) { 2229 buffer_info = &rx_ring->buffer_info[i]; 2230 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS, 2231 sizeof(struct e1000_ps_page), 2232 GFP_KERNEL); 2233 if (!buffer_info->ps_pages) 2234 goto err_pages; 2235 } 2236 2237 desc_len = sizeof(union e1000_rx_desc_packet_split); 2238 2239 /* Round up to nearest 4K */ 2240 rx_ring->size = rx_ring->count * desc_len; 2241 rx_ring->size = ALIGN(rx_ring->size, 4096); 2242 2243 err = e1000_alloc_ring_dma(adapter, rx_ring); 2244 if (err) 2245 goto err_pages; 2246 2247 rx_ring->next_to_clean = 0; 2248 rx_ring->next_to_use = 0; 2249 rx_ring->rx_skb_top = NULL; 2250 2251 return 0; 2252 2253 err_pages: 2254 for (i = 0; i < rx_ring->count; i++) { 2255 buffer_info = &rx_ring->buffer_info[i]; 2256 kfree(buffer_info->ps_pages); 2257 } 2258 err: 2259 vfree(rx_ring->buffer_info); 2260 e_err("Unable to allocate memory for the receive descriptor ring\n"); 2261 return err; 2262 } 2263 2264 /** 2265 * e1000_clean_tx_ring - Free Tx Buffers 2266 * @tx_ring: Tx descriptor ring 2267 **/ 2268 static void e1000_clean_tx_ring(struct e1000_ring *tx_ring) 2269 { 2270 struct e1000_adapter *adapter = tx_ring->adapter; 2271 struct e1000_buffer *buffer_info; 2272 unsigned long size; 2273 unsigned int i; 2274 2275 for (i = 0; i < tx_ring->count; i++) { 2276 buffer_info = &tx_ring->buffer_info[i]; 2277 e1000_put_txbuf(tx_ring, buffer_info); 2278 } 2279 2280 netdev_reset_queue(adapter->netdev); 2281 size = sizeof(struct e1000_buffer) * tx_ring->count; 2282 memset(tx_ring->buffer_info, 0, size); 2283 2284 memset(tx_ring->desc, 0, tx_ring->size); 2285 2286 tx_ring->next_to_use = 0; 2287 tx_ring->next_to_clean = 0; 2288 2289 writel(0, tx_ring->head); 2290 if (tx_ring->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) 2291 e1000e_update_tdt_wa(tx_ring, 0); 2292 else 2293 writel(0, tx_ring->tail); 2294 } 2295 2296 /** 2297 * e1000e_free_tx_resources - Free Tx Resources per Queue 2298 * @tx_ring: Tx descriptor ring 2299 * 2300 * Free all transmit software resources 2301 **/ 2302 void e1000e_free_tx_resources(struct e1000_ring *tx_ring) 2303 { 2304 struct e1000_adapter *adapter = tx_ring->adapter; 2305 struct pci_dev *pdev = adapter->pdev; 2306 2307 e1000_clean_tx_ring(tx_ring); 2308 2309 vfree(tx_ring->buffer_info); 2310 tx_ring->buffer_info = NULL; 2311 2312 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc, 2313 tx_ring->dma); 2314 tx_ring->desc = NULL; 2315 } 2316 2317 /** 2318 * e1000e_free_rx_resources - Free Rx Resources 2319 * @rx_ring: Rx descriptor ring 2320 * 2321 * Free all receive software resources 2322 **/ 2323 void e1000e_free_rx_resources(struct e1000_ring *rx_ring) 2324 { 2325 struct e1000_adapter *adapter = rx_ring->adapter; 2326 struct pci_dev *pdev = adapter->pdev; 2327 int i; 2328 2329 e1000_clean_rx_ring(rx_ring); 2330 2331 for (i = 0; i < rx_ring->count; i++) 2332 kfree(rx_ring->buffer_info[i].ps_pages); 2333 2334 vfree(rx_ring->buffer_info); 2335 rx_ring->buffer_info = NULL; 2336 2337 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc, 2338 rx_ring->dma); 2339 rx_ring->desc = NULL; 2340 } 2341 2342 /** 2343 * e1000_update_itr - update the dynamic ITR value based on statistics 2344 * @adapter: pointer to adapter 2345 * @itr_setting: current adapter->itr 2346 * @packets: the number of packets during this measurement interval 2347 * @bytes: the number of bytes during this measurement interval 2348 * 2349 * Stores a new ITR value based on packets and byte 2350 * counts during the last interrupt. The advantage of per interrupt 2351 * computation is faster updates and more accurate ITR for the current 2352 * traffic pattern. Constants in this function were computed 2353 * based on theoretical maximum wire speed and thresholds were set based 2354 * on testing data as well as attempting to minimize response time 2355 * while increasing bulk throughput. This functionality is controlled 2356 * by the InterruptThrottleRate module parameter. 2357 **/ 2358 static unsigned int e1000_update_itr(struct e1000_adapter *adapter, 2359 u16 itr_setting, int packets, 2360 int bytes) 2361 { 2362 unsigned int retval = itr_setting; 2363 2364 if (packets == 0) 2365 return itr_setting; 2366 2367 switch (itr_setting) { 2368 case lowest_latency: 2369 /* handle TSO and jumbo frames */ 2370 if (bytes/packets > 8000) 2371 retval = bulk_latency; 2372 else if ((packets < 5) && (bytes > 512)) 2373 retval = low_latency; 2374 break; 2375 case low_latency: /* 50 usec aka 20000 ints/s */ 2376 if (bytes > 10000) { 2377 /* this if handles the TSO accounting */ 2378 if (bytes/packets > 8000) 2379 retval = bulk_latency; 2380 else if ((packets < 10) || ((bytes/packets) > 1200)) 2381 retval = bulk_latency; 2382 else if ((packets > 35)) 2383 retval = lowest_latency; 2384 } else if (bytes/packets > 2000) { 2385 retval = bulk_latency; 2386 } else if (packets <= 2 && bytes < 512) { 2387 retval = lowest_latency; 2388 } 2389 break; 2390 case bulk_latency: /* 250 usec aka 4000 ints/s */ 2391 if (bytes > 25000) { 2392 if (packets > 35) 2393 retval = low_latency; 2394 } else if (bytes < 6000) { 2395 retval = low_latency; 2396 } 2397 break; 2398 } 2399 2400 return retval; 2401 } 2402 2403 static void e1000_set_itr(struct e1000_adapter *adapter) 2404 { 2405 struct e1000_hw *hw = &adapter->hw; 2406 u16 current_itr; 2407 u32 new_itr = adapter->itr; 2408 2409 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */ 2410 if (adapter->link_speed != SPEED_1000) { 2411 current_itr = 0; 2412 new_itr = 4000; 2413 goto set_itr_now; 2414 } 2415 2416 if (adapter->flags2 & FLAG2_DISABLE_AIM) { 2417 new_itr = 0; 2418 goto set_itr_now; 2419 } 2420 2421 adapter->tx_itr = e1000_update_itr(adapter, 2422 adapter->tx_itr, 2423 adapter->total_tx_packets, 2424 adapter->total_tx_bytes); 2425 /* conservative mode (itr 3) eliminates the lowest_latency setting */ 2426 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency) 2427 adapter->tx_itr = low_latency; 2428 2429 adapter->rx_itr = e1000_update_itr(adapter, 2430 adapter->rx_itr, 2431 adapter->total_rx_packets, 2432 adapter->total_rx_bytes); 2433 /* conservative mode (itr 3) eliminates the lowest_latency setting */ 2434 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency) 2435 adapter->rx_itr = low_latency; 2436 2437 current_itr = max(adapter->rx_itr, adapter->tx_itr); 2438 2439 switch (current_itr) { 2440 /* counts and packets in update_itr are dependent on these numbers */ 2441 case lowest_latency: 2442 new_itr = 70000; 2443 break; 2444 case low_latency: 2445 new_itr = 20000; /* aka hwitr = ~200 */ 2446 break; 2447 case bulk_latency: 2448 new_itr = 4000; 2449 break; 2450 default: 2451 break; 2452 } 2453 2454 set_itr_now: 2455 if (new_itr != adapter->itr) { 2456 /* 2457 * this attempts to bias the interrupt rate towards Bulk 2458 * by adding intermediate steps when interrupt rate is 2459 * increasing 2460 */ 2461 new_itr = new_itr > adapter->itr ? 2462 min(adapter->itr + (new_itr >> 2), new_itr) : 2463 new_itr; 2464 adapter->itr = new_itr; 2465 adapter->rx_ring->itr_val = new_itr; 2466 if (adapter->msix_entries) 2467 adapter->rx_ring->set_itr = 1; 2468 else 2469 if (new_itr) 2470 ew32(ITR, 1000000000 / (new_itr * 256)); 2471 else 2472 ew32(ITR, 0); 2473 } 2474 } 2475 2476 /** 2477 * e1000_alloc_queues - Allocate memory for all rings 2478 * @adapter: board private structure to initialize 2479 **/ 2480 static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter) 2481 { 2482 int size = sizeof(struct e1000_ring); 2483 2484 adapter->tx_ring = kzalloc(size, GFP_KERNEL); 2485 if (!adapter->tx_ring) 2486 goto err; 2487 adapter->tx_ring->count = adapter->tx_ring_count; 2488 adapter->tx_ring->adapter = adapter; 2489 2490 adapter->rx_ring = kzalloc(size, GFP_KERNEL); 2491 if (!adapter->rx_ring) 2492 goto err; 2493 adapter->rx_ring->count = adapter->rx_ring_count; 2494 adapter->rx_ring->adapter = adapter; 2495 2496 return 0; 2497 err: 2498 e_err("Unable to allocate memory for queues\n"); 2499 kfree(adapter->rx_ring); 2500 kfree(adapter->tx_ring); 2501 return -ENOMEM; 2502 } 2503 2504 /** 2505 * e1000e_poll - NAPI Rx polling callback 2506 * @napi: struct associated with this polling callback 2507 * @weight: number of packets driver is allowed to process this poll 2508 **/ 2509 static int e1000e_poll(struct napi_struct *napi, int weight) 2510 { 2511 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, 2512 napi); 2513 struct e1000_hw *hw = &adapter->hw; 2514 struct net_device *poll_dev = adapter->netdev; 2515 int tx_cleaned = 1, work_done = 0; 2516 2517 adapter = netdev_priv(poll_dev); 2518 2519 if (!adapter->msix_entries || 2520 (adapter->rx_ring->ims_val & adapter->tx_ring->ims_val)) 2521 tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring); 2522 2523 adapter->clean_rx(adapter->rx_ring, &work_done, weight); 2524 2525 if (!tx_cleaned) 2526 work_done = weight; 2527 2528 /* If weight not fully consumed, exit the polling mode */ 2529 if (work_done < weight) { 2530 if (adapter->itr_setting & 3) 2531 e1000_set_itr(adapter); 2532 napi_complete(napi); 2533 if (!test_bit(__E1000_DOWN, &adapter->state)) { 2534 if (adapter->msix_entries) 2535 ew32(IMS, adapter->rx_ring->ims_val); 2536 else 2537 e1000_irq_enable(adapter); 2538 } 2539 } 2540 2541 return work_done; 2542 } 2543 2544 static int e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid) 2545 { 2546 struct e1000_adapter *adapter = netdev_priv(netdev); 2547 struct e1000_hw *hw = &adapter->hw; 2548 u32 vfta, index; 2549 2550 /* don't update vlan cookie if already programmed */ 2551 if ((adapter->hw.mng_cookie.status & 2552 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) && 2553 (vid == adapter->mng_vlan_id)) 2554 return 0; 2555 2556 /* add VID to filter table */ 2557 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2558 index = (vid >> 5) & 0x7F; 2559 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index); 2560 vfta |= (1 << (vid & 0x1F)); 2561 hw->mac.ops.write_vfta(hw, index, vfta); 2562 } 2563 2564 set_bit(vid, adapter->active_vlans); 2565 2566 return 0; 2567 } 2568 2569 static int e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid) 2570 { 2571 struct e1000_adapter *adapter = netdev_priv(netdev); 2572 struct e1000_hw *hw = &adapter->hw; 2573 u32 vfta, index; 2574 2575 if ((adapter->hw.mng_cookie.status & 2576 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) && 2577 (vid == adapter->mng_vlan_id)) { 2578 /* release control to f/w */ 2579 e1000e_release_hw_control(adapter); 2580 return 0; 2581 } 2582 2583 /* remove VID from filter table */ 2584 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2585 index = (vid >> 5) & 0x7F; 2586 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index); 2587 vfta &= ~(1 << (vid & 0x1F)); 2588 hw->mac.ops.write_vfta(hw, index, vfta); 2589 } 2590 2591 clear_bit(vid, adapter->active_vlans); 2592 2593 return 0; 2594 } 2595 2596 /** 2597 * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering 2598 * @adapter: board private structure to initialize 2599 **/ 2600 static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter) 2601 { 2602 struct net_device *netdev = adapter->netdev; 2603 struct e1000_hw *hw = &adapter->hw; 2604 u32 rctl; 2605 2606 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2607 /* disable VLAN receive filtering */ 2608 rctl = er32(RCTL); 2609 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN); 2610 ew32(RCTL, rctl); 2611 2612 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) { 2613 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); 2614 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; 2615 } 2616 } 2617 } 2618 2619 /** 2620 * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering 2621 * @adapter: board private structure to initialize 2622 **/ 2623 static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter) 2624 { 2625 struct e1000_hw *hw = &adapter->hw; 2626 u32 rctl; 2627 2628 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2629 /* enable VLAN receive filtering */ 2630 rctl = er32(RCTL); 2631 rctl |= E1000_RCTL_VFE; 2632 rctl &= ~E1000_RCTL_CFIEN; 2633 ew32(RCTL, rctl); 2634 } 2635 } 2636 2637 /** 2638 * e1000e_vlan_strip_enable - helper to disable HW VLAN stripping 2639 * @adapter: board private structure to initialize 2640 **/ 2641 static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter) 2642 { 2643 struct e1000_hw *hw = &adapter->hw; 2644 u32 ctrl; 2645 2646 /* disable VLAN tag insert/strip */ 2647 ctrl = er32(CTRL); 2648 ctrl &= ~E1000_CTRL_VME; 2649 ew32(CTRL, ctrl); 2650 } 2651 2652 /** 2653 * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping 2654 * @adapter: board private structure to initialize 2655 **/ 2656 static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter) 2657 { 2658 struct e1000_hw *hw = &adapter->hw; 2659 u32 ctrl; 2660 2661 /* enable VLAN tag insert/strip */ 2662 ctrl = er32(CTRL); 2663 ctrl |= E1000_CTRL_VME; 2664 ew32(CTRL, ctrl); 2665 } 2666 2667 static void e1000_update_mng_vlan(struct e1000_adapter *adapter) 2668 { 2669 struct net_device *netdev = adapter->netdev; 2670 u16 vid = adapter->hw.mng_cookie.vlan_id; 2671 u16 old_vid = adapter->mng_vlan_id; 2672 2673 if (adapter->hw.mng_cookie.status & 2674 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) { 2675 e1000_vlan_rx_add_vid(netdev, vid); 2676 adapter->mng_vlan_id = vid; 2677 } 2678 2679 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid)) 2680 e1000_vlan_rx_kill_vid(netdev, old_vid); 2681 } 2682 2683 static void e1000_restore_vlan(struct e1000_adapter *adapter) 2684 { 2685 u16 vid; 2686 2687 e1000_vlan_rx_add_vid(adapter->netdev, 0); 2688 2689 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID) 2690 e1000_vlan_rx_add_vid(adapter->netdev, vid); 2691 } 2692 2693 static void e1000_init_manageability_pt(struct e1000_adapter *adapter) 2694 { 2695 struct e1000_hw *hw = &adapter->hw; 2696 u32 manc, manc2h, mdef, i, j; 2697 2698 if (!(adapter->flags & FLAG_MNG_PT_ENABLED)) 2699 return; 2700 2701 manc = er32(MANC); 2702 2703 /* 2704 * enable receiving management packets to the host. this will probably 2705 * generate destination unreachable messages from the host OS, but 2706 * the packets will be handled on SMBUS 2707 */ 2708 manc |= E1000_MANC_EN_MNG2HOST; 2709 manc2h = er32(MANC2H); 2710 2711 switch (hw->mac.type) { 2712 default: 2713 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664); 2714 break; 2715 case e1000_82574: 2716 case e1000_82583: 2717 /* 2718 * Check if IPMI pass-through decision filter already exists; 2719 * if so, enable it. 2720 */ 2721 for (i = 0, j = 0; i < 8; i++) { 2722 mdef = er32(MDEF(i)); 2723 2724 /* Ignore filters with anything other than IPMI ports */ 2725 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664)) 2726 continue; 2727 2728 /* Enable this decision filter in MANC2H */ 2729 if (mdef) 2730 manc2h |= (1 << i); 2731 2732 j |= mdef; 2733 } 2734 2735 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664)) 2736 break; 2737 2738 /* Create new decision filter in an empty filter */ 2739 for (i = 0, j = 0; i < 8; i++) 2740 if (er32(MDEF(i)) == 0) { 2741 ew32(MDEF(i), (E1000_MDEF_PORT_623 | 2742 E1000_MDEF_PORT_664)); 2743 manc2h |= (1 << 1); 2744 j++; 2745 break; 2746 } 2747 2748 if (!j) 2749 e_warn("Unable to create IPMI pass-through filter\n"); 2750 break; 2751 } 2752 2753 ew32(MANC2H, manc2h); 2754 ew32(MANC, manc); 2755 } 2756 2757 /** 2758 * e1000_configure_tx - Configure Transmit Unit after Reset 2759 * @adapter: board private structure 2760 * 2761 * Configure the Tx unit of the MAC after a reset. 2762 **/ 2763 static void e1000_configure_tx(struct e1000_adapter *adapter) 2764 { 2765 struct e1000_hw *hw = &adapter->hw; 2766 struct e1000_ring *tx_ring = adapter->tx_ring; 2767 u64 tdba; 2768 u32 tdlen, tarc; 2769 2770 /* Setup the HW Tx Head and Tail descriptor pointers */ 2771 tdba = tx_ring->dma; 2772 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc); 2773 ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32))); 2774 ew32(TDBAH(0), (tdba >> 32)); 2775 ew32(TDLEN(0), tdlen); 2776 ew32(TDH(0), 0); 2777 ew32(TDT(0), 0); 2778 tx_ring->head = adapter->hw.hw_addr + E1000_TDH(0); 2779 tx_ring->tail = adapter->hw.hw_addr + E1000_TDT(0); 2780 2781 /* Set the Tx Interrupt Delay register */ 2782 ew32(TIDV, adapter->tx_int_delay); 2783 /* Tx irq moderation */ 2784 ew32(TADV, adapter->tx_abs_int_delay); 2785 2786 if (adapter->flags2 & FLAG2_DMA_BURST) { 2787 u32 txdctl = er32(TXDCTL(0)); 2788 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH | 2789 E1000_TXDCTL_WTHRESH); 2790 /* 2791 * set up some performance related parameters to encourage the 2792 * hardware to use the bus more efficiently in bursts, depends 2793 * on the tx_int_delay to be enabled, 2794 * wthresh = 5 ==> burst write a cacheline (64 bytes) at a time 2795 * hthresh = 1 ==> prefetch when one or more available 2796 * pthresh = 0x1f ==> prefetch if internal cache 31 or less 2797 * BEWARE: this seems to work but should be considered first if 2798 * there are Tx hangs or other Tx related bugs 2799 */ 2800 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE; 2801 ew32(TXDCTL(0), txdctl); 2802 } 2803 /* erratum work around: set txdctl the same for both queues */ 2804 ew32(TXDCTL(1), er32(TXDCTL(0))); 2805 2806 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) { 2807 tarc = er32(TARC(0)); 2808 /* 2809 * set the speed mode bit, we'll clear it if we're not at 2810 * gigabit link later 2811 */ 2812 #define SPEED_MODE_BIT (1 << 21) 2813 tarc |= SPEED_MODE_BIT; 2814 ew32(TARC(0), tarc); 2815 } 2816 2817 /* errata: program both queues to unweighted RR */ 2818 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) { 2819 tarc = er32(TARC(0)); 2820 tarc |= 1; 2821 ew32(TARC(0), tarc); 2822 tarc = er32(TARC(1)); 2823 tarc |= 1; 2824 ew32(TARC(1), tarc); 2825 } 2826 2827 /* Setup Transmit Descriptor Settings for eop descriptor */ 2828 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS; 2829 2830 /* only set IDE if we are delaying interrupts using the timers */ 2831 if (adapter->tx_int_delay) 2832 adapter->txd_cmd |= E1000_TXD_CMD_IDE; 2833 2834 /* enable Report Status bit */ 2835 adapter->txd_cmd |= E1000_TXD_CMD_RS; 2836 2837 hw->mac.ops.config_collision_dist(hw); 2838 } 2839 2840 /** 2841 * e1000_setup_rctl - configure the receive control registers 2842 * @adapter: Board private structure 2843 **/ 2844 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \ 2845 (((S) & (PAGE_SIZE - 1)) ? 1 : 0)) 2846 static void e1000_setup_rctl(struct e1000_adapter *adapter) 2847 { 2848 struct e1000_hw *hw = &adapter->hw; 2849 u32 rctl, rfctl; 2850 u32 pages = 0; 2851 2852 /* Workaround Si errata on PCHx - configure jumbo frame flow */ 2853 if (hw->mac.type >= e1000_pch2lan) { 2854 s32 ret_val; 2855 2856 if (adapter->netdev->mtu > ETH_DATA_LEN) 2857 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true); 2858 else 2859 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false); 2860 2861 if (ret_val) 2862 e_dbg("failed to enable jumbo frame workaround mode\n"); 2863 } 2864 2865 /* Program MC offset vector base */ 2866 rctl = er32(RCTL); 2867 rctl &= ~(3 << E1000_RCTL_MO_SHIFT); 2868 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | 2869 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF | 2870 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT); 2871 2872 /* Do not Store bad packets */ 2873 rctl &= ~E1000_RCTL_SBP; 2874 2875 /* Enable Long Packet receive */ 2876 if (adapter->netdev->mtu <= ETH_DATA_LEN) 2877 rctl &= ~E1000_RCTL_LPE; 2878 else 2879 rctl |= E1000_RCTL_LPE; 2880 2881 /* Some systems expect that the CRC is included in SMBUS traffic. The 2882 * hardware strips the CRC before sending to both SMBUS (BMC) and to 2883 * host memory when this is enabled 2884 */ 2885 if (adapter->flags2 & FLAG2_CRC_STRIPPING) 2886 rctl |= E1000_RCTL_SECRC; 2887 2888 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */ 2889 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) { 2890 u16 phy_data; 2891 2892 e1e_rphy(hw, PHY_REG(770, 26), &phy_data); 2893 phy_data &= 0xfff8; 2894 phy_data |= (1 << 2); 2895 e1e_wphy(hw, PHY_REG(770, 26), phy_data); 2896 2897 e1e_rphy(hw, 22, &phy_data); 2898 phy_data &= 0x0fff; 2899 phy_data |= (1 << 14); 2900 e1e_wphy(hw, 0x10, 0x2823); 2901 e1e_wphy(hw, 0x11, 0x0003); 2902 e1e_wphy(hw, 22, phy_data); 2903 } 2904 2905 /* Setup buffer sizes */ 2906 rctl &= ~E1000_RCTL_SZ_4096; 2907 rctl |= E1000_RCTL_BSEX; 2908 switch (adapter->rx_buffer_len) { 2909 case 2048: 2910 default: 2911 rctl |= E1000_RCTL_SZ_2048; 2912 rctl &= ~E1000_RCTL_BSEX; 2913 break; 2914 case 4096: 2915 rctl |= E1000_RCTL_SZ_4096; 2916 break; 2917 case 8192: 2918 rctl |= E1000_RCTL_SZ_8192; 2919 break; 2920 case 16384: 2921 rctl |= E1000_RCTL_SZ_16384; 2922 break; 2923 } 2924 2925 /* Enable Extended Status in all Receive Descriptors */ 2926 rfctl = er32(RFCTL); 2927 rfctl |= E1000_RFCTL_EXTEN; 2928 ew32(RFCTL, rfctl); 2929 2930 /* 2931 * 82571 and greater support packet-split where the protocol 2932 * header is placed in skb->data and the packet data is 2933 * placed in pages hanging off of skb_shinfo(skb)->nr_frags. 2934 * In the case of a non-split, skb->data is linearly filled, 2935 * followed by the page buffers. Therefore, skb->data is 2936 * sized to hold the largest protocol header. 2937 * 2938 * allocations using alloc_page take too long for regular MTU 2939 * so only enable packet split for jumbo frames 2940 * 2941 * Using pages when the page size is greater than 16k wastes 2942 * a lot of memory, since we allocate 3 pages at all times 2943 * per packet. 2944 */ 2945 pages = PAGE_USE_COUNT(adapter->netdev->mtu); 2946 if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE)) 2947 adapter->rx_ps_pages = pages; 2948 else 2949 adapter->rx_ps_pages = 0; 2950 2951 if (adapter->rx_ps_pages) { 2952 u32 psrctl = 0; 2953 2954 /* Enable Packet split descriptors */ 2955 rctl |= E1000_RCTL_DTYP_PS; 2956 2957 psrctl |= adapter->rx_ps_bsize0 >> 2958 E1000_PSRCTL_BSIZE0_SHIFT; 2959 2960 switch (adapter->rx_ps_pages) { 2961 case 3: 2962 psrctl |= PAGE_SIZE << 2963 E1000_PSRCTL_BSIZE3_SHIFT; 2964 case 2: 2965 psrctl |= PAGE_SIZE << 2966 E1000_PSRCTL_BSIZE2_SHIFT; 2967 case 1: 2968 psrctl |= PAGE_SIZE >> 2969 E1000_PSRCTL_BSIZE1_SHIFT; 2970 break; 2971 } 2972 2973 ew32(PSRCTL, psrctl); 2974 } 2975 2976 /* This is useful for sniffing bad packets. */ 2977 if (adapter->netdev->features & NETIF_F_RXALL) { 2978 /* UPE and MPE will be handled by normal PROMISC logic 2979 * in e1000e_set_rx_mode */ 2980 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */ 2981 E1000_RCTL_BAM | /* RX All Bcast Pkts */ 2982 E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */ 2983 2984 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */ 2985 E1000_RCTL_DPF | /* Allow filtered pause */ 2986 E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */ 2987 /* Do not mess with E1000_CTRL_VME, it affects transmit as well, 2988 * and that breaks VLANs. 2989 */ 2990 } 2991 2992 ew32(RCTL, rctl); 2993 /* just started the receive unit, no need to restart */ 2994 adapter->flags &= ~FLAG_RX_RESTART_NOW; 2995 } 2996 2997 /** 2998 * e1000_configure_rx - Configure Receive Unit after Reset 2999 * @adapter: board private structure 3000 * 3001 * Configure the Rx unit of the MAC after a reset. 3002 **/ 3003 static void e1000_configure_rx(struct e1000_adapter *adapter) 3004 { 3005 struct e1000_hw *hw = &adapter->hw; 3006 struct e1000_ring *rx_ring = adapter->rx_ring; 3007 u64 rdba; 3008 u32 rdlen, rctl, rxcsum, ctrl_ext; 3009 3010 if (adapter->rx_ps_pages) { 3011 /* this is a 32 byte descriptor */ 3012 rdlen = rx_ring->count * 3013 sizeof(union e1000_rx_desc_packet_split); 3014 adapter->clean_rx = e1000_clean_rx_irq_ps; 3015 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps; 3016 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) { 3017 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended); 3018 adapter->clean_rx = e1000_clean_jumbo_rx_irq; 3019 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers; 3020 } else { 3021 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended); 3022 adapter->clean_rx = e1000_clean_rx_irq; 3023 adapter->alloc_rx_buf = e1000_alloc_rx_buffers; 3024 } 3025 3026 /* disable receives while setting up the descriptors */ 3027 rctl = er32(RCTL); 3028 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX)) 3029 ew32(RCTL, rctl & ~E1000_RCTL_EN); 3030 e1e_flush(); 3031 usleep_range(10000, 20000); 3032 3033 if (adapter->flags2 & FLAG2_DMA_BURST) { 3034 /* 3035 * set the writeback threshold (only takes effect if the RDTR 3036 * is set). set GRAN=1 and write back up to 0x4 worth, and 3037 * enable prefetching of 0x20 Rx descriptors 3038 * granularity = 01 3039 * wthresh = 04, 3040 * hthresh = 04, 3041 * pthresh = 0x20 3042 */ 3043 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE); 3044 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE); 3045 3046 /* 3047 * override the delay timers for enabling bursting, only if 3048 * the value was not set by the user via module options 3049 */ 3050 if (adapter->rx_int_delay == DEFAULT_RDTR) 3051 adapter->rx_int_delay = BURST_RDTR; 3052 if (adapter->rx_abs_int_delay == DEFAULT_RADV) 3053 adapter->rx_abs_int_delay = BURST_RADV; 3054 } 3055 3056 /* set the Receive Delay Timer Register */ 3057 ew32(RDTR, adapter->rx_int_delay); 3058 3059 /* irq moderation */ 3060 ew32(RADV, adapter->rx_abs_int_delay); 3061 if ((adapter->itr_setting != 0) && (adapter->itr != 0)) 3062 ew32(ITR, 1000000000 / (adapter->itr * 256)); 3063 3064 ctrl_ext = er32(CTRL_EXT); 3065 /* Auto-Mask interrupts upon ICR access */ 3066 ctrl_ext |= E1000_CTRL_EXT_IAME; 3067 ew32(IAM, 0xffffffff); 3068 ew32(CTRL_EXT, ctrl_ext); 3069 e1e_flush(); 3070 3071 /* 3072 * Setup the HW Rx Head and Tail Descriptor Pointers and 3073 * the Base and Length of the Rx Descriptor Ring 3074 */ 3075 rdba = rx_ring->dma; 3076 ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32))); 3077 ew32(RDBAH(0), (rdba >> 32)); 3078 ew32(RDLEN(0), rdlen); 3079 ew32(RDH(0), 0); 3080 ew32(RDT(0), 0); 3081 rx_ring->head = adapter->hw.hw_addr + E1000_RDH(0); 3082 rx_ring->tail = adapter->hw.hw_addr + E1000_RDT(0); 3083 3084 /* Enable Receive Checksum Offload for TCP and UDP */ 3085 rxcsum = er32(RXCSUM); 3086 if (adapter->netdev->features & NETIF_F_RXCSUM) 3087 rxcsum |= E1000_RXCSUM_TUOFL; 3088 else 3089 rxcsum &= ~E1000_RXCSUM_TUOFL; 3090 ew32(RXCSUM, rxcsum); 3091 3092 if (adapter->hw.mac.type == e1000_pch2lan) { 3093 /* 3094 * With jumbo frames, excessive C-state transition 3095 * latencies result in dropped transactions. 3096 */ 3097 if (adapter->netdev->mtu > ETH_DATA_LEN) { 3098 u32 rxdctl = er32(RXDCTL(0)); 3099 ew32(RXDCTL(0), rxdctl | 0x3); 3100 pm_qos_update_request(&adapter->netdev->pm_qos_req, 55); 3101 } else { 3102 pm_qos_update_request(&adapter->netdev->pm_qos_req, 3103 PM_QOS_DEFAULT_VALUE); 3104 } 3105 } 3106 3107 /* Enable Receives */ 3108 ew32(RCTL, rctl); 3109 } 3110 3111 /** 3112 * e1000e_write_mc_addr_list - write multicast addresses to MTA 3113 * @netdev: network interface device structure 3114 * 3115 * Writes multicast address list to the MTA hash table. 3116 * Returns: -ENOMEM on failure 3117 * 0 on no addresses written 3118 * X on writing X addresses to MTA 3119 */ 3120 static int e1000e_write_mc_addr_list(struct net_device *netdev) 3121 { 3122 struct e1000_adapter *adapter = netdev_priv(netdev); 3123 struct e1000_hw *hw = &adapter->hw; 3124 struct netdev_hw_addr *ha; 3125 u8 *mta_list; 3126 int i; 3127 3128 if (netdev_mc_empty(netdev)) { 3129 /* nothing to program, so clear mc list */ 3130 hw->mac.ops.update_mc_addr_list(hw, NULL, 0); 3131 return 0; 3132 } 3133 3134 mta_list = kzalloc(netdev_mc_count(netdev) * ETH_ALEN, GFP_ATOMIC); 3135 if (!mta_list) 3136 return -ENOMEM; 3137 3138 /* update_mc_addr_list expects a packed array of only addresses. */ 3139 i = 0; 3140 netdev_for_each_mc_addr(ha, netdev) 3141 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN); 3142 3143 hw->mac.ops.update_mc_addr_list(hw, mta_list, i); 3144 kfree(mta_list); 3145 3146 return netdev_mc_count(netdev); 3147 } 3148 3149 /** 3150 * e1000e_write_uc_addr_list - write unicast addresses to RAR table 3151 * @netdev: network interface device structure 3152 * 3153 * Writes unicast address list to the RAR table. 3154 * Returns: -ENOMEM on failure/insufficient address space 3155 * 0 on no addresses written 3156 * X on writing X addresses to the RAR table 3157 **/ 3158 static int e1000e_write_uc_addr_list(struct net_device *netdev) 3159 { 3160 struct e1000_adapter *adapter = netdev_priv(netdev); 3161 struct e1000_hw *hw = &adapter->hw; 3162 unsigned int rar_entries = hw->mac.rar_entry_count; 3163 int count = 0; 3164 3165 /* save a rar entry for our hardware address */ 3166 rar_entries--; 3167 3168 /* save a rar entry for the LAA workaround */ 3169 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) 3170 rar_entries--; 3171 3172 /* return ENOMEM indicating insufficient memory for addresses */ 3173 if (netdev_uc_count(netdev) > rar_entries) 3174 return -ENOMEM; 3175 3176 if (!netdev_uc_empty(netdev) && rar_entries) { 3177 struct netdev_hw_addr *ha; 3178 3179 /* 3180 * write the addresses in reverse order to avoid write 3181 * combining 3182 */ 3183 netdev_for_each_uc_addr(ha, netdev) { 3184 if (!rar_entries) 3185 break; 3186 hw->mac.ops.rar_set(hw, ha->addr, rar_entries--); 3187 count++; 3188 } 3189 } 3190 3191 /* zero out the remaining RAR entries not used above */ 3192 for (; rar_entries > 0; rar_entries--) { 3193 ew32(RAH(rar_entries), 0); 3194 ew32(RAL(rar_entries), 0); 3195 } 3196 e1e_flush(); 3197 3198 return count; 3199 } 3200 3201 /** 3202 * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set 3203 * @netdev: network interface device structure 3204 * 3205 * The ndo_set_rx_mode entry point is called whenever the unicast or multicast 3206 * address list or the network interface flags are updated. This routine is 3207 * responsible for configuring the hardware for proper unicast, multicast, 3208 * promiscuous mode, and all-multi behavior. 3209 **/ 3210 static void e1000e_set_rx_mode(struct net_device *netdev) 3211 { 3212 struct e1000_adapter *adapter = netdev_priv(netdev); 3213 struct e1000_hw *hw = &adapter->hw; 3214 u32 rctl; 3215 3216 /* Check for Promiscuous and All Multicast modes */ 3217 rctl = er32(RCTL); 3218 3219 /* clear the affected bits */ 3220 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE); 3221 3222 if (netdev->flags & IFF_PROMISC) { 3223 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); 3224 /* Do not hardware filter VLANs in promisc mode */ 3225 e1000e_vlan_filter_disable(adapter); 3226 } else { 3227 int count; 3228 3229 if (netdev->flags & IFF_ALLMULTI) { 3230 rctl |= E1000_RCTL_MPE; 3231 } else { 3232 /* 3233 * Write addresses to the MTA, if the attempt fails 3234 * then we should just turn on promiscuous mode so 3235 * that we can at least receive multicast traffic 3236 */ 3237 count = e1000e_write_mc_addr_list(netdev); 3238 if (count < 0) 3239 rctl |= E1000_RCTL_MPE; 3240 } 3241 e1000e_vlan_filter_enable(adapter); 3242 /* 3243 * Write addresses to available RAR registers, if there is not 3244 * sufficient space to store all the addresses then enable 3245 * unicast promiscuous mode 3246 */ 3247 count = e1000e_write_uc_addr_list(netdev); 3248 if (count < 0) 3249 rctl |= E1000_RCTL_UPE; 3250 } 3251 3252 ew32(RCTL, rctl); 3253 3254 if (netdev->features & NETIF_F_HW_VLAN_RX) 3255 e1000e_vlan_strip_enable(adapter); 3256 else 3257 e1000e_vlan_strip_disable(adapter); 3258 } 3259 3260 static void e1000e_setup_rss_hash(struct e1000_adapter *adapter) 3261 { 3262 struct e1000_hw *hw = &adapter->hw; 3263 u32 mrqc, rxcsum; 3264 int i; 3265 static const u32 rsskey[10] = { 3266 0xda565a6d, 0xc20e5b25, 0x3d256741, 0xb08fa343, 0xcb2bcad0, 3267 0xb4307bae, 0xa32dcb77, 0x0cf23080, 0x3bb7426a, 0xfa01acbe 3268 }; 3269 3270 /* Fill out hash function seed */ 3271 for (i = 0; i < 10; i++) 3272 ew32(RSSRK(i), rsskey[i]); 3273 3274 /* Direct all traffic to queue 0 */ 3275 for (i = 0; i < 32; i++) 3276 ew32(RETA(i), 0); 3277 3278 /* 3279 * Disable raw packet checksumming so that RSS hash is placed in 3280 * descriptor on writeback. 3281 */ 3282 rxcsum = er32(RXCSUM); 3283 rxcsum |= E1000_RXCSUM_PCSD; 3284 3285 ew32(RXCSUM, rxcsum); 3286 3287 mrqc = (E1000_MRQC_RSS_FIELD_IPV4 | 3288 E1000_MRQC_RSS_FIELD_IPV4_TCP | 3289 E1000_MRQC_RSS_FIELD_IPV6 | 3290 E1000_MRQC_RSS_FIELD_IPV6_TCP | 3291 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX); 3292 3293 ew32(MRQC, mrqc); 3294 } 3295 3296 /** 3297 * e1000_configure - configure the hardware for Rx and Tx 3298 * @adapter: private board structure 3299 **/ 3300 static void e1000_configure(struct e1000_adapter *adapter) 3301 { 3302 struct e1000_ring *rx_ring = adapter->rx_ring; 3303 3304 e1000e_set_rx_mode(adapter->netdev); 3305 3306 e1000_restore_vlan(adapter); 3307 e1000_init_manageability_pt(adapter); 3308 3309 e1000_configure_tx(adapter); 3310 3311 if (adapter->netdev->features & NETIF_F_RXHASH) 3312 e1000e_setup_rss_hash(adapter); 3313 e1000_setup_rctl(adapter); 3314 e1000_configure_rx(adapter); 3315 adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL); 3316 } 3317 3318 /** 3319 * e1000e_power_up_phy - restore link in case the phy was powered down 3320 * @adapter: address of board private structure 3321 * 3322 * The phy may be powered down to save power and turn off link when the 3323 * driver is unloaded and wake on lan is not enabled (among others) 3324 * *** this routine MUST be followed by a call to e1000e_reset *** 3325 **/ 3326 void e1000e_power_up_phy(struct e1000_adapter *adapter) 3327 { 3328 if (adapter->hw.phy.ops.power_up) 3329 adapter->hw.phy.ops.power_up(&adapter->hw); 3330 3331 adapter->hw.mac.ops.setup_link(&adapter->hw); 3332 } 3333 3334 /** 3335 * e1000_power_down_phy - Power down the PHY 3336 * 3337 * Power down the PHY so no link is implied when interface is down. 3338 * The PHY cannot be powered down if management or WoL is active. 3339 */ 3340 static void e1000_power_down_phy(struct e1000_adapter *adapter) 3341 { 3342 /* WoL is enabled */ 3343 if (adapter->wol) 3344 return; 3345 3346 if (adapter->hw.phy.ops.power_down) 3347 adapter->hw.phy.ops.power_down(&adapter->hw); 3348 } 3349 3350 /** 3351 * e1000e_reset - bring the hardware into a known good state 3352 * 3353 * This function boots the hardware and enables some settings that 3354 * require a configuration cycle of the hardware - those cannot be 3355 * set/changed during runtime. After reset the device needs to be 3356 * properly configured for Rx, Tx etc. 3357 */ 3358 void e1000e_reset(struct e1000_adapter *adapter) 3359 { 3360 struct e1000_mac_info *mac = &adapter->hw.mac; 3361 struct e1000_fc_info *fc = &adapter->hw.fc; 3362 struct e1000_hw *hw = &adapter->hw; 3363 u32 tx_space, min_tx_space, min_rx_space; 3364 u32 pba = adapter->pba; 3365 u16 hwm; 3366 3367 /* reset Packet Buffer Allocation to default */ 3368 ew32(PBA, pba); 3369 3370 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) { 3371 /* 3372 * To maintain wire speed transmits, the Tx FIFO should be 3373 * large enough to accommodate two full transmit packets, 3374 * rounded up to the next 1KB and expressed in KB. Likewise, 3375 * the Rx FIFO should be large enough to accommodate at least 3376 * one full receive packet and is similarly rounded up and 3377 * expressed in KB. 3378 */ 3379 pba = er32(PBA); 3380 /* upper 16 bits has Tx packet buffer allocation size in KB */ 3381 tx_space = pba >> 16; 3382 /* lower 16 bits has Rx packet buffer allocation size in KB */ 3383 pba &= 0xffff; 3384 /* 3385 * the Tx fifo also stores 16 bytes of information about the Tx 3386 * but don't include ethernet FCS because hardware appends it 3387 */ 3388 min_tx_space = (adapter->max_frame_size + 3389 sizeof(struct e1000_tx_desc) - 3390 ETH_FCS_LEN) * 2; 3391 min_tx_space = ALIGN(min_tx_space, 1024); 3392 min_tx_space >>= 10; 3393 /* software strips receive CRC, so leave room for it */ 3394 min_rx_space = adapter->max_frame_size; 3395 min_rx_space = ALIGN(min_rx_space, 1024); 3396 min_rx_space >>= 10; 3397 3398 /* 3399 * If current Tx allocation is less than the min Tx FIFO size, 3400 * and the min Tx FIFO size is less than the current Rx FIFO 3401 * allocation, take space away from current Rx allocation 3402 */ 3403 if ((tx_space < min_tx_space) && 3404 ((min_tx_space - tx_space) < pba)) { 3405 pba -= min_tx_space - tx_space; 3406 3407 /* 3408 * if short on Rx space, Rx wins and must trump Tx 3409 * adjustment or use Early Receive if available 3410 */ 3411 if (pba < min_rx_space) 3412 pba = min_rx_space; 3413 } 3414 3415 ew32(PBA, pba); 3416 } 3417 3418 /* 3419 * flow control settings 3420 * 3421 * The high water mark must be low enough to fit one full frame 3422 * (or the size used for early receive) above it in the Rx FIFO. 3423 * Set it to the lower of: 3424 * - 90% of the Rx FIFO size, and 3425 * - the full Rx FIFO size minus one full frame 3426 */ 3427 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME) 3428 fc->pause_time = 0xFFFF; 3429 else 3430 fc->pause_time = E1000_FC_PAUSE_TIME; 3431 fc->send_xon = true; 3432 fc->current_mode = fc->requested_mode; 3433 3434 switch (hw->mac.type) { 3435 case e1000_ich9lan: 3436 case e1000_ich10lan: 3437 if (adapter->netdev->mtu > ETH_DATA_LEN) { 3438 pba = 14; 3439 ew32(PBA, pba); 3440 fc->high_water = 0x2800; 3441 fc->low_water = fc->high_water - 8; 3442 break; 3443 } 3444 /* fall-through */ 3445 default: 3446 hwm = min(((pba << 10) * 9 / 10), 3447 ((pba << 10) - adapter->max_frame_size)); 3448 3449 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */ 3450 fc->low_water = fc->high_water - 8; 3451 break; 3452 case e1000_pchlan: 3453 /* 3454 * Workaround PCH LOM adapter hangs with certain network 3455 * loads. If hangs persist, try disabling Tx flow control. 3456 */ 3457 if (adapter->netdev->mtu > ETH_DATA_LEN) { 3458 fc->high_water = 0x3500; 3459 fc->low_water = 0x1500; 3460 } else { 3461 fc->high_water = 0x5000; 3462 fc->low_water = 0x3000; 3463 } 3464 fc->refresh_time = 0x1000; 3465 break; 3466 case e1000_pch2lan: 3467 case e1000_pch_lpt: 3468 fc->high_water = 0x05C20; 3469 fc->low_water = 0x05048; 3470 fc->pause_time = 0x0650; 3471 fc->refresh_time = 0x0400; 3472 if (adapter->netdev->mtu > ETH_DATA_LEN) { 3473 pba = 14; 3474 ew32(PBA, pba); 3475 } 3476 break; 3477 } 3478 3479 /* 3480 * Disable Adaptive Interrupt Moderation if 2 full packets cannot 3481 * fit in receive buffer. 3482 */ 3483 if (adapter->itr_setting & 0x3) { 3484 if ((adapter->max_frame_size * 2) > (pba << 10)) { 3485 if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) { 3486 dev_info(&adapter->pdev->dev, 3487 "Interrupt Throttle Rate turned off\n"); 3488 adapter->flags2 |= FLAG2_DISABLE_AIM; 3489 ew32(ITR, 0); 3490 } 3491 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) { 3492 dev_info(&adapter->pdev->dev, 3493 "Interrupt Throttle Rate turned on\n"); 3494 adapter->flags2 &= ~FLAG2_DISABLE_AIM; 3495 adapter->itr = 20000; 3496 ew32(ITR, 1000000000 / (adapter->itr * 256)); 3497 } 3498 } 3499 3500 /* Allow time for pending master requests to run */ 3501 mac->ops.reset_hw(hw); 3502 3503 /* 3504 * For parts with AMT enabled, let the firmware know 3505 * that the network interface is in control 3506 */ 3507 if (adapter->flags & FLAG_HAS_AMT) 3508 e1000e_get_hw_control(adapter); 3509 3510 ew32(WUC, 0); 3511 3512 if (mac->ops.init_hw(hw)) 3513 e_err("Hardware Error\n"); 3514 3515 e1000_update_mng_vlan(adapter); 3516 3517 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */ 3518 ew32(VET, ETH_P_8021Q); 3519 3520 e1000e_reset_adaptive(hw); 3521 3522 if (!netif_running(adapter->netdev) && 3523 !test_bit(__E1000_TESTING, &adapter->state)) { 3524 e1000_power_down_phy(adapter); 3525 return; 3526 } 3527 3528 e1000_get_phy_info(hw); 3529 3530 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) && 3531 !(adapter->flags & FLAG_SMART_POWER_DOWN)) { 3532 u16 phy_data = 0; 3533 /* 3534 * speed up time to link by disabling smart power down, ignore 3535 * the return value of this function because there is nothing 3536 * different we would do if it failed 3537 */ 3538 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data); 3539 phy_data &= ~IGP02E1000_PM_SPD; 3540 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data); 3541 } 3542 } 3543 3544 int e1000e_up(struct e1000_adapter *adapter) 3545 { 3546 struct e1000_hw *hw = &adapter->hw; 3547 3548 /* hardware has been reset, we need to reload some things */ 3549 e1000_configure(adapter); 3550 3551 clear_bit(__E1000_DOWN, &adapter->state); 3552 3553 if (adapter->msix_entries) 3554 e1000_configure_msix(adapter); 3555 e1000_irq_enable(adapter); 3556 3557 netif_start_queue(adapter->netdev); 3558 3559 /* fire a link change interrupt to start the watchdog */ 3560 if (adapter->msix_entries) 3561 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER); 3562 else 3563 ew32(ICS, E1000_ICS_LSC); 3564 3565 return 0; 3566 } 3567 3568 static void e1000e_flush_descriptors(struct e1000_adapter *adapter) 3569 { 3570 struct e1000_hw *hw = &adapter->hw; 3571 3572 if (!(adapter->flags2 & FLAG2_DMA_BURST)) 3573 return; 3574 3575 /* flush pending descriptor writebacks to memory */ 3576 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); 3577 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD); 3578 3579 /* execute the writes immediately */ 3580 e1e_flush(); 3581 3582 /* 3583 * due to rare timing issues, write to TIDV/RDTR again to ensure the 3584 * write is successful 3585 */ 3586 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); 3587 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD); 3588 3589 /* execute the writes immediately */ 3590 e1e_flush(); 3591 } 3592 3593 static void e1000e_update_stats(struct e1000_adapter *adapter); 3594 3595 void e1000e_down(struct e1000_adapter *adapter) 3596 { 3597 struct net_device *netdev = adapter->netdev; 3598 struct e1000_hw *hw = &adapter->hw; 3599 u32 tctl, rctl; 3600 3601 /* 3602 * signal that we're down so the interrupt handler does not 3603 * reschedule our watchdog timer 3604 */ 3605 set_bit(__E1000_DOWN, &adapter->state); 3606 3607 /* disable receives in the hardware */ 3608 rctl = er32(RCTL); 3609 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX)) 3610 ew32(RCTL, rctl & ~E1000_RCTL_EN); 3611 /* flush and sleep below */ 3612 3613 netif_stop_queue(netdev); 3614 3615 /* disable transmits in the hardware */ 3616 tctl = er32(TCTL); 3617 tctl &= ~E1000_TCTL_EN; 3618 ew32(TCTL, tctl); 3619 3620 /* flush both disables and wait for them to finish */ 3621 e1e_flush(); 3622 usleep_range(10000, 20000); 3623 3624 e1000_irq_disable(adapter); 3625 3626 del_timer_sync(&adapter->watchdog_timer); 3627 del_timer_sync(&adapter->phy_info_timer); 3628 3629 netif_carrier_off(netdev); 3630 3631 spin_lock(&adapter->stats64_lock); 3632 e1000e_update_stats(adapter); 3633 spin_unlock(&adapter->stats64_lock); 3634 3635 e1000e_flush_descriptors(adapter); 3636 e1000_clean_tx_ring(adapter->tx_ring); 3637 e1000_clean_rx_ring(adapter->rx_ring); 3638 3639 adapter->link_speed = 0; 3640 adapter->link_duplex = 0; 3641 3642 if (!pci_channel_offline(adapter->pdev)) 3643 e1000e_reset(adapter); 3644 3645 /* 3646 * TODO: for power management, we could drop the link and 3647 * pci_disable_device here. 3648 */ 3649 } 3650 3651 void e1000e_reinit_locked(struct e1000_adapter *adapter) 3652 { 3653 might_sleep(); 3654 while (test_and_set_bit(__E1000_RESETTING, &adapter->state)) 3655 usleep_range(1000, 2000); 3656 e1000e_down(adapter); 3657 e1000e_up(adapter); 3658 clear_bit(__E1000_RESETTING, &adapter->state); 3659 } 3660 3661 /** 3662 * e1000_sw_init - Initialize general software structures (struct e1000_adapter) 3663 * @adapter: board private structure to initialize 3664 * 3665 * e1000_sw_init initializes the Adapter private data structure. 3666 * Fields are initialized based on PCI device information and 3667 * OS network device settings (MTU size). 3668 **/ 3669 static int __devinit e1000_sw_init(struct e1000_adapter *adapter) 3670 { 3671 struct net_device *netdev = adapter->netdev; 3672 3673 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN; 3674 adapter->rx_ps_bsize0 = 128; 3675 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; 3676 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN; 3677 adapter->tx_ring_count = E1000_DEFAULT_TXD; 3678 adapter->rx_ring_count = E1000_DEFAULT_RXD; 3679 3680 spin_lock_init(&adapter->stats64_lock); 3681 3682 e1000e_set_interrupt_capability(adapter); 3683 3684 if (e1000_alloc_queues(adapter)) 3685 return -ENOMEM; 3686 3687 /* Explicitly disable IRQ since the NIC can be in any state. */ 3688 e1000_irq_disable(adapter); 3689 3690 set_bit(__E1000_DOWN, &adapter->state); 3691 return 0; 3692 } 3693 3694 /** 3695 * e1000_intr_msi_test - Interrupt Handler 3696 * @irq: interrupt number 3697 * @data: pointer to a network interface device structure 3698 **/ 3699 static irqreturn_t e1000_intr_msi_test(int irq, void *data) 3700 { 3701 struct net_device *netdev = data; 3702 struct e1000_adapter *adapter = netdev_priv(netdev); 3703 struct e1000_hw *hw = &adapter->hw; 3704 u32 icr = er32(ICR); 3705 3706 e_dbg("icr is %08X\n", icr); 3707 if (icr & E1000_ICR_RXSEQ) { 3708 adapter->flags &= ~FLAG_MSI_TEST_FAILED; 3709 wmb(); 3710 } 3711 3712 return IRQ_HANDLED; 3713 } 3714 3715 /** 3716 * e1000_test_msi_interrupt - Returns 0 for successful test 3717 * @adapter: board private struct 3718 * 3719 * code flow taken from tg3.c 3720 **/ 3721 static int e1000_test_msi_interrupt(struct e1000_adapter *adapter) 3722 { 3723 struct net_device *netdev = adapter->netdev; 3724 struct e1000_hw *hw = &adapter->hw; 3725 int err; 3726 3727 /* poll_enable hasn't been called yet, so don't need disable */ 3728 /* clear any pending events */ 3729 er32(ICR); 3730 3731 /* free the real vector and request a test handler */ 3732 e1000_free_irq(adapter); 3733 e1000e_reset_interrupt_capability(adapter); 3734 3735 /* Assume that the test fails, if it succeeds then the test 3736 * MSI irq handler will unset this flag */ 3737 adapter->flags |= FLAG_MSI_TEST_FAILED; 3738 3739 err = pci_enable_msi(adapter->pdev); 3740 if (err) 3741 goto msi_test_failed; 3742 3743 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0, 3744 netdev->name, netdev); 3745 if (err) { 3746 pci_disable_msi(adapter->pdev); 3747 goto msi_test_failed; 3748 } 3749 3750 wmb(); 3751 3752 e1000_irq_enable(adapter); 3753 3754 /* fire an unusual interrupt on the test handler */ 3755 ew32(ICS, E1000_ICS_RXSEQ); 3756 e1e_flush(); 3757 msleep(100); 3758 3759 e1000_irq_disable(adapter); 3760 3761 rmb(); 3762 3763 if (adapter->flags & FLAG_MSI_TEST_FAILED) { 3764 adapter->int_mode = E1000E_INT_MODE_LEGACY; 3765 e_info("MSI interrupt test failed, using legacy interrupt.\n"); 3766 } else { 3767 e_dbg("MSI interrupt test succeeded!\n"); 3768 } 3769 3770 free_irq(adapter->pdev->irq, netdev); 3771 pci_disable_msi(adapter->pdev); 3772 3773 msi_test_failed: 3774 e1000e_set_interrupt_capability(adapter); 3775 return e1000_request_irq(adapter); 3776 } 3777 3778 /** 3779 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored 3780 * @adapter: board private struct 3781 * 3782 * code flow taken from tg3.c, called with e1000 interrupts disabled. 3783 **/ 3784 static int e1000_test_msi(struct e1000_adapter *adapter) 3785 { 3786 int err; 3787 u16 pci_cmd; 3788 3789 if (!(adapter->flags & FLAG_MSI_ENABLED)) 3790 return 0; 3791 3792 /* disable SERR in case the MSI write causes a master abort */ 3793 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd); 3794 if (pci_cmd & PCI_COMMAND_SERR) 3795 pci_write_config_word(adapter->pdev, PCI_COMMAND, 3796 pci_cmd & ~PCI_COMMAND_SERR); 3797 3798 err = e1000_test_msi_interrupt(adapter); 3799 3800 /* re-enable SERR */ 3801 if (pci_cmd & PCI_COMMAND_SERR) { 3802 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd); 3803 pci_cmd |= PCI_COMMAND_SERR; 3804 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd); 3805 } 3806 3807 return err; 3808 } 3809 3810 /** 3811 * e1000_open - Called when a network interface is made active 3812 * @netdev: network interface device structure 3813 * 3814 * Returns 0 on success, negative value on failure 3815 * 3816 * The open entry point is called when a network interface is made 3817 * active by the system (IFF_UP). At this point all resources needed 3818 * for transmit and receive operations are allocated, the interrupt 3819 * handler is registered with the OS, the watchdog timer is started, 3820 * and the stack is notified that the interface is ready. 3821 **/ 3822 static int e1000_open(struct net_device *netdev) 3823 { 3824 struct e1000_adapter *adapter = netdev_priv(netdev); 3825 struct e1000_hw *hw = &adapter->hw; 3826 struct pci_dev *pdev = adapter->pdev; 3827 int err; 3828 3829 /* disallow open during test */ 3830 if (test_bit(__E1000_TESTING, &adapter->state)) 3831 return -EBUSY; 3832 3833 pm_runtime_get_sync(&pdev->dev); 3834 3835 netif_carrier_off(netdev); 3836 3837 /* allocate transmit descriptors */ 3838 err = e1000e_setup_tx_resources(adapter->tx_ring); 3839 if (err) 3840 goto err_setup_tx; 3841 3842 /* allocate receive descriptors */ 3843 err = e1000e_setup_rx_resources(adapter->rx_ring); 3844 if (err) 3845 goto err_setup_rx; 3846 3847 /* 3848 * If AMT is enabled, let the firmware know that the network 3849 * interface is now open and reset the part to a known state. 3850 */ 3851 if (adapter->flags & FLAG_HAS_AMT) { 3852 e1000e_get_hw_control(adapter); 3853 e1000e_reset(adapter); 3854 } 3855 3856 e1000e_power_up_phy(adapter); 3857 3858 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; 3859 if ((adapter->hw.mng_cookie.status & 3860 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)) 3861 e1000_update_mng_vlan(adapter); 3862 3863 /* DMA latency requirement to workaround jumbo issue */ 3864 if (adapter->hw.mac.type == e1000_pch2lan) 3865 pm_qos_add_request(&adapter->netdev->pm_qos_req, 3866 PM_QOS_CPU_DMA_LATENCY, 3867 PM_QOS_DEFAULT_VALUE); 3868 3869 /* 3870 * before we allocate an interrupt, we must be ready to handle it. 3871 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt 3872 * as soon as we call pci_request_irq, so we have to setup our 3873 * clean_rx handler before we do so. 3874 */ 3875 e1000_configure(adapter); 3876 3877 err = e1000_request_irq(adapter); 3878 if (err) 3879 goto err_req_irq; 3880 3881 /* 3882 * Work around PCIe errata with MSI interrupts causing some chipsets to 3883 * ignore e1000e MSI messages, which means we need to test our MSI 3884 * interrupt now 3885 */ 3886 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) { 3887 err = e1000_test_msi(adapter); 3888 if (err) { 3889 e_err("Interrupt allocation failed\n"); 3890 goto err_req_irq; 3891 } 3892 } 3893 3894 /* From here on the code is the same as e1000e_up() */ 3895 clear_bit(__E1000_DOWN, &adapter->state); 3896 3897 napi_enable(&adapter->napi); 3898 3899 e1000_irq_enable(adapter); 3900 3901 adapter->tx_hang_recheck = false; 3902 netif_start_queue(netdev); 3903 3904 adapter->idle_check = true; 3905 pm_runtime_put(&pdev->dev); 3906 3907 /* fire a link status change interrupt to start the watchdog */ 3908 if (adapter->msix_entries) 3909 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER); 3910 else 3911 ew32(ICS, E1000_ICS_LSC); 3912 3913 return 0; 3914 3915 err_req_irq: 3916 e1000e_release_hw_control(adapter); 3917 e1000_power_down_phy(adapter); 3918 e1000e_free_rx_resources(adapter->rx_ring); 3919 err_setup_rx: 3920 e1000e_free_tx_resources(adapter->tx_ring); 3921 err_setup_tx: 3922 e1000e_reset(adapter); 3923 pm_runtime_put_sync(&pdev->dev); 3924 3925 return err; 3926 } 3927 3928 /** 3929 * e1000_close - Disables a network interface 3930 * @netdev: network interface device structure 3931 * 3932 * Returns 0, this is not allowed to fail 3933 * 3934 * The close entry point is called when an interface is de-activated 3935 * by the OS. The hardware is still under the drivers control, but 3936 * needs to be disabled. A global MAC reset is issued to stop the 3937 * hardware, and all transmit and receive resources are freed. 3938 **/ 3939 static int e1000_close(struct net_device *netdev) 3940 { 3941 struct e1000_adapter *adapter = netdev_priv(netdev); 3942 struct pci_dev *pdev = adapter->pdev; 3943 int count = E1000_CHECK_RESET_COUNT; 3944 3945 while (test_bit(__E1000_RESETTING, &adapter->state) && count--) 3946 usleep_range(10000, 20000); 3947 3948 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state)); 3949 3950 pm_runtime_get_sync(&pdev->dev); 3951 3952 napi_disable(&adapter->napi); 3953 3954 if (!test_bit(__E1000_DOWN, &adapter->state)) { 3955 e1000e_down(adapter); 3956 e1000_free_irq(adapter); 3957 } 3958 e1000_power_down_phy(adapter); 3959 3960 e1000e_free_tx_resources(adapter->tx_ring); 3961 e1000e_free_rx_resources(adapter->rx_ring); 3962 3963 /* 3964 * kill manageability vlan ID if supported, but not if a vlan with 3965 * the same ID is registered on the host OS (let 8021q kill it) 3966 */ 3967 if (adapter->hw.mng_cookie.status & 3968 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) 3969 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); 3970 3971 /* 3972 * If AMT is enabled, let the firmware know that the network 3973 * interface is now closed 3974 */ 3975 if ((adapter->flags & FLAG_HAS_AMT) && 3976 !test_bit(__E1000_TESTING, &adapter->state)) 3977 e1000e_release_hw_control(adapter); 3978 3979 if (adapter->hw.mac.type == e1000_pch2lan) 3980 pm_qos_remove_request(&adapter->netdev->pm_qos_req); 3981 3982 pm_runtime_put_sync(&pdev->dev); 3983 3984 return 0; 3985 } 3986 /** 3987 * e1000_set_mac - Change the Ethernet Address of the NIC 3988 * @netdev: network interface device structure 3989 * @p: pointer to an address structure 3990 * 3991 * Returns 0 on success, negative on failure 3992 **/ 3993 static int e1000_set_mac(struct net_device *netdev, void *p) 3994 { 3995 struct e1000_adapter *adapter = netdev_priv(netdev); 3996 struct e1000_hw *hw = &adapter->hw; 3997 struct sockaddr *addr = p; 3998 3999 if (!is_valid_ether_addr(addr->sa_data)) 4000 return -EADDRNOTAVAIL; 4001 4002 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 4003 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len); 4004 4005 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0); 4006 4007 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) { 4008 /* activate the work around */ 4009 e1000e_set_laa_state_82571(&adapter->hw, 1); 4010 4011 /* 4012 * Hold a copy of the LAA in RAR[14] This is done so that 4013 * between the time RAR[0] gets clobbered and the time it 4014 * gets fixed (in e1000_watchdog), the actual LAA is in one 4015 * of the RARs and no incoming packets directed to this port 4016 * are dropped. Eventually the LAA will be in RAR[0] and 4017 * RAR[14] 4018 */ 4019 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 4020 adapter->hw.mac.rar_entry_count - 1); 4021 } 4022 4023 return 0; 4024 } 4025 4026 /** 4027 * e1000e_update_phy_task - work thread to update phy 4028 * @work: pointer to our work struct 4029 * 4030 * this worker thread exists because we must acquire a 4031 * semaphore to read the phy, which we could msleep while 4032 * waiting for it, and we can't msleep in a timer. 4033 **/ 4034 static void e1000e_update_phy_task(struct work_struct *work) 4035 { 4036 struct e1000_adapter *adapter = container_of(work, 4037 struct e1000_adapter, update_phy_task); 4038 4039 if (test_bit(__E1000_DOWN, &adapter->state)) 4040 return; 4041 4042 e1000_get_phy_info(&adapter->hw); 4043 } 4044 4045 /* 4046 * Need to wait a few seconds after link up to get diagnostic information from 4047 * the phy 4048 */ 4049 static void e1000_update_phy_info(unsigned long data) 4050 { 4051 struct e1000_adapter *adapter = (struct e1000_adapter *) data; 4052 4053 if (test_bit(__E1000_DOWN, &adapter->state)) 4054 return; 4055 4056 schedule_work(&adapter->update_phy_task); 4057 } 4058 4059 /** 4060 * e1000e_update_phy_stats - Update the PHY statistics counters 4061 * @adapter: board private structure 4062 * 4063 * Read/clear the upper 16-bit PHY registers and read/accumulate lower 4064 **/ 4065 static void e1000e_update_phy_stats(struct e1000_adapter *adapter) 4066 { 4067 struct e1000_hw *hw = &adapter->hw; 4068 s32 ret_val; 4069 u16 phy_data; 4070 4071 ret_val = hw->phy.ops.acquire(hw); 4072 if (ret_val) 4073 return; 4074 4075 /* 4076 * A page set is expensive so check if already on desired page. 4077 * If not, set to the page with the PHY status registers. 4078 */ 4079 hw->phy.addr = 1; 4080 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, 4081 &phy_data); 4082 if (ret_val) 4083 goto release; 4084 if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) { 4085 ret_val = hw->phy.ops.set_page(hw, 4086 HV_STATS_PAGE << IGP_PAGE_SHIFT); 4087 if (ret_val) 4088 goto release; 4089 } 4090 4091 /* Single Collision Count */ 4092 hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data); 4093 ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data); 4094 if (!ret_val) 4095 adapter->stats.scc += phy_data; 4096 4097 /* Excessive Collision Count */ 4098 hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data); 4099 ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data); 4100 if (!ret_val) 4101 adapter->stats.ecol += phy_data; 4102 4103 /* Multiple Collision Count */ 4104 hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data); 4105 ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data); 4106 if (!ret_val) 4107 adapter->stats.mcc += phy_data; 4108 4109 /* Late Collision Count */ 4110 hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data); 4111 ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data); 4112 if (!ret_val) 4113 adapter->stats.latecol += phy_data; 4114 4115 /* Collision Count - also used for adaptive IFS */ 4116 hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data); 4117 ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data); 4118 if (!ret_val) 4119 hw->mac.collision_delta = phy_data; 4120 4121 /* Defer Count */ 4122 hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data); 4123 ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data); 4124 if (!ret_val) 4125 adapter->stats.dc += phy_data; 4126 4127 /* Transmit with no CRS */ 4128 hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data); 4129 ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data); 4130 if (!ret_val) 4131 adapter->stats.tncrs += phy_data; 4132 4133 release: 4134 hw->phy.ops.release(hw); 4135 } 4136 4137 /** 4138 * e1000e_update_stats - Update the board statistics counters 4139 * @adapter: board private structure 4140 **/ 4141 static void e1000e_update_stats(struct e1000_adapter *adapter) 4142 { 4143 struct net_device *netdev = adapter->netdev; 4144 struct e1000_hw *hw = &adapter->hw; 4145 struct pci_dev *pdev = adapter->pdev; 4146 4147 /* 4148 * Prevent stats update while adapter is being reset, or if the pci 4149 * connection is down. 4150 */ 4151 if (adapter->link_speed == 0) 4152 return; 4153 if (pci_channel_offline(pdev)) 4154 return; 4155 4156 adapter->stats.crcerrs += er32(CRCERRS); 4157 adapter->stats.gprc += er32(GPRC); 4158 adapter->stats.gorc += er32(GORCL); 4159 er32(GORCH); /* Clear gorc */ 4160 adapter->stats.bprc += er32(BPRC); 4161 adapter->stats.mprc += er32(MPRC); 4162 adapter->stats.roc += er32(ROC); 4163 4164 adapter->stats.mpc += er32(MPC); 4165 4166 /* Half-duplex statistics */ 4167 if (adapter->link_duplex == HALF_DUPLEX) { 4168 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) { 4169 e1000e_update_phy_stats(adapter); 4170 } else { 4171 adapter->stats.scc += er32(SCC); 4172 adapter->stats.ecol += er32(ECOL); 4173 adapter->stats.mcc += er32(MCC); 4174 adapter->stats.latecol += er32(LATECOL); 4175 adapter->stats.dc += er32(DC); 4176 4177 hw->mac.collision_delta = er32(COLC); 4178 4179 if ((hw->mac.type != e1000_82574) && 4180 (hw->mac.type != e1000_82583)) 4181 adapter->stats.tncrs += er32(TNCRS); 4182 } 4183 adapter->stats.colc += hw->mac.collision_delta; 4184 } 4185 4186 adapter->stats.xonrxc += er32(XONRXC); 4187 adapter->stats.xontxc += er32(XONTXC); 4188 adapter->stats.xoffrxc += er32(XOFFRXC); 4189 adapter->stats.xofftxc += er32(XOFFTXC); 4190 adapter->stats.gptc += er32(GPTC); 4191 adapter->stats.gotc += er32(GOTCL); 4192 er32(GOTCH); /* Clear gotc */ 4193 adapter->stats.rnbc += er32(RNBC); 4194 adapter->stats.ruc += er32(RUC); 4195 4196 adapter->stats.mptc += er32(MPTC); 4197 adapter->stats.bptc += er32(BPTC); 4198 4199 /* used for adaptive IFS */ 4200 4201 hw->mac.tx_packet_delta = er32(TPT); 4202 adapter->stats.tpt += hw->mac.tx_packet_delta; 4203 4204 adapter->stats.algnerrc += er32(ALGNERRC); 4205 adapter->stats.rxerrc += er32(RXERRC); 4206 adapter->stats.cexterr += er32(CEXTERR); 4207 adapter->stats.tsctc += er32(TSCTC); 4208 adapter->stats.tsctfc += er32(TSCTFC); 4209 4210 /* Fill out the OS statistics structure */ 4211 netdev->stats.multicast = adapter->stats.mprc; 4212 netdev->stats.collisions = adapter->stats.colc; 4213 4214 /* Rx Errors */ 4215 4216 /* 4217 * RLEC on some newer hardware can be incorrect so build 4218 * our own version based on RUC and ROC 4219 */ 4220 netdev->stats.rx_errors = adapter->stats.rxerrc + 4221 adapter->stats.crcerrs + adapter->stats.algnerrc + 4222 adapter->stats.ruc + adapter->stats.roc + 4223 adapter->stats.cexterr; 4224 netdev->stats.rx_length_errors = adapter->stats.ruc + 4225 adapter->stats.roc; 4226 netdev->stats.rx_crc_errors = adapter->stats.crcerrs; 4227 netdev->stats.rx_frame_errors = adapter->stats.algnerrc; 4228 netdev->stats.rx_missed_errors = adapter->stats.mpc; 4229 4230 /* Tx Errors */ 4231 netdev->stats.tx_errors = adapter->stats.ecol + 4232 adapter->stats.latecol; 4233 netdev->stats.tx_aborted_errors = adapter->stats.ecol; 4234 netdev->stats.tx_window_errors = adapter->stats.latecol; 4235 netdev->stats.tx_carrier_errors = adapter->stats.tncrs; 4236 4237 /* Tx Dropped needs to be maintained elsewhere */ 4238 4239 /* Management Stats */ 4240 adapter->stats.mgptc += er32(MGTPTC); 4241 adapter->stats.mgprc += er32(MGTPRC); 4242 adapter->stats.mgpdc += er32(MGTPDC); 4243 } 4244 4245 /** 4246 * e1000_phy_read_status - Update the PHY register status snapshot 4247 * @adapter: board private structure 4248 **/ 4249 static void e1000_phy_read_status(struct e1000_adapter *adapter) 4250 { 4251 struct e1000_hw *hw = &adapter->hw; 4252 struct e1000_phy_regs *phy = &adapter->phy_regs; 4253 4254 if ((er32(STATUS) & E1000_STATUS_LU) && 4255 (adapter->hw.phy.media_type == e1000_media_type_copper)) { 4256 int ret_val; 4257 4258 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr); 4259 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr); 4260 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise); 4261 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa); 4262 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion); 4263 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000); 4264 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000); 4265 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus); 4266 if (ret_val) 4267 e_warn("Error reading PHY register\n"); 4268 } else { 4269 /* 4270 * Do not read PHY registers if link is not up 4271 * Set values to typical power-on defaults 4272 */ 4273 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX); 4274 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL | 4275 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE | 4276 BMSR_ERCAP); 4277 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP | 4278 ADVERTISE_ALL | ADVERTISE_CSMA); 4279 phy->lpa = 0; 4280 phy->expansion = EXPANSION_ENABLENPAGE; 4281 phy->ctrl1000 = ADVERTISE_1000FULL; 4282 phy->stat1000 = 0; 4283 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF); 4284 } 4285 } 4286 4287 static void e1000_print_link_info(struct e1000_adapter *adapter) 4288 { 4289 struct e1000_hw *hw = &adapter->hw; 4290 u32 ctrl = er32(CTRL); 4291 4292 /* Link status message must follow this format for user tools */ 4293 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n", 4294 adapter->netdev->name, 4295 adapter->link_speed, 4296 adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half", 4297 (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" : 4298 (ctrl & E1000_CTRL_RFCE) ? "Rx" : 4299 (ctrl & E1000_CTRL_TFCE) ? "Tx" : "None"); 4300 } 4301 4302 static bool e1000e_has_link(struct e1000_adapter *adapter) 4303 { 4304 struct e1000_hw *hw = &adapter->hw; 4305 bool link_active = false; 4306 s32 ret_val = 0; 4307 4308 /* 4309 * get_link_status is set on LSC (link status) interrupt or 4310 * Rx sequence error interrupt. get_link_status will stay 4311 * false until the check_for_link establishes link 4312 * for copper adapters ONLY 4313 */ 4314 switch (hw->phy.media_type) { 4315 case e1000_media_type_copper: 4316 if (hw->mac.get_link_status) { 4317 ret_val = hw->mac.ops.check_for_link(hw); 4318 link_active = !hw->mac.get_link_status; 4319 } else { 4320 link_active = true; 4321 } 4322 break; 4323 case e1000_media_type_fiber: 4324 ret_val = hw->mac.ops.check_for_link(hw); 4325 link_active = !!(er32(STATUS) & E1000_STATUS_LU); 4326 break; 4327 case e1000_media_type_internal_serdes: 4328 ret_val = hw->mac.ops.check_for_link(hw); 4329 link_active = adapter->hw.mac.serdes_has_link; 4330 break; 4331 default: 4332 case e1000_media_type_unknown: 4333 break; 4334 } 4335 4336 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) && 4337 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) { 4338 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */ 4339 e_info("Gigabit has been disabled, downgrading speed\n"); 4340 } 4341 4342 return link_active; 4343 } 4344 4345 static void e1000e_enable_receives(struct e1000_adapter *adapter) 4346 { 4347 /* make sure the receive unit is started */ 4348 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) && 4349 (adapter->flags & FLAG_RX_RESTART_NOW)) { 4350 struct e1000_hw *hw = &adapter->hw; 4351 u32 rctl = er32(RCTL); 4352 ew32(RCTL, rctl | E1000_RCTL_EN); 4353 adapter->flags &= ~FLAG_RX_RESTART_NOW; 4354 } 4355 } 4356 4357 static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter) 4358 { 4359 struct e1000_hw *hw = &adapter->hw; 4360 4361 /* 4362 * With 82574 controllers, PHY needs to be checked periodically 4363 * for hung state and reset, if two calls return true 4364 */ 4365 if (e1000_check_phy_82574(hw)) 4366 adapter->phy_hang_count++; 4367 else 4368 adapter->phy_hang_count = 0; 4369 4370 if (adapter->phy_hang_count > 1) { 4371 adapter->phy_hang_count = 0; 4372 schedule_work(&adapter->reset_task); 4373 } 4374 } 4375 4376 /** 4377 * e1000_watchdog - Timer Call-back 4378 * @data: pointer to adapter cast into an unsigned long 4379 **/ 4380 static void e1000_watchdog(unsigned long data) 4381 { 4382 struct e1000_adapter *adapter = (struct e1000_adapter *) data; 4383 4384 /* Do the rest outside of interrupt context */ 4385 schedule_work(&adapter->watchdog_task); 4386 4387 /* TODO: make this use queue_delayed_work() */ 4388 } 4389 4390 static void e1000_watchdog_task(struct work_struct *work) 4391 { 4392 struct e1000_adapter *adapter = container_of(work, 4393 struct e1000_adapter, watchdog_task); 4394 struct net_device *netdev = adapter->netdev; 4395 struct e1000_mac_info *mac = &adapter->hw.mac; 4396 struct e1000_phy_info *phy = &adapter->hw.phy; 4397 struct e1000_ring *tx_ring = adapter->tx_ring; 4398 struct e1000_hw *hw = &adapter->hw; 4399 u32 link, tctl; 4400 4401 if (test_bit(__E1000_DOWN, &adapter->state)) 4402 return; 4403 4404 link = e1000e_has_link(adapter); 4405 if ((netif_carrier_ok(netdev)) && link) { 4406 /* Cancel scheduled suspend requests. */ 4407 pm_runtime_resume(netdev->dev.parent); 4408 4409 e1000e_enable_receives(adapter); 4410 goto link_up; 4411 } 4412 4413 if ((e1000e_enable_tx_pkt_filtering(hw)) && 4414 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)) 4415 e1000_update_mng_vlan(adapter); 4416 4417 if (link) { 4418 if (!netif_carrier_ok(netdev)) { 4419 bool txb2b = true; 4420 4421 /* Cancel scheduled suspend requests. */ 4422 pm_runtime_resume(netdev->dev.parent); 4423 4424 /* update snapshot of PHY registers on LSC */ 4425 e1000_phy_read_status(adapter); 4426 mac->ops.get_link_up_info(&adapter->hw, 4427 &adapter->link_speed, 4428 &adapter->link_duplex); 4429 e1000_print_link_info(adapter); 4430 /* 4431 * On supported PHYs, check for duplex mismatch only 4432 * if link has autonegotiated at 10/100 half 4433 */ 4434 if ((hw->phy.type == e1000_phy_igp_3 || 4435 hw->phy.type == e1000_phy_bm) && 4436 (hw->mac.autoneg == true) && 4437 (adapter->link_speed == SPEED_10 || 4438 adapter->link_speed == SPEED_100) && 4439 (adapter->link_duplex == HALF_DUPLEX)) { 4440 u16 autoneg_exp; 4441 4442 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp); 4443 4444 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS)) 4445 e_info("Autonegotiated half duplex but link partner cannot autoneg. Try forcing full duplex if link gets many collisions.\n"); 4446 } 4447 4448 /* adjust timeout factor according to speed/duplex */ 4449 adapter->tx_timeout_factor = 1; 4450 switch (adapter->link_speed) { 4451 case SPEED_10: 4452 txb2b = false; 4453 adapter->tx_timeout_factor = 16; 4454 break; 4455 case SPEED_100: 4456 txb2b = false; 4457 adapter->tx_timeout_factor = 10; 4458 break; 4459 } 4460 4461 /* 4462 * workaround: re-program speed mode bit after 4463 * link-up event 4464 */ 4465 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) && 4466 !txb2b) { 4467 u32 tarc0; 4468 tarc0 = er32(TARC(0)); 4469 tarc0 &= ~SPEED_MODE_BIT; 4470 ew32(TARC(0), tarc0); 4471 } 4472 4473 /* 4474 * disable TSO for pcie and 10/100 speeds, to avoid 4475 * some hardware issues 4476 */ 4477 if (!(adapter->flags & FLAG_TSO_FORCE)) { 4478 switch (adapter->link_speed) { 4479 case SPEED_10: 4480 case SPEED_100: 4481 e_info("10/100 speed: disabling TSO\n"); 4482 netdev->features &= ~NETIF_F_TSO; 4483 netdev->features &= ~NETIF_F_TSO6; 4484 break; 4485 case SPEED_1000: 4486 netdev->features |= NETIF_F_TSO; 4487 netdev->features |= NETIF_F_TSO6; 4488 break; 4489 default: 4490 /* oops */ 4491 break; 4492 } 4493 } 4494 4495 /* 4496 * enable transmits in the hardware, need to do this 4497 * after setting TARC(0) 4498 */ 4499 tctl = er32(TCTL); 4500 tctl |= E1000_TCTL_EN; 4501 ew32(TCTL, tctl); 4502 4503 /* 4504 * Perform any post-link-up configuration before 4505 * reporting link up. 4506 */ 4507 if (phy->ops.cfg_on_link_up) 4508 phy->ops.cfg_on_link_up(hw); 4509 4510 netif_carrier_on(netdev); 4511 4512 if (!test_bit(__E1000_DOWN, &adapter->state)) 4513 mod_timer(&adapter->phy_info_timer, 4514 round_jiffies(jiffies + 2 * HZ)); 4515 } 4516 } else { 4517 if (netif_carrier_ok(netdev)) { 4518 adapter->link_speed = 0; 4519 adapter->link_duplex = 0; 4520 /* Link status message must follow this format */ 4521 printk(KERN_INFO "e1000e: %s NIC Link is Down\n", 4522 adapter->netdev->name); 4523 netif_carrier_off(netdev); 4524 if (!test_bit(__E1000_DOWN, &adapter->state)) 4525 mod_timer(&adapter->phy_info_timer, 4526 round_jiffies(jiffies + 2 * HZ)); 4527 4528 if (adapter->flags & FLAG_RX_NEEDS_RESTART) 4529 schedule_work(&adapter->reset_task); 4530 else 4531 pm_schedule_suspend(netdev->dev.parent, 4532 LINK_TIMEOUT); 4533 } 4534 } 4535 4536 link_up: 4537 spin_lock(&adapter->stats64_lock); 4538 e1000e_update_stats(adapter); 4539 4540 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old; 4541 adapter->tpt_old = adapter->stats.tpt; 4542 mac->collision_delta = adapter->stats.colc - adapter->colc_old; 4543 adapter->colc_old = adapter->stats.colc; 4544 4545 adapter->gorc = adapter->stats.gorc - adapter->gorc_old; 4546 adapter->gorc_old = adapter->stats.gorc; 4547 adapter->gotc = adapter->stats.gotc - adapter->gotc_old; 4548 adapter->gotc_old = adapter->stats.gotc; 4549 spin_unlock(&adapter->stats64_lock); 4550 4551 e1000e_update_adaptive(&adapter->hw); 4552 4553 if (!netif_carrier_ok(netdev) && 4554 (e1000_desc_unused(tx_ring) + 1 < tx_ring->count)) { 4555 /* 4556 * We've lost link, so the controller stops DMA, 4557 * but we've got queued Tx work that's never going 4558 * to get done, so reset controller to flush Tx. 4559 * (Do the reset outside of interrupt context). 4560 */ 4561 schedule_work(&adapter->reset_task); 4562 /* return immediately since reset is imminent */ 4563 return; 4564 } 4565 4566 /* Simple mode for Interrupt Throttle Rate (ITR) */ 4567 if (adapter->itr_setting == 4) { 4568 /* 4569 * Symmetric Tx/Rx gets a reduced ITR=2000; 4570 * Total asymmetrical Tx or Rx gets ITR=8000; 4571 * everyone else is between 2000-8000. 4572 */ 4573 u32 goc = (adapter->gotc + adapter->gorc) / 10000; 4574 u32 dif = (adapter->gotc > adapter->gorc ? 4575 adapter->gotc - adapter->gorc : 4576 adapter->gorc - adapter->gotc) / 10000; 4577 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000; 4578 4579 ew32(ITR, 1000000000 / (itr * 256)); 4580 } 4581 4582 /* Cause software interrupt to ensure Rx ring is cleaned */ 4583 if (adapter->msix_entries) 4584 ew32(ICS, adapter->rx_ring->ims_val); 4585 else 4586 ew32(ICS, E1000_ICS_RXDMT0); 4587 4588 /* flush pending descriptors to memory before detecting Tx hang */ 4589 e1000e_flush_descriptors(adapter); 4590 4591 /* Force detection of hung controller every watchdog period */ 4592 adapter->detect_tx_hung = true; 4593 4594 /* 4595 * With 82571 controllers, LAA may be overwritten due to controller 4596 * reset from the other port. Set the appropriate LAA in RAR[0] 4597 */ 4598 if (e1000e_get_laa_state_82571(hw)) 4599 hw->mac.ops.rar_set(hw, adapter->hw.mac.addr, 0); 4600 4601 if (adapter->flags2 & FLAG2_CHECK_PHY_HANG) 4602 e1000e_check_82574_phy_workaround(adapter); 4603 4604 /* Reset the timer */ 4605 if (!test_bit(__E1000_DOWN, &adapter->state)) 4606 mod_timer(&adapter->watchdog_timer, 4607 round_jiffies(jiffies + 2 * HZ)); 4608 } 4609 4610 #define E1000_TX_FLAGS_CSUM 0x00000001 4611 #define E1000_TX_FLAGS_VLAN 0x00000002 4612 #define E1000_TX_FLAGS_TSO 0x00000004 4613 #define E1000_TX_FLAGS_IPV4 0x00000008 4614 #define E1000_TX_FLAGS_NO_FCS 0x00000010 4615 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000 4616 #define E1000_TX_FLAGS_VLAN_SHIFT 16 4617 4618 static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb) 4619 { 4620 struct e1000_context_desc *context_desc; 4621 struct e1000_buffer *buffer_info; 4622 unsigned int i; 4623 u32 cmd_length = 0; 4624 u16 ipcse = 0, tucse, mss; 4625 u8 ipcss, ipcso, tucss, tucso, hdr_len; 4626 4627 if (!skb_is_gso(skb)) 4628 return 0; 4629 4630 if (skb_header_cloned(skb)) { 4631 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); 4632 4633 if (err) 4634 return err; 4635 } 4636 4637 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 4638 mss = skb_shinfo(skb)->gso_size; 4639 if (skb->protocol == htons(ETH_P_IP)) { 4640 struct iphdr *iph = ip_hdr(skb); 4641 iph->tot_len = 0; 4642 iph->check = 0; 4643 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, 4644 0, IPPROTO_TCP, 0); 4645 cmd_length = E1000_TXD_CMD_IP; 4646 ipcse = skb_transport_offset(skb) - 1; 4647 } else if (skb_is_gso_v6(skb)) { 4648 ipv6_hdr(skb)->payload_len = 0; 4649 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, 4650 &ipv6_hdr(skb)->daddr, 4651 0, IPPROTO_TCP, 0); 4652 ipcse = 0; 4653 } 4654 ipcss = skb_network_offset(skb); 4655 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data; 4656 tucss = skb_transport_offset(skb); 4657 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data; 4658 tucse = 0; 4659 4660 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE | 4661 E1000_TXD_CMD_TCP | (skb->len - (hdr_len))); 4662 4663 i = tx_ring->next_to_use; 4664 context_desc = E1000_CONTEXT_DESC(*tx_ring, i); 4665 buffer_info = &tx_ring->buffer_info[i]; 4666 4667 context_desc->lower_setup.ip_fields.ipcss = ipcss; 4668 context_desc->lower_setup.ip_fields.ipcso = ipcso; 4669 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse); 4670 context_desc->upper_setup.tcp_fields.tucss = tucss; 4671 context_desc->upper_setup.tcp_fields.tucso = tucso; 4672 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse); 4673 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss); 4674 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len; 4675 context_desc->cmd_and_length = cpu_to_le32(cmd_length); 4676 4677 buffer_info->time_stamp = jiffies; 4678 buffer_info->next_to_watch = i; 4679 4680 i++; 4681 if (i == tx_ring->count) 4682 i = 0; 4683 tx_ring->next_to_use = i; 4684 4685 return 1; 4686 } 4687 4688 static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb) 4689 { 4690 struct e1000_adapter *adapter = tx_ring->adapter; 4691 struct e1000_context_desc *context_desc; 4692 struct e1000_buffer *buffer_info; 4693 unsigned int i; 4694 u8 css; 4695 u32 cmd_len = E1000_TXD_CMD_DEXT; 4696 __be16 protocol; 4697 4698 if (skb->ip_summed != CHECKSUM_PARTIAL) 4699 return 0; 4700 4701 if (skb->protocol == cpu_to_be16(ETH_P_8021Q)) 4702 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto; 4703 else 4704 protocol = skb->protocol; 4705 4706 switch (protocol) { 4707 case cpu_to_be16(ETH_P_IP): 4708 if (ip_hdr(skb)->protocol == IPPROTO_TCP) 4709 cmd_len |= E1000_TXD_CMD_TCP; 4710 break; 4711 case cpu_to_be16(ETH_P_IPV6): 4712 /* XXX not handling all IPV6 headers */ 4713 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP) 4714 cmd_len |= E1000_TXD_CMD_TCP; 4715 break; 4716 default: 4717 if (unlikely(net_ratelimit())) 4718 e_warn("checksum_partial proto=%x!\n", 4719 be16_to_cpu(protocol)); 4720 break; 4721 } 4722 4723 css = skb_checksum_start_offset(skb); 4724 4725 i = tx_ring->next_to_use; 4726 buffer_info = &tx_ring->buffer_info[i]; 4727 context_desc = E1000_CONTEXT_DESC(*tx_ring, i); 4728 4729 context_desc->lower_setup.ip_config = 0; 4730 context_desc->upper_setup.tcp_fields.tucss = css; 4731 context_desc->upper_setup.tcp_fields.tucso = 4732 css + skb->csum_offset; 4733 context_desc->upper_setup.tcp_fields.tucse = 0; 4734 context_desc->tcp_seg_setup.data = 0; 4735 context_desc->cmd_and_length = cpu_to_le32(cmd_len); 4736 4737 buffer_info->time_stamp = jiffies; 4738 buffer_info->next_to_watch = i; 4739 4740 i++; 4741 if (i == tx_ring->count) 4742 i = 0; 4743 tx_ring->next_to_use = i; 4744 4745 return 1; 4746 } 4747 4748 #define E1000_MAX_PER_TXD 8192 4749 #define E1000_MAX_TXD_PWR 12 4750 4751 static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb, 4752 unsigned int first, unsigned int max_per_txd, 4753 unsigned int nr_frags, unsigned int mss) 4754 { 4755 struct e1000_adapter *adapter = tx_ring->adapter; 4756 struct pci_dev *pdev = adapter->pdev; 4757 struct e1000_buffer *buffer_info; 4758 unsigned int len = skb_headlen(skb); 4759 unsigned int offset = 0, size, count = 0, i; 4760 unsigned int f, bytecount, segs; 4761 4762 i = tx_ring->next_to_use; 4763 4764 while (len) { 4765 buffer_info = &tx_ring->buffer_info[i]; 4766 size = min(len, max_per_txd); 4767 4768 buffer_info->length = size; 4769 buffer_info->time_stamp = jiffies; 4770 buffer_info->next_to_watch = i; 4771 buffer_info->dma = dma_map_single(&pdev->dev, 4772 skb->data + offset, 4773 size, DMA_TO_DEVICE); 4774 buffer_info->mapped_as_page = false; 4775 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) 4776 goto dma_error; 4777 4778 len -= size; 4779 offset += size; 4780 count++; 4781 4782 if (len) { 4783 i++; 4784 if (i == tx_ring->count) 4785 i = 0; 4786 } 4787 } 4788 4789 for (f = 0; f < nr_frags; f++) { 4790 const struct skb_frag_struct *frag; 4791 4792 frag = &skb_shinfo(skb)->frags[f]; 4793 len = skb_frag_size(frag); 4794 offset = 0; 4795 4796 while (len) { 4797 i++; 4798 if (i == tx_ring->count) 4799 i = 0; 4800 4801 buffer_info = &tx_ring->buffer_info[i]; 4802 size = min(len, max_per_txd); 4803 4804 buffer_info->length = size; 4805 buffer_info->time_stamp = jiffies; 4806 buffer_info->next_to_watch = i; 4807 buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag, 4808 offset, size, DMA_TO_DEVICE); 4809 buffer_info->mapped_as_page = true; 4810 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) 4811 goto dma_error; 4812 4813 len -= size; 4814 offset += size; 4815 count++; 4816 } 4817 } 4818 4819 segs = skb_shinfo(skb)->gso_segs ? : 1; 4820 /* multiply data chunks by size of headers */ 4821 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len; 4822 4823 tx_ring->buffer_info[i].skb = skb; 4824 tx_ring->buffer_info[i].segs = segs; 4825 tx_ring->buffer_info[i].bytecount = bytecount; 4826 tx_ring->buffer_info[first].next_to_watch = i; 4827 4828 return count; 4829 4830 dma_error: 4831 dev_err(&pdev->dev, "Tx DMA map failed\n"); 4832 buffer_info->dma = 0; 4833 if (count) 4834 count--; 4835 4836 while (count--) { 4837 if (i == 0) 4838 i += tx_ring->count; 4839 i--; 4840 buffer_info = &tx_ring->buffer_info[i]; 4841 e1000_put_txbuf(tx_ring, buffer_info); 4842 } 4843 4844 return 0; 4845 } 4846 4847 static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count) 4848 { 4849 struct e1000_adapter *adapter = tx_ring->adapter; 4850 struct e1000_tx_desc *tx_desc = NULL; 4851 struct e1000_buffer *buffer_info; 4852 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS; 4853 unsigned int i; 4854 4855 if (tx_flags & E1000_TX_FLAGS_TSO) { 4856 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D | 4857 E1000_TXD_CMD_TSE; 4858 txd_upper |= E1000_TXD_POPTS_TXSM << 8; 4859 4860 if (tx_flags & E1000_TX_FLAGS_IPV4) 4861 txd_upper |= E1000_TXD_POPTS_IXSM << 8; 4862 } 4863 4864 if (tx_flags & E1000_TX_FLAGS_CSUM) { 4865 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; 4866 txd_upper |= E1000_TXD_POPTS_TXSM << 8; 4867 } 4868 4869 if (tx_flags & E1000_TX_FLAGS_VLAN) { 4870 txd_lower |= E1000_TXD_CMD_VLE; 4871 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK); 4872 } 4873 4874 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS)) 4875 txd_lower &= ~(E1000_TXD_CMD_IFCS); 4876 4877 i = tx_ring->next_to_use; 4878 4879 do { 4880 buffer_info = &tx_ring->buffer_info[i]; 4881 tx_desc = E1000_TX_DESC(*tx_ring, i); 4882 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); 4883 tx_desc->lower.data = 4884 cpu_to_le32(txd_lower | buffer_info->length); 4885 tx_desc->upper.data = cpu_to_le32(txd_upper); 4886 4887 i++; 4888 if (i == tx_ring->count) 4889 i = 0; 4890 } while (--count > 0); 4891 4892 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd); 4893 4894 /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */ 4895 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS)) 4896 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS)); 4897 4898 /* 4899 * Force memory writes to complete before letting h/w 4900 * know there are new descriptors to fetch. (Only 4901 * applicable for weak-ordered memory model archs, 4902 * such as IA-64). 4903 */ 4904 wmb(); 4905 4906 tx_ring->next_to_use = i; 4907 4908 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) 4909 e1000e_update_tdt_wa(tx_ring, i); 4910 else 4911 writel(i, tx_ring->tail); 4912 4913 /* 4914 * we need this if more than one processor can write to our tail 4915 * at a time, it synchronizes IO on IA64/Altix systems 4916 */ 4917 mmiowb(); 4918 } 4919 4920 #define MINIMUM_DHCP_PACKET_SIZE 282 4921 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter, 4922 struct sk_buff *skb) 4923 { 4924 struct e1000_hw *hw = &adapter->hw; 4925 u16 length, offset; 4926 4927 if (vlan_tx_tag_present(skb)) { 4928 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) && 4929 (adapter->hw.mng_cookie.status & 4930 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))) 4931 return 0; 4932 } 4933 4934 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE) 4935 return 0; 4936 4937 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP)) 4938 return 0; 4939 4940 { 4941 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14); 4942 struct udphdr *udp; 4943 4944 if (ip->protocol != IPPROTO_UDP) 4945 return 0; 4946 4947 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2)); 4948 if (ntohs(udp->dest) != 67) 4949 return 0; 4950 4951 offset = (u8 *)udp + 8 - skb->data; 4952 length = skb->len - offset; 4953 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length); 4954 } 4955 4956 return 0; 4957 } 4958 4959 static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size) 4960 { 4961 struct e1000_adapter *adapter = tx_ring->adapter; 4962 4963 netif_stop_queue(adapter->netdev); 4964 /* 4965 * Herbert's original patch had: 4966 * smp_mb__after_netif_stop_queue(); 4967 * but since that doesn't exist yet, just open code it. 4968 */ 4969 smp_mb(); 4970 4971 /* 4972 * We need to check again in a case another CPU has just 4973 * made room available. 4974 */ 4975 if (e1000_desc_unused(tx_ring) < size) 4976 return -EBUSY; 4977 4978 /* A reprieve! */ 4979 netif_start_queue(adapter->netdev); 4980 ++adapter->restart_queue; 4981 return 0; 4982 } 4983 4984 static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size) 4985 { 4986 if (e1000_desc_unused(tx_ring) >= size) 4987 return 0; 4988 return __e1000_maybe_stop_tx(tx_ring, size); 4989 } 4990 4991 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1) 4992 static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb, 4993 struct net_device *netdev) 4994 { 4995 struct e1000_adapter *adapter = netdev_priv(netdev); 4996 struct e1000_ring *tx_ring = adapter->tx_ring; 4997 unsigned int first; 4998 unsigned int max_per_txd = E1000_MAX_PER_TXD; 4999 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR; 5000 unsigned int tx_flags = 0; 5001 unsigned int len = skb_headlen(skb); 5002 unsigned int nr_frags; 5003 unsigned int mss; 5004 int count = 0; 5005 int tso; 5006 unsigned int f; 5007 5008 if (test_bit(__E1000_DOWN, &adapter->state)) { 5009 dev_kfree_skb_any(skb); 5010 return NETDEV_TX_OK; 5011 } 5012 5013 if (skb->len <= 0) { 5014 dev_kfree_skb_any(skb); 5015 return NETDEV_TX_OK; 5016 } 5017 5018 mss = skb_shinfo(skb)->gso_size; 5019 /* 5020 * The controller does a simple calculation to 5021 * make sure there is enough room in the FIFO before 5022 * initiating the DMA for each buffer. The calc is: 5023 * 4 = ceil(buffer len/mss). To make sure we don't 5024 * overrun the FIFO, adjust the max buffer len if mss 5025 * drops. 5026 */ 5027 if (mss) { 5028 u8 hdr_len; 5029 max_per_txd = min(mss << 2, max_per_txd); 5030 max_txd_pwr = fls(max_per_txd) - 1; 5031 5032 /* 5033 * TSO Workaround for 82571/2/3 Controllers -- if skb->data 5034 * points to just header, pull a few bytes of payload from 5035 * frags into skb->data 5036 */ 5037 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 5038 /* 5039 * we do this workaround for ES2LAN, but it is un-necessary, 5040 * avoiding it could save a lot of cycles 5041 */ 5042 if (skb->data_len && (hdr_len == len)) { 5043 unsigned int pull_size; 5044 5045 pull_size = min_t(unsigned int, 4, skb->data_len); 5046 if (!__pskb_pull_tail(skb, pull_size)) { 5047 e_err("__pskb_pull_tail failed.\n"); 5048 dev_kfree_skb_any(skb); 5049 return NETDEV_TX_OK; 5050 } 5051 len = skb_headlen(skb); 5052 } 5053 } 5054 5055 /* reserve a descriptor for the offload context */ 5056 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL)) 5057 count++; 5058 count++; 5059 5060 count += TXD_USE_COUNT(len, max_txd_pwr); 5061 5062 nr_frags = skb_shinfo(skb)->nr_frags; 5063 for (f = 0; f < nr_frags; f++) 5064 count += TXD_USE_COUNT(skb_frag_size(&skb_shinfo(skb)->frags[f]), 5065 max_txd_pwr); 5066 5067 if (adapter->hw.mac.tx_pkt_filtering) 5068 e1000_transfer_dhcp_info(adapter, skb); 5069 5070 /* 5071 * need: count + 2 desc gap to keep tail from touching 5072 * head, otherwise try next time 5073 */ 5074 if (e1000_maybe_stop_tx(tx_ring, count + 2)) 5075 return NETDEV_TX_BUSY; 5076 5077 if (vlan_tx_tag_present(skb)) { 5078 tx_flags |= E1000_TX_FLAGS_VLAN; 5079 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT); 5080 } 5081 5082 first = tx_ring->next_to_use; 5083 5084 tso = e1000_tso(tx_ring, skb); 5085 if (tso < 0) { 5086 dev_kfree_skb_any(skb); 5087 return NETDEV_TX_OK; 5088 } 5089 5090 if (tso) 5091 tx_flags |= E1000_TX_FLAGS_TSO; 5092 else if (e1000_tx_csum(tx_ring, skb)) 5093 tx_flags |= E1000_TX_FLAGS_CSUM; 5094 5095 /* 5096 * Old method was to assume IPv4 packet by default if TSO was enabled. 5097 * 82571 hardware supports TSO capabilities for IPv6 as well... 5098 * no longer assume, we must. 5099 */ 5100 if (skb->protocol == htons(ETH_P_IP)) 5101 tx_flags |= E1000_TX_FLAGS_IPV4; 5102 5103 if (unlikely(skb->no_fcs)) 5104 tx_flags |= E1000_TX_FLAGS_NO_FCS; 5105 5106 /* if count is 0 then mapping error has occurred */ 5107 count = e1000_tx_map(tx_ring, skb, first, max_per_txd, nr_frags, mss); 5108 if (count) { 5109 skb_tx_timestamp(skb); 5110 5111 netdev_sent_queue(netdev, skb->len); 5112 e1000_tx_queue(tx_ring, tx_flags, count); 5113 /* Make sure there is space in the ring for the next send. */ 5114 e1000_maybe_stop_tx(tx_ring, MAX_SKB_FRAGS + 2); 5115 5116 } else { 5117 dev_kfree_skb_any(skb); 5118 tx_ring->buffer_info[first].time_stamp = 0; 5119 tx_ring->next_to_use = first; 5120 } 5121 5122 return NETDEV_TX_OK; 5123 } 5124 5125 /** 5126 * e1000_tx_timeout - Respond to a Tx Hang 5127 * @netdev: network interface device structure 5128 **/ 5129 static void e1000_tx_timeout(struct net_device *netdev) 5130 { 5131 struct e1000_adapter *adapter = netdev_priv(netdev); 5132 5133 /* Do the reset outside of interrupt context */ 5134 adapter->tx_timeout_count++; 5135 schedule_work(&adapter->reset_task); 5136 } 5137 5138 static void e1000_reset_task(struct work_struct *work) 5139 { 5140 struct e1000_adapter *adapter; 5141 adapter = container_of(work, struct e1000_adapter, reset_task); 5142 5143 /* don't run the task if already down */ 5144 if (test_bit(__E1000_DOWN, &adapter->state)) 5145 return; 5146 5147 if (!((adapter->flags & FLAG_RX_NEEDS_RESTART) && 5148 (adapter->flags & FLAG_RX_RESTART_NOW))) { 5149 e1000e_dump(adapter); 5150 e_err("Reset adapter\n"); 5151 } 5152 e1000e_reinit_locked(adapter); 5153 } 5154 5155 /** 5156 * e1000_get_stats64 - Get System Network Statistics 5157 * @netdev: network interface device structure 5158 * @stats: rtnl_link_stats64 pointer 5159 * 5160 * Returns the address of the device statistics structure. 5161 **/ 5162 struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev, 5163 struct rtnl_link_stats64 *stats) 5164 { 5165 struct e1000_adapter *adapter = netdev_priv(netdev); 5166 5167 memset(stats, 0, sizeof(struct rtnl_link_stats64)); 5168 spin_lock(&adapter->stats64_lock); 5169 e1000e_update_stats(adapter); 5170 /* Fill out the OS statistics structure */ 5171 stats->rx_bytes = adapter->stats.gorc; 5172 stats->rx_packets = adapter->stats.gprc; 5173 stats->tx_bytes = adapter->stats.gotc; 5174 stats->tx_packets = adapter->stats.gptc; 5175 stats->multicast = adapter->stats.mprc; 5176 stats->collisions = adapter->stats.colc; 5177 5178 /* Rx Errors */ 5179 5180 /* 5181 * RLEC on some newer hardware can be incorrect so build 5182 * our own version based on RUC and ROC 5183 */ 5184 stats->rx_errors = adapter->stats.rxerrc + 5185 adapter->stats.crcerrs + adapter->stats.algnerrc + 5186 adapter->stats.ruc + adapter->stats.roc + 5187 adapter->stats.cexterr; 5188 stats->rx_length_errors = adapter->stats.ruc + 5189 adapter->stats.roc; 5190 stats->rx_crc_errors = adapter->stats.crcerrs; 5191 stats->rx_frame_errors = adapter->stats.algnerrc; 5192 stats->rx_missed_errors = adapter->stats.mpc; 5193 5194 /* Tx Errors */ 5195 stats->tx_errors = adapter->stats.ecol + 5196 adapter->stats.latecol; 5197 stats->tx_aborted_errors = adapter->stats.ecol; 5198 stats->tx_window_errors = adapter->stats.latecol; 5199 stats->tx_carrier_errors = adapter->stats.tncrs; 5200 5201 /* Tx Dropped needs to be maintained elsewhere */ 5202 5203 spin_unlock(&adapter->stats64_lock); 5204 return stats; 5205 } 5206 5207 /** 5208 * e1000_change_mtu - Change the Maximum Transfer Unit 5209 * @netdev: network interface device structure 5210 * @new_mtu: new value for maximum frame size 5211 * 5212 * Returns 0 on success, negative on failure 5213 **/ 5214 static int e1000_change_mtu(struct net_device *netdev, int new_mtu) 5215 { 5216 struct e1000_adapter *adapter = netdev_priv(netdev); 5217 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN; 5218 5219 /* Jumbo frame support */ 5220 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) && 5221 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) { 5222 e_err("Jumbo Frames not supported.\n"); 5223 return -EINVAL; 5224 } 5225 5226 /* Supported frame sizes */ 5227 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) || 5228 (max_frame > adapter->max_hw_frame_size)) { 5229 e_err("Unsupported MTU setting\n"); 5230 return -EINVAL; 5231 } 5232 5233 /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */ 5234 if ((adapter->hw.mac.type >= e1000_pch2lan) && 5235 !(adapter->flags2 & FLAG2_CRC_STRIPPING) && 5236 (new_mtu > ETH_DATA_LEN)) { 5237 e_err("Jumbo Frames not supported on this device when CRC stripping is disabled.\n"); 5238 return -EINVAL; 5239 } 5240 5241 while (test_and_set_bit(__E1000_RESETTING, &adapter->state)) 5242 usleep_range(1000, 2000); 5243 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */ 5244 adapter->max_frame_size = max_frame; 5245 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu); 5246 netdev->mtu = new_mtu; 5247 if (netif_running(netdev)) 5248 e1000e_down(adapter); 5249 5250 /* 5251 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN 5252 * means we reserve 2 more, this pushes us to allocate from the next 5253 * larger slab size. 5254 * i.e. RXBUFFER_2048 --> size-4096 slab 5255 * However with the new *_jumbo_rx* routines, jumbo receives will use 5256 * fragmented skbs 5257 */ 5258 5259 if (max_frame <= 2048) 5260 adapter->rx_buffer_len = 2048; 5261 else 5262 adapter->rx_buffer_len = 4096; 5263 5264 /* adjust allocation if LPE protects us, and we aren't using SBP */ 5265 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) || 5266 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN)) 5267 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN 5268 + ETH_FCS_LEN; 5269 5270 if (netif_running(netdev)) 5271 e1000e_up(adapter); 5272 else 5273 e1000e_reset(adapter); 5274 5275 clear_bit(__E1000_RESETTING, &adapter->state); 5276 5277 return 0; 5278 } 5279 5280 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, 5281 int cmd) 5282 { 5283 struct e1000_adapter *adapter = netdev_priv(netdev); 5284 struct mii_ioctl_data *data = if_mii(ifr); 5285 5286 if (adapter->hw.phy.media_type != e1000_media_type_copper) 5287 return -EOPNOTSUPP; 5288 5289 switch (cmd) { 5290 case SIOCGMIIPHY: 5291 data->phy_id = adapter->hw.phy.addr; 5292 break; 5293 case SIOCGMIIREG: 5294 e1000_phy_read_status(adapter); 5295 5296 switch (data->reg_num & 0x1F) { 5297 case MII_BMCR: 5298 data->val_out = adapter->phy_regs.bmcr; 5299 break; 5300 case MII_BMSR: 5301 data->val_out = adapter->phy_regs.bmsr; 5302 break; 5303 case MII_PHYSID1: 5304 data->val_out = (adapter->hw.phy.id >> 16); 5305 break; 5306 case MII_PHYSID2: 5307 data->val_out = (adapter->hw.phy.id & 0xFFFF); 5308 break; 5309 case MII_ADVERTISE: 5310 data->val_out = adapter->phy_regs.advertise; 5311 break; 5312 case MII_LPA: 5313 data->val_out = adapter->phy_regs.lpa; 5314 break; 5315 case MII_EXPANSION: 5316 data->val_out = adapter->phy_regs.expansion; 5317 break; 5318 case MII_CTRL1000: 5319 data->val_out = adapter->phy_regs.ctrl1000; 5320 break; 5321 case MII_STAT1000: 5322 data->val_out = adapter->phy_regs.stat1000; 5323 break; 5324 case MII_ESTATUS: 5325 data->val_out = adapter->phy_regs.estatus; 5326 break; 5327 default: 5328 return -EIO; 5329 } 5330 break; 5331 case SIOCSMIIREG: 5332 default: 5333 return -EOPNOTSUPP; 5334 } 5335 return 0; 5336 } 5337 5338 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 5339 { 5340 switch (cmd) { 5341 case SIOCGMIIPHY: 5342 case SIOCGMIIREG: 5343 case SIOCSMIIREG: 5344 return e1000_mii_ioctl(netdev, ifr, cmd); 5345 default: 5346 return -EOPNOTSUPP; 5347 } 5348 } 5349 5350 static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc) 5351 { 5352 struct e1000_hw *hw = &adapter->hw; 5353 u32 i, mac_reg; 5354 u16 phy_reg, wuc_enable; 5355 int retval = 0; 5356 5357 /* copy MAC RARs to PHY RARs */ 5358 e1000_copy_rx_addrs_to_phy_ich8lan(hw); 5359 5360 retval = hw->phy.ops.acquire(hw); 5361 if (retval) { 5362 e_err("Could not acquire PHY\n"); 5363 return retval; 5364 } 5365 5366 /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */ 5367 retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable); 5368 if (retval) 5369 goto release; 5370 5371 /* copy MAC MTA to PHY MTA - only needed for pchlan */ 5372 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) { 5373 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i); 5374 hw->phy.ops.write_reg_page(hw, BM_MTA(i), 5375 (u16)(mac_reg & 0xFFFF)); 5376 hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1, 5377 (u16)((mac_reg >> 16) & 0xFFFF)); 5378 } 5379 5380 /* configure PHY Rx Control register */ 5381 hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg); 5382 mac_reg = er32(RCTL); 5383 if (mac_reg & E1000_RCTL_UPE) 5384 phy_reg |= BM_RCTL_UPE; 5385 if (mac_reg & E1000_RCTL_MPE) 5386 phy_reg |= BM_RCTL_MPE; 5387 phy_reg &= ~(BM_RCTL_MO_MASK); 5388 if (mac_reg & E1000_RCTL_MO_3) 5389 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT) 5390 << BM_RCTL_MO_SHIFT); 5391 if (mac_reg & E1000_RCTL_BAM) 5392 phy_reg |= BM_RCTL_BAM; 5393 if (mac_reg & E1000_RCTL_PMCF) 5394 phy_reg |= BM_RCTL_PMCF; 5395 mac_reg = er32(CTRL); 5396 if (mac_reg & E1000_CTRL_RFCE) 5397 phy_reg |= BM_RCTL_RFCE; 5398 hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg); 5399 5400 /* enable PHY wakeup in MAC register */ 5401 ew32(WUFC, wufc); 5402 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN); 5403 5404 /* configure and enable PHY wakeup in PHY registers */ 5405 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc); 5406 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, E1000_WUC_PME_EN); 5407 5408 /* activate PHY wakeup */ 5409 wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT; 5410 retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable); 5411 if (retval) 5412 e_err("Could not set PHY Host Wakeup bit\n"); 5413 release: 5414 hw->phy.ops.release(hw); 5415 5416 return retval; 5417 } 5418 5419 static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake, 5420 bool runtime) 5421 { 5422 struct net_device *netdev = pci_get_drvdata(pdev); 5423 struct e1000_adapter *adapter = netdev_priv(netdev); 5424 struct e1000_hw *hw = &adapter->hw; 5425 u32 ctrl, ctrl_ext, rctl, status; 5426 /* Runtime suspend should only enable wakeup for link changes */ 5427 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol; 5428 int retval = 0; 5429 5430 netif_device_detach(netdev); 5431 5432 if (netif_running(netdev)) { 5433 int count = E1000_CHECK_RESET_COUNT; 5434 5435 while (test_bit(__E1000_RESETTING, &adapter->state) && count--) 5436 usleep_range(10000, 20000); 5437 5438 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state)); 5439 e1000e_down(adapter); 5440 e1000_free_irq(adapter); 5441 } 5442 e1000e_reset_interrupt_capability(adapter); 5443 5444 retval = pci_save_state(pdev); 5445 if (retval) 5446 return retval; 5447 5448 status = er32(STATUS); 5449 if (status & E1000_STATUS_LU) 5450 wufc &= ~E1000_WUFC_LNKC; 5451 5452 if (wufc) { 5453 e1000_setup_rctl(adapter); 5454 e1000e_set_rx_mode(netdev); 5455 5456 /* turn on all-multi mode if wake on multicast is enabled */ 5457 if (wufc & E1000_WUFC_MC) { 5458 rctl = er32(RCTL); 5459 rctl |= E1000_RCTL_MPE; 5460 ew32(RCTL, rctl); 5461 } 5462 5463 ctrl = er32(CTRL); 5464 /* advertise wake from D3Cold */ 5465 #define E1000_CTRL_ADVD3WUC 0x00100000 5466 /* phy power management enable */ 5467 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000 5468 ctrl |= E1000_CTRL_ADVD3WUC; 5469 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP)) 5470 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT; 5471 ew32(CTRL, ctrl); 5472 5473 if (adapter->hw.phy.media_type == e1000_media_type_fiber || 5474 adapter->hw.phy.media_type == 5475 e1000_media_type_internal_serdes) { 5476 /* keep the laser running in D3 */ 5477 ctrl_ext = er32(CTRL_EXT); 5478 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA; 5479 ew32(CTRL_EXT, ctrl_ext); 5480 } 5481 5482 if (adapter->flags & FLAG_IS_ICH) 5483 e1000_suspend_workarounds_ich8lan(&adapter->hw); 5484 5485 /* Allow time for pending master requests to run */ 5486 e1000e_disable_pcie_master(&adapter->hw); 5487 5488 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) { 5489 /* enable wakeup by the PHY */ 5490 retval = e1000_init_phy_wakeup(adapter, wufc); 5491 if (retval) 5492 return retval; 5493 } else { 5494 /* enable wakeup by the MAC */ 5495 ew32(WUFC, wufc); 5496 ew32(WUC, E1000_WUC_PME_EN); 5497 } 5498 } else { 5499 ew32(WUC, 0); 5500 ew32(WUFC, 0); 5501 } 5502 5503 *enable_wake = !!wufc; 5504 5505 /* make sure adapter isn't asleep if manageability is enabled */ 5506 if ((adapter->flags & FLAG_MNG_PT_ENABLED) || 5507 (hw->mac.ops.check_mng_mode(hw))) 5508 *enable_wake = true; 5509 5510 if (adapter->hw.phy.type == e1000_phy_igp_3) 5511 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw); 5512 5513 /* 5514 * Release control of h/w to f/w. If f/w is AMT enabled, this 5515 * would have already happened in close and is redundant. 5516 */ 5517 e1000e_release_hw_control(adapter); 5518 5519 pci_disable_device(pdev); 5520 5521 return 0; 5522 } 5523 5524 static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake) 5525 { 5526 if (sleep && wake) { 5527 pci_prepare_to_sleep(pdev); 5528 return; 5529 } 5530 5531 pci_wake_from_d3(pdev, wake); 5532 pci_set_power_state(pdev, PCI_D3hot); 5533 } 5534 5535 static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep, 5536 bool wake) 5537 { 5538 struct net_device *netdev = pci_get_drvdata(pdev); 5539 struct e1000_adapter *adapter = netdev_priv(netdev); 5540 5541 /* 5542 * The pci-e switch on some quad port adapters will report a 5543 * correctable error when the MAC transitions from D0 to D3. To 5544 * prevent this we need to mask off the correctable errors on the 5545 * downstream port of the pci-e switch. 5546 */ 5547 if (adapter->flags & FLAG_IS_QUAD_PORT) { 5548 struct pci_dev *us_dev = pdev->bus->self; 5549 int pos = pci_pcie_cap(us_dev); 5550 u16 devctl; 5551 5552 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl); 5553 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, 5554 (devctl & ~PCI_EXP_DEVCTL_CERE)); 5555 5556 e1000_power_off(pdev, sleep, wake); 5557 5558 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl); 5559 } else { 5560 e1000_power_off(pdev, sleep, wake); 5561 } 5562 } 5563 5564 #ifdef CONFIG_PCIEASPM 5565 static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state) 5566 { 5567 pci_disable_link_state_locked(pdev, state); 5568 } 5569 #else 5570 static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state) 5571 { 5572 int pos; 5573 u16 reg16; 5574 5575 /* 5576 * Both device and parent should have the same ASPM setting. 5577 * Disable ASPM in downstream component first and then upstream. 5578 */ 5579 pos = pci_pcie_cap(pdev); 5580 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, ®16); 5581 reg16 &= ~state; 5582 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16); 5583 5584 if (!pdev->bus->self) 5585 return; 5586 5587 pos = pci_pcie_cap(pdev->bus->self); 5588 pci_read_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, ®16); 5589 reg16 &= ~state; 5590 pci_write_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, reg16); 5591 } 5592 #endif 5593 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state) 5594 { 5595 dev_info(&pdev->dev, "Disabling ASPM %s %s\n", 5596 (state & PCIE_LINK_STATE_L0S) ? "L0s" : "", 5597 (state & PCIE_LINK_STATE_L1) ? "L1" : ""); 5598 5599 __e1000e_disable_aspm(pdev, state); 5600 } 5601 5602 #ifdef CONFIG_PM 5603 static bool e1000e_pm_ready(struct e1000_adapter *adapter) 5604 { 5605 return !!adapter->tx_ring->buffer_info; 5606 } 5607 5608 static int __e1000_resume(struct pci_dev *pdev) 5609 { 5610 struct net_device *netdev = pci_get_drvdata(pdev); 5611 struct e1000_adapter *adapter = netdev_priv(netdev); 5612 struct e1000_hw *hw = &adapter->hw; 5613 u16 aspm_disable_flag = 0; 5614 u32 err; 5615 5616 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S) 5617 aspm_disable_flag = PCIE_LINK_STATE_L0S; 5618 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1) 5619 aspm_disable_flag |= PCIE_LINK_STATE_L1; 5620 if (aspm_disable_flag) 5621 e1000e_disable_aspm(pdev, aspm_disable_flag); 5622 5623 pci_set_power_state(pdev, PCI_D0); 5624 pci_restore_state(pdev); 5625 pci_save_state(pdev); 5626 5627 e1000e_set_interrupt_capability(adapter); 5628 if (netif_running(netdev)) { 5629 err = e1000_request_irq(adapter); 5630 if (err) 5631 return err; 5632 } 5633 5634 if (hw->mac.type >= e1000_pch2lan) 5635 e1000_resume_workarounds_pchlan(&adapter->hw); 5636 5637 e1000e_power_up_phy(adapter); 5638 5639 /* report the system wakeup cause from S3/S4 */ 5640 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) { 5641 u16 phy_data; 5642 5643 e1e_rphy(&adapter->hw, BM_WUS, &phy_data); 5644 if (phy_data) { 5645 e_info("PHY Wakeup cause - %s\n", 5646 phy_data & E1000_WUS_EX ? "Unicast Packet" : 5647 phy_data & E1000_WUS_MC ? "Multicast Packet" : 5648 phy_data & E1000_WUS_BC ? "Broadcast Packet" : 5649 phy_data & E1000_WUS_MAG ? "Magic Packet" : 5650 phy_data & E1000_WUS_LNKC ? 5651 "Link Status Change" : "other"); 5652 } 5653 e1e_wphy(&adapter->hw, BM_WUS, ~0); 5654 } else { 5655 u32 wus = er32(WUS); 5656 if (wus) { 5657 e_info("MAC Wakeup cause - %s\n", 5658 wus & E1000_WUS_EX ? "Unicast Packet" : 5659 wus & E1000_WUS_MC ? "Multicast Packet" : 5660 wus & E1000_WUS_BC ? "Broadcast Packet" : 5661 wus & E1000_WUS_MAG ? "Magic Packet" : 5662 wus & E1000_WUS_LNKC ? "Link Status Change" : 5663 "other"); 5664 } 5665 ew32(WUS, ~0); 5666 } 5667 5668 e1000e_reset(adapter); 5669 5670 e1000_init_manageability_pt(adapter); 5671 5672 if (netif_running(netdev)) 5673 e1000e_up(adapter); 5674 5675 netif_device_attach(netdev); 5676 5677 /* 5678 * If the controller has AMT, do not set DRV_LOAD until the interface 5679 * is up. For all other cases, let the f/w know that the h/w is now 5680 * under the control of the driver. 5681 */ 5682 if (!(adapter->flags & FLAG_HAS_AMT)) 5683 e1000e_get_hw_control(adapter); 5684 5685 return 0; 5686 } 5687 5688 #ifdef CONFIG_PM_SLEEP 5689 static int e1000_suspend(struct device *dev) 5690 { 5691 struct pci_dev *pdev = to_pci_dev(dev); 5692 int retval; 5693 bool wake; 5694 5695 retval = __e1000_shutdown(pdev, &wake, false); 5696 if (!retval) 5697 e1000_complete_shutdown(pdev, true, wake); 5698 5699 return retval; 5700 } 5701 5702 static int e1000_resume(struct device *dev) 5703 { 5704 struct pci_dev *pdev = to_pci_dev(dev); 5705 struct net_device *netdev = pci_get_drvdata(pdev); 5706 struct e1000_adapter *adapter = netdev_priv(netdev); 5707 5708 if (e1000e_pm_ready(adapter)) 5709 adapter->idle_check = true; 5710 5711 return __e1000_resume(pdev); 5712 } 5713 #endif /* CONFIG_PM_SLEEP */ 5714 5715 #ifdef CONFIG_PM_RUNTIME 5716 static int e1000_runtime_suspend(struct device *dev) 5717 { 5718 struct pci_dev *pdev = to_pci_dev(dev); 5719 struct net_device *netdev = pci_get_drvdata(pdev); 5720 struct e1000_adapter *adapter = netdev_priv(netdev); 5721 5722 if (e1000e_pm_ready(adapter)) { 5723 bool wake; 5724 5725 __e1000_shutdown(pdev, &wake, true); 5726 } 5727 5728 return 0; 5729 } 5730 5731 static int e1000_idle(struct device *dev) 5732 { 5733 struct pci_dev *pdev = to_pci_dev(dev); 5734 struct net_device *netdev = pci_get_drvdata(pdev); 5735 struct e1000_adapter *adapter = netdev_priv(netdev); 5736 5737 if (!e1000e_pm_ready(adapter)) 5738 return 0; 5739 5740 if (adapter->idle_check) { 5741 adapter->idle_check = false; 5742 if (!e1000e_has_link(adapter)) 5743 pm_schedule_suspend(dev, MSEC_PER_SEC); 5744 } 5745 5746 return -EBUSY; 5747 } 5748 5749 static int e1000_runtime_resume(struct device *dev) 5750 { 5751 struct pci_dev *pdev = to_pci_dev(dev); 5752 struct net_device *netdev = pci_get_drvdata(pdev); 5753 struct e1000_adapter *adapter = netdev_priv(netdev); 5754 5755 if (!e1000e_pm_ready(adapter)) 5756 return 0; 5757 5758 adapter->idle_check = !dev->power.runtime_auto; 5759 return __e1000_resume(pdev); 5760 } 5761 #endif /* CONFIG_PM_RUNTIME */ 5762 #endif /* CONFIG_PM */ 5763 5764 static void e1000_shutdown(struct pci_dev *pdev) 5765 { 5766 bool wake = false; 5767 5768 __e1000_shutdown(pdev, &wake, false); 5769 5770 if (system_state == SYSTEM_POWER_OFF) 5771 e1000_complete_shutdown(pdev, false, wake); 5772 } 5773 5774 #ifdef CONFIG_NET_POLL_CONTROLLER 5775 5776 static irqreturn_t e1000_intr_msix(int irq, void *data) 5777 { 5778 struct net_device *netdev = data; 5779 struct e1000_adapter *adapter = netdev_priv(netdev); 5780 5781 if (adapter->msix_entries) { 5782 int vector, msix_irq; 5783 5784 vector = 0; 5785 msix_irq = adapter->msix_entries[vector].vector; 5786 disable_irq(msix_irq); 5787 e1000_intr_msix_rx(msix_irq, netdev); 5788 enable_irq(msix_irq); 5789 5790 vector++; 5791 msix_irq = adapter->msix_entries[vector].vector; 5792 disable_irq(msix_irq); 5793 e1000_intr_msix_tx(msix_irq, netdev); 5794 enable_irq(msix_irq); 5795 5796 vector++; 5797 msix_irq = adapter->msix_entries[vector].vector; 5798 disable_irq(msix_irq); 5799 e1000_msix_other(msix_irq, netdev); 5800 enable_irq(msix_irq); 5801 } 5802 5803 return IRQ_HANDLED; 5804 } 5805 5806 /* 5807 * Polling 'interrupt' - used by things like netconsole to send skbs 5808 * without having to re-enable interrupts. It's not called while 5809 * the interrupt routine is executing. 5810 */ 5811 static void e1000_netpoll(struct net_device *netdev) 5812 { 5813 struct e1000_adapter *adapter = netdev_priv(netdev); 5814 5815 switch (adapter->int_mode) { 5816 case E1000E_INT_MODE_MSIX: 5817 e1000_intr_msix(adapter->pdev->irq, netdev); 5818 break; 5819 case E1000E_INT_MODE_MSI: 5820 disable_irq(adapter->pdev->irq); 5821 e1000_intr_msi(adapter->pdev->irq, netdev); 5822 enable_irq(adapter->pdev->irq); 5823 break; 5824 default: /* E1000E_INT_MODE_LEGACY */ 5825 disable_irq(adapter->pdev->irq); 5826 e1000_intr(adapter->pdev->irq, netdev); 5827 enable_irq(adapter->pdev->irq); 5828 break; 5829 } 5830 } 5831 #endif 5832 5833 /** 5834 * e1000_io_error_detected - called when PCI error is detected 5835 * @pdev: Pointer to PCI device 5836 * @state: The current pci connection state 5837 * 5838 * This function is called after a PCI bus error affecting 5839 * this device has been detected. 5840 */ 5841 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, 5842 pci_channel_state_t state) 5843 { 5844 struct net_device *netdev = pci_get_drvdata(pdev); 5845 struct e1000_adapter *adapter = netdev_priv(netdev); 5846 5847 netif_device_detach(netdev); 5848 5849 if (state == pci_channel_io_perm_failure) 5850 return PCI_ERS_RESULT_DISCONNECT; 5851 5852 if (netif_running(netdev)) 5853 e1000e_down(adapter); 5854 pci_disable_device(pdev); 5855 5856 /* Request a slot slot reset. */ 5857 return PCI_ERS_RESULT_NEED_RESET; 5858 } 5859 5860 /** 5861 * e1000_io_slot_reset - called after the pci bus has been reset. 5862 * @pdev: Pointer to PCI device 5863 * 5864 * Restart the card from scratch, as if from a cold-boot. Implementation 5865 * resembles the first-half of the e1000_resume routine. 5866 */ 5867 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev) 5868 { 5869 struct net_device *netdev = pci_get_drvdata(pdev); 5870 struct e1000_adapter *adapter = netdev_priv(netdev); 5871 struct e1000_hw *hw = &adapter->hw; 5872 u16 aspm_disable_flag = 0; 5873 int err; 5874 pci_ers_result_t result; 5875 5876 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S) 5877 aspm_disable_flag = PCIE_LINK_STATE_L0S; 5878 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1) 5879 aspm_disable_flag |= PCIE_LINK_STATE_L1; 5880 if (aspm_disable_flag) 5881 e1000e_disable_aspm(pdev, aspm_disable_flag); 5882 5883 err = pci_enable_device_mem(pdev); 5884 if (err) { 5885 dev_err(&pdev->dev, 5886 "Cannot re-enable PCI device after reset.\n"); 5887 result = PCI_ERS_RESULT_DISCONNECT; 5888 } else { 5889 pci_set_master(pdev); 5890 pdev->state_saved = true; 5891 pci_restore_state(pdev); 5892 5893 pci_enable_wake(pdev, PCI_D3hot, 0); 5894 pci_enable_wake(pdev, PCI_D3cold, 0); 5895 5896 e1000e_reset(adapter); 5897 ew32(WUS, ~0); 5898 result = PCI_ERS_RESULT_RECOVERED; 5899 } 5900 5901 pci_cleanup_aer_uncorrect_error_status(pdev); 5902 5903 return result; 5904 } 5905 5906 /** 5907 * e1000_io_resume - called when traffic can start flowing again. 5908 * @pdev: Pointer to PCI device 5909 * 5910 * This callback is called when the error recovery driver tells us that 5911 * its OK to resume normal operation. Implementation resembles the 5912 * second-half of the e1000_resume routine. 5913 */ 5914 static void e1000_io_resume(struct pci_dev *pdev) 5915 { 5916 struct net_device *netdev = pci_get_drvdata(pdev); 5917 struct e1000_adapter *adapter = netdev_priv(netdev); 5918 5919 e1000_init_manageability_pt(adapter); 5920 5921 if (netif_running(netdev)) { 5922 if (e1000e_up(adapter)) { 5923 dev_err(&pdev->dev, 5924 "can't bring device back up after reset\n"); 5925 return; 5926 } 5927 } 5928 5929 netif_device_attach(netdev); 5930 5931 /* 5932 * If the controller has AMT, do not set DRV_LOAD until the interface 5933 * is up. For all other cases, let the f/w know that the h/w is now 5934 * under the control of the driver. 5935 */ 5936 if (!(adapter->flags & FLAG_HAS_AMT)) 5937 e1000e_get_hw_control(adapter); 5938 5939 } 5940 5941 static void e1000_print_device_info(struct e1000_adapter *adapter) 5942 { 5943 struct e1000_hw *hw = &adapter->hw; 5944 struct net_device *netdev = adapter->netdev; 5945 u32 ret_val; 5946 u8 pba_str[E1000_PBANUM_LENGTH]; 5947 5948 /* print bus type/speed/width info */ 5949 e_info("(PCI Express:2.5GT/s:%s) %pM\n", 5950 /* bus width */ 5951 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" : 5952 "Width x1"), 5953 /* MAC address */ 5954 netdev->dev_addr); 5955 e_info("Intel(R) PRO/%s Network Connection\n", 5956 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000"); 5957 ret_val = e1000_read_pba_string_generic(hw, pba_str, 5958 E1000_PBANUM_LENGTH); 5959 if (ret_val) 5960 strlcpy((char *)pba_str, "Unknown", sizeof(pba_str)); 5961 e_info("MAC: %d, PHY: %d, PBA No: %s\n", 5962 hw->mac.type, hw->phy.type, pba_str); 5963 } 5964 5965 static void e1000_eeprom_checks(struct e1000_adapter *adapter) 5966 { 5967 struct e1000_hw *hw = &adapter->hw; 5968 int ret_val; 5969 u16 buf = 0; 5970 5971 if (hw->mac.type != e1000_82573) 5972 return; 5973 5974 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf); 5975 le16_to_cpus(&buf); 5976 if (!ret_val && (!(buf & (1 << 0)))) { 5977 /* Deep Smart Power Down (DSPD) */ 5978 dev_warn(&adapter->pdev->dev, 5979 "Warning: detected DSPD enabled in EEPROM\n"); 5980 } 5981 } 5982 5983 static int e1000_set_features(struct net_device *netdev, 5984 netdev_features_t features) 5985 { 5986 struct e1000_adapter *adapter = netdev_priv(netdev); 5987 netdev_features_t changed = features ^ netdev->features; 5988 5989 if (changed & (NETIF_F_TSO | NETIF_F_TSO6)) 5990 adapter->flags |= FLAG_TSO_FORCE; 5991 5992 if (!(changed & (NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_TX | 5993 NETIF_F_RXCSUM | NETIF_F_RXHASH | NETIF_F_RXFCS | 5994 NETIF_F_RXALL))) 5995 return 0; 5996 5997 if (changed & NETIF_F_RXFCS) { 5998 if (features & NETIF_F_RXFCS) { 5999 adapter->flags2 &= ~FLAG2_CRC_STRIPPING; 6000 } else { 6001 /* We need to take it back to defaults, which might mean 6002 * stripping is still disabled at the adapter level. 6003 */ 6004 if (adapter->flags2 & FLAG2_DFLT_CRC_STRIPPING) 6005 adapter->flags2 |= FLAG2_CRC_STRIPPING; 6006 else 6007 adapter->flags2 &= ~FLAG2_CRC_STRIPPING; 6008 } 6009 } 6010 6011 netdev->features = features; 6012 6013 if (netif_running(netdev)) 6014 e1000e_reinit_locked(adapter); 6015 else 6016 e1000e_reset(adapter); 6017 6018 return 0; 6019 } 6020 6021 static const struct net_device_ops e1000e_netdev_ops = { 6022 .ndo_open = e1000_open, 6023 .ndo_stop = e1000_close, 6024 .ndo_start_xmit = e1000_xmit_frame, 6025 .ndo_get_stats64 = e1000e_get_stats64, 6026 .ndo_set_rx_mode = e1000e_set_rx_mode, 6027 .ndo_set_mac_address = e1000_set_mac, 6028 .ndo_change_mtu = e1000_change_mtu, 6029 .ndo_do_ioctl = e1000_ioctl, 6030 .ndo_tx_timeout = e1000_tx_timeout, 6031 .ndo_validate_addr = eth_validate_addr, 6032 6033 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid, 6034 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid, 6035 #ifdef CONFIG_NET_POLL_CONTROLLER 6036 .ndo_poll_controller = e1000_netpoll, 6037 #endif 6038 .ndo_set_features = e1000_set_features, 6039 }; 6040 6041 /** 6042 * e1000_probe - Device Initialization Routine 6043 * @pdev: PCI device information struct 6044 * @ent: entry in e1000_pci_tbl 6045 * 6046 * Returns 0 on success, negative on failure 6047 * 6048 * e1000_probe initializes an adapter identified by a pci_dev structure. 6049 * The OS initialization, configuring of the adapter private structure, 6050 * and a hardware reset occur. 6051 **/ 6052 static int __devinit e1000_probe(struct pci_dev *pdev, 6053 const struct pci_device_id *ent) 6054 { 6055 struct net_device *netdev; 6056 struct e1000_adapter *adapter; 6057 struct e1000_hw *hw; 6058 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data]; 6059 resource_size_t mmio_start, mmio_len; 6060 resource_size_t flash_start, flash_len; 6061 static int cards_found; 6062 u16 aspm_disable_flag = 0; 6063 int i, err, pci_using_dac; 6064 u16 eeprom_data = 0; 6065 u16 eeprom_apme_mask = E1000_EEPROM_APME; 6066 6067 if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S) 6068 aspm_disable_flag = PCIE_LINK_STATE_L0S; 6069 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1) 6070 aspm_disable_flag |= PCIE_LINK_STATE_L1; 6071 if (aspm_disable_flag) 6072 e1000e_disable_aspm(pdev, aspm_disable_flag); 6073 6074 err = pci_enable_device_mem(pdev); 6075 if (err) 6076 return err; 6077 6078 pci_using_dac = 0; 6079 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)); 6080 if (!err) { 6081 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64)); 6082 if (!err) 6083 pci_using_dac = 1; 6084 } else { 6085 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); 6086 if (err) { 6087 err = dma_set_coherent_mask(&pdev->dev, 6088 DMA_BIT_MASK(32)); 6089 if (err) { 6090 dev_err(&pdev->dev, "No usable DMA configuration, aborting\n"); 6091 goto err_dma; 6092 } 6093 } 6094 } 6095 6096 err = pci_request_selected_regions_exclusive(pdev, 6097 pci_select_bars(pdev, IORESOURCE_MEM), 6098 e1000e_driver_name); 6099 if (err) 6100 goto err_pci_reg; 6101 6102 /* AER (Advanced Error Reporting) hooks */ 6103 pci_enable_pcie_error_reporting(pdev); 6104 6105 pci_set_master(pdev); 6106 /* PCI config space info */ 6107 err = pci_save_state(pdev); 6108 if (err) 6109 goto err_alloc_etherdev; 6110 6111 err = -ENOMEM; 6112 netdev = alloc_etherdev(sizeof(struct e1000_adapter)); 6113 if (!netdev) 6114 goto err_alloc_etherdev; 6115 6116 SET_NETDEV_DEV(netdev, &pdev->dev); 6117 6118 netdev->irq = pdev->irq; 6119 6120 pci_set_drvdata(pdev, netdev); 6121 adapter = netdev_priv(netdev); 6122 hw = &adapter->hw; 6123 adapter->netdev = netdev; 6124 adapter->pdev = pdev; 6125 adapter->ei = ei; 6126 adapter->pba = ei->pba; 6127 adapter->flags = ei->flags; 6128 adapter->flags2 = ei->flags2; 6129 adapter->hw.adapter = adapter; 6130 adapter->hw.mac.type = ei->mac; 6131 adapter->max_hw_frame_size = ei->max_hw_frame_size; 6132 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE); 6133 6134 mmio_start = pci_resource_start(pdev, 0); 6135 mmio_len = pci_resource_len(pdev, 0); 6136 6137 err = -EIO; 6138 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len); 6139 if (!adapter->hw.hw_addr) 6140 goto err_ioremap; 6141 6142 if ((adapter->flags & FLAG_HAS_FLASH) && 6143 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) { 6144 flash_start = pci_resource_start(pdev, 1); 6145 flash_len = pci_resource_len(pdev, 1); 6146 adapter->hw.flash_address = ioremap(flash_start, flash_len); 6147 if (!adapter->hw.flash_address) 6148 goto err_flashmap; 6149 } 6150 6151 /* construct the net_device struct */ 6152 netdev->netdev_ops = &e1000e_netdev_ops; 6153 e1000e_set_ethtool_ops(netdev); 6154 netdev->watchdog_timeo = 5 * HZ; 6155 netif_napi_add(netdev, &adapter->napi, e1000e_poll, 64); 6156 strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name)); 6157 6158 netdev->mem_start = mmio_start; 6159 netdev->mem_end = mmio_start + mmio_len; 6160 6161 adapter->bd_number = cards_found++; 6162 6163 e1000e_check_options(adapter); 6164 6165 /* setup adapter struct */ 6166 err = e1000_sw_init(adapter); 6167 if (err) 6168 goto err_sw_init; 6169 6170 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops)); 6171 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops)); 6172 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops)); 6173 6174 err = ei->get_variants(adapter); 6175 if (err) 6176 goto err_hw_init; 6177 6178 if ((adapter->flags & FLAG_IS_ICH) && 6179 (adapter->flags & FLAG_READ_ONLY_NVM)) 6180 e1000e_write_protect_nvm_ich8lan(&adapter->hw); 6181 6182 hw->mac.ops.get_bus_info(&adapter->hw); 6183 6184 adapter->hw.phy.autoneg_wait_to_complete = 0; 6185 6186 /* Copper options */ 6187 if (adapter->hw.phy.media_type == e1000_media_type_copper) { 6188 adapter->hw.phy.mdix = AUTO_ALL_MODES; 6189 adapter->hw.phy.disable_polarity_correction = 0; 6190 adapter->hw.phy.ms_type = e1000_ms_hw_default; 6191 } 6192 6193 if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw)) 6194 e_info("PHY reset is blocked due to SOL/IDER session.\n"); 6195 6196 /* Set initial default active device features */ 6197 netdev->features = (NETIF_F_SG | 6198 NETIF_F_HW_VLAN_RX | 6199 NETIF_F_HW_VLAN_TX | 6200 NETIF_F_TSO | 6201 NETIF_F_TSO6 | 6202 NETIF_F_RXHASH | 6203 NETIF_F_RXCSUM | 6204 NETIF_F_HW_CSUM); 6205 6206 /* Set user-changeable features (subset of all device features) */ 6207 netdev->hw_features = netdev->features; 6208 netdev->hw_features |= NETIF_F_RXFCS; 6209 netdev->priv_flags |= IFF_SUPP_NOFCS; 6210 netdev->hw_features |= NETIF_F_RXALL; 6211 6212 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) 6213 netdev->features |= NETIF_F_HW_VLAN_FILTER; 6214 6215 netdev->vlan_features |= (NETIF_F_SG | 6216 NETIF_F_TSO | 6217 NETIF_F_TSO6 | 6218 NETIF_F_HW_CSUM); 6219 6220 netdev->priv_flags |= IFF_UNICAST_FLT; 6221 6222 if (pci_using_dac) { 6223 netdev->features |= NETIF_F_HIGHDMA; 6224 netdev->vlan_features |= NETIF_F_HIGHDMA; 6225 } 6226 6227 if (e1000e_enable_mng_pass_thru(&adapter->hw)) 6228 adapter->flags |= FLAG_MNG_PT_ENABLED; 6229 6230 /* 6231 * before reading the NVM, reset the controller to 6232 * put the device in a known good starting state 6233 */ 6234 adapter->hw.mac.ops.reset_hw(&adapter->hw); 6235 6236 /* 6237 * systems with ASPM and others may see the checksum fail on the first 6238 * attempt. Let's give it a few tries 6239 */ 6240 for (i = 0;; i++) { 6241 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0) 6242 break; 6243 if (i == 2) { 6244 e_err("The NVM Checksum Is Not Valid\n"); 6245 err = -EIO; 6246 goto err_eeprom; 6247 } 6248 } 6249 6250 e1000_eeprom_checks(adapter); 6251 6252 /* copy the MAC address */ 6253 if (e1000e_read_mac_addr(&adapter->hw)) 6254 e_err("NVM Read Error while reading MAC address\n"); 6255 6256 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len); 6257 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len); 6258 6259 if (!is_valid_ether_addr(netdev->perm_addr)) { 6260 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr); 6261 err = -EIO; 6262 goto err_eeprom; 6263 } 6264 6265 init_timer(&adapter->watchdog_timer); 6266 adapter->watchdog_timer.function = e1000_watchdog; 6267 adapter->watchdog_timer.data = (unsigned long) adapter; 6268 6269 init_timer(&adapter->phy_info_timer); 6270 adapter->phy_info_timer.function = e1000_update_phy_info; 6271 adapter->phy_info_timer.data = (unsigned long) adapter; 6272 6273 INIT_WORK(&adapter->reset_task, e1000_reset_task); 6274 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task); 6275 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround); 6276 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task); 6277 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang); 6278 6279 /* Initialize link parameters. User can change them with ethtool */ 6280 adapter->hw.mac.autoneg = 1; 6281 adapter->fc_autoneg = true; 6282 adapter->hw.fc.requested_mode = e1000_fc_default; 6283 adapter->hw.fc.current_mode = e1000_fc_default; 6284 adapter->hw.phy.autoneg_advertised = 0x2f; 6285 6286 /* ring size defaults */ 6287 adapter->rx_ring->count = 256; 6288 adapter->tx_ring->count = 256; 6289 6290 /* 6291 * Initial Wake on LAN setting - If APM wake is enabled in 6292 * the EEPROM, enable the ACPI Magic Packet filter 6293 */ 6294 if (adapter->flags & FLAG_APME_IN_WUC) { 6295 /* APME bit in EEPROM is mapped to WUC.APME */ 6296 eeprom_data = er32(WUC); 6297 eeprom_apme_mask = E1000_WUC_APME; 6298 if ((hw->mac.type > e1000_ich10lan) && 6299 (eeprom_data & E1000_WUC_PHY_WAKE)) 6300 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP; 6301 } else if (adapter->flags & FLAG_APME_IN_CTRL3) { 6302 if (adapter->flags & FLAG_APME_CHECK_PORT_B && 6303 (adapter->hw.bus.func == 1)) 6304 e1000_read_nvm(&adapter->hw, NVM_INIT_CONTROL3_PORT_B, 6305 1, &eeprom_data); 6306 else 6307 e1000_read_nvm(&adapter->hw, NVM_INIT_CONTROL3_PORT_A, 6308 1, &eeprom_data); 6309 } 6310 6311 /* fetch WoL from EEPROM */ 6312 if (eeprom_data & eeprom_apme_mask) 6313 adapter->eeprom_wol |= E1000_WUFC_MAG; 6314 6315 /* 6316 * now that we have the eeprom settings, apply the special cases 6317 * where the eeprom may be wrong or the board simply won't support 6318 * wake on lan on a particular port 6319 */ 6320 if (!(adapter->flags & FLAG_HAS_WOL)) 6321 adapter->eeprom_wol = 0; 6322 6323 /* initialize the wol settings based on the eeprom settings */ 6324 adapter->wol = adapter->eeprom_wol; 6325 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol); 6326 6327 /* save off EEPROM version number */ 6328 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers); 6329 6330 /* reset the hardware with the new settings */ 6331 e1000e_reset(adapter); 6332 6333 /* 6334 * If the controller has AMT, do not set DRV_LOAD until the interface 6335 * is up. For all other cases, let the f/w know that the h/w is now 6336 * under the control of the driver. 6337 */ 6338 if (!(adapter->flags & FLAG_HAS_AMT)) 6339 e1000e_get_hw_control(adapter); 6340 6341 strlcpy(netdev->name, "eth%d", sizeof(netdev->name)); 6342 err = register_netdev(netdev); 6343 if (err) 6344 goto err_register; 6345 6346 /* carrier off reporting is important to ethtool even BEFORE open */ 6347 netif_carrier_off(netdev); 6348 6349 e1000_print_device_info(adapter); 6350 6351 if (pci_dev_run_wake(pdev)) 6352 pm_runtime_put_noidle(&pdev->dev); 6353 6354 return 0; 6355 6356 err_register: 6357 if (!(adapter->flags & FLAG_HAS_AMT)) 6358 e1000e_release_hw_control(adapter); 6359 err_eeprom: 6360 if (hw->phy.ops.check_reset_block && !hw->phy.ops.check_reset_block(hw)) 6361 e1000_phy_hw_reset(&adapter->hw); 6362 err_hw_init: 6363 kfree(adapter->tx_ring); 6364 kfree(adapter->rx_ring); 6365 err_sw_init: 6366 if (adapter->hw.flash_address) 6367 iounmap(adapter->hw.flash_address); 6368 e1000e_reset_interrupt_capability(adapter); 6369 err_flashmap: 6370 iounmap(adapter->hw.hw_addr); 6371 err_ioremap: 6372 free_netdev(netdev); 6373 err_alloc_etherdev: 6374 pci_release_selected_regions(pdev, 6375 pci_select_bars(pdev, IORESOURCE_MEM)); 6376 err_pci_reg: 6377 err_dma: 6378 pci_disable_device(pdev); 6379 return err; 6380 } 6381 6382 /** 6383 * e1000_remove - Device Removal Routine 6384 * @pdev: PCI device information struct 6385 * 6386 * e1000_remove is called by the PCI subsystem to alert the driver 6387 * that it should release a PCI device. The could be caused by a 6388 * Hot-Plug event, or because the driver is going to be removed from 6389 * memory. 6390 **/ 6391 static void __devexit e1000_remove(struct pci_dev *pdev) 6392 { 6393 struct net_device *netdev = pci_get_drvdata(pdev); 6394 struct e1000_adapter *adapter = netdev_priv(netdev); 6395 bool down = test_bit(__E1000_DOWN, &adapter->state); 6396 6397 /* 6398 * The timers may be rescheduled, so explicitly disable them 6399 * from being rescheduled. 6400 */ 6401 if (!down) 6402 set_bit(__E1000_DOWN, &adapter->state); 6403 del_timer_sync(&adapter->watchdog_timer); 6404 del_timer_sync(&adapter->phy_info_timer); 6405 6406 cancel_work_sync(&adapter->reset_task); 6407 cancel_work_sync(&adapter->watchdog_task); 6408 cancel_work_sync(&adapter->downshift_task); 6409 cancel_work_sync(&adapter->update_phy_task); 6410 cancel_work_sync(&adapter->print_hang_task); 6411 6412 if (!(netdev->flags & IFF_UP)) 6413 e1000_power_down_phy(adapter); 6414 6415 /* Don't lie to e1000_close() down the road. */ 6416 if (!down) 6417 clear_bit(__E1000_DOWN, &adapter->state); 6418 unregister_netdev(netdev); 6419 6420 if (pci_dev_run_wake(pdev)) 6421 pm_runtime_get_noresume(&pdev->dev); 6422 6423 /* 6424 * Release control of h/w to f/w. If f/w is AMT enabled, this 6425 * would have already happened in close and is redundant. 6426 */ 6427 e1000e_release_hw_control(adapter); 6428 6429 e1000e_reset_interrupt_capability(adapter); 6430 kfree(adapter->tx_ring); 6431 kfree(adapter->rx_ring); 6432 6433 iounmap(adapter->hw.hw_addr); 6434 if (adapter->hw.flash_address) 6435 iounmap(adapter->hw.flash_address); 6436 pci_release_selected_regions(pdev, 6437 pci_select_bars(pdev, IORESOURCE_MEM)); 6438 6439 free_netdev(netdev); 6440 6441 /* AER disable */ 6442 pci_disable_pcie_error_reporting(pdev); 6443 6444 pci_disable_device(pdev); 6445 } 6446 6447 /* PCI Error Recovery (ERS) */ 6448 static struct pci_error_handlers e1000_err_handler = { 6449 .error_detected = e1000_io_error_detected, 6450 .slot_reset = e1000_io_slot_reset, 6451 .resume = e1000_io_resume, 6452 }; 6453 6454 static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = { 6455 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 }, 6456 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 }, 6457 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 }, 6458 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 }, 6459 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 }, 6460 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 }, 6461 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 }, 6462 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 }, 6463 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 }, 6464 6465 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 }, 6466 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 }, 6467 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 }, 6468 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 }, 6469 6470 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 }, 6471 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 }, 6472 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 }, 6473 6474 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 }, 6475 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 }, 6476 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 }, 6477 6478 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT), 6479 board_80003es2lan }, 6480 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT), 6481 board_80003es2lan }, 6482 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT), 6483 board_80003es2lan }, 6484 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT), 6485 board_80003es2lan }, 6486 6487 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan }, 6488 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan }, 6489 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan }, 6490 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan }, 6491 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan }, 6492 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan }, 6493 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan }, 6494 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan }, 6495 6496 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan }, 6497 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan }, 6498 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan }, 6499 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan }, 6500 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan }, 6501 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan }, 6502 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan }, 6503 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan }, 6504 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan }, 6505 6506 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan }, 6507 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan }, 6508 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan }, 6509 6510 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan }, 6511 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan }, 6512 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan }, 6513 6514 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan }, 6515 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan }, 6516 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan }, 6517 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan }, 6518 6519 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan }, 6520 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan }, 6521 6522 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt }, 6523 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt }, 6524 6525 { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */ 6526 }; 6527 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl); 6528 6529 #ifdef CONFIG_PM 6530 static const struct dev_pm_ops e1000_pm_ops = { 6531 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume) 6532 SET_RUNTIME_PM_OPS(e1000_runtime_suspend, 6533 e1000_runtime_resume, e1000_idle) 6534 }; 6535 #endif 6536 6537 /* PCI Device API Driver */ 6538 static struct pci_driver e1000_driver = { 6539 .name = e1000e_driver_name, 6540 .id_table = e1000_pci_tbl, 6541 .probe = e1000_probe, 6542 .remove = __devexit_p(e1000_remove), 6543 #ifdef CONFIG_PM 6544 .driver = { 6545 .pm = &e1000_pm_ops, 6546 }, 6547 #endif 6548 .shutdown = e1000_shutdown, 6549 .err_handler = &e1000_err_handler 6550 }; 6551 6552 /** 6553 * e1000_init_module - Driver Registration Routine 6554 * 6555 * e1000_init_module is the first routine called when the driver is 6556 * loaded. All it does is register with the PCI subsystem. 6557 **/ 6558 static int __init e1000_init_module(void) 6559 { 6560 int ret; 6561 pr_info("Intel(R) PRO/1000 Network Driver - %s\n", 6562 e1000e_driver_version); 6563 pr_info("Copyright(c) 1999 - 2012 Intel Corporation.\n"); 6564 ret = pci_register_driver(&e1000_driver); 6565 6566 return ret; 6567 } 6568 module_init(e1000_init_module); 6569 6570 /** 6571 * e1000_exit_module - Driver Exit Cleanup Routine 6572 * 6573 * e1000_exit_module is called just before the driver is removed 6574 * from memory. 6575 **/ 6576 static void __exit e1000_exit_module(void) 6577 { 6578 pci_unregister_driver(&e1000_driver); 6579 } 6580 module_exit(e1000_exit_module); 6581 6582 6583 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); 6584 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver"); 6585 MODULE_LICENSE("GPL"); 6586 MODULE_VERSION(DRV_VERSION); 6587 6588 /* netdev.c */ 6589