1 /******************************************************************************* 2 3 Intel PRO/1000 Linux driver 4 Copyright(c) 1999 - 2012 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, 8 version 2, as published by the Free Software Foundation. 9 10 This program is distributed in the hope it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 You should have received a copy of the GNU General Public License along with 16 this program; if not, write to the Free Software Foundation, Inc., 17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 18 19 The full GNU General Public License is included in this distribution in 20 the file called "COPYING". 21 22 Contact Information: 23 Linux NICS <linux.nics@intel.com> 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 26 27 *******************************************************************************/ 28 29 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 30 31 #include <linux/module.h> 32 #include <linux/types.h> 33 #include <linux/init.h> 34 #include <linux/pci.h> 35 #include <linux/vmalloc.h> 36 #include <linux/pagemap.h> 37 #include <linux/delay.h> 38 #include <linux/netdevice.h> 39 #include <linux/interrupt.h> 40 #include <linux/tcp.h> 41 #include <linux/ipv6.h> 42 #include <linux/slab.h> 43 #include <net/checksum.h> 44 #include <net/ip6_checksum.h> 45 #include <linux/mii.h> 46 #include <linux/ethtool.h> 47 #include <linux/if_vlan.h> 48 #include <linux/cpu.h> 49 #include <linux/smp.h> 50 #include <linux/pm_qos.h> 51 #include <linux/pm_runtime.h> 52 #include <linux/aer.h> 53 #include <linux/prefetch.h> 54 55 #include "e1000.h" 56 57 #define DRV_EXTRAVERSION "-k" 58 59 #define DRV_VERSION "2.0.0" DRV_EXTRAVERSION 60 char e1000e_driver_name[] = "e1000e"; 61 const char e1000e_driver_version[] = DRV_VERSION; 62 63 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK) 64 static int debug = -1; 65 module_param(debug, int, 0); 66 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); 67 68 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state); 69 70 static const struct e1000_info *e1000_info_tbl[] = { 71 [board_82571] = &e1000_82571_info, 72 [board_82572] = &e1000_82572_info, 73 [board_82573] = &e1000_82573_info, 74 [board_82574] = &e1000_82574_info, 75 [board_82583] = &e1000_82583_info, 76 [board_80003es2lan] = &e1000_es2_info, 77 [board_ich8lan] = &e1000_ich8_info, 78 [board_ich9lan] = &e1000_ich9_info, 79 [board_ich10lan] = &e1000_ich10_info, 80 [board_pchlan] = &e1000_pch_info, 81 [board_pch2lan] = &e1000_pch2_info, 82 [board_pch_lpt] = &e1000_pch_lpt_info, 83 }; 84 85 struct e1000_reg_info { 86 u32 ofs; 87 char *name; 88 }; 89 90 #define E1000_RDFH 0x02410 /* Rx Data FIFO Head - RW */ 91 #define E1000_RDFT 0x02418 /* Rx Data FIFO Tail - RW */ 92 #define E1000_RDFHS 0x02420 /* Rx Data FIFO Head Saved - RW */ 93 #define E1000_RDFTS 0x02428 /* Rx Data FIFO Tail Saved - RW */ 94 #define E1000_RDFPC 0x02430 /* Rx Data FIFO Packet Count - RW */ 95 96 #define E1000_TDFH 0x03410 /* Tx Data FIFO Head - RW */ 97 #define E1000_TDFT 0x03418 /* Tx Data FIFO Tail - RW */ 98 #define E1000_TDFHS 0x03420 /* Tx Data FIFO Head Saved - RW */ 99 #define E1000_TDFTS 0x03428 /* Tx Data FIFO Tail Saved - RW */ 100 #define E1000_TDFPC 0x03430 /* Tx Data FIFO Packet Count - RW */ 101 102 static const struct e1000_reg_info e1000_reg_info_tbl[] = { 103 104 /* General Registers */ 105 {E1000_CTRL, "CTRL"}, 106 {E1000_STATUS, "STATUS"}, 107 {E1000_CTRL_EXT, "CTRL_EXT"}, 108 109 /* Interrupt Registers */ 110 {E1000_ICR, "ICR"}, 111 112 /* Rx Registers */ 113 {E1000_RCTL, "RCTL"}, 114 {E1000_RDLEN(0), "RDLEN"}, 115 {E1000_RDH(0), "RDH"}, 116 {E1000_RDT(0), "RDT"}, 117 {E1000_RDTR, "RDTR"}, 118 {E1000_RXDCTL(0), "RXDCTL"}, 119 {E1000_ERT, "ERT"}, 120 {E1000_RDBAL(0), "RDBAL"}, 121 {E1000_RDBAH(0), "RDBAH"}, 122 {E1000_RDFH, "RDFH"}, 123 {E1000_RDFT, "RDFT"}, 124 {E1000_RDFHS, "RDFHS"}, 125 {E1000_RDFTS, "RDFTS"}, 126 {E1000_RDFPC, "RDFPC"}, 127 128 /* Tx Registers */ 129 {E1000_TCTL, "TCTL"}, 130 {E1000_TDBAL(0), "TDBAL"}, 131 {E1000_TDBAH(0), "TDBAH"}, 132 {E1000_TDLEN(0), "TDLEN"}, 133 {E1000_TDH(0), "TDH"}, 134 {E1000_TDT(0), "TDT"}, 135 {E1000_TIDV, "TIDV"}, 136 {E1000_TXDCTL(0), "TXDCTL"}, 137 {E1000_TADV, "TADV"}, 138 {E1000_TARC(0), "TARC"}, 139 {E1000_TDFH, "TDFH"}, 140 {E1000_TDFT, "TDFT"}, 141 {E1000_TDFHS, "TDFHS"}, 142 {E1000_TDFTS, "TDFTS"}, 143 {E1000_TDFPC, "TDFPC"}, 144 145 /* List Terminator */ 146 {0, NULL} 147 }; 148 149 /* 150 * e1000_regdump - register printout routine 151 */ 152 static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo) 153 { 154 int n = 0; 155 char rname[16]; 156 u32 regs[8]; 157 158 switch (reginfo->ofs) { 159 case E1000_RXDCTL(0): 160 for (n = 0; n < 2; n++) 161 regs[n] = __er32(hw, E1000_RXDCTL(n)); 162 break; 163 case E1000_TXDCTL(0): 164 for (n = 0; n < 2; n++) 165 regs[n] = __er32(hw, E1000_TXDCTL(n)); 166 break; 167 case E1000_TARC(0): 168 for (n = 0; n < 2; n++) 169 regs[n] = __er32(hw, E1000_TARC(n)); 170 break; 171 default: 172 pr_info("%-15s %08x\n", 173 reginfo->name, __er32(hw, reginfo->ofs)); 174 return; 175 } 176 177 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]"); 178 pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]); 179 } 180 181 /* 182 * e1000e_dump - Print registers, Tx-ring and Rx-ring 183 */ 184 static void e1000e_dump(struct e1000_adapter *adapter) 185 { 186 struct net_device *netdev = adapter->netdev; 187 struct e1000_hw *hw = &adapter->hw; 188 struct e1000_reg_info *reginfo; 189 struct e1000_ring *tx_ring = adapter->tx_ring; 190 struct e1000_tx_desc *tx_desc; 191 struct my_u0 { 192 __le64 a; 193 __le64 b; 194 } *u0; 195 struct e1000_buffer *buffer_info; 196 struct e1000_ring *rx_ring = adapter->rx_ring; 197 union e1000_rx_desc_packet_split *rx_desc_ps; 198 union e1000_rx_desc_extended *rx_desc; 199 struct my_u1 { 200 __le64 a; 201 __le64 b; 202 __le64 c; 203 __le64 d; 204 } *u1; 205 u32 staterr; 206 int i = 0; 207 208 if (!netif_msg_hw(adapter)) 209 return; 210 211 /* Print netdevice Info */ 212 if (netdev) { 213 dev_info(&adapter->pdev->dev, "Net device Info\n"); 214 pr_info("Device Name state trans_start last_rx\n"); 215 pr_info("%-15s %016lX %016lX %016lX\n", 216 netdev->name, netdev->state, netdev->trans_start, 217 netdev->last_rx); 218 } 219 220 /* Print Registers */ 221 dev_info(&adapter->pdev->dev, "Register Dump\n"); 222 pr_info(" Register Name Value\n"); 223 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl; 224 reginfo->name; reginfo++) { 225 e1000_regdump(hw, reginfo); 226 } 227 228 /* Print Tx Ring Summary */ 229 if (!netdev || !netif_running(netdev)) 230 return; 231 232 dev_info(&adapter->pdev->dev, "Tx Ring Summary\n"); 233 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n"); 234 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean]; 235 pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n", 236 0, tx_ring->next_to_use, tx_ring->next_to_clean, 237 (unsigned long long)buffer_info->dma, 238 buffer_info->length, 239 buffer_info->next_to_watch, 240 (unsigned long long)buffer_info->time_stamp); 241 242 /* Print Tx Ring */ 243 if (!netif_msg_tx_done(adapter)) 244 goto rx_ring_summary; 245 246 dev_info(&adapter->pdev->dev, "Tx Ring Dump\n"); 247 248 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended) 249 * 250 * Legacy Transmit Descriptor 251 * +--------------------------------------------------------------+ 252 * 0 | Buffer Address [63:0] (Reserved on Write Back) | 253 * +--------------------------------------------------------------+ 254 * 8 | Special | CSS | Status | CMD | CSO | Length | 255 * +--------------------------------------------------------------+ 256 * 63 48 47 36 35 32 31 24 23 16 15 0 257 * 258 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload 259 * 63 48 47 40 39 32 31 16 15 8 7 0 260 * +----------------------------------------------------------------+ 261 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS | 262 * +----------------------------------------------------------------+ 263 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN | 264 * +----------------------------------------------------------------+ 265 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0 266 * 267 * Extended Data Descriptor (DTYP=0x1) 268 * +----------------------------------------------------------------+ 269 * 0 | Buffer Address [63:0] | 270 * +----------------------------------------------------------------+ 271 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN | 272 * +----------------------------------------------------------------+ 273 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0 274 */ 275 pr_info("Tl[desc] [address 63:0 ] [SpeCssSCmCsLen] [bi->dma ] leng ntw timestamp bi->skb <-- Legacy format\n"); 276 pr_info("Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Context format\n"); 277 pr_info("Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Data format\n"); 278 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) { 279 const char *next_desc; 280 tx_desc = E1000_TX_DESC(*tx_ring, i); 281 buffer_info = &tx_ring->buffer_info[i]; 282 u0 = (struct my_u0 *)tx_desc; 283 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean) 284 next_desc = " NTC/U"; 285 else if (i == tx_ring->next_to_use) 286 next_desc = " NTU"; 287 else if (i == tx_ring->next_to_clean) 288 next_desc = " NTC"; 289 else 290 next_desc = ""; 291 pr_info("T%c[0x%03X] %016llX %016llX %016llX %04X %3X %016llX %p%s\n", 292 (!(le64_to_cpu(u0->b) & (1 << 29)) ? 'l' : 293 ((le64_to_cpu(u0->b) & (1 << 20)) ? 'd' : 'c')), 294 i, 295 (unsigned long long)le64_to_cpu(u0->a), 296 (unsigned long long)le64_to_cpu(u0->b), 297 (unsigned long long)buffer_info->dma, 298 buffer_info->length, buffer_info->next_to_watch, 299 (unsigned long long)buffer_info->time_stamp, 300 buffer_info->skb, next_desc); 301 302 if (netif_msg_pktdata(adapter) && buffer_info->dma != 0) 303 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS, 304 16, 1, phys_to_virt(buffer_info->dma), 305 buffer_info->length, true); 306 } 307 308 /* Print Rx Ring Summary */ 309 rx_ring_summary: 310 dev_info(&adapter->pdev->dev, "Rx Ring Summary\n"); 311 pr_info("Queue [NTU] [NTC]\n"); 312 pr_info(" %5d %5X %5X\n", 313 0, rx_ring->next_to_use, rx_ring->next_to_clean); 314 315 /* Print Rx Ring */ 316 if (!netif_msg_rx_status(adapter)) 317 return; 318 319 dev_info(&adapter->pdev->dev, "Rx Ring Dump\n"); 320 switch (adapter->rx_ps_pages) { 321 case 1: 322 case 2: 323 case 3: 324 /* [Extended] Packet Split Receive Descriptor Format 325 * 326 * +-----------------------------------------------------+ 327 * 0 | Buffer Address 0 [63:0] | 328 * +-----------------------------------------------------+ 329 * 8 | Buffer Address 1 [63:0] | 330 * +-----------------------------------------------------+ 331 * 16 | Buffer Address 2 [63:0] | 332 * +-----------------------------------------------------+ 333 * 24 | Buffer Address 3 [63:0] | 334 * +-----------------------------------------------------+ 335 */ 336 pr_info("R [desc] [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] [bi->skb] <-- Ext Pkt Split format\n"); 337 /* [Extended] Receive Descriptor (Write-Back) Format 338 * 339 * 63 48 47 32 31 13 12 8 7 4 3 0 340 * +------------------------------------------------------+ 341 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS | 342 * | Checksum | Ident | | Queue | | Type | 343 * +------------------------------------------------------+ 344 * 8 | VLAN Tag | Length | Extended Error | Extended Status | 345 * +------------------------------------------------------+ 346 * 63 48 47 32 31 20 19 0 347 */ 348 pr_info("RWB[desc] [ck ipid mrqhsh] [vl l0 ee es] [ l3 l2 l1 hs] [reserved ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n"); 349 for (i = 0; i < rx_ring->count; i++) { 350 const char *next_desc; 351 buffer_info = &rx_ring->buffer_info[i]; 352 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i); 353 u1 = (struct my_u1 *)rx_desc_ps; 354 staterr = 355 le32_to_cpu(rx_desc_ps->wb.middle.status_error); 356 357 if (i == rx_ring->next_to_use) 358 next_desc = " NTU"; 359 else if (i == rx_ring->next_to_clean) 360 next_desc = " NTC"; 361 else 362 next_desc = ""; 363 364 if (staterr & E1000_RXD_STAT_DD) { 365 /* Descriptor Done */ 366 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX ---------------- %p%s\n", 367 "RWB", i, 368 (unsigned long long)le64_to_cpu(u1->a), 369 (unsigned long long)le64_to_cpu(u1->b), 370 (unsigned long long)le64_to_cpu(u1->c), 371 (unsigned long long)le64_to_cpu(u1->d), 372 buffer_info->skb, next_desc); 373 } else { 374 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX %016llX %p%s\n", 375 "R ", i, 376 (unsigned long long)le64_to_cpu(u1->a), 377 (unsigned long long)le64_to_cpu(u1->b), 378 (unsigned long long)le64_to_cpu(u1->c), 379 (unsigned long long)le64_to_cpu(u1->d), 380 (unsigned long long)buffer_info->dma, 381 buffer_info->skb, next_desc); 382 383 if (netif_msg_pktdata(adapter)) 384 print_hex_dump(KERN_INFO, "", 385 DUMP_PREFIX_ADDRESS, 16, 1, 386 phys_to_virt(buffer_info->dma), 387 adapter->rx_ps_bsize0, true); 388 } 389 } 390 break; 391 default: 392 case 0: 393 /* Extended Receive Descriptor (Read) Format 394 * 395 * +-----------------------------------------------------+ 396 * 0 | Buffer Address [63:0] | 397 * +-----------------------------------------------------+ 398 * 8 | Reserved | 399 * +-----------------------------------------------------+ 400 */ 401 pr_info("R [desc] [buf addr 63:0 ] [reserved 63:0 ] [bi->dma ] [bi->skb] <-- Ext (Read) format\n"); 402 /* Extended Receive Descriptor (Write-Back) Format 403 * 404 * 63 48 47 32 31 24 23 4 3 0 405 * +------------------------------------------------------+ 406 * | RSS Hash | | | | 407 * 0 +-------------------+ Rsvd | Reserved | MRQ RSS | 408 * | Packet | IP | | | Type | 409 * | Checksum | Ident | | | | 410 * +------------------------------------------------------+ 411 * 8 | VLAN Tag | Length | Extended Error | Extended Status | 412 * +------------------------------------------------------+ 413 * 63 48 47 32 31 20 19 0 414 */ 415 pr_info("RWB[desc] [cs ipid mrq] [vt ln xe xs] [bi->skb] <-- Ext (Write-Back) format\n"); 416 417 for (i = 0; i < rx_ring->count; i++) { 418 const char *next_desc; 419 420 buffer_info = &rx_ring->buffer_info[i]; 421 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); 422 u1 = (struct my_u1 *)rx_desc; 423 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 424 425 if (i == rx_ring->next_to_use) 426 next_desc = " NTU"; 427 else if (i == rx_ring->next_to_clean) 428 next_desc = " NTC"; 429 else 430 next_desc = ""; 431 432 if (staterr & E1000_RXD_STAT_DD) { 433 /* Descriptor Done */ 434 pr_info("%s[0x%03X] %016llX %016llX ---------------- %p%s\n", 435 "RWB", i, 436 (unsigned long long)le64_to_cpu(u1->a), 437 (unsigned long long)le64_to_cpu(u1->b), 438 buffer_info->skb, next_desc); 439 } else { 440 pr_info("%s[0x%03X] %016llX %016llX %016llX %p%s\n", 441 "R ", i, 442 (unsigned long long)le64_to_cpu(u1->a), 443 (unsigned long long)le64_to_cpu(u1->b), 444 (unsigned long long)buffer_info->dma, 445 buffer_info->skb, next_desc); 446 447 if (netif_msg_pktdata(adapter)) 448 print_hex_dump(KERN_INFO, "", 449 DUMP_PREFIX_ADDRESS, 16, 450 1, 451 phys_to_virt 452 (buffer_info->dma), 453 adapter->rx_buffer_len, 454 true); 455 } 456 } 457 } 458 } 459 460 /** 461 * e1000_desc_unused - calculate if we have unused descriptors 462 **/ 463 static int e1000_desc_unused(struct e1000_ring *ring) 464 { 465 if (ring->next_to_clean > ring->next_to_use) 466 return ring->next_to_clean - ring->next_to_use - 1; 467 468 return ring->count + ring->next_to_clean - ring->next_to_use - 1; 469 } 470 471 /** 472 * e1000_receive_skb - helper function to handle Rx indications 473 * @adapter: board private structure 474 * @status: descriptor status field as written by hardware 475 * @vlan: descriptor vlan field as written by hardware (no le/be conversion) 476 * @skb: pointer to sk_buff to be indicated to stack 477 **/ 478 static void e1000_receive_skb(struct e1000_adapter *adapter, 479 struct net_device *netdev, struct sk_buff *skb, 480 u8 status, __le16 vlan) 481 { 482 u16 tag = le16_to_cpu(vlan); 483 skb->protocol = eth_type_trans(skb, netdev); 484 485 if (status & E1000_RXD_STAT_VP) 486 __vlan_hwaccel_put_tag(skb, tag); 487 488 napi_gro_receive(&adapter->napi, skb); 489 } 490 491 /** 492 * e1000_rx_checksum - Receive Checksum Offload 493 * @adapter: board private structure 494 * @status_err: receive descriptor status and error fields 495 * @csum: receive descriptor csum field 496 * @sk_buff: socket buffer with received data 497 **/ 498 static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err, 499 __le16 csum, struct sk_buff *skb) 500 { 501 u16 status = (u16)status_err; 502 u8 errors = (u8)(status_err >> 24); 503 504 skb_checksum_none_assert(skb); 505 506 /* Rx checksum disabled */ 507 if (!(adapter->netdev->features & NETIF_F_RXCSUM)) 508 return; 509 510 /* Ignore Checksum bit is set */ 511 if (status & E1000_RXD_STAT_IXSM) 512 return; 513 514 /* TCP/UDP checksum error bit is set */ 515 if (errors & E1000_RXD_ERR_TCPE) { 516 /* let the stack verify checksum errors */ 517 adapter->hw_csum_err++; 518 return; 519 } 520 521 /* TCP/UDP Checksum has not been calculated */ 522 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))) 523 return; 524 525 /* It must be a TCP or UDP packet with a valid checksum */ 526 if (status & E1000_RXD_STAT_TCPCS) { 527 /* TCP checksum is good */ 528 skb->ip_summed = CHECKSUM_UNNECESSARY; 529 } else { 530 /* 531 * IP fragment with UDP payload 532 * Hardware complements the payload checksum, so we undo it 533 * and then put the value in host order for further stack use. 534 */ 535 __sum16 sum = (__force __sum16)swab16((__force u16)csum); 536 skb->csum = csum_unfold(~sum); 537 skb->ip_summed = CHECKSUM_COMPLETE; 538 } 539 adapter->hw_csum_good++; 540 } 541 542 static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i) 543 { 544 struct e1000_adapter *adapter = rx_ring->adapter; 545 struct e1000_hw *hw = &adapter->hw; 546 s32 ret_val = __ew32_prepare(hw); 547 548 writel(i, rx_ring->tail); 549 550 if (unlikely(!ret_val && (i != readl(rx_ring->tail)))) { 551 u32 rctl = er32(RCTL); 552 ew32(RCTL, rctl & ~E1000_RCTL_EN); 553 e_err("ME firmware caused invalid RDT - resetting\n"); 554 schedule_work(&adapter->reset_task); 555 } 556 } 557 558 static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i) 559 { 560 struct e1000_adapter *adapter = tx_ring->adapter; 561 struct e1000_hw *hw = &adapter->hw; 562 s32 ret_val = __ew32_prepare(hw); 563 564 writel(i, tx_ring->tail); 565 566 if (unlikely(!ret_val && (i != readl(tx_ring->tail)))) { 567 u32 tctl = er32(TCTL); 568 ew32(TCTL, tctl & ~E1000_TCTL_EN); 569 e_err("ME firmware caused invalid TDT - resetting\n"); 570 schedule_work(&adapter->reset_task); 571 } 572 } 573 574 /** 575 * e1000_alloc_rx_buffers - Replace used receive buffers 576 * @rx_ring: Rx descriptor ring 577 **/ 578 static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring, 579 int cleaned_count, gfp_t gfp) 580 { 581 struct e1000_adapter *adapter = rx_ring->adapter; 582 struct net_device *netdev = adapter->netdev; 583 struct pci_dev *pdev = adapter->pdev; 584 union e1000_rx_desc_extended *rx_desc; 585 struct e1000_buffer *buffer_info; 586 struct sk_buff *skb; 587 unsigned int i; 588 unsigned int bufsz = adapter->rx_buffer_len; 589 590 i = rx_ring->next_to_use; 591 buffer_info = &rx_ring->buffer_info[i]; 592 593 while (cleaned_count--) { 594 skb = buffer_info->skb; 595 if (skb) { 596 skb_trim(skb, 0); 597 goto map_skb; 598 } 599 600 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp); 601 if (!skb) { 602 /* Better luck next round */ 603 adapter->alloc_rx_buff_failed++; 604 break; 605 } 606 607 buffer_info->skb = skb; 608 map_skb: 609 buffer_info->dma = dma_map_single(&pdev->dev, skb->data, 610 adapter->rx_buffer_len, 611 DMA_FROM_DEVICE); 612 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) { 613 dev_err(&pdev->dev, "Rx DMA map failed\n"); 614 adapter->rx_dma_failed++; 615 break; 616 } 617 618 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); 619 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma); 620 621 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) { 622 /* 623 * Force memory writes to complete before letting h/w 624 * know there are new descriptors to fetch. (Only 625 * applicable for weak-ordered memory model archs, 626 * such as IA-64). 627 */ 628 wmb(); 629 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) 630 e1000e_update_rdt_wa(rx_ring, i); 631 else 632 writel(i, rx_ring->tail); 633 } 634 i++; 635 if (i == rx_ring->count) 636 i = 0; 637 buffer_info = &rx_ring->buffer_info[i]; 638 } 639 640 rx_ring->next_to_use = i; 641 } 642 643 /** 644 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split 645 * @rx_ring: Rx descriptor ring 646 **/ 647 static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring, 648 int cleaned_count, gfp_t gfp) 649 { 650 struct e1000_adapter *adapter = rx_ring->adapter; 651 struct net_device *netdev = adapter->netdev; 652 struct pci_dev *pdev = adapter->pdev; 653 union e1000_rx_desc_packet_split *rx_desc; 654 struct e1000_buffer *buffer_info; 655 struct e1000_ps_page *ps_page; 656 struct sk_buff *skb; 657 unsigned int i, j; 658 659 i = rx_ring->next_to_use; 660 buffer_info = &rx_ring->buffer_info[i]; 661 662 while (cleaned_count--) { 663 rx_desc = E1000_RX_DESC_PS(*rx_ring, i); 664 665 for (j = 0; j < PS_PAGE_BUFFERS; j++) { 666 ps_page = &buffer_info->ps_pages[j]; 667 if (j >= adapter->rx_ps_pages) { 668 /* all unused desc entries get hw null ptr */ 669 rx_desc->read.buffer_addr[j + 1] = 670 ~cpu_to_le64(0); 671 continue; 672 } 673 if (!ps_page->page) { 674 ps_page->page = alloc_page(gfp); 675 if (!ps_page->page) { 676 adapter->alloc_rx_buff_failed++; 677 goto no_buffers; 678 } 679 ps_page->dma = dma_map_page(&pdev->dev, 680 ps_page->page, 681 0, PAGE_SIZE, 682 DMA_FROM_DEVICE); 683 if (dma_mapping_error(&pdev->dev, 684 ps_page->dma)) { 685 dev_err(&adapter->pdev->dev, 686 "Rx DMA page map failed\n"); 687 adapter->rx_dma_failed++; 688 goto no_buffers; 689 } 690 } 691 /* 692 * Refresh the desc even if buffer_addrs 693 * didn't change because each write-back 694 * erases this info. 695 */ 696 rx_desc->read.buffer_addr[j + 1] = 697 cpu_to_le64(ps_page->dma); 698 } 699 700 skb = __netdev_alloc_skb_ip_align(netdev, 701 adapter->rx_ps_bsize0, 702 gfp); 703 704 if (!skb) { 705 adapter->alloc_rx_buff_failed++; 706 break; 707 } 708 709 buffer_info->skb = skb; 710 buffer_info->dma = dma_map_single(&pdev->dev, skb->data, 711 adapter->rx_ps_bsize0, 712 DMA_FROM_DEVICE); 713 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) { 714 dev_err(&pdev->dev, "Rx DMA map failed\n"); 715 adapter->rx_dma_failed++; 716 /* cleanup skb */ 717 dev_kfree_skb_any(skb); 718 buffer_info->skb = NULL; 719 break; 720 } 721 722 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma); 723 724 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) { 725 /* 726 * Force memory writes to complete before letting h/w 727 * know there are new descriptors to fetch. (Only 728 * applicable for weak-ordered memory model archs, 729 * such as IA-64). 730 */ 731 wmb(); 732 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) 733 e1000e_update_rdt_wa(rx_ring, i << 1); 734 else 735 writel(i << 1, rx_ring->tail); 736 } 737 738 i++; 739 if (i == rx_ring->count) 740 i = 0; 741 buffer_info = &rx_ring->buffer_info[i]; 742 } 743 744 no_buffers: 745 rx_ring->next_to_use = i; 746 } 747 748 /** 749 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers 750 * @rx_ring: Rx descriptor ring 751 * @cleaned_count: number of buffers to allocate this pass 752 **/ 753 754 static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring, 755 int cleaned_count, gfp_t gfp) 756 { 757 struct e1000_adapter *adapter = rx_ring->adapter; 758 struct net_device *netdev = adapter->netdev; 759 struct pci_dev *pdev = adapter->pdev; 760 union e1000_rx_desc_extended *rx_desc; 761 struct e1000_buffer *buffer_info; 762 struct sk_buff *skb; 763 unsigned int i; 764 unsigned int bufsz = 256 - 16 /* for skb_reserve */; 765 766 i = rx_ring->next_to_use; 767 buffer_info = &rx_ring->buffer_info[i]; 768 769 while (cleaned_count--) { 770 skb = buffer_info->skb; 771 if (skb) { 772 skb_trim(skb, 0); 773 goto check_page; 774 } 775 776 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp); 777 if (unlikely(!skb)) { 778 /* Better luck next round */ 779 adapter->alloc_rx_buff_failed++; 780 break; 781 } 782 783 buffer_info->skb = skb; 784 check_page: 785 /* allocate a new page if necessary */ 786 if (!buffer_info->page) { 787 buffer_info->page = alloc_page(gfp); 788 if (unlikely(!buffer_info->page)) { 789 adapter->alloc_rx_buff_failed++; 790 break; 791 } 792 } 793 794 if (!buffer_info->dma) 795 buffer_info->dma = dma_map_page(&pdev->dev, 796 buffer_info->page, 0, 797 PAGE_SIZE, 798 DMA_FROM_DEVICE); 799 800 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); 801 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma); 802 803 if (unlikely(++i == rx_ring->count)) 804 i = 0; 805 buffer_info = &rx_ring->buffer_info[i]; 806 } 807 808 if (likely(rx_ring->next_to_use != i)) { 809 rx_ring->next_to_use = i; 810 if (unlikely(i-- == 0)) 811 i = (rx_ring->count - 1); 812 813 /* Force memory writes to complete before letting h/w 814 * know there are new descriptors to fetch. (Only 815 * applicable for weak-ordered memory model archs, 816 * such as IA-64). */ 817 wmb(); 818 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) 819 e1000e_update_rdt_wa(rx_ring, i); 820 else 821 writel(i, rx_ring->tail); 822 } 823 } 824 825 static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss, 826 struct sk_buff *skb) 827 { 828 if (netdev->features & NETIF_F_RXHASH) 829 skb->rxhash = le32_to_cpu(rss); 830 } 831 832 /** 833 * e1000_clean_rx_irq - Send received data up the network stack 834 * @rx_ring: Rx descriptor ring 835 * 836 * the return value indicates whether actual cleaning was done, there 837 * is no guarantee that everything was cleaned 838 **/ 839 static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done, 840 int work_to_do) 841 { 842 struct e1000_adapter *adapter = rx_ring->adapter; 843 struct net_device *netdev = adapter->netdev; 844 struct pci_dev *pdev = adapter->pdev; 845 struct e1000_hw *hw = &adapter->hw; 846 union e1000_rx_desc_extended *rx_desc, *next_rxd; 847 struct e1000_buffer *buffer_info, *next_buffer; 848 u32 length, staterr; 849 unsigned int i; 850 int cleaned_count = 0; 851 bool cleaned = false; 852 unsigned int total_rx_bytes = 0, total_rx_packets = 0; 853 854 i = rx_ring->next_to_clean; 855 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); 856 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 857 buffer_info = &rx_ring->buffer_info[i]; 858 859 while (staterr & E1000_RXD_STAT_DD) { 860 struct sk_buff *skb; 861 862 if (*work_done >= work_to_do) 863 break; 864 (*work_done)++; 865 rmb(); /* read descriptor and rx_buffer_info after status DD */ 866 867 skb = buffer_info->skb; 868 buffer_info->skb = NULL; 869 870 prefetch(skb->data - NET_IP_ALIGN); 871 872 i++; 873 if (i == rx_ring->count) 874 i = 0; 875 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i); 876 prefetch(next_rxd); 877 878 next_buffer = &rx_ring->buffer_info[i]; 879 880 cleaned = true; 881 cleaned_count++; 882 dma_unmap_single(&pdev->dev, 883 buffer_info->dma, 884 adapter->rx_buffer_len, 885 DMA_FROM_DEVICE); 886 buffer_info->dma = 0; 887 888 length = le16_to_cpu(rx_desc->wb.upper.length); 889 890 /* 891 * !EOP means multiple descriptors were used to store a single 892 * packet, if that's the case we need to toss it. In fact, we 893 * need to toss every packet with the EOP bit clear and the 894 * next frame that _does_ have the EOP bit set, as it is by 895 * definition only a frame fragment 896 */ 897 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) 898 adapter->flags2 |= FLAG2_IS_DISCARDING; 899 900 if (adapter->flags2 & FLAG2_IS_DISCARDING) { 901 /* All receives must fit into a single buffer */ 902 e_dbg("Receive packet consumed multiple buffers\n"); 903 /* recycle */ 904 buffer_info->skb = skb; 905 if (staterr & E1000_RXD_STAT_EOP) 906 adapter->flags2 &= ~FLAG2_IS_DISCARDING; 907 goto next_desc; 908 } 909 910 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) && 911 !(netdev->features & NETIF_F_RXALL))) { 912 /* recycle */ 913 buffer_info->skb = skb; 914 goto next_desc; 915 } 916 917 /* adjust length to remove Ethernet CRC */ 918 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) { 919 /* If configured to store CRC, don't subtract FCS, 920 * but keep the FCS bytes out of the total_rx_bytes 921 * counter 922 */ 923 if (netdev->features & NETIF_F_RXFCS) 924 total_rx_bytes -= 4; 925 else 926 length -= 4; 927 } 928 929 total_rx_bytes += length; 930 total_rx_packets++; 931 932 /* 933 * code added for copybreak, this should improve 934 * performance for small packets with large amounts 935 * of reassembly being done in the stack 936 */ 937 if (length < copybreak) { 938 struct sk_buff *new_skb = 939 netdev_alloc_skb_ip_align(netdev, length); 940 if (new_skb) { 941 skb_copy_to_linear_data_offset(new_skb, 942 -NET_IP_ALIGN, 943 (skb->data - 944 NET_IP_ALIGN), 945 (length + 946 NET_IP_ALIGN)); 947 /* save the skb in buffer_info as good */ 948 buffer_info->skb = skb; 949 skb = new_skb; 950 } 951 /* else just continue with the old one */ 952 } 953 /* end copybreak code */ 954 skb_put(skb, length); 955 956 /* Receive Checksum Offload */ 957 e1000_rx_checksum(adapter, staterr, 958 rx_desc->wb.lower.hi_dword.csum_ip.csum, skb); 959 960 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb); 961 962 e1000_receive_skb(adapter, netdev, skb, staterr, 963 rx_desc->wb.upper.vlan); 964 965 next_desc: 966 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF); 967 968 /* return some buffers to hardware, one at a time is too slow */ 969 if (cleaned_count >= E1000_RX_BUFFER_WRITE) { 970 adapter->alloc_rx_buf(rx_ring, cleaned_count, 971 GFP_ATOMIC); 972 cleaned_count = 0; 973 } 974 975 /* use prefetched values */ 976 rx_desc = next_rxd; 977 buffer_info = next_buffer; 978 979 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 980 } 981 rx_ring->next_to_clean = i; 982 983 cleaned_count = e1000_desc_unused(rx_ring); 984 if (cleaned_count) 985 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC); 986 987 adapter->total_rx_bytes += total_rx_bytes; 988 adapter->total_rx_packets += total_rx_packets; 989 return cleaned; 990 } 991 992 static void e1000_put_txbuf(struct e1000_ring *tx_ring, 993 struct e1000_buffer *buffer_info) 994 { 995 struct e1000_adapter *adapter = tx_ring->adapter; 996 997 if (buffer_info->dma) { 998 if (buffer_info->mapped_as_page) 999 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma, 1000 buffer_info->length, DMA_TO_DEVICE); 1001 else 1002 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma, 1003 buffer_info->length, DMA_TO_DEVICE); 1004 buffer_info->dma = 0; 1005 } 1006 if (buffer_info->skb) { 1007 dev_kfree_skb_any(buffer_info->skb); 1008 buffer_info->skb = NULL; 1009 } 1010 buffer_info->time_stamp = 0; 1011 } 1012 1013 static void e1000_print_hw_hang(struct work_struct *work) 1014 { 1015 struct e1000_adapter *adapter = container_of(work, 1016 struct e1000_adapter, 1017 print_hang_task); 1018 struct net_device *netdev = adapter->netdev; 1019 struct e1000_ring *tx_ring = adapter->tx_ring; 1020 unsigned int i = tx_ring->next_to_clean; 1021 unsigned int eop = tx_ring->buffer_info[i].next_to_watch; 1022 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop); 1023 struct e1000_hw *hw = &adapter->hw; 1024 u16 phy_status, phy_1000t_status, phy_ext_status; 1025 u16 pci_status; 1026 1027 if (test_bit(__E1000_DOWN, &adapter->state)) 1028 return; 1029 1030 if (!adapter->tx_hang_recheck && 1031 (adapter->flags2 & FLAG2_DMA_BURST)) { 1032 /* 1033 * May be block on write-back, flush and detect again 1034 * flush pending descriptor writebacks to memory 1035 */ 1036 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); 1037 /* execute the writes immediately */ 1038 e1e_flush(); 1039 /* 1040 * Due to rare timing issues, write to TIDV again to ensure 1041 * the write is successful 1042 */ 1043 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); 1044 /* execute the writes immediately */ 1045 e1e_flush(); 1046 adapter->tx_hang_recheck = true; 1047 return; 1048 } 1049 /* Real hang detected */ 1050 adapter->tx_hang_recheck = false; 1051 netif_stop_queue(netdev); 1052 1053 e1e_rphy(hw, PHY_STATUS, &phy_status); 1054 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status); 1055 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status); 1056 1057 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status); 1058 1059 /* detected Hardware unit hang */ 1060 e_err("Detected Hardware Unit Hang:\n" 1061 " TDH <%x>\n" 1062 " TDT <%x>\n" 1063 " next_to_use <%x>\n" 1064 " next_to_clean <%x>\n" 1065 "buffer_info[next_to_clean]:\n" 1066 " time_stamp <%lx>\n" 1067 " next_to_watch <%x>\n" 1068 " jiffies <%lx>\n" 1069 " next_to_watch.status <%x>\n" 1070 "MAC Status <%x>\n" 1071 "PHY Status <%x>\n" 1072 "PHY 1000BASE-T Status <%x>\n" 1073 "PHY Extended Status <%x>\n" 1074 "PCI Status <%x>\n", 1075 readl(tx_ring->head), 1076 readl(tx_ring->tail), 1077 tx_ring->next_to_use, 1078 tx_ring->next_to_clean, 1079 tx_ring->buffer_info[eop].time_stamp, 1080 eop, 1081 jiffies, 1082 eop_desc->upper.fields.status, 1083 er32(STATUS), 1084 phy_status, 1085 phy_1000t_status, 1086 phy_ext_status, 1087 pci_status); 1088 1089 /* Suggest workaround for known h/w issue */ 1090 if ((hw->mac.type == e1000_pchlan) && (er32(CTRL) & E1000_CTRL_TFCE)) 1091 e_err("Try turning off Tx pause (flow control) via ethtool\n"); 1092 } 1093 1094 /** 1095 * e1000_clean_tx_irq - Reclaim resources after transmit completes 1096 * @tx_ring: Tx descriptor ring 1097 * 1098 * the return value indicates whether actual cleaning was done, there 1099 * is no guarantee that everything was cleaned 1100 **/ 1101 static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring) 1102 { 1103 struct e1000_adapter *adapter = tx_ring->adapter; 1104 struct net_device *netdev = adapter->netdev; 1105 struct e1000_hw *hw = &adapter->hw; 1106 struct e1000_tx_desc *tx_desc, *eop_desc; 1107 struct e1000_buffer *buffer_info; 1108 unsigned int i, eop; 1109 unsigned int count = 0; 1110 unsigned int total_tx_bytes = 0, total_tx_packets = 0; 1111 unsigned int bytes_compl = 0, pkts_compl = 0; 1112 1113 i = tx_ring->next_to_clean; 1114 eop = tx_ring->buffer_info[i].next_to_watch; 1115 eop_desc = E1000_TX_DESC(*tx_ring, eop); 1116 1117 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) && 1118 (count < tx_ring->count)) { 1119 bool cleaned = false; 1120 rmb(); /* read buffer_info after eop_desc */ 1121 for (; !cleaned; count++) { 1122 tx_desc = E1000_TX_DESC(*tx_ring, i); 1123 buffer_info = &tx_ring->buffer_info[i]; 1124 cleaned = (i == eop); 1125 1126 if (cleaned) { 1127 total_tx_packets += buffer_info->segs; 1128 total_tx_bytes += buffer_info->bytecount; 1129 if (buffer_info->skb) { 1130 bytes_compl += buffer_info->skb->len; 1131 pkts_compl++; 1132 } 1133 } 1134 1135 e1000_put_txbuf(tx_ring, buffer_info); 1136 tx_desc->upper.data = 0; 1137 1138 i++; 1139 if (i == tx_ring->count) 1140 i = 0; 1141 } 1142 1143 if (i == tx_ring->next_to_use) 1144 break; 1145 eop = tx_ring->buffer_info[i].next_to_watch; 1146 eop_desc = E1000_TX_DESC(*tx_ring, eop); 1147 } 1148 1149 tx_ring->next_to_clean = i; 1150 1151 netdev_completed_queue(netdev, pkts_compl, bytes_compl); 1152 1153 #define TX_WAKE_THRESHOLD 32 1154 if (count && netif_carrier_ok(netdev) && 1155 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) { 1156 /* Make sure that anybody stopping the queue after this 1157 * sees the new next_to_clean. 1158 */ 1159 smp_mb(); 1160 1161 if (netif_queue_stopped(netdev) && 1162 !(test_bit(__E1000_DOWN, &adapter->state))) { 1163 netif_wake_queue(netdev); 1164 ++adapter->restart_queue; 1165 } 1166 } 1167 1168 if (adapter->detect_tx_hung) { 1169 /* 1170 * Detect a transmit hang in hardware, this serializes the 1171 * check with the clearing of time_stamp and movement of i 1172 */ 1173 adapter->detect_tx_hung = false; 1174 if (tx_ring->buffer_info[i].time_stamp && 1175 time_after(jiffies, tx_ring->buffer_info[i].time_stamp 1176 + (adapter->tx_timeout_factor * HZ)) && 1177 !(er32(STATUS) & E1000_STATUS_TXOFF)) 1178 schedule_work(&adapter->print_hang_task); 1179 else 1180 adapter->tx_hang_recheck = false; 1181 } 1182 adapter->total_tx_bytes += total_tx_bytes; 1183 adapter->total_tx_packets += total_tx_packets; 1184 return count < tx_ring->count; 1185 } 1186 1187 /** 1188 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split 1189 * @rx_ring: Rx descriptor ring 1190 * 1191 * the return value indicates whether actual cleaning was done, there 1192 * is no guarantee that everything was cleaned 1193 **/ 1194 static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done, 1195 int work_to_do) 1196 { 1197 struct e1000_adapter *adapter = rx_ring->adapter; 1198 struct e1000_hw *hw = &adapter->hw; 1199 union e1000_rx_desc_packet_split *rx_desc, *next_rxd; 1200 struct net_device *netdev = adapter->netdev; 1201 struct pci_dev *pdev = adapter->pdev; 1202 struct e1000_buffer *buffer_info, *next_buffer; 1203 struct e1000_ps_page *ps_page; 1204 struct sk_buff *skb; 1205 unsigned int i, j; 1206 u32 length, staterr; 1207 int cleaned_count = 0; 1208 bool cleaned = false; 1209 unsigned int total_rx_bytes = 0, total_rx_packets = 0; 1210 1211 i = rx_ring->next_to_clean; 1212 rx_desc = E1000_RX_DESC_PS(*rx_ring, i); 1213 staterr = le32_to_cpu(rx_desc->wb.middle.status_error); 1214 buffer_info = &rx_ring->buffer_info[i]; 1215 1216 while (staterr & E1000_RXD_STAT_DD) { 1217 if (*work_done >= work_to_do) 1218 break; 1219 (*work_done)++; 1220 skb = buffer_info->skb; 1221 rmb(); /* read descriptor and rx_buffer_info after status DD */ 1222 1223 /* in the packet split case this is header only */ 1224 prefetch(skb->data - NET_IP_ALIGN); 1225 1226 i++; 1227 if (i == rx_ring->count) 1228 i = 0; 1229 next_rxd = E1000_RX_DESC_PS(*rx_ring, i); 1230 prefetch(next_rxd); 1231 1232 next_buffer = &rx_ring->buffer_info[i]; 1233 1234 cleaned = true; 1235 cleaned_count++; 1236 dma_unmap_single(&pdev->dev, buffer_info->dma, 1237 adapter->rx_ps_bsize0, DMA_FROM_DEVICE); 1238 buffer_info->dma = 0; 1239 1240 /* see !EOP comment in other Rx routine */ 1241 if (!(staterr & E1000_RXD_STAT_EOP)) 1242 adapter->flags2 |= FLAG2_IS_DISCARDING; 1243 1244 if (adapter->flags2 & FLAG2_IS_DISCARDING) { 1245 e_dbg("Packet Split buffers didn't pick up the full packet\n"); 1246 dev_kfree_skb_irq(skb); 1247 if (staterr & E1000_RXD_STAT_EOP) 1248 adapter->flags2 &= ~FLAG2_IS_DISCARDING; 1249 goto next_desc; 1250 } 1251 1252 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) && 1253 !(netdev->features & NETIF_F_RXALL))) { 1254 dev_kfree_skb_irq(skb); 1255 goto next_desc; 1256 } 1257 1258 length = le16_to_cpu(rx_desc->wb.middle.length0); 1259 1260 if (!length) { 1261 e_dbg("Last part of the packet spanning multiple descriptors\n"); 1262 dev_kfree_skb_irq(skb); 1263 goto next_desc; 1264 } 1265 1266 /* Good Receive */ 1267 skb_put(skb, length); 1268 1269 { 1270 /* 1271 * this looks ugly, but it seems compiler issues make 1272 * it more efficient than reusing j 1273 */ 1274 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]); 1275 1276 /* 1277 * page alloc/put takes too long and effects small 1278 * packet throughput, so unsplit small packets and 1279 * save the alloc/put only valid in softirq (napi) 1280 * context to call kmap_* 1281 */ 1282 if (l1 && (l1 <= copybreak) && 1283 ((length + l1) <= adapter->rx_ps_bsize0)) { 1284 u8 *vaddr; 1285 1286 ps_page = &buffer_info->ps_pages[0]; 1287 1288 /* 1289 * there is no documentation about how to call 1290 * kmap_atomic, so we can't hold the mapping 1291 * very long 1292 */ 1293 dma_sync_single_for_cpu(&pdev->dev, 1294 ps_page->dma, 1295 PAGE_SIZE, 1296 DMA_FROM_DEVICE); 1297 vaddr = kmap_atomic(ps_page->page); 1298 memcpy(skb_tail_pointer(skb), vaddr, l1); 1299 kunmap_atomic(vaddr); 1300 dma_sync_single_for_device(&pdev->dev, 1301 ps_page->dma, 1302 PAGE_SIZE, 1303 DMA_FROM_DEVICE); 1304 1305 /* remove the CRC */ 1306 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) { 1307 if (!(netdev->features & NETIF_F_RXFCS)) 1308 l1 -= 4; 1309 } 1310 1311 skb_put(skb, l1); 1312 goto copydone; 1313 } /* if */ 1314 } 1315 1316 for (j = 0; j < PS_PAGE_BUFFERS; j++) { 1317 length = le16_to_cpu(rx_desc->wb.upper.length[j]); 1318 if (!length) 1319 break; 1320 1321 ps_page = &buffer_info->ps_pages[j]; 1322 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE, 1323 DMA_FROM_DEVICE); 1324 ps_page->dma = 0; 1325 skb_fill_page_desc(skb, j, ps_page->page, 0, length); 1326 ps_page->page = NULL; 1327 skb->len += length; 1328 skb->data_len += length; 1329 skb->truesize += PAGE_SIZE; 1330 } 1331 1332 /* strip the ethernet crc, problem is we're using pages now so 1333 * this whole operation can get a little cpu intensive 1334 */ 1335 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) { 1336 if (!(netdev->features & NETIF_F_RXFCS)) 1337 pskb_trim(skb, skb->len - 4); 1338 } 1339 1340 copydone: 1341 total_rx_bytes += skb->len; 1342 total_rx_packets++; 1343 1344 e1000_rx_checksum(adapter, staterr, 1345 rx_desc->wb.lower.hi_dword.csum_ip.csum, skb); 1346 1347 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb); 1348 1349 if (rx_desc->wb.upper.header_status & 1350 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)) 1351 adapter->rx_hdr_split++; 1352 1353 e1000_receive_skb(adapter, netdev, skb, 1354 staterr, rx_desc->wb.middle.vlan); 1355 1356 next_desc: 1357 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF); 1358 buffer_info->skb = NULL; 1359 1360 /* return some buffers to hardware, one at a time is too slow */ 1361 if (cleaned_count >= E1000_RX_BUFFER_WRITE) { 1362 adapter->alloc_rx_buf(rx_ring, cleaned_count, 1363 GFP_ATOMIC); 1364 cleaned_count = 0; 1365 } 1366 1367 /* use prefetched values */ 1368 rx_desc = next_rxd; 1369 buffer_info = next_buffer; 1370 1371 staterr = le32_to_cpu(rx_desc->wb.middle.status_error); 1372 } 1373 rx_ring->next_to_clean = i; 1374 1375 cleaned_count = e1000_desc_unused(rx_ring); 1376 if (cleaned_count) 1377 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC); 1378 1379 adapter->total_rx_bytes += total_rx_bytes; 1380 adapter->total_rx_packets += total_rx_packets; 1381 return cleaned; 1382 } 1383 1384 /** 1385 * e1000_consume_page - helper function 1386 **/ 1387 static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb, 1388 u16 length) 1389 { 1390 bi->page = NULL; 1391 skb->len += length; 1392 skb->data_len += length; 1393 skb->truesize += PAGE_SIZE; 1394 } 1395 1396 /** 1397 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy 1398 * @adapter: board private structure 1399 * 1400 * the return value indicates whether actual cleaning was done, there 1401 * is no guarantee that everything was cleaned 1402 **/ 1403 static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done, 1404 int work_to_do) 1405 { 1406 struct e1000_adapter *adapter = rx_ring->adapter; 1407 struct net_device *netdev = adapter->netdev; 1408 struct pci_dev *pdev = adapter->pdev; 1409 union e1000_rx_desc_extended *rx_desc, *next_rxd; 1410 struct e1000_buffer *buffer_info, *next_buffer; 1411 u32 length, staterr; 1412 unsigned int i; 1413 int cleaned_count = 0; 1414 bool cleaned = false; 1415 unsigned int total_rx_bytes=0, total_rx_packets=0; 1416 1417 i = rx_ring->next_to_clean; 1418 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); 1419 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 1420 buffer_info = &rx_ring->buffer_info[i]; 1421 1422 while (staterr & E1000_RXD_STAT_DD) { 1423 struct sk_buff *skb; 1424 1425 if (*work_done >= work_to_do) 1426 break; 1427 (*work_done)++; 1428 rmb(); /* read descriptor and rx_buffer_info after status DD */ 1429 1430 skb = buffer_info->skb; 1431 buffer_info->skb = NULL; 1432 1433 ++i; 1434 if (i == rx_ring->count) 1435 i = 0; 1436 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i); 1437 prefetch(next_rxd); 1438 1439 next_buffer = &rx_ring->buffer_info[i]; 1440 1441 cleaned = true; 1442 cleaned_count++; 1443 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE, 1444 DMA_FROM_DEVICE); 1445 buffer_info->dma = 0; 1446 1447 length = le16_to_cpu(rx_desc->wb.upper.length); 1448 1449 /* errors is only valid for DD + EOP descriptors */ 1450 if (unlikely((staterr & E1000_RXD_STAT_EOP) && 1451 ((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) && 1452 !(netdev->features & NETIF_F_RXALL)))) { 1453 /* recycle both page and skb */ 1454 buffer_info->skb = skb; 1455 /* an error means any chain goes out the window too */ 1456 if (rx_ring->rx_skb_top) 1457 dev_kfree_skb_irq(rx_ring->rx_skb_top); 1458 rx_ring->rx_skb_top = NULL; 1459 goto next_desc; 1460 } 1461 1462 #define rxtop (rx_ring->rx_skb_top) 1463 if (!(staterr & E1000_RXD_STAT_EOP)) { 1464 /* this descriptor is only the beginning (or middle) */ 1465 if (!rxtop) { 1466 /* this is the beginning of a chain */ 1467 rxtop = skb; 1468 skb_fill_page_desc(rxtop, 0, buffer_info->page, 1469 0, length); 1470 } else { 1471 /* this is the middle of a chain */ 1472 skb_fill_page_desc(rxtop, 1473 skb_shinfo(rxtop)->nr_frags, 1474 buffer_info->page, 0, length); 1475 /* re-use the skb, only consumed the page */ 1476 buffer_info->skb = skb; 1477 } 1478 e1000_consume_page(buffer_info, rxtop, length); 1479 goto next_desc; 1480 } else { 1481 if (rxtop) { 1482 /* end of the chain */ 1483 skb_fill_page_desc(rxtop, 1484 skb_shinfo(rxtop)->nr_frags, 1485 buffer_info->page, 0, length); 1486 /* re-use the current skb, we only consumed the 1487 * page */ 1488 buffer_info->skb = skb; 1489 skb = rxtop; 1490 rxtop = NULL; 1491 e1000_consume_page(buffer_info, skb, length); 1492 } else { 1493 /* no chain, got EOP, this buf is the packet 1494 * copybreak to save the put_page/alloc_page */ 1495 if (length <= copybreak && 1496 skb_tailroom(skb) >= length) { 1497 u8 *vaddr; 1498 vaddr = kmap_atomic(buffer_info->page); 1499 memcpy(skb_tail_pointer(skb), vaddr, 1500 length); 1501 kunmap_atomic(vaddr); 1502 /* re-use the page, so don't erase 1503 * buffer_info->page */ 1504 skb_put(skb, length); 1505 } else { 1506 skb_fill_page_desc(skb, 0, 1507 buffer_info->page, 0, 1508 length); 1509 e1000_consume_page(buffer_info, skb, 1510 length); 1511 } 1512 } 1513 } 1514 1515 /* Receive Checksum Offload XXX recompute due to CRC strip? */ 1516 e1000_rx_checksum(adapter, staterr, 1517 rx_desc->wb.lower.hi_dword.csum_ip.csum, skb); 1518 1519 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb); 1520 1521 /* probably a little skewed due to removing CRC */ 1522 total_rx_bytes += skb->len; 1523 total_rx_packets++; 1524 1525 /* eth type trans needs skb->data to point to something */ 1526 if (!pskb_may_pull(skb, ETH_HLEN)) { 1527 e_err("pskb_may_pull failed.\n"); 1528 dev_kfree_skb_irq(skb); 1529 goto next_desc; 1530 } 1531 1532 e1000_receive_skb(adapter, netdev, skb, staterr, 1533 rx_desc->wb.upper.vlan); 1534 1535 next_desc: 1536 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF); 1537 1538 /* return some buffers to hardware, one at a time is too slow */ 1539 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) { 1540 adapter->alloc_rx_buf(rx_ring, cleaned_count, 1541 GFP_ATOMIC); 1542 cleaned_count = 0; 1543 } 1544 1545 /* use prefetched values */ 1546 rx_desc = next_rxd; 1547 buffer_info = next_buffer; 1548 1549 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 1550 } 1551 rx_ring->next_to_clean = i; 1552 1553 cleaned_count = e1000_desc_unused(rx_ring); 1554 if (cleaned_count) 1555 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC); 1556 1557 adapter->total_rx_bytes += total_rx_bytes; 1558 adapter->total_rx_packets += total_rx_packets; 1559 return cleaned; 1560 } 1561 1562 /** 1563 * e1000_clean_rx_ring - Free Rx Buffers per Queue 1564 * @rx_ring: Rx descriptor ring 1565 **/ 1566 static void e1000_clean_rx_ring(struct e1000_ring *rx_ring) 1567 { 1568 struct e1000_adapter *adapter = rx_ring->adapter; 1569 struct e1000_buffer *buffer_info; 1570 struct e1000_ps_page *ps_page; 1571 struct pci_dev *pdev = adapter->pdev; 1572 unsigned int i, j; 1573 1574 /* Free all the Rx ring sk_buffs */ 1575 for (i = 0; i < rx_ring->count; i++) { 1576 buffer_info = &rx_ring->buffer_info[i]; 1577 if (buffer_info->dma) { 1578 if (adapter->clean_rx == e1000_clean_rx_irq) 1579 dma_unmap_single(&pdev->dev, buffer_info->dma, 1580 adapter->rx_buffer_len, 1581 DMA_FROM_DEVICE); 1582 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq) 1583 dma_unmap_page(&pdev->dev, buffer_info->dma, 1584 PAGE_SIZE, 1585 DMA_FROM_DEVICE); 1586 else if (adapter->clean_rx == e1000_clean_rx_irq_ps) 1587 dma_unmap_single(&pdev->dev, buffer_info->dma, 1588 adapter->rx_ps_bsize0, 1589 DMA_FROM_DEVICE); 1590 buffer_info->dma = 0; 1591 } 1592 1593 if (buffer_info->page) { 1594 put_page(buffer_info->page); 1595 buffer_info->page = NULL; 1596 } 1597 1598 if (buffer_info->skb) { 1599 dev_kfree_skb(buffer_info->skb); 1600 buffer_info->skb = NULL; 1601 } 1602 1603 for (j = 0; j < PS_PAGE_BUFFERS; j++) { 1604 ps_page = &buffer_info->ps_pages[j]; 1605 if (!ps_page->page) 1606 break; 1607 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE, 1608 DMA_FROM_DEVICE); 1609 ps_page->dma = 0; 1610 put_page(ps_page->page); 1611 ps_page->page = NULL; 1612 } 1613 } 1614 1615 /* there also may be some cached data from a chained receive */ 1616 if (rx_ring->rx_skb_top) { 1617 dev_kfree_skb(rx_ring->rx_skb_top); 1618 rx_ring->rx_skb_top = NULL; 1619 } 1620 1621 /* Zero out the descriptor ring */ 1622 memset(rx_ring->desc, 0, rx_ring->size); 1623 1624 rx_ring->next_to_clean = 0; 1625 rx_ring->next_to_use = 0; 1626 adapter->flags2 &= ~FLAG2_IS_DISCARDING; 1627 1628 writel(0, rx_ring->head); 1629 if (rx_ring->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) 1630 e1000e_update_rdt_wa(rx_ring, 0); 1631 else 1632 writel(0, rx_ring->tail); 1633 } 1634 1635 static void e1000e_downshift_workaround(struct work_struct *work) 1636 { 1637 struct e1000_adapter *adapter = container_of(work, 1638 struct e1000_adapter, downshift_task); 1639 1640 if (test_bit(__E1000_DOWN, &adapter->state)) 1641 return; 1642 1643 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw); 1644 } 1645 1646 /** 1647 * e1000_intr_msi - Interrupt Handler 1648 * @irq: interrupt number 1649 * @data: pointer to a network interface device structure 1650 **/ 1651 static irqreturn_t e1000_intr_msi(int irq, void *data) 1652 { 1653 struct net_device *netdev = data; 1654 struct e1000_adapter *adapter = netdev_priv(netdev); 1655 struct e1000_hw *hw = &adapter->hw; 1656 u32 icr = er32(ICR); 1657 1658 /* 1659 * read ICR disables interrupts using IAM 1660 */ 1661 1662 if (icr & E1000_ICR_LSC) { 1663 hw->mac.get_link_status = true; 1664 /* 1665 * ICH8 workaround-- Call gig speed drop workaround on cable 1666 * disconnect (LSC) before accessing any PHY registers 1667 */ 1668 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) && 1669 (!(er32(STATUS) & E1000_STATUS_LU))) 1670 schedule_work(&adapter->downshift_task); 1671 1672 /* 1673 * 80003ES2LAN workaround-- For packet buffer work-around on 1674 * link down event; disable receives here in the ISR and reset 1675 * adapter in watchdog 1676 */ 1677 if (netif_carrier_ok(netdev) && 1678 adapter->flags & FLAG_RX_NEEDS_RESTART) { 1679 /* disable receives */ 1680 u32 rctl = er32(RCTL); 1681 ew32(RCTL, rctl & ~E1000_RCTL_EN); 1682 adapter->flags |= FLAG_RX_RESTART_NOW; 1683 } 1684 /* guard against interrupt when we're going down */ 1685 if (!test_bit(__E1000_DOWN, &adapter->state)) 1686 mod_timer(&adapter->watchdog_timer, jiffies + 1); 1687 } 1688 1689 if (napi_schedule_prep(&adapter->napi)) { 1690 adapter->total_tx_bytes = 0; 1691 adapter->total_tx_packets = 0; 1692 adapter->total_rx_bytes = 0; 1693 adapter->total_rx_packets = 0; 1694 __napi_schedule(&adapter->napi); 1695 } 1696 1697 return IRQ_HANDLED; 1698 } 1699 1700 /** 1701 * e1000_intr - Interrupt Handler 1702 * @irq: interrupt number 1703 * @data: pointer to a network interface device structure 1704 **/ 1705 static irqreturn_t e1000_intr(int irq, void *data) 1706 { 1707 struct net_device *netdev = data; 1708 struct e1000_adapter *adapter = netdev_priv(netdev); 1709 struct e1000_hw *hw = &adapter->hw; 1710 u32 rctl, icr = er32(ICR); 1711 1712 if (!icr || test_bit(__E1000_DOWN, &adapter->state)) 1713 return IRQ_NONE; /* Not our interrupt */ 1714 1715 /* 1716 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is 1717 * not set, then the adapter didn't send an interrupt 1718 */ 1719 if (!(icr & E1000_ICR_INT_ASSERTED)) 1720 return IRQ_NONE; 1721 1722 /* 1723 * Interrupt Auto-Mask...upon reading ICR, 1724 * interrupts are masked. No need for the 1725 * IMC write 1726 */ 1727 1728 if (icr & E1000_ICR_LSC) { 1729 hw->mac.get_link_status = true; 1730 /* 1731 * ICH8 workaround-- Call gig speed drop workaround on cable 1732 * disconnect (LSC) before accessing any PHY registers 1733 */ 1734 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) && 1735 (!(er32(STATUS) & E1000_STATUS_LU))) 1736 schedule_work(&adapter->downshift_task); 1737 1738 /* 1739 * 80003ES2LAN workaround-- 1740 * For packet buffer work-around on link down event; 1741 * disable receives here in the ISR and 1742 * reset adapter in watchdog 1743 */ 1744 if (netif_carrier_ok(netdev) && 1745 (adapter->flags & FLAG_RX_NEEDS_RESTART)) { 1746 /* disable receives */ 1747 rctl = er32(RCTL); 1748 ew32(RCTL, rctl & ~E1000_RCTL_EN); 1749 adapter->flags |= FLAG_RX_RESTART_NOW; 1750 } 1751 /* guard against interrupt when we're going down */ 1752 if (!test_bit(__E1000_DOWN, &adapter->state)) 1753 mod_timer(&adapter->watchdog_timer, jiffies + 1); 1754 } 1755 1756 if (napi_schedule_prep(&adapter->napi)) { 1757 adapter->total_tx_bytes = 0; 1758 adapter->total_tx_packets = 0; 1759 adapter->total_rx_bytes = 0; 1760 adapter->total_rx_packets = 0; 1761 __napi_schedule(&adapter->napi); 1762 } 1763 1764 return IRQ_HANDLED; 1765 } 1766 1767 static irqreturn_t e1000_msix_other(int irq, void *data) 1768 { 1769 struct net_device *netdev = data; 1770 struct e1000_adapter *adapter = netdev_priv(netdev); 1771 struct e1000_hw *hw = &adapter->hw; 1772 u32 icr = er32(ICR); 1773 1774 if (!(icr & E1000_ICR_INT_ASSERTED)) { 1775 if (!test_bit(__E1000_DOWN, &adapter->state)) 1776 ew32(IMS, E1000_IMS_OTHER); 1777 return IRQ_NONE; 1778 } 1779 1780 if (icr & adapter->eiac_mask) 1781 ew32(ICS, (icr & adapter->eiac_mask)); 1782 1783 if (icr & E1000_ICR_OTHER) { 1784 if (!(icr & E1000_ICR_LSC)) 1785 goto no_link_interrupt; 1786 hw->mac.get_link_status = true; 1787 /* guard against interrupt when we're going down */ 1788 if (!test_bit(__E1000_DOWN, &adapter->state)) 1789 mod_timer(&adapter->watchdog_timer, jiffies + 1); 1790 } 1791 1792 no_link_interrupt: 1793 if (!test_bit(__E1000_DOWN, &adapter->state)) 1794 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER); 1795 1796 return IRQ_HANDLED; 1797 } 1798 1799 1800 static irqreturn_t e1000_intr_msix_tx(int irq, void *data) 1801 { 1802 struct net_device *netdev = data; 1803 struct e1000_adapter *adapter = netdev_priv(netdev); 1804 struct e1000_hw *hw = &adapter->hw; 1805 struct e1000_ring *tx_ring = adapter->tx_ring; 1806 1807 1808 adapter->total_tx_bytes = 0; 1809 adapter->total_tx_packets = 0; 1810 1811 if (!e1000_clean_tx_irq(tx_ring)) 1812 /* Ring was not completely cleaned, so fire another interrupt */ 1813 ew32(ICS, tx_ring->ims_val); 1814 1815 return IRQ_HANDLED; 1816 } 1817 1818 static irqreturn_t e1000_intr_msix_rx(int irq, void *data) 1819 { 1820 struct net_device *netdev = data; 1821 struct e1000_adapter *adapter = netdev_priv(netdev); 1822 struct e1000_ring *rx_ring = adapter->rx_ring; 1823 1824 /* Write the ITR value calculated at the end of the 1825 * previous interrupt. 1826 */ 1827 if (rx_ring->set_itr) { 1828 writel(1000000000 / (rx_ring->itr_val * 256), 1829 rx_ring->itr_register); 1830 rx_ring->set_itr = 0; 1831 } 1832 1833 if (napi_schedule_prep(&adapter->napi)) { 1834 adapter->total_rx_bytes = 0; 1835 adapter->total_rx_packets = 0; 1836 __napi_schedule(&adapter->napi); 1837 } 1838 return IRQ_HANDLED; 1839 } 1840 1841 /** 1842 * e1000_configure_msix - Configure MSI-X hardware 1843 * 1844 * e1000_configure_msix sets up the hardware to properly 1845 * generate MSI-X interrupts. 1846 **/ 1847 static void e1000_configure_msix(struct e1000_adapter *adapter) 1848 { 1849 struct e1000_hw *hw = &adapter->hw; 1850 struct e1000_ring *rx_ring = adapter->rx_ring; 1851 struct e1000_ring *tx_ring = adapter->tx_ring; 1852 int vector = 0; 1853 u32 ctrl_ext, ivar = 0; 1854 1855 adapter->eiac_mask = 0; 1856 1857 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */ 1858 if (hw->mac.type == e1000_82574) { 1859 u32 rfctl = er32(RFCTL); 1860 rfctl |= E1000_RFCTL_ACK_DIS; 1861 ew32(RFCTL, rfctl); 1862 } 1863 1864 #define E1000_IVAR_INT_ALLOC_VALID 0x8 1865 /* Configure Rx vector */ 1866 rx_ring->ims_val = E1000_IMS_RXQ0; 1867 adapter->eiac_mask |= rx_ring->ims_val; 1868 if (rx_ring->itr_val) 1869 writel(1000000000 / (rx_ring->itr_val * 256), 1870 rx_ring->itr_register); 1871 else 1872 writel(1, rx_ring->itr_register); 1873 ivar = E1000_IVAR_INT_ALLOC_VALID | vector; 1874 1875 /* Configure Tx vector */ 1876 tx_ring->ims_val = E1000_IMS_TXQ0; 1877 vector++; 1878 if (tx_ring->itr_val) 1879 writel(1000000000 / (tx_ring->itr_val * 256), 1880 tx_ring->itr_register); 1881 else 1882 writel(1, tx_ring->itr_register); 1883 adapter->eiac_mask |= tx_ring->ims_val; 1884 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8); 1885 1886 /* set vector for Other Causes, e.g. link changes */ 1887 vector++; 1888 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16); 1889 if (rx_ring->itr_val) 1890 writel(1000000000 / (rx_ring->itr_val * 256), 1891 hw->hw_addr + E1000_EITR_82574(vector)); 1892 else 1893 writel(1, hw->hw_addr + E1000_EITR_82574(vector)); 1894 1895 /* Cause Tx interrupts on every write back */ 1896 ivar |= (1 << 31); 1897 1898 ew32(IVAR, ivar); 1899 1900 /* enable MSI-X PBA support */ 1901 ctrl_ext = er32(CTRL_EXT); 1902 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR; 1903 1904 /* Auto-Mask Other interrupts upon ICR read */ 1905 #define E1000_EIAC_MASK_82574 0x01F00000 1906 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER); 1907 ctrl_ext |= E1000_CTRL_EXT_EIAME; 1908 ew32(CTRL_EXT, ctrl_ext); 1909 e1e_flush(); 1910 } 1911 1912 void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter) 1913 { 1914 if (adapter->msix_entries) { 1915 pci_disable_msix(adapter->pdev); 1916 kfree(adapter->msix_entries); 1917 adapter->msix_entries = NULL; 1918 } else if (adapter->flags & FLAG_MSI_ENABLED) { 1919 pci_disable_msi(adapter->pdev); 1920 adapter->flags &= ~FLAG_MSI_ENABLED; 1921 } 1922 } 1923 1924 /** 1925 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported 1926 * 1927 * Attempt to configure interrupts using the best available 1928 * capabilities of the hardware and kernel. 1929 **/ 1930 void e1000e_set_interrupt_capability(struct e1000_adapter *adapter) 1931 { 1932 int err; 1933 int i; 1934 1935 switch (adapter->int_mode) { 1936 case E1000E_INT_MODE_MSIX: 1937 if (adapter->flags & FLAG_HAS_MSIX) { 1938 adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */ 1939 adapter->msix_entries = kcalloc(adapter->num_vectors, 1940 sizeof(struct msix_entry), 1941 GFP_KERNEL); 1942 if (adapter->msix_entries) { 1943 for (i = 0; i < adapter->num_vectors; i++) 1944 adapter->msix_entries[i].entry = i; 1945 1946 err = pci_enable_msix(adapter->pdev, 1947 adapter->msix_entries, 1948 adapter->num_vectors); 1949 if (err == 0) 1950 return; 1951 } 1952 /* MSI-X failed, so fall through and try MSI */ 1953 e_err("Failed to initialize MSI-X interrupts. Falling back to MSI interrupts.\n"); 1954 e1000e_reset_interrupt_capability(adapter); 1955 } 1956 adapter->int_mode = E1000E_INT_MODE_MSI; 1957 /* Fall through */ 1958 case E1000E_INT_MODE_MSI: 1959 if (!pci_enable_msi(adapter->pdev)) { 1960 adapter->flags |= FLAG_MSI_ENABLED; 1961 } else { 1962 adapter->int_mode = E1000E_INT_MODE_LEGACY; 1963 e_err("Failed to initialize MSI interrupts. Falling back to legacy interrupts.\n"); 1964 } 1965 /* Fall through */ 1966 case E1000E_INT_MODE_LEGACY: 1967 /* Don't do anything; this is the system default */ 1968 break; 1969 } 1970 1971 /* store the number of vectors being used */ 1972 adapter->num_vectors = 1; 1973 } 1974 1975 /** 1976 * e1000_request_msix - Initialize MSI-X interrupts 1977 * 1978 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the 1979 * kernel. 1980 **/ 1981 static int e1000_request_msix(struct e1000_adapter *adapter) 1982 { 1983 struct net_device *netdev = adapter->netdev; 1984 int err = 0, vector = 0; 1985 1986 if (strlen(netdev->name) < (IFNAMSIZ - 5)) 1987 snprintf(adapter->rx_ring->name, 1988 sizeof(adapter->rx_ring->name) - 1, 1989 "%s-rx-0", netdev->name); 1990 else 1991 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ); 1992 err = request_irq(adapter->msix_entries[vector].vector, 1993 e1000_intr_msix_rx, 0, adapter->rx_ring->name, 1994 netdev); 1995 if (err) 1996 return err; 1997 adapter->rx_ring->itr_register = adapter->hw.hw_addr + 1998 E1000_EITR_82574(vector); 1999 adapter->rx_ring->itr_val = adapter->itr; 2000 vector++; 2001 2002 if (strlen(netdev->name) < (IFNAMSIZ - 5)) 2003 snprintf(adapter->tx_ring->name, 2004 sizeof(adapter->tx_ring->name) - 1, 2005 "%s-tx-0", netdev->name); 2006 else 2007 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ); 2008 err = request_irq(adapter->msix_entries[vector].vector, 2009 e1000_intr_msix_tx, 0, adapter->tx_ring->name, 2010 netdev); 2011 if (err) 2012 return err; 2013 adapter->tx_ring->itr_register = adapter->hw.hw_addr + 2014 E1000_EITR_82574(vector); 2015 adapter->tx_ring->itr_val = adapter->itr; 2016 vector++; 2017 2018 err = request_irq(adapter->msix_entries[vector].vector, 2019 e1000_msix_other, 0, netdev->name, netdev); 2020 if (err) 2021 return err; 2022 2023 e1000_configure_msix(adapter); 2024 2025 return 0; 2026 } 2027 2028 /** 2029 * e1000_request_irq - initialize interrupts 2030 * 2031 * Attempts to configure interrupts using the best available 2032 * capabilities of the hardware and kernel. 2033 **/ 2034 static int e1000_request_irq(struct e1000_adapter *adapter) 2035 { 2036 struct net_device *netdev = adapter->netdev; 2037 int err; 2038 2039 if (adapter->msix_entries) { 2040 err = e1000_request_msix(adapter); 2041 if (!err) 2042 return err; 2043 /* fall back to MSI */ 2044 e1000e_reset_interrupt_capability(adapter); 2045 adapter->int_mode = E1000E_INT_MODE_MSI; 2046 e1000e_set_interrupt_capability(adapter); 2047 } 2048 if (adapter->flags & FLAG_MSI_ENABLED) { 2049 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0, 2050 netdev->name, netdev); 2051 if (!err) 2052 return err; 2053 2054 /* fall back to legacy interrupt */ 2055 e1000e_reset_interrupt_capability(adapter); 2056 adapter->int_mode = E1000E_INT_MODE_LEGACY; 2057 } 2058 2059 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED, 2060 netdev->name, netdev); 2061 if (err) 2062 e_err("Unable to allocate interrupt, Error: %d\n", err); 2063 2064 return err; 2065 } 2066 2067 static void e1000_free_irq(struct e1000_adapter *adapter) 2068 { 2069 struct net_device *netdev = adapter->netdev; 2070 2071 if (adapter->msix_entries) { 2072 int vector = 0; 2073 2074 free_irq(adapter->msix_entries[vector].vector, netdev); 2075 vector++; 2076 2077 free_irq(adapter->msix_entries[vector].vector, netdev); 2078 vector++; 2079 2080 /* Other Causes interrupt vector */ 2081 free_irq(adapter->msix_entries[vector].vector, netdev); 2082 return; 2083 } 2084 2085 free_irq(adapter->pdev->irq, netdev); 2086 } 2087 2088 /** 2089 * e1000_irq_disable - Mask off interrupt generation on the NIC 2090 **/ 2091 static void e1000_irq_disable(struct e1000_adapter *adapter) 2092 { 2093 struct e1000_hw *hw = &adapter->hw; 2094 2095 ew32(IMC, ~0); 2096 if (adapter->msix_entries) 2097 ew32(EIAC_82574, 0); 2098 e1e_flush(); 2099 2100 if (adapter->msix_entries) { 2101 int i; 2102 for (i = 0; i < adapter->num_vectors; i++) 2103 synchronize_irq(adapter->msix_entries[i].vector); 2104 } else { 2105 synchronize_irq(adapter->pdev->irq); 2106 } 2107 } 2108 2109 /** 2110 * e1000_irq_enable - Enable default interrupt generation settings 2111 **/ 2112 static void e1000_irq_enable(struct e1000_adapter *adapter) 2113 { 2114 struct e1000_hw *hw = &adapter->hw; 2115 2116 if (adapter->msix_entries) { 2117 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574); 2118 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC); 2119 } else { 2120 ew32(IMS, IMS_ENABLE_MASK); 2121 } 2122 e1e_flush(); 2123 } 2124 2125 /** 2126 * e1000e_get_hw_control - get control of the h/w from f/w 2127 * @adapter: address of board private structure 2128 * 2129 * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit. 2130 * For ASF and Pass Through versions of f/w this means that 2131 * the driver is loaded. For AMT version (only with 82573) 2132 * of the f/w this means that the network i/f is open. 2133 **/ 2134 void e1000e_get_hw_control(struct e1000_adapter *adapter) 2135 { 2136 struct e1000_hw *hw = &adapter->hw; 2137 u32 ctrl_ext; 2138 u32 swsm; 2139 2140 /* Let firmware know the driver has taken over */ 2141 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) { 2142 swsm = er32(SWSM); 2143 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD); 2144 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) { 2145 ctrl_ext = er32(CTRL_EXT); 2146 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); 2147 } 2148 } 2149 2150 /** 2151 * e1000e_release_hw_control - release control of the h/w to f/w 2152 * @adapter: address of board private structure 2153 * 2154 * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit. 2155 * For ASF and Pass Through versions of f/w this means that the 2156 * driver is no longer loaded. For AMT version (only with 82573) i 2157 * of the f/w this means that the network i/f is closed. 2158 * 2159 **/ 2160 void e1000e_release_hw_control(struct e1000_adapter *adapter) 2161 { 2162 struct e1000_hw *hw = &adapter->hw; 2163 u32 ctrl_ext; 2164 u32 swsm; 2165 2166 /* Let firmware taken over control of h/w */ 2167 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) { 2168 swsm = er32(SWSM); 2169 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD); 2170 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) { 2171 ctrl_ext = er32(CTRL_EXT); 2172 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); 2173 } 2174 } 2175 2176 /** 2177 * @e1000_alloc_ring - allocate memory for a ring structure 2178 **/ 2179 static int e1000_alloc_ring_dma(struct e1000_adapter *adapter, 2180 struct e1000_ring *ring) 2181 { 2182 struct pci_dev *pdev = adapter->pdev; 2183 2184 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma, 2185 GFP_KERNEL); 2186 if (!ring->desc) 2187 return -ENOMEM; 2188 2189 return 0; 2190 } 2191 2192 /** 2193 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors) 2194 * @tx_ring: Tx descriptor ring 2195 * 2196 * Return 0 on success, negative on failure 2197 **/ 2198 int e1000e_setup_tx_resources(struct e1000_ring *tx_ring) 2199 { 2200 struct e1000_adapter *adapter = tx_ring->adapter; 2201 int err = -ENOMEM, size; 2202 2203 size = sizeof(struct e1000_buffer) * tx_ring->count; 2204 tx_ring->buffer_info = vzalloc(size); 2205 if (!tx_ring->buffer_info) 2206 goto err; 2207 2208 /* round up to nearest 4K */ 2209 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc); 2210 tx_ring->size = ALIGN(tx_ring->size, 4096); 2211 2212 err = e1000_alloc_ring_dma(adapter, tx_ring); 2213 if (err) 2214 goto err; 2215 2216 tx_ring->next_to_use = 0; 2217 tx_ring->next_to_clean = 0; 2218 2219 return 0; 2220 err: 2221 vfree(tx_ring->buffer_info); 2222 e_err("Unable to allocate memory for the transmit descriptor ring\n"); 2223 return err; 2224 } 2225 2226 /** 2227 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors) 2228 * @rx_ring: Rx descriptor ring 2229 * 2230 * Returns 0 on success, negative on failure 2231 **/ 2232 int e1000e_setup_rx_resources(struct e1000_ring *rx_ring) 2233 { 2234 struct e1000_adapter *adapter = rx_ring->adapter; 2235 struct e1000_buffer *buffer_info; 2236 int i, size, desc_len, err = -ENOMEM; 2237 2238 size = sizeof(struct e1000_buffer) * rx_ring->count; 2239 rx_ring->buffer_info = vzalloc(size); 2240 if (!rx_ring->buffer_info) 2241 goto err; 2242 2243 for (i = 0; i < rx_ring->count; i++) { 2244 buffer_info = &rx_ring->buffer_info[i]; 2245 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS, 2246 sizeof(struct e1000_ps_page), 2247 GFP_KERNEL); 2248 if (!buffer_info->ps_pages) 2249 goto err_pages; 2250 } 2251 2252 desc_len = sizeof(union e1000_rx_desc_packet_split); 2253 2254 /* Round up to nearest 4K */ 2255 rx_ring->size = rx_ring->count * desc_len; 2256 rx_ring->size = ALIGN(rx_ring->size, 4096); 2257 2258 err = e1000_alloc_ring_dma(adapter, rx_ring); 2259 if (err) 2260 goto err_pages; 2261 2262 rx_ring->next_to_clean = 0; 2263 rx_ring->next_to_use = 0; 2264 rx_ring->rx_skb_top = NULL; 2265 2266 return 0; 2267 2268 err_pages: 2269 for (i = 0; i < rx_ring->count; i++) { 2270 buffer_info = &rx_ring->buffer_info[i]; 2271 kfree(buffer_info->ps_pages); 2272 } 2273 err: 2274 vfree(rx_ring->buffer_info); 2275 e_err("Unable to allocate memory for the receive descriptor ring\n"); 2276 return err; 2277 } 2278 2279 /** 2280 * e1000_clean_tx_ring - Free Tx Buffers 2281 * @tx_ring: Tx descriptor ring 2282 **/ 2283 static void e1000_clean_tx_ring(struct e1000_ring *tx_ring) 2284 { 2285 struct e1000_adapter *adapter = tx_ring->adapter; 2286 struct e1000_buffer *buffer_info; 2287 unsigned long size; 2288 unsigned int i; 2289 2290 for (i = 0; i < tx_ring->count; i++) { 2291 buffer_info = &tx_ring->buffer_info[i]; 2292 e1000_put_txbuf(tx_ring, buffer_info); 2293 } 2294 2295 netdev_reset_queue(adapter->netdev); 2296 size = sizeof(struct e1000_buffer) * tx_ring->count; 2297 memset(tx_ring->buffer_info, 0, size); 2298 2299 memset(tx_ring->desc, 0, tx_ring->size); 2300 2301 tx_ring->next_to_use = 0; 2302 tx_ring->next_to_clean = 0; 2303 2304 writel(0, tx_ring->head); 2305 if (tx_ring->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) 2306 e1000e_update_tdt_wa(tx_ring, 0); 2307 else 2308 writel(0, tx_ring->tail); 2309 } 2310 2311 /** 2312 * e1000e_free_tx_resources - Free Tx Resources per Queue 2313 * @tx_ring: Tx descriptor ring 2314 * 2315 * Free all transmit software resources 2316 **/ 2317 void e1000e_free_tx_resources(struct e1000_ring *tx_ring) 2318 { 2319 struct e1000_adapter *adapter = tx_ring->adapter; 2320 struct pci_dev *pdev = adapter->pdev; 2321 2322 e1000_clean_tx_ring(tx_ring); 2323 2324 vfree(tx_ring->buffer_info); 2325 tx_ring->buffer_info = NULL; 2326 2327 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc, 2328 tx_ring->dma); 2329 tx_ring->desc = NULL; 2330 } 2331 2332 /** 2333 * e1000e_free_rx_resources - Free Rx Resources 2334 * @rx_ring: Rx descriptor ring 2335 * 2336 * Free all receive software resources 2337 **/ 2338 void e1000e_free_rx_resources(struct e1000_ring *rx_ring) 2339 { 2340 struct e1000_adapter *adapter = rx_ring->adapter; 2341 struct pci_dev *pdev = adapter->pdev; 2342 int i; 2343 2344 e1000_clean_rx_ring(rx_ring); 2345 2346 for (i = 0; i < rx_ring->count; i++) 2347 kfree(rx_ring->buffer_info[i].ps_pages); 2348 2349 vfree(rx_ring->buffer_info); 2350 rx_ring->buffer_info = NULL; 2351 2352 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc, 2353 rx_ring->dma); 2354 rx_ring->desc = NULL; 2355 } 2356 2357 /** 2358 * e1000_update_itr - update the dynamic ITR value based on statistics 2359 * @adapter: pointer to adapter 2360 * @itr_setting: current adapter->itr 2361 * @packets: the number of packets during this measurement interval 2362 * @bytes: the number of bytes during this measurement interval 2363 * 2364 * Stores a new ITR value based on packets and byte 2365 * counts during the last interrupt. The advantage of per interrupt 2366 * computation is faster updates and more accurate ITR for the current 2367 * traffic pattern. Constants in this function were computed 2368 * based on theoretical maximum wire speed and thresholds were set based 2369 * on testing data as well as attempting to minimize response time 2370 * while increasing bulk throughput. This functionality is controlled 2371 * by the InterruptThrottleRate module parameter. 2372 **/ 2373 static unsigned int e1000_update_itr(struct e1000_adapter *adapter, 2374 u16 itr_setting, int packets, 2375 int bytes) 2376 { 2377 unsigned int retval = itr_setting; 2378 2379 if (packets == 0) 2380 return itr_setting; 2381 2382 switch (itr_setting) { 2383 case lowest_latency: 2384 /* handle TSO and jumbo frames */ 2385 if (bytes/packets > 8000) 2386 retval = bulk_latency; 2387 else if ((packets < 5) && (bytes > 512)) 2388 retval = low_latency; 2389 break; 2390 case low_latency: /* 50 usec aka 20000 ints/s */ 2391 if (bytes > 10000) { 2392 /* this if handles the TSO accounting */ 2393 if (bytes/packets > 8000) 2394 retval = bulk_latency; 2395 else if ((packets < 10) || ((bytes/packets) > 1200)) 2396 retval = bulk_latency; 2397 else if ((packets > 35)) 2398 retval = lowest_latency; 2399 } else if (bytes/packets > 2000) { 2400 retval = bulk_latency; 2401 } else if (packets <= 2 && bytes < 512) { 2402 retval = lowest_latency; 2403 } 2404 break; 2405 case bulk_latency: /* 250 usec aka 4000 ints/s */ 2406 if (bytes > 25000) { 2407 if (packets > 35) 2408 retval = low_latency; 2409 } else if (bytes < 6000) { 2410 retval = low_latency; 2411 } 2412 break; 2413 } 2414 2415 return retval; 2416 } 2417 2418 static void e1000_set_itr(struct e1000_adapter *adapter) 2419 { 2420 struct e1000_hw *hw = &adapter->hw; 2421 u16 current_itr; 2422 u32 new_itr = adapter->itr; 2423 2424 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */ 2425 if (adapter->link_speed != SPEED_1000) { 2426 current_itr = 0; 2427 new_itr = 4000; 2428 goto set_itr_now; 2429 } 2430 2431 if (adapter->flags2 & FLAG2_DISABLE_AIM) { 2432 new_itr = 0; 2433 goto set_itr_now; 2434 } 2435 2436 adapter->tx_itr = e1000_update_itr(adapter, 2437 adapter->tx_itr, 2438 adapter->total_tx_packets, 2439 adapter->total_tx_bytes); 2440 /* conservative mode (itr 3) eliminates the lowest_latency setting */ 2441 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency) 2442 adapter->tx_itr = low_latency; 2443 2444 adapter->rx_itr = e1000_update_itr(adapter, 2445 adapter->rx_itr, 2446 adapter->total_rx_packets, 2447 adapter->total_rx_bytes); 2448 /* conservative mode (itr 3) eliminates the lowest_latency setting */ 2449 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency) 2450 adapter->rx_itr = low_latency; 2451 2452 current_itr = max(adapter->rx_itr, adapter->tx_itr); 2453 2454 switch (current_itr) { 2455 /* counts and packets in update_itr are dependent on these numbers */ 2456 case lowest_latency: 2457 new_itr = 70000; 2458 break; 2459 case low_latency: 2460 new_itr = 20000; /* aka hwitr = ~200 */ 2461 break; 2462 case bulk_latency: 2463 new_itr = 4000; 2464 break; 2465 default: 2466 break; 2467 } 2468 2469 set_itr_now: 2470 if (new_itr != adapter->itr) { 2471 /* 2472 * this attempts to bias the interrupt rate towards Bulk 2473 * by adding intermediate steps when interrupt rate is 2474 * increasing 2475 */ 2476 new_itr = new_itr > adapter->itr ? 2477 min(adapter->itr + (new_itr >> 2), new_itr) : 2478 new_itr; 2479 adapter->itr = new_itr; 2480 adapter->rx_ring->itr_val = new_itr; 2481 if (adapter->msix_entries) 2482 adapter->rx_ring->set_itr = 1; 2483 else 2484 if (new_itr) 2485 ew32(ITR, 1000000000 / (new_itr * 256)); 2486 else 2487 ew32(ITR, 0); 2488 } 2489 } 2490 2491 /** 2492 * e1000_alloc_queues - Allocate memory for all rings 2493 * @adapter: board private structure to initialize 2494 **/ 2495 static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter) 2496 { 2497 int size = sizeof(struct e1000_ring); 2498 2499 adapter->tx_ring = kzalloc(size, GFP_KERNEL); 2500 if (!adapter->tx_ring) 2501 goto err; 2502 adapter->tx_ring->count = adapter->tx_ring_count; 2503 adapter->tx_ring->adapter = adapter; 2504 2505 adapter->rx_ring = kzalloc(size, GFP_KERNEL); 2506 if (!adapter->rx_ring) 2507 goto err; 2508 adapter->rx_ring->count = adapter->rx_ring_count; 2509 adapter->rx_ring->adapter = adapter; 2510 2511 return 0; 2512 err: 2513 e_err("Unable to allocate memory for queues\n"); 2514 kfree(adapter->rx_ring); 2515 kfree(adapter->tx_ring); 2516 return -ENOMEM; 2517 } 2518 2519 /** 2520 * e1000e_poll - NAPI Rx polling callback 2521 * @napi: struct associated with this polling callback 2522 * @weight: number of packets driver is allowed to process this poll 2523 **/ 2524 static int e1000e_poll(struct napi_struct *napi, int weight) 2525 { 2526 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, 2527 napi); 2528 struct e1000_hw *hw = &adapter->hw; 2529 struct net_device *poll_dev = adapter->netdev; 2530 int tx_cleaned = 1, work_done = 0; 2531 2532 adapter = netdev_priv(poll_dev); 2533 2534 if (!adapter->msix_entries || 2535 (adapter->rx_ring->ims_val & adapter->tx_ring->ims_val)) 2536 tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring); 2537 2538 adapter->clean_rx(adapter->rx_ring, &work_done, weight); 2539 2540 if (!tx_cleaned) 2541 work_done = weight; 2542 2543 /* If weight not fully consumed, exit the polling mode */ 2544 if (work_done < weight) { 2545 if (adapter->itr_setting & 3) 2546 e1000_set_itr(adapter); 2547 napi_complete(napi); 2548 if (!test_bit(__E1000_DOWN, &adapter->state)) { 2549 if (adapter->msix_entries) 2550 ew32(IMS, adapter->rx_ring->ims_val); 2551 else 2552 e1000_irq_enable(adapter); 2553 } 2554 } 2555 2556 return work_done; 2557 } 2558 2559 static int e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid) 2560 { 2561 struct e1000_adapter *adapter = netdev_priv(netdev); 2562 struct e1000_hw *hw = &adapter->hw; 2563 u32 vfta, index; 2564 2565 /* don't update vlan cookie if already programmed */ 2566 if ((adapter->hw.mng_cookie.status & 2567 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) && 2568 (vid == adapter->mng_vlan_id)) 2569 return 0; 2570 2571 /* add VID to filter table */ 2572 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2573 index = (vid >> 5) & 0x7F; 2574 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index); 2575 vfta |= (1 << (vid & 0x1F)); 2576 hw->mac.ops.write_vfta(hw, index, vfta); 2577 } 2578 2579 set_bit(vid, adapter->active_vlans); 2580 2581 return 0; 2582 } 2583 2584 static int e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid) 2585 { 2586 struct e1000_adapter *adapter = netdev_priv(netdev); 2587 struct e1000_hw *hw = &adapter->hw; 2588 u32 vfta, index; 2589 2590 if ((adapter->hw.mng_cookie.status & 2591 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) && 2592 (vid == adapter->mng_vlan_id)) { 2593 /* release control to f/w */ 2594 e1000e_release_hw_control(adapter); 2595 return 0; 2596 } 2597 2598 /* remove VID from filter table */ 2599 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2600 index = (vid >> 5) & 0x7F; 2601 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index); 2602 vfta &= ~(1 << (vid & 0x1F)); 2603 hw->mac.ops.write_vfta(hw, index, vfta); 2604 } 2605 2606 clear_bit(vid, adapter->active_vlans); 2607 2608 return 0; 2609 } 2610 2611 /** 2612 * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering 2613 * @adapter: board private structure to initialize 2614 **/ 2615 static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter) 2616 { 2617 struct net_device *netdev = adapter->netdev; 2618 struct e1000_hw *hw = &adapter->hw; 2619 u32 rctl; 2620 2621 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2622 /* disable VLAN receive filtering */ 2623 rctl = er32(RCTL); 2624 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN); 2625 ew32(RCTL, rctl); 2626 2627 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) { 2628 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); 2629 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; 2630 } 2631 } 2632 } 2633 2634 /** 2635 * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering 2636 * @adapter: board private structure to initialize 2637 **/ 2638 static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter) 2639 { 2640 struct e1000_hw *hw = &adapter->hw; 2641 u32 rctl; 2642 2643 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2644 /* enable VLAN receive filtering */ 2645 rctl = er32(RCTL); 2646 rctl |= E1000_RCTL_VFE; 2647 rctl &= ~E1000_RCTL_CFIEN; 2648 ew32(RCTL, rctl); 2649 } 2650 } 2651 2652 /** 2653 * e1000e_vlan_strip_enable - helper to disable HW VLAN stripping 2654 * @adapter: board private structure to initialize 2655 **/ 2656 static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter) 2657 { 2658 struct e1000_hw *hw = &adapter->hw; 2659 u32 ctrl; 2660 2661 /* disable VLAN tag insert/strip */ 2662 ctrl = er32(CTRL); 2663 ctrl &= ~E1000_CTRL_VME; 2664 ew32(CTRL, ctrl); 2665 } 2666 2667 /** 2668 * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping 2669 * @adapter: board private structure to initialize 2670 **/ 2671 static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter) 2672 { 2673 struct e1000_hw *hw = &adapter->hw; 2674 u32 ctrl; 2675 2676 /* enable VLAN tag insert/strip */ 2677 ctrl = er32(CTRL); 2678 ctrl |= E1000_CTRL_VME; 2679 ew32(CTRL, ctrl); 2680 } 2681 2682 static void e1000_update_mng_vlan(struct e1000_adapter *adapter) 2683 { 2684 struct net_device *netdev = adapter->netdev; 2685 u16 vid = adapter->hw.mng_cookie.vlan_id; 2686 u16 old_vid = adapter->mng_vlan_id; 2687 2688 if (adapter->hw.mng_cookie.status & 2689 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) { 2690 e1000_vlan_rx_add_vid(netdev, vid); 2691 adapter->mng_vlan_id = vid; 2692 } 2693 2694 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid)) 2695 e1000_vlan_rx_kill_vid(netdev, old_vid); 2696 } 2697 2698 static void e1000_restore_vlan(struct e1000_adapter *adapter) 2699 { 2700 u16 vid; 2701 2702 e1000_vlan_rx_add_vid(adapter->netdev, 0); 2703 2704 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID) 2705 e1000_vlan_rx_add_vid(adapter->netdev, vid); 2706 } 2707 2708 static void e1000_init_manageability_pt(struct e1000_adapter *adapter) 2709 { 2710 struct e1000_hw *hw = &adapter->hw; 2711 u32 manc, manc2h, mdef, i, j; 2712 2713 if (!(adapter->flags & FLAG_MNG_PT_ENABLED)) 2714 return; 2715 2716 manc = er32(MANC); 2717 2718 /* 2719 * enable receiving management packets to the host. this will probably 2720 * generate destination unreachable messages from the host OS, but 2721 * the packets will be handled on SMBUS 2722 */ 2723 manc |= E1000_MANC_EN_MNG2HOST; 2724 manc2h = er32(MANC2H); 2725 2726 switch (hw->mac.type) { 2727 default: 2728 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664); 2729 break; 2730 case e1000_82574: 2731 case e1000_82583: 2732 /* 2733 * Check if IPMI pass-through decision filter already exists; 2734 * if so, enable it. 2735 */ 2736 for (i = 0, j = 0; i < 8; i++) { 2737 mdef = er32(MDEF(i)); 2738 2739 /* Ignore filters with anything other than IPMI ports */ 2740 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664)) 2741 continue; 2742 2743 /* Enable this decision filter in MANC2H */ 2744 if (mdef) 2745 manc2h |= (1 << i); 2746 2747 j |= mdef; 2748 } 2749 2750 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664)) 2751 break; 2752 2753 /* Create new decision filter in an empty filter */ 2754 for (i = 0, j = 0; i < 8; i++) 2755 if (er32(MDEF(i)) == 0) { 2756 ew32(MDEF(i), (E1000_MDEF_PORT_623 | 2757 E1000_MDEF_PORT_664)); 2758 manc2h |= (1 << 1); 2759 j++; 2760 break; 2761 } 2762 2763 if (!j) 2764 e_warn("Unable to create IPMI pass-through filter\n"); 2765 break; 2766 } 2767 2768 ew32(MANC2H, manc2h); 2769 ew32(MANC, manc); 2770 } 2771 2772 /** 2773 * e1000_configure_tx - Configure Transmit Unit after Reset 2774 * @adapter: board private structure 2775 * 2776 * Configure the Tx unit of the MAC after a reset. 2777 **/ 2778 static void e1000_configure_tx(struct e1000_adapter *adapter) 2779 { 2780 struct e1000_hw *hw = &adapter->hw; 2781 struct e1000_ring *tx_ring = adapter->tx_ring; 2782 u64 tdba; 2783 u32 tdlen, tarc; 2784 2785 /* Setup the HW Tx Head and Tail descriptor pointers */ 2786 tdba = tx_ring->dma; 2787 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc); 2788 ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32))); 2789 ew32(TDBAH(0), (tdba >> 32)); 2790 ew32(TDLEN(0), tdlen); 2791 ew32(TDH(0), 0); 2792 ew32(TDT(0), 0); 2793 tx_ring->head = adapter->hw.hw_addr + E1000_TDH(0); 2794 tx_ring->tail = adapter->hw.hw_addr + E1000_TDT(0); 2795 2796 /* Set the Tx Interrupt Delay register */ 2797 ew32(TIDV, adapter->tx_int_delay); 2798 /* Tx irq moderation */ 2799 ew32(TADV, adapter->tx_abs_int_delay); 2800 2801 if (adapter->flags2 & FLAG2_DMA_BURST) { 2802 u32 txdctl = er32(TXDCTL(0)); 2803 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH | 2804 E1000_TXDCTL_WTHRESH); 2805 /* 2806 * set up some performance related parameters to encourage the 2807 * hardware to use the bus more efficiently in bursts, depends 2808 * on the tx_int_delay to be enabled, 2809 * wthresh = 5 ==> burst write a cacheline (64 bytes) at a time 2810 * hthresh = 1 ==> prefetch when one or more available 2811 * pthresh = 0x1f ==> prefetch if internal cache 31 or less 2812 * BEWARE: this seems to work but should be considered first if 2813 * there are Tx hangs or other Tx related bugs 2814 */ 2815 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE; 2816 ew32(TXDCTL(0), txdctl); 2817 } 2818 /* erratum work around: set txdctl the same for both queues */ 2819 ew32(TXDCTL(1), er32(TXDCTL(0))); 2820 2821 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) { 2822 tarc = er32(TARC(0)); 2823 /* 2824 * set the speed mode bit, we'll clear it if we're not at 2825 * gigabit link later 2826 */ 2827 #define SPEED_MODE_BIT (1 << 21) 2828 tarc |= SPEED_MODE_BIT; 2829 ew32(TARC(0), tarc); 2830 } 2831 2832 /* errata: program both queues to unweighted RR */ 2833 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) { 2834 tarc = er32(TARC(0)); 2835 tarc |= 1; 2836 ew32(TARC(0), tarc); 2837 tarc = er32(TARC(1)); 2838 tarc |= 1; 2839 ew32(TARC(1), tarc); 2840 } 2841 2842 /* Setup Transmit Descriptor Settings for eop descriptor */ 2843 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS; 2844 2845 /* only set IDE if we are delaying interrupts using the timers */ 2846 if (adapter->tx_int_delay) 2847 adapter->txd_cmd |= E1000_TXD_CMD_IDE; 2848 2849 /* enable Report Status bit */ 2850 adapter->txd_cmd |= E1000_TXD_CMD_RS; 2851 2852 hw->mac.ops.config_collision_dist(hw); 2853 } 2854 2855 /** 2856 * e1000_setup_rctl - configure the receive control registers 2857 * @adapter: Board private structure 2858 **/ 2859 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \ 2860 (((S) & (PAGE_SIZE - 1)) ? 1 : 0)) 2861 static void e1000_setup_rctl(struct e1000_adapter *adapter) 2862 { 2863 struct e1000_hw *hw = &adapter->hw; 2864 u32 rctl, rfctl; 2865 u32 pages = 0; 2866 2867 /* Workaround Si errata on PCHx - configure jumbo frame flow */ 2868 if (hw->mac.type >= e1000_pch2lan) { 2869 s32 ret_val; 2870 2871 if (adapter->netdev->mtu > ETH_DATA_LEN) 2872 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true); 2873 else 2874 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false); 2875 2876 if (ret_val) 2877 e_dbg("failed to enable jumbo frame workaround mode\n"); 2878 } 2879 2880 /* Program MC offset vector base */ 2881 rctl = er32(RCTL); 2882 rctl &= ~(3 << E1000_RCTL_MO_SHIFT); 2883 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | 2884 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF | 2885 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT); 2886 2887 /* Do not Store bad packets */ 2888 rctl &= ~E1000_RCTL_SBP; 2889 2890 /* Enable Long Packet receive */ 2891 if (adapter->netdev->mtu <= ETH_DATA_LEN) 2892 rctl &= ~E1000_RCTL_LPE; 2893 else 2894 rctl |= E1000_RCTL_LPE; 2895 2896 /* Some systems expect that the CRC is included in SMBUS traffic. The 2897 * hardware strips the CRC before sending to both SMBUS (BMC) and to 2898 * host memory when this is enabled 2899 */ 2900 if (adapter->flags2 & FLAG2_CRC_STRIPPING) 2901 rctl |= E1000_RCTL_SECRC; 2902 2903 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */ 2904 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) { 2905 u16 phy_data; 2906 2907 e1e_rphy(hw, PHY_REG(770, 26), &phy_data); 2908 phy_data &= 0xfff8; 2909 phy_data |= (1 << 2); 2910 e1e_wphy(hw, PHY_REG(770, 26), phy_data); 2911 2912 e1e_rphy(hw, 22, &phy_data); 2913 phy_data &= 0x0fff; 2914 phy_data |= (1 << 14); 2915 e1e_wphy(hw, 0x10, 0x2823); 2916 e1e_wphy(hw, 0x11, 0x0003); 2917 e1e_wphy(hw, 22, phy_data); 2918 } 2919 2920 /* Setup buffer sizes */ 2921 rctl &= ~E1000_RCTL_SZ_4096; 2922 rctl |= E1000_RCTL_BSEX; 2923 switch (adapter->rx_buffer_len) { 2924 case 2048: 2925 default: 2926 rctl |= E1000_RCTL_SZ_2048; 2927 rctl &= ~E1000_RCTL_BSEX; 2928 break; 2929 case 4096: 2930 rctl |= E1000_RCTL_SZ_4096; 2931 break; 2932 case 8192: 2933 rctl |= E1000_RCTL_SZ_8192; 2934 break; 2935 case 16384: 2936 rctl |= E1000_RCTL_SZ_16384; 2937 break; 2938 } 2939 2940 /* Enable Extended Status in all Receive Descriptors */ 2941 rfctl = er32(RFCTL); 2942 rfctl |= E1000_RFCTL_EXTEN; 2943 ew32(RFCTL, rfctl); 2944 2945 /* 2946 * 82571 and greater support packet-split where the protocol 2947 * header is placed in skb->data and the packet data is 2948 * placed in pages hanging off of skb_shinfo(skb)->nr_frags. 2949 * In the case of a non-split, skb->data is linearly filled, 2950 * followed by the page buffers. Therefore, skb->data is 2951 * sized to hold the largest protocol header. 2952 * 2953 * allocations using alloc_page take too long for regular MTU 2954 * so only enable packet split for jumbo frames 2955 * 2956 * Using pages when the page size is greater than 16k wastes 2957 * a lot of memory, since we allocate 3 pages at all times 2958 * per packet. 2959 */ 2960 pages = PAGE_USE_COUNT(adapter->netdev->mtu); 2961 if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE)) 2962 adapter->rx_ps_pages = pages; 2963 else 2964 adapter->rx_ps_pages = 0; 2965 2966 if (adapter->rx_ps_pages) { 2967 u32 psrctl = 0; 2968 2969 /* Enable Packet split descriptors */ 2970 rctl |= E1000_RCTL_DTYP_PS; 2971 2972 psrctl |= adapter->rx_ps_bsize0 >> 2973 E1000_PSRCTL_BSIZE0_SHIFT; 2974 2975 switch (adapter->rx_ps_pages) { 2976 case 3: 2977 psrctl |= PAGE_SIZE << 2978 E1000_PSRCTL_BSIZE3_SHIFT; 2979 case 2: 2980 psrctl |= PAGE_SIZE << 2981 E1000_PSRCTL_BSIZE2_SHIFT; 2982 case 1: 2983 psrctl |= PAGE_SIZE >> 2984 E1000_PSRCTL_BSIZE1_SHIFT; 2985 break; 2986 } 2987 2988 ew32(PSRCTL, psrctl); 2989 } 2990 2991 /* This is useful for sniffing bad packets. */ 2992 if (adapter->netdev->features & NETIF_F_RXALL) { 2993 /* UPE and MPE will be handled by normal PROMISC logic 2994 * in e1000e_set_rx_mode */ 2995 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */ 2996 E1000_RCTL_BAM | /* RX All Bcast Pkts */ 2997 E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */ 2998 2999 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */ 3000 E1000_RCTL_DPF | /* Allow filtered pause */ 3001 E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */ 3002 /* Do not mess with E1000_CTRL_VME, it affects transmit as well, 3003 * and that breaks VLANs. 3004 */ 3005 } 3006 3007 ew32(RCTL, rctl); 3008 /* just started the receive unit, no need to restart */ 3009 adapter->flags &= ~FLAG_RX_RESTART_NOW; 3010 } 3011 3012 /** 3013 * e1000_configure_rx - Configure Receive Unit after Reset 3014 * @adapter: board private structure 3015 * 3016 * Configure the Rx unit of the MAC after a reset. 3017 **/ 3018 static void e1000_configure_rx(struct e1000_adapter *adapter) 3019 { 3020 struct e1000_hw *hw = &adapter->hw; 3021 struct e1000_ring *rx_ring = adapter->rx_ring; 3022 u64 rdba; 3023 u32 rdlen, rctl, rxcsum, ctrl_ext; 3024 3025 if (adapter->rx_ps_pages) { 3026 /* this is a 32 byte descriptor */ 3027 rdlen = rx_ring->count * 3028 sizeof(union e1000_rx_desc_packet_split); 3029 adapter->clean_rx = e1000_clean_rx_irq_ps; 3030 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps; 3031 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) { 3032 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended); 3033 adapter->clean_rx = e1000_clean_jumbo_rx_irq; 3034 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers; 3035 } else { 3036 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended); 3037 adapter->clean_rx = e1000_clean_rx_irq; 3038 adapter->alloc_rx_buf = e1000_alloc_rx_buffers; 3039 } 3040 3041 /* disable receives while setting up the descriptors */ 3042 rctl = er32(RCTL); 3043 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX)) 3044 ew32(RCTL, rctl & ~E1000_RCTL_EN); 3045 e1e_flush(); 3046 usleep_range(10000, 20000); 3047 3048 if (adapter->flags2 & FLAG2_DMA_BURST) { 3049 /* 3050 * set the writeback threshold (only takes effect if the RDTR 3051 * is set). set GRAN=1 and write back up to 0x4 worth, and 3052 * enable prefetching of 0x20 Rx descriptors 3053 * granularity = 01 3054 * wthresh = 04, 3055 * hthresh = 04, 3056 * pthresh = 0x20 3057 */ 3058 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE); 3059 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE); 3060 3061 /* 3062 * override the delay timers for enabling bursting, only if 3063 * the value was not set by the user via module options 3064 */ 3065 if (adapter->rx_int_delay == DEFAULT_RDTR) 3066 adapter->rx_int_delay = BURST_RDTR; 3067 if (adapter->rx_abs_int_delay == DEFAULT_RADV) 3068 adapter->rx_abs_int_delay = BURST_RADV; 3069 } 3070 3071 /* set the Receive Delay Timer Register */ 3072 ew32(RDTR, adapter->rx_int_delay); 3073 3074 /* irq moderation */ 3075 ew32(RADV, adapter->rx_abs_int_delay); 3076 if ((adapter->itr_setting != 0) && (adapter->itr != 0)) 3077 ew32(ITR, 1000000000 / (adapter->itr * 256)); 3078 3079 ctrl_ext = er32(CTRL_EXT); 3080 /* Auto-Mask interrupts upon ICR access */ 3081 ctrl_ext |= E1000_CTRL_EXT_IAME; 3082 ew32(IAM, 0xffffffff); 3083 ew32(CTRL_EXT, ctrl_ext); 3084 e1e_flush(); 3085 3086 /* 3087 * Setup the HW Rx Head and Tail Descriptor Pointers and 3088 * the Base and Length of the Rx Descriptor Ring 3089 */ 3090 rdba = rx_ring->dma; 3091 ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32))); 3092 ew32(RDBAH(0), (rdba >> 32)); 3093 ew32(RDLEN(0), rdlen); 3094 ew32(RDH(0), 0); 3095 ew32(RDT(0), 0); 3096 rx_ring->head = adapter->hw.hw_addr + E1000_RDH(0); 3097 rx_ring->tail = adapter->hw.hw_addr + E1000_RDT(0); 3098 3099 /* Enable Receive Checksum Offload for TCP and UDP */ 3100 rxcsum = er32(RXCSUM); 3101 if (adapter->netdev->features & NETIF_F_RXCSUM) { 3102 rxcsum |= E1000_RXCSUM_TUOFL; 3103 3104 /* 3105 * IPv4 payload checksum for UDP fragments must be 3106 * used in conjunction with packet-split. 3107 */ 3108 if (adapter->rx_ps_pages) 3109 rxcsum |= E1000_RXCSUM_IPPCSE; 3110 } else { 3111 rxcsum &= ~E1000_RXCSUM_TUOFL; 3112 /* no need to clear IPPCSE as it defaults to 0 */ 3113 } 3114 ew32(RXCSUM, rxcsum); 3115 3116 if (adapter->hw.mac.type == e1000_pch2lan) { 3117 /* 3118 * With jumbo frames, excessive C-state transition 3119 * latencies result in dropped transactions. 3120 */ 3121 if (adapter->netdev->mtu > ETH_DATA_LEN) { 3122 u32 rxdctl = er32(RXDCTL(0)); 3123 ew32(RXDCTL(0), rxdctl | 0x3); 3124 pm_qos_update_request(&adapter->netdev->pm_qos_req, 55); 3125 } else { 3126 pm_qos_update_request(&adapter->netdev->pm_qos_req, 3127 PM_QOS_DEFAULT_VALUE); 3128 } 3129 } 3130 3131 /* Enable Receives */ 3132 ew32(RCTL, rctl); 3133 } 3134 3135 /** 3136 * e1000e_write_mc_addr_list - write multicast addresses to MTA 3137 * @netdev: network interface device structure 3138 * 3139 * Writes multicast address list to the MTA hash table. 3140 * Returns: -ENOMEM on failure 3141 * 0 on no addresses written 3142 * X on writing X addresses to MTA 3143 */ 3144 static int e1000e_write_mc_addr_list(struct net_device *netdev) 3145 { 3146 struct e1000_adapter *adapter = netdev_priv(netdev); 3147 struct e1000_hw *hw = &adapter->hw; 3148 struct netdev_hw_addr *ha; 3149 u8 *mta_list; 3150 int i; 3151 3152 if (netdev_mc_empty(netdev)) { 3153 /* nothing to program, so clear mc list */ 3154 hw->mac.ops.update_mc_addr_list(hw, NULL, 0); 3155 return 0; 3156 } 3157 3158 mta_list = kzalloc(netdev_mc_count(netdev) * ETH_ALEN, GFP_ATOMIC); 3159 if (!mta_list) 3160 return -ENOMEM; 3161 3162 /* update_mc_addr_list expects a packed array of only addresses. */ 3163 i = 0; 3164 netdev_for_each_mc_addr(ha, netdev) 3165 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN); 3166 3167 hw->mac.ops.update_mc_addr_list(hw, mta_list, i); 3168 kfree(mta_list); 3169 3170 return netdev_mc_count(netdev); 3171 } 3172 3173 /** 3174 * e1000e_write_uc_addr_list - write unicast addresses to RAR table 3175 * @netdev: network interface device structure 3176 * 3177 * Writes unicast address list to the RAR table. 3178 * Returns: -ENOMEM on failure/insufficient address space 3179 * 0 on no addresses written 3180 * X on writing X addresses to the RAR table 3181 **/ 3182 static int e1000e_write_uc_addr_list(struct net_device *netdev) 3183 { 3184 struct e1000_adapter *adapter = netdev_priv(netdev); 3185 struct e1000_hw *hw = &adapter->hw; 3186 unsigned int rar_entries = hw->mac.rar_entry_count; 3187 int count = 0; 3188 3189 /* save a rar entry for our hardware address */ 3190 rar_entries--; 3191 3192 /* save a rar entry for the LAA workaround */ 3193 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) 3194 rar_entries--; 3195 3196 /* return ENOMEM indicating insufficient memory for addresses */ 3197 if (netdev_uc_count(netdev) > rar_entries) 3198 return -ENOMEM; 3199 3200 if (!netdev_uc_empty(netdev) && rar_entries) { 3201 struct netdev_hw_addr *ha; 3202 3203 /* 3204 * write the addresses in reverse order to avoid write 3205 * combining 3206 */ 3207 netdev_for_each_uc_addr(ha, netdev) { 3208 if (!rar_entries) 3209 break; 3210 hw->mac.ops.rar_set(hw, ha->addr, rar_entries--); 3211 count++; 3212 } 3213 } 3214 3215 /* zero out the remaining RAR entries not used above */ 3216 for (; rar_entries > 0; rar_entries--) { 3217 ew32(RAH(rar_entries), 0); 3218 ew32(RAL(rar_entries), 0); 3219 } 3220 e1e_flush(); 3221 3222 return count; 3223 } 3224 3225 /** 3226 * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set 3227 * @netdev: network interface device structure 3228 * 3229 * The ndo_set_rx_mode entry point is called whenever the unicast or multicast 3230 * address list or the network interface flags are updated. This routine is 3231 * responsible for configuring the hardware for proper unicast, multicast, 3232 * promiscuous mode, and all-multi behavior. 3233 **/ 3234 static void e1000e_set_rx_mode(struct net_device *netdev) 3235 { 3236 struct e1000_adapter *adapter = netdev_priv(netdev); 3237 struct e1000_hw *hw = &adapter->hw; 3238 u32 rctl; 3239 3240 /* Check for Promiscuous and All Multicast modes */ 3241 rctl = er32(RCTL); 3242 3243 /* clear the affected bits */ 3244 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE); 3245 3246 if (netdev->flags & IFF_PROMISC) { 3247 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); 3248 /* Do not hardware filter VLANs in promisc mode */ 3249 e1000e_vlan_filter_disable(adapter); 3250 } else { 3251 int count; 3252 3253 if (netdev->flags & IFF_ALLMULTI) { 3254 rctl |= E1000_RCTL_MPE; 3255 } else { 3256 /* 3257 * Write addresses to the MTA, if the attempt fails 3258 * then we should just turn on promiscuous mode so 3259 * that we can at least receive multicast traffic 3260 */ 3261 count = e1000e_write_mc_addr_list(netdev); 3262 if (count < 0) 3263 rctl |= E1000_RCTL_MPE; 3264 } 3265 e1000e_vlan_filter_enable(adapter); 3266 /* 3267 * Write addresses to available RAR registers, if there is not 3268 * sufficient space to store all the addresses then enable 3269 * unicast promiscuous mode 3270 */ 3271 count = e1000e_write_uc_addr_list(netdev); 3272 if (count < 0) 3273 rctl |= E1000_RCTL_UPE; 3274 } 3275 3276 ew32(RCTL, rctl); 3277 3278 if (netdev->features & NETIF_F_HW_VLAN_RX) 3279 e1000e_vlan_strip_enable(adapter); 3280 else 3281 e1000e_vlan_strip_disable(adapter); 3282 } 3283 3284 static void e1000e_setup_rss_hash(struct e1000_adapter *adapter) 3285 { 3286 struct e1000_hw *hw = &adapter->hw; 3287 u32 mrqc, rxcsum; 3288 int i; 3289 static const u32 rsskey[10] = { 3290 0xda565a6d, 0xc20e5b25, 0x3d256741, 0xb08fa343, 0xcb2bcad0, 3291 0xb4307bae, 0xa32dcb77, 0x0cf23080, 0x3bb7426a, 0xfa01acbe 3292 }; 3293 3294 /* Fill out hash function seed */ 3295 for (i = 0; i < 10; i++) 3296 ew32(RSSRK(i), rsskey[i]); 3297 3298 /* Direct all traffic to queue 0 */ 3299 for (i = 0; i < 32; i++) 3300 ew32(RETA(i), 0); 3301 3302 /* 3303 * Disable raw packet checksumming so that RSS hash is placed in 3304 * descriptor on writeback. 3305 */ 3306 rxcsum = er32(RXCSUM); 3307 rxcsum |= E1000_RXCSUM_PCSD; 3308 3309 ew32(RXCSUM, rxcsum); 3310 3311 mrqc = (E1000_MRQC_RSS_FIELD_IPV4 | 3312 E1000_MRQC_RSS_FIELD_IPV4_TCP | 3313 E1000_MRQC_RSS_FIELD_IPV6 | 3314 E1000_MRQC_RSS_FIELD_IPV6_TCP | 3315 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX); 3316 3317 ew32(MRQC, mrqc); 3318 } 3319 3320 /** 3321 * e1000_configure - configure the hardware for Rx and Tx 3322 * @adapter: private board structure 3323 **/ 3324 static void e1000_configure(struct e1000_adapter *adapter) 3325 { 3326 struct e1000_ring *rx_ring = adapter->rx_ring; 3327 3328 e1000e_set_rx_mode(adapter->netdev); 3329 3330 e1000_restore_vlan(adapter); 3331 e1000_init_manageability_pt(adapter); 3332 3333 e1000_configure_tx(adapter); 3334 3335 if (adapter->netdev->features & NETIF_F_RXHASH) 3336 e1000e_setup_rss_hash(adapter); 3337 e1000_setup_rctl(adapter); 3338 e1000_configure_rx(adapter); 3339 adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL); 3340 } 3341 3342 /** 3343 * e1000e_power_up_phy - restore link in case the phy was powered down 3344 * @adapter: address of board private structure 3345 * 3346 * The phy may be powered down to save power and turn off link when the 3347 * driver is unloaded and wake on lan is not enabled (among others) 3348 * *** this routine MUST be followed by a call to e1000e_reset *** 3349 **/ 3350 void e1000e_power_up_phy(struct e1000_adapter *adapter) 3351 { 3352 if (adapter->hw.phy.ops.power_up) 3353 adapter->hw.phy.ops.power_up(&adapter->hw); 3354 3355 adapter->hw.mac.ops.setup_link(&adapter->hw); 3356 } 3357 3358 /** 3359 * e1000_power_down_phy - Power down the PHY 3360 * 3361 * Power down the PHY so no link is implied when interface is down. 3362 * The PHY cannot be powered down if management or WoL is active. 3363 */ 3364 static void e1000_power_down_phy(struct e1000_adapter *adapter) 3365 { 3366 /* WoL is enabled */ 3367 if (adapter->wol) 3368 return; 3369 3370 if (adapter->hw.phy.ops.power_down) 3371 adapter->hw.phy.ops.power_down(&adapter->hw); 3372 } 3373 3374 /** 3375 * e1000e_reset - bring the hardware into a known good state 3376 * 3377 * This function boots the hardware and enables some settings that 3378 * require a configuration cycle of the hardware - those cannot be 3379 * set/changed during runtime. After reset the device needs to be 3380 * properly configured for Rx, Tx etc. 3381 */ 3382 void e1000e_reset(struct e1000_adapter *adapter) 3383 { 3384 struct e1000_mac_info *mac = &adapter->hw.mac; 3385 struct e1000_fc_info *fc = &adapter->hw.fc; 3386 struct e1000_hw *hw = &adapter->hw; 3387 u32 tx_space, min_tx_space, min_rx_space; 3388 u32 pba = adapter->pba; 3389 u16 hwm; 3390 3391 /* reset Packet Buffer Allocation to default */ 3392 ew32(PBA, pba); 3393 3394 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) { 3395 /* 3396 * To maintain wire speed transmits, the Tx FIFO should be 3397 * large enough to accommodate two full transmit packets, 3398 * rounded up to the next 1KB and expressed in KB. Likewise, 3399 * the Rx FIFO should be large enough to accommodate at least 3400 * one full receive packet and is similarly rounded up and 3401 * expressed in KB. 3402 */ 3403 pba = er32(PBA); 3404 /* upper 16 bits has Tx packet buffer allocation size in KB */ 3405 tx_space = pba >> 16; 3406 /* lower 16 bits has Rx packet buffer allocation size in KB */ 3407 pba &= 0xffff; 3408 /* 3409 * the Tx fifo also stores 16 bytes of information about the Tx 3410 * but don't include ethernet FCS because hardware appends it 3411 */ 3412 min_tx_space = (adapter->max_frame_size + 3413 sizeof(struct e1000_tx_desc) - 3414 ETH_FCS_LEN) * 2; 3415 min_tx_space = ALIGN(min_tx_space, 1024); 3416 min_tx_space >>= 10; 3417 /* software strips receive CRC, so leave room for it */ 3418 min_rx_space = adapter->max_frame_size; 3419 min_rx_space = ALIGN(min_rx_space, 1024); 3420 min_rx_space >>= 10; 3421 3422 /* 3423 * If current Tx allocation is less than the min Tx FIFO size, 3424 * and the min Tx FIFO size is less than the current Rx FIFO 3425 * allocation, take space away from current Rx allocation 3426 */ 3427 if ((tx_space < min_tx_space) && 3428 ((min_tx_space - tx_space) < pba)) { 3429 pba -= min_tx_space - tx_space; 3430 3431 /* 3432 * if short on Rx space, Rx wins and must trump Tx 3433 * adjustment or use Early Receive if available 3434 */ 3435 if (pba < min_rx_space) 3436 pba = min_rx_space; 3437 } 3438 3439 ew32(PBA, pba); 3440 } 3441 3442 /* 3443 * flow control settings 3444 * 3445 * The high water mark must be low enough to fit one full frame 3446 * (or the size used for early receive) above it in the Rx FIFO. 3447 * Set it to the lower of: 3448 * - 90% of the Rx FIFO size, and 3449 * - the full Rx FIFO size minus one full frame 3450 */ 3451 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME) 3452 fc->pause_time = 0xFFFF; 3453 else 3454 fc->pause_time = E1000_FC_PAUSE_TIME; 3455 fc->send_xon = true; 3456 fc->current_mode = fc->requested_mode; 3457 3458 switch (hw->mac.type) { 3459 case e1000_ich9lan: 3460 case e1000_ich10lan: 3461 if (adapter->netdev->mtu > ETH_DATA_LEN) { 3462 pba = 14; 3463 ew32(PBA, pba); 3464 fc->high_water = 0x2800; 3465 fc->low_water = fc->high_water - 8; 3466 break; 3467 } 3468 /* fall-through */ 3469 default: 3470 hwm = min(((pba << 10) * 9 / 10), 3471 ((pba << 10) - adapter->max_frame_size)); 3472 3473 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */ 3474 fc->low_water = fc->high_water - 8; 3475 break; 3476 case e1000_pchlan: 3477 /* 3478 * Workaround PCH LOM adapter hangs with certain network 3479 * loads. If hangs persist, try disabling Tx flow control. 3480 */ 3481 if (adapter->netdev->mtu > ETH_DATA_LEN) { 3482 fc->high_water = 0x3500; 3483 fc->low_water = 0x1500; 3484 } else { 3485 fc->high_water = 0x5000; 3486 fc->low_water = 0x3000; 3487 } 3488 fc->refresh_time = 0x1000; 3489 break; 3490 case e1000_pch2lan: 3491 case e1000_pch_lpt: 3492 fc->high_water = 0x05C20; 3493 fc->low_water = 0x05048; 3494 fc->pause_time = 0x0650; 3495 fc->refresh_time = 0x0400; 3496 if (adapter->netdev->mtu > ETH_DATA_LEN) { 3497 pba = 14; 3498 ew32(PBA, pba); 3499 } 3500 break; 3501 } 3502 3503 /* 3504 * Disable Adaptive Interrupt Moderation if 2 full packets cannot 3505 * fit in receive buffer. 3506 */ 3507 if (adapter->itr_setting & 0x3) { 3508 if ((adapter->max_frame_size * 2) > (pba << 10)) { 3509 if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) { 3510 dev_info(&adapter->pdev->dev, 3511 "Interrupt Throttle Rate turned off\n"); 3512 adapter->flags2 |= FLAG2_DISABLE_AIM; 3513 ew32(ITR, 0); 3514 } 3515 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) { 3516 dev_info(&adapter->pdev->dev, 3517 "Interrupt Throttle Rate turned on\n"); 3518 adapter->flags2 &= ~FLAG2_DISABLE_AIM; 3519 adapter->itr = 20000; 3520 ew32(ITR, 1000000000 / (adapter->itr * 256)); 3521 } 3522 } 3523 3524 /* Allow time for pending master requests to run */ 3525 mac->ops.reset_hw(hw); 3526 3527 /* 3528 * For parts with AMT enabled, let the firmware know 3529 * that the network interface is in control 3530 */ 3531 if (adapter->flags & FLAG_HAS_AMT) 3532 e1000e_get_hw_control(adapter); 3533 3534 ew32(WUC, 0); 3535 3536 if (mac->ops.init_hw(hw)) 3537 e_err("Hardware Error\n"); 3538 3539 e1000_update_mng_vlan(adapter); 3540 3541 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */ 3542 ew32(VET, ETH_P_8021Q); 3543 3544 e1000e_reset_adaptive(hw); 3545 3546 if (!netif_running(adapter->netdev) && 3547 !test_bit(__E1000_TESTING, &adapter->state)) { 3548 e1000_power_down_phy(adapter); 3549 return; 3550 } 3551 3552 e1000_get_phy_info(hw); 3553 3554 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) && 3555 !(adapter->flags & FLAG_SMART_POWER_DOWN)) { 3556 u16 phy_data = 0; 3557 /* 3558 * speed up time to link by disabling smart power down, ignore 3559 * the return value of this function because there is nothing 3560 * different we would do if it failed 3561 */ 3562 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data); 3563 phy_data &= ~IGP02E1000_PM_SPD; 3564 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data); 3565 } 3566 } 3567 3568 int e1000e_up(struct e1000_adapter *adapter) 3569 { 3570 struct e1000_hw *hw = &adapter->hw; 3571 3572 /* hardware has been reset, we need to reload some things */ 3573 e1000_configure(adapter); 3574 3575 clear_bit(__E1000_DOWN, &adapter->state); 3576 3577 if (adapter->msix_entries) 3578 e1000_configure_msix(adapter); 3579 e1000_irq_enable(adapter); 3580 3581 netif_start_queue(adapter->netdev); 3582 3583 /* fire a link change interrupt to start the watchdog */ 3584 if (adapter->msix_entries) 3585 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER); 3586 else 3587 ew32(ICS, E1000_ICS_LSC); 3588 3589 return 0; 3590 } 3591 3592 static void e1000e_flush_descriptors(struct e1000_adapter *adapter) 3593 { 3594 struct e1000_hw *hw = &adapter->hw; 3595 3596 if (!(adapter->flags2 & FLAG2_DMA_BURST)) 3597 return; 3598 3599 /* flush pending descriptor writebacks to memory */ 3600 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); 3601 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD); 3602 3603 /* execute the writes immediately */ 3604 e1e_flush(); 3605 3606 /* 3607 * due to rare timing issues, write to TIDV/RDTR again to ensure the 3608 * write is successful 3609 */ 3610 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); 3611 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD); 3612 3613 /* execute the writes immediately */ 3614 e1e_flush(); 3615 } 3616 3617 static void e1000e_update_stats(struct e1000_adapter *adapter); 3618 3619 void e1000e_down(struct e1000_adapter *adapter) 3620 { 3621 struct net_device *netdev = adapter->netdev; 3622 struct e1000_hw *hw = &adapter->hw; 3623 u32 tctl, rctl; 3624 3625 /* 3626 * signal that we're down so the interrupt handler does not 3627 * reschedule our watchdog timer 3628 */ 3629 set_bit(__E1000_DOWN, &adapter->state); 3630 3631 /* disable receives in the hardware */ 3632 rctl = er32(RCTL); 3633 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX)) 3634 ew32(RCTL, rctl & ~E1000_RCTL_EN); 3635 /* flush and sleep below */ 3636 3637 netif_stop_queue(netdev); 3638 3639 /* disable transmits in the hardware */ 3640 tctl = er32(TCTL); 3641 tctl &= ~E1000_TCTL_EN; 3642 ew32(TCTL, tctl); 3643 3644 /* flush both disables and wait for them to finish */ 3645 e1e_flush(); 3646 usleep_range(10000, 20000); 3647 3648 e1000_irq_disable(adapter); 3649 3650 del_timer_sync(&adapter->watchdog_timer); 3651 del_timer_sync(&adapter->phy_info_timer); 3652 3653 netif_carrier_off(netdev); 3654 3655 spin_lock(&adapter->stats64_lock); 3656 e1000e_update_stats(adapter); 3657 spin_unlock(&adapter->stats64_lock); 3658 3659 e1000e_flush_descriptors(adapter); 3660 e1000_clean_tx_ring(adapter->tx_ring); 3661 e1000_clean_rx_ring(adapter->rx_ring); 3662 3663 adapter->link_speed = 0; 3664 adapter->link_duplex = 0; 3665 3666 if (!pci_channel_offline(adapter->pdev)) 3667 e1000e_reset(adapter); 3668 3669 /* 3670 * TODO: for power management, we could drop the link and 3671 * pci_disable_device here. 3672 */ 3673 } 3674 3675 void e1000e_reinit_locked(struct e1000_adapter *adapter) 3676 { 3677 might_sleep(); 3678 while (test_and_set_bit(__E1000_RESETTING, &adapter->state)) 3679 usleep_range(1000, 2000); 3680 e1000e_down(adapter); 3681 e1000e_up(adapter); 3682 clear_bit(__E1000_RESETTING, &adapter->state); 3683 } 3684 3685 /** 3686 * e1000_sw_init - Initialize general software structures (struct e1000_adapter) 3687 * @adapter: board private structure to initialize 3688 * 3689 * e1000_sw_init initializes the Adapter private data structure. 3690 * Fields are initialized based on PCI device information and 3691 * OS network device settings (MTU size). 3692 **/ 3693 static int __devinit e1000_sw_init(struct e1000_adapter *adapter) 3694 { 3695 struct net_device *netdev = adapter->netdev; 3696 3697 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN; 3698 adapter->rx_ps_bsize0 = 128; 3699 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; 3700 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN; 3701 adapter->tx_ring_count = E1000_DEFAULT_TXD; 3702 adapter->rx_ring_count = E1000_DEFAULT_RXD; 3703 3704 spin_lock_init(&adapter->stats64_lock); 3705 3706 e1000e_set_interrupt_capability(adapter); 3707 3708 if (e1000_alloc_queues(adapter)) 3709 return -ENOMEM; 3710 3711 /* Explicitly disable IRQ since the NIC can be in any state. */ 3712 e1000_irq_disable(adapter); 3713 3714 set_bit(__E1000_DOWN, &adapter->state); 3715 return 0; 3716 } 3717 3718 /** 3719 * e1000_intr_msi_test - Interrupt Handler 3720 * @irq: interrupt number 3721 * @data: pointer to a network interface device structure 3722 **/ 3723 static irqreturn_t e1000_intr_msi_test(int irq, void *data) 3724 { 3725 struct net_device *netdev = data; 3726 struct e1000_adapter *adapter = netdev_priv(netdev); 3727 struct e1000_hw *hw = &adapter->hw; 3728 u32 icr = er32(ICR); 3729 3730 e_dbg("icr is %08X\n", icr); 3731 if (icr & E1000_ICR_RXSEQ) { 3732 adapter->flags &= ~FLAG_MSI_TEST_FAILED; 3733 wmb(); 3734 } 3735 3736 return IRQ_HANDLED; 3737 } 3738 3739 /** 3740 * e1000_test_msi_interrupt - Returns 0 for successful test 3741 * @adapter: board private struct 3742 * 3743 * code flow taken from tg3.c 3744 **/ 3745 static int e1000_test_msi_interrupt(struct e1000_adapter *adapter) 3746 { 3747 struct net_device *netdev = adapter->netdev; 3748 struct e1000_hw *hw = &adapter->hw; 3749 int err; 3750 3751 /* poll_enable hasn't been called yet, so don't need disable */ 3752 /* clear any pending events */ 3753 er32(ICR); 3754 3755 /* free the real vector and request a test handler */ 3756 e1000_free_irq(adapter); 3757 e1000e_reset_interrupt_capability(adapter); 3758 3759 /* Assume that the test fails, if it succeeds then the test 3760 * MSI irq handler will unset this flag */ 3761 adapter->flags |= FLAG_MSI_TEST_FAILED; 3762 3763 err = pci_enable_msi(adapter->pdev); 3764 if (err) 3765 goto msi_test_failed; 3766 3767 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0, 3768 netdev->name, netdev); 3769 if (err) { 3770 pci_disable_msi(adapter->pdev); 3771 goto msi_test_failed; 3772 } 3773 3774 wmb(); 3775 3776 e1000_irq_enable(adapter); 3777 3778 /* fire an unusual interrupt on the test handler */ 3779 ew32(ICS, E1000_ICS_RXSEQ); 3780 e1e_flush(); 3781 msleep(100); 3782 3783 e1000_irq_disable(adapter); 3784 3785 rmb(); 3786 3787 if (adapter->flags & FLAG_MSI_TEST_FAILED) { 3788 adapter->int_mode = E1000E_INT_MODE_LEGACY; 3789 e_info("MSI interrupt test failed, using legacy interrupt.\n"); 3790 } else { 3791 e_dbg("MSI interrupt test succeeded!\n"); 3792 } 3793 3794 free_irq(adapter->pdev->irq, netdev); 3795 pci_disable_msi(adapter->pdev); 3796 3797 msi_test_failed: 3798 e1000e_set_interrupt_capability(adapter); 3799 return e1000_request_irq(adapter); 3800 } 3801 3802 /** 3803 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored 3804 * @adapter: board private struct 3805 * 3806 * code flow taken from tg3.c, called with e1000 interrupts disabled. 3807 **/ 3808 static int e1000_test_msi(struct e1000_adapter *adapter) 3809 { 3810 int err; 3811 u16 pci_cmd; 3812 3813 if (!(adapter->flags & FLAG_MSI_ENABLED)) 3814 return 0; 3815 3816 /* disable SERR in case the MSI write causes a master abort */ 3817 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd); 3818 if (pci_cmd & PCI_COMMAND_SERR) 3819 pci_write_config_word(adapter->pdev, PCI_COMMAND, 3820 pci_cmd & ~PCI_COMMAND_SERR); 3821 3822 err = e1000_test_msi_interrupt(adapter); 3823 3824 /* re-enable SERR */ 3825 if (pci_cmd & PCI_COMMAND_SERR) { 3826 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd); 3827 pci_cmd |= PCI_COMMAND_SERR; 3828 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd); 3829 } 3830 3831 return err; 3832 } 3833 3834 /** 3835 * e1000_open - Called when a network interface is made active 3836 * @netdev: network interface device structure 3837 * 3838 * Returns 0 on success, negative value on failure 3839 * 3840 * The open entry point is called when a network interface is made 3841 * active by the system (IFF_UP). At this point all resources needed 3842 * for transmit and receive operations are allocated, the interrupt 3843 * handler is registered with the OS, the watchdog timer is started, 3844 * and the stack is notified that the interface is ready. 3845 **/ 3846 static int e1000_open(struct net_device *netdev) 3847 { 3848 struct e1000_adapter *adapter = netdev_priv(netdev); 3849 struct e1000_hw *hw = &adapter->hw; 3850 struct pci_dev *pdev = adapter->pdev; 3851 int err; 3852 3853 /* disallow open during test */ 3854 if (test_bit(__E1000_TESTING, &adapter->state)) 3855 return -EBUSY; 3856 3857 pm_runtime_get_sync(&pdev->dev); 3858 3859 netif_carrier_off(netdev); 3860 3861 /* allocate transmit descriptors */ 3862 err = e1000e_setup_tx_resources(adapter->tx_ring); 3863 if (err) 3864 goto err_setup_tx; 3865 3866 /* allocate receive descriptors */ 3867 err = e1000e_setup_rx_resources(adapter->rx_ring); 3868 if (err) 3869 goto err_setup_rx; 3870 3871 /* 3872 * If AMT is enabled, let the firmware know that the network 3873 * interface is now open and reset the part to a known state. 3874 */ 3875 if (adapter->flags & FLAG_HAS_AMT) { 3876 e1000e_get_hw_control(adapter); 3877 e1000e_reset(adapter); 3878 } 3879 3880 e1000e_power_up_phy(adapter); 3881 3882 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; 3883 if ((adapter->hw.mng_cookie.status & 3884 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)) 3885 e1000_update_mng_vlan(adapter); 3886 3887 /* DMA latency requirement to workaround jumbo issue */ 3888 if (adapter->hw.mac.type == e1000_pch2lan) 3889 pm_qos_add_request(&adapter->netdev->pm_qos_req, 3890 PM_QOS_CPU_DMA_LATENCY, 3891 PM_QOS_DEFAULT_VALUE); 3892 3893 /* 3894 * before we allocate an interrupt, we must be ready to handle it. 3895 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt 3896 * as soon as we call pci_request_irq, so we have to setup our 3897 * clean_rx handler before we do so. 3898 */ 3899 e1000_configure(adapter); 3900 3901 err = e1000_request_irq(adapter); 3902 if (err) 3903 goto err_req_irq; 3904 3905 /* 3906 * Work around PCIe errata with MSI interrupts causing some chipsets to 3907 * ignore e1000e MSI messages, which means we need to test our MSI 3908 * interrupt now 3909 */ 3910 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) { 3911 err = e1000_test_msi(adapter); 3912 if (err) { 3913 e_err("Interrupt allocation failed\n"); 3914 goto err_req_irq; 3915 } 3916 } 3917 3918 /* From here on the code is the same as e1000e_up() */ 3919 clear_bit(__E1000_DOWN, &adapter->state); 3920 3921 napi_enable(&adapter->napi); 3922 3923 e1000_irq_enable(adapter); 3924 3925 adapter->tx_hang_recheck = false; 3926 netif_start_queue(netdev); 3927 3928 adapter->idle_check = true; 3929 pm_runtime_put(&pdev->dev); 3930 3931 /* fire a link status change interrupt to start the watchdog */ 3932 if (adapter->msix_entries) 3933 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER); 3934 else 3935 ew32(ICS, E1000_ICS_LSC); 3936 3937 return 0; 3938 3939 err_req_irq: 3940 e1000e_release_hw_control(adapter); 3941 e1000_power_down_phy(adapter); 3942 e1000e_free_rx_resources(adapter->rx_ring); 3943 err_setup_rx: 3944 e1000e_free_tx_resources(adapter->tx_ring); 3945 err_setup_tx: 3946 e1000e_reset(adapter); 3947 pm_runtime_put_sync(&pdev->dev); 3948 3949 return err; 3950 } 3951 3952 /** 3953 * e1000_close - Disables a network interface 3954 * @netdev: network interface device structure 3955 * 3956 * Returns 0, this is not allowed to fail 3957 * 3958 * The close entry point is called when an interface is de-activated 3959 * by the OS. The hardware is still under the drivers control, but 3960 * needs to be disabled. A global MAC reset is issued to stop the 3961 * hardware, and all transmit and receive resources are freed. 3962 **/ 3963 static int e1000_close(struct net_device *netdev) 3964 { 3965 struct e1000_adapter *adapter = netdev_priv(netdev); 3966 struct pci_dev *pdev = adapter->pdev; 3967 int count = E1000_CHECK_RESET_COUNT; 3968 3969 while (test_bit(__E1000_RESETTING, &adapter->state) && count--) 3970 usleep_range(10000, 20000); 3971 3972 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state)); 3973 3974 pm_runtime_get_sync(&pdev->dev); 3975 3976 napi_disable(&adapter->napi); 3977 3978 if (!test_bit(__E1000_DOWN, &adapter->state)) { 3979 e1000e_down(adapter); 3980 e1000_free_irq(adapter); 3981 } 3982 e1000_power_down_phy(adapter); 3983 3984 e1000e_free_tx_resources(adapter->tx_ring); 3985 e1000e_free_rx_resources(adapter->rx_ring); 3986 3987 /* 3988 * kill manageability vlan ID if supported, but not if a vlan with 3989 * the same ID is registered on the host OS (let 8021q kill it) 3990 */ 3991 if (adapter->hw.mng_cookie.status & 3992 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) 3993 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); 3994 3995 /* 3996 * If AMT is enabled, let the firmware know that the network 3997 * interface is now closed 3998 */ 3999 if ((adapter->flags & FLAG_HAS_AMT) && 4000 !test_bit(__E1000_TESTING, &adapter->state)) 4001 e1000e_release_hw_control(adapter); 4002 4003 if (adapter->hw.mac.type == e1000_pch2lan) 4004 pm_qos_remove_request(&adapter->netdev->pm_qos_req); 4005 4006 pm_runtime_put_sync(&pdev->dev); 4007 4008 return 0; 4009 } 4010 /** 4011 * e1000_set_mac - Change the Ethernet Address of the NIC 4012 * @netdev: network interface device structure 4013 * @p: pointer to an address structure 4014 * 4015 * Returns 0 on success, negative on failure 4016 **/ 4017 static int e1000_set_mac(struct net_device *netdev, void *p) 4018 { 4019 struct e1000_adapter *adapter = netdev_priv(netdev); 4020 struct e1000_hw *hw = &adapter->hw; 4021 struct sockaddr *addr = p; 4022 4023 if (!is_valid_ether_addr(addr->sa_data)) 4024 return -EADDRNOTAVAIL; 4025 4026 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 4027 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len); 4028 4029 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0); 4030 4031 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) { 4032 /* activate the work around */ 4033 e1000e_set_laa_state_82571(&adapter->hw, 1); 4034 4035 /* 4036 * Hold a copy of the LAA in RAR[14] This is done so that 4037 * between the time RAR[0] gets clobbered and the time it 4038 * gets fixed (in e1000_watchdog), the actual LAA is in one 4039 * of the RARs and no incoming packets directed to this port 4040 * are dropped. Eventually the LAA will be in RAR[0] and 4041 * RAR[14] 4042 */ 4043 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 4044 adapter->hw.mac.rar_entry_count - 1); 4045 } 4046 4047 return 0; 4048 } 4049 4050 /** 4051 * e1000e_update_phy_task - work thread to update phy 4052 * @work: pointer to our work struct 4053 * 4054 * this worker thread exists because we must acquire a 4055 * semaphore to read the phy, which we could msleep while 4056 * waiting for it, and we can't msleep in a timer. 4057 **/ 4058 static void e1000e_update_phy_task(struct work_struct *work) 4059 { 4060 struct e1000_adapter *adapter = container_of(work, 4061 struct e1000_adapter, update_phy_task); 4062 4063 if (test_bit(__E1000_DOWN, &adapter->state)) 4064 return; 4065 4066 e1000_get_phy_info(&adapter->hw); 4067 } 4068 4069 /* 4070 * Need to wait a few seconds after link up to get diagnostic information from 4071 * the phy 4072 */ 4073 static void e1000_update_phy_info(unsigned long data) 4074 { 4075 struct e1000_adapter *adapter = (struct e1000_adapter *) data; 4076 4077 if (test_bit(__E1000_DOWN, &adapter->state)) 4078 return; 4079 4080 schedule_work(&adapter->update_phy_task); 4081 } 4082 4083 /** 4084 * e1000e_update_phy_stats - Update the PHY statistics counters 4085 * @adapter: board private structure 4086 * 4087 * Read/clear the upper 16-bit PHY registers and read/accumulate lower 4088 **/ 4089 static void e1000e_update_phy_stats(struct e1000_adapter *adapter) 4090 { 4091 struct e1000_hw *hw = &adapter->hw; 4092 s32 ret_val; 4093 u16 phy_data; 4094 4095 ret_val = hw->phy.ops.acquire(hw); 4096 if (ret_val) 4097 return; 4098 4099 /* 4100 * A page set is expensive so check if already on desired page. 4101 * If not, set to the page with the PHY status registers. 4102 */ 4103 hw->phy.addr = 1; 4104 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, 4105 &phy_data); 4106 if (ret_val) 4107 goto release; 4108 if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) { 4109 ret_val = hw->phy.ops.set_page(hw, 4110 HV_STATS_PAGE << IGP_PAGE_SHIFT); 4111 if (ret_val) 4112 goto release; 4113 } 4114 4115 /* Single Collision Count */ 4116 hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data); 4117 ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data); 4118 if (!ret_val) 4119 adapter->stats.scc += phy_data; 4120 4121 /* Excessive Collision Count */ 4122 hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data); 4123 ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data); 4124 if (!ret_val) 4125 adapter->stats.ecol += phy_data; 4126 4127 /* Multiple Collision Count */ 4128 hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data); 4129 ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data); 4130 if (!ret_val) 4131 adapter->stats.mcc += phy_data; 4132 4133 /* Late Collision Count */ 4134 hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data); 4135 ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data); 4136 if (!ret_val) 4137 adapter->stats.latecol += phy_data; 4138 4139 /* Collision Count - also used for adaptive IFS */ 4140 hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data); 4141 ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data); 4142 if (!ret_val) 4143 hw->mac.collision_delta = phy_data; 4144 4145 /* Defer Count */ 4146 hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data); 4147 ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data); 4148 if (!ret_val) 4149 adapter->stats.dc += phy_data; 4150 4151 /* Transmit with no CRS */ 4152 hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data); 4153 ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data); 4154 if (!ret_val) 4155 adapter->stats.tncrs += phy_data; 4156 4157 release: 4158 hw->phy.ops.release(hw); 4159 } 4160 4161 /** 4162 * e1000e_update_stats - Update the board statistics counters 4163 * @adapter: board private structure 4164 **/ 4165 static void e1000e_update_stats(struct e1000_adapter *adapter) 4166 { 4167 struct net_device *netdev = adapter->netdev; 4168 struct e1000_hw *hw = &adapter->hw; 4169 struct pci_dev *pdev = adapter->pdev; 4170 4171 /* 4172 * Prevent stats update while adapter is being reset, or if the pci 4173 * connection is down. 4174 */ 4175 if (adapter->link_speed == 0) 4176 return; 4177 if (pci_channel_offline(pdev)) 4178 return; 4179 4180 adapter->stats.crcerrs += er32(CRCERRS); 4181 adapter->stats.gprc += er32(GPRC); 4182 adapter->stats.gorc += er32(GORCL); 4183 er32(GORCH); /* Clear gorc */ 4184 adapter->stats.bprc += er32(BPRC); 4185 adapter->stats.mprc += er32(MPRC); 4186 adapter->stats.roc += er32(ROC); 4187 4188 adapter->stats.mpc += er32(MPC); 4189 4190 /* Half-duplex statistics */ 4191 if (adapter->link_duplex == HALF_DUPLEX) { 4192 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) { 4193 e1000e_update_phy_stats(adapter); 4194 } else { 4195 adapter->stats.scc += er32(SCC); 4196 adapter->stats.ecol += er32(ECOL); 4197 adapter->stats.mcc += er32(MCC); 4198 adapter->stats.latecol += er32(LATECOL); 4199 adapter->stats.dc += er32(DC); 4200 4201 hw->mac.collision_delta = er32(COLC); 4202 4203 if ((hw->mac.type != e1000_82574) && 4204 (hw->mac.type != e1000_82583)) 4205 adapter->stats.tncrs += er32(TNCRS); 4206 } 4207 adapter->stats.colc += hw->mac.collision_delta; 4208 } 4209 4210 adapter->stats.xonrxc += er32(XONRXC); 4211 adapter->stats.xontxc += er32(XONTXC); 4212 adapter->stats.xoffrxc += er32(XOFFRXC); 4213 adapter->stats.xofftxc += er32(XOFFTXC); 4214 adapter->stats.gptc += er32(GPTC); 4215 adapter->stats.gotc += er32(GOTCL); 4216 er32(GOTCH); /* Clear gotc */ 4217 adapter->stats.rnbc += er32(RNBC); 4218 adapter->stats.ruc += er32(RUC); 4219 4220 adapter->stats.mptc += er32(MPTC); 4221 adapter->stats.bptc += er32(BPTC); 4222 4223 /* used for adaptive IFS */ 4224 4225 hw->mac.tx_packet_delta = er32(TPT); 4226 adapter->stats.tpt += hw->mac.tx_packet_delta; 4227 4228 adapter->stats.algnerrc += er32(ALGNERRC); 4229 adapter->stats.rxerrc += er32(RXERRC); 4230 adapter->stats.cexterr += er32(CEXTERR); 4231 adapter->stats.tsctc += er32(TSCTC); 4232 adapter->stats.tsctfc += er32(TSCTFC); 4233 4234 /* Fill out the OS statistics structure */ 4235 netdev->stats.multicast = adapter->stats.mprc; 4236 netdev->stats.collisions = adapter->stats.colc; 4237 4238 /* Rx Errors */ 4239 4240 /* 4241 * RLEC on some newer hardware can be incorrect so build 4242 * our own version based on RUC and ROC 4243 */ 4244 netdev->stats.rx_errors = adapter->stats.rxerrc + 4245 adapter->stats.crcerrs + adapter->stats.algnerrc + 4246 adapter->stats.ruc + adapter->stats.roc + 4247 adapter->stats.cexterr; 4248 netdev->stats.rx_length_errors = adapter->stats.ruc + 4249 adapter->stats.roc; 4250 netdev->stats.rx_crc_errors = adapter->stats.crcerrs; 4251 netdev->stats.rx_frame_errors = adapter->stats.algnerrc; 4252 netdev->stats.rx_missed_errors = adapter->stats.mpc; 4253 4254 /* Tx Errors */ 4255 netdev->stats.tx_errors = adapter->stats.ecol + 4256 adapter->stats.latecol; 4257 netdev->stats.tx_aborted_errors = adapter->stats.ecol; 4258 netdev->stats.tx_window_errors = adapter->stats.latecol; 4259 netdev->stats.tx_carrier_errors = adapter->stats.tncrs; 4260 4261 /* Tx Dropped needs to be maintained elsewhere */ 4262 4263 /* Management Stats */ 4264 adapter->stats.mgptc += er32(MGTPTC); 4265 adapter->stats.mgprc += er32(MGTPRC); 4266 adapter->stats.mgpdc += er32(MGTPDC); 4267 } 4268 4269 /** 4270 * e1000_phy_read_status - Update the PHY register status snapshot 4271 * @adapter: board private structure 4272 **/ 4273 static void e1000_phy_read_status(struct e1000_adapter *adapter) 4274 { 4275 struct e1000_hw *hw = &adapter->hw; 4276 struct e1000_phy_regs *phy = &adapter->phy_regs; 4277 4278 if ((er32(STATUS) & E1000_STATUS_LU) && 4279 (adapter->hw.phy.media_type == e1000_media_type_copper)) { 4280 int ret_val; 4281 4282 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr); 4283 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr); 4284 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise); 4285 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa); 4286 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion); 4287 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000); 4288 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000); 4289 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus); 4290 if (ret_val) 4291 e_warn("Error reading PHY register\n"); 4292 } else { 4293 /* 4294 * Do not read PHY registers if link is not up 4295 * Set values to typical power-on defaults 4296 */ 4297 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX); 4298 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL | 4299 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE | 4300 BMSR_ERCAP); 4301 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP | 4302 ADVERTISE_ALL | ADVERTISE_CSMA); 4303 phy->lpa = 0; 4304 phy->expansion = EXPANSION_ENABLENPAGE; 4305 phy->ctrl1000 = ADVERTISE_1000FULL; 4306 phy->stat1000 = 0; 4307 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF); 4308 } 4309 } 4310 4311 static void e1000_print_link_info(struct e1000_adapter *adapter) 4312 { 4313 struct e1000_hw *hw = &adapter->hw; 4314 u32 ctrl = er32(CTRL); 4315 4316 /* Link status message must follow this format for user tools */ 4317 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n", 4318 adapter->netdev->name, 4319 adapter->link_speed, 4320 adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half", 4321 (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" : 4322 (ctrl & E1000_CTRL_RFCE) ? "Rx" : 4323 (ctrl & E1000_CTRL_TFCE) ? "Tx" : "None"); 4324 } 4325 4326 static bool e1000e_has_link(struct e1000_adapter *adapter) 4327 { 4328 struct e1000_hw *hw = &adapter->hw; 4329 bool link_active = false; 4330 s32 ret_val = 0; 4331 4332 /* 4333 * get_link_status is set on LSC (link status) interrupt or 4334 * Rx sequence error interrupt. get_link_status will stay 4335 * false until the check_for_link establishes link 4336 * for copper adapters ONLY 4337 */ 4338 switch (hw->phy.media_type) { 4339 case e1000_media_type_copper: 4340 if (hw->mac.get_link_status) { 4341 ret_val = hw->mac.ops.check_for_link(hw); 4342 link_active = !hw->mac.get_link_status; 4343 } else { 4344 link_active = true; 4345 } 4346 break; 4347 case e1000_media_type_fiber: 4348 ret_val = hw->mac.ops.check_for_link(hw); 4349 link_active = !!(er32(STATUS) & E1000_STATUS_LU); 4350 break; 4351 case e1000_media_type_internal_serdes: 4352 ret_val = hw->mac.ops.check_for_link(hw); 4353 link_active = adapter->hw.mac.serdes_has_link; 4354 break; 4355 default: 4356 case e1000_media_type_unknown: 4357 break; 4358 } 4359 4360 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) && 4361 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) { 4362 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */ 4363 e_info("Gigabit has been disabled, downgrading speed\n"); 4364 } 4365 4366 return link_active; 4367 } 4368 4369 static void e1000e_enable_receives(struct e1000_adapter *adapter) 4370 { 4371 /* make sure the receive unit is started */ 4372 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) && 4373 (adapter->flags & FLAG_RX_RESTART_NOW)) { 4374 struct e1000_hw *hw = &adapter->hw; 4375 u32 rctl = er32(RCTL); 4376 ew32(RCTL, rctl | E1000_RCTL_EN); 4377 adapter->flags &= ~FLAG_RX_RESTART_NOW; 4378 } 4379 } 4380 4381 static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter) 4382 { 4383 struct e1000_hw *hw = &adapter->hw; 4384 4385 /* 4386 * With 82574 controllers, PHY needs to be checked periodically 4387 * for hung state and reset, if two calls return true 4388 */ 4389 if (e1000_check_phy_82574(hw)) 4390 adapter->phy_hang_count++; 4391 else 4392 adapter->phy_hang_count = 0; 4393 4394 if (adapter->phy_hang_count > 1) { 4395 adapter->phy_hang_count = 0; 4396 schedule_work(&adapter->reset_task); 4397 } 4398 } 4399 4400 /** 4401 * e1000_watchdog - Timer Call-back 4402 * @data: pointer to adapter cast into an unsigned long 4403 **/ 4404 static void e1000_watchdog(unsigned long data) 4405 { 4406 struct e1000_adapter *adapter = (struct e1000_adapter *) data; 4407 4408 /* Do the rest outside of interrupt context */ 4409 schedule_work(&adapter->watchdog_task); 4410 4411 /* TODO: make this use queue_delayed_work() */ 4412 } 4413 4414 static void e1000_watchdog_task(struct work_struct *work) 4415 { 4416 struct e1000_adapter *adapter = container_of(work, 4417 struct e1000_adapter, watchdog_task); 4418 struct net_device *netdev = adapter->netdev; 4419 struct e1000_mac_info *mac = &adapter->hw.mac; 4420 struct e1000_phy_info *phy = &adapter->hw.phy; 4421 struct e1000_ring *tx_ring = adapter->tx_ring; 4422 struct e1000_hw *hw = &adapter->hw; 4423 u32 link, tctl; 4424 4425 if (test_bit(__E1000_DOWN, &adapter->state)) 4426 return; 4427 4428 link = e1000e_has_link(adapter); 4429 if ((netif_carrier_ok(netdev)) && link) { 4430 /* Cancel scheduled suspend requests. */ 4431 pm_runtime_resume(netdev->dev.parent); 4432 4433 e1000e_enable_receives(adapter); 4434 goto link_up; 4435 } 4436 4437 if ((e1000e_enable_tx_pkt_filtering(hw)) && 4438 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)) 4439 e1000_update_mng_vlan(adapter); 4440 4441 if (link) { 4442 if (!netif_carrier_ok(netdev)) { 4443 bool txb2b = true; 4444 4445 /* Cancel scheduled suspend requests. */ 4446 pm_runtime_resume(netdev->dev.parent); 4447 4448 /* update snapshot of PHY registers on LSC */ 4449 e1000_phy_read_status(adapter); 4450 mac->ops.get_link_up_info(&adapter->hw, 4451 &adapter->link_speed, 4452 &adapter->link_duplex); 4453 e1000_print_link_info(adapter); 4454 /* 4455 * On supported PHYs, check for duplex mismatch only 4456 * if link has autonegotiated at 10/100 half 4457 */ 4458 if ((hw->phy.type == e1000_phy_igp_3 || 4459 hw->phy.type == e1000_phy_bm) && 4460 (hw->mac.autoneg == true) && 4461 (adapter->link_speed == SPEED_10 || 4462 adapter->link_speed == SPEED_100) && 4463 (adapter->link_duplex == HALF_DUPLEX)) { 4464 u16 autoneg_exp; 4465 4466 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp); 4467 4468 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS)) 4469 e_info("Autonegotiated half duplex but link partner cannot autoneg. Try forcing full duplex if link gets many collisions.\n"); 4470 } 4471 4472 /* adjust timeout factor according to speed/duplex */ 4473 adapter->tx_timeout_factor = 1; 4474 switch (adapter->link_speed) { 4475 case SPEED_10: 4476 txb2b = false; 4477 adapter->tx_timeout_factor = 16; 4478 break; 4479 case SPEED_100: 4480 txb2b = false; 4481 adapter->tx_timeout_factor = 10; 4482 break; 4483 } 4484 4485 /* 4486 * workaround: re-program speed mode bit after 4487 * link-up event 4488 */ 4489 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) && 4490 !txb2b) { 4491 u32 tarc0; 4492 tarc0 = er32(TARC(0)); 4493 tarc0 &= ~SPEED_MODE_BIT; 4494 ew32(TARC(0), tarc0); 4495 } 4496 4497 /* 4498 * disable TSO for pcie and 10/100 speeds, to avoid 4499 * some hardware issues 4500 */ 4501 if (!(adapter->flags & FLAG_TSO_FORCE)) { 4502 switch (adapter->link_speed) { 4503 case SPEED_10: 4504 case SPEED_100: 4505 e_info("10/100 speed: disabling TSO\n"); 4506 netdev->features &= ~NETIF_F_TSO; 4507 netdev->features &= ~NETIF_F_TSO6; 4508 break; 4509 case SPEED_1000: 4510 netdev->features |= NETIF_F_TSO; 4511 netdev->features |= NETIF_F_TSO6; 4512 break; 4513 default: 4514 /* oops */ 4515 break; 4516 } 4517 } 4518 4519 /* 4520 * enable transmits in the hardware, need to do this 4521 * after setting TARC(0) 4522 */ 4523 tctl = er32(TCTL); 4524 tctl |= E1000_TCTL_EN; 4525 ew32(TCTL, tctl); 4526 4527 /* 4528 * Perform any post-link-up configuration before 4529 * reporting link up. 4530 */ 4531 if (phy->ops.cfg_on_link_up) 4532 phy->ops.cfg_on_link_up(hw); 4533 4534 netif_carrier_on(netdev); 4535 4536 if (!test_bit(__E1000_DOWN, &adapter->state)) 4537 mod_timer(&adapter->phy_info_timer, 4538 round_jiffies(jiffies + 2 * HZ)); 4539 } 4540 } else { 4541 if (netif_carrier_ok(netdev)) { 4542 adapter->link_speed = 0; 4543 adapter->link_duplex = 0; 4544 /* Link status message must follow this format */ 4545 printk(KERN_INFO "e1000e: %s NIC Link is Down\n", 4546 adapter->netdev->name); 4547 netif_carrier_off(netdev); 4548 if (!test_bit(__E1000_DOWN, &adapter->state)) 4549 mod_timer(&adapter->phy_info_timer, 4550 round_jiffies(jiffies + 2 * HZ)); 4551 4552 if (adapter->flags & FLAG_RX_NEEDS_RESTART) 4553 schedule_work(&adapter->reset_task); 4554 else 4555 pm_schedule_suspend(netdev->dev.parent, 4556 LINK_TIMEOUT); 4557 } 4558 } 4559 4560 link_up: 4561 spin_lock(&adapter->stats64_lock); 4562 e1000e_update_stats(adapter); 4563 4564 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old; 4565 adapter->tpt_old = adapter->stats.tpt; 4566 mac->collision_delta = adapter->stats.colc - adapter->colc_old; 4567 adapter->colc_old = adapter->stats.colc; 4568 4569 adapter->gorc = adapter->stats.gorc - adapter->gorc_old; 4570 adapter->gorc_old = adapter->stats.gorc; 4571 adapter->gotc = adapter->stats.gotc - adapter->gotc_old; 4572 adapter->gotc_old = adapter->stats.gotc; 4573 spin_unlock(&adapter->stats64_lock); 4574 4575 e1000e_update_adaptive(&adapter->hw); 4576 4577 if (!netif_carrier_ok(netdev) && 4578 (e1000_desc_unused(tx_ring) + 1 < tx_ring->count)) { 4579 /* 4580 * We've lost link, so the controller stops DMA, 4581 * but we've got queued Tx work that's never going 4582 * to get done, so reset controller to flush Tx. 4583 * (Do the reset outside of interrupt context). 4584 */ 4585 schedule_work(&adapter->reset_task); 4586 /* return immediately since reset is imminent */ 4587 return; 4588 } 4589 4590 /* Simple mode for Interrupt Throttle Rate (ITR) */ 4591 if (adapter->itr_setting == 4) { 4592 /* 4593 * Symmetric Tx/Rx gets a reduced ITR=2000; 4594 * Total asymmetrical Tx or Rx gets ITR=8000; 4595 * everyone else is between 2000-8000. 4596 */ 4597 u32 goc = (adapter->gotc + adapter->gorc) / 10000; 4598 u32 dif = (adapter->gotc > adapter->gorc ? 4599 adapter->gotc - adapter->gorc : 4600 adapter->gorc - adapter->gotc) / 10000; 4601 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000; 4602 4603 ew32(ITR, 1000000000 / (itr * 256)); 4604 } 4605 4606 /* Cause software interrupt to ensure Rx ring is cleaned */ 4607 if (adapter->msix_entries) 4608 ew32(ICS, adapter->rx_ring->ims_val); 4609 else 4610 ew32(ICS, E1000_ICS_RXDMT0); 4611 4612 /* flush pending descriptors to memory before detecting Tx hang */ 4613 e1000e_flush_descriptors(adapter); 4614 4615 /* Force detection of hung controller every watchdog period */ 4616 adapter->detect_tx_hung = true; 4617 4618 /* 4619 * With 82571 controllers, LAA may be overwritten due to controller 4620 * reset from the other port. Set the appropriate LAA in RAR[0] 4621 */ 4622 if (e1000e_get_laa_state_82571(hw)) 4623 hw->mac.ops.rar_set(hw, adapter->hw.mac.addr, 0); 4624 4625 if (adapter->flags2 & FLAG2_CHECK_PHY_HANG) 4626 e1000e_check_82574_phy_workaround(adapter); 4627 4628 /* Reset the timer */ 4629 if (!test_bit(__E1000_DOWN, &adapter->state)) 4630 mod_timer(&adapter->watchdog_timer, 4631 round_jiffies(jiffies + 2 * HZ)); 4632 } 4633 4634 #define E1000_TX_FLAGS_CSUM 0x00000001 4635 #define E1000_TX_FLAGS_VLAN 0x00000002 4636 #define E1000_TX_FLAGS_TSO 0x00000004 4637 #define E1000_TX_FLAGS_IPV4 0x00000008 4638 #define E1000_TX_FLAGS_NO_FCS 0x00000010 4639 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000 4640 #define E1000_TX_FLAGS_VLAN_SHIFT 16 4641 4642 static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb) 4643 { 4644 struct e1000_context_desc *context_desc; 4645 struct e1000_buffer *buffer_info; 4646 unsigned int i; 4647 u32 cmd_length = 0; 4648 u16 ipcse = 0, tucse, mss; 4649 u8 ipcss, ipcso, tucss, tucso, hdr_len; 4650 4651 if (!skb_is_gso(skb)) 4652 return 0; 4653 4654 if (skb_header_cloned(skb)) { 4655 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); 4656 4657 if (err) 4658 return err; 4659 } 4660 4661 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 4662 mss = skb_shinfo(skb)->gso_size; 4663 if (skb->protocol == htons(ETH_P_IP)) { 4664 struct iphdr *iph = ip_hdr(skb); 4665 iph->tot_len = 0; 4666 iph->check = 0; 4667 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, 4668 0, IPPROTO_TCP, 0); 4669 cmd_length = E1000_TXD_CMD_IP; 4670 ipcse = skb_transport_offset(skb) - 1; 4671 } else if (skb_is_gso_v6(skb)) { 4672 ipv6_hdr(skb)->payload_len = 0; 4673 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, 4674 &ipv6_hdr(skb)->daddr, 4675 0, IPPROTO_TCP, 0); 4676 ipcse = 0; 4677 } 4678 ipcss = skb_network_offset(skb); 4679 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data; 4680 tucss = skb_transport_offset(skb); 4681 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data; 4682 tucse = 0; 4683 4684 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE | 4685 E1000_TXD_CMD_TCP | (skb->len - (hdr_len))); 4686 4687 i = tx_ring->next_to_use; 4688 context_desc = E1000_CONTEXT_DESC(*tx_ring, i); 4689 buffer_info = &tx_ring->buffer_info[i]; 4690 4691 context_desc->lower_setup.ip_fields.ipcss = ipcss; 4692 context_desc->lower_setup.ip_fields.ipcso = ipcso; 4693 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse); 4694 context_desc->upper_setup.tcp_fields.tucss = tucss; 4695 context_desc->upper_setup.tcp_fields.tucso = tucso; 4696 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse); 4697 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss); 4698 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len; 4699 context_desc->cmd_and_length = cpu_to_le32(cmd_length); 4700 4701 buffer_info->time_stamp = jiffies; 4702 buffer_info->next_to_watch = i; 4703 4704 i++; 4705 if (i == tx_ring->count) 4706 i = 0; 4707 tx_ring->next_to_use = i; 4708 4709 return 1; 4710 } 4711 4712 static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb) 4713 { 4714 struct e1000_adapter *adapter = tx_ring->adapter; 4715 struct e1000_context_desc *context_desc; 4716 struct e1000_buffer *buffer_info; 4717 unsigned int i; 4718 u8 css; 4719 u32 cmd_len = E1000_TXD_CMD_DEXT; 4720 __be16 protocol; 4721 4722 if (skb->ip_summed != CHECKSUM_PARTIAL) 4723 return 0; 4724 4725 if (skb->protocol == cpu_to_be16(ETH_P_8021Q)) 4726 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto; 4727 else 4728 protocol = skb->protocol; 4729 4730 switch (protocol) { 4731 case cpu_to_be16(ETH_P_IP): 4732 if (ip_hdr(skb)->protocol == IPPROTO_TCP) 4733 cmd_len |= E1000_TXD_CMD_TCP; 4734 break; 4735 case cpu_to_be16(ETH_P_IPV6): 4736 /* XXX not handling all IPV6 headers */ 4737 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP) 4738 cmd_len |= E1000_TXD_CMD_TCP; 4739 break; 4740 default: 4741 if (unlikely(net_ratelimit())) 4742 e_warn("checksum_partial proto=%x!\n", 4743 be16_to_cpu(protocol)); 4744 break; 4745 } 4746 4747 css = skb_checksum_start_offset(skb); 4748 4749 i = tx_ring->next_to_use; 4750 buffer_info = &tx_ring->buffer_info[i]; 4751 context_desc = E1000_CONTEXT_DESC(*tx_ring, i); 4752 4753 context_desc->lower_setup.ip_config = 0; 4754 context_desc->upper_setup.tcp_fields.tucss = css; 4755 context_desc->upper_setup.tcp_fields.tucso = 4756 css + skb->csum_offset; 4757 context_desc->upper_setup.tcp_fields.tucse = 0; 4758 context_desc->tcp_seg_setup.data = 0; 4759 context_desc->cmd_and_length = cpu_to_le32(cmd_len); 4760 4761 buffer_info->time_stamp = jiffies; 4762 buffer_info->next_to_watch = i; 4763 4764 i++; 4765 if (i == tx_ring->count) 4766 i = 0; 4767 tx_ring->next_to_use = i; 4768 4769 return 1; 4770 } 4771 4772 #define E1000_MAX_PER_TXD 8192 4773 #define E1000_MAX_TXD_PWR 12 4774 4775 static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb, 4776 unsigned int first, unsigned int max_per_txd, 4777 unsigned int nr_frags, unsigned int mss) 4778 { 4779 struct e1000_adapter *adapter = tx_ring->adapter; 4780 struct pci_dev *pdev = adapter->pdev; 4781 struct e1000_buffer *buffer_info; 4782 unsigned int len = skb_headlen(skb); 4783 unsigned int offset = 0, size, count = 0, i; 4784 unsigned int f, bytecount, segs; 4785 4786 i = tx_ring->next_to_use; 4787 4788 while (len) { 4789 buffer_info = &tx_ring->buffer_info[i]; 4790 size = min(len, max_per_txd); 4791 4792 buffer_info->length = size; 4793 buffer_info->time_stamp = jiffies; 4794 buffer_info->next_to_watch = i; 4795 buffer_info->dma = dma_map_single(&pdev->dev, 4796 skb->data + offset, 4797 size, DMA_TO_DEVICE); 4798 buffer_info->mapped_as_page = false; 4799 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) 4800 goto dma_error; 4801 4802 len -= size; 4803 offset += size; 4804 count++; 4805 4806 if (len) { 4807 i++; 4808 if (i == tx_ring->count) 4809 i = 0; 4810 } 4811 } 4812 4813 for (f = 0; f < nr_frags; f++) { 4814 const struct skb_frag_struct *frag; 4815 4816 frag = &skb_shinfo(skb)->frags[f]; 4817 len = skb_frag_size(frag); 4818 offset = 0; 4819 4820 while (len) { 4821 i++; 4822 if (i == tx_ring->count) 4823 i = 0; 4824 4825 buffer_info = &tx_ring->buffer_info[i]; 4826 size = min(len, max_per_txd); 4827 4828 buffer_info->length = size; 4829 buffer_info->time_stamp = jiffies; 4830 buffer_info->next_to_watch = i; 4831 buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag, 4832 offset, size, DMA_TO_DEVICE); 4833 buffer_info->mapped_as_page = true; 4834 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) 4835 goto dma_error; 4836 4837 len -= size; 4838 offset += size; 4839 count++; 4840 } 4841 } 4842 4843 segs = skb_shinfo(skb)->gso_segs ? : 1; 4844 /* multiply data chunks by size of headers */ 4845 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len; 4846 4847 tx_ring->buffer_info[i].skb = skb; 4848 tx_ring->buffer_info[i].segs = segs; 4849 tx_ring->buffer_info[i].bytecount = bytecount; 4850 tx_ring->buffer_info[first].next_to_watch = i; 4851 4852 return count; 4853 4854 dma_error: 4855 dev_err(&pdev->dev, "Tx DMA map failed\n"); 4856 buffer_info->dma = 0; 4857 if (count) 4858 count--; 4859 4860 while (count--) { 4861 if (i == 0) 4862 i += tx_ring->count; 4863 i--; 4864 buffer_info = &tx_ring->buffer_info[i]; 4865 e1000_put_txbuf(tx_ring, buffer_info); 4866 } 4867 4868 return 0; 4869 } 4870 4871 static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count) 4872 { 4873 struct e1000_adapter *adapter = tx_ring->adapter; 4874 struct e1000_tx_desc *tx_desc = NULL; 4875 struct e1000_buffer *buffer_info; 4876 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS; 4877 unsigned int i; 4878 4879 if (tx_flags & E1000_TX_FLAGS_TSO) { 4880 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D | 4881 E1000_TXD_CMD_TSE; 4882 txd_upper |= E1000_TXD_POPTS_TXSM << 8; 4883 4884 if (tx_flags & E1000_TX_FLAGS_IPV4) 4885 txd_upper |= E1000_TXD_POPTS_IXSM << 8; 4886 } 4887 4888 if (tx_flags & E1000_TX_FLAGS_CSUM) { 4889 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; 4890 txd_upper |= E1000_TXD_POPTS_TXSM << 8; 4891 } 4892 4893 if (tx_flags & E1000_TX_FLAGS_VLAN) { 4894 txd_lower |= E1000_TXD_CMD_VLE; 4895 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK); 4896 } 4897 4898 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS)) 4899 txd_lower &= ~(E1000_TXD_CMD_IFCS); 4900 4901 i = tx_ring->next_to_use; 4902 4903 do { 4904 buffer_info = &tx_ring->buffer_info[i]; 4905 tx_desc = E1000_TX_DESC(*tx_ring, i); 4906 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); 4907 tx_desc->lower.data = 4908 cpu_to_le32(txd_lower | buffer_info->length); 4909 tx_desc->upper.data = cpu_to_le32(txd_upper); 4910 4911 i++; 4912 if (i == tx_ring->count) 4913 i = 0; 4914 } while (--count > 0); 4915 4916 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd); 4917 4918 /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */ 4919 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS)) 4920 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS)); 4921 4922 /* 4923 * Force memory writes to complete before letting h/w 4924 * know there are new descriptors to fetch. (Only 4925 * applicable for weak-ordered memory model archs, 4926 * such as IA-64). 4927 */ 4928 wmb(); 4929 4930 tx_ring->next_to_use = i; 4931 4932 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) 4933 e1000e_update_tdt_wa(tx_ring, i); 4934 else 4935 writel(i, tx_ring->tail); 4936 4937 /* 4938 * we need this if more than one processor can write to our tail 4939 * at a time, it synchronizes IO on IA64/Altix systems 4940 */ 4941 mmiowb(); 4942 } 4943 4944 #define MINIMUM_DHCP_PACKET_SIZE 282 4945 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter, 4946 struct sk_buff *skb) 4947 { 4948 struct e1000_hw *hw = &adapter->hw; 4949 u16 length, offset; 4950 4951 if (vlan_tx_tag_present(skb)) { 4952 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) && 4953 (adapter->hw.mng_cookie.status & 4954 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))) 4955 return 0; 4956 } 4957 4958 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE) 4959 return 0; 4960 4961 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP)) 4962 return 0; 4963 4964 { 4965 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14); 4966 struct udphdr *udp; 4967 4968 if (ip->protocol != IPPROTO_UDP) 4969 return 0; 4970 4971 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2)); 4972 if (ntohs(udp->dest) != 67) 4973 return 0; 4974 4975 offset = (u8 *)udp + 8 - skb->data; 4976 length = skb->len - offset; 4977 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length); 4978 } 4979 4980 return 0; 4981 } 4982 4983 static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size) 4984 { 4985 struct e1000_adapter *adapter = tx_ring->adapter; 4986 4987 netif_stop_queue(adapter->netdev); 4988 /* 4989 * Herbert's original patch had: 4990 * smp_mb__after_netif_stop_queue(); 4991 * but since that doesn't exist yet, just open code it. 4992 */ 4993 smp_mb(); 4994 4995 /* 4996 * We need to check again in a case another CPU has just 4997 * made room available. 4998 */ 4999 if (e1000_desc_unused(tx_ring) < size) 5000 return -EBUSY; 5001 5002 /* A reprieve! */ 5003 netif_start_queue(adapter->netdev); 5004 ++adapter->restart_queue; 5005 return 0; 5006 } 5007 5008 static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size) 5009 { 5010 if (e1000_desc_unused(tx_ring) >= size) 5011 return 0; 5012 return __e1000_maybe_stop_tx(tx_ring, size); 5013 } 5014 5015 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1) 5016 static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb, 5017 struct net_device *netdev) 5018 { 5019 struct e1000_adapter *adapter = netdev_priv(netdev); 5020 struct e1000_ring *tx_ring = adapter->tx_ring; 5021 unsigned int first; 5022 unsigned int max_per_txd = E1000_MAX_PER_TXD; 5023 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR; 5024 unsigned int tx_flags = 0; 5025 unsigned int len = skb_headlen(skb); 5026 unsigned int nr_frags; 5027 unsigned int mss; 5028 int count = 0; 5029 int tso; 5030 unsigned int f; 5031 5032 if (test_bit(__E1000_DOWN, &adapter->state)) { 5033 dev_kfree_skb_any(skb); 5034 return NETDEV_TX_OK; 5035 } 5036 5037 if (skb->len <= 0) { 5038 dev_kfree_skb_any(skb); 5039 return NETDEV_TX_OK; 5040 } 5041 5042 mss = skb_shinfo(skb)->gso_size; 5043 /* 5044 * The controller does a simple calculation to 5045 * make sure there is enough room in the FIFO before 5046 * initiating the DMA for each buffer. The calc is: 5047 * 4 = ceil(buffer len/mss). To make sure we don't 5048 * overrun the FIFO, adjust the max buffer len if mss 5049 * drops. 5050 */ 5051 if (mss) { 5052 u8 hdr_len; 5053 max_per_txd = min(mss << 2, max_per_txd); 5054 max_txd_pwr = fls(max_per_txd) - 1; 5055 5056 /* 5057 * TSO Workaround for 82571/2/3 Controllers -- if skb->data 5058 * points to just header, pull a few bytes of payload from 5059 * frags into skb->data 5060 */ 5061 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 5062 /* 5063 * we do this workaround for ES2LAN, but it is un-necessary, 5064 * avoiding it could save a lot of cycles 5065 */ 5066 if (skb->data_len && (hdr_len == len)) { 5067 unsigned int pull_size; 5068 5069 pull_size = min_t(unsigned int, 4, skb->data_len); 5070 if (!__pskb_pull_tail(skb, pull_size)) { 5071 e_err("__pskb_pull_tail failed.\n"); 5072 dev_kfree_skb_any(skb); 5073 return NETDEV_TX_OK; 5074 } 5075 len = skb_headlen(skb); 5076 } 5077 } 5078 5079 /* reserve a descriptor for the offload context */ 5080 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL)) 5081 count++; 5082 count++; 5083 5084 count += TXD_USE_COUNT(len, max_txd_pwr); 5085 5086 nr_frags = skb_shinfo(skb)->nr_frags; 5087 for (f = 0; f < nr_frags; f++) 5088 count += TXD_USE_COUNT(skb_frag_size(&skb_shinfo(skb)->frags[f]), 5089 max_txd_pwr); 5090 5091 if (adapter->hw.mac.tx_pkt_filtering) 5092 e1000_transfer_dhcp_info(adapter, skb); 5093 5094 /* 5095 * need: count + 2 desc gap to keep tail from touching 5096 * head, otherwise try next time 5097 */ 5098 if (e1000_maybe_stop_tx(tx_ring, count + 2)) 5099 return NETDEV_TX_BUSY; 5100 5101 if (vlan_tx_tag_present(skb)) { 5102 tx_flags |= E1000_TX_FLAGS_VLAN; 5103 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT); 5104 } 5105 5106 first = tx_ring->next_to_use; 5107 5108 tso = e1000_tso(tx_ring, skb); 5109 if (tso < 0) { 5110 dev_kfree_skb_any(skb); 5111 return NETDEV_TX_OK; 5112 } 5113 5114 if (tso) 5115 tx_flags |= E1000_TX_FLAGS_TSO; 5116 else if (e1000_tx_csum(tx_ring, skb)) 5117 tx_flags |= E1000_TX_FLAGS_CSUM; 5118 5119 /* 5120 * Old method was to assume IPv4 packet by default if TSO was enabled. 5121 * 82571 hardware supports TSO capabilities for IPv6 as well... 5122 * no longer assume, we must. 5123 */ 5124 if (skb->protocol == htons(ETH_P_IP)) 5125 tx_flags |= E1000_TX_FLAGS_IPV4; 5126 5127 if (unlikely(skb->no_fcs)) 5128 tx_flags |= E1000_TX_FLAGS_NO_FCS; 5129 5130 /* if count is 0 then mapping error has occurred */ 5131 count = e1000_tx_map(tx_ring, skb, first, max_per_txd, nr_frags, mss); 5132 if (count) { 5133 skb_tx_timestamp(skb); 5134 5135 netdev_sent_queue(netdev, skb->len); 5136 e1000_tx_queue(tx_ring, tx_flags, count); 5137 /* Make sure there is space in the ring for the next send. */ 5138 e1000_maybe_stop_tx(tx_ring, MAX_SKB_FRAGS + 2); 5139 5140 } else { 5141 dev_kfree_skb_any(skb); 5142 tx_ring->buffer_info[first].time_stamp = 0; 5143 tx_ring->next_to_use = first; 5144 } 5145 5146 return NETDEV_TX_OK; 5147 } 5148 5149 /** 5150 * e1000_tx_timeout - Respond to a Tx Hang 5151 * @netdev: network interface device structure 5152 **/ 5153 static void e1000_tx_timeout(struct net_device *netdev) 5154 { 5155 struct e1000_adapter *adapter = netdev_priv(netdev); 5156 5157 /* Do the reset outside of interrupt context */ 5158 adapter->tx_timeout_count++; 5159 schedule_work(&adapter->reset_task); 5160 } 5161 5162 static void e1000_reset_task(struct work_struct *work) 5163 { 5164 struct e1000_adapter *adapter; 5165 adapter = container_of(work, struct e1000_adapter, reset_task); 5166 5167 /* don't run the task if already down */ 5168 if (test_bit(__E1000_DOWN, &adapter->state)) 5169 return; 5170 5171 if (!((adapter->flags & FLAG_RX_NEEDS_RESTART) && 5172 (adapter->flags & FLAG_RX_RESTART_NOW))) { 5173 e1000e_dump(adapter); 5174 e_err("Reset adapter\n"); 5175 } 5176 e1000e_reinit_locked(adapter); 5177 } 5178 5179 /** 5180 * e1000_get_stats64 - Get System Network Statistics 5181 * @netdev: network interface device structure 5182 * @stats: rtnl_link_stats64 pointer 5183 * 5184 * Returns the address of the device statistics structure. 5185 **/ 5186 struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev, 5187 struct rtnl_link_stats64 *stats) 5188 { 5189 struct e1000_adapter *adapter = netdev_priv(netdev); 5190 5191 memset(stats, 0, sizeof(struct rtnl_link_stats64)); 5192 spin_lock(&adapter->stats64_lock); 5193 e1000e_update_stats(adapter); 5194 /* Fill out the OS statistics structure */ 5195 stats->rx_bytes = adapter->stats.gorc; 5196 stats->rx_packets = adapter->stats.gprc; 5197 stats->tx_bytes = adapter->stats.gotc; 5198 stats->tx_packets = adapter->stats.gptc; 5199 stats->multicast = adapter->stats.mprc; 5200 stats->collisions = adapter->stats.colc; 5201 5202 /* Rx Errors */ 5203 5204 /* 5205 * RLEC on some newer hardware can be incorrect so build 5206 * our own version based on RUC and ROC 5207 */ 5208 stats->rx_errors = adapter->stats.rxerrc + 5209 adapter->stats.crcerrs + adapter->stats.algnerrc + 5210 adapter->stats.ruc + adapter->stats.roc + 5211 adapter->stats.cexterr; 5212 stats->rx_length_errors = adapter->stats.ruc + 5213 adapter->stats.roc; 5214 stats->rx_crc_errors = adapter->stats.crcerrs; 5215 stats->rx_frame_errors = adapter->stats.algnerrc; 5216 stats->rx_missed_errors = adapter->stats.mpc; 5217 5218 /* Tx Errors */ 5219 stats->tx_errors = adapter->stats.ecol + 5220 adapter->stats.latecol; 5221 stats->tx_aborted_errors = adapter->stats.ecol; 5222 stats->tx_window_errors = adapter->stats.latecol; 5223 stats->tx_carrier_errors = adapter->stats.tncrs; 5224 5225 /* Tx Dropped needs to be maintained elsewhere */ 5226 5227 spin_unlock(&adapter->stats64_lock); 5228 return stats; 5229 } 5230 5231 /** 5232 * e1000_change_mtu - Change the Maximum Transfer Unit 5233 * @netdev: network interface device structure 5234 * @new_mtu: new value for maximum frame size 5235 * 5236 * Returns 0 on success, negative on failure 5237 **/ 5238 static int e1000_change_mtu(struct net_device *netdev, int new_mtu) 5239 { 5240 struct e1000_adapter *adapter = netdev_priv(netdev); 5241 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN; 5242 5243 /* Jumbo frame support */ 5244 if (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) { 5245 if (!(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) { 5246 e_err("Jumbo Frames not supported.\n"); 5247 return -EINVAL; 5248 } 5249 5250 /* 5251 * IP payload checksum (enabled with jumbos/packet-split when 5252 * Rx checksum is enabled) and generation of RSS hash is 5253 * mutually exclusive in the hardware. 5254 */ 5255 if ((netdev->features & NETIF_F_RXCSUM) && 5256 (netdev->features & NETIF_F_RXHASH)) { 5257 e_err("Jumbo frames cannot be enabled when both receive checksum offload and receive hashing are enabled. Disable one of the receive offload features before enabling jumbos.\n"); 5258 return -EINVAL; 5259 } 5260 } 5261 5262 /* Supported frame sizes */ 5263 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) || 5264 (max_frame > adapter->max_hw_frame_size)) { 5265 e_err("Unsupported MTU setting\n"); 5266 return -EINVAL; 5267 } 5268 5269 /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */ 5270 if ((adapter->hw.mac.type >= e1000_pch2lan) && 5271 !(adapter->flags2 & FLAG2_CRC_STRIPPING) && 5272 (new_mtu > ETH_DATA_LEN)) { 5273 e_err("Jumbo Frames not supported on this device when CRC stripping is disabled.\n"); 5274 return -EINVAL; 5275 } 5276 5277 while (test_and_set_bit(__E1000_RESETTING, &adapter->state)) 5278 usleep_range(1000, 2000); 5279 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */ 5280 adapter->max_frame_size = max_frame; 5281 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu); 5282 netdev->mtu = new_mtu; 5283 if (netif_running(netdev)) 5284 e1000e_down(adapter); 5285 5286 /* 5287 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN 5288 * means we reserve 2 more, this pushes us to allocate from the next 5289 * larger slab size. 5290 * i.e. RXBUFFER_2048 --> size-4096 slab 5291 * However with the new *_jumbo_rx* routines, jumbo receives will use 5292 * fragmented skbs 5293 */ 5294 5295 if (max_frame <= 2048) 5296 adapter->rx_buffer_len = 2048; 5297 else 5298 adapter->rx_buffer_len = 4096; 5299 5300 /* adjust allocation if LPE protects us, and we aren't using SBP */ 5301 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) || 5302 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN)) 5303 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN 5304 + ETH_FCS_LEN; 5305 5306 if (netif_running(netdev)) 5307 e1000e_up(adapter); 5308 else 5309 e1000e_reset(adapter); 5310 5311 clear_bit(__E1000_RESETTING, &adapter->state); 5312 5313 return 0; 5314 } 5315 5316 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, 5317 int cmd) 5318 { 5319 struct e1000_adapter *adapter = netdev_priv(netdev); 5320 struct mii_ioctl_data *data = if_mii(ifr); 5321 5322 if (adapter->hw.phy.media_type != e1000_media_type_copper) 5323 return -EOPNOTSUPP; 5324 5325 switch (cmd) { 5326 case SIOCGMIIPHY: 5327 data->phy_id = adapter->hw.phy.addr; 5328 break; 5329 case SIOCGMIIREG: 5330 e1000_phy_read_status(adapter); 5331 5332 switch (data->reg_num & 0x1F) { 5333 case MII_BMCR: 5334 data->val_out = adapter->phy_regs.bmcr; 5335 break; 5336 case MII_BMSR: 5337 data->val_out = adapter->phy_regs.bmsr; 5338 break; 5339 case MII_PHYSID1: 5340 data->val_out = (adapter->hw.phy.id >> 16); 5341 break; 5342 case MII_PHYSID2: 5343 data->val_out = (adapter->hw.phy.id & 0xFFFF); 5344 break; 5345 case MII_ADVERTISE: 5346 data->val_out = adapter->phy_regs.advertise; 5347 break; 5348 case MII_LPA: 5349 data->val_out = adapter->phy_regs.lpa; 5350 break; 5351 case MII_EXPANSION: 5352 data->val_out = adapter->phy_regs.expansion; 5353 break; 5354 case MII_CTRL1000: 5355 data->val_out = adapter->phy_regs.ctrl1000; 5356 break; 5357 case MII_STAT1000: 5358 data->val_out = adapter->phy_regs.stat1000; 5359 break; 5360 case MII_ESTATUS: 5361 data->val_out = adapter->phy_regs.estatus; 5362 break; 5363 default: 5364 return -EIO; 5365 } 5366 break; 5367 case SIOCSMIIREG: 5368 default: 5369 return -EOPNOTSUPP; 5370 } 5371 return 0; 5372 } 5373 5374 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 5375 { 5376 switch (cmd) { 5377 case SIOCGMIIPHY: 5378 case SIOCGMIIREG: 5379 case SIOCSMIIREG: 5380 return e1000_mii_ioctl(netdev, ifr, cmd); 5381 default: 5382 return -EOPNOTSUPP; 5383 } 5384 } 5385 5386 static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc) 5387 { 5388 struct e1000_hw *hw = &adapter->hw; 5389 u32 i, mac_reg; 5390 u16 phy_reg, wuc_enable; 5391 int retval = 0; 5392 5393 /* copy MAC RARs to PHY RARs */ 5394 e1000_copy_rx_addrs_to_phy_ich8lan(hw); 5395 5396 retval = hw->phy.ops.acquire(hw); 5397 if (retval) { 5398 e_err("Could not acquire PHY\n"); 5399 return retval; 5400 } 5401 5402 /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */ 5403 retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable); 5404 if (retval) 5405 goto release; 5406 5407 /* copy MAC MTA to PHY MTA - only needed for pchlan */ 5408 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) { 5409 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i); 5410 hw->phy.ops.write_reg_page(hw, BM_MTA(i), 5411 (u16)(mac_reg & 0xFFFF)); 5412 hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1, 5413 (u16)((mac_reg >> 16) & 0xFFFF)); 5414 } 5415 5416 /* configure PHY Rx Control register */ 5417 hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg); 5418 mac_reg = er32(RCTL); 5419 if (mac_reg & E1000_RCTL_UPE) 5420 phy_reg |= BM_RCTL_UPE; 5421 if (mac_reg & E1000_RCTL_MPE) 5422 phy_reg |= BM_RCTL_MPE; 5423 phy_reg &= ~(BM_RCTL_MO_MASK); 5424 if (mac_reg & E1000_RCTL_MO_3) 5425 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT) 5426 << BM_RCTL_MO_SHIFT); 5427 if (mac_reg & E1000_RCTL_BAM) 5428 phy_reg |= BM_RCTL_BAM; 5429 if (mac_reg & E1000_RCTL_PMCF) 5430 phy_reg |= BM_RCTL_PMCF; 5431 mac_reg = er32(CTRL); 5432 if (mac_reg & E1000_CTRL_RFCE) 5433 phy_reg |= BM_RCTL_RFCE; 5434 hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg); 5435 5436 /* enable PHY wakeup in MAC register */ 5437 ew32(WUFC, wufc); 5438 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN); 5439 5440 /* configure and enable PHY wakeup in PHY registers */ 5441 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc); 5442 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, E1000_WUC_PME_EN); 5443 5444 /* activate PHY wakeup */ 5445 wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT; 5446 retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable); 5447 if (retval) 5448 e_err("Could not set PHY Host Wakeup bit\n"); 5449 release: 5450 hw->phy.ops.release(hw); 5451 5452 return retval; 5453 } 5454 5455 static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake, 5456 bool runtime) 5457 { 5458 struct net_device *netdev = pci_get_drvdata(pdev); 5459 struct e1000_adapter *adapter = netdev_priv(netdev); 5460 struct e1000_hw *hw = &adapter->hw; 5461 u32 ctrl, ctrl_ext, rctl, status; 5462 /* Runtime suspend should only enable wakeup for link changes */ 5463 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol; 5464 int retval = 0; 5465 5466 netif_device_detach(netdev); 5467 5468 if (netif_running(netdev)) { 5469 int count = E1000_CHECK_RESET_COUNT; 5470 5471 while (test_bit(__E1000_RESETTING, &adapter->state) && count--) 5472 usleep_range(10000, 20000); 5473 5474 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state)); 5475 e1000e_down(adapter); 5476 e1000_free_irq(adapter); 5477 } 5478 e1000e_reset_interrupt_capability(adapter); 5479 5480 retval = pci_save_state(pdev); 5481 if (retval) 5482 return retval; 5483 5484 status = er32(STATUS); 5485 if (status & E1000_STATUS_LU) 5486 wufc &= ~E1000_WUFC_LNKC; 5487 5488 if (wufc) { 5489 e1000_setup_rctl(adapter); 5490 e1000e_set_rx_mode(netdev); 5491 5492 /* turn on all-multi mode if wake on multicast is enabled */ 5493 if (wufc & E1000_WUFC_MC) { 5494 rctl = er32(RCTL); 5495 rctl |= E1000_RCTL_MPE; 5496 ew32(RCTL, rctl); 5497 } 5498 5499 ctrl = er32(CTRL); 5500 /* advertise wake from D3Cold */ 5501 #define E1000_CTRL_ADVD3WUC 0x00100000 5502 /* phy power management enable */ 5503 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000 5504 ctrl |= E1000_CTRL_ADVD3WUC; 5505 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP)) 5506 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT; 5507 ew32(CTRL, ctrl); 5508 5509 if (adapter->hw.phy.media_type == e1000_media_type_fiber || 5510 adapter->hw.phy.media_type == 5511 e1000_media_type_internal_serdes) { 5512 /* keep the laser running in D3 */ 5513 ctrl_ext = er32(CTRL_EXT); 5514 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA; 5515 ew32(CTRL_EXT, ctrl_ext); 5516 } 5517 5518 if (adapter->flags & FLAG_IS_ICH) 5519 e1000_suspend_workarounds_ich8lan(&adapter->hw); 5520 5521 /* Allow time for pending master requests to run */ 5522 e1000e_disable_pcie_master(&adapter->hw); 5523 5524 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) { 5525 /* enable wakeup by the PHY */ 5526 retval = e1000_init_phy_wakeup(adapter, wufc); 5527 if (retval) 5528 return retval; 5529 } else { 5530 /* enable wakeup by the MAC */ 5531 ew32(WUFC, wufc); 5532 ew32(WUC, E1000_WUC_PME_EN); 5533 } 5534 } else { 5535 ew32(WUC, 0); 5536 ew32(WUFC, 0); 5537 } 5538 5539 *enable_wake = !!wufc; 5540 5541 /* make sure adapter isn't asleep if manageability is enabled */ 5542 if ((adapter->flags & FLAG_MNG_PT_ENABLED) || 5543 (hw->mac.ops.check_mng_mode(hw))) 5544 *enable_wake = true; 5545 5546 if (adapter->hw.phy.type == e1000_phy_igp_3) 5547 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw); 5548 5549 /* 5550 * Release control of h/w to f/w. If f/w is AMT enabled, this 5551 * would have already happened in close and is redundant. 5552 */ 5553 e1000e_release_hw_control(adapter); 5554 5555 pci_disable_device(pdev); 5556 5557 return 0; 5558 } 5559 5560 static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake) 5561 { 5562 if (sleep && wake) { 5563 pci_prepare_to_sleep(pdev); 5564 return; 5565 } 5566 5567 pci_wake_from_d3(pdev, wake); 5568 pci_set_power_state(pdev, PCI_D3hot); 5569 } 5570 5571 static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep, 5572 bool wake) 5573 { 5574 struct net_device *netdev = pci_get_drvdata(pdev); 5575 struct e1000_adapter *adapter = netdev_priv(netdev); 5576 5577 /* 5578 * The pci-e switch on some quad port adapters will report a 5579 * correctable error when the MAC transitions from D0 to D3. To 5580 * prevent this we need to mask off the correctable errors on the 5581 * downstream port of the pci-e switch. 5582 */ 5583 if (adapter->flags & FLAG_IS_QUAD_PORT) { 5584 struct pci_dev *us_dev = pdev->bus->self; 5585 int pos = pci_pcie_cap(us_dev); 5586 u16 devctl; 5587 5588 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl); 5589 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, 5590 (devctl & ~PCI_EXP_DEVCTL_CERE)); 5591 5592 e1000_power_off(pdev, sleep, wake); 5593 5594 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl); 5595 } else { 5596 e1000_power_off(pdev, sleep, wake); 5597 } 5598 } 5599 5600 #ifdef CONFIG_PCIEASPM 5601 static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state) 5602 { 5603 pci_disable_link_state_locked(pdev, state); 5604 } 5605 #else 5606 static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state) 5607 { 5608 int pos; 5609 u16 reg16; 5610 5611 /* 5612 * Both device and parent should have the same ASPM setting. 5613 * Disable ASPM in downstream component first and then upstream. 5614 */ 5615 pos = pci_pcie_cap(pdev); 5616 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, ®16); 5617 reg16 &= ~state; 5618 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16); 5619 5620 if (!pdev->bus->self) 5621 return; 5622 5623 pos = pci_pcie_cap(pdev->bus->self); 5624 pci_read_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, ®16); 5625 reg16 &= ~state; 5626 pci_write_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, reg16); 5627 } 5628 #endif 5629 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state) 5630 { 5631 dev_info(&pdev->dev, "Disabling ASPM %s %s\n", 5632 (state & PCIE_LINK_STATE_L0S) ? "L0s" : "", 5633 (state & PCIE_LINK_STATE_L1) ? "L1" : ""); 5634 5635 __e1000e_disable_aspm(pdev, state); 5636 } 5637 5638 #ifdef CONFIG_PM 5639 static bool e1000e_pm_ready(struct e1000_adapter *adapter) 5640 { 5641 return !!adapter->tx_ring->buffer_info; 5642 } 5643 5644 static int __e1000_resume(struct pci_dev *pdev) 5645 { 5646 struct net_device *netdev = pci_get_drvdata(pdev); 5647 struct e1000_adapter *adapter = netdev_priv(netdev); 5648 struct e1000_hw *hw = &adapter->hw; 5649 u16 aspm_disable_flag = 0; 5650 u32 err; 5651 5652 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S) 5653 aspm_disable_flag = PCIE_LINK_STATE_L0S; 5654 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1) 5655 aspm_disable_flag |= PCIE_LINK_STATE_L1; 5656 if (aspm_disable_flag) 5657 e1000e_disable_aspm(pdev, aspm_disable_flag); 5658 5659 pci_set_power_state(pdev, PCI_D0); 5660 pci_restore_state(pdev); 5661 pci_save_state(pdev); 5662 5663 e1000e_set_interrupt_capability(adapter); 5664 if (netif_running(netdev)) { 5665 err = e1000_request_irq(adapter); 5666 if (err) 5667 return err; 5668 } 5669 5670 if (hw->mac.type >= e1000_pch2lan) 5671 e1000_resume_workarounds_pchlan(&adapter->hw); 5672 5673 e1000e_power_up_phy(adapter); 5674 5675 /* report the system wakeup cause from S3/S4 */ 5676 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) { 5677 u16 phy_data; 5678 5679 e1e_rphy(&adapter->hw, BM_WUS, &phy_data); 5680 if (phy_data) { 5681 e_info("PHY Wakeup cause - %s\n", 5682 phy_data & E1000_WUS_EX ? "Unicast Packet" : 5683 phy_data & E1000_WUS_MC ? "Multicast Packet" : 5684 phy_data & E1000_WUS_BC ? "Broadcast Packet" : 5685 phy_data & E1000_WUS_MAG ? "Magic Packet" : 5686 phy_data & E1000_WUS_LNKC ? 5687 "Link Status Change" : "other"); 5688 } 5689 e1e_wphy(&adapter->hw, BM_WUS, ~0); 5690 } else { 5691 u32 wus = er32(WUS); 5692 if (wus) { 5693 e_info("MAC Wakeup cause - %s\n", 5694 wus & E1000_WUS_EX ? "Unicast Packet" : 5695 wus & E1000_WUS_MC ? "Multicast Packet" : 5696 wus & E1000_WUS_BC ? "Broadcast Packet" : 5697 wus & E1000_WUS_MAG ? "Magic Packet" : 5698 wus & E1000_WUS_LNKC ? "Link Status Change" : 5699 "other"); 5700 } 5701 ew32(WUS, ~0); 5702 } 5703 5704 e1000e_reset(adapter); 5705 5706 e1000_init_manageability_pt(adapter); 5707 5708 if (netif_running(netdev)) 5709 e1000e_up(adapter); 5710 5711 netif_device_attach(netdev); 5712 5713 /* 5714 * If the controller has AMT, do not set DRV_LOAD until the interface 5715 * is up. For all other cases, let the f/w know that the h/w is now 5716 * under the control of the driver. 5717 */ 5718 if (!(adapter->flags & FLAG_HAS_AMT)) 5719 e1000e_get_hw_control(adapter); 5720 5721 return 0; 5722 } 5723 5724 #ifdef CONFIG_PM_SLEEP 5725 static int e1000_suspend(struct device *dev) 5726 { 5727 struct pci_dev *pdev = to_pci_dev(dev); 5728 int retval; 5729 bool wake; 5730 5731 retval = __e1000_shutdown(pdev, &wake, false); 5732 if (!retval) 5733 e1000_complete_shutdown(pdev, true, wake); 5734 5735 return retval; 5736 } 5737 5738 static int e1000_resume(struct device *dev) 5739 { 5740 struct pci_dev *pdev = to_pci_dev(dev); 5741 struct net_device *netdev = pci_get_drvdata(pdev); 5742 struct e1000_adapter *adapter = netdev_priv(netdev); 5743 5744 if (e1000e_pm_ready(adapter)) 5745 adapter->idle_check = true; 5746 5747 return __e1000_resume(pdev); 5748 } 5749 #endif /* CONFIG_PM_SLEEP */ 5750 5751 #ifdef CONFIG_PM_RUNTIME 5752 static int e1000_runtime_suspend(struct device *dev) 5753 { 5754 struct pci_dev *pdev = to_pci_dev(dev); 5755 struct net_device *netdev = pci_get_drvdata(pdev); 5756 struct e1000_adapter *adapter = netdev_priv(netdev); 5757 5758 if (e1000e_pm_ready(adapter)) { 5759 bool wake; 5760 5761 __e1000_shutdown(pdev, &wake, true); 5762 } 5763 5764 return 0; 5765 } 5766 5767 static int e1000_idle(struct device *dev) 5768 { 5769 struct pci_dev *pdev = to_pci_dev(dev); 5770 struct net_device *netdev = pci_get_drvdata(pdev); 5771 struct e1000_adapter *adapter = netdev_priv(netdev); 5772 5773 if (!e1000e_pm_ready(adapter)) 5774 return 0; 5775 5776 if (adapter->idle_check) { 5777 adapter->idle_check = false; 5778 if (!e1000e_has_link(adapter)) 5779 pm_schedule_suspend(dev, MSEC_PER_SEC); 5780 } 5781 5782 return -EBUSY; 5783 } 5784 5785 static int e1000_runtime_resume(struct device *dev) 5786 { 5787 struct pci_dev *pdev = to_pci_dev(dev); 5788 struct net_device *netdev = pci_get_drvdata(pdev); 5789 struct e1000_adapter *adapter = netdev_priv(netdev); 5790 5791 if (!e1000e_pm_ready(adapter)) 5792 return 0; 5793 5794 adapter->idle_check = !dev->power.runtime_auto; 5795 return __e1000_resume(pdev); 5796 } 5797 #endif /* CONFIG_PM_RUNTIME */ 5798 #endif /* CONFIG_PM */ 5799 5800 static void e1000_shutdown(struct pci_dev *pdev) 5801 { 5802 bool wake = false; 5803 5804 __e1000_shutdown(pdev, &wake, false); 5805 5806 if (system_state == SYSTEM_POWER_OFF) 5807 e1000_complete_shutdown(pdev, false, wake); 5808 } 5809 5810 #ifdef CONFIG_NET_POLL_CONTROLLER 5811 5812 static irqreturn_t e1000_intr_msix(int irq, void *data) 5813 { 5814 struct net_device *netdev = data; 5815 struct e1000_adapter *adapter = netdev_priv(netdev); 5816 5817 if (adapter->msix_entries) { 5818 int vector, msix_irq; 5819 5820 vector = 0; 5821 msix_irq = adapter->msix_entries[vector].vector; 5822 disable_irq(msix_irq); 5823 e1000_intr_msix_rx(msix_irq, netdev); 5824 enable_irq(msix_irq); 5825 5826 vector++; 5827 msix_irq = adapter->msix_entries[vector].vector; 5828 disable_irq(msix_irq); 5829 e1000_intr_msix_tx(msix_irq, netdev); 5830 enable_irq(msix_irq); 5831 5832 vector++; 5833 msix_irq = adapter->msix_entries[vector].vector; 5834 disable_irq(msix_irq); 5835 e1000_msix_other(msix_irq, netdev); 5836 enable_irq(msix_irq); 5837 } 5838 5839 return IRQ_HANDLED; 5840 } 5841 5842 /* 5843 * Polling 'interrupt' - used by things like netconsole to send skbs 5844 * without having to re-enable interrupts. It's not called while 5845 * the interrupt routine is executing. 5846 */ 5847 static void e1000_netpoll(struct net_device *netdev) 5848 { 5849 struct e1000_adapter *adapter = netdev_priv(netdev); 5850 5851 switch (adapter->int_mode) { 5852 case E1000E_INT_MODE_MSIX: 5853 e1000_intr_msix(adapter->pdev->irq, netdev); 5854 break; 5855 case E1000E_INT_MODE_MSI: 5856 disable_irq(adapter->pdev->irq); 5857 e1000_intr_msi(adapter->pdev->irq, netdev); 5858 enable_irq(adapter->pdev->irq); 5859 break; 5860 default: /* E1000E_INT_MODE_LEGACY */ 5861 disable_irq(adapter->pdev->irq); 5862 e1000_intr(adapter->pdev->irq, netdev); 5863 enable_irq(adapter->pdev->irq); 5864 break; 5865 } 5866 } 5867 #endif 5868 5869 /** 5870 * e1000_io_error_detected - called when PCI error is detected 5871 * @pdev: Pointer to PCI device 5872 * @state: The current pci connection state 5873 * 5874 * This function is called after a PCI bus error affecting 5875 * this device has been detected. 5876 */ 5877 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, 5878 pci_channel_state_t state) 5879 { 5880 struct net_device *netdev = pci_get_drvdata(pdev); 5881 struct e1000_adapter *adapter = netdev_priv(netdev); 5882 5883 netif_device_detach(netdev); 5884 5885 if (state == pci_channel_io_perm_failure) 5886 return PCI_ERS_RESULT_DISCONNECT; 5887 5888 if (netif_running(netdev)) 5889 e1000e_down(adapter); 5890 pci_disable_device(pdev); 5891 5892 /* Request a slot slot reset. */ 5893 return PCI_ERS_RESULT_NEED_RESET; 5894 } 5895 5896 /** 5897 * e1000_io_slot_reset - called after the pci bus has been reset. 5898 * @pdev: Pointer to PCI device 5899 * 5900 * Restart the card from scratch, as if from a cold-boot. Implementation 5901 * resembles the first-half of the e1000_resume routine. 5902 */ 5903 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev) 5904 { 5905 struct net_device *netdev = pci_get_drvdata(pdev); 5906 struct e1000_adapter *adapter = netdev_priv(netdev); 5907 struct e1000_hw *hw = &adapter->hw; 5908 u16 aspm_disable_flag = 0; 5909 int err; 5910 pci_ers_result_t result; 5911 5912 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S) 5913 aspm_disable_flag = PCIE_LINK_STATE_L0S; 5914 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1) 5915 aspm_disable_flag |= PCIE_LINK_STATE_L1; 5916 if (aspm_disable_flag) 5917 e1000e_disable_aspm(pdev, aspm_disable_flag); 5918 5919 err = pci_enable_device_mem(pdev); 5920 if (err) { 5921 dev_err(&pdev->dev, 5922 "Cannot re-enable PCI device after reset.\n"); 5923 result = PCI_ERS_RESULT_DISCONNECT; 5924 } else { 5925 pci_set_master(pdev); 5926 pdev->state_saved = true; 5927 pci_restore_state(pdev); 5928 5929 pci_enable_wake(pdev, PCI_D3hot, 0); 5930 pci_enable_wake(pdev, PCI_D3cold, 0); 5931 5932 e1000e_reset(adapter); 5933 ew32(WUS, ~0); 5934 result = PCI_ERS_RESULT_RECOVERED; 5935 } 5936 5937 pci_cleanup_aer_uncorrect_error_status(pdev); 5938 5939 return result; 5940 } 5941 5942 /** 5943 * e1000_io_resume - called when traffic can start flowing again. 5944 * @pdev: Pointer to PCI device 5945 * 5946 * This callback is called when the error recovery driver tells us that 5947 * its OK to resume normal operation. Implementation resembles the 5948 * second-half of the e1000_resume routine. 5949 */ 5950 static void e1000_io_resume(struct pci_dev *pdev) 5951 { 5952 struct net_device *netdev = pci_get_drvdata(pdev); 5953 struct e1000_adapter *adapter = netdev_priv(netdev); 5954 5955 e1000_init_manageability_pt(adapter); 5956 5957 if (netif_running(netdev)) { 5958 if (e1000e_up(adapter)) { 5959 dev_err(&pdev->dev, 5960 "can't bring device back up after reset\n"); 5961 return; 5962 } 5963 } 5964 5965 netif_device_attach(netdev); 5966 5967 /* 5968 * If the controller has AMT, do not set DRV_LOAD until the interface 5969 * is up. For all other cases, let the f/w know that the h/w is now 5970 * under the control of the driver. 5971 */ 5972 if (!(adapter->flags & FLAG_HAS_AMT)) 5973 e1000e_get_hw_control(adapter); 5974 5975 } 5976 5977 static void e1000_print_device_info(struct e1000_adapter *adapter) 5978 { 5979 struct e1000_hw *hw = &adapter->hw; 5980 struct net_device *netdev = adapter->netdev; 5981 u32 ret_val; 5982 u8 pba_str[E1000_PBANUM_LENGTH]; 5983 5984 /* print bus type/speed/width info */ 5985 e_info("(PCI Express:2.5GT/s:%s) %pM\n", 5986 /* bus width */ 5987 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" : 5988 "Width x1"), 5989 /* MAC address */ 5990 netdev->dev_addr); 5991 e_info("Intel(R) PRO/%s Network Connection\n", 5992 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000"); 5993 ret_val = e1000_read_pba_string_generic(hw, pba_str, 5994 E1000_PBANUM_LENGTH); 5995 if (ret_val) 5996 strlcpy((char *)pba_str, "Unknown", sizeof(pba_str)); 5997 e_info("MAC: %d, PHY: %d, PBA No: %s\n", 5998 hw->mac.type, hw->phy.type, pba_str); 5999 } 6000 6001 static void e1000_eeprom_checks(struct e1000_adapter *adapter) 6002 { 6003 struct e1000_hw *hw = &adapter->hw; 6004 int ret_val; 6005 u16 buf = 0; 6006 6007 if (hw->mac.type != e1000_82573) 6008 return; 6009 6010 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf); 6011 le16_to_cpus(&buf); 6012 if (!ret_val && (!(buf & (1 << 0)))) { 6013 /* Deep Smart Power Down (DSPD) */ 6014 dev_warn(&adapter->pdev->dev, 6015 "Warning: detected DSPD enabled in EEPROM\n"); 6016 } 6017 } 6018 6019 static int e1000_set_features(struct net_device *netdev, 6020 netdev_features_t features) 6021 { 6022 struct e1000_adapter *adapter = netdev_priv(netdev); 6023 netdev_features_t changed = features ^ netdev->features; 6024 6025 if (changed & (NETIF_F_TSO | NETIF_F_TSO6)) 6026 adapter->flags |= FLAG_TSO_FORCE; 6027 6028 if (!(changed & (NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_TX | 6029 NETIF_F_RXCSUM | NETIF_F_RXHASH | NETIF_F_RXFCS | 6030 NETIF_F_RXALL))) 6031 return 0; 6032 6033 /* 6034 * IP payload checksum (enabled with jumbos/packet-split when Rx 6035 * checksum is enabled) and generation of RSS hash is mutually 6036 * exclusive in the hardware. 6037 */ 6038 if (adapter->rx_ps_pages && 6039 (features & NETIF_F_RXCSUM) && (features & NETIF_F_RXHASH)) { 6040 e_err("Enabling both receive checksum offload and receive hashing is not possible with jumbo frames. Disable jumbos or enable only one of the receive offload features.\n"); 6041 return -EINVAL; 6042 } 6043 6044 if (changed & NETIF_F_RXFCS) { 6045 if (features & NETIF_F_RXFCS) { 6046 adapter->flags2 &= ~FLAG2_CRC_STRIPPING; 6047 } else { 6048 /* We need to take it back to defaults, which might mean 6049 * stripping is still disabled at the adapter level. 6050 */ 6051 if (adapter->flags2 & FLAG2_DFLT_CRC_STRIPPING) 6052 adapter->flags2 |= FLAG2_CRC_STRIPPING; 6053 else 6054 adapter->flags2 &= ~FLAG2_CRC_STRIPPING; 6055 } 6056 } 6057 6058 netdev->features = features; 6059 6060 if (netif_running(netdev)) 6061 e1000e_reinit_locked(adapter); 6062 else 6063 e1000e_reset(adapter); 6064 6065 return 0; 6066 } 6067 6068 static const struct net_device_ops e1000e_netdev_ops = { 6069 .ndo_open = e1000_open, 6070 .ndo_stop = e1000_close, 6071 .ndo_start_xmit = e1000_xmit_frame, 6072 .ndo_get_stats64 = e1000e_get_stats64, 6073 .ndo_set_rx_mode = e1000e_set_rx_mode, 6074 .ndo_set_mac_address = e1000_set_mac, 6075 .ndo_change_mtu = e1000_change_mtu, 6076 .ndo_do_ioctl = e1000_ioctl, 6077 .ndo_tx_timeout = e1000_tx_timeout, 6078 .ndo_validate_addr = eth_validate_addr, 6079 6080 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid, 6081 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid, 6082 #ifdef CONFIG_NET_POLL_CONTROLLER 6083 .ndo_poll_controller = e1000_netpoll, 6084 #endif 6085 .ndo_set_features = e1000_set_features, 6086 }; 6087 6088 /** 6089 * e1000_probe - Device Initialization Routine 6090 * @pdev: PCI device information struct 6091 * @ent: entry in e1000_pci_tbl 6092 * 6093 * Returns 0 on success, negative on failure 6094 * 6095 * e1000_probe initializes an adapter identified by a pci_dev structure. 6096 * The OS initialization, configuring of the adapter private structure, 6097 * and a hardware reset occur. 6098 **/ 6099 static int __devinit e1000_probe(struct pci_dev *pdev, 6100 const struct pci_device_id *ent) 6101 { 6102 struct net_device *netdev; 6103 struct e1000_adapter *adapter; 6104 struct e1000_hw *hw; 6105 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data]; 6106 resource_size_t mmio_start, mmio_len; 6107 resource_size_t flash_start, flash_len; 6108 static int cards_found; 6109 u16 aspm_disable_flag = 0; 6110 int i, err, pci_using_dac; 6111 u16 eeprom_data = 0; 6112 u16 eeprom_apme_mask = E1000_EEPROM_APME; 6113 6114 if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S) 6115 aspm_disable_flag = PCIE_LINK_STATE_L0S; 6116 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1) 6117 aspm_disable_flag |= PCIE_LINK_STATE_L1; 6118 if (aspm_disable_flag) 6119 e1000e_disable_aspm(pdev, aspm_disable_flag); 6120 6121 err = pci_enable_device_mem(pdev); 6122 if (err) 6123 return err; 6124 6125 pci_using_dac = 0; 6126 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)); 6127 if (!err) { 6128 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64)); 6129 if (!err) 6130 pci_using_dac = 1; 6131 } else { 6132 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); 6133 if (err) { 6134 err = dma_set_coherent_mask(&pdev->dev, 6135 DMA_BIT_MASK(32)); 6136 if (err) { 6137 dev_err(&pdev->dev, "No usable DMA configuration, aborting\n"); 6138 goto err_dma; 6139 } 6140 } 6141 } 6142 6143 err = pci_request_selected_regions_exclusive(pdev, 6144 pci_select_bars(pdev, IORESOURCE_MEM), 6145 e1000e_driver_name); 6146 if (err) 6147 goto err_pci_reg; 6148 6149 /* AER (Advanced Error Reporting) hooks */ 6150 pci_enable_pcie_error_reporting(pdev); 6151 6152 pci_set_master(pdev); 6153 /* PCI config space info */ 6154 err = pci_save_state(pdev); 6155 if (err) 6156 goto err_alloc_etherdev; 6157 6158 err = -ENOMEM; 6159 netdev = alloc_etherdev(sizeof(struct e1000_adapter)); 6160 if (!netdev) 6161 goto err_alloc_etherdev; 6162 6163 SET_NETDEV_DEV(netdev, &pdev->dev); 6164 6165 netdev->irq = pdev->irq; 6166 6167 pci_set_drvdata(pdev, netdev); 6168 adapter = netdev_priv(netdev); 6169 hw = &adapter->hw; 6170 adapter->netdev = netdev; 6171 adapter->pdev = pdev; 6172 adapter->ei = ei; 6173 adapter->pba = ei->pba; 6174 adapter->flags = ei->flags; 6175 adapter->flags2 = ei->flags2; 6176 adapter->hw.adapter = adapter; 6177 adapter->hw.mac.type = ei->mac; 6178 adapter->max_hw_frame_size = ei->max_hw_frame_size; 6179 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE); 6180 6181 mmio_start = pci_resource_start(pdev, 0); 6182 mmio_len = pci_resource_len(pdev, 0); 6183 6184 err = -EIO; 6185 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len); 6186 if (!adapter->hw.hw_addr) 6187 goto err_ioremap; 6188 6189 if ((adapter->flags & FLAG_HAS_FLASH) && 6190 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) { 6191 flash_start = pci_resource_start(pdev, 1); 6192 flash_len = pci_resource_len(pdev, 1); 6193 adapter->hw.flash_address = ioremap(flash_start, flash_len); 6194 if (!adapter->hw.flash_address) 6195 goto err_flashmap; 6196 } 6197 6198 /* construct the net_device struct */ 6199 netdev->netdev_ops = &e1000e_netdev_ops; 6200 e1000e_set_ethtool_ops(netdev); 6201 netdev->watchdog_timeo = 5 * HZ; 6202 netif_napi_add(netdev, &adapter->napi, e1000e_poll, 64); 6203 strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name)); 6204 6205 netdev->mem_start = mmio_start; 6206 netdev->mem_end = mmio_start + mmio_len; 6207 6208 adapter->bd_number = cards_found++; 6209 6210 e1000e_check_options(adapter); 6211 6212 /* setup adapter struct */ 6213 err = e1000_sw_init(adapter); 6214 if (err) 6215 goto err_sw_init; 6216 6217 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops)); 6218 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops)); 6219 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops)); 6220 6221 err = ei->get_variants(adapter); 6222 if (err) 6223 goto err_hw_init; 6224 6225 if ((adapter->flags & FLAG_IS_ICH) && 6226 (adapter->flags & FLAG_READ_ONLY_NVM)) 6227 e1000e_write_protect_nvm_ich8lan(&adapter->hw); 6228 6229 hw->mac.ops.get_bus_info(&adapter->hw); 6230 6231 adapter->hw.phy.autoneg_wait_to_complete = 0; 6232 6233 /* Copper options */ 6234 if (adapter->hw.phy.media_type == e1000_media_type_copper) { 6235 adapter->hw.phy.mdix = AUTO_ALL_MODES; 6236 adapter->hw.phy.disable_polarity_correction = 0; 6237 adapter->hw.phy.ms_type = e1000_ms_hw_default; 6238 } 6239 6240 if (hw->phy.ops.check_reset_block(hw)) 6241 e_info("PHY reset is blocked due to SOL/IDER session.\n"); 6242 6243 /* Set initial default active device features */ 6244 netdev->features = (NETIF_F_SG | 6245 NETIF_F_HW_VLAN_RX | 6246 NETIF_F_HW_VLAN_TX | 6247 NETIF_F_TSO | 6248 NETIF_F_TSO6 | 6249 NETIF_F_RXHASH | 6250 NETIF_F_RXCSUM | 6251 NETIF_F_HW_CSUM); 6252 6253 /* Set user-changeable features (subset of all device features) */ 6254 netdev->hw_features = netdev->features; 6255 netdev->hw_features |= NETIF_F_RXFCS; 6256 netdev->priv_flags |= IFF_SUPP_NOFCS; 6257 netdev->hw_features |= NETIF_F_RXALL; 6258 6259 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) 6260 netdev->features |= NETIF_F_HW_VLAN_FILTER; 6261 6262 netdev->vlan_features |= (NETIF_F_SG | 6263 NETIF_F_TSO | 6264 NETIF_F_TSO6 | 6265 NETIF_F_HW_CSUM); 6266 6267 netdev->priv_flags |= IFF_UNICAST_FLT; 6268 6269 if (pci_using_dac) { 6270 netdev->features |= NETIF_F_HIGHDMA; 6271 netdev->vlan_features |= NETIF_F_HIGHDMA; 6272 } 6273 6274 if (e1000e_enable_mng_pass_thru(&adapter->hw)) 6275 adapter->flags |= FLAG_MNG_PT_ENABLED; 6276 6277 /* 6278 * before reading the NVM, reset the controller to 6279 * put the device in a known good starting state 6280 */ 6281 adapter->hw.mac.ops.reset_hw(&adapter->hw); 6282 6283 /* 6284 * systems with ASPM and others may see the checksum fail on the first 6285 * attempt. Let's give it a few tries 6286 */ 6287 for (i = 0;; i++) { 6288 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0) 6289 break; 6290 if (i == 2) { 6291 e_err("The NVM Checksum Is Not Valid\n"); 6292 err = -EIO; 6293 goto err_eeprom; 6294 } 6295 } 6296 6297 e1000_eeprom_checks(adapter); 6298 6299 /* copy the MAC address */ 6300 if (e1000e_read_mac_addr(&adapter->hw)) 6301 e_err("NVM Read Error while reading MAC address\n"); 6302 6303 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len); 6304 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len); 6305 6306 if (!is_valid_ether_addr(netdev->perm_addr)) { 6307 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr); 6308 err = -EIO; 6309 goto err_eeprom; 6310 } 6311 6312 init_timer(&adapter->watchdog_timer); 6313 adapter->watchdog_timer.function = e1000_watchdog; 6314 adapter->watchdog_timer.data = (unsigned long) adapter; 6315 6316 init_timer(&adapter->phy_info_timer); 6317 adapter->phy_info_timer.function = e1000_update_phy_info; 6318 adapter->phy_info_timer.data = (unsigned long) adapter; 6319 6320 INIT_WORK(&adapter->reset_task, e1000_reset_task); 6321 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task); 6322 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround); 6323 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task); 6324 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang); 6325 6326 /* Initialize link parameters. User can change them with ethtool */ 6327 adapter->hw.mac.autoneg = 1; 6328 adapter->fc_autoneg = true; 6329 adapter->hw.fc.requested_mode = e1000_fc_default; 6330 adapter->hw.fc.current_mode = e1000_fc_default; 6331 adapter->hw.phy.autoneg_advertised = 0x2f; 6332 6333 /* ring size defaults */ 6334 adapter->rx_ring->count = 256; 6335 adapter->tx_ring->count = 256; 6336 6337 /* 6338 * Initial Wake on LAN setting - If APM wake is enabled in 6339 * the EEPROM, enable the ACPI Magic Packet filter 6340 */ 6341 if (adapter->flags & FLAG_APME_IN_WUC) { 6342 /* APME bit in EEPROM is mapped to WUC.APME */ 6343 eeprom_data = er32(WUC); 6344 eeprom_apme_mask = E1000_WUC_APME; 6345 if ((hw->mac.type > e1000_ich10lan) && 6346 (eeprom_data & E1000_WUC_PHY_WAKE)) 6347 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP; 6348 } else if (adapter->flags & FLAG_APME_IN_CTRL3) { 6349 if (adapter->flags & FLAG_APME_CHECK_PORT_B && 6350 (adapter->hw.bus.func == 1)) 6351 e1000_read_nvm(&adapter->hw, NVM_INIT_CONTROL3_PORT_B, 6352 1, &eeprom_data); 6353 else 6354 e1000_read_nvm(&adapter->hw, NVM_INIT_CONTROL3_PORT_A, 6355 1, &eeprom_data); 6356 } 6357 6358 /* fetch WoL from EEPROM */ 6359 if (eeprom_data & eeprom_apme_mask) 6360 adapter->eeprom_wol |= E1000_WUFC_MAG; 6361 6362 /* 6363 * now that we have the eeprom settings, apply the special cases 6364 * where the eeprom may be wrong or the board simply won't support 6365 * wake on lan on a particular port 6366 */ 6367 if (!(adapter->flags & FLAG_HAS_WOL)) 6368 adapter->eeprom_wol = 0; 6369 6370 /* initialize the wol settings based on the eeprom settings */ 6371 adapter->wol = adapter->eeprom_wol; 6372 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol); 6373 6374 /* save off EEPROM version number */ 6375 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers); 6376 6377 /* reset the hardware with the new settings */ 6378 e1000e_reset(adapter); 6379 6380 /* 6381 * If the controller has AMT, do not set DRV_LOAD until the interface 6382 * is up. For all other cases, let the f/w know that the h/w is now 6383 * under the control of the driver. 6384 */ 6385 if (!(adapter->flags & FLAG_HAS_AMT)) 6386 e1000e_get_hw_control(adapter); 6387 6388 strlcpy(netdev->name, "eth%d", sizeof(netdev->name)); 6389 err = register_netdev(netdev); 6390 if (err) 6391 goto err_register; 6392 6393 /* carrier off reporting is important to ethtool even BEFORE open */ 6394 netif_carrier_off(netdev); 6395 6396 e1000_print_device_info(adapter); 6397 6398 if (pci_dev_run_wake(pdev)) 6399 pm_runtime_put_noidle(&pdev->dev); 6400 6401 return 0; 6402 6403 err_register: 6404 if (!(adapter->flags & FLAG_HAS_AMT)) 6405 e1000e_release_hw_control(adapter); 6406 err_eeprom: 6407 if (!hw->phy.ops.check_reset_block(hw)) 6408 e1000_phy_hw_reset(&adapter->hw); 6409 err_hw_init: 6410 kfree(adapter->tx_ring); 6411 kfree(adapter->rx_ring); 6412 err_sw_init: 6413 if (adapter->hw.flash_address) 6414 iounmap(adapter->hw.flash_address); 6415 e1000e_reset_interrupt_capability(adapter); 6416 err_flashmap: 6417 iounmap(adapter->hw.hw_addr); 6418 err_ioremap: 6419 free_netdev(netdev); 6420 err_alloc_etherdev: 6421 pci_release_selected_regions(pdev, 6422 pci_select_bars(pdev, IORESOURCE_MEM)); 6423 err_pci_reg: 6424 err_dma: 6425 pci_disable_device(pdev); 6426 return err; 6427 } 6428 6429 /** 6430 * e1000_remove - Device Removal Routine 6431 * @pdev: PCI device information struct 6432 * 6433 * e1000_remove is called by the PCI subsystem to alert the driver 6434 * that it should release a PCI device. The could be caused by a 6435 * Hot-Plug event, or because the driver is going to be removed from 6436 * memory. 6437 **/ 6438 static void __devexit e1000_remove(struct pci_dev *pdev) 6439 { 6440 struct net_device *netdev = pci_get_drvdata(pdev); 6441 struct e1000_adapter *adapter = netdev_priv(netdev); 6442 bool down = test_bit(__E1000_DOWN, &adapter->state); 6443 6444 /* 6445 * The timers may be rescheduled, so explicitly disable them 6446 * from being rescheduled. 6447 */ 6448 if (!down) 6449 set_bit(__E1000_DOWN, &adapter->state); 6450 del_timer_sync(&adapter->watchdog_timer); 6451 del_timer_sync(&adapter->phy_info_timer); 6452 6453 cancel_work_sync(&adapter->reset_task); 6454 cancel_work_sync(&adapter->watchdog_task); 6455 cancel_work_sync(&adapter->downshift_task); 6456 cancel_work_sync(&adapter->update_phy_task); 6457 cancel_work_sync(&adapter->print_hang_task); 6458 6459 if (!(netdev->flags & IFF_UP)) 6460 e1000_power_down_phy(adapter); 6461 6462 /* Don't lie to e1000_close() down the road. */ 6463 if (!down) 6464 clear_bit(__E1000_DOWN, &adapter->state); 6465 unregister_netdev(netdev); 6466 6467 if (pci_dev_run_wake(pdev)) 6468 pm_runtime_get_noresume(&pdev->dev); 6469 6470 /* 6471 * Release control of h/w to f/w. If f/w is AMT enabled, this 6472 * would have already happened in close and is redundant. 6473 */ 6474 e1000e_release_hw_control(adapter); 6475 6476 e1000e_reset_interrupt_capability(adapter); 6477 kfree(adapter->tx_ring); 6478 kfree(adapter->rx_ring); 6479 6480 iounmap(adapter->hw.hw_addr); 6481 if (adapter->hw.flash_address) 6482 iounmap(adapter->hw.flash_address); 6483 pci_release_selected_regions(pdev, 6484 pci_select_bars(pdev, IORESOURCE_MEM)); 6485 6486 free_netdev(netdev); 6487 6488 /* AER disable */ 6489 pci_disable_pcie_error_reporting(pdev); 6490 6491 pci_disable_device(pdev); 6492 } 6493 6494 /* PCI Error Recovery (ERS) */ 6495 static struct pci_error_handlers e1000_err_handler = { 6496 .error_detected = e1000_io_error_detected, 6497 .slot_reset = e1000_io_slot_reset, 6498 .resume = e1000_io_resume, 6499 }; 6500 6501 static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = { 6502 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 }, 6503 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 }, 6504 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 }, 6505 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 }, 6506 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 }, 6507 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 }, 6508 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 }, 6509 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 }, 6510 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 }, 6511 6512 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 }, 6513 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 }, 6514 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 }, 6515 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 }, 6516 6517 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 }, 6518 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 }, 6519 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 }, 6520 6521 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 }, 6522 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 }, 6523 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 }, 6524 6525 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT), 6526 board_80003es2lan }, 6527 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT), 6528 board_80003es2lan }, 6529 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT), 6530 board_80003es2lan }, 6531 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT), 6532 board_80003es2lan }, 6533 6534 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan }, 6535 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan }, 6536 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan }, 6537 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan }, 6538 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan }, 6539 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan }, 6540 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan }, 6541 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan }, 6542 6543 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan }, 6544 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan }, 6545 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan }, 6546 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan }, 6547 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan }, 6548 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan }, 6549 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan }, 6550 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan }, 6551 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan }, 6552 6553 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan }, 6554 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan }, 6555 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan }, 6556 6557 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan }, 6558 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan }, 6559 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan }, 6560 6561 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan }, 6562 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan }, 6563 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan }, 6564 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan }, 6565 6566 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan }, 6567 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan }, 6568 6569 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt }, 6570 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt }, 6571 6572 { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */ 6573 }; 6574 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl); 6575 6576 #ifdef CONFIG_PM 6577 static const struct dev_pm_ops e1000_pm_ops = { 6578 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume) 6579 SET_RUNTIME_PM_OPS(e1000_runtime_suspend, 6580 e1000_runtime_resume, e1000_idle) 6581 }; 6582 #endif 6583 6584 /* PCI Device API Driver */ 6585 static struct pci_driver e1000_driver = { 6586 .name = e1000e_driver_name, 6587 .id_table = e1000_pci_tbl, 6588 .probe = e1000_probe, 6589 .remove = __devexit_p(e1000_remove), 6590 #ifdef CONFIG_PM 6591 .driver = { 6592 .pm = &e1000_pm_ops, 6593 }, 6594 #endif 6595 .shutdown = e1000_shutdown, 6596 .err_handler = &e1000_err_handler 6597 }; 6598 6599 /** 6600 * e1000_init_module - Driver Registration Routine 6601 * 6602 * e1000_init_module is the first routine called when the driver is 6603 * loaded. All it does is register with the PCI subsystem. 6604 **/ 6605 static int __init e1000_init_module(void) 6606 { 6607 int ret; 6608 pr_info("Intel(R) PRO/1000 Network Driver - %s\n", 6609 e1000e_driver_version); 6610 pr_info("Copyright(c) 1999 - 2012 Intel Corporation.\n"); 6611 ret = pci_register_driver(&e1000_driver); 6612 6613 return ret; 6614 } 6615 module_init(e1000_init_module); 6616 6617 /** 6618 * e1000_exit_module - Driver Exit Cleanup Routine 6619 * 6620 * e1000_exit_module is called just before the driver is removed 6621 * from memory. 6622 **/ 6623 static void __exit e1000_exit_module(void) 6624 { 6625 pci_unregister_driver(&e1000_driver); 6626 } 6627 module_exit(e1000_exit_module); 6628 6629 6630 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); 6631 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver"); 6632 MODULE_LICENSE("GPL"); 6633 MODULE_VERSION(DRV_VERSION); 6634 6635 /* netdev.c */ 6636