1 /******************************************************************************* 2 3 Intel PRO/1000 Linux driver 4 Copyright(c) 1999 - 2012 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, 8 version 2, as published by the Free Software Foundation. 9 10 This program is distributed in the hope it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 You should have received a copy of the GNU General Public License along with 16 this program; if not, write to the Free Software Foundation, Inc., 17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 18 19 The full GNU General Public License is included in this distribution in 20 the file called "COPYING". 21 22 Contact Information: 23 Linux NICS <linux.nics@intel.com> 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 26 27 *******************************************************************************/ 28 29 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 30 31 #include <linux/module.h> 32 #include <linux/types.h> 33 #include <linux/init.h> 34 #include <linux/pci.h> 35 #include <linux/vmalloc.h> 36 #include <linux/pagemap.h> 37 #include <linux/delay.h> 38 #include <linux/netdevice.h> 39 #include <linux/interrupt.h> 40 #include <linux/tcp.h> 41 #include <linux/ipv6.h> 42 #include <linux/slab.h> 43 #include <net/checksum.h> 44 #include <net/ip6_checksum.h> 45 #include <linux/mii.h> 46 #include <linux/ethtool.h> 47 #include <linux/if_vlan.h> 48 #include <linux/cpu.h> 49 #include <linux/smp.h> 50 #include <linux/pm_qos.h> 51 #include <linux/pm_runtime.h> 52 #include <linux/aer.h> 53 #include <linux/prefetch.h> 54 55 #include "e1000.h" 56 57 #define DRV_EXTRAVERSION "-k" 58 59 #define DRV_VERSION "1.9.5" DRV_EXTRAVERSION 60 char e1000e_driver_name[] = "e1000e"; 61 const char e1000e_driver_version[] = DRV_VERSION; 62 63 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state); 64 65 static const struct e1000_info *e1000_info_tbl[] = { 66 [board_82571] = &e1000_82571_info, 67 [board_82572] = &e1000_82572_info, 68 [board_82573] = &e1000_82573_info, 69 [board_82574] = &e1000_82574_info, 70 [board_82583] = &e1000_82583_info, 71 [board_80003es2lan] = &e1000_es2_info, 72 [board_ich8lan] = &e1000_ich8_info, 73 [board_ich9lan] = &e1000_ich9_info, 74 [board_ich10lan] = &e1000_ich10_info, 75 [board_pchlan] = &e1000_pch_info, 76 [board_pch2lan] = &e1000_pch2_info, 77 }; 78 79 struct e1000_reg_info { 80 u32 ofs; 81 char *name; 82 }; 83 84 #define E1000_RDFH 0x02410 /* Rx Data FIFO Head - RW */ 85 #define E1000_RDFT 0x02418 /* Rx Data FIFO Tail - RW */ 86 #define E1000_RDFHS 0x02420 /* Rx Data FIFO Head Saved - RW */ 87 #define E1000_RDFTS 0x02428 /* Rx Data FIFO Tail Saved - RW */ 88 #define E1000_RDFPC 0x02430 /* Rx Data FIFO Packet Count - RW */ 89 90 #define E1000_TDFH 0x03410 /* Tx Data FIFO Head - RW */ 91 #define E1000_TDFT 0x03418 /* Tx Data FIFO Tail - RW */ 92 #define E1000_TDFHS 0x03420 /* Tx Data FIFO Head Saved - RW */ 93 #define E1000_TDFTS 0x03428 /* Tx Data FIFO Tail Saved - RW */ 94 #define E1000_TDFPC 0x03430 /* Tx Data FIFO Packet Count - RW */ 95 96 static const struct e1000_reg_info e1000_reg_info_tbl[] = { 97 98 /* General Registers */ 99 {E1000_CTRL, "CTRL"}, 100 {E1000_STATUS, "STATUS"}, 101 {E1000_CTRL_EXT, "CTRL_EXT"}, 102 103 /* Interrupt Registers */ 104 {E1000_ICR, "ICR"}, 105 106 /* Rx Registers */ 107 {E1000_RCTL, "RCTL"}, 108 {E1000_RDLEN, "RDLEN"}, 109 {E1000_RDH, "RDH"}, 110 {E1000_RDT, "RDT"}, 111 {E1000_RDTR, "RDTR"}, 112 {E1000_RXDCTL(0), "RXDCTL"}, 113 {E1000_ERT, "ERT"}, 114 {E1000_RDBAL, "RDBAL"}, 115 {E1000_RDBAH, "RDBAH"}, 116 {E1000_RDFH, "RDFH"}, 117 {E1000_RDFT, "RDFT"}, 118 {E1000_RDFHS, "RDFHS"}, 119 {E1000_RDFTS, "RDFTS"}, 120 {E1000_RDFPC, "RDFPC"}, 121 122 /* Tx Registers */ 123 {E1000_TCTL, "TCTL"}, 124 {E1000_TDBAL, "TDBAL"}, 125 {E1000_TDBAH, "TDBAH"}, 126 {E1000_TDLEN, "TDLEN"}, 127 {E1000_TDH, "TDH"}, 128 {E1000_TDT, "TDT"}, 129 {E1000_TIDV, "TIDV"}, 130 {E1000_TXDCTL(0), "TXDCTL"}, 131 {E1000_TADV, "TADV"}, 132 {E1000_TARC(0), "TARC"}, 133 {E1000_TDFH, "TDFH"}, 134 {E1000_TDFT, "TDFT"}, 135 {E1000_TDFHS, "TDFHS"}, 136 {E1000_TDFTS, "TDFTS"}, 137 {E1000_TDFPC, "TDFPC"}, 138 139 /* List Terminator */ 140 {0, NULL} 141 }; 142 143 /* 144 * e1000_regdump - register printout routine 145 */ 146 static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo) 147 { 148 int n = 0; 149 char rname[16]; 150 u32 regs[8]; 151 152 switch (reginfo->ofs) { 153 case E1000_RXDCTL(0): 154 for (n = 0; n < 2; n++) 155 regs[n] = __er32(hw, E1000_RXDCTL(n)); 156 break; 157 case E1000_TXDCTL(0): 158 for (n = 0; n < 2; n++) 159 regs[n] = __er32(hw, E1000_TXDCTL(n)); 160 break; 161 case E1000_TARC(0): 162 for (n = 0; n < 2; n++) 163 regs[n] = __er32(hw, E1000_TARC(n)); 164 break; 165 default: 166 pr_info("%-15s %08x\n", 167 reginfo->name, __er32(hw, reginfo->ofs)); 168 return; 169 } 170 171 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]"); 172 pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]); 173 } 174 175 /* 176 * e1000e_dump - Print registers, Tx-ring and Rx-ring 177 */ 178 static void e1000e_dump(struct e1000_adapter *adapter) 179 { 180 struct net_device *netdev = adapter->netdev; 181 struct e1000_hw *hw = &adapter->hw; 182 struct e1000_reg_info *reginfo; 183 struct e1000_ring *tx_ring = adapter->tx_ring; 184 struct e1000_tx_desc *tx_desc; 185 struct my_u0 { 186 __le64 a; 187 __le64 b; 188 } *u0; 189 struct e1000_buffer *buffer_info; 190 struct e1000_ring *rx_ring = adapter->rx_ring; 191 union e1000_rx_desc_packet_split *rx_desc_ps; 192 union e1000_rx_desc_extended *rx_desc; 193 struct my_u1 { 194 __le64 a; 195 __le64 b; 196 __le64 c; 197 __le64 d; 198 } *u1; 199 u32 staterr; 200 int i = 0; 201 202 if (!netif_msg_hw(adapter)) 203 return; 204 205 /* Print netdevice Info */ 206 if (netdev) { 207 dev_info(&adapter->pdev->dev, "Net device Info\n"); 208 pr_info("Device Name state trans_start last_rx\n"); 209 pr_info("%-15s %016lX %016lX %016lX\n", 210 netdev->name, netdev->state, netdev->trans_start, 211 netdev->last_rx); 212 } 213 214 /* Print Registers */ 215 dev_info(&adapter->pdev->dev, "Register Dump\n"); 216 pr_info(" Register Name Value\n"); 217 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl; 218 reginfo->name; reginfo++) { 219 e1000_regdump(hw, reginfo); 220 } 221 222 /* Print Tx Ring Summary */ 223 if (!netdev || !netif_running(netdev)) 224 goto exit; 225 226 dev_info(&adapter->pdev->dev, "Tx Ring Summary\n"); 227 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n"); 228 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean]; 229 pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n", 230 0, tx_ring->next_to_use, tx_ring->next_to_clean, 231 (unsigned long long)buffer_info->dma, 232 buffer_info->length, 233 buffer_info->next_to_watch, 234 (unsigned long long)buffer_info->time_stamp); 235 236 /* Print Tx Ring */ 237 if (!netif_msg_tx_done(adapter)) 238 goto rx_ring_summary; 239 240 dev_info(&adapter->pdev->dev, "Tx Ring Dump\n"); 241 242 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended) 243 * 244 * Legacy Transmit Descriptor 245 * +--------------------------------------------------------------+ 246 * 0 | Buffer Address [63:0] (Reserved on Write Back) | 247 * +--------------------------------------------------------------+ 248 * 8 | Special | CSS | Status | CMD | CSO | Length | 249 * +--------------------------------------------------------------+ 250 * 63 48 47 36 35 32 31 24 23 16 15 0 251 * 252 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload 253 * 63 48 47 40 39 32 31 16 15 8 7 0 254 * +----------------------------------------------------------------+ 255 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS | 256 * +----------------------------------------------------------------+ 257 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN | 258 * +----------------------------------------------------------------+ 259 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0 260 * 261 * Extended Data Descriptor (DTYP=0x1) 262 * +----------------------------------------------------------------+ 263 * 0 | Buffer Address [63:0] | 264 * +----------------------------------------------------------------+ 265 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN | 266 * +----------------------------------------------------------------+ 267 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0 268 */ 269 pr_info("Tl[desc] [address 63:0 ] [SpeCssSCmCsLen] [bi->dma ] leng ntw timestamp bi->skb <-- Legacy format\n"); 270 pr_info("Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Context format\n"); 271 pr_info("Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Data format\n"); 272 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) { 273 const char *next_desc; 274 tx_desc = E1000_TX_DESC(*tx_ring, i); 275 buffer_info = &tx_ring->buffer_info[i]; 276 u0 = (struct my_u0 *)tx_desc; 277 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean) 278 next_desc = " NTC/U"; 279 else if (i == tx_ring->next_to_use) 280 next_desc = " NTU"; 281 else if (i == tx_ring->next_to_clean) 282 next_desc = " NTC"; 283 else 284 next_desc = ""; 285 pr_info("T%c[0x%03X] %016llX %016llX %016llX %04X %3X %016llX %p%s\n", 286 (!(le64_to_cpu(u0->b) & (1 << 29)) ? 'l' : 287 ((le64_to_cpu(u0->b) & (1 << 20)) ? 'd' : 'c')), 288 i, 289 (unsigned long long)le64_to_cpu(u0->a), 290 (unsigned long long)le64_to_cpu(u0->b), 291 (unsigned long long)buffer_info->dma, 292 buffer_info->length, buffer_info->next_to_watch, 293 (unsigned long long)buffer_info->time_stamp, 294 buffer_info->skb, next_desc); 295 296 if (netif_msg_pktdata(adapter) && buffer_info->dma != 0) 297 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS, 298 16, 1, phys_to_virt(buffer_info->dma), 299 buffer_info->length, true); 300 } 301 302 /* Print Rx Ring Summary */ 303 rx_ring_summary: 304 dev_info(&adapter->pdev->dev, "Rx Ring Summary\n"); 305 pr_info("Queue [NTU] [NTC]\n"); 306 pr_info(" %5d %5X %5X\n", 307 0, rx_ring->next_to_use, rx_ring->next_to_clean); 308 309 /* Print Rx Ring */ 310 if (!netif_msg_rx_status(adapter)) 311 goto exit; 312 313 dev_info(&adapter->pdev->dev, "Rx Ring Dump\n"); 314 switch (adapter->rx_ps_pages) { 315 case 1: 316 case 2: 317 case 3: 318 /* [Extended] Packet Split Receive Descriptor Format 319 * 320 * +-----------------------------------------------------+ 321 * 0 | Buffer Address 0 [63:0] | 322 * +-----------------------------------------------------+ 323 * 8 | Buffer Address 1 [63:0] | 324 * +-----------------------------------------------------+ 325 * 16 | Buffer Address 2 [63:0] | 326 * +-----------------------------------------------------+ 327 * 24 | Buffer Address 3 [63:0] | 328 * +-----------------------------------------------------+ 329 */ 330 pr_info("R [desc] [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] [bi->skb] <-- Ext Pkt Split format\n"); 331 /* [Extended] Receive Descriptor (Write-Back) Format 332 * 333 * 63 48 47 32 31 13 12 8 7 4 3 0 334 * +------------------------------------------------------+ 335 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS | 336 * | Checksum | Ident | | Queue | | Type | 337 * +------------------------------------------------------+ 338 * 8 | VLAN Tag | Length | Extended Error | Extended Status | 339 * +------------------------------------------------------+ 340 * 63 48 47 32 31 20 19 0 341 */ 342 pr_info("RWB[desc] [ck ipid mrqhsh] [vl l0 ee es] [ l3 l2 l1 hs] [reserved ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n"); 343 for (i = 0; i < rx_ring->count; i++) { 344 const char *next_desc; 345 buffer_info = &rx_ring->buffer_info[i]; 346 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i); 347 u1 = (struct my_u1 *)rx_desc_ps; 348 staterr = 349 le32_to_cpu(rx_desc_ps->wb.middle.status_error); 350 351 if (i == rx_ring->next_to_use) 352 next_desc = " NTU"; 353 else if (i == rx_ring->next_to_clean) 354 next_desc = " NTC"; 355 else 356 next_desc = ""; 357 358 if (staterr & E1000_RXD_STAT_DD) { 359 /* Descriptor Done */ 360 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX ---------------- %p%s\n", 361 "RWB", i, 362 (unsigned long long)le64_to_cpu(u1->a), 363 (unsigned long long)le64_to_cpu(u1->b), 364 (unsigned long long)le64_to_cpu(u1->c), 365 (unsigned long long)le64_to_cpu(u1->d), 366 buffer_info->skb, next_desc); 367 } else { 368 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX %016llX %p%s\n", 369 "R ", i, 370 (unsigned long long)le64_to_cpu(u1->a), 371 (unsigned long long)le64_to_cpu(u1->b), 372 (unsigned long long)le64_to_cpu(u1->c), 373 (unsigned long long)le64_to_cpu(u1->d), 374 (unsigned long long)buffer_info->dma, 375 buffer_info->skb, next_desc); 376 377 if (netif_msg_pktdata(adapter)) 378 print_hex_dump(KERN_INFO, "", 379 DUMP_PREFIX_ADDRESS, 16, 1, 380 phys_to_virt(buffer_info->dma), 381 adapter->rx_ps_bsize0, true); 382 } 383 } 384 break; 385 default: 386 case 0: 387 /* Extended Receive Descriptor (Read) Format 388 * 389 * +-----------------------------------------------------+ 390 * 0 | Buffer Address [63:0] | 391 * +-----------------------------------------------------+ 392 * 8 | Reserved | 393 * +-----------------------------------------------------+ 394 */ 395 pr_info("R [desc] [buf addr 63:0 ] [reserved 63:0 ] [bi->dma ] [bi->skb] <-- Ext (Read) format\n"); 396 /* Extended Receive Descriptor (Write-Back) Format 397 * 398 * 63 48 47 32 31 24 23 4 3 0 399 * +------------------------------------------------------+ 400 * | RSS Hash | | | | 401 * 0 +-------------------+ Rsvd | Reserved | MRQ RSS | 402 * | Packet | IP | | | Type | 403 * | Checksum | Ident | | | | 404 * +------------------------------------------------------+ 405 * 8 | VLAN Tag | Length | Extended Error | Extended Status | 406 * +------------------------------------------------------+ 407 * 63 48 47 32 31 20 19 0 408 */ 409 pr_info("RWB[desc] [cs ipid mrq] [vt ln xe xs] [bi->skb] <-- Ext (Write-Back) format\n"); 410 411 for (i = 0; i < rx_ring->count; i++) { 412 const char *next_desc; 413 414 buffer_info = &rx_ring->buffer_info[i]; 415 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); 416 u1 = (struct my_u1 *)rx_desc; 417 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 418 419 if (i == rx_ring->next_to_use) 420 next_desc = " NTU"; 421 else if (i == rx_ring->next_to_clean) 422 next_desc = " NTC"; 423 else 424 next_desc = ""; 425 426 if (staterr & E1000_RXD_STAT_DD) { 427 /* Descriptor Done */ 428 pr_info("%s[0x%03X] %016llX %016llX ---------------- %p%s\n", 429 "RWB", i, 430 (unsigned long long)le64_to_cpu(u1->a), 431 (unsigned long long)le64_to_cpu(u1->b), 432 buffer_info->skb, next_desc); 433 } else { 434 pr_info("%s[0x%03X] %016llX %016llX %016llX %p%s\n", 435 "R ", i, 436 (unsigned long long)le64_to_cpu(u1->a), 437 (unsigned long long)le64_to_cpu(u1->b), 438 (unsigned long long)buffer_info->dma, 439 buffer_info->skb, next_desc); 440 441 if (netif_msg_pktdata(adapter)) 442 print_hex_dump(KERN_INFO, "", 443 DUMP_PREFIX_ADDRESS, 16, 444 1, 445 phys_to_virt 446 (buffer_info->dma), 447 adapter->rx_buffer_len, 448 true); 449 } 450 } 451 } 452 453 exit: 454 return; 455 } 456 457 /** 458 * e1000_desc_unused - calculate if we have unused descriptors 459 **/ 460 static int e1000_desc_unused(struct e1000_ring *ring) 461 { 462 if (ring->next_to_clean > ring->next_to_use) 463 return ring->next_to_clean - ring->next_to_use - 1; 464 465 return ring->count + ring->next_to_clean - ring->next_to_use - 1; 466 } 467 468 /** 469 * e1000_receive_skb - helper function to handle Rx indications 470 * @adapter: board private structure 471 * @status: descriptor status field as written by hardware 472 * @vlan: descriptor vlan field as written by hardware (no le/be conversion) 473 * @skb: pointer to sk_buff to be indicated to stack 474 **/ 475 static void e1000_receive_skb(struct e1000_adapter *adapter, 476 struct net_device *netdev, struct sk_buff *skb, 477 u8 status, __le16 vlan) 478 { 479 u16 tag = le16_to_cpu(vlan); 480 skb->protocol = eth_type_trans(skb, netdev); 481 482 if (status & E1000_RXD_STAT_VP) 483 __vlan_hwaccel_put_tag(skb, tag); 484 485 napi_gro_receive(&adapter->napi, skb); 486 } 487 488 /** 489 * e1000_rx_checksum - Receive Checksum Offload 490 * @adapter: board private structure 491 * @status_err: receive descriptor status and error fields 492 * @csum: receive descriptor csum field 493 * @sk_buff: socket buffer with received data 494 **/ 495 static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err, 496 __le16 csum, struct sk_buff *skb) 497 { 498 u16 status = (u16)status_err; 499 u8 errors = (u8)(status_err >> 24); 500 501 skb_checksum_none_assert(skb); 502 503 /* Rx checksum disabled */ 504 if (!(adapter->netdev->features & NETIF_F_RXCSUM)) 505 return; 506 507 /* Ignore Checksum bit is set */ 508 if (status & E1000_RXD_STAT_IXSM) 509 return; 510 511 /* TCP/UDP checksum error bit is set */ 512 if (errors & E1000_RXD_ERR_TCPE) { 513 /* let the stack verify checksum errors */ 514 adapter->hw_csum_err++; 515 return; 516 } 517 518 /* TCP/UDP Checksum has not been calculated */ 519 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))) 520 return; 521 522 /* It must be a TCP or UDP packet with a valid checksum */ 523 if (status & E1000_RXD_STAT_TCPCS) { 524 /* TCP checksum is good */ 525 skb->ip_summed = CHECKSUM_UNNECESSARY; 526 } else { 527 /* 528 * IP fragment with UDP payload 529 * Hardware complements the payload checksum, so we undo it 530 * and then put the value in host order for further stack use. 531 */ 532 __sum16 sum = (__force __sum16)swab16((__force u16)csum); 533 skb->csum = csum_unfold(~sum); 534 skb->ip_summed = CHECKSUM_COMPLETE; 535 } 536 adapter->hw_csum_good++; 537 } 538 539 /** 540 * e1000e_update_tail_wa - helper function for e1000e_update_[rt]dt_wa() 541 * @hw: pointer to the HW structure 542 * @tail: address of tail descriptor register 543 * @i: value to write to tail descriptor register 544 * 545 * When updating the tail register, the ME could be accessing Host CSR 546 * registers at the same time. Normally, this is handled in h/w by an 547 * arbiter but on some parts there is a bug that acknowledges Host accesses 548 * later than it should which could result in the descriptor register to 549 * have an incorrect value. Workaround this by checking the FWSM register 550 * which has bit 24 set while ME is accessing Host CSR registers, wait 551 * if it is set and try again a number of times. 552 **/ 553 static inline s32 e1000e_update_tail_wa(struct e1000_hw *hw, void __iomem *tail, 554 unsigned int i) 555 { 556 unsigned int j = 0; 557 558 while ((j++ < E1000_ICH_FWSM_PCIM2PCI_COUNT) && 559 (er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI)) 560 udelay(50); 561 562 writel(i, tail); 563 564 if ((j == E1000_ICH_FWSM_PCIM2PCI_COUNT) && (i != readl(tail))) 565 return E1000_ERR_SWFW_SYNC; 566 567 return 0; 568 } 569 570 static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i) 571 { 572 struct e1000_adapter *adapter = rx_ring->adapter; 573 struct e1000_hw *hw = &adapter->hw; 574 575 if (e1000e_update_tail_wa(hw, rx_ring->tail, i)) { 576 u32 rctl = er32(RCTL); 577 ew32(RCTL, rctl & ~E1000_RCTL_EN); 578 e_err("ME firmware caused invalid RDT - resetting\n"); 579 schedule_work(&adapter->reset_task); 580 } 581 } 582 583 static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i) 584 { 585 struct e1000_adapter *adapter = tx_ring->adapter; 586 struct e1000_hw *hw = &adapter->hw; 587 588 if (e1000e_update_tail_wa(hw, tx_ring->tail, i)) { 589 u32 tctl = er32(TCTL); 590 ew32(TCTL, tctl & ~E1000_TCTL_EN); 591 e_err("ME firmware caused invalid TDT - resetting\n"); 592 schedule_work(&adapter->reset_task); 593 } 594 } 595 596 /** 597 * e1000_alloc_rx_buffers - Replace used receive buffers 598 * @rx_ring: Rx descriptor ring 599 **/ 600 static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring, 601 int cleaned_count, gfp_t gfp) 602 { 603 struct e1000_adapter *adapter = rx_ring->adapter; 604 struct net_device *netdev = adapter->netdev; 605 struct pci_dev *pdev = adapter->pdev; 606 union e1000_rx_desc_extended *rx_desc; 607 struct e1000_buffer *buffer_info; 608 struct sk_buff *skb; 609 unsigned int i; 610 unsigned int bufsz = adapter->rx_buffer_len; 611 612 i = rx_ring->next_to_use; 613 buffer_info = &rx_ring->buffer_info[i]; 614 615 while (cleaned_count--) { 616 skb = buffer_info->skb; 617 if (skb) { 618 skb_trim(skb, 0); 619 goto map_skb; 620 } 621 622 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp); 623 if (!skb) { 624 /* Better luck next round */ 625 adapter->alloc_rx_buff_failed++; 626 break; 627 } 628 629 buffer_info->skb = skb; 630 map_skb: 631 buffer_info->dma = dma_map_single(&pdev->dev, skb->data, 632 adapter->rx_buffer_len, 633 DMA_FROM_DEVICE); 634 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) { 635 dev_err(&pdev->dev, "Rx DMA map failed\n"); 636 adapter->rx_dma_failed++; 637 break; 638 } 639 640 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); 641 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma); 642 643 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) { 644 /* 645 * Force memory writes to complete before letting h/w 646 * know there are new descriptors to fetch. (Only 647 * applicable for weak-ordered memory model archs, 648 * such as IA-64). 649 */ 650 wmb(); 651 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) 652 e1000e_update_rdt_wa(rx_ring, i); 653 else 654 writel(i, rx_ring->tail); 655 } 656 i++; 657 if (i == rx_ring->count) 658 i = 0; 659 buffer_info = &rx_ring->buffer_info[i]; 660 } 661 662 rx_ring->next_to_use = i; 663 } 664 665 /** 666 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split 667 * @rx_ring: Rx descriptor ring 668 **/ 669 static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring, 670 int cleaned_count, gfp_t gfp) 671 { 672 struct e1000_adapter *adapter = rx_ring->adapter; 673 struct net_device *netdev = adapter->netdev; 674 struct pci_dev *pdev = adapter->pdev; 675 union e1000_rx_desc_packet_split *rx_desc; 676 struct e1000_buffer *buffer_info; 677 struct e1000_ps_page *ps_page; 678 struct sk_buff *skb; 679 unsigned int i, j; 680 681 i = rx_ring->next_to_use; 682 buffer_info = &rx_ring->buffer_info[i]; 683 684 while (cleaned_count--) { 685 rx_desc = E1000_RX_DESC_PS(*rx_ring, i); 686 687 for (j = 0; j < PS_PAGE_BUFFERS; j++) { 688 ps_page = &buffer_info->ps_pages[j]; 689 if (j >= adapter->rx_ps_pages) { 690 /* all unused desc entries get hw null ptr */ 691 rx_desc->read.buffer_addr[j + 1] = 692 ~cpu_to_le64(0); 693 continue; 694 } 695 if (!ps_page->page) { 696 ps_page->page = alloc_page(gfp); 697 if (!ps_page->page) { 698 adapter->alloc_rx_buff_failed++; 699 goto no_buffers; 700 } 701 ps_page->dma = dma_map_page(&pdev->dev, 702 ps_page->page, 703 0, PAGE_SIZE, 704 DMA_FROM_DEVICE); 705 if (dma_mapping_error(&pdev->dev, 706 ps_page->dma)) { 707 dev_err(&adapter->pdev->dev, 708 "Rx DMA page map failed\n"); 709 adapter->rx_dma_failed++; 710 goto no_buffers; 711 } 712 } 713 /* 714 * Refresh the desc even if buffer_addrs 715 * didn't change because each write-back 716 * erases this info. 717 */ 718 rx_desc->read.buffer_addr[j + 1] = 719 cpu_to_le64(ps_page->dma); 720 } 721 722 skb = __netdev_alloc_skb_ip_align(netdev, 723 adapter->rx_ps_bsize0, 724 gfp); 725 726 if (!skb) { 727 adapter->alloc_rx_buff_failed++; 728 break; 729 } 730 731 buffer_info->skb = skb; 732 buffer_info->dma = dma_map_single(&pdev->dev, skb->data, 733 adapter->rx_ps_bsize0, 734 DMA_FROM_DEVICE); 735 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) { 736 dev_err(&pdev->dev, "Rx DMA map failed\n"); 737 adapter->rx_dma_failed++; 738 /* cleanup skb */ 739 dev_kfree_skb_any(skb); 740 buffer_info->skb = NULL; 741 break; 742 } 743 744 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma); 745 746 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) { 747 /* 748 * Force memory writes to complete before letting h/w 749 * know there are new descriptors to fetch. (Only 750 * applicable for weak-ordered memory model archs, 751 * such as IA-64). 752 */ 753 wmb(); 754 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) 755 e1000e_update_rdt_wa(rx_ring, i << 1); 756 else 757 writel(i << 1, rx_ring->tail); 758 } 759 760 i++; 761 if (i == rx_ring->count) 762 i = 0; 763 buffer_info = &rx_ring->buffer_info[i]; 764 } 765 766 no_buffers: 767 rx_ring->next_to_use = i; 768 } 769 770 /** 771 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers 772 * @rx_ring: Rx descriptor ring 773 * @cleaned_count: number of buffers to allocate this pass 774 **/ 775 776 static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring, 777 int cleaned_count, gfp_t gfp) 778 { 779 struct e1000_adapter *adapter = rx_ring->adapter; 780 struct net_device *netdev = adapter->netdev; 781 struct pci_dev *pdev = adapter->pdev; 782 union e1000_rx_desc_extended *rx_desc; 783 struct e1000_buffer *buffer_info; 784 struct sk_buff *skb; 785 unsigned int i; 786 unsigned int bufsz = 256 - 16 /* for skb_reserve */; 787 788 i = rx_ring->next_to_use; 789 buffer_info = &rx_ring->buffer_info[i]; 790 791 while (cleaned_count--) { 792 skb = buffer_info->skb; 793 if (skb) { 794 skb_trim(skb, 0); 795 goto check_page; 796 } 797 798 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp); 799 if (unlikely(!skb)) { 800 /* Better luck next round */ 801 adapter->alloc_rx_buff_failed++; 802 break; 803 } 804 805 buffer_info->skb = skb; 806 check_page: 807 /* allocate a new page if necessary */ 808 if (!buffer_info->page) { 809 buffer_info->page = alloc_page(gfp); 810 if (unlikely(!buffer_info->page)) { 811 adapter->alloc_rx_buff_failed++; 812 break; 813 } 814 } 815 816 if (!buffer_info->dma) 817 buffer_info->dma = dma_map_page(&pdev->dev, 818 buffer_info->page, 0, 819 PAGE_SIZE, 820 DMA_FROM_DEVICE); 821 822 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); 823 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma); 824 825 if (unlikely(++i == rx_ring->count)) 826 i = 0; 827 buffer_info = &rx_ring->buffer_info[i]; 828 } 829 830 if (likely(rx_ring->next_to_use != i)) { 831 rx_ring->next_to_use = i; 832 if (unlikely(i-- == 0)) 833 i = (rx_ring->count - 1); 834 835 /* Force memory writes to complete before letting h/w 836 * know there are new descriptors to fetch. (Only 837 * applicable for weak-ordered memory model archs, 838 * such as IA-64). */ 839 wmb(); 840 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) 841 e1000e_update_rdt_wa(rx_ring, i); 842 else 843 writel(i, rx_ring->tail); 844 } 845 } 846 847 static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss, 848 struct sk_buff *skb) 849 { 850 if (netdev->features & NETIF_F_RXHASH) 851 skb->rxhash = le32_to_cpu(rss); 852 } 853 854 /** 855 * e1000_clean_rx_irq - Send received data up the network stack 856 * @rx_ring: Rx descriptor ring 857 * 858 * the return value indicates whether actual cleaning was done, there 859 * is no guarantee that everything was cleaned 860 **/ 861 static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done, 862 int work_to_do) 863 { 864 struct e1000_adapter *adapter = rx_ring->adapter; 865 struct net_device *netdev = adapter->netdev; 866 struct pci_dev *pdev = adapter->pdev; 867 struct e1000_hw *hw = &adapter->hw; 868 union e1000_rx_desc_extended *rx_desc, *next_rxd; 869 struct e1000_buffer *buffer_info, *next_buffer; 870 u32 length, staterr; 871 unsigned int i; 872 int cleaned_count = 0; 873 bool cleaned = false; 874 unsigned int total_rx_bytes = 0, total_rx_packets = 0; 875 876 i = rx_ring->next_to_clean; 877 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); 878 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 879 buffer_info = &rx_ring->buffer_info[i]; 880 881 while (staterr & E1000_RXD_STAT_DD) { 882 struct sk_buff *skb; 883 884 if (*work_done >= work_to_do) 885 break; 886 (*work_done)++; 887 rmb(); /* read descriptor and rx_buffer_info after status DD */ 888 889 skb = buffer_info->skb; 890 buffer_info->skb = NULL; 891 892 prefetch(skb->data - NET_IP_ALIGN); 893 894 i++; 895 if (i == rx_ring->count) 896 i = 0; 897 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i); 898 prefetch(next_rxd); 899 900 next_buffer = &rx_ring->buffer_info[i]; 901 902 cleaned = true; 903 cleaned_count++; 904 dma_unmap_single(&pdev->dev, 905 buffer_info->dma, 906 adapter->rx_buffer_len, 907 DMA_FROM_DEVICE); 908 buffer_info->dma = 0; 909 910 length = le16_to_cpu(rx_desc->wb.upper.length); 911 912 /* 913 * !EOP means multiple descriptors were used to store a single 914 * packet, if that's the case we need to toss it. In fact, we 915 * need to toss every packet with the EOP bit clear and the 916 * next frame that _does_ have the EOP bit set, as it is by 917 * definition only a frame fragment 918 */ 919 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) 920 adapter->flags2 |= FLAG2_IS_DISCARDING; 921 922 if (adapter->flags2 & FLAG2_IS_DISCARDING) { 923 /* All receives must fit into a single buffer */ 924 e_dbg("Receive packet consumed multiple buffers\n"); 925 /* recycle */ 926 buffer_info->skb = skb; 927 if (staterr & E1000_RXD_STAT_EOP) 928 adapter->flags2 &= ~FLAG2_IS_DISCARDING; 929 goto next_desc; 930 } 931 932 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) { 933 /* recycle */ 934 buffer_info->skb = skb; 935 goto next_desc; 936 } 937 938 /* adjust length to remove Ethernet CRC */ 939 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) 940 length -= 4; 941 942 total_rx_bytes += length; 943 total_rx_packets++; 944 945 /* 946 * code added for copybreak, this should improve 947 * performance for small packets with large amounts 948 * of reassembly being done in the stack 949 */ 950 if (length < copybreak) { 951 struct sk_buff *new_skb = 952 netdev_alloc_skb_ip_align(netdev, length); 953 if (new_skb) { 954 skb_copy_to_linear_data_offset(new_skb, 955 -NET_IP_ALIGN, 956 (skb->data - 957 NET_IP_ALIGN), 958 (length + 959 NET_IP_ALIGN)); 960 /* save the skb in buffer_info as good */ 961 buffer_info->skb = skb; 962 skb = new_skb; 963 } 964 /* else just continue with the old one */ 965 } 966 /* end copybreak code */ 967 skb_put(skb, length); 968 969 /* Receive Checksum Offload */ 970 e1000_rx_checksum(adapter, staterr, 971 rx_desc->wb.lower.hi_dword.csum_ip.csum, skb); 972 973 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb); 974 975 e1000_receive_skb(adapter, netdev, skb, staterr, 976 rx_desc->wb.upper.vlan); 977 978 next_desc: 979 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF); 980 981 /* return some buffers to hardware, one at a time is too slow */ 982 if (cleaned_count >= E1000_RX_BUFFER_WRITE) { 983 adapter->alloc_rx_buf(rx_ring, cleaned_count, 984 GFP_ATOMIC); 985 cleaned_count = 0; 986 } 987 988 /* use prefetched values */ 989 rx_desc = next_rxd; 990 buffer_info = next_buffer; 991 992 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 993 } 994 rx_ring->next_to_clean = i; 995 996 cleaned_count = e1000_desc_unused(rx_ring); 997 if (cleaned_count) 998 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC); 999 1000 adapter->total_rx_bytes += total_rx_bytes; 1001 adapter->total_rx_packets += total_rx_packets; 1002 return cleaned; 1003 } 1004 1005 static void e1000_put_txbuf(struct e1000_ring *tx_ring, 1006 struct e1000_buffer *buffer_info) 1007 { 1008 struct e1000_adapter *adapter = tx_ring->adapter; 1009 1010 if (buffer_info->dma) { 1011 if (buffer_info->mapped_as_page) 1012 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma, 1013 buffer_info->length, DMA_TO_DEVICE); 1014 else 1015 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma, 1016 buffer_info->length, DMA_TO_DEVICE); 1017 buffer_info->dma = 0; 1018 } 1019 if (buffer_info->skb) { 1020 dev_kfree_skb_any(buffer_info->skb); 1021 buffer_info->skb = NULL; 1022 } 1023 buffer_info->time_stamp = 0; 1024 } 1025 1026 static void e1000_print_hw_hang(struct work_struct *work) 1027 { 1028 struct e1000_adapter *adapter = container_of(work, 1029 struct e1000_adapter, 1030 print_hang_task); 1031 struct net_device *netdev = adapter->netdev; 1032 struct e1000_ring *tx_ring = adapter->tx_ring; 1033 unsigned int i = tx_ring->next_to_clean; 1034 unsigned int eop = tx_ring->buffer_info[i].next_to_watch; 1035 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop); 1036 struct e1000_hw *hw = &adapter->hw; 1037 u16 phy_status, phy_1000t_status, phy_ext_status; 1038 u16 pci_status; 1039 1040 if (test_bit(__E1000_DOWN, &adapter->state)) 1041 return; 1042 1043 if (!adapter->tx_hang_recheck && 1044 (adapter->flags2 & FLAG2_DMA_BURST)) { 1045 /* May be block on write-back, flush and detect again 1046 * flush pending descriptor writebacks to memory 1047 */ 1048 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); 1049 /* execute the writes immediately */ 1050 e1e_flush(); 1051 adapter->tx_hang_recheck = true; 1052 return; 1053 } 1054 /* Real hang detected */ 1055 adapter->tx_hang_recheck = false; 1056 netif_stop_queue(netdev); 1057 1058 e1e_rphy(hw, PHY_STATUS, &phy_status); 1059 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status); 1060 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status); 1061 1062 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status); 1063 1064 /* detected Hardware unit hang */ 1065 e_err("Detected Hardware Unit Hang:\n" 1066 " TDH <%x>\n" 1067 " TDT <%x>\n" 1068 " next_to_use <%x>\n" 1069 " next_to_clean <%x>\n" 1070 "buffer_info[next_to_clean]:\n" 1071 " time_stamp <%lx>\n" 1072 " next_to_watch <%x>\n" 1073 " jiffies <%lx>\n" 1074 " next_to_watch.status <%x>\n" 1075 "MAC Status <%x>\n" 1076 "PHY Status <%x>\n" 1077 "PHY 1000BASE-T Status <%x>\n" 1078 "PHY Extended Status <%x>\n" 1079 "PCI Status <%x>\n", 1080 readl(tx_ring->head), 1081 readl(tx_ring->tail), 1082 tx_ring->next_to_use, 1083 tx_ring->next_to_clean, 1084 tx_ring->buffer_info[eop].time_stamp, 1085 eop, 1086 jiffies, 1087 eop_desc->upper.fields.status, 1088 er32(STATUS), 1089 phy_status, 1090 phy_1000t_status, 1091 phy_ext_status, 1092 pci_status); 1093 } 1094 1095 /** 1096 * e1000_clean_tx_irq - Reclaim resources after transmit completes 1097 * @tx_ring: Tx descriptor ring 1098 * 1099 * the return value indicates whether actual cleaning was done, there 1100 * is no guarantee that everything was cleaned 1101 **/ 1102 static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring) 1103 { 1104 struct e1000_adapter *adapter = tx_ring->adapter; 1105 struct net_device *netdev = adapter->netdev; 1106 struct e1000_hw *hw = &adapter->hw; 1107 struct e1000_tx_desc *tx_desc, *eop_desc; 1108 struct e1000_buffer *buffer_info; 1109 unsigned int i, eop; 1110 unsigned int count = 0; 1111 unsigned int total_tx_bytes = 0, total_tx_packets = 0; 1112 unsigned int bytes_compl = 0, pkts_compl = 0; 1113 1114 i = tx_ring->next_to_clean; 1115 eop = tx_ring->buffer_info[i].next_to_watch; 1116 eop_desc = E1000_TX_DESC(*tx_ring, eop); 1117 1118 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) && 1119 (count < tx_ring->count)) { 1120 bool cleaned = false; 1121 rmb(); /* read buffer_info after eop_desc */ 1122 for (; !cleaned; count++) { 1123 tx_desc = E1000_TX_DESC(*tx_ring, i); 1124 buffer_info = &tx_ring->buffer_info[i]; 1125 cleaned = (i == eop); 1126 1127 if (cleaned) { 1128 total_tx_packets += buffer_info->segs; 1129 total_tx_bytes += buffer_info->bytecount; 1130 if (buffer_info->skb) { 1131 bytes_compl += buffer_info->skb->len; 1132 pkts_compl++; 1133 } 1134 } 1135 1136 e1000_put_txbuf(tx_ring, buffer_info); 1137 tx_desc->upper.data = 0; 1138 1139 i++; 1140 if (i == tx_ring->count) 1141 i = 0; 1142 } 1143 1144 if (i == tx_ring->next_to_use) 1145 break; 1146 eop = tx_ring->buffer_info[i].next_to_watch; 1147 eop_desc = E1000_TX_DESC(*tx_ring, eop); 1148 } 1149 1150 tx_ring->next_to_clean = i; 1151 1152 netdev_completed_queue(netdev, pkts_compl, bytes_compl); 1153 1154 #define TX_WAKE_THRESHOLD 32 1155 if (count && netif_carrier_ok(netdev) && 1156 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) { 1157 /* Make sure that anybody stopping the queue after this 1158 * sees the new next_to_clean. 1159 */ 1160 smp_mb(); 1161 1162 if (netif_queue_stopped(netdev) && 1163 !(test_bit(__E1000_DOWN, &adapter->state))) { 1164 netif_wake_queue(netdev); 1165 ++adapter->restart_queue; 1166 } 1167 } 1168 1169 if (adapter->detect_tx_hung) { 1170 /* 1171 * Detect a transmit hang in hardware, this serializes the 1172 * check with the clearing of time_stamp and movement of i 1173 */ 1174 adapter->detect_tx_hung = false; 1175 if (tx_ring->buffer_info[i].time_stamp && 1176 time_after(jiffies, tx_ring->buffer_info[i].time_stamp 1177 + (adapter->tx_timeout_factor * HZ)) && 1178 !(er32(STATUS) & E1000_STATUS_TXOFF)) 1179 schedule_work(&adapter->print_hang_task); 1180 else 1181 adapter->tx_hang_recheck = false; 1182 } 1183 adapter->total_tx_bytes += total_tx_bytes; 1184 adapter->total_tx_packets += total_tx_packets; 1185 return count < tx_ring->count; 1186 } 1187 1188 /** 1189 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split 1190 * @rx_ring: Rx descriptor ring 1191 * 1192 * the return value indicates whether actual cleaning was done, there 1193 * is no guarantee that everything was cleaned 1194 **/ 1195 static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done, 1196 int work_to_do) 1197 { 1198 struct e1000_adapter *adapter = rx_ring->adapter; 1199 struct e1000_hw *hw = &adapter->hw; 1200 union e1000_rx_desc_packet_split *rx_desc, *next_rxd; 1201 struct net_device *netdev = adapter->netdev; 1202 struct pci_dev *pdev = adapter->pdev; 1203 struct e1000_buffer *buffer_info, *next_buffer; 1204 struct e1000_ps_page *ps_page; 1205 struct sk_buff *skb; 1206 unsigned int i, j; 1207 u32 length, staterr; 1208 int cleaned_count = 0; 1209 bool cleaned = false; 1210 unsigned int total_rx_bytes = 0, total_rx_packets = 0; 1211 1212 i = rx_ring->next_to_clean; 1213 rx_desc = E1000_RX_DESC_PS(*rx_ring, i); 1214 staterr = le32_to_cpu(rx_desc->wb.middle.status_error); 1215 buffer_info = &rx_ring->buffer_info[i]; 1216 1217 while (staterr & E1000_RXD_STAT_DD) { 1218 if (*work_done >= work_to_do) 1219 break; 1220 (*work_done)++; 1221 skb = buffer_info->skb; 1222 rmb(); /* read descriptor and rx_buffer_info after status DD */ 1223 1224 /* in the packet split case this is header only */ 1225 prefetch(skb->data - NET_IP_ALIGN); 1226 1227 i++; 1228 if (i == rx_ring->count) 1229 i = 0; 1230 next_rxd = E1000_RX_DESC_PS(*rx_ring, i); 1231 prefetch(next_rxd); 1232 1233 next_buffer = &rx_ring->buffer_info[i]; 1234 1235 cleaned = true; 1236 cleaned_count++; 1237 dma_unmap_single(&pdev->dev, buffer_info->dma, 1238 adapter->rx_ps_bsize0, DMA_FROM_DEVICE); 1239 buffer_info->dma = 0; 1240 1241 /* see !EOP comment in other Rx routine */ 1242 if (!(staterr & E1000_RXD_STAT_EOP)) 1243 adapter->flags2 |= FLAG2_IS_DISCARDING; 1244 1245 if (adapter->flags2 & FLAG2_IS_DISCARDING) { 1246 e_dbg("Packet Split buffers didn't pick up the full packet\n"); 1247 dev_kfree_skb_irq(skb); 1248 if (staterr & E1000_RXD_STAT_EOP) 1249 adapter->flags2 &= ~FLAG2_IS_DISCARDING; 1250 goto next_desc; 1251 } 1252 1253 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) { 1254 dev_kfree_skb_irq(skb); 1255 goto next_desc; 1256 } 1257 1258 length = le16_to_cpu(rx_desc->wb.middle.length0); 1259 1260 if (!length) { 1261 e_dbg("Last part of the packet spanning multiple descriptors\n"); 1262 dev_kfree_skb_irq(skb); 1263 goto next_desc; 1264 } 1265 1266 /* Good Receive */ 1267 skb_put(skb, length); 1268 1269 { 1270 /* 1271 * this looks ugly, but it seems compiler issues make 1272 * it more efficient than reusing j 1273 */ 1274 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]); 1275 1276 /* 1277 * page alloc/put takes too long and effects small 1278 * packet throughput, so unsplit small packets and 1279 * save the alloc/put only valid in softirq (napi) 1280 * context to call kmap_* 1281 */ 1282 if (l1 && (l1 <= copybreak) && 1283 ((length + l1) <= adapter->rx_ps_bsize0)) { 1284 u8 *vaddr; 1285 1286 ps_page = &buffer_info->ps_pages[0]; 1287 1288 /* 1289 * there is no documentation about how to call 1290 * kmap_atomic, so we can't hold the mapping 1291 * very long 1292 */ 1293 dma_sync_single_for_cpu(&pdev->dev, 1294 ps_page->dma, 1295 PAGE_SIZE, 1296 DMA_FROM_DEVICE); 1297 vaddr = kmap_atomic(ps_page->page, 1298 KM_SKB_DATA_SOFTIRQ); 1299 memcpy(skb_tail_pointer(skb), vaddr, l1); 1300 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ); 1301 dma_sync_single_for_device(&pdev->dev, 1302 ps_page->dma, 1303 PAGE_SIZE, 1304 DMA_FROM_DEVICE); 1305 1306 /* remove the CRC */ 1307 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) 1308 l1 -= 4; 1309 1310 skb_put(skb, l1); 1311 goto copydone; 1312 } /* if */ 1313 } 1314 1315 for (j = 0; j < PS_PAGE_BUFFERS; j++) { 1316 length = le16_to_cpu(rx_desc->wb.upper.length[j]); 1317 if (!length) 1318 break; 1319 1320 ps_page = &buffer_info->ps_pages[j]; 1321 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE, 1322 DMA_FROM_DEVICE); 1323 ps_page->dma = 0; 1324 skb_fill_page_desc(skb, j, ps_page->page, 0, length); 1325 ps_page->page = NULL; 1326 skb->len += length; 1327 skb->data_len += length; 1328 skb->truesize += PAGE_SIZE; 1329 } 1330 1331 /* strip the ethernet crc, problem is we're using pages now so 1332 * this whole operation can get a little cpu intensive 1333 */ 1334 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) 1335 pskb_trim(skb, skb->len - 4); 1336 1337 copydone: 1338 total_rx_bytes += skb->len; 1339 total_rx_packets++; 1340 1341 e1000_rx_checksum(adapter, staterr, 1342 rx_desc->wb.lower.hi_dword.csum_ip.csum, skb); 1343 1344 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb); 1345 1346 if (rx_desc->wb.upper.header_status & 1347 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)) 1348 adapter->rx_hdr_split++; 1349 1350 e1000_receive_skb(adapter, netdev, skb, 1351 staterr, rx_desc->wb.middle.vlan); 1352 1353 next_desc: 1354 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF); 1355 buffer_info->skb = NULL; 1356 1357 /* return some buffers to hardware, one at a time is too slow */ 1358 if (cleaned_count >= E1000_RX_BUFFER_WRITE) { 1359 adapter->alloc_rx_buf(rx_ring, cleaned_count, 1360 GFP_ATOMIC); 1361 cleaned_count = 0; 1362 } 1363 1364 /* use prefetched values */ 1365 rx_desc = next_rxd; 1366 buffer_info = next_buffer; 1367 1368 staterr = le32_to_cpu(rx_desc->wb.middle.status_error); 1369 } 1370 rx_ring->next_to_clean = i; 1371 1372 cleaned_count = e1000_desc_unused(rx_ring); 1373 if (cleaned_count) 1374 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC); 1375 1376 adapter->total_rx_bytes += total_rx_bytes; 1377 adapter->total_rx_packets += total_rx_packets; 1378 return cleaned; 1379 } 1380 1381 /** 1382 * e1000_consume_page - helper function 1383 **/ 1384 static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb, 1385 u16 length) 1386 { 1387 bi->page = NULL; 1388 skb->len += length; 1389 skb->data_len += length; 1390 skb->truesize += PAGE_SIZE; 1391 } 1392 1393 /** 1394 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy 1395 * @adapter: board private structure 1396 * 1397 * the return value indicates whether actual cleaning was done, there 1398 * is no guarantee that everything was cleaned 1399 **/ 1400 static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done, 1401 int work_to_do) 1402 { 1403 struct e1000_adapter *adapter = rx_ring->adapter; 1404 struct net_device *netdev = adapter->netdev; 1405 struct pci_dev *pdev = adapter->pdev; 1406 union e1000_rx_desc_extended *rx_desc, *next_rxd; 1407 struct e1000_buffer *buffer_info, *next_buffer; 1408 u32 length, staterr; 1409 unsigned int i; 1410 int cleaned_count = 0; 1411 bool cleaned = false; 1412 unsigned int total_rx_bytes=0, total_rx_packets=0; 1413 1414 i = rx_ring->next_to_clean; 1415 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); 1416 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 1417 buffer_info = &rx_ring->buffer_info[i]; 1418 1419 while (staterr & E1000_RXD_STAT_DD) { 1420 struct sk_buff *skb; 1421 1422 if (*work_done >= work_to_do) 1423 break; 1424 (*work_done)++; 1425 rmb(); /* read descriptor and rx_buffer_info after status DD */ 1426 1427 skb = buffer_info->skb; 1428 buffer_info->skb = NULL; 1429 1430 ++i; 1431 if (i == rx_ring->count) 1432 i = 0; 1433 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i); 1434 prefetch(next_rxd); 1435 1436 next_buffer = &rx_ring->buffer_info[i]; 1437 1438 cleaned = true; 1439 cleaned_count++; 1440 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE, 1441 DMA_FROM_DEVICE); 1442 buffer_info->dma = 0; 1443 1444 length = le16_to_cpu(rx_desc->wb.upper.length); 1445 1446 /* errors is only valid for DD + EOP descriptors */ 1447 if (unlikely((staterr & E1000_RXD_STAT_EOP) && 1448 (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK))) { 1449 /* recycle both page and skb */ 1450 buffer_info->skb = skb; 1451 /* an error means any chain goes out the window too */ 1452 if (rx_ring->rx_skb_top) 1453 dev_kfree_skb_irq(rx_ring->rx_skb_top); 1454 rx_ring->rx_skb_top = NULL; 1455 goto next_desc; 1456 } 1457 1458 #define rxtop (rx_ring->rx_skb_top) 1459 if (!(staterr & E1000_RXD_STAT_EOP)) { 1460 /* this descriptor is only the beginning (or middle) */ 1461 if (!rxtop) { 1462 /* this is the beginning of a chain */ 1463 rxtop = skb; 1464 skb_fill_page_desc(rxtop, 0, buffer_info->page, 1465 0, length); 1466 } else { 1467 /* this is the middle of a chain */ 1468 skb_fill_page_desc(rxtop, 1469 skb_shinfo(rxtop)->nr_frags, 1470 buffer_info->page, 0, length); 1471 /* re-use the skb, only consumed the page */ 1472 buffer_info->skb = skb; 1473 } 1474 e1000_consume_page(buffer_info, rxtop, length); 1475 goto next_desc; 1476 } else { 1477 if (rxtop) { 1478 /* end of the chain */ 1479 skb_fill_page_desc(rxtop, 1480 skb_shinfo(rxtop)->nr_frags, 1481 buffer_info->page, 0, length); 1482 /* re-use the current skb, we only consumed the 1483 * page */ 1484 buffer_info->skb = skb; 1485 skb = rxtop; 1486 rxtop = NULL; 1487 e1000_consume_page(buffer_info, skb, length); 1488 } else { 1489 /* no chain, got EOP, this buf is the packet 1490 * copybreak to save the put_page/alloc_page */ 1491 if (length <= copybreak && 1492 skb_tailroom(skb) >= length) { 1493 u8 *vaddr; 1494 vaddr = kmap_atomic(buffer_info->page, 1495 KM_SKB_DATA_SOFTIRQ); 1496 memcpy(skb_tail_pointer(skb), vaddr, 1497 length); 1498 kunmap_atomic(vaddr, 1499 KM_SKB_DATA_SOFTIRQ); 1500 /* re-use the page, so don't erase 1501 * buffer_info->page */ 1502 skb_put(skb, length); 1503 } else { 1504 skb_fill_page_desc(skb, 0, 1505 buffer_info->page, 0, 1506 length); 1507 e1000_consume_page(buffer_info, skb, 1508 length); 1509 } 1510 } 1511 } 1512 1513 /* Receive Checksum Offload XXX recompute due to CRC strip? */ 1514 e1000_rx_checksum(adapter, staterr, 1515 rx_desc->wb.lower.hi_dword.csum_ip.csum, skb); 1516 1517 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb); 1518 1519 /* probably a little skewed due to removing CRC */ 1520 total_rx_bytes += skb->len; 1521 total_rx_packets++; 1522 1523 /* eth type trans needs skb->data to point to something */ 1524 if (!pskb_may_pull(skb, ETH_HLEN)) { 1525 e_err("pskb_may_pull failed.\n"); 1526 dev_kfree_skb_irq(skb); 1527 goto next_desc; 1528 } 1529 1530 e1000_receive_skb(adapter, netdev, skb, staterr, 1531 rx_desc->wb.upper.vlan); 1532 1533 next_desc: 1534 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF); 1535 1536 /* return some buffers to hardware, one at a time is too slow */ 1537 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) { 1538 adapter->alloc_rx_buf(rx_ring, cleaned_count, 1539 GFP_ATOMIC); 1540 cleaned_count = 0; 1541 } 1542 1543 /* use prefetched values */ 1544 rx_desc = next_rxd; 1545 buffer_info = next_buffer; 1546 1547 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 1548 } 1549 rx_ring->next_to_clean = i; 1550 1551 cleaned_count = e1000_desc_unused(rx_ring); 1552 if (cleaned_count) 1553 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC); 1554 1555 adapter->total_rx_bytes += total_rx_bytes; 1556 adapter->total_rx_packets += total_rx_packets; 1557 return cleaned; 1558 } 1559 1560 /** 1561 * e1000_clean_rx_ring - Free Rx Buffers per Queue 1562 * @rx_ring: Rx descriptor ring 1563 **/ 1564 static void e1000_clean_rx_ring(struct e1000_ring *rx_ring) 1565 { 1566 struct e1000_adapter *adapter = rx_ring->adapter; 1567 struct e1000_buffer *buffer_info; 1568 struct e1000_ps_page *ps_page; 1569 struct pci_dev *pdev = adapter->pdev; 1570 unsigned int i, j; 1571 1572 /* Free all the Rx ring sk_buffs */ 1573 for (i = 0; i < rx_ring->count; i++) { 1574 buffer_info = &rx_ring->buffer_info[i]; 1575 if (buffer_info->dma) { 1576 if (adapter->clean_rx == e1000_clean_rx_irq) 1577 dma_unmap_single(&pdev->dev, buffer_info->dma, 1578 adapter->rx_buffer_len, 1579 DMA_FROM_DEVICE); 1580 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq) 1581 dma_unmap_page(&pdev->dev, buffer_info->dma, 1582 PAGE_SIZE, 1583 DMA_FROM_DEVICE); 1584 else if (adapter->clean_rx == e1000_clean_rx_irq_ps) 1585 dma_unmap_single(&pdev->dev, buffer_info->dma, 1586 adapter->rx_ps_bsize0, 1587 DMA_FROM_DEVICE); 1588 buffer_info->dma = 0; 1589 } 1590 1591 if (buffer_info->page) { 1592 put_page(buffer_info->page); 1593 buffer_info->page = NULL; 1594 } 1595 1596 if (buffer_info->skb) { 1597 dev_kfree_skb(buffer_info->skb); 1598 buffer_info->skb = NULL; 1599 } 1600 1601 for (j = 0; j < PS_PAGE_BUFFERS; j++) { 1602 ps_page = &buffer_info->ps_pages[j]; 1603 if (!ps_page->page) 1604 break; 1605 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE, 1606 DMA_FROM_DEVICE); 1607 ps_page->dma = 0; 1608 put_page(ps_page->page); 1609 ps_page->page = NULL; 1610 } 1611 } 1612 1613 /* there also may be some cached data from a chained receive */ 1614 if (rx_ring->rx_skb_top) { 1615 dev_kfree_skb(rx_ring->rx_skb_top); 1616 rx_ring->rx_skb_top = NULL; 1617 } 1618 1619 /* Zero out the descriptor ring */ 1620 memset(rx_ring->desc, 0, rx_ring->size); 1621 1622 rx_ring->next_to_clean = 0; 1623 rx_ring->next_to_use = 0; 1624 adapter->flags2 &= ~FLAG2_IS_DISCARDING; 1625 1626 writel(0, rx_ring->head); 1627 writel(0, rx_ring->tail); 1628 } 1629 1630 static void e1000e_downshift_workaround(struct work_struct *work) 1631 { 1632 struct e1000_adapter *adapter = container_of(work, 1633 struct e1000_adapter, downshift_task); 1634 1635 if (test_bit(__E1000_DOWN, &adapter->state)) 1636 return; 1637 1638 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw); 1639 } 1640 1641 /** 1642 * e1000_intr_msi - Interrupt Handler 1643 * @irq: interrupt number 1644 * @data: pointer to a network interface device structure 1645 **/ 1646 static irqreturn_t e1000_intr_msi(int irq, void *data) 1647 { 1648 struct net_device *netdev = data; 1649 struct e1000_adapter *adapter = netdev_priv(netdev); 1650 struct e1000_hw *hw = &adapter->hw; 1651 u32 icr = er32(ICR); 1652 1653 /* 1654 * read ICR disables interrupts using IAM 1655 */ 1656 1657 if (icr & E1000_ICR_LSC) { 1658 hw->mac.get_link_status = 1; 1659 /* 1660 * ICH8 workaround-- Call gig speed drop workaround on cable 1661 * disconnect (LSC) before accessing any PHY registers 1662 */ 1663 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) && 1664 (!(er32(STATUS) & E1000_STATUS_LU))) 1665 schedule_work(&adapter->downshift_task); 1666 1667 /* 1668 * 80003ES2LAN workaround-- For packet buffer work-around on 1669 * link down event; disable receives here in the ISR and reset 1670 * adapter in watchdog 1671 */ 1672 if (netif_carrier_ok(netdev) && 1673 adapter->flags & FLAG_RX_NEEDS_RESTART) { 1674 /* disable receives */ 1675 u32 rctl = er32(RCTL); 1676 ew32(RCTL, rctl & ~E1000_RCTL_EN); 1677 adapter->flags |= FLAG_RX_RESTART_NOW; 1678 } 1679 /* guard against interrupt when we're going down */ 1680 if (!test_bit(__E1000_DOWN, &adapter->state)) 1681 mod_timer(&adapter->watchdog_timer, jiffies + 1); 1682 } 1683 1684 if (napi_schedule_prep(&adapter->napi)) { 1685 adapter->total_tx_bytes = 0; 1686 adapter->total_tx_packets = 0; 1687 adapter->total_rx_bytes = 0; 1688 adapter->total_rx_packets = 0; 1689 __napi_schedule(&adapter->napi); 1690 } 1691 1692 return IRQ_HANDLED; 1693 } 1694 1695 /** 1696 * e1000_intr - Interrupt Handler 1697 * @irq: interrupt number 1698 * @data: pointer to a network interface device structure 1699 **/ 1700 static irqreturn_t e1000_intr(int irq, void *data) 1701 { 1702 struct net_device *netdev = data; 1703 struct e1000_adapter *adapter = netdev_priv(netdev); 1704 struct e1000_hw *hw = &adapter->hw; 1705 u32 rctl, icr = er32(ICR); 1706 1707 if (!icr || test_bit(__E1000_DOWN, &adapter->state)) 1708 return IRQ_NONE; /* Not our interrupt */ 1709 1710 /* 1711 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is 1712 * not set, then the adapter didn't send an interrupt 1713 */ 1714 if (!(icr & E1000_ICR_INT_ASSERTED)) 1715 return IRQ_NONE; 1716 1717 /* 1718 * Interrupt Auto-Mask...upon reading ICR, 1719 * interrupts are masked. No need for the 1720 * IMC write 1721 */ 1722 1723 if (icr & E1000_ICR_LSC) { 1724 hw->mac.get_link_status = 1; 1725 /* 1726 * ICH8 workaround-- Call gig speed drop workaround on cable 1727 * disconnect (LSC) before accessing any PHY registers 1728 */ 1729 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) && 1730 (!(er32(STATUS) & E1000_STATUS_LU))) 1731 schedule_work(&adapter->downshift_task); 1732 1733 /* 1734 * 80003ES2LAN workaround-- 1735 * For packet buffer work-around on link down event; 1736 * disable receives here in the ISR and 1737 * reset adapter in watchdog 1738 */ 1739 if (netif_carrier_ok(netdev) && 1740 (adapter->flags & FLAG_RX_NEEDS_RESTART)) { 1741 /* disable receives */ 1742 rctl = er32(RCTL); 1743 ew32(RCTL, rctl & ~E1000_RCTL_EN); 1744 adapter->flags |= FLAG_RX_RESTART_NOW; 1745 } 1746 /* guard against interrupt when we're going down */ 1747 if (!test_bit(__E1000_DOWN, &adapter->state)) 1748 mod_timer(&adapter->watchdog_timer, jiffies + 1); 1749 } 1750 1751 if (napi_schedule_prep(&adapter->napi)) { 1752 adapter->total_tx_bytes = 0; 1753 adapter->total_tx_packets = 0; 1754 adapter->total_rx_bytes = 0; 1755 adapter->total_rx_packets = 0; 1756 __napi_schedule(&adapter->napi); 1757 } 1758 1759 return IRQ_HANDLED; 1760 } 1761 1762 static irqreturn_t e1000_msix_other(int irq, void *data) 1763 { 1764 struct net_device *netdev = data; 1765 struct e1000_adapter *adapter = netdev_priv(netdev); 1766 struct e1000_hw *hw = &adapter->hw; 1767 u32 icr = er32(ICR); 1768 1769 if (!(icr & E1000_ICR_INT_ASSERTED)) { 1770 if (!test_bit(__E1000_DOWN, &adapter->state)) 1771 ew32(IMS, E1000_IMS_OTHER); 1772 return IRQ_NONE; 1773 } 1774 1775 if (icr & adapter->eiac_mask) 1776 ew32(ICS, (icr & adapter->eiac_mask)); 1777 1778 if (icr & E1000_ICR_OTHER) { 1779 if (!(icr & E1000_ICR_LSC)) 1780 goto no_link_interrupt; 1781 hw->mac.get_link_status = 1; 1782 /* guard against interrupt when we're going down */ 1783 if (!test_bit(__E1000_DOWN, &adapter->state)) 1784 mod_timer(&adapter->watchdog_timer, jiffies + 1); 1785 } 1786 1787 no_link_interrupt: 1788 if (!test_bit(__E1000_DOWN, &adapter->state)) 1789 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER); 1790 1791 return IRQ_HANDLED; 1792 } 1793 1794 1795 static irqreturn_t e1000_intr_msix_tx(int irq, void *data) 1796 { 1797 struct net_device *netdev = data; 1798 struct e1000_adapter *adapter = netdev_priv(netdev); 1799 struct e1000_hw *hw = &adapter->hw; 1800 struct e1000_ring *tx_ring = adapter->tx_ring; 1801 1802 1803 adapter->total_tx_bytes = 0; 1804 adapter->total_tx_packets = 0; 1805 1806 if (!e1000_clean_tx_irq(tx_ring)) 1807 /* Ring was not completely cleaned, so fire another interrupt */ 1808 ew32(ICS, tx_ring->ims_val); 1809 1810 return IRQ_HANDLED; 1811 } 1812 1813 static irqreturn_t e1000_intr_msix_rx(int irq, void *data) 1814 { 1815 struct net_device *netdev = data; 1816 struct e1000_adapter *adapter = netdev_priv(netdev); 1817 struct e1000_ring *rx_ring = adapter->rx_ring; 1818 1819 /* Write the ITR value calculated at the end of the 1820 * previous interrupt. 1821 */ 1822 if (rx_ring->set_itr) { 1823 writel(1000000000 / (rx_ring->itr_val * 256), 1824 rx_ring->itr_register); 1825 rx_ring->set_itr = 0; 1826 } 1827 1828 if (napi_schedule_prep(&adapter->napi)) { 1829 adapter->total_rx_bytes = 0; 1830 adapter->total_rx_packets = 0; 1831 __napi_schedule(&adapter->napi); 1832 } 1833 return IRQ_HANDLED; 1834 } 1835 1836 /** 1837 * e1000_configure_msix - Configure MSI-X hardware 1838 * 1839 * e1000_configure_msix sets up the hardware to properly 1840 * generate MSI-X interrupts. 1841 **/ 1842 static void e1000_configure_msix(struct e1000_adapter *adapter) 1843 { 1844 struct e1000_hw *hw = &adapter->hw; 1845 struct e1000_ring *rx_ring = adapter->rx_ring; 1846 struct e1000_ring *tx_ring = adapter->tx_ring; 1847 int vector = 0; 1848 u32 ctrl_ext, ivar = 0; 1849 1850 adapter->eiac_mask = 0; 1851 1852 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */ 1853 if (hw->mac.type == e1000_82574) { 1854 u32 rfctl = er32(RFCTL); 1855 rfctl |= E1000_RFCTL_ACK_DIS; 1856 ew32(RFCTL, rfctl); 1857 } 1858 1859 #define E1000_IVAR_INT_ALLOC_VALID 0x8 1860 /* Configure Rx vector */ 1861 rx_ring->ims_val = E1000_IMS_RXQ0; 1862 adapter->eiac_mask |= rx_ring->ims_val; 1863 if (rx_ring->itr_val) 1864 writel(1000000000 / (rx_ring->itr_val * 256), 1865 rx_ring->itr_register); 1866 else 1867 writel(1, rx_ring->itr_register); 1868 ivar = E1000_IVAR_INT_ALLOC_VALID | vector; 1869 1870 /* Configure Tx vector */ 1871 tx_ring->ims_val = E1000_IMS_TXQ0; 1872 vector++; 1873 if (tx_ring->itr_val) 1874 writel(1000000000 / (tx_ring->itr_val * 256), 1875 tx_ring->itr_register); 1876 else 1877 writel(1, tx_ring->itr_register); 1878 adapter->eiac_mask |= tx_ring->ims_val; 1879 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8); 1880 1881 /* set vector for Other Causes, e.g. link changes */ 1882 vector++; 1883 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16); 1884 if (rx_ring->itr_val) 1885 writel(1000000000 / (rx_ring->itr_val * 256), 1886 hw->hw_addr + E1000_EITR_82574(vector)); 1887 else 1888 writel(1, hw->hw_addr + E1000_EITR_82574(vector)); 1889 1890 /* Cause Tx interrupts on every write back */ 1891 ivar |= (1 << 31); 1892 1893 ew32(IVAR, ivar); 1894 1895 /* enable MSI-X PBA support */ 1896 ctrl_ext = er32(CTRL_EXT); 1897 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR; 1898 1899 /* Auto-Mask Other interrupts upon ICR read */ 1900 #define E1000_EIAC_MASK_82574 0x01F00000 1901 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER); 1902 ctrl_ext |= E1000_CTRL_EXT_EIAME; 1903 ew32(CTRL_EXT, ctrl_ext); 1904 e1e_flush(); 1905 } 1906 1907 void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter) 1908 { 1909 if (adapter->msix_entries) { 1910 pci_disable_msix(adapter->pdev); 1911 kfree(adapter->msix_entries); 1912 adapter->msix_entries = NULL; 1913 } else if (adapter->flags & FLAG_MSI_ENABLED) { 1914 pci_disable_msi(adapter->pdev); 1915 adapter->flags &= ~FLAG_MSI_ENABLED; 1916 } 1917 } 1918 1919 /** 1920 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported 1921 * 1922 * Attempt to configure interrupts using the best available 1923 * capabilities of the hardware and kernel. 1924 **/ 1925 void e1000e_set_interrupt_capability(struct e1000_adapter *adapter) 1926 { 1927 int err; 1928 int i; 1929 1930 switch (adapter->int_mode) { 1931 case E1000E_INT_MODE_MSIX: 1932 if (adapter->flags & FLAG_HAS_MSIX) { 1933 adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */ 1934 adapter->msix_entries = kcalloc(adapter->num_vectors, 1935 sizeof(struct msix_entry), 1936 GFP_KERNEL); 1937 if (adapter->msix_entries) { 1938 for (i = 0; i < adapter->num_vectors; i++) 1939 adapter->msix_entries[i].entry = i; 1940 1941 err = pci_enable_msix(adapter->pdev, 1942 adapter->msix_entries, 1943 adapter->num_vectors); 1944 if (err == 0) 1945 return; 1946 } 1947 /* MSI-X failed, so fall through and try MSI */ 1948 e_err("Failed to initialize MSI-X interrupts. Falling back to MSI interrupts.\n"); 1949 e1000e_reset_interrupt_capability(adapter); 1950 } 1951 adapter->int_mode = E1000E_INT_MODE_MSI; 1952 /* Fall through */ 1953 case E1000E_INT_MODE_MSI: 1954 if (!pci_enable_msi(adapter->pdev)) { 1955 adapter->flags |= FLAG_MSI_ENABLED; 1956 } else { 1957 adapter->int_mode = E1000E_INT_MODE_LEGACY; 1958 e_err("Failed to initialize MSI interrupts. Falling back to legacy interrupts.\n"); 1959 } 1960 /* Fall through */ 1961 case E1000E_INT_MODE_LEGACY: 1962 /* Don't do anything; this is the system default */ 1963 break; 1964 } 1965 1966 /* store the number of vectors being used */ 1967 adapter->num_vectors = 1; 1968 } 1969 1970 /** 1971 * e1000_request_msix - Initialize MSI-X interrupts 1972 * 1973 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the 1974 * kernel. 1975 **/ 1976 static int e1000_request_msix(struct e1000_adapter *adapter) 1977 { 1978 struct net_device *netdev = adapter->netdev; 1979 int err = 0, vector = 0; 1980 1981 if (strlen(netdev->name) < (IFNAMSIZ - 5)) 1982 snprintf(adapter->rx_ring->name, 1983 sizeof(adapter->rx_ring->name) - 1, 1984 "%s-rx-0", netdev->name); 1985 else 1986 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ); 1987 err = request_irq(adapter->msix_entries[vector].vector, 1988 e1000_intr_msix_rx, 0, adapter->rx_ring->name, 1989 netdev); 1990 if (err) 1991 goto out; 1992 adapter->rx_ring->itr_register = adapter->hw.hw_addr + 1993 E1000_EITR_82574(vector); 1994 adapter->rx_ring->itr_val = adapter->itr; 1995 vector++; 1996 1997 if (strlen(netdev->name) < (IFNAMSIZ - 5)) 1998 snprintf(adapter->tx_ring->name, 1999 sizeof(adapter->tx_ring->name) - 1, 2000 "%s-tx-0", netdev->name); 2001 else 2002 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ); 2003 err = request_irq(adapter->msix_entries[vector].vector, 2004 e1000_intr_msix_tx, 0, adapter->tx_ring->name, 2005 netdev); 2006 if (err) 2007 goto out; 2008 adapter->tx_ring->itr_register = adapter->hw.hw_addr + 2009 E1000_EITR_82574(vector); 2010 adapter->tx_ring->itr_val = adapter->itr; 2011 vector++; 2012 2013 err = request_irq(adapter->msix_entries[vector].vector, 2014 e1000_msix_other, 0, netdev->name, netdev); 2015 if (err) 2016 goto out; 2017 2018 e1000_configure_msix(adapter); 2019 return 0; 2020 out: 2021 return err; 2022 } 2023 2024 /** 2025 * e1000_request_irq - initialize interrupts 2026 * 2027 * Attempts to configure interrupts using the best available 2028 * capabilities of the hardware and kernel. 2029 **/ 2030 static int e1000_request_irq(struct e1000_adapter *adapter) 2031 { 2032 struct net_device *netdev = adapter->netdev; 2033 int err; 2034 2035 if (adapter->msix_entries) { 2036 err = e1000_request_msix(adapter); 2037 if (!err) 2038 return err; 2039 /* fall back to MSI */ 2040 e1000e_reset_interrupt_capability(adapter); 2041 adapter->int_mode = E1000E_INT_MODE_MSI; 2042 e1000e_set_interrupt_capability(adapter); 2043 } 2044 if (adapter->flags & FLAG_MSI_ENABLED) { 2045 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0, 2046 netdev->name, netdev); 2047 if (!err) 2048 return err; 2049 2050 /* fall back to legacy interrupt */ 2051 e1000e_reset_interrupt_capability(adapter); 2052 adapter->int_mode = E1000E_INT_MODE_LEGACY; 2053 } 2054 2055 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED, 2056 netdev->name, netdev); 2057 if (err) 2058 e_err("Unable to allocate interrupt, Error: %d\n", err); 2059 2060 return err; 2061 } 2062 2063 static void e1000_free_irq(struct e1000_adapter *adapter) 2064 { 2065 struct net_device *netdev = adapter->netdev; 2066 2067 if (adapter->msix_entries) { 2068 int vector = 0; 2069 2070 free_irq(adapter->msix_entries[vector].vector, netdev); 2071 vector++; 2072 2073 free_irq(adapter->msix_entries[vector].vector, netdev); 2074 vector++; 2075 2076 /* Other Causes interrupt vector */ 2077 free_irq(adapter->msix_entries[vector].vector, netdev); 2078 return; 2079 } 2080 2081 free_irq(adapter->pdev->irq, netdev); 2082 } 2083 2084 /** 2085 * e1000_irq_disable - Mask off interrupt generation on the NIC 2086 **/ 2087 static void e1000_irq_disable(struct e1000_adapter *adapter) 2088 { 2089 struct e1000_hw *hw = &adapter->hw; 2090 2091 ew32(IMC, ~0); 2092 if (adapter->msix_entries) 2093 ew32(EIAC_82574, 0); 2094 e1e_flush(); 2095 2096 if (adapter->msix_entries) { 2097 int i; 2098 for (i = 0; i < adapter->num_vectors; i++) 2099 synchronize_irq(adapter->msix_entries[i].vector); 2100 } else { 2101 synchronize_irq(adapter->pdev->irq); 2102 } 2103 } 2104 2105 /** 2106 * e1000_irq_enable - Enable default interrupt generation settings 2107 **/ 2108 static void e1000_irq_enable(struct e1000_adapter *adapter) 2109 { 2110 struct e1000_hw *hw = &adapter->hw; 2111 2112 if (adapter->msix_entries) { 2113 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574); 2114 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC); 2115 } else { 2116 ew32(IMS, IMS_ENABLE_MASK); 2117 } 2118 e1e_flush(); 2119 } 2120 2121 /** 2122 * e1000e_get_hw_control - get control of the h/w from f/w 2123 * @adapter: address of board private structure 2124 * 2125 * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit. 2126 * For ASF and Pass Through versions of f/w this means that 2127 * the driver is loaded. For AMT version (only with 82573) 2128 * of the f/w this means that the network i/f is open. 2129 **/ 2130 void e1000e_get_hw_control(struct e1000_adapter *adapter) 2131 { 2132 struct e1000_hw *hw = &adapter->hw; 2133 u32 ctrl_ext; 2134 u32 swsm; 2135 2136 /* Let firmware know the driver has taken over */ 2137 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) { 2138 swsm = er32(SWSM); 2139 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD); 2140 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) { 2141 ctrl_ext = er32(CTRL_EXT); 2142 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); 2143 } 2144 } 2145 2146 /** 2147 * e1000e_release_hw_control - release control of the h/w to f/w 2148 * @adapter: address of board private structure 2149 * 2150 * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit. 2151 * For ASF and Pass Through versions of f/w this means that the 2152 * driver is no longer loaded. For AMT version (only with 82573) i 2153 * of the f/w this means that the network i/f is closed. 2154 * 2155 **/ 2156 void e1000e_release_hw_control(struct e1000_adapter *adapter) 2157 { 2158 struct e1000_hw *hw = &adapter->hw; 2159 u32 ctrl_ext; 2160 u32 swsm; 2161 2162 /* Let firmware taken over control of h/w */ 2163 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) { 2164 swsm = er32(SWSM); 2165 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD); 2166 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) { 2167 ctrl_ext = er32(CTRL_EXT); 2168 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); 2169 } 2170 } 2171 2172 /** 2173 * @e1000_alloc_ring - allocate memory for a ring structure 2174 **/ 2175 static int e1000_alloc_ring_dma(struct e1000_adapter *adapter, 2176 struct e1000_ring *ring) 2177 { 2178 struct pci_dev *pdev = adapter->pdev; 2179 2180 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma, 2181 GFP_KERNEL); 2182 if (!ring->desc) 2183 return -ENOMEM; 2184 2185 return 0; 2186 } 2187 2188 /** 2189 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors) 2190 * @tx_ring: Tx descriptor ring 2191 * 2192 * Return 0 on success, negative on failure 2193 **/ 2194 int e1000e_setup_tx_resources(struct e1000_ring *tx_ring) 2195 { 2196 struct e1000_adapter *adapter = tx_ring->adapter; 2197 int err = -ENOMEM, size; 2198 2199 size = sizeof(struct e1000_buffer) * tx_ring->count; 2200 tx_ring->buffer_info = vzalloc(size); 2201 if (!tx_ring->buffer_info) 2202 goto err; 2203 2204 /* round up to nearest 4K */ 2205 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc); 2206 tx_ring->size = ALIGN(tx_ring->size, 4096); 2207 2208 err = e1000_alloc_ring_dma(adapter, tx_ring); 2209 if (err) 2210 goto err; 2211 2212 tx_ring->next_to_use = 0; 2213 tx_ring->next_to_clean = 0; 2214 2215 return 0; 2216 err: 2217 vfree(tx_ring->buffer_info); 2218 e_err("Unable to allocate memory for the transmit descriptor ring\n"); 2219 return err; 2220 } 2221 2222 /** 2223 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors) 2224 * @rx_ring: Rx descriptor ring 2225 * 2226 * Returns 0 on success, negative on failure 2227 **/ 2228 int e1000e_setup_rx_resources(struct e1000_ring *rx_ring) 2229 { 2230 struct e1000_adapter *adapter = rx_ring->adapter; 2231 struct e1000_buffer *buffer_info; 2232 int i, size, desc_len, err = -ENOMEM; 2233 2234 size = sizeof(struct e1000_buffer) * rx_ring->count; 2235 rx_ring->buffer_info = vzalloc(size); 2236 if (!rx_ring->buffer_info) 2237 goto err; 2238 2239 for (i = 0; i < rx_ring->count; i++) { 2240 buffer_info = &rx_ring->buffer_info[i]; 2241 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS, 2242 sizeof(struct e1000_ps_page), 2243 GFP_KERNEL); 2244 if (!buffer_info->ps_pages) 2245 goto err_pages; 2246 } 2247 2248 desc_len = sizeof(union e1000_rx_desc_packet_split); 2249 2250 /* Round up to nearest 4K */ 2251 rx_ring->size = rx_ring->count * desc_len; 2252 rx_ring->size = ALIGN(rx_ring->size, 4096); 2253 2254 err = e1000_alloc_ring_dma(adapter, rx_ring); 2255 if (err) 2256 goto err_pages; 2257 2258 rx_ring->next_to_clean = 0; 2259 rx_ring->next_to_use = 0; 2260 rx_ring->rx_skb_top = NULL; 2261 2262 return 0; 2263 2264 err_pages: 2265 for (i = 0; i < rx_ring->count; i++) { 2266 buffer_info = &rx_ring->buffer_info[i]; 2267 kfree(buffer_info->ps_pages); 2268 } 2269 err: 2270 vfree(rx_ring->buffer_info); 2271 e_err("Unable to allocate memory for the receive descriptor ring\n"); 2272 return err; 2273 } 2274 2275 /** 2276 * e1000_clean_tx_ring - Free Tx Buffers 2277 * @tx_ring: Tx descriptor ring 2278 **/ 2279 static void e1000_clean_tx_ring(struct e1000_ring *tx_ring) 2280 { 2281 struct e1000_adapter *adapter = tx_ring->adapter; 2282 struct e1000_buffer *buffer_info; 2283 unsigned long size; 2284 unsigned int i; 2285 2286 for (i = 0; i < tx_ring->count; i++) { 2287 buffer_info = &tx_ring->buffer_info[i]; 2288 e1000_put_txbuf(tx_ring, buffer_info); 2289 } 2290 2291 netdev_reset_queue(adapter->netdev); 2292 size = sizeof(struct e1000_buffer) * tx_ring->count; 2293 memset(tx_ring->buffer_info, 0, size); 2294 2295 memset(tx_ring->desc, 0, tx_ring->size); 2296 2297 tx_ring->next_to_use = 0; 2298 tx_ring->next_to_clean = 0; 2299 2300 writel(0, tx_ring->head); 2301 writel(0, tx_ring->tail); 2302 } 2303 2304 /** 2305 * e1000e_free_tx_resources - Free Tx Resources per Queue 2306 * @tx_ring: Tx descriptor ring 2307 * 2308 * Free all transmit software resources 2309 **/ 2310 void e1000e_free_tx_resources(struct e1000_ring *tx_ring) 2311 { 2312 struct e1000_adapter *adapter = tx_ring->adapter; 2313 struct pci_dev *pdev = adapter->pdev; 2314 2315 e1000_clean_tx_ring(tx_ring); 2316 2317 vfree(tx_ring->buffer_info); 2318 tx_ring->buffer_info = NULL; 2319 2320 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc, 2321 tx_ring->dma); 2322 tx_ring->desc = NULL; 2323 } 2324 2325 /** 2326 * e1000e_free_rx_resources - Free Rx Resources 2327 * @rx_ring: Rx descriptor ring 2328 * 2329 * Free all receive software resources 2330 **/ 2331 void e1000e_free_rx_resources(struct e1000_ring *rx_ring) 2332 { 2333 struct e1000_adapter *adapter = rx_ring->adapter; 2334 struct pci_dev *pdev = adapter->pdev; 2335 int i; 2336 2337 e1000_clean_rx_ring(rx_ring); 2338 2339 for (i = 0; i < rx_ring->count; i++) 2340 kfree(rx_ring->buffer_info[i].ps_pages); 2341 2342 vfree(rx_ring->buffer_info); 2343 rx_ring->buffer_info = NULL; 2344 2345 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc, 2346 rx_ring->dma); 2347 rx_ring->desc = NULL; 2348 } 2349 2350 /** 2351 * e1000_update_itr - update the dynamic ITR value based on statistics 2352 * @adapter: pointer to adapter 2353 * @itr_setting: current adapter->itr 2354 * @packets: the number of packets during this measurement interval 2355 * @bytes: the number of bytes during this measurement interval 2356 * 2357 * Stores a new ITR value based on packets and byte 2358 * counts during the last interrupt. The advantage of per interrupt 2359 * computation is faster updates and more accurate ITR for the current 2360 * traffic pattern. Constants in this function were computed 2361 * based on theoretical maximum wire speed and thresholds were set based 2362 * on testing data as well as attempting to minimize response time 2363 * while increasing bulk throughput. This functionality is controlled 2364 * by the InterruptThrottleRate module parameter. 2365 **/ 2366 static unsigned int e1000_update_itr(struct e1000_adapter *adapter, 2367 u16 itr_setting, int packets, 2368 int bytes) 2369 { 2370 unsigned int retval = itr_setting; 2371 2372 if (packets == 0) 2373 goto update_itr_done; 2374 2375 switch (itr_setting) { 2376 case lowest_latency: 2377 /* handle TSO and jumbo frames */ 2378 if (bytes/packets > 8000) 2379 retval = bulk_latency; 2380 else if ((packets < 5) && (bytes > 512)) 2381 retval = low_latency; 2382 break; 2383 case low_latency: /* 50 usec aka 20000 ints/s */ 2384 if (bytes > 10000) { 2385 /* this if handles the TSO accounting */ 2386 if (bytes/packets > 8000) 2387 retval = bulk_latency; 2388 else if ((packets < 10) || ((bytes/packets) > 1200)) 2389 retval = bulk_latency; 2390 else if ((packets > 35)) 2391 retval = lowest_latency; 2392 } else if (bytes/packets > 2000) { 2393 retval = bulk_latency; 2394 } else if (packets <= 2 && bytes < 512) { 2395 retval = lowest_latency; 2396 } 2397 break; 2398 case bulk_latency: /* 250 usec aka 4000 ints/s */ 2399 if (bytes > 25000) { 2400 if (packets > 35) 2401 retval = low_latency; 2402 } else if (bytes < 6000) { 2403 retval = low_latency; 2404 } 2405 break; 2406 } 2407 2408 update_itr_done: 2409 return retval; 2410 } 2411 2412 static void e1000_set_itr(struct e1000_adapter *adapter) 2413 { 2414 struct e1000_hw *hw = &adapter->hw; 2415 u16 current_itr; 2416 u32 new_itr = adapter->itr; 2417 2418 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */ 2419 if (adapter->link_speed != SPEED_1000) { 2420 current_itr = 0; 2421 new_itr = 4000; 2422 goto set_itr_now; 2423 } 2424 2425 if (adapter->flags2 & FLAG2_DISABLE_AIM) { 2426 new_itr = 0; 2427 goto set_itr_now; 2428 } 2429 2430 adapter->tx_itr = e1000_update_itr(adapter, 2431 adapter->tx_itr, 2432 adapter->total_tx_packets, 2433 adapter->total_tx_bytes); 2434 /* conservative mode (itr 3) eliminates the lowest_latency setting */ 2435 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency) 2436 adapter->tx_itr = low_latency; 2437 2438 adapter->rx_itr = e1000_update_itr(adapter, 2439 adapter->rx_itr, 2440 adapter->total_rx_packets, 2441 adapter->total_rx_bytes); 2442 /* conservative mode (itr 3) eliminates the lowest_latency setting */ 2443 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency) 2444 adapter->rx_itr = low_latency; 2445 2446 current_itr = max(adapter->rx_itr, adapter->tx_itr); 2447 2448 switch (current_itr) { 2449 /* counts and packets in update_itr are dependent on these numbers */ 2450 case lowest_latency: 2451 new_itr = 70000; 2452 break; 2453 case low_latency: 2454 new_itr = 20000; /* aka hwitr = ~200 */ 2455 break; 2456 case bulk_latency: 2457 new_itr = 4000; 2458 break; 2459 default: 2460 break; 2461 } 2462 2463 set_itr_now: 2464 if (new_itr != adapter->itr) { 2465 /* 2466 * this attempts to bias the interrupt rate towards Bulk 2467 * by adding intermediate steps when interrupt rate is 2468 * increasing 2469 */ 2470 new_itr = new_itr > adapter->itr ? 2471 min(adapter->itr + (new_itr >> 2), new_itr) : 2472 new_itr; 2473 adapter->itr = new_itr; 2474 adapter->rx_ring->itr_val = new_itr; 2475 if (adapter->msix_entries) 2476 adapter->rx_ring->set_itr = 1; 2477 else 2478 if (new_itr) 2479 ew32(ITR, 1000000000 / (new_itr * 256)); 2480 else 2481 ew32(ITR, 0); 2482 } 2483 } 2484 2485 /** 2486 * e1000_alloc_queues - Allocate memory for all rings 2487 * @adapter: board private structure to initialize 2488 **/ 2489 static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter) 2490 { 2491 int size = sizeof(struct e1000_ring); 2492 2493 adapter->tx_ring = kzalloc(size, GFP_KERNEL); 2494 if (!adapter->tx_ring) 2495 goto err; 2496 adapter->tx_ring->count = adapter->tx_ring_count; 2497 adapter->tx_ring->adapter = adapter; 2498 2499 adapter->rx_ring = kzalloc(size, GFP_KERNEL); 2500 if (!adapter->rx_ring) 2501 goto err; 2502 adapter->rx_ring->count = adapter->rx_ring_count; 2503 adapter->rx_ring->adapter = adapter; 2504 2505 return 0; 2506 err: 2507 e_err("Unable to allocate memory for queues\n"); 2508 kfree(adapter->rx_ring); 2509 kfree(adapter->tx_ring); 2510 return -ENOMEM; 2511 } 2512 2513 /** 2514 * e1000_clean - NAPI Rx polling callback 2515 * @napi: struct associated with this polling callback 2516 * @budget: amount of packets driver is allowed to process this poll 2517 **/ 2518 static int e1000_clean(struct napi_struct *napi, int budget) 2519 { 2520 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi); 2521 struct e1000_hw *hw = &adapter->hw; 2522 struct net_device *poll_dev = adapter->netdev; 2523 int tx_cleaned = 1, work_done = 0; 2524 2525 adapter = netdev_priv(poll_dev); 2526 2527 if (adapter->msix_entries && 2528 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val)) 2529 goto clean_rx; 2530 2531 tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring); 2532 2533 clean_rx: 2534 adapter->clean_rx(adapter->rx_ring, &work_done, budget); 2535 2536 if (!tx_cleaned) 2537 work_done = budget; 2538 2539 /* If budget not fully consumed, exit the polling mode */ 2540 if (work_done < budget) { 2541 if (adapter->itr_setting & 3) 2542 e1000_set_itr(adapter); 2543 napi_complete(napi); 2544 if (!test_bit(__E1000_DOWN, &adapter->state)) { 2545 if (adapter->msix_entries) 2546 ew32(IMS, adapter->rx_ring->ims_val); 2547 else 2548 e1000_irq_enable(adapter); 2549 } 2550 } 2551 2552 return work_done; 2553 } 2554 2555 static int e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid) 2556 { 2557 struct e1000_adapter *adapter = netdev_priv(netdev); 2558 struct e1000_hw *hw = &adapter->hw; 2559 u32 vfta, index; 2560 2561 /* don't update vlan cookie if already programmed */ 2562 if ((adapter->hw.mng_cookie.status & 2563 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) && 2564 (vid == adapter->mng_vlan_id)) 2565 return 0; 2566 2567 /* add VID to filter table */ 2568 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2569 index = (vid >> 5) & 0x7F; 2570 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index); 2571 vfta |= (1 << (vid & 0x1F)); 2572 hw->mac.ops.write_vfta(hw, index, vfta); 2573 } 2574 2575 set_bit(vid, adapter->active_vlans); 2576 2577 return 0; 2578 } 2579 2580 static int e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid) 2581 { 2582 struct e1000_adapter *adapter = netdev_priv(netdev); 2583 struct e1000_hw *hw = &adapter->hw; 2584 u32 vfta, index; 2585 2586 if ((adapter->hw.mng_cookie.status & 2587 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) && 2588 (vid == adapter->mng_vlan_id)) { 2589 /* release control to f/w */ 2590 e1000e_release_hw_control(adapter); 2591 return 0; 2592 } 2593 2594 /* remove VID from filter table */ 2595 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2596 index = (vid >> 5) & 0x7F; 2597 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index); 2598 vfta &= ~(1 << (vid & 0x1F)); 2599 hw->mac.ops.write_vfta(hw, index, vfta); 2600 } 2601 2602 clear_bit(vid, adapter->active_vlans); 2603 2604 return 0; 2605 } 2606 2607 /** 2608 * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering 2609 * @adapter: board private structure to initialize 2610 **/ 2611 static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter) 2612 { 2613 struct net_device *netdev = adapter->netdev; 2614 struct e1000_hw *hw = &adapter->hw; 2615 u32 rctl; 2616 2617 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2618 /* disable VLAN receive filtering */ 2619 rctl = er32(RCTL); 2620 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN); 2621 ew32(RCTL, rctl); 2622 2623 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) { 2624 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); 2625 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; 2626 } 2627 } 2628 } 2629 2630 /** 2631 * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering 2632 * @adapter: board private structure to initialize 2633 **/ 2634 static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter) 2635 { 2636 struct e1000_hw *hw = &adapter->hw; 2637 u32 rctl; 2638 2639 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2640 /* enable VLAN receive filtering */ 2641 rctl = er32(RCTL); 2642 rctl |= E1000_RCTL_VFE; 2643 rctl &= ~E1000_RCTL_CFIEN; 2644 ew32(RCTL, rctl); 2645 } 2646 } 2647 2648 /** 2649 * e1000e_vlan_strip_enable - helper to disable HW VLAN stripping 2650 * @adapter: board private structure to initialize 2651 **/ 2652 static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter) 2653 { 2654 struct e1000_hw *hw = &adapter->hw; 2655 u32 ctrl; 2656 2657 /* disable VLAN tag insert/strip */ 2658 ctrl = er32(CTRL); 2659 ctrl &= ~E1000_CTRL_VME; 2660 ew32(CTRL, ctrl); 2661 } 2662 2663 /** 2664 * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping 2665 * @adapter: board private structure to initialize 2666 **/ 2667 static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter) 2668 { 2669 struct e1000_hw *hw = &adapter->hw; 2670 u32 ctrl; 2671 2672 /* enable VLAN tag insert/strip */ 2673 ctrl = er32(CTRL); 2674 ctrl |= E1000_CTRL_VME; 2675 ew32(CTRL, ctrl); 2676 } 2677 2678 static void e1000_update_mng_vlan(struct e1000_adapter *adapter) 2679 { 2680 struct net_device *netdev = adapter->netdev; 2681 u16 vid = adapter->hw.mng_cookie.vlan_id; 2682 u16 old_vid = adapter->mng_vlan_id; 2683 2684 if (adapter->hw.mng_cookie.status & 2685 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) { 2686 e1000_vlan_rx_add_vid(netdev, vid); 2687 adapter->mng_vlan_id = vid; 2688 } 2689 2690 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid)) 2691 e1000_vlan_rx_kill_vid(netdev, old_vid); 2692 } 2693 2694 static void e1000_restore_vlan(struct e1000_adapter *adapter) 2695 { 2696 u16 vid; 2697 2698 e1000_vlan_rx_add_vid(adapter->netdev, 0); 2699 2700 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID) 2701 e1000_vlan_rx_add_vid(adapter->netdev, vid); 2702 } 2703 2704 static void e1000_init_manageability_pt(struct e1000_adapter *adapter) 2705 { 2706 struct e1000_hw *hw = &adapter->hw; 2707 u32 manc, manc2h, mdef, i, j; 2708 2709 if (!(adapter->flags & FLAG_MNG_PT_ENABLED)) 2710 return; 2711 2712 manc = er32(MANC); 2713 2714 /* 2715 * enable receiving management packets to the host. this will probably 2716 * generate destination unreachable messages from the host OS, but 2717 * the packets will be handled on SMBUS 2718 */ 2719 manc |= E1000_MANC_EN_MNG2HOST; 2720 manc2h = er32(MANC2H); 2721 2722 switch (hw->mac.type) { 2723 default: 2724 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664); 2725 break; 2726 case e1000_82574: 2727 case e1000_82583: 2728 /* 2729 * Check if IPMI pass-through decision filter already exists; 2730 * if so, enable it. 2731 */ 2732 for (i = 0, j = 0; i < 8; i++) { 2733 mdef = er32(MDEF(i)); 2734 2735 /* Ignore filters with anything other than IPMI ports */ 2736 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664)) 2737 continue; 2738 2739 /* Enable this decision filter in MANC2H */ 2740 if (mdef) 2741 manc2h |= (1 << i); 2742 2743 j |= mdef; 2744 } 2745 2746 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664)) 2747 break; 2748 2749 /* Create new decision filter in an empty filter */ 2750 for (i = 0, j = 0; i < 8; i++) 2751 if (er32(MDEF(i)) == 0) { 2752 ew32(MDEF(i), (E1000_MDEF_PORT_623 | 2753 E1000_MDEF_PORT_664)); 2754 manc2h |= (1 << 1); 2755 j++; 2756 break; 2757 } 2758 2759 if (!j) 2760 e_warn("Unable to create IPMI pass-through filter\n"); 2761 break; 2762 } 2763 2764 ew32(MANC2H, manc2h); 2765 ew32(MANC, manc); 2766 } 2767 2768 /** 2769 * e1000_configure_tx - Configure Transmit Unit after Reset 2770 * @adapter: board private structure 2771 * 2772 * Configure the Tx unit of the MAC after a reset. 2773 **/ 2774 static void e1000_configure_tx(struct e1000_adapter *adapter) 2775 { 2776 struct e1000_hw *hw = &adapter->hw; 2777 struct e1000_ring *tx_ring = adapter->tx_ring; 2778 u64 tdba; 2779 u32 tdlen, tarc; 2780 2781 /* Setup the HW Tx Head and Tail descriptor pointers */ 2782 tdba = tx_ring->dma; 2783 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc); 2784 ew32(TDBAL, (tdba & DMA_BIT_MASK(32))); 2785 ew32(TDBAH, (tdba >> 32)); 2786 ew32(TDLEN, tdlen); 2787 ew32(TDH, 0); 2788 ew32(TDT, 0); 2789 tx_ring->head = adapter->hw.hw_addr + E1000_TDH; 2790 tx_ring->tail = adapter->hw.hw_addr + E1000_TDT; 2791 2792 /* Set the Tx Interrupt Delay register */ 2793 ew32(TIDV, adapter->tx_int_delay); 2794 /* Tx irq moderation */ 2795 ew32(TADV, adapter->tx_abs_int_delay); 2796 2797 if (adapter->flags2 & FLAG2_DMA_BURST) { 2798 u32 txdctl = er32(TXDCTL(0)); 2799 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH | 2800 E1000_TXDCTL_WTHRESH); 2801 /* 2802 * set up some performance related parameters to encourage the 2803 * hardware to use the bus more efficiently in bursts, depends 2804 * on the tx_int_delay to be enabled, 2805 * wthresh = 5 ==> burst write a cacheline (64 bytes) at a time 2806 * hthresh = 1 ==> prefetch when one or more available 2807 * pthresh = 0x1f ==> prefetch if internal cache 31 or less 2808 * BEWARE: this seems to work but should be considered first if 2809 * there are Tx hangs or other Tx related bugs 2810 */ 2811 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE; 2812 ew32(TXDCTL(0), txdctl); 2813 } 2814 /* erratum work around: set txdctl the same for both queues */ 2815 ew32(TXDCTL(1), er32(TXDCTL(0))); 2816 2817 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) { 2818 tarc = er32(TARC(0)); 2819 /* 2820 * set the speed mode bit, we'll clear it if we're not at 2821 * gigabit link later 2822 */ 2823 #define SPEED_MODE_BIT (1 << 21) 2824 tarc |= SPEED_MODE_BIT; 2825 ew32(TARC(0), tarc); 2826 } 2827 2828 /* errata: program both queues to unweighted RR */ 2829 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) { 2830 tarc = er32(TARC(0)); 2831 tarc |= 1; 2832 ew32(TARC(0), tarc); 2833 tarc = er32(TARC(1)); 2834 tarc |= 1; 2835 ew32(TARC(1), tarc); 2836 } 2837 2838 /* Setup Transmit Descriptor Settings for eop descriptor */ 2839 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS; 2840 2841 /* only set IDE if we are delaying interrupts using the timers */ 2842 if (adapter->tx_int_delay) 2843 adapter->txd_cmd |= E1000_TXD_CMD_IDE; 2844 2845 /* enable Report Status bit */ 2846 adapter->txd_cmd |= E1000_TXD_CMD_RS; 2847 2848 e1000e_config_collision_dist(hw); 2849 } 2850 2851 /** 2852 * e1000_setup_rctl - configure the receive control registers 2853 * @adapter: Board private structure 2854 **/ 2855 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \ 2856 (((S) & (PAGE_SIZE - 1)) ? 1 : 0)) 2857 static void e1000_setup_rctl(struct e1000_adapter *adapter) 2858 { 2859 struct e1000_hw *hw = &adapter->hw; 2860 u32 rctl, rfctl; 2861 u32 pages = 0; 2862 2863 /* Workaround Si errata on 82579 - configure jumbo frame flow */ 2864 if (hw->mac.type == e1000_pch2lan) { 2865 s32 ret_val; 2866 2867 if (adapter->netdev->mtu > ETH_DATA_LEN) 2868 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true); 2869 else 2870 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false); 2871 2872 if (ret_val) 2873 e_dbg("failed to enable jumbo frame workaround mode\n"); 2874 } 2875 2876 /* Program MC offset vector base */ 2877 rctl = er32(RCTL); 2878 rctl &= ~(3 << E1000_RCTL_MO_SHIFT); 2879 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | 2880 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF | 2881 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT); 2882 2883 /* Do not Store bad packets */ 2884 rctl &= ~E1000_RCTL_SBP; 2885 2886 /* Enable Long Packet receive */ 2887 if (adapter->netdev->mtu <= ETH_DATA_LEN) 2888 rctl &= ~E1000_RCTL_LPE; 2889 else 2890 rctl |= E1000_RCTL_LPE; 2891 2892 /* Some systems expect that the CRC is included in SMBUS traffic. The 2893 * hardware strips the CRC before sending to both SMBUS (BMC) and to 2894 * host memory when this is enabled 2895 */ 2896 if (adapter->flags2 & FLAG2_CRC_STRIPPING) 2897 rctl |= E1000_RCTL_SECRC; 2898 2899 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */ 2900 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) { 2901 u16 phy_data; 2902 2903 e1e_rphy(hw, PHY_REG(770, 26), &phy_data); 2904 phy_data &= 0xfff8; 2905 phy_data |= (1 << 2); 2906 e1e_wphy(hw, PHY_REG(770, 26), phy_data); 2907 2908 e1e_rphy(hw, 22, &phy_data); 2909 phy_data &= 0x0fff; 2910 phy_data |= (1 << 14); 2911 e1e_wphy(hw, 0x10, 0x2823); 2912 e1e_wphy(hw, 0x11, 0x0003); 2913 e1e_wphy(hw, 22, phy_data); 2914 } 2915 2916 /* Setup buffer sizes */ 2917 rctl &= ~E1000_RCTL_SZ_4096; 2918 rctl |= E1000_RCTL_BSEX; 2919 switch (adapter->rx_buffer_len) { 2920 case 2048: 2921 default: 2922 rctl |= E1000_RCTL_SZ_2048; 2923 rctl &= ~E1000_RCTL_BSEX; 2924 break; 2925 case 4096: 2926 rctl |= E1000_RCTL_SZ_4096; 2927 break; 2928 case 8192: 2929 rctl |= E1000_RCTL_SZ_8192; 2930 break; 2931 case 16384: 2932 rctl |= E1000_RCTL_SZ_16384; 2933 break; 2934 } 2935 2936 /* Enable Extended Status in all Receive Descriptors */ 2937 rfctl = er32(RFCTL); 2938 rfctl |= E1000_RFCTL_EXTEN; 2939 2940 /* 2941 * 82571 and greater support packet-split where the protocol 2942 * header is placed in skb->data and the packet data is 2943 * placed in pages hanging off of skb_shinfo(skb)->nr_frags. 2944 * In the case of a non-split, skb->data is linearly filled, 2945 * followed by the page buffers. Therefore, skb->data is 2946 * sized to hold the largest protocol header. 2947 * 2948 * allocations using alloc_page take too long for regular MTU 2949 * so only enable packet split for jumbo frames 2950 * 2951 * Using pages when the page size is greater than 16k wastes 2952 * a lot of memory, since we allocate 3 pages at all times 2953 * per packet. 2954 */ 2955 pages = PAGE_USE_COUNT(adapter->netdev->mtu); 2956 if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE)) 2957 adapter->rx_ps_pages = pages; 2958 else 2959 adapter->rx_ps_pages = 0; 2960 2961 if (adapter->rx_ps_pages) { 2962 u32 psrctl = 0; 2963 2964 /* 2965 * disable packet split support for IPv6 extension headers, 2966 * because some malformed IPv6 headers can hang the Rx 2967 */ 2968 rfctl |= (E1000_RFCTL_IPV6_EX_DIS | 2969 E1000_RFCTL_NEW_IPV6_EXT_DIS); 2970 2971 /* Enable Packet split descriptors */ 2972 rctl |= E1000_RCTL_DTYP_PS; 2973 2974 psrctl |= adapter->rx_ps_bsize0 >> 2975 E1000_PSRCTL_BSIZE0_SHIFT; 2976 2977 switch (adapter->rx_ps_pages) { 2978 case 3: 2979 psrctl |= PAGE_SIZE << 2980 E1000_PSRCTL_BSIZE3_SHIFT; 2981 case 2: 2982 psrctl |= PAGE_SIZE << 2983 E1000_PSRCTL_BSIZE2_SHIFT; 2984 case 1: 2985 psrctl |= PAGE_SIZE >> 2986 E1000_PSRCTL_BSIZE1_SHIFT; 2987 break; 2988 } 2989 2990 ew32(PSRCTL, psrctl); 2991 } 2992 2993 ew32(RFCTL, rfctl); 2994 ew32(RCTL, rctl); 2995 /* just started the receive unit, no need to restart */ 2996 adapter->flags &= ~FLAG_RX_RESTART_NOW; 2997 } 2998 2999 /** 3000 * e1000_configure_rx - Configure Receive Unit after Reset 3001 * @adapter: board private structure 3002 * 3003 * Configure the Rx unit of the MAC after a reset. 3004 **/ 3005 static void e1000_configure_rx(struct e1000_adapter *adapter) 3006 { 3007 struct e1000_hw *hw = &adapter->hw; 3008 struct e1000_ring *rx_ring = adapter->rx_ring; 3009 u64 rdba; 3010 u32 rdlen, rctl, rxcsum, ctrl_ext; 3011 3012 if (adapter->rx_ps_pages) { 3013 /* this is a 32 byte descriptor */ 3014 rdlen = rx_ring->count * 3015 sizeof(union e1000_rx_desc_packet_split); 3016 adapter->clean_rx = e1000_clean_rx_irq_ps; 3017 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps; 3018 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) { 3019 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended); 3020 adapter->clean_rx = e1000_clean_jumbo_rx_irq; 3021 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers; 3022 } else { 3023 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended); 3024 adapter->clean_rx = e1000_clean_rx_irq; 3025 adapter->alloc_rx_buf = e1000_alloc_rx_buffers; 3026 } 3027 3028 /* disable receives while setting up the descriptors */ 3029 rctl = er32(RCTL); 3030 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX)) 3031 ew32(RCTL, rctl & ~E1000_RCTL_EN); 3032 e1e_flush(); 3033 usleep_range(10000, 20000); 3034 3035 if (adapter->flags2 & FLAG2_DMA_BURST) { 3036 /* 3037 * set the writeback threshold (only takes effect if the RDTR 3038 * is set). set GRAN=1 and write back up to 0x4 worth, and 3039 * enable prefetching of 0x20 Rx descriptors 3040 * granularity = 01 3041 * wthresh = 04, 3042 * hthresh = 04, 3043 * pthresh = 0x20 3044 */ 3045 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE); 3046 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE); 3047 3048 /* 3049 * override the delay timers for enabling bursting, only if 3050 * the value was not set by the user via module options 3051 */ 3052 if (adapter->rx_int_delay == DEFAULT_RDTR) 3053 adapter->rx_int_delay = BURST_RDTR; 3054 if (adapter->rx_abs_int_delay == DEFAULT_RADV) 3055 adapter->rx_abs_int_delay = BURST_RADV; 3056 } 3057 3058 /* set the Receive Delay Timer Register */ 3059 ew32(RDTR, adapter->rx_int_delay); 3060 3061 /* irq moderation */ 3062 ew32(RADV, adapter->rx_abs_int_delay); 3063 if ((adapter->itr_setting != 0) && (adapter->itr != 0)) 3064 ew32(ITR, 1000000000 / (adapter->itr * 256)); 3065 3066 ctrl_ext = er32(CTRL_EXT); 3067 /* Auto-Mask interrupts upon ICR access */ 3068 ctrl_ext |= E1000_CTRL_EXT_IAME; 3069 ew32(IAM, 0xffffffff); 3070 ew32(CTRL_EXT, ctrl_ext); 3071 e1e_flush(); 3072 3073 /* 3074 * Setup the HW Rx Head and Tail Descriptor Pointers and 3075 * the Base and Length of the Rx Descriptor Ring 3076 */ 3077 rdba = rx_ring->dma; 3078 ew32(RDBAL, (rdba & DMA_BIT_MASK(32))); 3079 ew32(RDBAH, (rdba >> 32)); 3080 ew32(RDLEN, rdlen); 3081 ew32(RDH, 0); 3082 ew32(RDT, 0); 3083 rx_ring->head = adapter->hw.hw_addr + E1000_RDH; 3084 rx_ring->tail = adapter->hw.hw_addr + E1000_RDT; 3085 3086 /* Enable Receive Checksum Offload for TCP and UDP */ 3087 rxcsum = er32(RXCSUM); 3088 if (adapter->netdev->features & NETIF_F_RXCSUM) { 3089 rxcsum |= E1000_RXCSUM_TUOFL; 3090 3091 /* 3092 * IPv4 payload checksum for UDP fragments must be 3093 * used in conjunction with packet-split. 3094 */ 3095 if (adapter->rx_ps_pages) 3096 rxcsum |= E1000_RXCSUM_IPPCSE; 3097 } else { 3098 rxcsum &= ~E1000_RXCSUM_TUOFL; 3099 /* no need to clear IPPCSE as it defaults to 0 */ 3100 } 3101 ew32(RXCSUM, rxcsum); 3102 3103 if (adapter->hw.mac.type == e1000_pch2lan) { 3104 /* 3105 * With jumbo frames, excessive C-state transition 3106 * latencies result in dropped transactions. 3107 */ 3108 if (adapter->netdev->mtu > ETH_DATA_LEN) { 3109 u32 rxdctl = er32(RXDCTL(0)); 3110 ew32(RXDCTL(0), rxdctl | 0x3); 3111 pm_qos_update_request(&adapter->netdev->pm_qos_req, 55); 3112 } else { 3113 pm_qos_update_request(&adapter->netdev->pm_qos_req, 3114 PM_QOS_DEFAULT_VALUE); 3115 } 3116 } 3117 3118 /* Enable Receives */ 3119 ew32(RCTL, rctl); 3120 } 3121 3122 /** 3123 * e1000e_write_mc_addr_list - write multicast addresses to MTA 3124 * @netdev: network interface device structure 3125 * 3126 * Writes multicast address list to the MTA hash table. 3127 * Returns: -ENOMEM on failure 3128 * 0 on no addresses written 3129 * X on writing X addresses to MTA 3130 */ 3131 static int e1000e_write_mc_addr_list(struct net_device *netdev) 3132 { 3133 struct e1000_adapter *adapter = netdev_priv(netdev); 3134 struct e1000_hw *hw = &adapter->hw; 3135 struct netdev_hw_addr *ha; 3136 u8 *mta_list; 3137 int i; 3138 3139 if (netdev_mc_empty(netdev)) { 3140 /* nothing to program, so clear mc list */ 3141 hw->mac.ops.update_mc_addr_list(hw, NULL, 0); 3142 return 0; 3143 } 3144 3145 mta_list = kzalloc(netdev_mc_count(netdev) * ETH_ALEN, GFP_ATOMIC); 3146 if (!mta_list) 3147 return -ENOMEM; 3148 3149 /* update_mc_addr_list expects a packed array of only addresses. */ 3150 i = 0; 3151 netdev_for_each_mc_addr(ha, netdev) 3152 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN); 3153 3154 hw->mac.ops.update_mc_addr_list(hw, mta_list, i); 3155 kfree(mta_list); 3156 3157 return netdev_mc_count(netdev); 3158 } 3159 3160 /** 3161 * e1000e_write_uc_addr_list - write unicast addresses to RAR table 3162 * @netdev: network interface device structure 3163 * 3164 * Writes unicast address list to the RAR table. 3165 * Returns: -ENOMEM on failure/insufficient address space 3166 * 0 on no addresses written 3167 * X on writing X addresses to the RAR table 3168 **/ 3169 static int e1000e_write_uc_addr_list(struct net_device *netdev) 3170 { 3171 struct e1000_adapter *adapter = netdev_priv(netdev); 3172 struct e1000_hw *hw = &adapter->hw; 3173 unsigned int rar_entries = hw->mac.rar_entry_count; 3174 int count = 0; 3175 3176 /* save a rar entry for our hardware address */ 3177 rar_entries--; 3178 3179 /* save a rar entry for the LAA workaround */ 3180 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) 3181 rar_entries--; 3182 3183 /* return ENOMEM indicating insufficient memory for addresses */ 3184 if (netdev_uc_count(netdev) > rar_entries) 3185 return -ENOMEM; 3186 3187 if (!netdev_uc_empty(netdev) && rar_entries) { 3188 struct netdev_hw_addr *ha; 3189 3190 /* 3191 * write the addresses in reverse order to avoid write 3192 * combining 3193 */ 3194 netdev_for_each_uc_addr(ha, netdev) { 3195 if (!rar_entries) 3196 break; 3197 e1000e_rar_set(hw, ha->addr, rar_entries--); 3198 count++; 3199 } 3200 } 3201 3202 /* zero out the remaining RAR entries not used above */ 3203 for (; rar_entries > 0; rar_entries--) { 3204 ew32(RAH(rar_entries), 0); 3205 ew32(RAL(rar_entries), 0); 3206 } 3207 e1e_flush(); 3208 3209 return count; 3210 } 3211 3212 /** 3213 * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set 3214 * @netdev: network interface device structure 3215 * 3216 * The ndo_set_rx_mode entry point is called whenever the unicast or multicast 3217 * address list or the network interface flags are updated. This routine is 3218 * responsible for configuring the hardware for proper unicast, multicast, 3219 * promiscuous mode, and all-multi behavior. 3220 **/ 3221 static void e1000e_set_rx_mode(struct net_device *netdev) 3222 { 3223 struct e1000_adapter *adapter = netdev_priv(netdev); 3224 struct e1000_hw *hw = &adapter->hw; 3225 u32 rctl; 3226 3227 /* Check for Promiscuous and All Multicast modes */ 3228 rctl = er32(RCTL); 3229 3230 /* clear the affected bits */ 3231 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE); 3232 3233 if (netdev->flags & IFF_PROMISC) { 3234 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); 3235 /* Do not hardware filter VLANs in promisc mode */ 3236 e1000e_vlan_filter_disable(adapter); 3237 } else { 3238 int count; 3239 if (netdev->flags & IFF_ALLMULTI) { 3240 rctl |= E1000_RCTL_MPE; 3241 } else { 3242 /* 3243 * Write addresses to the MTA, if the attempt fails 3244 * then we should just turn on promiscuous mode so 3245 * that we can at least receive multicast traffic 3246 */ 3247 count = e1000e_write_mc_addr_list(netdev); 3248 if (count < 0) 3249 rctl |= E1000_RCTL_MPE; 3250 } 3251 e1000e_vlan_filter_enable(adapter); 3252 /* 3253 * Write addresses to available RAR registers, if there is not 3254 * sufficient space to store all the addresses then enable 3255 * unicast promiscuous mode 3256 */ 3257 count = e1000e_write_uc_addr_list(netdev); 3258 if (count < 0) 3259 rctl |= E1000_RCTL_UPE; 3260 } 3261 3262 ew32(RCTL, rctl); 3263 3264 if (netdev->features & NETIF_F_HW_VLAN_RX) 3265 e1000e_vlan_strip_enable(adapter); 3266 else 3267 e1000e_vlan_strip_disable(adapter); 3268 } 3269 3270 static void e1000e_setup_rss_hash(struct e1000_adapter *adapter) 3271 { 3272 struct e1000_hw *hw = &adapter->hw; 3273 u32 mrqc, rxcsum; 3274 int i; 3275 static const u32 rsskey[10] = { 3276 0xda565a6d, 0xc20e5b25, 0x3d256741, 0xb08fa343, 0xcb2bcad0, 3277 0xb4307bae, 0xa32dcb77, 0x0cf23080, 0x3bb7426a, 0xfa01acbe 3278 }; 3279 3280 /* Fill out hash function seed */ 3281 for (i = 0; i < 10; i++) 3282 ew32(RSSRK(i), rsskey[i]); 3283 3284 /* Direct all traffic to queue 0 */ 3285 for (i = 0; i < 32; i++) 3286 ew32(RETA(i), 0); 3287 3288 /* 3289 * Disable raw packet checksumming so that RSS hash is placed in 3290 * descriptor on writeback. 3291 */ 3292 rxcsum = er32(RXCSUM); 3293 rxcsum |= E1000_RXCSUM_PCSD; 3294 3295 ew32(RXCSUM, rxcsum); 3296 3297 mrqc = (E1000_MRQC_RSS_FIELD_IPV4 | 3298 E1000_MRQC_RSS_FIELD_IPV4_TCP | 3299 E1000_MRQC_RSS_FIELD_IPV6 | 3300 E1000_MRQC_RSS_FIELD_IPV6_TCP | 3301 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX); 3302 3303 ew32(MRQC, mrqc); 3304 } 3305 3306 /** 3307 * e1000_configure - configure the hardware for Rx and Tx 3308 * @adapter: private board structure 3309 **/ 3310 static void e1000_configure(struct e1000_adapter *adapter) 3311 { 3312 struct e1000_ring *rx_ring = adapter->rx_ring; 3313 3314 e1000e_set_rx_mode(adapter->netdev); 3315 3316 e1000_restore_vlan(adapter); 3317 e1000_init_manageability_pt(adapter); 3318 3319 e1000_configure_tx(adapter); 3320 3321 if (adapter->netdev->features & NETIF_F_RXHASH) 3322 e1000e_setup_rss_hash(adapter); 3323 e1000_setup_rctl(adapter); 3324 e1000_configure_rx(adapter); 3325 adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL); 3326 } 3327 3328 /** 3329 * e1000e_power_up_phy - restore link in case the phy was powered down 3330 * @adapter: address of board private structure 3331 * 3332 * The phy may be powered down to save power and turn off link when the 3333 * driver is unloaded and wake on lan is not enabled (among others) 3334 * *** this routine MUST be followed by a call to e1000e_reset *** 3335 **/ 3336 void e1000e_power_up_phy(struct e1000_adapter *adapter) 3337 { 3338 if (adapter->hw.phy.ops.power_up) 3339 adapter->hw.phy.ops.power_up(&adapter->hw); 3340 3341 adapter->hw.mac.ops.setup_link(&adapter->hw); 3342 } 3343 3344 /** 3345 * e1000_power_down_phy - Power down the PHY 3346 * 3347 * Power down the PHY so no link is implied when interface is down. 3348 * The PHY cannot be powered down if management or WoL is active. 3349 */ 3350 static void e1000_power_down_phy(struct e1000_adapter *adapter) 3351 { 3352 /* WoL is enabled */ 3353 if (adapter->wol) 3354 return; 3355 3356 if (adapter->hw.phy.ops.power_down) 3357 adapter->hw.phy.ops.power_down(&adapter->hw); 3358 } 3359 3360 /** 3361 * e1000e_reset - bring the hardware into a known good state 3362 * 3363 * This function boots the hardware and enables some settings that 3364 * require a configuration cycle of the hardware - those cannot be 3365 * set/changed during runtime. After reset the device needs to be 3366 * properly configured for Rx, Tx etc. 3367 */ 3368 void e1000e_reset(struct e1000_adapter *adapter) 3369 { 3370 struct e1000_mac_info *mac = &adapter->hw.mac; 3371 struct e1000_fc_info *fc = &adapter->hw.fc; 3372 struct e1000_hw *hw = &adapter->hw; 3373 u32 tx_space, min_tx_space, min_rx_space; 3374 u32 pba = adapter->pba; 3375 u16 hwm; 3376 3377 /* reset Packet Buffer Allocation to default */ 3378 ew32(PBA, pba); 3379 3380 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) { 3381 /* 3382 * To maintain wire speed transmits, the Tx FIFO should be 3383 * large enough to accommodate two full transmit packets, 3384 * rounded up to the next 1KB and expressed in KB. Likewise, 3385 * the Rx FIFO should be large enough to accommodate at least 3386 * one full receive packet and is similarly rounded up and 3387 * expressed in KB. 3388 */ 3389 pba = er32(PBA); 3390 /* upper 16 bits has Tx packet buffer allocation size in KB */ 3391 tx_space = pba >> 16; 3392 /* lower 16 bits has Rx packet buffer allocation size in KB */ 3393 pba &= 0xffff; 3394 /* 3395 * the Tx fifo also stores 16 bytes of information about the Tx 3396 * but don't include ethernet FCS because hardware appends it 3397 */ 3398 min_tx_space = (adapter->max_frame_size + 3399 sizeof(struct e1000_tx_desc) - 3400 ETH_FCS_LEN) * 2; 3401 min_tx_space = ALIGN(min_tx_space, 1024); 3402 min_tx_space >>= 10; 3403 /* software strips receive CRC, so leave room for it */ 3404 min_rx_space = adapter->max_frame_size; 3405 min_rx_space = ALIGN(min_rx_space, 1024); 3406 min_rx_space >>= 10; 3407 3408 /* 3409 * If current Tx allocation is less than the min Tx FIFO size, 3410 * and the min Tx FIFO size is less than the current Rx FIFO 3411 * allocation, take space away from current Rx allocation 3412 */ 3413 if ((tx_space < min_tx_space) && 3414 ((min_tx_space - tx_space) < pba)) { 3415 pba -= min_tx_space - tx_space; 3416 3417 /* 3418 * if short on Rx space, Rx wins and must trump Tx 3419 * adjustment or use Early Receive if available 3420 */ 3421 if (pba < min_rx_space) 3422 pba = min_rx_space; 3423 } 3424 3425 ew32(PBA, pba); 3426 } 3427 3428 /* 3429 * flow control settings 3430 * 3431 * The high water mark must be low enough to fit one full frame 3432 * (or the size used for early receive) above it in the Rx FIFO. 3433 * Set it to the lower of: 3434 * - 90% of the Rx FIFO size, and 3435 * - the full Rx FIFO size minus one full frame 3436 */ 3437 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME) 3438 fc->pause_time = 0xFFFF; 3439 else 3440 fc->pause_time = E1000_FC_PAUSE_TIME; 3441 fc->send_xon = 1; 3442 fc->current_mode = fc->requested_mode; 3443 3444 switch (hw->mac.type) { 3445 case e1000_ich9lan: 3446 case e1000_ich10lan: 3447 if (adapter->netdev->mtu > ETH_DATA_LEN) { 3448 pba = 14; 3449 ew32(PBA, pba); 3450 fc->high_water = 0x2800; 3451 fc->low_water = fc->high_water - 8; 3452 break; 3453 } 3454 /* fall-through */ 3455 default: 3456 hwm = min(((pba << 10) * 9 / 10), 3457 ((pba << 10) - adapter->max_frame_size)); 3458 3459 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */ 3460 fc->low_water = fc->high_water - 8; 3461 break; 3462 case e1000_pchlan: 3463 /* 3464 * Workaround PCH LOM adapter hangs with certain network 3465 * loads. If hangs persist, try disabling Tx flow control. 3466 */ 3467 if (adapter->netdev->mtu > ETH_DATA_LEN) { 3468 fc->high_water = 0x3500; 3469 fc->low_water = 0x1500; 3470 } else { 3471 fc->high_water = 0x5000; 3472 fc->low_water = 0x3000; 3473 } 3474 fc->refresh_time = 0x1000; 3475 break; 3476 case e1000_pch2lan: 3477 fc->high_water = 0x05C20; 3478 fc->low_water = 0x05048; 3479 fc->pause_time = 0x0650; 3480 fc->refresh_time = 0x0400; 3481 if (adapter->netdev->mtu > ETH_DATA_LEN) { 3482 pba = 14; 3483 ew32(PBA, pba); 3484 } 3485 break; 3486 } 3487 3488 /* 3489 * Disable Adaptive Interrupt Moderation if 2 full packets cannot 3490 * fit in receive buffer. 3491 */ 3492 if (adapter->itr_setting & 0x3) { 3493 if ((adapter->max_frame_size * 2) > (pba << 10)) { 3494 if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) { 3495 dev_info(&adapter->pdev->dev, 3496 "Interrupt Throttle Rate turned off\n"); 3497 adapter->flags2 |= FLAG2_DISABLE_AIM; 3498 ew32(ITR, 0); 3499 } 3500 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) { 3501 dev_info(&adapter->pdev->dev, 3502 "Interrupt Throttle Rate turned on\n"); 3503 adapter->flags2 &= ~FLAG2_DISABLE_AIM; 3504 adapter->itr = 20000; 3505 ew32(ITR, 1000000000 / (adapter->itr * 256)); 3506 } 3507 } 3508 3509 /* Allow time for pending master requests to run */ 3510 mac->ops.reset_hw(hw); 3511 3512 /* 3513 * For parts with AMT enabled, let the firmware know 3514 * that the network interface is in control 3515 */ 3516 if (adapter->flags & FLAG_HAS_AMT) 3517 e1000e_get_hw_control(adapter); 3518 3519 ew32(WUC, 0); 3520 3521 if (mac->ops.init_hw(hw)) 3522 e_err("Hardware Error\n"); 3523 3524 e1000_update_mng_vlan(adapter); 3525 3526 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */ 3527 ew32(VET, ETH_P_8021Q); 3528 3529 e1000e_reset_adaptive(hw); 3530 3531 if (!netif_running(adapter->netdev) && 3532 !test_bit(__E1000_TESTING, &adapter->state)) { 3533 e1000_power_down_phy(adapter); 3534 return; 3535 } 3536 3537 e1000_get_phy_info(hw); 3538 3539 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) && 3540 !(adapter->flags & FLAG_SMART_POWER_DOWN)) { 3541 u16 phy_data = 0; 3542 /* 3543 * speed up time to link by disabling smart power down, ignore 3544 * the return value of this function because there is nothing 3545 * different we would do if it failed 3546 */ 3547 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data); 3548 phy_data &= ~IGP02E1000_PM_SPD; 3549 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data); 3550 } 3551 } 3552 3553 int e1000e_up(struct e1000_adapter *adapter) 3554 { 3555 struct e1000_hw *hw = &adapter->hw; 3556 3557 /* hardware has been reset, we need to reload some things */ 3558 e1000_configure(adapter); 3559 3560 clear_bit(__E1000_DOWN, &adapter->state); 3561 3562 if (adapter->msix_entries) 3563 e1000_configure_msix(adapter); 3564 e1000_irq_enable(adapter); 3565 3566 netif_start_queue(adapter->netdev); 3567 3568 /* fire a link change interrupt to start the watchdog */ 3569 if (adapter->msix_entries) 3570 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER); 3571 else 3572 ew32(ICS, E1000_ICS_LSC); 3573 3574 return 0; 3575 } 3576 3577 static void e1000e_flush_descriptors(struct e1000_adapter *adapter) 3578 { 3579 struct e1000_hw *hw = &adapter->hw; 3580 3581 if (!(adapter->flags2 & FLAG2_DMA_BURST)) 3582 return; 3583 3584 /* flush pending descriptor writebacks to memory */ 3585 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); 3586 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD); 3587 3588 /* execute the writes immediately */ 3589 e1e_flush(); 3590 } 3591 3592 static void e1000e_update_stats(struct e1000_adapter *adapter); 3593 3594 void e1000e_down(struct e1000_adapter *adapter) 3595 { 3596 struct net_device *netdev = adapter->netdev; 3597 struct e1000_hw *hw = &adapter->hw; 3598 u32 tctl, rctl; 3599 3600 /* 3601 * signal that we're down so the interrupt handler does not 3602 * reschedule our watchdog timer 3603 */ 3604 set_bit(__E1000_DOWN, &adapter->state); 3605 3606 /* disable receives in the hardware */ 3607 rctl = er32(RCTL); 3608 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX)) 3609 ew32(RCTL, rctl & ~E1000_RCTL_EN); 3610 /* flush and sleep below */ 3611 3612 netif_stop_queue(netdev); 3613 3614 /* disable transmits in the hardware */ 3615 tctl = er32(TCTL); 3616 tctl &= ~E1000_TCTL_EN; 3617 ew32(TCTL, tctl); 3618 3619 /* flush both disables and wait for them to finish */ 3620 e1e_flush(); 3621 usleep_range(10000, 20000); 3622 3623 e1000_irq_disable(adapter); 3624 3625 del_timer_sync(&adapter->watchdog_timer); 3626 del_timer_sync(&adapter->phy_info_timer); 3627 3628 netif_carrier_off(netdev); 3629 3630 spin_lock(&adapter->stats64_lock); 3631 e1000e_update_stats(adapter); 3632 spin_unlock(&adapter->stats64_lock); 3633 3634 e1000e_flush_descriptors(adapter); 3635 e1000_clean_tx_ring(adapter->tx_ring); 3636 e1000_clean_rx_ring(adapter->rx_ring); 3637 3638 adapter->link_speed = 0; 3639 adapter->link_duplex = 0; 3640 3641 if (!pci_channel_offline(adapter->pdev)) 3642 e1000e_reset(adapter); 3643 3644 /* 3645 * TODO: for power management, we could drop the link and 3646 * pci_disable_device here. 3647 */ 3648 } 3649 3650 void e1000e_reinit_locked(struct e1000_adapter *adapter) 3651 { 3652 might_sleep(); 3653 while (test_and_set_bit(__E1000_RESETTING, &adapter->state)) 3654 usleep_range(1000, 2000); 3655 e1000e_down(adapter); 3656 e1000e_up(adapter); 3657 clear_bit(__E1000_RESETTING, &adapter->state); 3658 } 3659 3660 /** 3661 * e1000_sw_init - Initialize general software structures (struct e1000_adapter) 3662 * @adapter: board private structure to initialize 3663 * 3664 * e1000_sw_init initializes the Adapter private data structure. 3665 * Fields are initialized based on PCI device information and 3666 * OS network device settings (MTU size). 3667 **/ 3668 static int __devinit e1000_sw_init(struct e1000_adapter *adapter) 3669 { 3670 struct net_device *netdev = adapter->netdev; 3671 3672 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN; 3673 adapter->rx_ps_bsize0 = 128; 3674 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; 3675 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN; 3676 adapter->tx_ring_count = E1000_DEFAULT_TXD; 3677 adapter->rx_ring_count = E1000_DEFAULT_RXD; 3678 3679 spin_lock_init(&adapter->stats64_lock); 3680 3681 e1000e_set_interrupt_capability(adapter); 3682 3683 if (e1000_alloc_queues(adapter)) 3684 return -ENOMEM; 3685 3686 /* Explicitly disable IRQ since the NIC can be in any state. */ 3687 e1000_irq_disable(adapter); 3688 3689 set_bit(__E1000_DOWN, &adapter->state); 3690 return 0; 3691 } 3692 3693 /** 3694 * e1000_intr_msi_test - Interrupt Handler 3695 * @irq: interrupt number 3696 * @data: pointer to a network interface device structure 3697 **/ 3698 static irqreturn_t e1000_intr_msi_test(int irq, void *data) 3699 { 3700 struct net_device *netdev = data; 3701 struct e1000_adapter *adapter = netdev_priv(netdev); 3702 struct e1000_hw *hw = &adapter->hw; 3703 u32 icr = er32(ICR); 3704 3705 e_dbg("icr is %08X\n", icr); 3706 if (icr & E1000_ICR_RXSEQ) { 3707 adapter->flags &= ~FLAG_MSI_TEST_FAILED; 3708 wmb(); 3709 } 3710 3711 return IRQ_HANDLED; 3712 } 3713 3714 /** 3715 * e1000_test_msi_interrupt - Returns 0 for successful test 3716 * @adapter: board private struct 3717 * 3718 * code flow taken from tg3.c 3719 **/ 3720 static int e1000_test_msi_interrupt(struct e1000_adapter *adapter) 3721 { 3722 struct net_device *netdev = adapter->netdev; 3723 struct e1000_hw *hw = &adapter->hw; 3724 int err; 3725 3726 /* poll_enable hasn't been called yet, so don't need disable */ 3727 /* clear any pending events */ 3728 er32(ICR); 3729 3730 /* free the real vector and request a test handler */ 3731 e1000_free_irq(adapter); 3732 e1000e_reset_interrupt_capability(adapter); 3733 3734 /* Assume that the test fails, if it succeeds then the test 3735 * MSI irq handler will unset this flag */ 3736 adapter->flags |= FLAG_MSI_TEST_FAILED; 3737 3738 err = pci_enable_msi(adapter->pdev); 3739 if (err) 3740 goto msi_test_failed; 3741 3742 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0, 3743 netdev->name, netdev); 3744 if (err) { 3745 pci_disable_msi(adapter->pdev); 3746 goto msi_test_failed; 3747 } 3748 3749 wmb(); 3750 3751 e1000_irq_enable(adapter); 3752 3753 /* fire an unusual interrupt on the test handler */ 3754 ew32(ICS, E1000_ICS_RXSEQ); 3755 e1e_flush(); 3756 msleep(50); 3757 3758 e1000_irq_disable(adapter); 3759 3760 rmb(); 3761 3762 if (adapter->flags & FLAG_MSI_TEST_FAILED) { 3763 adapter->int_mode = E1000E_INT_MODE_LEGACY; 3764 e_info("MSI interrupt test failed, using legacy interrupt.\n"); 3765 } else { 3766 e_dbg("MSI interrupt test succeeded!\n"); 3767 } 3768 3769 free_irq(adapter->pdev->irq, netdev); 3770 pci_disable_msi(adapter->pdev); 3771 3772 msi_test_failed: 3773 e1000e_set_interrupt_capability(adapter); 3774 return e1000_request_irq(adapter); 3775 } 3776 3777 /** 3778 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored 3779 * @adapter: board private struct 3780 * 3781 * code flow taken from tg3.c, called with e1000 interrupts disabled. 3782 **/ 3783 static int e1000_test_msi(struct e1000_adapter *adapter) 3784 { 3785 int err; 3786 u16 pci_cmd; 3787 3788 if (!(adapter->flags & FLAG_MSI_ENABLED)) 3789 return 0; 3790 3791 /* disable SERR in case the MSI write causes a master abort */ 3792 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd); 3793 if (pci_cmd & PCI_COMMAND_SERR) 3794 pci_write_config_word(adapter->pdev, PCI_COMMAND, 3795 pci_cmd & ~PCI_COMMAND_SERR); 3796 3797 err = e1000_test_msi_interrupt(adapter); 3798 3799 /* re-enable SERR */ 3800 if (pci_cmd & PCI_COMMAND_SERR) { 3801 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd); 3802 pci_cmd |= PCI_COMMAND_SERR; 3803 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd); 3804 } 3805 3806 return err; 3807 } 3808 3809 /** 3810 * e1000_open - Called when a network interface is made active 3811 * @netdev: network interface device structure 3812 * 3813 * Returns 0 on success, negative value on failure 3814 * 3815 * The open entry point is called when a network interface is made 3816 * active by the system (IFF_UP). At this point all resources needed 3817 * for transmit and receive operations are allocated, the interrupt 3818 * handler is registered with the OS, the watchdog timer is started, 3819 * and the stack is notified that the interface is ready. 3820 **/ 3821 static int e1000_open(struct net_device *netdev) 3822 { 3823 struct e1000_adapter *adapter = netdev_priv(netdev); 3824 struct e1000_hw *hw = &adapter->hw; 3825 struct pci_dev *pdev = adapter->pdev; 3826 int err; 3827 3828 /* disallow open during test */ 3829 if (test_bit(__E1000_TESTING, &adapter->state)) 3830 return -EBUSY; 3831 3832 pm_runtime_get_sync(&pdev->dev); 3833 3834 netif_carrier_off(netdev); 3835 3836 /* allocate transmit descriptors */ 3837 err = e1000e_setup_tx_resources(adapter->tx_ring); 3838 if (err) 3839 goto err_setup_tx; 3840 3841 /* allocate receive descriptors */ 3842 err = e1000e_setup_rx_resources(adapter->rx_ring); 3843 if (err) 3844 goto err_setup_rx; 3845 3846 /* 3847 * If AMT is enabled, let the firmware know that the network 3848 * interface is now open and reset the part to a known state. 3849 */ 3850 if (adapter->flags & FLAG_HAS_AMT) { 3851 e1000e_get_hw_control(adapter); 3852 e1000e_reset(adapter); 3853 } 3854 3855 e1000e_power_up_phy(adapter); 3856 3857 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; 3858 if ((adapter->hw.mng_cookie.status & 3859 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)) 3860 e1000_update_mng_vlan(adapter); 3861 3862 /* DMA latency requirement to workaround jumbo issue */ 3863 if (adapter->hw.mac.type == e1000_pch2lan) 3864 pm_qos_add_request(&adapter->netdev->pm_qos_req, 3865 PM_QOS_CPU_DMA_LATENCY, 3866 PM_QOS_DEFAULT_VALUE); 3867 3868 /* 3869 * before we allocate an interrupt, we must be ready to handle it. 3870 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt 3871 * as soon as we call pci_request_irq, so we have to setup our 3872 * clean_rx handler before we do so. 3873 */ 3874 e1000_configure(adapter); 3875 3876 err = e1000_request_irq(adapter); 3877 if (err) 3878 goto err_req_irq; 3879 3880 /* 3881 * Work around PCIe errata with MSI interrupts causing some chipsets to 3882 * ignore e1000e MSI messages, which means we need to test our MSI 3883 * interrupt now 3884 */ 3885 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) { 3886 err = e1000_test_msi(adapter); 3887 if (err) { 3888 e_err("Interrupt allocation failed\n"); 3889 goto err_req_irq; 3890 } 3891 } 3892 3893 /* From here on the code is the same as e1000e_up() */ 3894 clear_bit(__E1000_DOWN, &adapter->state); 3895 3896 napi_enable(&adapter->napi); 3897 3898 e1000_irq_enable(adapter); 3899 3900 adapter->tx_hang_recheck = false; 3901 netif_start_queue(netdev); 3902 3903 adapter->idle_check = true; 3904 pm_runtime_put(&pdev->dev); 3905 3906 /* fire a link status change interrupt to start the watchdog */ 3907 if (adapter->msix_entries) 3908 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER); 3909 else 3910 ew32(ICS, E1000_ICS_LSC); 3911 3912 return 0; 3913 3914 err_req_irq: 3915 e1000e_release_hw_control(adapter); 3916 e1000_power_down_phy(adapter); 3917 e1000e_free_rx_resources(adapter->rx_ring); 3918 err_setup_rx: 3919 e1000e_free_tx_resources(adapter->tx_ring); 3920 err_setup_tx: 3921 e1000e_reset(adapter); 3922 pm_runtime_put_sync(&pdev->dev); 3923 3924 return err; 3925 } 3926 3927 /** 3928 * e1000_close - Disables a network interface 3929 * @netdev: network interface device structure 3930 * 3931 * Returns 0, this is not allowed to fail 3932 * 3933 * The close entry point is called when an interface is de-activated 3934 * by the OS. The hardware is still under the drivers control, but 3935 * needs to be disabled. A global MAC reset is issued to stop the 3936 * hardware, and all transmit and receive resources are freed. 3937 **/ 3938 static int e1000_close(struct net_device *netdev) 3939 { 3940 struct e1000_adapter *adapter = netdev_priv(netdev); 3941 struct pci_dev *pdev = adapter->pdev; 3942 3943 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state)); 3944 3945 pm_runtime_get_sync(&pdev->dev); 3946 3947 napi_disable(&adapter->napi); 3948 3949 if (!test_bit(__E1000_DOWN, &adapter->state)) { 3950 e1000e_down(adapter); 3951 e1000_free_irq(adapter); 3952 } 3953 e1000_power_down_phy(adapter); 3954 3955 e1000e_free_tx_resources(adapter->tx_ring); 3956 e1000e_free_rx_resources(adapter->rx_ring); 3957 3958 /* 3959 * kill manageability vlan ID if supported, but not if a vlan with 3960 * the same ID is registered on the host OS (let 8021q kill it) 3961 */ 3962 if (adapter->hw.mng_cookie.status & 3963 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) 3964 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); 3965 3966 /* 3967 * If AMT is enabled, let the firmware know that the network 3968 * interface is now closed 3969 */ 3970 if ((adapter->flags & FLAG_HAS_AMT) && 3971 !test_bit(__E1000_TESTING, &adapter->state)) 3972 e1000e_release_hw_control(adapter); 3973 3974 if (adapter->hw.mac.type == e1000_pch2lan) 3975 pm_qos_remove_request(&adapter->netdev->pm_qos_req); 3976 3977 pm_runtime_put_sync(&pdev->dev); 3978 3979 return 0; 3980 } 3981 /** 3982 * e1000_set_mac - Change the Ethernet Address of the NIC 3983 * @netdev: network interface device structure 3984 * @p: pointer to an address structure 3985 * 3986 * Returns 0 on success, negative on failure 3987 **/ 3988 static int e1000_set_mac(struct net_device *netdev, void *p) 3989 { 3990 struct e1000_adapter *adapter = netdev_priv(netdev); 3991 struct sockaddr *addr = p; 3992 3993 if (!is_valid_ether_addr(addr->sa_data)) 3994 return -EADDRNOTAVAIL; 3995 3996 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 3997 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len); 3998 3999 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0); 4000 4001 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) { 4002 /* activate the work around */ 4003 e1000e_set_laa_state_82571(&adapter->hw, 1); 4004 4005 /* 4006 * Hold a copy of the LAA in RAR[14] This is done so that 4007 * between the time RAR[0] gets clobbered and the time it 4008 * gets fixed (in e1000_watchdog), the actual LAA is in one 4009 * of the RARs and no incoming packets directed to this port 4010 * are dropped. Eventually the LAA will be in RAR[0] and 4011 * RAR[14] 4012 */ 4013 e1000e_rar_set(&adapter->hw, 4014 adapter->hw.mac.addr, 4015 adapter->hw.mac.rar_entry_count - 1); 4016 } 4017 4018 return 0; 4019 } 4020 4021 /** 4022 * e1000e_update_phy_task - work thread to update phy 4023 * @work: pointer to our work struct 4024 * 4025 * this worker thread exists because we must acquire a 4026 * semaphore to read the phy, which we could msleep while 4027 * waiting for it, and we can't msleep in a timer. 4028 **/ 4029 static void e1000e_update_phy_task(struct work_struct *work) 4030 { 4031 struct e1000_adapter *adapter = container_of(work, 4032 struct e1000_adapter, update_phy_task); 4033 4034 if (test_bit(__E1000_DOWN, &adapter->state)) 4035 return; 4036 4037 e1000_get_phy_info(&adapter->hw); 4038 } 4039 4040 /* 4041 * Need to wait a few seconds after link up to get diagnostic information from 4042 * the phy 4043 */ 4044 static void e1000_update_phy_info(unsigned long data) 4045 { 4046 struct e1000_adapter *adapter = (struct e1000_adapter *) data; 4047 4048 if (test_bit(__E1000_DOWN, &adapter->state)) 4049 return; 4050 4051 schedule_work(&adapter->update_phy_task); 4052 } 4053 4054 /** 4055 * e1000e_update_phy_stats - Update the PHY statistics counters 4056 * @adapter: board private structure 4057 * 4058 * Read/clear the upper 16-bit PHY registers and read/accumulate lower 4059 **/ 4060 static void e1000e_update_phy_stats(struct e1000_adapter *adapter) 4061 { 4062 struct e1000_hw *hw = &adapter->hw; 4063 s32 ret_val; 4064 u16 phy_data; 4065 4066 ret_val = hw->phy.ops.acquire(hw); 4067 if (ret_val) 4068 return; 4069 4070 /* 4071 * A page set is expensive so check if already on desired page. 4072 * If not, set to the page with the PHY status registers. 4073 */ 4074 hw->phy.addr = 1; 4075 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, 4076 &phy_data); 4077 if (ret_val) 4078 goto release; 4079 if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) { 4080 ret_val = hw->phy.ops.set_page(hw, 4081 HV_STATS_PAGE << IGP_PAGE_SHIFT); 4082 if (ret_val) 4083 goto release; 4084 } 4085 4086 /* Single Collision Count */ 4087 hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data); 4088 ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data); 4089 if (!ret_val) 4090 adapter->stats.scc += phy_data; 4091 4092 /* Excessive Collision Count */ 4093 hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data); 4094 ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data); 4095 if (!ret_val) 4096 adapter->stats.ecol += phy_data; 4097 4098 /* Multiple Collision Count */ 4099 hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data); 4100 ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data); 4101 if (!ret_val) 4102 adapter->stats.mcc += phy_data; 4103 4104 /* Late Collision Count */ 4105 hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data); 4106 ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data); 4107 if (!ret_val) 4108 adapter->stats.latecol += phy_data; 4109 4110 /* Collision Count - also used for adaptive IFS */ 4111 hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data); 4112 ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data); 4113 if (!ret_val) 4114 hw->mac.collision_delta = phy_data; 4115 4116 /* Defer Count */ 4117 hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data); 4118 ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data); 4119 if (!ret_val) 4120 adapter->stats.dc += phy_data; 4121 4122 /* Transmit with no CRS */ 4123 hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data); 4124 ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data); 4125 if (!ret_val) 4126 adapter->stats.tncrs += phy_data; 4127 4128 release: 4129 hw->phy.ops.release(hw); 4130 } 4131 4132 /** 4133 * e1000e_update_stats - Update the board statistics counters 4134 * @adapter: board private structure 4135 **/ 4136 static void e1000e_update_stats(struct e1000_adapter *adapter) 4137 { 4138 struct net_device *netdev = adapter->netdev; 4139 struct e1000_hw *hw = &adapter->hw; 4140 struct pci_dev *pdev = adapter->pdev; 4141 4142 /* 4143 * Prevent stats update while adapter is being reset, or if the pci 4144 * connection is down. 4145 */ 4146 if (adapter->link_speed == 0) 4147 return; 4148 if (pci_channel_offline(pdev)) 4149 return; 4150 4151 adapter->stats.crcerrs += er32(CRCERRS); 4152 adapter->stats.gprc += er32(GPRC); 4153 adapter->stats.gorc += er32(GORCL); 4154 er32(GORCH); /* Clear gorc */ 4155 adapter->stats.bprc += er32(BPRC); 4156 adapter->stats.mprc += er32(MPRC); 4157 adapter->stats.roc += er32(ROC); 4158 4159 adapter->stats.mpc += er32(MPC); 4160 4161 /* Half-duplex statistics */ 4162 if (adapter->link_duplex == HALF_DUPLEX) { 4163 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) { 4164 e1000e_update_phy_stats(adapter); 4165 } else { 4166 adapter->stats.scc += er32(SCC); 4167 adapter->stats.ecol += er32(ECOL); 4168 adapter->stats.mcc += er32(MCC); 4169 adapter->stats.latecol += er32(LATECOL); 4170 adapter->stats.dc += er32(DC); 4171 4172 hw->mac.collision_delta = er32(COLC); 4173 4174 if ((hw->mac.type != e1000_82574) && 4175 (hw->mac.type != e1000_82583)) 4176 adapter->stats.tncrs += er32(TNCRS); 4177 } 4178 adapter->stats.colc += hw->mac.collision_delta; 4179 } 4180 4181 adapter->stats.xonrxc += er32(XONRXC); 4182 adapter->stats.xontxc += er32(XONTXC); 4183 adapter->stats.xoffrxc += er32(XOFFRXC); 4184 adapter->stats.xofftxc += er32(XOFFTXC); 4185 adapter->stats.gptc += er32(GPTC); 4186 adapter->stats.gotc += er32(GOTCL); 4187 er32(GOTCH); /* Clear gotc */ 4188 adapter->stats.rnbc += er32(RNBC); 4189 adapter->stats.ruc += er32(RUC); 4190 4191 adapter->stats.mptc += er32(MPTC); 4192 adapter->stats.bptc += er32(BPTC); 4193 4194 /* used for adaptive IFS */ 4195 4196 hw->mac.tx_packet_delta = er32(TPT); 4197 adapter->stats.tpt += hw->mac.tx_packet_delta; 4198 4199 adapter->stats.algnerrc += er32(ALGNERRC); 4200 adapter->stats.rxerrc += er32(RXERRC); 4201 adapter->stats.cexterr += er32(CEXTERR); 4202 adapter->stats.tsctc += er32(TSCTC); 4203 adapter->stats.tsctfc += er32(TSCTFC); 4204 4205 /* Fill out the OS statistics structure */ 4206 netdev->stats.multicast = adapter->stats.mprc; 4207 netdev->stats.collisions = adapter->stats.colc; 4208 4209 /* Rx Errors */ 4210 4211 /* 4212 * RLEC on some newer hardware can be incorrect so build 4213 * our own version based on RUC and ROC 4214 */ 4215 netdev->stats.rx_errors = adapter->stats.rxerrc + 4216 adapter->stats.crcerrs + adapter->stats.algnerrc + 4217 adapter->stats.ruc + adapter->stats.roc + 4218 adapter->stats.cexterr; 4219 netdev->stats.rx_length_errors = adapter->stats.ruc + 4220 adapter->stats.roc; 4221 netdev->stats.rx_crc_errors = adapter->stats.crcerrs; 4222 netdev->stats.rx_frame_errors = adapter->stats.algnerrc; 4223 netdev->stats.rx_missed_errors = adapter->stats.mpc; 4224 4225 /* Tx Errors */ 4226 netdev->stats.tx_errors = adapter->stats.ecol + 4227 adapter->stats.latecol; 4228 netdev->stats.tx_aborted_errors = adapter->stats.ecol; 4229 netdev->stats.tx_window_errors = adapter->stats.latecol; 4230 netdev->stats.tx_carrier_errors = adapter->stats.tncrs; 4231 4232 /* Tx Dropped needs to be maintained elsewhere */ 4233 4234 /* Management Stats */ 4235 adapter->stats.mgptc += er32(MGTPTC); 4236 adapter->stats.mgprc += er32(MGTPRC); 4237 adapter->stats.mgpdc += er32(MGTPDC); 4238 } 4239 4240 /** 4241 * e1000_phy_read_status - Update the PHY register status snapshot 4242 * @adapter: board private structure 4243 **/ 4244 static void e1000_phy_read_status(struct e1000_adapter *adapter) 4245 { 4246 struct e1000_hw *hw = &adapter->hw; 4247 struct e1000_phy_regs *phy = &adapter->phy_regs; 4248 4249 if ((er32(STATUS) & E1000_STATUS_LU) && 4250 (adapter->hw.phy.media_type == e1000_media_type_copper)) { 4251 int ret_val; 4252 4253 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr); 4254 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr); 4255 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise); 4256 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa); 4257 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion); 4258 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000); 4259 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000); 4260 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus); 4261 if (ret_val) 4262 e_warn("Error reading PHY register\n"); 4263 } else { 4264 /* 4265 * Do not read PHY registers if link is not up 4266 * Set values to typical power-on defaults 4267 */ 4268 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX); 4269 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL | 4270 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE | 4271 BMSR_ERCAP); 4272 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP | 4273 ADVERTISE_ALL | ADVERTISE_CSMA); 4274 phy->lpa = 0; 4275 phy->expansion = EXPANSION_ENABLENPAGE; 4276 phy->ctrl1000 = ADVERTISE_1000FULL; 4277 phy->stat1000 = 0; 4278 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF); 4279 } 4280 } 4281 4282 static void e1000_print_link_info(struct e1000_adapter *adapter) 4283 { 4284 struct e1000_hw *hw = &adapter->hw; 4285 u32 ctrl = er32(CTRL); 4286 4287 /* Link status message must follow this format for user tools */ 4288 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n", 4289 adapter->netdev->name, 4290 adapter->link_speed, 4291 adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half", 4292 (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" : 4293 (ctrl & E1000_CTRL_RFCE) ? "Rx" : 4294 (ctrl & E1000_CTRL_TFCE) ? "Tx" : "None"); 4295 } 4296 4297 static bool e1000e_has_link(struct e1000_adapter *adapter) 4298 { 4299 struct e1000_hw *hw = &adapter->hw; 4300 bool link_active = false; 4301 s32 ret_val = 0; 4302 4303 /* 4304 * get_link_status is set on LSC (link status) interrupt or 4305 * Rx sequence error interrupt. get_link_status will stay 4306 * false until the check_for_link establishes link 4307 * for copper adapters ONLY 4308 */ 4309 switch (hw->phy.media_type) { 4310 case e1000_media_type_copper: 4311 if (hw->mac.get_link_status) { 4312 ret_val = hw->mac.ops.check_for_link(hw); 4313 link_active = !hw->mac.get_link_status; 4314 } else { 4315 link_active = true; 4316 } 4317 break; 4318 case e1000_media_type_fiber: 4319 ret_val = hw->mac.ops.check_for_link(hw); 4320 link_active = !!(er32(STATUS) & E1000_STATUS_LU); 4321 break; 4322 case e1000_media_type_internal_serdes: 4323 ret_val = hw->mac.ops.check_for_link(hw); 4324 link_active = adapter->hw.mac.serdes_has_link; 4325 break; 4326 default: 4327 case e1000_media_type_unknown: 4328 break; 4329 } 4330 4331 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) && 4332 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) { 4333 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */ 4334 e_info("Gigabit has been disabled, downgrading speed\n"); 4335 } 4336 4337 return link_active; 4338 } 4339 4340 static void e1000e_enable_receives(struct e1000_adapter *adapter) 4341 { 4342 /* make sure the receive unit is started */ 4343 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) && 4344 (adapter->flags & FLAG_RX_RESTART_NOW)) { 4345 struct e1000_hw *hw = &adapter->hw; 4346 u32 rctl = er32(RCTL); 4347 ew32(RCTL, rctl | E1000_RCTL_EN); 4348 adapter->flags &= ~FLAG_RX_RESTART_NOW; 4349 } 4350 } 4351 4352 static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter) 4353 { 4354 struct e1000_hw *hw = &adapter->hw; 4355 4356 /* 4357 * With 82574 controllers, PHY needs to be checked periodically 4358 * for hung state and reset, if two calls return true 4359 */ 4360 if (e1000_check_phy_82574(hw)) 4361 adapter->phy_hang_count++; 4362 else 4363 adapter->phy_hang_count = 0; 4364 4365 if (adapter->phy_hang_count > 1) { 4366 adapter->phy_hang_count = 0; 4367 schedule_work(&adapter->reset_task); 4368 } 4369 } 4370 4371 /** 4372 * e1000_watchdog - Timer Call-back 4373 * @data: pointer to adapter cast into an unsigned long 4374 **/ 4375 static void e1000_watchdog(unsigned long data) 4376 { 4377 struct e1000_adapter *adapter = (struct e1000_adapter *) data; 4378 4379 /* Do the rest outside of interrupt context */ 4380 schedule_work(&adapter->watchdog_task); 4381 4382 /* TODO: make this use queue_delayed_work() */ 4383 } 4384 4385 static void e1000_watchdog_task(struct work_struct *work) 4386 { 4387 struct e1000_adapter *adapter = container_of(work, 4388 struct e1000_adapter, watchdog_task); 4389 struct net_device *netdev = adapter->netdev; 4390 struct e1000_mac_info *mac = &adapter->hw.mac; 4391 struct e1000_phy_info *phy = &adapter->hw.phy; 4392 struct e1000_ring *tx_ring = adapter->tx_ring; 4393 struct e1000_hw *hw = &adapter->hw; 4394 u32 link, tctl; 4395 4396 if (test_bit(__E1000_DOWN, &adapter->state)) 4397 return; 4398 4399 link = e1000e_has_link(adapter); 4400 if ((netif_carrier_ok(netdev)) && link) { 4401 /* Cancel scheduled suspend requests. */ 4402 pm_runtime_resume(netdev->dev.parent); 4403 4404 e1000e_enable_receives(adapter); 4405 goto link_up; 4406 } 4407 4408 if ((e1000e_enable_tx_pkt_filtering(hw)) && 4409 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)) 4410 e1000_update_mng_vlan(adapter); 4411 4412 if (link) { 4413 if (!netif_carrier_ok(netdev)) { 4414 bool txb2b = true; 4415 4416 /* Cancel scheduled suspend requests. */ 4417 pm_runtime_resume(netdev->dev.parent); 4418 4419 /* update snapshot of PHY registers on LSC */ 4420 e1000_phy_read_status(adapter); 4421 mac->ops.get_link_up_info(&adapter->hw, 4422 &adapter->link_speed, 4423 &adapter->link_duplex); 4424 e1000_print_link_info(adapter); 4425 /* 4426 * On supported PHYs, check for duplex mismatch only 4427 * if link has autonegotiated at 10/100 half 4428 */ 4429 if ((hw->phy.type == e1000_phy_igp_3 || 4430 hw->phy.type == e1000_phy_bm) && 4431 (hw->mac.autoneg == true) && 4432 (adapter->link_speed == SPEED_10 || 4433 adapter->link_speed == SPEED_100) && 4434 (adapter->link_duplex == HALF_DUPLEX)) { 4435 u16 autoneg_exp; 4436 4437 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp); 4438 4439 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS)) 4440 e_info("Autonegotiated half duplex but link partner cannot autoneg. Try forcing full duplex if link gets many collisions.\n"); 4441 } 4442 4443 /* adjust timeout factor according to speed/duplex */ 4444 adapter->tx_timeout_factor = 1; 4445 switch (adapter->link_speed) { 4446 case SPEED_10: 4447 txb2b = false; 4448 adapter->tx_timeout_factor = 16; 4449 break; 4450 case SPEED_100: 4451 txb2b = false; 4452 adapter->tx_timeout_factor = 10; 4453 break; 4454 } 4455 4456 /* 4457 * workaround: re-program speed mode bit after 4458 * link-up event 4459 */ 4460 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) && 4461 !txb2b) { 4462 u32 tarc0; 4463 tarc0 = er32(TARC(0)); 4464 tarc0 &= ~SPEED_MODE_BIT; 4465 ew32(TARC(0), tarc0); 4466 } 4467 4468 /* 4469 * disable TSO for pcie and 10/100 speeds, to avoid 4470 * some hardware issues 4471 */ 4472 if (!(adapter->flags & FLAG_TSO_FORCE)) { 4473 switch (adapter->link_speed) { 4474 case SPEED_10: 4475 case SPEED_100: 4476 e_info("10/100 speed: disabling TSO\n"); 4477 netdev->features &= ~NETIF_F_TSO; 4478 netdev->features &= ~NETIF_F_TSO6; 4479 break; 4480 case SPEED_1000: 4481 netdev->features |= NETIF_F_TSO; 4482 netdev->features |= NETIF_F_TSO6; 4483 break; 4484 default: 4485 /* oops */ 4486 break; 4487 } 4488 } 4489 4490 /* 4491 * enable transmits in the hardware, need to do this 4492 * after setting TARC(0) 4493 */ 4494 tctl = er32(TCTL); 4495 tctl |= E1000_TCTL_EN; 4496 ew32(TCTL, tctl); 4497 4498 /* 4499 * Perform any post-link-up configuration before 4500 * reporting link up. 4501 */ 4502 if (phy->ops.cfg_on_link_up) 4503 phy->ops.cfg_on_link_up(hw); 4504 4505 netif_carrier_on(netdev); 4506 4507 if (!test_bit(__E1000_DOWN, &adapter->state)) 4508 mod_timer(&adapter->phy_info_timer, 4509 round_jiffies(jiffies + 2 * HZ)); 4510 } 4511 } else { 4512 if (netif_carrier_ok(netdev)) { 4513 adapter->link_speed = 0; 4514 adapter->link_duplex = 0; 4515 /* Link status message must follow this format */ 4516 printk(KERN_INFO "e1000e: %s NIC Link is Down\n", 4517 adapter->netdev->name); 4518 netif_carrier_off(netdev); 4519 if (!test_bit(__E1000_DOWN, &adapter->state)) 4520 mod_timer(&adapter->phy_info_timer, 4521 round_jiffies(jiffies + 2 * HZ)); 4522 4523 if (adapter->flags & FLAG_RX_NEEDS_RESTART) 4524 schedule_work(&adapter->reset_task); 4525 else 4526 pm_schedule_suspend(netdev->dev.parent, 4527 LINK_TIMEOUT); 4528 } 4529 } 4530 4531 link_up: 4532 spin_lock(&adapter->stats64_lock); 4533 e1000e_update_stats(adapter); 4534 4535 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old; 4536 adapter->tpt_old = adapter->stats.tpt; 4537 mac->collision_delta = adapter->stats.colc - adapter->colc_old; 4538 adapter->colc_old = adapter->stats.colc; 4539 4540 adapter->gorc = adapter->stats.gorc - adapter->gorc_old; 4541 adapter->gorc_old = adapter->stats.gorc; 4542 adapter->gotc = adapter->stats.gotc - adapter->gotc_old; 4543 adapter->gotc_old = adapter->stats.gotc; 4544 spin_unlock(&adapter->stats64_lock); 4545 4546 e1000e_update_adaptive(&adapter->hw); 4547 4548 if (!netif_carrier_ok(netdev) && 4549 (e1000_desc_unused(tx_ring) + 1 < tx_ring->count)) { 4550 /* 4551 * We've lost link, so the controller stops DMA, 4552 * but we've got queued Tx work that's never going 4553 * to get done, so reset controller to flush Tx. 4554 * (Do the reset outside of interrupt context). 4555 */ 4556 schedule_work(&adapter->reset_task); 4557 /* return immediately since reset is imminent */ 4558 return; 4559 } 4560 4561 /* Simple mode for Interrupt Throttle Rate (ITR) */ 4562 if (adapter->itr_setting == 4) { 4563 /* 4564 * Symmetric Tx/Rx gets a reduced ITR=2000; 4565 * Total asymmetrical Tx or Rx gets ITR=8000; 4566 * everyone else is between 2000-8000. 4567 */ 4568 u32 goc = (adapter->gotc + adapter->gorc) / 10000; 4569 u32 dif = (adapter->gotc > adapter->gorc ? 4570 adapter->gotc - adapter->gorc : 4571 adapter->gorc - adapter->gotc) / 10000; 4572 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000; 4573 4574 ew32(ITR, 1000000000 / (itr * 256)); 4575 } 4576 4577 /* Cause software interrupt to ensure Rx ring is cleaned */ 4578 if (adapter->msix_entries) 4579 ew32(ICS, adapter->rx_ring->ims_val); 4580 else 4581 ew32(ICS, E1000_ICS_RXDMT0); 4582 4583 /* flush pending descriptors to memory before detecting Tx hang */ 4584 e1000e_flush_descriptors(adapter); 4585 4586 /* Force detection of hung controller every watchdog period */ 4587 adapter->detect_tx_hung = true; 4588 4589 /* 4590 * With 82571 controllers, LAA may be overwritten due to controller 4591 * reset from the other port. Set the appropriate LAA in RAR[0] 4592 */ 4593 if (e1000e_get_laa_state_82571(hw)) 4594 e1000e_rar_set(hw, adapter->hw.mac.addr, 0); 4595 4596 if (adapter->flags2 & FLAG2_CHECK_PHY_HANG) 4597 e1000e_check_82574_phy_workaround(adapter); 4598 4599 /* Reset the timer */ 4600 if (!test_bit(__E1000_DOWN, &adapter->state)) 4601 mod_timer(&adapter->watchdog_timer, 4602 round_jiffies(jiffies + 2 * HZ)); 4603 } 4604 4605 #define E1000_TX_FLAGS_CSUM 0x00000001 4606 #define E1000_TX_FLAGS_VLAN 0x00000002 4607 #define E1000_TX_FLAGS_TSO 0x00000004 4608 #define E1000_TX_FLAGS_IPV4 0x00000008 4609 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000 4610 #define E1000_TX_FLAGS_VLAN_SHIFT 16 4611 4612 static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb) 4613 { 4614 struct e1000_context_desc *context_desc; 4615 struct e1000_buffer *buffer_info; 4616 unsigned int i; 4617 u32 cmd_length = 0; 4618 u16 ipcse = 0, tucse, mss; 4619 u8 ipcss, ipcso, tucss, tucso, hdr_len; 4620 4621 if (!skb_is_gso(skb)) 4622 return 0; 4623 4624 if (skb_header_cloned(skb)) { 4625 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); 4626 4627 if (err) 4628 return err; 4629 } 4630 4631 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 4632 mss = skb_shinfo(skb)->gso_size; 4633 if (skb->protocol == htons(ETH_P_IP)) { 4634 struct iphdr *iph = ip_hdr(skb); 4635 iph->tot_len = 0; 4636 iph->check = 0; 4637 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, 4638 0, IPPROTO_TCP, 0); 4639 cmd_length = E1000_TXD_CMD_IP; 4640 ipcse = skb_transport_offset(skb) - 1; 4641 } else if (skb_is_gso_v6(skb)) { 4642 ipv6_hdr(skb)->payload_len = 0; 4643 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, 4644 &ipv6_hdr(skb)->daddr, 4645 0, IPPROTO_TCP, 0); 4646 ipcse = 0; 4647 } 4648 ipcss = skb_network_offset(skb); 4649 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data; 4650 tucss = skb_transport_offset(skb); 4651 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data; 4652 tucse = 0; 4653 4654 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE | 4655 E1000_TXD_CMD_TCP | (skb->len - (hdr_len))); 4656 4657 i = tx_ring->next_to_use; 4658 context_desc = E1000_CONTEXT_DESC(*tx_ring, i); 4659 buffer_info = &tx_ring->buffer_info[i]; 4660 4661 context_desc->lower_setup.ip_fields.ipcss = ipcss; 4662 context_desc->lower_setup.ip_fields.ipcso = ipcso; 4663 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse); 4664 context_desc->upper_setup.tcp_fields.tucss = tucss; 4665 context_desc->upper_setup.tcp_fields.tucso = tucso; 4666 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse); 4667 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss); 4668 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len; 4669 context_desc->cmd_and_length = cpu_to_le32(cmd_length); 4670 4671 buffer_info->time_stamp = jiffies; 4672 buffer_info->next_to_watch = i; 4673 4674 i++; 4675 if (i == tx_ring->count) 4676 i = 0; 4677 tx_ring->next_to_use = i; 4678 4679 return 1; 4680 } 4681 4682 static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb) 4683 { 4684 struct e1000_adapter *adapter = tx_ring->adapter; 4685 struct e1000_context_desc *context_desc; 4686 struct e1000_buffer *buffer_info; 4687 unsigned int i; 4688 u8 css; 4689 u32 cmd_len = E1000_TXD_CMD_DEXT; 4690 __be16 protocol; 4691 4692 if (skb->ip_summed != CHECKSUM_PARTIAL) 4693 return 0; 4694 4695 if (skb->protocol == cpu_to_be16(ETH_P_8021Q)) 4696 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto; 4697 else 4698 protocol = skb->protocol; 4699 4700 switch (protocol) { 4701 case cpu_to_be16(ETH_P_IP): 4702 if (ip_hdr(skb)->protocol == IPPROTO_TCP) 4703 cmd_len |= E1000_TXD_CMD_TCP; 4704 break; 4705 case cpu_to_be16(ETH_P_IPV6): 4706 /* XXX not handling all IPV6 headers */ 4707 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP) 4708 cmd_len |= E1000_TXD_CMD_TCP; 4709 break; 4710 default: 4711 if (unlikely(net_ratelimit())) 4712 e_warn("checksum_partial proto=%x!\n", 4713 be16_to_cpu(protocol)); 4714 break; 4715 } 4716 4717 css = skb_checksum_start_offset(skb); 4718 4719 i = tx_ring->next_to_use; 4720 buffer_info = &tx_ring->buffer_info[i]; 4721 context_desc = E1000_CONTEXT_DESC(*tx_ring, i); 4722 4723 context_desc->lower_setup.ip_config = 0; 4724 context_desc->upper_setup.tcp_fields.tucss = css; 4725 context_desc->upper_setup.tcp_fields.tucso = 4726 css + skb->csum_offset; 4727 context_desc->upper_setup.tcp_fields.tucse = 0; 4728 context_desc->tcp_seg_setup.data = 0; 4729 context_desc->cmd_and_length = cpu_to_le32(cmd_len); 4730 4731 buffer_info->time_stamp = jiffies; 4732 buffer_info->next_to_watch = i; 4733 4734 i++; 4735 if (i == tx_ring->count) 4736 i = 0; 4737 tx_ring->next_to_use = i; 4738 4739 return 1; 4740 } 4741 4742 #define E1000_MAX_PER_TXD 8192 4743 #define E1000_MAX_TXD_PWR 12 4744 4745 static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb, 4746 unsigned int first, unsigned int max_per_txd, 4747 unsigned int nr_frags, unsigned int mss) 4748 { 4749 struct e1000_adapter *adapter = tx_ring->adapter; 4750 struct pci_dev *pdev = adapter->pdev; 4751 struct e1000_buffer *buffer_info; 4752 unsigned int len = skb_headlen(skb); 4753 unsigned int offset = 0, size, count = 0, i; 4754 unsigned int f, bytecount, segs; 4755 4756 i = tx_ring->next_to_use; 4757 4758 while (len) { 4759 buffer_info = &tx_ring->buffer_info[i]; 4760 size = min(len, max_per_txd); 4761 4762 buffer_info->length = size; 4763 buffer_info->time_stamp = jiffies; 4764 buffer_info->next_to_watch = i; 4765 buffer_info->dma = dma_map_single(&pdev->dev, 4766 skb->data + offset, 4767 size, DMA_TO_DEVICE); 4768 buffer_info->mapped_as_page = false; 4769 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) 4770 goto dma_error; 4771 4772 len -= size; 4773 offset += size; 4774 count++; 4775 4776 if (len) { 4777 i++; 4778 if (i == tx_ring->count) 4779 i = 0; 4780 } 4781 } 4782 4783 for (f = 0; f < nr_frags; f++) { 4784 const struct skb_frag_struct *frag; 4785 4786 frag = &skb_shinfo(skb)->frags[f]; 4787 len = skb_frag_size(frag); 4788 offset = 0; 4789 4790 while (len) { 4791 i++; 4792 if (i == tx_ring->count) 4793 i = 0; 4794 4795 buffer_info = &tx_ring->buffer_info[i]; 4796 size = min(len, max_per_txd); 4797 4798 buffer_info->length = size; 4799 buffer_info->time_stamp = jiffies; 4800 buffer_info->next_to_watch = i; 4801 buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag, 4802 offset, size, DMA_TO_DEVICE); 4803 buffer_info->mapped_as_page = true; 4804 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) 4805 goto dma_error; 4806 4807 len -= size; 4808 offset += size; 4809 count++; 4810 } 4811 } 4812 4813 segs = skb_shinfo(skb)->gso_segs ? : 1; 4814 /* multiply data chunks by size of headers */ 4815 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len; 4816 4817 tx_ring->buffer_info[i].skb = skb; 4818 tx_ring->buffer_info[i].segs = segs; 4819 tx_ring->buffer_info[i].bytecount = bytecount; 4820 tx_ring->buffer_info[first].next_to_watch = i; 4821 4822 return count; 4823 4824 dma_error: 4825 dev_err(&pdev->dev, "Tx DMA map failed\n"); 4826 buffer_info->dma = 0; 4827 if (count) 4828 count--; 4829 4830 while (count--) { 4831 if (i == 0) 4832 i += tx_ring->count; 4833 i--; 4834 buffer_info = &tx_ring->buffer_info[i]; 4835 e1000_put_txbuf(tx_ring, buffer_info); 4836 } 4837 4838 return 0; 4839 } 4840 4841 static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count) 4842 { 4843 struct e1000_adapter *adapter = tx_ring->adapter; 4844 struct e1000_tx_desc *tx_desc = NULL; 4845 struct e1000_buffer *buffer_info; 4846 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS; 4847 unsigned int i; 4848 4849 if (tx_flags & E1000_TX_FLAGS_TSO) { 4850 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D | 4851 E1000_TXD_CMD_TSE; 4852 txd_upper |= E1000_TXD_POPTS_TXSM << 8; 4853 4854 if (tx_flags & E1000_TX_FLAGS_IPV4) 4855 txd_upper |= E1000_TXD_POPTS_IXSM << 8; 4856 } 4857 4858 if (tx_flags & E1000_TX_FLAGS_CSUM) { 4859 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; 4860 txd_upper |= E1000_TXD_POPTS_TXSM << 8; 4861 } 4862 4863 if (tx_flags & E1000_TX_FLAGS_VLAN) { 4864 txd_lower |= E1000_TXD_CMD_VLE; 4865 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK); 4866 } 4867 4868 i = tx_ring->next_to_use; 4869 4870 do { 4871 buffer_info = &tx_ring->buffer_info[i]; 4872 tx_desc = E1000_TX_DESC(*tx_ring, i); 4873 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); 4874 tx_desc->lower.data = 4875 cpu_to_le32(txd_lower | buffer_info->length); 4876 tx_desc->upper.data = cpu_to_le32(txd_upper); 4877 4878 i++; 4879 if (i == tx_ring->count) 4880 i = 0; 4881 } while (--count > 0); 4882 4883 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd); 4884 4885 /* 4886 * Force memory writes to complete before letting h/w 4887 * know there are new descriptors to fetch. (Only 4888 * applicable for weak-ordered memory model archs, 4889 * such as IA-64). 4890 */ 4891 wmb(); 4892 4893 tx_ring->next_to_use = i; 4894 4895 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) 4896 e1000e_update_tdt_wa(tx_ring, i); 4897 else 4898 writel(i, tx_ring->tail); 4899 4900 /* 4901 * we need this if more than one processor can write to our tail 4902 * at a time, it synchronizes IO on IA64/Altix systems 4903 */ 4904 mmiowb(); 4905 } 4906 4907 #define MINIMUM_DHCP_PACKET_SIZE 282 4908 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter, 4909 struct sk_buff *skb) 4910 { 4911 struct e1000_hw *hw = &adapter->hw; 4912 u16 length, offset; 4913 4914 if (vlan_tx_tag_present(skb)) { 4915 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) && 4916 (adapter->hw.mng_cookie.status & 4917 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))) 4918 return 0; 4919 } 4920 4921 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE) 4922 return 0; 4923 4924 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP)) 4925 return 0; 4926 4927 { 4928 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14); 4929 struct udphdr *udp; 4930 4931 if (ip->protocol != IPPROTO_UDP) 4932 return 0; 4933 4934 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2)); 4935 if (ntohs(udp->dest) != 67) 4936 return 0; 4937 4938 offset = (u8 *)udp + 8 - skb->data; 4939 length = skb->len - offset; 4940 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length); 4941 } 4942 4943 return 0; 4944 } 4945 4946 static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size) 4947 { 4948 struct e1000_adapter *adapter = tx_ring->adapter; 4949 4950 netif_stop_queue(adapter->netdev); 4951 /* 4952 * Herbert's original patch had: 4953 * smp_mb__after_netif_stop_queue(); 4954 * but since that doesn't exist yet, just open code it. 4955 */ 4956 smp_mb(); 4957 4958 /* 4959 * We need to check again in a case another CPU has just 4960 * made room available. 4961 */ 4962 if (e1000_desc_unused(tx_ring) < size) 4963 return -EBUSY; 4964 4965 /* A reprieve! */ 4966 netif_start_queue(adapter->netdev); 4967 ++adapter->restart_queue; 4968 return 0; 4969 } 4970 4971 static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size) 4972 { 4973 if (e1000_desc_unused(tx_ring) >= size) 4974 return 0; 4975 return __e1000_maybe_stop_tx(tx_ring, size); 4976 } 4977 4978 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1) 4979 static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb, 4980 struct net_device *netdev) 4981 { 4982 struct e1000_adapter *adapter = netdev_priv(netdev); 4983 struct e1000_ring *tx_ring = adapter->tx_ring; 4984 unsigned int first; 4985 unsigned int max_per_txd = E1000_MAX_PER_TXD; 4986 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR; 4987 unsigned int tx_flags = 0; 4988 unsigned int len = skb_headlen(skb); 4989 unsigned int nr_frags; 4990 unsigned int mss; 4991 int count = 0; 4992 int tso; 4993 unsigned int f; 4994 4995 if (test_bit(__E1000_DOWN, &adapter->state)) { 4996 dev_kfree_skb_any(skb); 4997 return NETDEV_TX_OK; 4998 } 4999 5000 if (skb->len <= 0) { 5001 dev_kfree_skb_any(skb); 5002 return NETDEV_TX_OK; 5003 } 5004 5005 mss = skb_shinfo(skb)->gso_size; 5006 /* 5007 * The controller does a simple calculation to 5008 * make sure there is enough room in the FIFO before 5009 * initiating the DMA for each buffer. The calc is: 5010 * 4 = ceil(buffer len/mss). To make sure we don't 5011 * overrun the FIFO, adjust the max buffer len if mss 5012 * drops. 5013 */ 5014 if (mss) { 5015 u8 hdr_len; 5016 max_per_txd = min(mss << 2, max_per_txd); 5017 max_txd_pwr = fls(max_per_txd) - 1; 5018 5019 /* 5020 * TSO Workaround for 82571/2/3 Controllers -- if skb->data 5021 * points to just header, pull a few bytes of payload from 5022 * frags into skb->data 5023 */ 5024 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 5025 /* 5026 * we do this workaround for ES2LAN, but it is un-necessary, 5027 * avoiding it could save a lot of cycles 5028 */ 5029 if (skb->data_len && (hdr_len == len)) { 5030 unsigned int pull_size; 5031 5032 pull_size = min_t(unsigned int, 4, skb->data_len); 5033 if (!__pskb_pull_tail(skb, pull_size)) { 5034 e_err("__pskb_pull_tail failed.\n"); 5035 dev_kfree_skb_any(skb); 5036 return NETDEV_TX_OK; 5037 } 5038 len = skb_headlen(skb); 5039 } 5040 } 5041 5042 /* reserve a descriptor for the offload context */ 5043 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL)) 5044 count++; 5045 count++; 5046 5047 count += TXD_USE_COUNT(len, max_txd_pwr); 5048 5049 nr_frags = skb_shinfo(skb)->nr_frags; 5050 for (f = 0; f < nr_frags; f++) 5051 count += TXD_USE_COUNT(skb_frag_size(&skb_shinfo(skb)->frags[f]), 5052 max_txd_pwr); 5053 5054 if (adapter->hw.mac.tx_pkt_filtering) 5055 e1000_transfer_dhcp_info(adapter, skb); 5056 5057 /* 5058 * need: count + 2 desc gap to keep tail from touching 5059 * head, otherwise try next time 5060 */ 5061 if (e1000_maybe_stop_tx(tx_ring, count + 2)) 5062 return NETDEV_TX_BUSY; 5063 5064 if (vlan_tx_tag_present(skb)) { 5065 tx_flags |= E1000_TX_FLAGS_VLAN; 5066 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT); 5067 } 5068 5069 first = tx_ring->next_to_use; 5070 5071 tso = e1000_tso(tx_ring, skb); 5072 if (tso < 0) { 5073 dev_kfree_skb_any(skb); 5074 return NETDEV_TX_OK; 5075 } 5076 5077 if (tso) 5078 tx_flags |= E1000_TX_FLAGS_TSO; 5079 else if (e1000_tx_csum(tx_ring, skb)) 5080 tx_flags |= E1000_TX_FLAGS_CSUM; 5081 5082 /* 5083 * Old method was to assume IPv4 packet by default if TSO was enabled. 5084 * 82571 hardware supports TSO capabilities for IPv6 as well... 5085 * no longer assume, we must. 5086 */ 5087 if (skb->protocol == htons(ETH_P_IP)) 5088 tx_flags |= E1000_TX_FLAGS_IPV4; 5089 5090 /* if count is 0 then mapping error has occurred */ 5091 count = e1000_tx_map(tx_ring, skb, first, max_per_txd, nr_frags, mss); 5092 if (count) { 5093 netdev_sent_queue(netdev, skb->len); 5094 e1000_tx_queue(tx_ring, tx_flags, count); 5095 /* Make sure there is space in the ring for the next send. */ 5096 e1000_maybe_stop_tx(tx_ring, MAX_SKB_FRAGS + 2); 5097 5098 } else { 5099 dev_kfree_skb_any(skb); 5100 tx_ring->buffer_info[first].time_stamp = 0; 5101 tx_ring->next_to_use = first; 5102 } 5103 5104 return NETDEV_TX_OK; 5105 } 5106 5107 /** 5108 * e1000_tx_timeout - Respond to a Tx Hang 5109 * @netdev: network interface device structure 5110 **/ 5111 static void e1000_tx_timeout(struct net_device *netdev) 5112 { 5113 struct e1000_adapter *adapter = netdev_priv(netdev); 5114 5115 /* Do the reset outside of interrupt context */ 5116 adapter->tx_timeout_count++; 5117 schedule_work(&adapter->reset_task); 5118 } 5119 5120 static void e1000_reset_task(struct work_struct *work) 5121 { 5122 struct e1000_adapter *adapter; 5123 adapter = container_of(work, struct e1000_adapter, reset_task); 5124 5125 /* don't run the task if already down */ 5126 if (test_bit(__E1000_DOWN, &adapter->state)) 5127 return; 5128 5129 if (!((adapter->flags & FLAG_RX_NEEDS_RESTART) && 5130 (adapter->flags & FLAG_RX_RESTART_NOW))) { 5131 e1000e_dump(adapter); 5132 e_err("Reset adapter\n"); 5133 } 5134 e1000e_reinit_locked(adapter); 5135 } 5136 5137 /** 5138 * e1000_get_stats64 - Get System Network Statistics 5139 * @netdev: network interface device structure 5140 * @stats: rtnl_link_stats64 pointer 5141 * 5142 * Returns the address of the device statistics structure. 5143 **/ 5144 struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev, 5145 struct rtnl_link_stats64 *stats) 5146 { 5147 struct e1000_adapter *adapter = netdev_priv(netdev); 5148 5149 memset(stats, 0, sizeof(struct rtnl_link_stats64)); 5150 spin_lock(&adapter->stats64_lock); 5151 e1000e_update_stats(adapter); 5152 /* Fill out the OS statistics structure */ 5153 stats->rx_bytes = adapter->stats.gorc; 5154 stats->rx_packets = adapter->stats.gprc; 5155 stats->tx_bytes = adapter->stats.gotc; 5156 stats->tx_packets = adapter->stats.gptc; 5157 stats->multicast = adapter->stats.mprc; 5158 stats->collisions = adapter->stats.colc; 5159 5160 /* Rx Errors */ 5161 5162 /* 5163 * RLEC on some newer hardware can be incorrect so build 5164 * our own version based on RUC and ROC 5165 */ 5166 stats->rx_errors = adapter->stats.rxerrc + 5167 adapter->stats.crcerrs + adapter->stats.algnerrc + 5168 adapter->stats.ruc + adapter->stats.roc + 5169 adapter->stats.cexterr; 5170 stats->rx_length_errors = adapter->stats.ruc + 5171 adapter->stats.roc; 5172 stats->rx_crc_errors = adapter->stats.crcerrs; 5173 stats->rx_frame_errors = adapter->stats.algnerrc; 5174 stats->rx_missed_errors = adapter->stats.mpc; 5175 5176 /* Tx Errors */ 5177 stats->tx_errors = adapter->stats.ecol + 5178 adapter->stats.latecol; 5179 stats->tx_aborted_errors = adapter->stats.ecol; 5180 stats->tx_window_errors = adapter->stats.latecol; 5181 stats->tx_carrier_errors = adapter->stats.tncrs; 5182 5183 /* Tx Dropped needs to be maintained elsewhere */ 5184 5185 spin_unlock(&adapter->stats64_lock); 5186 return stats; 5187 } 5188 5189 /** 5190 * e1000_change_mtu - Change the Maximum Transfer Unit 5191 * @netdev: network interface device structure 5192 * @new_mtu: new value for maximum frame size 5193 * 5194 * Returns 0 on success, negative on failure 5195 **/ 5196 static int e1000_change_mtu(struct net_device *netdev, int new_mtu) 5197 { 5198 struct e1000_adapter *adapter = netdev_priv(netdev); 5199 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN; 5200 5201 /* Jumbo frame support */ 5202 if (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) { 5203 if (!(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) { 5204 e_err("Jumbo Frames not supported.\n"); 5205 return -EINVAL; 5206 } 5207 5208 /* 5209 * IP payload checksum (enabled with jumbos/packet-split when 5210 * Rx checksum is enabled) and generation of RSS hash is 5211 * mutually exclusive in the hardware. 5212 */ 5213 if ((netdev->features & NETIF_F_RXCSUM) && 5214 (netdev->features & NETIF_F_RXHASH)) { 5215 e_err("Jumbo frames cannot be enabled when both receive checksum offload and receive hashing are enabled. Disable one of the receive offload features before enabling jumbos.\n"); 5216 return -EINVAL; 5217 } 5218 } 5219 5220 /* Supported frame sizes */ 5221 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) || 5222 (max_frame > adapter->max_hw_frame_size)) { 5223 e_err("Unsupported MTU setting\n"); 5224 return -EINVAL; 5225 } 5226 5227 /* Jumbo frame workaround on 82579 requires CRC be stripped */ 5228 if ((adapter->hw.mac.type == e1000_pch2lan) && 5229 !(adapter->flags2 & FLAG2_CRC_STRIPPING) && 5230 (new_mtu > ETH_DATA_LEN)) { 5231 e_err("Jumbo Frames not supported on 82579 when CRC stripping is disabled.\n"); 5232 return -EINVAL; 5233 } 5234 5235 /* 82573 Errata 17 */ 5236 if (((adapter->hw.mac.type == e1000_82573) || 5237 (adapter->hw.mac.type == e1000_82574)) && 5238 (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN)) { 5239 adapter->flags2 |= FLAG2_DISABLE_ASPM_L1; 5240 e1000e_disable_aspm(adapter->pdev, PCIE_LINK_STATE_L1); 5241 } 5242 5243 while (test_and_set_bit(__E1000_RESETTING, &adapter->state)) 5244 usleep_range(1000, 2000); 5245 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */ 5246 adapter->max_frame_size = max_frame; 5247 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu); 5248 netdev->mtu = new_mtu; 5249 if (netif_running(netdev)) 5250 e1000e_down(adapter); 5251 5252 /* 5253 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN 5254 * means we reserve 2 more, this pushes us to allocate from the next 5255 * larger slab size. 5256 * i.e. RXBUFFER_2048 --> size-4096 slab 5257 * However with the new *_jumbo_rx* routines, jumbo receives will use 5258 * fragmented skbs 5259 */ 5260 5261 if (max_frame <= 2048) 5262 adapter->rx_buffer_len = 2048; 5263 else 5264 adapter->rx_buffer_len = 4096; 5265 5266 /* adjust allocation if LPE protects us, and we aren't using SBP */ 5267 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) || 5268 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN)) 5269 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN 5270 + ETH_FCS_LEN; 5271 5272 if (netif_running(netdev)) 5273 e1000e_up(adapter); 5274 else 5275 e1000e_reset(adapter); 5276 5277 clear_bit(__E1000_RESETTING, &adapter->state); 5278 5279 return 0; 5280 } 5281 5282 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, 5283 int cmd) 5284 { 5285 struct e1000_adapter *adapter = netdev_priv(netdev); 5286 struct mii_ioctl_data *data = if_mii(ifr); 5287 5288 if (adapter->hw.phy.media_type != e1000_media_type_copper) 5289 return -EOPNOTSUPP; 5290 5291 switch (cmd) { 5292 case SIOCGMIIPHY: 5293 data->phy_id = adapter->hw.phy.addr; 5294 break; 5295 case SIOCGMIIREG: 5296 e1000_phy_read_status(adapter); 5297 5298 switch (data->reg_num & 0x1F) { 5299 case MII_BMCR: 5300 data->val_out = adapter->phy_regs.bmcr; 5301 break; 5302 case MII_BMSR: 5303 data->val_out = adapter->phy_regs.bmsr; 5304 break; 5305 case MII_PHYSID1: 5306 data->val_out = (adapter->hw.phy.id >> 16); 5307 break; 5308 case MII_PHYSID2: 5309 data->val_out = (adapter->hw.phy.id & 0xFFFF); 5310 break; 5311 case MII_ADVERTISE: 5312 data->val_out = adapter->phy_regs.advertise; 5313 break; 5314 case MII_LPA: 5315 data->val_out = adapter->phy_regs.lpa; 5316 break; 5317 case MII_EXPANSION: 5318 data->val_out = adapter->phy_regs.expansion; 5319 break; 5320 case MII_CTRL1000: 5321 data->val_out = adapter->phy_regs.ctrl1000; 5322 break; 5323 case MII_STAT1000: 5324 data->val_out = adapter->phy_regs.stat1000; 5325 break; 5326 case MII_ESTATUS: 5327 data->val_out = adapter->phy_regs.estatus; 5328 break; 5329 default: 5330 return -EIO; 5331 } 5332 break; 5333 case SIOCSMIIREG: 5334 default: 5335 return -EOPNOTSUPP; 5336 } 5337 return 0; 5338 } 5339 5340 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 5341 { 5342 switch (cmd) { 5343 case SIOCGMIIPHY: 5344 case SIOCGMIIREG: 5345 case SIOCSMIIREG: 5346 return e1000_mii_ioctl(netdev, ifr, cmd); 5347 default: 5348 return -EOPNOTSUPP; 5349 } 5350 } 5351 5352 static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc) 5353 { 5354 struct e1000_hw *hw = &adapter->hw; 5355 u32 i, mac_reg; 5356 u16 phy_reg, wuc_enable; 5357 int retval = 0; 5358 5359 /* copy MAC RARs to PHY RARs */ 5360 e1000_copy_rx_addrs_to_phy_ich8lan(hw); 5361 5362 retval = hw->phy.ops.acquire(hw); 5363 if (retval) { 5364 e_err("Could not acquire PHY\n"); 5365 return retval; 5366 } 5367 5368 /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */ 5369 retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable); 5370 if (retval) 5371 goto out; 5372 5373 /* copy MAC MTA to PHY MTA - only needed for pchlan */ 5374 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) { 5375 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i); 5376 hw->phy.ops.write_reg_page(hw, BM_MTA(i), 5377 (u16)(mac_reg & 0xFFFF)); 5378 hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1, 5379 (u16)((mac_reg >> 16) & 0xFFFF)); 5380 } 5381 5382 /* configure PHY Rx Control register */ 5383 hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg); 5384 mac_reg = er32(RCTL); 5385 if (mac_reg & E1000_RCTL_UPE) 5386 phy_reg |= BM_RCTL_UPE; 5387 if (mac_reg & E1000_RCTL_MPE) 5388 phy_reg |= BM_RCTL_MPE; 5389 phy_reg &= ~(BM_RCTL_MO_MASK); 5390 if (mac_reg & E1000_RCTL_MO_3) 5391 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT) 5392 << BM_RCTL_MO_SHIFT); 5393 if (mac_reg & E1000_RCTL_BAM) 5394 phy_reg |= BM_RCTL_BAM; 5395 if (mac_reg & E1000_RCTL_PMCF) 5396 phy_reg |= BM_RCTL_PMCF; 5397 mac_reg = er32(CTRL); 5398 if (mac_reg & E1000_CTRL_RFCE) 5399 phy_reg |= BM_RCTL_RFCE; 5400 hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg); 5401 5402 /* enable PHY wakeup in MAC register */ 5403 ew32(WUFC, wufc); 5404 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN); 5405 5406 /* configure and enable PHY wakeup in PHY registers */ 5407 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc); 5408 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, E1000_WUC_PME_EN); 5409 5410 /* activate PHY wakeup */ 5411 wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT; 5412 retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable); 5413 if (retval) 5414 e_err("Could not set PHY Host Wakeup bit\n"); 5415 out: 5416 hw->phy.ops.release(hw); 5417 5418 return retval; 5419 } 5420 5421 static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake, 5422 bool runtime) 5423 { 5424 struct net_device *netdev = pci_get_drvdata(pdev); 5425 struct e1000_adapter *adapter = netdev_priv(netdev); 5426 struct e1000_hw *hw = &adapter->hw; 5427 u32 ctrl, ctrl_ext, rctl, status; 5428 /* Runtime suspend should only enable wakeup for link changes */ 5429 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol; 5430 int retval = 0; 5431 5432 netif_device_detach(netdev); 5433 5434 if (netif_running(netdev)) { 5435 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state)); 5436 e1000e_down(adapter); 5437 e1000_free_irq(adapter); 5438 } 5439 e1000e_reset_interrupt_capability(adapter); 5440 5441 retval = pci_save_state(pdev); 5442 if (retval) 5443 return retval; 5444 5445 status = er32(STATUS); 5446 if (status & E1000_STATUS_LU) 5447 wufc &= ~E1000_WUFC_LNKC; 5448 5449 if (wufc) { 5450 e1000_setup_rctl(adapter); 5451 e1000e_set_rx_mode(netdev); 5452 5453 /* turn on all-multi mode if wake on multicast is enabled */ 5454 if (wufc & E1000_WUFC_MC) { 5455 rctl = er32(RCTL); 5456 rctl |= E1000_RCTL_MPE; 5457 ew32(RCTL, rctl); 5458 } 5459 5460 ctrl = er32(CTRL); 5461 /* advertise wake from D3Cold */ 5462 #define E1000_CTRL_ADVD3WUC 0x00100000 5463 /* phy power management enable */ 5464 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000 5465 ctrl |= E1000_CTRL_ADVD3WUC; 5466 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP)) 5467 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT; 5468 ew32(CTRL, ctrl); 5469 5470 if (adapter->hw.phy.media_type == e1000_media_type_fiber || 5471 adapter->hw.phy.media_type == 5472 e1000_media_type_internal_serdes) { 5473 /* keep the laser running in D3 */ 5474 ctrl_ext = er32(CTRL_EXT); 5475 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA; 5476 ew32(CTRL_EXT, ctrl_ext); 5477 } 5478 5479 if (adapter->flags & FLAG_IS_ICH) 5480 e1000_suspend_workarounds_ich8lan(&adapter->hw); 5481 5482 /* Allow time for pending master requests to run */ 5483 e1000e_disable_pcie_master(&adapter->hw); 5484 5485 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) { 5486 /* enable wakeup by the PHY */ 5487 retval = e1000_init_phy_wakeup(adapter, wufc); 5488 if (retval) 5489 return retval; 5490 } else { 5491 /* enable wakeup by the MAC */ 5492 ew32(WUFC, wufc); 5493 ew32(WUC, E1000_WUC_PME_EN); 5494 } 5495 } else { 5496 ew32(WUC, 0); 5497 ew32(WUFC, 0); 5498 } 5499 5500 *enable_wake = !!wufc; 5501 5502 /* make sure adapter isn't asleep if manageability is enabled */ 5503 if ((adapter->flags & FLAG_MNG_PT_ENABLED) || 5504 (hw->mac.ops.check_mng_mode(hw))) 5505 *enable_wake = true; 5506 5507 if (adapter->hw.phy.type == e1000_phy_igp_3) 5508 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw); 5509 5510 /* 5511 * Release control of h/w to f/w. If f/w is AMT enabled, this 5512 * would have already happened in close and is redundant. 5513 */ 5514 e1000e_release_hw_control(adapter); 5515 5516 pci_disable_device(pdev); 5517 5518 return 0; 5519 } 5520 5521 static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake) 5522 { 5523 if (sleep && wake) { 5524 pci_prepare_to_sleep(pdev); 5525 return; 5526 } 5527 5528 pci_wake_from_d3(pdev, wake); 5529 pci_set_power_state(pdev, PCI_D3hot); 5530 } 5531 5532 static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep, 5533 bool wake) 5534 { 5535 struct net_device *netdev = pci_get_drvdata(pdev); 5536 struct e1000_adapter *adapter = netdev_priv(netdev); 5537 5538 /* 5539 * The pci-e switch on some quad port adapters will report a 5540 * correctable error when the MAC transitions from D0 to D3. To 5541 * prevent this we need to mask off the correctable errors on the 5542 * downstream port of the pci-e switch. 5543 */ 5544 if (adapter->flags & FLAG_IS_QUAD_PORT) { 5545 struct pci_dev *us_dev = pdev->bus->self; 5546 int pos = pci_pcie_cap(us_dev); 5547 u16 devctl; 5548 5549 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl); 5550 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, 5551 (devctl & ~PCI_EXP_DEVCTL_CERE)); 5552 5553 e1000_power_off(pdev, sleep, wake); 5554 5555 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl); 5556 } else { 5557 e1000_power_off(pdev, sleep, wake); 5558 } 5559 } 5560 5561 #ifdef CONFIG_PCIEASPM 5562 static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state) 5563 { 5564 pci_disable_link_state_locked(pdev, state); 5565 } 5566 #else 5567 static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state) 5568 { 5569 int pos; 5570 u16 reg16; 5571 5572 /* 5573 * Both device and parent should have the same ASPM setting. 5574 * Disable ASPM in downstream component first and then upstream. 5575 */ 5576 pos = pci_pcie_cap(pdev); 5577 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, ®16); 5578 reg16 &= ~state; 5579 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16); 5580 5581 if (!pdev->bus->self) 5582 return; 5583 5584 pos = pci_pcie_cap(pdev->bus->self); 5585 pci_read_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, ®16); 5586 reg16 &= ~state; 5587 pci_write_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, reg16); 5588 } 5589 #endif 5590 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state) 5591 { 5592 dev_info(&pdev->dev, "Disabling ASPM %s %s\n", 5593 (state & PCIE_LINK_STATE_L0S) ? "L0s" : "", 5594 (state & PCIE_LINK_STATE_L1) ? "L1" : ""); 5595 5596 __e1000e_disable_aspm(pdev, state); 5597 } 5598 5599 #ifdef CONFIG_PM 5600 static bool e1000e_pm_ready(struct e1000_adapter *adapter) 5601 { 5602 return !!adapter->tx_ring->buffer_info; 5603 } 5604 5605 static int __e1000_resume(struct pci_dev *pdev) 5606 { 5607 struct net_device *netdev = pci_get_drvdata(pdev); 5608 struct e1000_adapter *adapter = netdev_priv(netdev); 5609 struct e1000_hw *hw = &adapter->hw; 5610 u16 aspm_disable_flag = 0; 5611 u32 err; 5612 5613 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S) 5614 aspm_disable_flag = PCIE_LINK_STATE_L0S; 5615 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1) 5616 aspm_disable_flag |= PCIE_LINK_STATE_L1; 5617 if (aspm_disable_flag) 5618 e1000e_disable_aspm(pdev, aspm_disable_flag); 5619 5620 pci_set_power_state(pdev, PCI_D0); 5621 pci_restore_state(pdev); 5622 pci_save_state(pdev); 5623 5624 e1000e_set_interrupt_capability(adapter); 5625 if (netif_running(netdev)) { 5626 err = e1000_request_irq(adapter); 5627 if (err) 5628 return err; 5629 } 5630 5631 if (hw->mac.type == e1000_pch2lan) 5632 e1000_resume_workarounds_pchlan(&adapter->hw); 5633 5634 e1000e_power_up_phy(adapter); 5635 5636 /* report the system wakeup cause from S3/S4 */ 5637 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) { 5638 u16 phy_data; 5639 5640 e1e_rphy(&adapter->hw, BM_WUS, &phy_data); 5641 if (phy_data) { 5642 e_info("PHY Wakeup cause - %s\n", 5643 phy_data & E1000_WUS_EX ? "Unicast Packet" : 5644 phy_data & E1000_WUS_MC ? "Multicast Packet" : 5645 phy_data & E1000_WUS_BC ? "Broadcast Packet" : 5646 phy_data & E1000_WUS_MAG ? "Magic Packet" : 5647 phy_data & E1000_WUS_LNKC ? 5648 "Link Status Change" : "other"); 5649 } 5650 e1e_wphy(&adapter->hw, BM_WUS, ~0); 5651 } else { 5652 u32 wus = er32(WUS); 5653 if (wus) { 5654 e_info("MAC Wakeup cause - %s\n", 5655 wus & E1000_WUS_EX ? "Unicast Packet" : 5656 wus & E1000_WUS_MC ? "Multicast Packet" : 5657 wus & E1000_WUS_BC ? "Broadcast Packet" : 5658 wus & E1000_WUS_MAG ? "Magic Packet" : 5659 wus & E1000_WUS_LNKC ? "Link Status Change" : 5660 "other"); 5661 } 5662 ew32(WUS, ~0); 5663 } 5664 5665 e1000e_reset(adapter); 5666 5667 e1000_init_manageability_pt(adapter); 5668 5669 if (netif_running(netdev)) 5670 e1000e_up(adapter); 5671 5672 netif_device_attach(netdev); 5673 5674 /* 5675 * If the controller has AMT, do not set DRV_LOAD until the interface 5676 * is up. For all other cases, let the f/w know that the h/w is now 5677 * under the control of the driver. 5678 */ 5679 if (!(adapter->flags & FLAG_HAS_AMT)) 5680 e1000e_get_hw_control(adapter); 5681 5682 return 0; 5683 } 5684 5685 #ifdef CONFIG_PM_SLEEP 5686 static int e1000_suspend(struct device *dev) 5687 { 5688 struct pci_dev *pdev = to_pci_dev(dev); 5689 int retval; 5690 bool wake; 5691 5692 retval = __e1000_shutdown(pdev, &wake, false); 5693 if (!retval) 5694 e1000_complete_shutdown(pdev, true, wake); 5695 5696 return retval; 5697 } 5698 5699 static int e1000_resume(struct device *dev) 5700 { 5701 struct pci_dev *pdev = to_pci_dev(dev); 5702 struct net_device *netdev = pci_get_drvdata(pdev); 5703 struct e1000_adapter *adapter = netdev_priv(netdev); 5704 5705 if (e1000e_pm_ready(adapter)) 5706 adapter->idle_check = true; 5707 5708 return __e1000_resume(pdev); 5709 } 5710 #endif /* CONFIG_PM_SLEEP */ 5711 5712 #ifdef CONFIG_PM_RUNTIME 5713 static int e1000_runtime_suspend(struct device *dev) 5714 { 5715 struct pci_dev *pdev = to_pci_dev(dev); 5716 struct net_device *netdev = pci_get_drvdata(pdev); 5717 struct e1000_adapter *adapter = netdev_priv(netdev); 5718 5719 if (e1000e_pm_ready(adapter)) { 5720 bool wake; 5721 5722 __e1000_shutdown(pdev, &wake, true); 5723 } 5724 5725 return 0; 5726 } 5727 5728 static int e1000_idle(struct device *dev) 5729 { 5730 struct pci_dev *pdev = to_pci_dev(dev); 5731 struct net_device *netdev = pci_get_drvdata(pdev); 5732 struct e1000_adapter *adapter = netdev_priv(netdev); 5733 5734 if (!e1000e_pm_ready(adapter)) 5735 return 0; 5736 5737 if (adapter->idle_check) { 5738 adapter->idle_check = false; 5739 if (!e1000e_has_link(adapter)) 5740 pm_schedule_suspend(dev, MSEC_PER_SEC); 5741 } 5742 5743 return -EBUSY; 5744 } 5745 5746 static int e1000_runtime_resume(struct device *dev) 5747 { 5748 struct pci_dev *pdev = to_pci_dev(dev); 5749 struct net_device *netdev = pci_get_drvdata(pdev); 5750 struct e1000_adapter *adapter = netdev_priv(netdev); 5751 5752 if (!e1000e_pm_ready(adapter)) 5753 return 0; 5754 5755 adapter->idle_check = !dev->power.runtime_auto; 5756 return __e1000_resume(pdev); 5757 } 5758 #endif /* CONFIG_PM_RUNTIME */ 5759 #endif /* CONFIG_PM */ 5760 5761 static void e1000_shutdown(struct pci_dev *pdev) 5762 { 5763 bool wake = false; 5764 5765 __e1000_shutdown(pdev, &wake, false); 5766 5767 if (system_state == SYSTEM_POWER_OFF) 5768 e1000_complete_shutdown(pdev, false, wake); 5769 } 5770 5771 #ifdef CONFIG_NET_POLL_CONTROLLER 5772 5773 static irqreturn_t e1000_intr_msix(int irq, void *data) 5774 { 5775 struct net_device *netdev = data; 5776 struct e1000_adapter *adapter = netdev_priv(netdev); 5777 5778 if (adapter->msix_entries) { 5779 int vector, msix_irq; 5780 5781 vector = 0; 5782 msix_irq = adapter->msix_entries[vector].vector; 5783 disable_irq(msix_irq); 5784 e1000_intr_msix_rx(msix_irq, netdev); 5785 enable_irq(msix_irq); 5786 5787 vector++; 5788 msix_irq = adapter->msix_entries[vector].vector; 5789 disable_irq(msix_irq); 5790 e1000_intr_msix_tx(msix_irq, netdev); 5791 enable_irq(msix_irq); 5792 5793 vector++; 5794 msix_irq = adapter->msix_entries[vector].vector; 5795 disable_irq(msix_irq); 5796 e1000_msix_other(msix_irq, netdev); 5797 enable_irq(msix_irq); 5798 } 5799 5800 return IRQ_HANDLED; 5801 } 5802 5803 /* 5804 * Polling 'interrupt' - used by things like netconsole to send skbs 5805 * without having to re-enable interrupts. It's not called while 5806 * the interrupt routine is executing. 5807 */ 5808 static void e1000_netpoll(struct net_device *netdev) 5809 { 5810 struct e1000_adapter *adapter = netdev_priv(netdev); 5811 5812 switch (adapter->int_mode) { 5813 case E1000E_INT_MODE_MSIX: 5814 e1000_intr_msix(adapter->pdev->irq, netdev); 5815 break; 5816 case E1000E_INT_MODE_MSI: 5817 disable_irq(adapter->pdev->irq); 5818 e1000_intr_msi(adapter->pdev->irq, netdev); 5819 enable_irq(adapter->pdev->irq); 5820 break; 5821 default: /* E1000E_INT_MODE_LEGACY */ 5822 disable_irq(adapter->pdev->irq); 5823 e1000_intr(adapter->pdev->irq, netdev); 5824 enable_irq(adapter->pdev->irq); 5825 break; 5826 } 5827 } 5828 #endif 5829 5830 /** 5831 * e1000_io_error_detected - called when PCI error is detected 5832 * @pdev: Pointer to PCI device 5833 * @state: The current pci connection state 5834 * 5835 * This function is called after a PCI bus error affecting 5836 * this device has been detected. 5837 */ 5838 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, 5839 pci_channel_state_t state) 5840 { 5841 struct net_device *netdev = pci_get_drvdata(pdev); 5842 struct e1000_adapter *adapter = netdev_priv(netdev); 5843 5844 netif_device_detach(netdev); 5845 5846 if (state == pci_channel_io_perm_failure) 5847 return PCI_ERS_RESULT_DISCONNECT; 5848 5849 if (netif_running(netdev)) 5850 e1000e_down(adapter); 5851 pci_disable_device(pdev); 5852 5853 /* Request a slot slot reset. */ 5854 return PCI_ERS_RESULT_NEED_RESET; 5855 } 5856 5857 /** 5858 * e1000_io_slot_reset - called after the pci bus has been reset. 5859 * @pdev: Pointer to PCI device 5860 * 5861 * Restart the card from scratch, as if from a cold-boot. Implementation 5862 * resembles the first-half of the e1000_resume routine. 5863 */ 5864 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev) 5865 { 5866 struct net_device *netdev = pci_get_drvdata(pdev); 5867 struct e1000_adapter *adapter = netdev_priv(netdev); 5868 struct e1000_hw *hw = &adapter->hw; 5869 u16 aspm_disable_flag = 0; 5870 int err; 5871 pci_ers_result_t result; 5872 5873 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S) 5874 aspm_disable_flag = PCIE_LINK_STATE_L0S; 5875 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1) 5876 aspm_disable_flag |= PCIE_LINK_STATE_L1; 5877 if (aspm_disable_flag) 5878 e1000e_disable_aspm(pdev, aspm_disable_flag); 5879 5880 err = pci_enable_device_mem(pdev); 5881 if (err) { 5882 dev_err(&pdev->dev, 5883 "Cannot re-enable PCI device after reset.\n"); 5884 result = PCI_ERS_RESULT_DISCONNECT; 5885 } else { 5886 pci_set_master(pdev); 5887 pdev->state_saved = true; 5888 pci_restore_state(pdev); 5889 5890 pci_enable_wake(pdev, PCI_D3hot, 0); 5891 pci_enable_wake(pdev, PCI_D3cold, 0); 5892 5893 e1000e_reset(adapter); 5894 ew32(WUS, ~0); 5895 result = PCI_ERS_RESULT_RECOVERED; 5896 } 5897 5898 pci_cleanup_aer_uncorrect_error_status(pdev); 5899 5900 return result; 5901 } 5902 5903 /** 5904 * e1000_io_resume - called when traffic can start flowing again. 5905 * @pdev: Pointer to PCI device 5906 * 5907 * This callback is called when the error recovery driver tells us that 5908 * its OK to resume normal operation. Implementation resembles the 5909 * second-half of the e1000_resume routine. 5910 */ 5911 static void e1000_io_resume(struct pci_dev *pdev) 5912 { 5913 struct net_device *netdev = pci_get_drvdata(pdev); 5914 struct e1000_adapter *adapter = netdev_priv(netdev); 5915 5916 e1000_init_manageability_pt(adapter); 5917 5918 if (netif_running(netdev)) { 5919 if (e1000e_up(adapter)) { 5920 dev_err(&pdev->dev, 5921 "can't bring device back up after reset\n"); 5922 return; 5923 } 5924 } 5925 5926 netif_device_attach(netdev); 5927 5928 /* 5929 * If the controller has AMT, do not set DRV_LOAD until the interface 5930 * is up. For all other cases, let the f/w know that the h/w is now 5931 * under the control of the driver. 5932 */ 5933 if (!(adapter->flags & FLAG_HAS_AMT)) 5934 e1000e_get_hw_control(adapter); 5935 5936 } 5937 5938 static void e1000_print_device_info(struct e1000_adapter *adapter) 5939 { 5940 struct e1000_hw *hw = &adapter->hw; 5941 struct net_device *netdev = adapter->netdev; 5942 u32 ret_val; 5943 u8 pba_str[E1000_PBANUM_LENGTH]; 5944 5945 /* print bus type/speed/width info */ 5946 e_info("(PCI Express:2.5GT/s:%s) %pM\n", 5947 /* bus width */ 5948 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" : 5949 "Width x1"), 5950 /* MAC address */ 5951 netdev->dev_addr); 5952 e_info("Intel(R) PRO/%s Network Connection\n", 5953 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000"); 5954 ret_val = e1000_read_pba_string_generic(hw, pba_str, 5955 E1000_PBANUM_LENGTH); 5956 if (ret_val) 5957 strlcpy((char *)pba_str, "Unknown", sizeof(pba_str)); 5958 e_info("MAC: %d, PHY: %d, PBA No: %s\n", 5959 hw->mac.type, hw->phy.type, pba_str); 5960 } 5961 5962 static void e1000_eeprom_checks(struct e1000_adapter *adapter) 5963 { 5964 struct e1000_hw *hw = &adapter->hw; 5965 int ret_val; 5966 u16 buf = 0; 5967 5968 if (hw->mac.type != e1000_82573) 5969 return; 5970 5971 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf); 5972 le16_to_cpus(&buf); 5973 if (!ret_val && (!(buf & (1 << 0)))) { 5974 /* Deep Smart Power Down (DSPD) */ 5975 dev_warn(&adapter->pdev->dev, 5976 "Warning: detected DSPD enabled in EEPROM\n"); 5977 } 5978 } 5979 5980 static int e1000_set_features(struct net_device *netdev, 5981 netdev_features_t features) 5982 { 5983 struct e1000_adapter *adapter = netdev_priv(netdev); 5984 netdev_features_t changed = features ^ netdev->features; 5985 5986 if (changed & (NETIF_F_TSO | NETIF_F_TSO6)) 5987 adapter->flags |= FLAG_TSO_FORCE; 5988 5989 if (!(changed & (NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_TX | 5990 NETIF_F_RXCSUM | NETIF_F_RXHASH))) 5991 return 0; 5992 5993 /* 5994 * IP payload checksum (enabled with jumbos/packet-split when Rx 5995 * checksum is enabled) and generation of RSS hash is mutually 5996 * exclusive in the hardware. 5997 */ 5998 if (adapter->rx_ps_pages && 5999 (features & NETIF_F_RXCSUM) && (features & NETIF_F_RXHASH)) { 6000 e_err("Enabling both receive checksum offload and receive hashing is not possible with jumbo frames. Disable jumbos or enable only one of the receive offload features.\n"); 6001 return -EINVAL; 6002 } 6003 6004 netdev->features = features; 6005 6006 if (netif_running(netdev)) 6007 e1000e_reinit_locked(adapter); 6008 else 6009 e1000e_reset(adapter); 6010 6011 return 0; 6012 } 6013 6014 static const struct net_device_ops e1000e_netdev_ops = { 6015 .ndo_open = e1000_open, 6016 .ndo_stop = e1000_close, 6017 .ndo_start_xmit = e1000_xmit_frame, 6018 .ndo_get_stats64 = e1000e_get_stats64, 6019 .ndo_set_rx_mode = e1000e_set_rx_mode, 6020 .ndo_set_mac_address = e1000_set_mac, 6021 .ndo_change_mtu = e1000_change_mtu, 6022 .ndo_do_ioctl = e1000_ioctl, 6023 .ndo_tx_timeout = e1000_tx_timeout, 6024 .ndo_validate_addr = eth_validate_addr, 6025 6026 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid, 6027 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid, 6028 #ifdef CONFIG_NET_POLL_CONTROLLER 6029 .ndo_poll_controller = e1000_netpoll, 6030 #endif 6031 .ndo_set_features = e1000_set_features, 6032 }; 6033 6034 /** 6035 * e1000_probe - Device Initialization Routine 6036 * @pdev: PCI device information struct 6037 * @ent: entry in e1000_pci_tbl 6038 * 6039 * Returns 0 on success, negative on failure 6040 * 6041 * e1000_probe initializes an adapter identified by a pci_dev structure. 6042 * The OS initialization, configuring of the adapter private structure, 6043 * and a hardware reset occur. 6044 **/ 6045 static int __devinit e1000_probe(struct pci_dev *pdev, 6046 const struct pci_device_id *ent) 6047 { 6048 struct net_device *netdev; 6049 struct e1000_adapter *adapter; 6050 struct e1000_hw *hw; 6051 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data]; 6052 resource_size_t mmio_start, mmio_len; 6053 resource_size_t flash_start, flash_len; 6054 6055 static int cards_found; 6056 u16 aspm_disable_flag = 0; 6057 int i, err, pci_using_dac; 6058 u16 eeprom_data = 0; 6059 u16 eeprom_apme_mask = E1000_EEPROM_APME; 6060 6061 if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S) 6062 aspm_disable_flag = PCIE_LINK_STATE_L0S; 6063 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1) 6064 aspm_disable_flag |= PCIE_LINK_STATE_L1; 6065 if (aspm_disable_flag) 6066 e1000e_disable_aspm(pdev, aspm_disable_flag); 6067 6068 err = pci_enable_device_mem(pdev); 6069 if (err) 6070 return err; 6071 6072 pci_using_dac = 0; 6073 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)); 6074 if (!err) { 6075 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64)); 6076 if (!err) 6077 pci_using_dac = 1; 6078 } else { 6079 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); 6080 if (err) { 6081 err = dma_set_coherent_mask(&pdev->dev, 6082 DMA_BIT_MASK(32)); 6083 if (err) { 6084 dev_err(&pdev->dev, "No usable DMA configuration, aborting\n"); 6085 goto err_dma; 6086 } 6087 } 6088 } 6089 6090 err = pci_request_selected_regions_exclusive(pdev, 6091 pci_select_bars(pdev, IORESOURCE_MEM), 6092 e1000e_driver_name); 6093 if (err) 6094 goto err_pci_reg; 6095 6096 /* AER (Advanced Error Reporting) hooks */ 6097 pci_enable_pcie_error_reporting(pdev); 6098 6099 pci_set_master(pdev); 6100 /* PCI config space info */ 6101 err = pci_save_state(pdev); 6102 if (err) 6103 goto err_alloc_etherdev; 6104 6105 err = -ENOMEM; 6106 netdev = alloc_etherdev(sizeof(struct e1000_adapter)); 6107 if (!netdev) 6108 goto err_alloc_etherdev; 6109 6110 SET_NETDEV_DEV(netdev, &pdev->dev); 6111 6112 netdev->irq = pdev->irq; 6113 6114 pci_set_drvdata(pdev, netdev); 6115 adapter = netdev_priv(netdev); 6116 hw = &adapter->hw; 6117 adapter->netdev = netdev; 6118 adapter->pdev = pdev; 6119 adapter->ei = ei; 6120 adapter->pba = ei->pba; 6121 adapter->flags = ei->flags; 6122 adapter->flags2 = ei->flags2; 6123 adapter->hw.adapter = adapter; 6124 adapter->hw.mac.type = ei->mac; 6125 adapter->max_hw_frame_size = ei->max_hw_frame_size; 6126 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1; 6127 6128 mmio_start = pci_resource_start(pdev, 0); 6129 mmio_len = pci_resource_len(pdev, 0); 6130 6131 err = -EIO; 6132 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len); 6133 if (!adapter->hw.hw_addr) 6134 goto err_ioremap; 6135 6136 if ((adapter->flags & FLAG_HAS_FLASH) && 6137 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) { 6138 flash_start = pci_resource_start(pdev, 1); 6139 flash_len = pci_resource_len(pdev, 1); 6140 adapter->hw.flash_address = ioremap(flash_start, flash_len); 6141 if (!adapter->hw.flash_address) 6142 goto err_flashmap; 6143 } 6144 6145 /* construct the net_device struct */ 6146 netdev->netdev_ops = &e1000e_netdev_ops; 6147 e1000e_set_ethtool_ops(netdev); 6148 netdev->watchdog_timeo = 5 * HZ; 6149 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64); 6150 strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name)); 6151 6152 netdev->mem_start = mmio_start; 6153 netdev->mem_end = mmio_start + mmio_len; 6154 6155 adapter->bd_number = cards_found++; 6156 6157 e1000e_check_options(adapter); 6158 6159 /* setup adapter struct */ 6160 err = e1000_sw_init(adapter); 6161 if (err) 6162 goto err_sw_init; 6163 6164 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops)); 6165 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops)); 6166 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops)); 6167 6168 err = ei->get_variants(adapter); 6169 if (err) 6170 goto err_hw_init; 6171 6172 if ((adapter->flags & FLAG_IS_ICH) && 6173 (adapter->flags & FLAG_READ_ONLY_NVM)) 6174 e1000e_write_protect_nvm_ich8lan(&adapter->hw); 6175 6176 hw->mac.ops.get_bus_info(&adapter->hw); 6177 6178 adapter->hw.phy.autoneg_wait_to_complete = 0; 6179 6180 /* Copper options */ 6181 if (adapter->hw.phy.media_type == e1000_media_type_copper) { 6182 adapter->hw.phy.mdix = AUTO_ALL_MODES; 6183 adapter->hw.phy.disable_polarity_correction = 0; 6184 adapter->hw.phy.ms_type = e1000_ms_hw_default; 6185 } 6186 6187 if (e1000_check_reset_block(&adapter->hw)) 6188 e_info("PHY reset is blocked due to SOL/IDER session.\n"); 6189 6190 /* Set initial default active device features */ 6191 netdev->features = (NETIF_F_SG | 6192 NETIF_F_HW_VLAN_RX | 6193 NETIF_F_HW_VLAN_TX | 6194 NETIF_F_TSO | 6195 NETIF_F_TSO6 | 6196 NETIF_F_RXHASH | 6197 NETIF_F_RXCSUM | 6198 NETIF_F_HW_CSUM); 6199 6200 /* Set user-changeable features (subset of all device features) */ 6201 netdev->hw_features = netdev->features; 6202 6203 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) 6204 netdev->features |= NETIF_F_HW_VLAN_FILTER; 6205 6206 netdev->vlan_features |= (NETIF_F_SG | 6207 NETIF_F_TSO | 6208 NETIF_F_TSO6 | 6209 NETIF_F_HW_CSUM); 6210 6211 netdev->priv_flags |= IFF_UNICAST_FLT; 6212 6213 if (pci_using_dac) { 6214 netdev->features |= NETIF_F_HIGHDMA; 6215 netdev->vlan_features |= NETIF_F_HIGHDMA; 6216 } 6217 6218 if (e1000e_enable_mng_pass_thru(&adapter->hw)) 6219 adapter->flags |= FLAG_MNG_PT_ENABLED; 6220 6221 /* 6222 * before reading the NVM, reset the controller to 6223 * put the device in a known good starting state 6224 */ 6225 adapter->hw.mac.ops.reset_hw(&adapter->hw); 6226 6227 /* 6228 * systems with ASPM and others may see the checksum fail on the first 6229 * attempt. Let's give it a few tries 6230 */ 6231 for (i = 0;; i++) { 6232 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0) 6233 break; 6234 if (i == 2) { 6235 e_err("The NVM Checksum Is Not Valid\n"); 6236 err = -EIO; 6237 goto err_eeprom; 6238 } 6239 } 6240 6241 e1000_eeprom_checks(adapter); 6242 6243 /* copy the MAC address */ 6244 if (e1000e_read_mac_addr(&adapter->hw)) 6245 e_err("NVM Read Error while reading MAC address\n"); 6246 6247 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len); 6248 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len); 6249 6250 if (!is_valid_ether_addr(netdev->perm_addr)) { 6251 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr); 6252 err = -EIO; 6253 goto err_eeprom; 6254 } 6255 6256 init_timer(&adapter->watchdog_timer); 6257 adapter->watchdog_timer.function = e1000_watchdog; 6258 adapter->watchdog_timer.data = (unsigned long) adapter; 6259 6260 init_timer(&adapter->phy_info_timer); 6261 adapter->phy_info_timer.function = e1000_update_phy_info; 6262 adapter->phy_info_timer.data = (unsigned long) adapter; 6263 6264 INIT_WORK(&adapter->reset_task, e1000_reset_task); 6265 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task); 6266 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround); 6267 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task); 6268 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang); 6269 6270 /* Initialize link parameters. User can change them with ethtool */ 6271 adapter->hw.mac.autoneg = 1; 6272 adapter->fc_autoneg = true; 6273 adapter->hw.fc.requested_mode = e1000_fc_default; 6274 adapter->hw.fc.current_mode = e1000_fc_default; 6275 adapter->hw.phy.autoneg_advertised = 0x2f; 6276 6277 /* ring size defaults */ 6278 adapter->rx_ring->count = 256; 6279 adapter->tx_ring->count = 256; 6280 6281 /* 6282 * Initial Wake on LAN setting - If APM wake is enabled in 6283 * the EEPROM, enable the ACPI Magic Packet filter 6284 */ 6285 if (adapter->flags & FLAG_APME_IN_WUC) { 6286 /* APME bit in EEPROM is mapped to WUC.APME */ 6287 eeprom_data = er32(WUC); 6288 eeprom_apme_mask = E1000_WUC_APME; 6289 if ((hw->mac.type > e1000_ich10lan) && 6290 (eeprom_data & E1000_WUC_PHY_WAKE)) 6291 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP; 6292 } else if (adapter->flags & FLAG_APME_IN_CTRL3) { 6293 if (adapter->flags & FLAG_APME_CHECK_PORT_B && 6294 (adapter->hw.bus.func == 1)) 6295 e1000_read_nvm(&adapter->hw, 6296 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data); 6297 else 6298 e1000_read_nvm(&adapter->hw, 6299 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data); 6300 } 6301 6302 /* fetch WoL from EEPROM */ 6303 if (eeprom_data & eeprom_apme_mask) 6304 adapter->eeprom_wol |= E1000_WUFC_MAG; 6305 6306 /* 6307 * now that we have the eeprom settings, apply the special cases 6308 * where the eeprom may be wrong or the board simply won't support 6309 * wake on lan on a particular port 6310 */ 6311 if (!(adapter->flags & FLAG_HAS_WOL)) 6312 adapter->eeprom_wol = 0; 6313 6314 /* initialize the wol settings based on the eeprom settings */ 6315 adapter->wol = adapter->eeprom_wol; 6316 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol); 6317 6318 /* save off EEPROM version number */ 6319 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers); 6320 6321 /* reset the hardware with the new settings */ 6322 e1000e_reset(adapter); 6323 6324 /* 6325 * If the controller has AMT, do not set DRV_LOAD until the interface 6326 * is up. For all other cases, let the f/w know that the h/w is now 6327 * under the control of the driver. 6328 */ 6329 if (!(adapter->flags & FLAG_HAS_AMT)) 6330 e1000e_get_hw_control(adapter); 6331 6332 strlcpy(netdev->name, "eth%d", sizeof(netdev->name)); 6333 err = register_netdev(netdev); 6334 if (err) 6335 goto err_register; 6336 6337 /* carrier off reporting is important to ethtool even BEFORE open */ 6338 netif_carrier_off(netdev); 6339 6340 e1000_print_device_info(adapter); 6341 6342 if (pci_dev_run_wake(pdev)) 6343 pm_runtime_put_noidle(&pdev->dev); 6344 6345 return 0; 6346 6347 err_register: 6348 if (!(adapter->flags & FLAG_HAS_AMT)) 6349 e1000e_release_hw_control(adapter); 6350 err_eeprom: 6351 if (!e1000_check_reset_block(&adapter->hw)) 6352 e1000_phy_hw_reset(&adapter->hw); 6353 err_hw_init: 6354 kfree(adapter->tx_ring); 6355 kfree(adapter->rx_ring); 6356 err_sw_init: 6357 if (adapter->hw.flash_address) 6358 iounmap(adapter->hw.flash_address); 6359 e1000e_reset_interrupt_capability(adapter); 6360 err_flashmap: 6361 iounmap(adapter->hw.hw_addr); 6362 err_ioremap: 6363 free_netdev(netdev); 6364 err_alloc_etherdev: 6365 pci_release_selected_regions(pdev, 6366 pci_select_bars(pdev, IORESOURCE_MEM)); 6367 err_pci_reg: 6368 err_dma: 6369 pci_disable_device(pdev); 6370 return err; 6371 } 6372 6373 /** 6374 * e1000_remove - Device Removal Routine 6375 * @pdev: PCI device information struct 6376 * 6377 * e1000_remove is called by the PCI subsystem to alert the driver 6378 * that it should release a PCI device. The could be caused by a 6379 * Hot-Plug event, or because the driver is going to be removed from 6380 * memory. 6381 **/ 6382 static void __devexit e1000_remove(struct pci_dev *pdev) 6383 { 6384 struct net_device *netdev = pci_get_drvdata(pdev); 6385 struct e1000_adapter *adapter = netdev_priv(netdev); 6386 bool down = test_bit(__E1000_DOWN, &adapter->state); 6387 6388 /* 6389 * The timers may be rescheduled, so explicitly disable them 6390 * from being rescheduled. 6391 */ 6392 if (!down) 6393 set_bit(__E1000_DOWN, &adapter->state); 6394 del_timer_sync(&adapter->watchdog_timer); 6395 del_timer_sync(&adapter->phy_info_timer); 6396 6397 cancel_work_sync(&adapter->reset_task); 6398 cancel_work_sync(&adapter->watchdog_task); 6399 cancel_work_sync(&adapter->downshift_task); 6400 cancel_work_sync(&adapter->update_phy_task); 6401 cancel_work_sync(&adapter->print_hang_task); 6402 6403 if (!(netdev->flags & IFF_UP)) 6404 e1000_power_down_phy(adapter); 6405 6406 /* Don't lie to e1000_close() down the road. */ 6407 if (!down) 6408 clear_bit(__E1000_DOWN, &adapter->state); 6409 unregister_netdev(netdev); 6410 6411 if (pci_dev_run_wake(pdev)) 6412 pm_runtime_get_noresume(&pdev->dev); 6413 6414 /* 6415 * Release control of h/w to f/w. If f/w is AMT enabled, this 6416 * would have already happened in close and is redundant. 6417 */ 6418 e1000e_release_hw_control(adapter); 6419 6420 e1000e_reset_interrupt_capability(adapter); 6421 kfree(adapter->tx_ring); 6422 kfree(adapter->rx_ring); 6423 6424 iounmap(adapter->hw.hw_addr); 6425 if (adapter->hw.flash_address) 6426 iounmap(adapter->hw.flash_address); 6427 pci_release_selected_regions(pdev, 6428 pci_select_bars(pdev, IORESOURCE_MEM)); 6429 6430 free_netdev(netdev); 6431 6432 /* AER disable */ 6433 pci_disable_pcie_error_reporting(pdev); 6434 6435 pci_disable_device(pdev); 6436 } 6437 6438 /* PCI Error Recovery (ERS) */ 6439 static struct pci_error_handlers e1000_err_handler = { 6440 .error_detected = e1000_io_error_detected, 6441 .slot_reset = e1000_io_slot_reset, 6442 .resume = e1000_io_resume, 6443 }; 6444 6445 static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = { 6446 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 }, 6447 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 }, 6448 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 }, 6449 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 }, 6450 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 }, 6451 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 }, 6452 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 }, 6453 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 }, 6454 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 }, 6455 6456 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 }, 6457 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 }, 6458 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 }, 6459 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 }, 6460 6461 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 }, 6462 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 }, 6463 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 }, 6464 6465 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 }, 6466 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 }, 6467 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 }, 6468 6469 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT), 6470 board_80003es2lan }, 6471 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT), 6472 board_80003es2lan }, 6473 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT), 6474 board_80003es2lan }, 6475 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT), 6476 board_80003es2lan }, 6477 6478 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan }, 6479 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan }, 6480 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan }, 6481 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan }, 6482 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan }, 6483 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan }, 6484 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan }, 6485 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan }, 6486 6487 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan }, 6488 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan }, 6489 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan }, 6490 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan }, 6491 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan }, 6492 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan }, 6493 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan }, 6494 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan }, 6495 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan }, 6496 6497 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan }, 6498 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan }, 6499 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan }, 6500 6501 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan }, 6502 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan }, 6503 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan }, 6504 6505 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan }, 6506 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan }, 6507 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan }, 6508 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan }, 6509 6510 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan }, 6511 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan }, 6512 6513 { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */ 6514 }; 6515 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl); 6516 6517 #ifdef CONFIG_PM 6518 static const struct dev_pm_ops e1000_pm_ops = { 6519 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume) 6520 SET_RUNTIME_PM_OPS(e1000_runtime_suspend, 6521 e1000_runtime_resume, e1000_idle) 6522 }; 6523 #endif 6524 6525 /* PCI Device API Driver */ 6526 static struct pci_driver e1000_driver = { 6527 .name = e1000e_driver_name, 6528 .id_table = e1000_pci_tbl, 6529 .probe = e1000_probe, 6530 .remove = __devexit_p(e1000_remove), 6531 #ifdef CONFIG_PM 6532 .driver = { 6533 .pm = &e1000_pm_ops, 6534 }, 6535 #endif 6536 .shutdown = e1000_shutdown, 6537 .err_handler = &e1000_err_handler 6538 }; 6539 6540 /** 6541 * e1000_init_module - Driver Registration Routine 6542 * 6543 * e1000_init_module is the first routine called when the driver is 6544 * loaded. All it does is register with the PCI subsystem. 6545 **/ 6546 static int __init e1000_init_module(void) 6547 { 6548 int ret; 6549 pr_info("Intel(R) PRO/1000 Network Driver - %s\n", 6550 e1000e_driver_version); 6551 pr_info("Copyright(c) 1999 - 2012 Intel Corporation.\n"); 6552 ret = pci_register_driver(&e1000_driver); 6553 6554 return ret; 6555 } 6556 module_init(e1000_init_module); 6557 6558 /** 6559 * e1000_exit_module - Driver Exit Cleanup Routine 6560 * 6561 * e1000_exit_module is called just before the driver is removed 6562 * from memory. 6563 **/ 6564 static void __exit e1000_exit_module(void) 6565 { 6566 pci_unregister_driver(&e1000_driver); 6567 } 6568 module_exit(e1000_exit_module); 6569 6570 6571 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); 6572 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver"); 6573 MODULE_LICENSE("GPL"); 6574 MODULE_VERSION(DRV_VERSION); 6575 6576 /* e1000_main.c */ 6577