1 /******************************************************************************* 2 3 Intel PRO/1000 Linux driver 4 Copyright(c) 1999 - 2012 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, 8 version 2, as published by the Free Software Foundation. 9 10 This program is distributed in the hope it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 You should have received a copy of the GNU General Public License along with 16 this program; if not, write to the Free Software Foundation, Inc., 17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 18 19 The full GNU General Public License is included in this distribution in 20 the file called "COPYING". 21 22 Contact Information: 23 Linux NICS <linux.nics@intel.com> 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 26 27 *******************************************************************************/ 28 29 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 30 31 #include <linux/module.h> 32 #include <linux/types.h> 33 #include <linux/init.h> 34 #include <linux/pci.h> 35 #include <linux/vmalloc.h> 36 #include <linux/pagemap.h> 37 #include <linux/delay.h> 38 #include <linux/netdevice.h> 39 #include <linux/interrupt.h> 40 #include <linux/tcp.h> 41 #include <linux/ipv6.h> 42 #include <linux/slab.h> 43 #include <net/checksum.h> 44 #include <net/ip6_checksum.h> 45 #include <linux/mii.h> 46 #include <linux/ethtool.h> 47 #include <linux/if_vlan.h> 48 #include <linux/cpu.h> 49 #include <linux/smp.h> 50 #include <linux/pm_qos.h> 51 #include <linux/pm_runtime.h> 52 #include <linux/aer.h> 53 #include <linux/prefetch.h> 54 55 #include "e1000.h" 56 57 #define DRV_EXTRAVERSION "-k" 58 59 #define DRV_VERSION "1.9.5" DRV_EXTRAVERSION 60 char e1000e_driver_name[] = "e1000e"; 61 const char e1000e_driver_version[] = DRV_VERSION; 62 63 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state); 64 65 static const struct e1000_info *e1000_info_tbl[] = { 66 [board_82571] = &e1000_82571_info, 67 [board_82572] = &e1000_82572_info, 68 [board_82573] = &e1000_82573_info, 69 [board_82574] = &e1000_82574_info, 70 [board_82583] = &e1000_82583_info, 71 [board_80003es2lan] = &e1000_es2_info, 72 [board_ich8lan] = &e1000_ich8_info, 73 [board_ich9lan] = &e1000_ich9_info, 74 [board_ich10lan] = &e1000_ich10_info, 75 [board_pchlan] = &e1000_pch_info, 76 [board_pch2lan] = &e1000_pch2_info, 77 }; 78 79 struct e1000_reg_info { 80 u32 ofs; 81 char *name; 82 }; 83 84 #define E1000_RDFH 0x02410 /* Rx Data FIFO Head - RW */ 85 #define E1000_RDFT 0x02418 /* Rx Data FIFO Tail - RW */ 86 #define E1000_RDFHS 0x02420 /* Rx Data FIFO Head Saved - RW */ 87 #define E1000_RDFTS 0x02428 /* Rx Data FIFO Tail Saved - RW */ 88 #define E1000_RDFPC 0x02430 /* Rx Data FIFO Packet Count - RW */ 89 90 #define E1000_TDFH 0x03410 /* Tx Data FIFO Head - RW */ 91 #define E1000_TDFT 0x03418 /* Tx Data FIFO Tail - RW */ 92 #define E1000_TDFHS 0x03420 /* Tx Data FIFO Head Saved - RW */ 93 #define E1000_TDFTS 0x03428 /* Tx Data FIFO Tail Saved - RW */ 94 #define E1000_TDFPC 0x03430 /* Tx Data FIFO Packet Count - RW */ 95 96 static const struct e1000_reg_info e1000_reg_info_tbl[] = { 97 98 /* General Registers */ 99 {E1000_CTRL, "CTRL"}, 100 {E1000_STATUS, "STATUS"}, 101 {E1000_CTRL_EXT, "CTRL_EXT"}, 102 103 /* Interrupt Registers */ 104 {E1000_ICR, "ICR"}, 105 106 /* Rx Registers */ 107 {E1000_RCTL, "RCTL"}, 108 {E1000_RDLEN, "RDLEN"}, 109 {E1000_RDH, "RDH"}, 110 {E1000_RDT, "RDT"}, 111 {E1000_RDTR, "RDTR"}, 112 {E1000_RXDCTL(0), "RXDCTL"}, 113 {E1000_ERT, "ERT"}, 114 {E1000_RDBAL, "RDBAL"}, 115 {E1000_RDBAH, "RDBAH"}, 116 {E1000_RDFH, "RDFH"}, 117 {E1000_RDFT, "RDFT"}, 118 {E1000_RDFHS, "RDFHS"}, 119 {E1000_RDFTS, "RDFTS"}, 120 {E1000_RDFPC, "RDFPC"}, 121 122 /* Tx Registers */ 123 {E1000_TCTL, "TCTL"}, 124 {E1000_TDBAL, "TDBAL"}, 125 {E1000_TDBAH, "TDBAH"}, 126 {E1000_TDLEN, "TDLEN"}, 127 {E1000_TDH, "TDH"}, 128 {E1000_TDT, "TDT"}, 129 {E1000_TIDV, "TIDV"}, 130 {E1000_TXDCTL(0), "TXDCTL"}, 131 {E1000_TADV, "TADV"}, 132 {E1000_TARC(0), "TARC"}, 133 {E1000_TDFH, "TDFH"}, 134 {E1000_TDFT, "TDFT"}, 135 {E1000_TDFHS, "TDFHS"}, 136 {E1000_TDFTS, "TDFTS"}, 137 {E1000_TDFPC, "TDFPC"}, 138 139 /* List Terminator */ 140 {} 141 }; 142 143 /* 144 * e1000_regdump - register printout routine 145 */ 146 static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo) 147 { 148 int n = 0; 149 char rname[16]; 150 u32 regs[8]; 151 152 switch (reginfo->ofs) { 153 case E1000_RXDCTL(0): 154 for (n = 0; n < 2; n++) 155 regs[n] = __er32(hw, E1000_RXDCTL(n)); 156 break; 157 case E1000_TXDCTL(0): 158 for (n = 0; n < 2; n++) 159 regs[n] = __er32(hw, E1000_TXDCTL(n)); 160 break; 161 case E1000_TARC(0): 162 for (n = 0; n < 2; n++) 163 regs[n] = __er32(hw, E1000_TARC(n)); 164 break; 165 default: 166 pr_info("%-15s %08x\n", 167 reginfo->name, __er32(hw, reginfo->ofs)); 168 return; 169 } 170 171 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]"); 172 pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]); 173 } 174 175 /* 176 * e1000e_dump - Print registers, Tx-ring and Rx-ring 177 */ 178 static void e1000e_dump(struct e1000_adapter *adapter) 179 { 180 struct net_device *netdev = adapter->netdev; 181 struct e1000_hw *hw = &adapter->hw; 182 struct e1000_reg_info *reginfo; 183 struct e1000_ring *tx_ring = adapter->tx_ring; 184 struct e1000_tx_desc *tx_desc; 185 struct my_u0 { 186 u64 a; 187 u64 b; 188 } *u0; 189 struct e1000_buffer *buffer_info; 190 struct e1000_ring *rx_ring = adapter->rx_ring; 191 union e1000_rx_desc_packet_split *rx_desc_ps; 192 union e1000_rx_desc_extended *rx_desc; 193 struct my_u1 { 194 u64 a; 195 u64 b; 196 u64 c; 197 u64 d; 198 } *u1; 199 u32 staterr; 200 int i = 0; 201 202 if (!netif_msg_hw(adapter)) 203 return; 204 205 /* Print netdevice Info */ 206 if (netdev) { 207 dev_info(&adapter->pdev->dev, "Net device Info\n"); 208 pr_info("Device Name state trans_start last_rx\n"); 209 pr_info("%-15s %016lX %016lX %016lX\n", 210 netdev->name, netdev->state, netdev->trans_start, 211 netdev->last_rx); 212 } 213 214 /* Print Registers */ 215 dev_info(&adapter->pdev->dev, "Register Dump\n"); 216 pr_info(" Register Name Value\n"); 217 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl; 218 reginfo->name; reginfo++) { 219 e1000_regdump(hw, reginfo); 220 } 221 222 /* Print Tx Ring Summary */ 223 if (!netdev || !netif_running(netdev)) 224 goto exit; 225 226 dev_info(&adapter->pdev->dev, "Tx Ring Summary\n"); 227 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n"); 228 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean]; 229 pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n", 230 0, tx_ring->next_to_use, tx_ring->next_to_clean, 231 (unsigned long long)buffer_info->dma, 232 buffer_info->length, 233 buffer_info->next_to_watch, 234 (unsigned long long)buffer_info->time_stamp); 235 236 /* Print Tx Ring */ 237 if (!netif_msg_tx_done(adapter)) 238 goto rx_ring_summary; 239 240 dev_info(&adapter->pdev->dev, "Tx Ring Dump\n"); 241 242 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended) 243 * 244 * Legacy Transmit Descriptor 245 * +--------------------------------------------------------------+ 246 * 0 | Buffer Address [63:0] (Reserved on Write Back) | 247 * +--------------------------------------------------------------+ 248 * 8 | Special | CSS | Status | CMD | CSO | Length | 249 * +--------------------------------------------------------------+ 250 * 63 48 47 36 35 32 31 24 23 16 15 0 251 * 252 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload 253 * 63 48 47 40 39 32 31 16 15 8 7 0 254 * +----------------------------------------------------------------+ 255 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS | 256 * +----------------------------------------------------------------+ 257 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN | 258 * +----------------------------------------------------------------+ 259 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0 260 * 261 * Extended Data Descriptor (DTYP=0x1) 262 * +----------------------------------------------------------------+ 263 * 0 | Buffer Address [63:0] | 264 * +----------------------------------------------------------------+ 265 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN | 266 * +----------------------------------------------------------------+ 267 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0 268 */ 269 pr_info("Tl[desc] [address 63:0 ] [SpeCssSCmCsLen] [bi->dma ] leng ntw timestamp bi->skb <-- Legacy format\n"); 270 pr_info("Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Context format\n"); 271 pr_info("Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Data format\n"); 272 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) { 273 const char *next_desc; 274 tx_desc = E1000_TX_DESC(*tx_ring, i); 275 buffer_info = &tx_ring->buffer_info[i]; 276 u0 = (struct my_u0 *)tx_desc; 277 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean) 278 next_desc = " NTC/U"; 279 else if (i == tx_ring->next_to_use) 280 next_desc = " NTU"; 281 else if (i == tx_ring->next_to_clean) 282 next_desc = " NTC"; 283 else 284 next_desc = ""; 285 pr_info("T%c[0x%03X] %016llX %016llX %016llX %04X %3X %016llX %p%s\n", 286 (!(le64_to_cpu(u0->b) & (1 << 29)) ? 'l' : 287 ((le64_to_cpu(u0->b) & (1 << 20)) ? 'd' : 'c')), 288 i, 289 (unsigned long long)le64_to_cpu(u0->a), 290 (unsigned long long)le64_to_cpu(u0->b), 291 (unsigned long long)buffer_info->dma, 292 buffer_info->length, buffer_info->next_to_watch, 293 (unsigned long long)buffer_info->time_stamp, 294 buffer_info->skb, next_desc); 295 296 if (netif_msg_pktdata(adapter) && buffer_info->dma != 0) 297 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS, 298 16, 1, phys_to_virt(buffer_info->dma), 299 buffer_info->length, true); 300 } 301 302 /* Print Rx Ring Summary */ 303 rx_ring_summary: 304 dev_info(&adapter->pdev->dev, "Rx Ring Summary\n"); 305 pr_info("Queue [NTU] [NTC]\n"); 306 pr_info(" %5d %5X %5X\n", 307 0, rx_ring->next_to_use, rx_ring->next_to_clean); 308 309 /* Print Rx Ring */ 310 if (!netif_msg_rx_status(adapter)) 311 goto exit; 312 313 dev_info(&adapter->pdev->dev, "Rx Ring Dump\n"); 314 switch (adapter->rx_ps_pages) { 315 case 1: 316 case 2: 317 case 3: 318 /* [Extended] Packet Split Receive Descriptor Format 319 * 320 * +-----------------------------------------------------+ 321 * 0 | Buffer Address 0 [63:0] | 322 * +-----------------------------------------------------+ 323 * 8 | Buffer Address 1 [63:0] | 324 * +-----------------------------------------------------+ 325 * 16 | Buffer Address 2 [63:0] | 326 * +-----------------------------------------------------+ 327 * 24 | Buffer Address 3 [63:0] | 328 * +-----------------------------------------------------+ 329 */ 330 pr_info("R [desc] [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] [bi->skb] <-- Ext Pkt Split format\n"); 331 /* [Extended] Receive Descriptor (Write-Back) Format 332 * 333 * 63 48 47 32 31 13 12 8 7 4 3 0 334 * +------------------------------------------------------+ 335 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS | 336 * | Checksum | Ident | | Queue | | Type | 337 * +------------------------------------------------------+ 338 * 8 | VLAN Tag | Length | Extended Error | Extended Status | 339 * +------------------------------------------------------+ 340 * 63 48 47 32 31 20 19 0 341 */ 342 pr_info("RWB[desc] [ck ipid mrqhsh] [vl l0 ee es] [ l3 l2 l1 hs] [reserved ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n"); 343 for (i = 0; i < rx_ring->count; i++) { 344 const char *next_desc; 345 buffer_info = &rx_ring->buffer_info[i]; 346 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i); 347 u1 = (struct my_u1 *)rx_desc_ps; 348 staterr = 349 le32_to_cpu(rx_desc_ps->wb.middle.status_error); 350 351 if (i == rx_ring->next_to_use) 352 next_desc = " NTU"; 353 else if (i == rx_ring->next_to_clean) 354 next_desc = " NTC"; 355 else 356 next_desc = ""; 357 358 if (staterr & E1000_RXD_STAT_DD) { 359 /* Descriptor Done */ 360 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX ---------------- %p%s\n", 361 "RWB", i, 362 (unsigned long long)le64_to_cpu(u1->a), 363 (unsigned long long)le64_to_cpu(u1->b), 364 (unsigned long long)le64_to_cpu(u1->c), 365 (unsigned long long)le64_to_cpu(u1->d), 366 buffer_info->skb, next_desc); 367 } else { 368 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX %016llX %p%s\n", 369 "R ", i, 370 (unsigned long long)le64_to_cpu(u1->a), 371 (unsigned long long)le64_to_cpu(u1->b), 372 (unsigned long long)le64_to_cpu(u1->c), 373 (unsigned long long)le64_to_cpu(u1->d), 374 (unsigned long long)buffer_info->dma, 375 buffer_info->skb, next_desc); 376 377 if (netif_msg_pktdata(adapter)) 378 print_hex_dump(KERN_INFO, "", 379 DUMP_PREFIX_ADDRESS, 16, 1, 380 phys_to_virt(buffer_info->dma), 381 adapter->rx_ps_bsize0, true); 382 } 383 } 384 break; 385 default: 386 case 0: 387 /* Extended Receive Descriptor (Read) Format 388 * 389 * +-----------------------------------------------------+ 390 * 0 | Buffer Address [63:0] | 391 * +-----------------------------------------------------+ 392 * 8 | Reserved | 393 * +-----------------------------------------------------+ 394 */ 395 pr_info("R [desc] [buf addr 63:0 ] [reserved 63:0 ] [bi->dma ] [bi->skb] <-- Ext (Read) format\n"); 396 /* Extended Receive Descriptor (Write-Back) Format 397 * 398 * 63 48 47 32 31 24 23 4 3 0 399 * +------------------------------------------------------+ 400 * | RSS Hash | | | | 401 * 0 +-------------------+ Rsvd | Reserved | MRQ RSS | 402 * | Packet | IP | | | Type | 403 * | Checksum | Ident | | | | 404 * +------------------------------------------------------+ 405 * 8 | VLAN Tag | Length | Extended Error | Extended Status | 406 * +------------------------------------------------------+ 407 * 63 48 47 32 31 20 19 0 408 */ 409 pr_info("RWB[desc] [cs ipid mrq] [vt ln xe xs] [bi->skb] <-- Ext (Write-Back) format\n"); 410 411 for (i = 0; i < rx_ring->count; i++) { 412 const char *next_desc; 413 414 buffer_info = &rx_ring->buffer_info[i]; 415 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); 416 u1 = (struct my_u1 *)rx_desc; 417 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 418 419 if (i == rx_ring->next_to_use) 420 next_desc = " NTU"; 421 else if (i == rx_ring->next_to_clean) 422 next_desc = " NTC"; 423 else 424 next_desc = ""; 425 426 if (staterr & E1000_RXD_STAT_DD) { 427 /* Descriptor Done */ 428 pr_info("%s[0x%03X] %016llX %016llX ---------------- %p%s\n", 429 "RWB", i, 430 (unsigned long long)le64_to_cpu(u1->a), 431 (unsigned long long)le64_to_cpu(u1->b), 432 buffer_info->skb, next_desc); 433 } else { 434 pr_info("%s[0x%03X] %016llX %016llX %016llX %p%s\n", 435 "R ", i, 436 (unsigned long long)le64_to_cpu(u1->a), 437 (unsigned long long)le64_to_cpu(u1->b), 438 (unsigned long long)buffer_info->dma, 439 buffer_info->skb, next_desc); 440 441 if (netif_msg_pktdata(adapter)) 442 print_hex_dump(KERN_INFO, "", 443 DUMP_PREFIX_ADDRESS, 16, 444 1, 445 phys_to_virt 446 (buffer_info->dma), 447 adapter->rx_buffer_len, 448 true); 449 } 450 } 451 } 452 453 exit: 454 return; 455 } 456 457 /** 458 * e1000_desc_unused - calculate if we have unused descriptors 459 **/ 460 static int e1000_desc_unused(struct e1000_ring *ring) 461 { 462 if (ring->next_to_clean > ring->next_to_use) 463 return ring->next_to_clean - ring->next_to_use - 1; 464 465 return ring->count + ring->next_to_clean - ring->next_to_use - 1; 466 } 467 468 /** 469 * e1000_receive_skb - helper function to handle Rx indications 470 * @adapter: board private structure 471 * @status: descriptor status field as written by hardware 472 * @vlan: descriptor vlan field as written by hardware (no le/be conversion) 473 * @skb: pointer to sk_buff to be indicated to stack 474 **/ 475 static void e1000_receive_skb(struct e1000_adapter *adapter, 476 struct net_device *netdev, struct sk_buff *skb, 477 u8 status, __le16 vlan) 478 { 479 u16 tag = le16_to_cpu(vlan); 480 skb->protocol = eth_type_trans(skb, netdev); 481 482 if (status & E1000_RXD_STAT_VP) 483 __vlan_hwaccel_put_tag(skb, tag); 484 485 napi_gro_receive(&adapter->napi, skb); 486 } 487 488 /** 489 * e1000_rx_checksum - Receive Checksum Offload 490 * @adapter: board private structure 491 * @status_err: receive descriptor status and error fields 492 * @csum: receive descriptor csum field 493 * @sk_buff: socket buffer with received data 494 **/ 495 static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err, 496 __le16 csum, struct sk_buff *skb) 497 { 498 u16 status = (u16)status_err; 499 u8 errors = (u8)(status_err >> 24); 500 501 skb_checksum_none_assert(skb); 502 503 /* Rx checksum disabled */ 504 if (!(adapter->netdev->features & NETIF_F_RXCSUM)) 505 return; 506 507 /* Ignore Checksum bit is set */ 508 if (status & E1000_RXD_STAT_IXSM) 509 return; 510 511 /* TCP/UDP checksum error bit is set */ 512 if (errors & E1000_RXD_ERR_TCPE) { 513 /* let the stack verify checksum errors */ 514 adapter->hw_csum_err++; 515 return; 516 } 517 518 /* TCP/UDP Checksum has not been calculated */ 519 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))) 520 return; 521 522 /* It must be a TCP or UDP packet with a valid checksum */ 523 if (status & E1000_RXD_STAT_TCPCS) { 524 /* TCP checksum is good */ 525 skb->ip_summed = CHECKSUM_UNNECESSARY; 526 } else { 527 /* 528 * IP fragment with UDP payload 529 * Hardware complements the payload checksum, so we undo it 530 * and then put the value in host order for further stack use. 531 */ 532 __sum16 sum = (__force __sum16)swab16((__force u16)csum); 533 skb->csum = csum_unfold(~sum); 534 skb->ip_summed = CHECKSUM_COMPLETE; 535 } 536 adapter->hw_csum_good++; 537 } 538 539 /** 540 * e1000e_update_tail_wa - helper function for e1000e_update_[rt]dt_wa() 541 * @hw: pointer to the HW structure 542 * @tail: address of tail descriptor register 543 * @i: value to write to tail descriptor register 544 * 545 * When updating the tail register, the ME could be accessing Host CSR 546 * registers at the same time. Normally, this is handled in h/w by an 547 * arbiter but on some parts there is a bug that acknowledges Host accesses 548 * later than it should which could result in the descriptor register to 549 * have an incorrect value. Workaround this by checking the FWSM register 550 * which has bit 24 set while ME is accessing Host CSR registers, wait 551 * if it is set and try again a number of times. 552 **/ 553 static inline s32 e1000e_update_tail_wa(struct e1000_hw *hw, void __iomem *tail, 554 unsigned int i) 555 { 556 unsigned int j = 0; 557 558 while ((j++ < E1000_ICH_FWSM_PCIM2PCI_COUNT) && 559 (er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI)) 560 udelay(50); 561 562 writel(i, tail); 563 564 if ((j == E1000_ICH_FWSM_PCIM2PCI_COUNT) && (i != readl(tail))) 565 return E1000_ERR_SWFW_SYNC; 566 567 return 0; 568 } 569 570 static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i) 571 { 572 struct e1000_adapter *adapter = rx_ring->adapter; 573 struct e1000_hw *hw = &adapter->hw; 574 575 if (e1000e_update_tail_wa(hw, rx_ring->tail, i)) { 576 u32 rctl = er32(RCTL); 577 ew32(RCTL, rctl & ~E1000_RCTL_EN); 578 e_err("ME firmware caused invalid RDT - resetting\n"); 579 schedule_work(&adapter->reset_task); 580 } 581 } 582 583 static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i) 584 { 585 struct e1000_adapter *adapter = tx_ring->adapter; 586 struct e1000_hw *hw = &adapter->hw; 587 588 if (e1000e_update_tail_wa(hw, tx_ring->tail, i)) { 589 u32 tctl = er32(TCTL); 590 ew32(TCTL, tctl & ~E1000_TCTL_EN); 591 e_err("ME firmware caused invalid TDT - resetting\n"); 592 schedule_work(&adapter->reset_task); 593 } 594 } 595 596 /** 597 * e1000_alloc_rx_buffers - Replace used receive buffers 598 * @rx_ring: Rx descriptor ring 599 **/ 600 static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring, 601 int cleaned_count, gfp_t gfp) 602 { 603 struct e1000_adapter *adapter = rx_ring->adapter; 604 struct net_device *netdev = adapter->netdev; 605 struct pci_dev *pdev = adapter->pdev; 606 union e1000_rx_desc_extended *rx_desc; 607 struct e1000_buffer *buffer_info; 608 struct sk_buff *skb; 609 unsigned int i; 610 unsigned int bufsz = adapter->rx_buffer_len; 611 612 i = rx_ring->next_to_use; 613 buffer_info = &rx_ring->buffer_info[i]; 614 615 while (cleaned_count--) { 616 skb = buffer_info->skb; 617 if (skb) { 618 skb_trim(skb, 0); 619 goto map_skb; 620 } 621 622 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp); 623 if (!skb) { 624 /* Better luck next round */ 625 adapter->alloc_rx_buff_failed++; 626 break; 627 } 628 629 buffer_info->skb = skb; 630 map_skb: 631 buffer_info->dma = dma_map_single(&pdev->dev, skb->data, 632 adapter->rx_buffer_len, 633 DMA_FROM_DEVICE); 634 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) { 635 dev_err(&pdev->dev, "Rx DMA map failed\n"); 636 adapter->rx_dma_failed++; 637 break; 638 } 639 640 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); 641 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma); 642 643 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) { 644 /* 645 * Force memory writes to complete before letting h/w 646 * know there are new descriptors to fetch. (Only 647 * applicable for weak-ordered memory model archs, 648 * such as IA-64). 649 */ 650 wmb(); 651 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) 652 e1000e_update_rdt_wa(rx_ring, i); 653 else 654 writel(i, rx_ring->tail); 655 } 656 i++; 657 if (i == rx_ring->count) 658 i = 0; 659 buffer_info = &rx_ring->buffer_info[i]; 660 } 661 662 rx_ring->next_to_use = i; 663 } 664 665 /** 666 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split 667 * @rx_ring: Rx descriptor ring 668 **/ 669 static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring, 670 int cleaned_count, gfp_t gfp) 671 { 672 struct e1000_adapter *adapter = rx_ring->adapter; 673 struct net_device *netdev = adapter->netdev; 674 struct pci_dev *pdev = adapter->pdev; 675 union e1000_rx_desc_packet_split *rx_desc; 676 struct e1000_buffer *buffer_info; 677 struct e1000_ps_page *ps_page; 678 struct sk_buff *skb; 679 unsigned int i, j; 680 681 i = rx_ring->next_to_use; 682 buffer_info = &rx_ring->buffer_info[i]; 683 684 while (cleaned_count--) { 685 rx_desc = E1000_RX_DESC_PS(*rx_ring, i); 686 687 for (j = 0; j < PS_PAGE_BUFFERS; j++) { 688 ps_page = &buffer_info->ps_pages[j]; 689 if (j >= adapter->rx_ps_pages) { 690 /* all unused desc entries get hw null ptr */ 691 rx_desc->read.buffer_addr[j + 1] = 692 ~cpu_to_le64(0); 693 continue; 694 } 695 if (!ps_page->page) { 696 ps_page->page = alloc_page(gfp); 697 if (!ps_page->page) { 698 adapter->alloc_rx_buff_failed++; 699 goto no_buffers; 700 } 701 ps_page->dma = dma_map_page(&pdev->dev, 702 ps_page->page, 703 0, PAGE_SIZE, 704 DMA_FROM_DEVICE); 705 if (dma_mapping_error(&pdev->dev, 706 ps_page->dma)) { 707 dev_err(&adapter->pdev->dev, 708 "Rx DMA page map failed\n"); 709 adapter->rx_dma_failed++; 710 goto no_buffers; 711 } 712 } 713 /* 714 * Refresh the desc even if buffer_addrs 715 * didn't change because each write-back 716 * erases this info. 717 */ 718 rx_desc->read.buffer_addr[j + 1] = 719 cpu_to_le64(ps_page->dma); 720 } 721 722 skb = __netdev_alloc_skb_ip_align(netdev, 723 adapter->rx_ps_bsize0, 724 gfp); 725 726 if (!skb) { 727 adapter->alloc_rx_buff_failed++; 728 break; 729 } 730 731 buffer_info->skb = skb; 732 buffer_info->dma = dma_map_single(&pdev->dev, skb->data, 733 adapter->rx_ps_bsize0, 734 DMA_FROM_DEVICE); 735 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) { 736 dev_err(&pdev->dev, "Rx DMA map failed\n"); 737 adapter->rx_dma_failed++; 738 /* cleanup skb */ 739 dev_kfree_skb_any(skb); 740 buffer_info->skb = NULL; 741 break; 742 } 743 744 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma); 745 746 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) { 747 /* 748 * Force memory writes to complete before letting h/w 749 * know there are new descriptors to fetch. (Only 750 * applicable for weak-ordered memory model archs, 751 * such as IA-64). 752 */ 753 wmb(); 754 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) 755 e1000e_update_rdt_wa(rx_ring, i << 1); 756 else 757 writel(i << 1, rx_ring->tail); 758 } 759 760 i++; 761 if (i == rx_ring->count) 762 i = 0; 763 buffer_info = &rx_ring->buffer_info[i]; 764 } 765 766 no_buffers: 767 rx_ring->next_to_use = i; 768 } 769 770 /** 771 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers 772 * @rx_ring: Rx descriptor ring 773 * @cleaned_count: number of buffers to allocate this pass 774 **/ 775 776 static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring, 777 int cleaned_count, gfp_t gfp) 778 { 779 struct e1000_adapter *adapter = rx_ring->adapter; 780 struct net_device *netdev = adapter->netdev; 781 struct pci_dev *pdev = adapter->pdev; 782 union e1000_rx_desc_extended *rx_desc; 783 struct e1000_buffer *buffer_info; 784 struct sk_buff *skb; 785 unsigned int i; 786 unsigned int bufsz = 256 - 16 /* for skb_reserve */; 787 788 i = rx_ring->next_to_use; 789 buffer_info = &rx_ring->buffer_info[i]; 790 791 while (cleaned_count--) { 792 skb = buffer_info->skb; 793 if (skb) { 794 skb_trim(skb, 0); 795 goto check_page; 796 } 797 798 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp); 799 if (unlikely(!skb)) { 800 /* Better luck next round */ 801 adapter->alloc_rx_buff_failed++; 802 break; 803 } 804 805 buffer_info->skb = skb; 806 check_page: 807 /* allocate a new page if necessary */ 808 if (!buffer_info->page) { 809 buffer_info->page = alloc_page(gfp); 810 if (unlikely(!buffer_info->page)) { 811 adapter->alloc_rx_buff_failed++; 812 break; 813 } 814 } 815 816 if (!buffer_info->dma) 817 buffer_info->dma = dma_map_page(&pdev->dev, 818 buffer_info->page, 0, 819 PAGE_SIZE, 820 DMA_FROM_DEVICE); 821 822 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); 823 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma); 824 825 if (unlikely(++i == rx_ring->count)) 826 i = 0; 827 buffer_info = &rx_ring->buffer_info[i]; 828 } 829 830 if (likely(rx_ring->next_to_use != i)) { 831 rx_ring->next_to_use = i; 832 if (unlikely(i-- == 0)) 833 i = (rx_ring->count - 1); 834 835 /* Force memory writes to complete before letting h/w 836 * know there are new descriptors to fetch. (Only 837 * applicable for weak-ordered memory model archs, 838 * such as IA-64). */ 839 wmb(); 840 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) 841 e1000e_update_rdt_wa(rx_ring, i); 842 else 843 writel(i, rx_ring->tail); 844 } 845 } 846 847 static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss, 848 struct sk_buff *skb) 849 { 850 if (netdev->features & NETIF_F_RXHASH) 851 skb->rxhash = le32_to_cpu(rss); 852 } 853 854 /** 855 * e1000_clean_rx_irq - Send received data up the network stack 856 * @rx_ring: Rx descriptor ring 857 * 858 * the return value indicates whether actual cleaning was done, there 859 * is no guarantee that everything was cleaned 860 **/ 861 static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done, 862 int work_to_do) 863 { 864 struct e1000_adapter *adapter = rx_ring->adapter; 865 struct net_device *netdev = adapter->netdev; 866 struct pci_dev *pdev = adapter->pdev; 867 struct e1000_hw *hw = &adapter->hw; 868 union e1000_rx_desc_extended *rx_desc, *next_rxd; 869 struct e1000_buffer *buffer_info, *next_buffer; 870 u32 length, staterr; 871 unsigned int i; 872 int cleaned_count = 0; 873 bool cleaned = false; 874 unsigned int total_rx_bytes = 0, total_rx_packets = 0; 875 876 i = rx_ring->next_to_clean; 877 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); 878 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 879 buffer_info = &rx_ring->buffer_info[i]; 880 881 while (staterr & E1000_RXD_STAT_DD) { 882 struct sk_buff *skb; 883 884 if (*work_done >= work_to_do) 885 break; 886 (*work_done)++; 887 rmb(); /* read descriptor and rx_buffer_info after status DD */ 888 889 skb = buffer_info->skb; 890 buffer_info->skb = NULL; 891 892 prefetch(skb->data - NET_IP_ALIGN); 893 894 i++; 895 if (i == rx_ring->count) 896 i = 0; 897 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i); 898 prefetch(next_rxd); 899 900 next_buffer = &rx_ring->buffer_info[i]; 901 902 cleaned = true; 903 cleaned_count++; 904 dma_unmap_single(&pdev->dev, 905 buffer_info->dma, 906 adapter->rx_buffer_len, 907 DMA_FROM_DEVICE); 908 buffer_info->dma = 0; 909 910 length = le16_to_cpu(rx_desc->wb.upper.length); 911 912 /* 913 * !EOP means multiple descriptors were used to store a single 914 * packet, if that's the case we need to toss it. In fact, we 915 * need to toss every packet with the EOP bit clear and the 916 * next frame that _does_ have the EOP bit set, as it is by 917 * definition only a frame fragment 918 */ 919 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) 920 adapter->flags2 |= FLAG2_IS_DISCARDING; 921 922 if (adapter->flags2 & FLAG2_IS_DISCARDING) { 923 /* All receives must fit into a single buffer */ 924 e_dbg("Receive packet consumed multiple buffers\n"); 925 /* recycle */ 926 buffer_info->skb = skb; 927 if (staterr & E1000_RXD_STAT_EOP) 928 adapter->flags2 &= ~FLAG2_IS_DISCARDING; 929 goto next_desc; 930 } 931 932 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) { 933 /* recycle */ 934 buffer_info->skb = skb; 935 goto next_desc; 936 } 937 938 /* adjust length to remove Ethernet CRC */ 939 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) 940 length -= 4; 941 942 total_rx_bytes += length; 943 total_rx_packets++; 944 945 /* 946 * code added for copybreak, this should improve 947 * performance for small packets with large amounts 948 * of reassembly being done in the stack 949 */ 950 if (length < copybreak) { 951 struct sk_buff *new_skb = 952 netdev_alloc_skb_ip_align(netdev, length); 953 if (new_skb) { 954 skb_copy_to_linear_data_offset(new_skb, 955 -NET_IP_ALIGN, 956 (skb->data - 957 NET_IP_ALIGN), 958 (length + 959 NET_IP_ALIGN)); 960 /* save the skb in buffer_info as good */ 961 buffer_info->skb = skb; 962 skb = new_skb; 963 } 964 /* else just continue with the old one */ 965 } 966 /* end copybreak code */ 967 skb_put(skb, length); 968 969 /* Receive Checksum Offload */ 970 e1000_rx_checksum(adapter, staterr, 971 rx_desc->wb.lower.hi_dword.csum_ip.csum, skb); 972 973 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb); 974 975 e1000_receive_skb(adapter, netdev, skb, staterr, 976 rx_desc->wb.upper.vlan); 977 978 next_desc: 979 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF); 980 981 /* return some buffers to hardware, one at a time is too slow */ 982 if (cleaned_count >= E1000_RX_BUFFER_WRITE) { 983 adapter->alloc_rx_buf(rx_ring, cleaned_count, 984 GFP_ATOMIC); 985 cleaned_count = 0; 986 } 987 988 /* use prefetched values */ 989 rx_desc = next_rxd; 990 buffer_info = next_buffer; 991 992 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 993 } 994 rx_ring->next_to_clean = i; 995 996 cleaned_count = e1000_desc_unused(rx_ring); 997 if (cleaned_count) 998 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC); 999 1000 adapter->total_rx_bytes += total_rx_bytes; 1001 adapter->total_rx_packets += total_rx_packets; 1002 return cleaned; 1003 } 1004 1005 static void e1000_put_txbuf(struct e1000_ring *tx_ring, 1006 struct e1000_buffer *buffer_info) 1007 { 1008 struct e1000_adapter *adapter = tx_ring->adapter; 1009 1010 if (buffer_info->dma) { 1011 if (buffer_info->mapped_as_page) 1012 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma, 1013 buffer_info->length, DMA_TO_DEVICE); 1014 else 1015 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma, 1016 buffer_info->length, DMA_TO_DEVICE); 1017 buffer_info->dma = 0; 1018 } 1019 if (buffer_info->skb) { 1020 dev_kfree_skb_any(buffer_info->skb); 1021 buffer_info->skb = NULL; 1022 } 1023 buffer_info->time_stamp = 0; 1024 } 1025 1026 static void e1000_print_hw_hang(struct work_struct *work) 1027 { 1028 struct e1000_adapter *adapter = container_of(work, 1029 struct e1000_adapter, 1030 print_hang_task); 1031 struct net_device *netdev = adapter->netdev; 1032 struct e1000_ring *tx_ring = adapter->tx_ring; 1033 unsigned int i = tx_ring->next_to_clean; 1034 unsigned int eop = tx_ring->buffer_info[i].next_to_watch; 1035 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop); 1036 struct e1000_hw *hw = &adapter->hw; 1037 u16 phy_status, phy_1000t_status, phy_ext_status; 1038 u16 pci_status; 1039 1040 if (test_bit(__E1000_DOWN, &adapter->state)) 1041 return; 1042 1043 if (!adapter->tx_hang_recheck && 1044 (adapter->flags2 & FLAG2_DMA_BURST)) { 1045 /* May be block on write-back, flush and detect again 1046 * flush pending descriptor writebacks to memory 1047 */ 1048 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); 1049 /* execute the writes immediately */ 1050 e1e_flush(); 1051 adapter->tx_hang_recheck = true; 1052 return; 1053 } 1054 /* Real hang detected */ 1055 adapter->tx_hang_recheck = false; 1056 netif_stop_queue(netdev); 1057 1058 e1e_rphy(hw, PHY_STATUS, &phy_status); 1059 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status); 1060 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status); 1061 1062 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status); 1063 1064 /* detected Hardware unit hang */ 1065 e_err("Detected Hardware Unit Hang:\n" 1066 " TDH <%x>\n" 1067 " TDT <%x>\n" 1068 " next_to_use <%x>\n" 1069 " next_to_clean <%x>\n" 1070 "buffer_info[next_to_clean]:\n" 1071 " time_stamp <%lx>\n" 1072 " next_to_watch <%x>\n" 1073 " jiffies <%lx>\n" 1074 " next_to_watch.status <%x>\n" 1075 "MAC Status <%x>\n" 1076 "PHY Status <%x>\n" 1077 "PHY 1000BASE-T Status <%x>\n" 1078 "PHY Extended Status <%x>\n" 1079 "PCI Status <%x>\n", 1080 readl(tx_ring->head), 1081 readl(tx_ring->tail), 1082 tx_ring->next_to_use, 1083 tx_ring->next_to_clean, 1084 tx_ring->buffer_info[eop].time_stamp, 1085 eop, 1086 jiffies, 1087 eop_desc->upper.fields.status, 1088 er32(STATUS), 1089 phy_status, 1090 phy_1000t_status, 1091 phy_ext_status, 1092 pci_status); 1093 } 1094 1095 /** 1096 * e1000_clean_tx_irq - Reclaim resources after transmit completes 1097 * @tx_ring: Tx descriptor ring 1098 * 1099 * the return value indicates whether actual cleaning was done, there 1100 * is no guarantee that everything was cleaned 1101 **/ 1102 static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring) 1103 { 1104 struct e1000_adapter *adapter = tx_ring->adapter; 1105 struct net_device *netdev = adapter->netdev; 1106 struct e1000_hw *hw = &adapter->hw; 1107 struct e1000_tx_desc *tx_desc, *eop_desc; 1108 struct e1000_buffer *buffer_info; 1109 unsigned int i, eop; 1110 unsigned int count = 0; 1111 unsigned int total_tx_bytes = 0, total_tx_packets = 0; 1112 unsigned int bytes_compl = 0, pkts_compl = 0; 1113 1114 i = tx_ring->next_to_clean; 1115 eop = tx_ring->buffer_info[i].next_to_watch; 1116 eop_desc = E1000_TX_DESC(*tx_ring, eop); 1117 1118 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) && 1119 (count < tx_ring->count)) { 1120 bool cleaned = false; 1121 rmb(); /* read buffer_info after eop_desc */ 1122 for (; !cleaned; count++) { 1123 tx_desc = E1000_TX_DESC(*tx_ring, i); 1124 buffer_info = &tx_ring->buffer_info[i]; 1125 cleaned = (i == eop); 1126 1127 if (cleaned) { 1128 total_tx_packets += buffer_info->segs; 1129 total_tx_bytes += buffer_info->bytecount; 1130 if (buffer_info->skb) { 1131 bytes_compl += buffer_info->skb->len; 1132 pkts_compl++; 1133 } 1134 } 1135 1136 e1000_put_txbuf(tx_ring, buffer_info); 1137 tx_desc->upper.data = 0; 1138 1139 i++; 1140 if (i == tx_ring->count) 1141 i = 0; 1142 } 1143 1144 if (i == tx_ring->next_to_use) 1145 break; 1146 eop = tx_ring->buffer_info[i].next_to_watch; 1147 eop_desc = E1000_TX_DESC(*tx_ring, eop); 1148 } 1149 1150 tx_ring->next_to_clean = i; 1151 1152 netdev_completed_queue(netdev, pkts_compl, bytes_compl); 1153 1154 #define TX_WAKE_THRESHOLD 32 1155 if (count && netif_carrier_ok(netdev) && 1156 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) { 1157 /* Make sure that anybody stopping the queue after this 1158 * sees the new next_to_clean. 1159 */ 1160 smp_mb(); 1161 1162 if (netif_queue_stopped(netdev) && 1163 !(test_bit(__E1000_DOWN, &adapter->state))) { 1164 netif_wake_queue(netdev); 1165 ++adapter->restart_queue; 1166 } 1167 } 1168 1169 if (adapter->detect_tx_hung) { 1170 /* 1171 * Detect a transmit hang in hardware, this serializes the 1172 * check with the clearing of time_stamp and movement of i 1173 */ 1174 adapter->detect_tx_hung = false; 1175 if (tx_ring->buffer_info[i].time_stamp && 1176 time_after(jiffies, tx_ring->buffer_info[i].time_stamp 1177 + (adapter->tx_timeout_factor * HZ)) && 1178 !(er32(STATUS) & E1000_STATUS_TXOFF)) 1179 schedule_work(&adapter->print_hang_task); 1180 else 1181 adapter->tx_hang_recheck = false; 1182 } 1183 adapter->total_tx_bytes += total_tx_bytes; 1184 adapter->total_tx_packets += total_tx_packets; 1185 return count < tx_ring->count; 1186 } 1187 1188 /** 1189 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split 1190 * @rx_ring: Rx descriptor ring 1191 * 1192 * the return value indicates whether actual cleaning was done, there 1193 * is no guarantee that everything was cleaned 1194 **/ 1195 static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done, 1196 int work_to_do) 1197 { 1198 struct e1000_adapter *adapter = rx_ring->adapter; 1199 struct e1000_hw *hw = &adapter->hw; 1200 union e1000_rx_desc_packet_split *rx_desc, *next_rxd; 1201 struct net_device *netdev = adapter->netdev; 1202 struct pci_dev *pdev = adapter->pdev; 1203 struct e1000_buffer *buffer_info, *next_buffer; 1204 struct e1000_ps_page *ps_page; 1205 struct sk_buff *skb; 1206 unsigned int i, j; 1207 u32 length, staterr; 1208 int cleaned_count = 0; 1209 bool cleaned = false; 1210 unsigned int total_rx_bytes = 0, total_rx_packets = 0; 1211 1212 i = rx_ring->next_to_clean; 1213 rx_desc = E1000_RX_DESC_PS(*rx_ring, i); 1214 staterr = le32_to_cpu(rx_desc->wb.middle.status_error); 1215 buffer_info = &rx_ring->buffer_info[i]; 1216 1217 while (staterr & E1000_RXD_STAT_DD) { 1218 if (*work_done >= work_to_do) 1219 break; 1220 (*work_done)++; 1221 skb = buffer_info->skb; 1222 rmb(); /* read descriptor and rx_buffer_info after status DD */ 1223 1224 /* in the packet split case this is header only */ 1225 prefetch(skb->data - NET_IP_ALIGN); 1226 1227 i++; 1228 if (i == rx_ring->count) 1229 i = 0; 1230 next_rxd = E1000_RX_DESC_PS(*rx_ring, i); 1231 prefetch(next_rxd); 1232 1233 next_buffer = &rx_ring->buffer_info[i]; 1234 1235 cleaned = true; 1236 cleaned_count++; 1237 dma_unmap_single(&pdev->dev, buffer_info->dma, 1238 adapter->rx_ps_bsize0, DMA_FROM_DEVICE); 1239 buffer_info->dma = 0; 1240 1241 /* see !EOP comment in other Rx routine */ 1242 if (!(staterr & E1000_RXD_STAT_EOP)) 1243 adapter->flags2 |= FLAG2_IS_DISCARDING; 1244 1245 if (adapter->flags2 & FLAG2_IS_DISCARDING) { 1246 e_dbg("Packet Split buffers didn't pick up the full packet\n"); 1247 dev_kfree_skb_irq(skb); 1248 if (staterr & E1000_RXD_STAT_EOP) 1249 adapter->flags2 &= ~FLAG2_IS_DISCARDING; 1250 goto next_desc; 1251 } 1252 1253 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) { 1254 dev_kfree_skb_irq(skb); 1255 goto next_desc; 1256 } 1257 1258 length = le16_to_cpu(rx_desc->wb.middle.length0); 1259 1260 if (!length) { 1261 e_dbg("Last part of the packet spanning multiple descriptors\n"); 1262 dev_kfree_skb_irq(skb); 1263 goto next_desc; 1264 } 1265 1266 /* Good Receive */ 1267 skb_put(skb, length); 1268 1269 { 1270 /* 1271 * this looks ugly, but it seems compiler issues make it 1272 * more efficient than reusing j 1273 */ 1274 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]); 1275 1276 /* 1277 * page alloc/put takes too long and effects small packet 1278 * throughput, so unsplit small packets and save the alloc/put 1279 * only valid in softirq (napi) context to call kmap_* 1280 */ 1281 if (l1 && (l1 <= copybreak) && 1282 ((length + l1) <= adapter->rx_ps_bsize0)) { 1283 u8 *vaddr; 1284 1285 ps_page = &buffer_info->ps_pages[0]; 1286 1287 /* 1288 * there is no documentation about how to call 1289 * kmap_atomic, so we can't hold the mapping 1290 * very long 1291 */ 1292 dma_sync_single_for_cpu(&pdev->dev, ps_page->dma, 1293 PAGE_SIZE, DMA_FROM_DEVICE); 1294 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ); 1295 memcpy(skb_tail_pointer(skb), vaddr, l1); 1296 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ); 1297 dma_sync_single_for_device(&pdev->dev, ps_page->dma, 1298 PAGE_SIZE, DMA_FROM_DEVICE); 1299 1300 /* remove the CRC */ 1301 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) 1302 l1 -= 4; 1303 1304 skb_put(skb, l1); 1305 goto copydone; 1306 } /* if */ 1307 } 1308 1309 for (j = 0; j < PS_PAGE_BUFFERS; j++) { 1310 length = le16_to_cpu(rx_desc->wb.upper.length[j]); 1311 if (!length) 1312 break; 1313 1314 ps_page = &buffer_info->ps_pages[j]; 1315 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE, 1316 DMA_FROM_DEVICE); 1317 ps_page->dma = 0; 1318 skb_fill_page_desc(skb, j, ps_page->page, 0, length); 1319 ps_page->page = NULL; 1320 skb->len += length; 1321 skb->data_len += length; 1322 skb->truesize += PAGE_SIZE; 1323 } 1324 1325 /* strip the ethernet crc, problem is we're using pages now so 1326 * this whole operation can get a little cpu intensive 1327 */ 1328 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) 1329 pskb_trim(skb, skb->len - 4); 1330 1331 copydone: 1332 total_rx_bytes += skb->len; 1333 total_rx_packets++; 1334 1335 e1000_rx_checksum(adapter, staterr, 1336 rx_desc->wb.lower.hi_dword.csum_ip.csum, skb); 1337 1338 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb); 1339 1340 if (rx_desc->wb.upper.header_status & 1341 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)) 1342 adapter->rx_hdr_split++; 1343 1344 e1000_receive_skb(adapter, netdev, skb, 1345 staterr, rx_desc->wb.middle.vlan); 1346 1347 next_desc: 1348 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF); 1349 buffer_info->skb = NULL; 1350 1351 /* return some buffers to hardware, one at a time is too slow */ 1352 if (cleaned_count >= E1000_RX_BUFFER_WRITE) { 1353 adapter->alloc_rx_buf(rx_ring, cleaned_count, 1354 GFP_ATOMIC); 1355 cleaned_count = 0; 1356 } 1357 1358 /* use prefetched values */ 1359 rx_desc = next_rxd; 1360 buffer_info = next_buffer; 1361 1362 staterr = le32_to_cpu(rx_desc->wb.middle.status_error); 1363 } 1364 rx_ring->next_to_clean = i; 1365 1366 cleaned_count = e1000_desc_unused(rx_ring); 1367 if (cleaned_count) 1368 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC); 1369 1370 adapter->total_rx_bytes += total_rx_bytes; 1371 adapter->total_rx_packets += total_rx_packets; 1372 return cleaned; 1373 } 1374 1375 /** 1376 * e1000_consume_page - helper function 1377 **/ 1378 static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb, 1379 u16 length) 1380 { 1381 bi->page = NULL; 1382 skb->len += length; 1383 skb->data_len += length; 1384 skb->truesize += PAGE_SIZE; 1385 } 1386 1387 /** 1388 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy 1389 * @adapter: board private structure 1390 * 1391 * the return value indicates whether actual cleaning was done, there 1392 * is no guarantee that everything was cleaned 1393 **/ 1394 static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done, 1395 int work_to_do) 1396 { 1397 struct e1000_adapter *adapter = rx_ring->adapter; 1398 struct net_device *netdev = adapter->netdev; 1399 struct pci_dev *pdev = adapter->pdev; 1400 union e1000_rx_desc_extended *rx_desc, *next_rxd; 1401 struct e1000_buffer *buffer_info, *next_buffer; 1402 u32 length, staterr; 1403 unsigned int i; 1404 int cleaned_count = 0; 1405 bool cleaned = false; 1406 unsigned int total_rx_bytes=0, total_rx_packets=0; 1407 1408 i = rx_ring->next_to_clean; 1409 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); 1410 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 1411 buffer_info = &rx_ring->buffer_info[i]; 1412 1413 while (staterr & E1000_RXD_STAT_DD) { 1414 struct sk_buff *skb; 1415 1416 if (*work_done >= work_to_do) 1417 break; 1418 (*work_done)++; 1419 rmb(); /* read descriptor and rx_buffer_info after status DD */ 1420 1421 skb = buffer_info->skb; 1422 buffer_info->skb = NULL; 1423 1424 ++i; 1425 if (i == rx_ring->count) 1426 i = 0; 1427 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i); 1428 prefetch(next_rxd); 1429 1430 next_buffer = &rx_ring->buffer_info[i]; 1431 1432 cleaned = true; 1433 cleaned_count++; 1434 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE, 1435 DMA_FROM_DEVICE); 1436 buffer_info->dma = 0; 1437 1438 length = le16_to_cpu(rx_desc->wb.upper.length); 1439 1440 /* errors is only valid for DD + EOP descriptors */ 1441 if (unlikely((staterr & E1000_RXD_STAT_EOP) && 1442 (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK))) { 1443 /* recycle both page and skb */ 1444 buffer_info->skb = skb; 1445 /* an error means any chain goes out the window too */ 1446 if (rx_ring->rx_skb_top) 1447 dev_kfree_skb_irq(rx_ring->rx_skb_top); 1448 rx_ring->rx_skb_top = NULL; 1449 goto next_desc; 1450 } 1451 1452 #define rxtop (rx_ring->rx_skb_top) 1453 if (!(staterr & E1000_RXD_STAT_EOP)) { 1454 /* this descriptor is only the beginning (or middle) */ 1455 if (!rxtop) { 1456 /* this is the beginning of a chain */ 1457 rxtop = skb; 1458 skb_fill_page_desc(rxtop, 0, buffer_info->page, 1459 0, length); 1460 } else { 1461 /* this is the middle of a chain */ 1462 skb_fill_page_desc(rxtop, 1463 skb_shinfo(rxtop)->nr_frags, 1464 buffer_info->page, 0, length); 1465 /* re-use the skb, only consumed the page */ 1466 buffer_info->skb = skb; 1467 } 1468 e1000_consume_page(buffer_info, rxtop, length); 1469 goto next_desc; 1470 } else { 1471 if (rxtop) { 1472 /* end of the chain */ 1473 skb_fill_page_desc(rxtop, 1474 skb_shinfo(rxtop)->nr_frags, 1475 buffer_info->page, 0, length); 1476 /* re-use the current skb, we only consumed the 1477 * page */ 1478 buffer_info->skb = skb; 1479 skb = rxtop; 1480 rxtop = NULL; 1481 e1000_consume_page(buffer_info, skb, length); 1482 } else { 1483 /* no chain, got EOP, this buf is the packet 1484 * copybreak to save the put_page/alloc_page */ 1485 if (length <= copybreak && 1486 skb_tailroom(skb) >= length) { 1487 u8 *vaddr; 1488 vaddr = kmap_atomic(buffer_info->page, 1489 KM_SKB_DATA_SOFTIRQ); 1490 memcpy(skb_tail_pointer(skb), vaddr, 1491 length); 1492 kunmap_atomic(vaddr, 1493 KM_SKB_DATA_SOFTIRQ); 1494 /* re-use the page, so don't erase 1495 * buffer_info->page */ 1496 skb_put(skb, length); 1497 } else { 1498 skb_fill_page_desc(skb, 0, 1499 buffer_info->page, 0, 1500 length); 1501 e1000_consume_page(buffer_info, skb, 1502 length); 1503 } 1504 } 1505 } 1506 1507 /* Receive Checksum Offload XXX recompute due to CRC strip? */ 1508 e1000_rx_checksum(adapter, staterr, 1509 rx_desc->wb.lower.hi_dword.csum_ip.csum, skb); 1510 1511 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb); 1512 1513 /* probably a little skewed due to removing CRC */ 1514 total_rx_bytes += skb->len; 1515 total_rx_packets++; 1516 1517 /* eth type trans needs skb->data to point to something */ 1518 if (!pskb_may_pull(skb, ETH_HLEN)) { 1519 e_err("pskb_may_pull failed.\n"); 1520 dev_kfree_skb_irq(skb); 1521 goto next_desc; 1522 } 1523 1524 e1000_receive_skb(adapter, netdev, skb, staterr, 1525 rx_desc->wb.upper.vlan); 1526 1527 next_desc: 1528 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF); 1529 1530 /* return some buffers to hardware, one at a time is too slow */ 1531 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) { 1532 adapter->alloc_rx_buf(rx_ring, cleaned_count, 1533 GFP_ATOMIC); 1534 cleaned_count = 0; 1535 } 1536 1537 /* use prefetched values */ 1538 rx_desc = next_rxd; 1539 buffer_info = next_buffer; 1540 1541 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 1542 } 1543 rx_ring->next_to_clean = i; 1544 1545 cleaned_count = e1000_desc_unused(rx_ring); 1546 if (cleaned_count) 1547 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC); 1548 1549 adapter->total_rx_bytes += total_rx_bytes; 1550 adapter->total_rx_packets += total_rx_packets; 1551 return cleaned; 1552 } 1553 1554 /** 1555 * e1000_clean_rx_ring - Free Rx Buffers per Queue 1556 * @rx_ring: Rx descriptor ring 1557 **/ 1558 static void e1000_clean_rx_ring(struct e1000_ring *rx_ring) 1559 { 1560 struct e1000_adapter *adapter = rx_ring->adapter; 1561 struct e1000_buffer *buffer_info; 1562 struct e1000_ps_page *ps_page; 1563 struct pci_dev *pdev = adapter->pdev; 1564 unsigned int i, j; 1565 1566 /* Free all the Rx ring sk_buffs */ 1567 for (i = 0; i < rx_ring->count; i++) { 1568 buffer_info = &rx_ring->buffer_info[i]; 1569 if (buffer_info->dma) { 1570 if (adapter->clean_rx == e1000_clean_rx_irq) 1571 dma_unmap_single(&pdev->dev, buffer_info->dma, 1572 adapter->rx_buffer_len, 1573 DMA_FROM_DEVICE); 1574 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq) 1575 dma_unmap_page(&pdev->dev, buffer_info->dma, 1576 PAGE_SIZE, 1577 DMA_FROM_DEVICE); 1578 else if (adapter->clean_rx == e1000_clean_rx_irq_ps) 1579 dma_unmap_single(&pdev->dev, buffer_info->dma, 1580 adapter->rx_ps_bsize0, 1581 DMA_FROM_DEVICE); 1582 buffer_info->dma = 0; 1583 } 1584 1585 if (buffer_info->page) { 1586 put_page(buffer_info->page); 1587 buffer_info->page = NULL; 1588 } 1589 1590 if (buffer_info->skb) { 1591 dev_kfree_skb(buffer_info->skb); 1592 buffer_info->skb = NULL; 1593 } 1594 1595 for (j = 0; j < PS_PAGE_BUFFERS; j++) { 1596 ps_page = &buffer_info->ps_pages[j]; 1597 if (!ps_page->page) 1598 break; 1599 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE, 1600 DMA_FROM_DEVICE); 1601 ps_page->dma = 0; 1602 put_page(ps_page->page); 1603 ps_page->page = NULL; 1604 } 1605 } 1606 1607 /* there also may be some cached data from a chained receive */ 1608 if (rx_ring->rx_skb_top) { 1609 dev_kfree_skb(rx_ring->rx_skb_top); 1610 rx_ring->rx_skb_top = NULL; 1611 } 1612 1613 /* Zero out the descriptor ring */ 1614 memset(rx_ring->desc, 0, rx_ring->size); 1615 1616 rx_ring->next_to_clean = 0; 1617 rx_ring->next_to_use = 0; 1618 adapter->flags2 &= ~FLAG2_IS_DISCARDING; 1619 1620 writel(0, rx_ring->head); 1621 writel(0, rx_ring->tail); 1622 } 1623 1624 static void e1000e_downshift_workaround(struct work_struct *work) 1625 { 1626 struct e1000_adapter *adapter = container_of(work, 1627 struct e1000_adapter, downshift_task); 1628 1629 if (test_bit(__E1000_DOWN, &adapter->state)) 1630 return; 1631 1632 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw); 1633 } 1634 1635 /** 1636 * e1000_intr_msi - Interrupt Handler 1637 * @irq: interrupt number 1638 * @data: pointer to a network interface device structure 1639 **/ 1640 static irqreturn_t e1000_intr_msi(int irq, void *data) 1641 { 1642 struct net_device *netdev = data; 1643 struct e1000_adapter *adapter = netdev_priv(netdev); 1644 struct e1000_hw *hw = &adapter->hw; 1645 u32 icr = er32(ICR); 1646 1647 /* 1648 * read ICR disables interrupts using IAM 1649 */ 1650 1651 if (icr & E1000_ICR_LSC) { 1652 hw->mac.get_link_status = 1; 1653 /* 1654 * ICH8 workaround-- Call gig speed drop workaround on cable 1655 * disconnect (LSC) before accessing any PHY registers 1656 */ 1657 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) && 1658 (!(er32(STATUS) & E1000_STATUS_LU))) 1659 schedule_work(&adapter->downshift_task); 1660 1661 /* 1662 * 80003ES2LAN workaround-- For packet buffer work-around on 1663 * link down event; disable receives here in the ISR and reset 1664 * adapter in watchdog 1665 */ 1666 if (netif_carrier_ok(netdev) && 1667 adapter->flags & FLAG_RX_NEEDS_RESTART) { 1668 /* disable receives */ 1669 u32 rctl = er32(RCTL); 1670 ew32(RCTL, rctl & ~E1000_RCTL_EN); 1671 adapter->flags |= FLAG_RX_RESTART_NOW; 1672 } 1673 /* guard against interrupt when we're going down */ 1674 if (!test_bit(__E1000_DOWN, &adapter->state)) 1675 mod_timer(&adapter->watchdog_timer, jiffies + 1); 1676 } 1677 1678 if (napi_schedule_prep(&adapter->napi)) { 1679 adapter->total_tx_bytes = 0; 1680 adapter->total_tx_packets = 0; 1681 adapter->total_rx_bytes = 0; 1682 adapter->total_rx_packets = 0; 1683 __napi_schedule(&adapter->napi); 1684 } 1685 1686 return IRQ_HANDLED; 1687 } 1688 1689 /** 1690 * e1000_intr - Interrupt Handler 1691 * @irq: interrupt number 1692 * @data: pointer to a network interface device structure 1693 **/ 1694 static irqreturn_t e1000_intr(int irq, void *data) 1695 { 1696 struct net_device *netdev = data; 1697 struct e1000_adapter *adapter = netdev_priv(netdev); 1698 struct e1000_hw *hw = &adapter->hw; 1699 u32 rctl, icr = er32(ICR); 1700 1701 if (!icr || test_bit(__E1000_DOWN, &adapter->state)) 1702 return IRQ_NONE; /* Not our interrupt */ 1703 1704 /* 1705 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is 1706 * not set, then the adapter didn't send an interrupt 1707 */ 1708 if (!(icr & E1000_ICR_INT_ASSERTED)) 1709 return IRQ_NONE; 1710 1711 /* 1712 * Interrupt Auto-Mask...upon reading ICR, 1713 * interrupts are masked. No need for the 1714 * IMC write 1715 */ 1716 1717 if (icr & E1000_ICR_LSC) { 1718 hw->mac.get_link_status = 1; 1719 /* 1720 * ICH8 workaround-- Call gig speed drop workaround on cable 1721 * disconnect (LSC) before accessing any PHY registers 1722 */ 1723 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) && 1724 (!(er32(STATUS) & E1000_STATUS_LU))) 1725 schedule_work(&adapter->downshift_task); 1726 1727 /* 1728 * 80003ES2LAN workaround-- 1729 * For packet buffer work-around on link down event; 1730 * disable receives here in the ISR and 1731 * reset adapter in watchdog 1732 */ 1733 if (netif_carrier_ok(netdev) && 1734 (adapter->flags & FLAG_RX_NEEDS_RESTART)) { 1735 /* disable receives */ 1736 rctl = er32(RCTL); 1737 ew32(RCTL, rctl & ~E1000_RCTL_EN); 1738 adapter->flags |= FLAG_RX_RESTART_NOW; 1739 } 1740 /* guard against interrupt when we're going down */ 1741 if (!test_bit(__E1000_DOWN, &adapter->state)) 1742 mod_timer(&adapter->watchdog_timer, jiffies + 1); 1743 } 1744 1745 if (napi_schedule_prep(&adapter->napi)) { 1746 adapter->total_tx_bytes = 0; 1747 adapter->total_tx_packets = 0; 1748 adapter->total_rx_bytes = 0; 1749 adapter->total_rx_packets = 0; 1750 __napi_schedule(&adapter->napi); 1751 } 1752 1753 return IRQ_HANDLED; 1754 } 1755 1756 static irqreturn_t e1000_msix_other(int irq, void *data) 1757 { 1758 struct net_device *netdev = data; 1759 struct e1000_adapter *adapter = netdev_priv(netdev); 1760 struct e1000_hw *hw = &adapter->hw; 1761 u32 icr = er32(ICR); 1762 1763 if (!(icr & E1000_ICR_INT_ASSERTED)) { 1764 if (!test_bit(__E1000_DOWN, &adapter->state)) 1765 ew32(IMS, E1000_IMS_OTHER); 1766 return IRQ_NONE; 1767 } 1768 1769 if (icr & adapter->eiac_mask) 1770 ew32(ICS, (icr & adapter->eiac_mask)); 1771 1772 if (icr & E1000_ICR_OTHER) { 1773 if (!(icr & E1000_ICR_LSC)) 1774 goto no_link_interrupt; 1775 hw->mac.get_link_status = 1; 1776 /* guard against interrupt when we're going down */ 1777 if (!test_bit(__E1000_DOWN, &adapter->state)) 1778 mod_timer(&adapter->watchdog_timer, jiffies + 1); 1779 } 1780 1781 no_link_interrupt: 1782 if (!test_bit(__E1000_DOWN, &adapter->state)) 1783 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER); 1784 1785 return IRQ_HANDLED; 1786 } 1787 1788 1789 static irqreturn_t e1000_intr_msix_tx(int irq, void *data) 1790 { 1791 struct net_device *netdev = data; 1792 struct e1000_adapter *adapter = netdev_priv(netdev); 1793 struct e1000_hw *hw = &adapter->hw; 1794 struct e1000_ring *tx_ring = adapter->tx_ring; 1795 1796 1797 adapter->total_tx_bytes = 0; 1798 adapter->total_tx_packets = 0; 1799 1800 if (!e1000_clean_tx_irq(tx_ring)) 1801 /* Ring was not completely cleaned, so fire another interrupt */ 1802 ew32(ICS, tx_ring->ims_val); 1803 1804 return IRQ_HANDLED; 1805 } 1806 1807 static irqreturn_t e1000_intr_msix_rx(int irq, void *data) 1808 { 1809 struct net_device *netdev = data; 1810 struct e1000_adapter *adapter = netdev_priv(netdev); 1811 struct e1000_ring *rx_ring = adapter->rx_ring; 1812 1813 /* Write the ITR value calculated at the end of the 1814 * previous interrupt. 1815 */ 1816 if (rx_ring->set_itr) { 1817 writel(1000000000 / (rx_ring->itr_val * 256), 1818 rx_ring->itr_register); 1819 rx_ring->set_itr = 0; 1820 } 1821 1822 if (napi_schedule_prep(&adapter->napi)) { 1823 adapter->total_rx_bytes = 0; 1824 adapter->total_rx_packets = 0; 1825 __napi_schedule(&adapter->napi); 1826 } 1827 return IRQ_HANDLED; 1828 } 1829 1830 /** 1831 * e1000_configure_msix - Configure MSI-X hardware 1832 * 1833 * e1000_configure_msix sets up the hardware to properly 1834 * generate MSI-X interrupts. 1835 **/ 1836 static void e1000_configure_msix(struct e1000_adapter *adapter) 1837 { 1838 struct e1000_hw *hw = &adapter->hw; 1839 struct e1000_ring *rx_ring = adapter->rx_ring; 1840 struct e1000_ring *tx_ring = adapter->tx_ring; 1841 int vector = 0; 1842 u32 ctrl_ext, ivar = 0; 1843 1844 adapter->eiac_mask = 0; 1845 1846 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */ 1847 if (hw->mac.type == e1000_82574) { 1848 u32 rfctl = er32(RFCTL); 1849 rfctl |= E1000_RFCTL_ACK_DIS; 1850 ew32(RFCTL, rfctl); 1851 } 1852 1853 #define E1000_IVAR_INT_ALLOC_VALID 0x8 1854 /* Configure Rx vector */ 1855 rx_ring->ims_val = E1000_IMS_RXQ0; 1856 adapter->eiac_mask |= rx_ring->ims_val; 1857 if (rx_ring->itr_val) 1858 writel(1000000000 / (rx_ring->itr_val * 256), 1859 rx_ring->itr_register); 1860 else 1861 writel(1, rx_ring->itr_register); 1862 ivar = E1000_IVAR_INT_ALLOC_VALID | vector; 1863 1864 /* Configure Tx vector */ 1865 tx_ring->ims_val = E1000_IMS_TXQ0; 1866 vector++; 1867 if (tx_ring->itr_val) 1868 writel(1000000000 / (tx_ring->itr_val * 256), 1869 tx_ring->itr_register); 1870 else 1871 writel(1, tx_ring->itr_register); 1872 adapter->eiac_mask |= tx_ring->ims_val; 1873 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8); 1874 1875 /* set vector for Other Causes, e.g. link changes */ 1876 vector++; 1877 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16); 1878 if (rx_ring->itr_val) 1879 writel(1000000000 / (rx_ring->itr_val * 256), 1880 hw->hw_addr + E1000_EITR_82574(vector)); 1881 else 1882 writel(1, hw->hw_addr + E1000_EITR_82574(vector)); 1883 1884 /* Cause Tx interrupts on every write back */ 1885 ivar |= (1 << 31); 1886 1887 ew32(IVAR, ivar); 1888 1889 /* enable MSI-X PBA support */ 1890 ctrl_ext = er32(CTRL_EXT); 1891 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR; 1892 1893 /* Auto-Mask Other interrupts upon ICR read */ 1894 #define E1000_EIAC_MASK_82574 0x01F00000 1895 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER); 1896 ctrl_ext |= E1000_CTRL_EXT_EIAME; 1897 ew32(CTRL_EXT, ctrl_ext); 1898 e1e_flush(); 1899 } 1900 1901 void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter) 1902 { 1903 if (adapter->msix_entries) { 1904 pci_disable_msix(adapter->pdev); 1905 kfree(adapter->msix_entries); 1906 adapter->msix_entries = NULL; 1907 } else if (adapter->flags & FLAG_MSI_ENABLED) { 1908 pci_disable_msi(adapter->pdev); 1909 adapter->flags &= ~FLAG_MSI_ENABLED; 1910 } 1911 } 1912 1913 /** 1914 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported 1915 * 1916 * Attempt to configure interrupts using the best available 1917 * capabilities of the hardware and kernel. 1918 **/ 1919 void e1000e_set_interrupt_capability(struct e1000_adapter *adapter) 1920 { 1921 int err; 1922 int i; 1923 1924 switch (adapter->int_mode) { 1925 case E1000E_INT_MODE_MSIX: 1926 if (adapter->flags & FLAG_HAS_MSIX) { 1927 adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */ 1928 adapter->msix_entries = kcalloc(adapter->num_vectors, 1929 sizeof(struct msix_entry), 1930 GFP_KERNEL); 1931 if (adapter->msix_entries) { 1932 for (i = 0; i < adapter->num_vectors; i++) 1933 adapter->msix_entries[i].entry = i; 1934 1935 err = pci_enable_msix(adapter->pdev, 1936 adapter->msix_entries, 1937 adapter->num_vectors); 1938 if (err == 0) 1939 return; 1940 } 1941 /* MSI-X failed, so fall through and try MSI */ 1942 e_err("Failed to initialize MSI-X interrupts. Falling back to MSI interrupts.\n"); 1943 e1000e_reset_interrupt_capability(adapter); 1944 } 1945 adapter->int_mode = E1000E_INT_MODE_MSI; 1946 /* Fall through */ 1947 case E1000E_INT_MODE_MSI: 1948 if (!pci_enable_msi(adapter->pdev)) { 1949 adapter->flags |= FLAG_MSI_ENABLED; 1950 } else { 1951 adapter->int_mode = E1000E_INT_MODE_LEGACY; 1952 e_err("Failed to initialize MSI interrupts. Falling back to legacy interrupts.\n"); 1953 } 1954 /* Fall through */ 1955 case E1000E_INT_MODE_LEGACY: 1956 /* Don't do anything; this is the system default */ 1957 break; 1958 } 1959 1960 /* store the number of vectors being used */ 1961 adapter->num_vectors = 1; 1962 } 1963 1964 /** 1965 * e1000_request_msix - Initialize MSI-X interrupts 1966 * 1967 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the 1968 * kernel. 1969 **/ 1970 static int e1000_request_msix(struct e1000_adapter *adapter) 1971 { 1972 struct net_device *netdev = adapter->netdev; 1973 int err = 0, vector = 0; 1974 1975 if (strlen(netdev->name) < (IFNAMSIZ - 5)) 1976 snprintf(adapter->rx_ring->name, 1977 sizeof(adapter->rx_ring->name) - 1, 1978 "%s-rx-0", netdev->name); 1979 else 1980 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ); 1981 err = request_irq(adapter->msix_entries[vector].vector, 1982 e1000_intr_msix_rx, 0, adapter->rx_ring->name, 1983 netdev); 1984 if (err) 1985 goto out; 1986 adapter->rx_ring->itr_register = adapter->hw.hw_addr + 1987 E1000_EITR_82574(vector); 1988 adapter->rx_ring->itr_val = adapter->itr; 1989 vector++; 1990 1991 if (strlen(netdev->name) < (IFNAMSIZ - 5)) 1992 snprintf(adapter->tx_ring->name, 1993 sizeof(adapter->tx_ring->name) - 1, 1994 "%s-tx-0", netdev->name); 1995 else 1996 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ); 1997 err = request_irq(adapter->msix_entries[vector].vector, 1998 e1000_intr_msix_tx, 0, adapter->tx_ring->name, 1999 netdev); 2000 if (err) 2001 goto out; 2002 adapter->tx_ring->itr_register = adapter->hw.hw_addr + 2003 E1000_EITR_82574(vector); 2004 adapter->tx_ring->itr_val = adapter->itr; 2005 vector++; 2006 2007 err = request_irq(adapter->msix_entries[vector].vector, 2008 e1000_msix_other, 0, netdev->name, netdev); 2009 if (err) 2010 goto out; 2011 2012 e1000_configure_msix(adapter); 2013 return 0; 2014 out: 2015 return err; 2016 } 2017 2018 /** 2019 * e1000_request_irq - initialize interrupts 2020 * 2021 * Attempts to configure interrupts using the best available 2022 * capabilities of the hardware and kernel. 2023 **/ 2024 static int e1000_request_irq(struct e1000_adapter *adapter) 2025 { 2026 struct net_device *netdev = adapter->netdev; 2027 int err; 2028 2029 if (adapter->msix_entries) { 2030 err = e1000_request_msix(adapter); 2031 if (!err) 2032 return err; 2033 /* fall back to MSI */ 2034 e1000e_reset_interrupt_capability(adapter); 2035 adapter->int_mode = E1000E_INT_MODE_MSI; 2036 e1000e_set_interrupt_capability(adapter); 2037 } 2038 if (adapter->flags & FLAG_MSI_ENABLED) { 2039 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0, 2040 netdev->name, netdev); 2041 if (!err) 2042 return err; 2043 2044 /* fall back to legacy interrupt */ 2045 e1000e_reset_interrupt_capability(adapter); 2046 adapter->int_mode = E1000E_INT_MODE_LEGACY; 2047 } 2048 2049 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED, 2050 netdev->name, netdev); 2051 if (err) 2052 e_err("Unable to allocate interrupt, Error: %d\n", err); 2053 2054 return err; 2055 } 2056 2057 static void e1000_free_irq(struct e1000_adapter *adapter) 2058 { 2059 struct net_device *netdev = adapter->netdev; 2060 2061 if (adapter->msix_entries) { 2062 int vector = 0; 2063 2064 free_irq(adapter->msix_entries[vector].vector, netdev); 2065 vector++; 2066 2067 free_irq(adapter->msix_entries[vector].vector, netdev); 2068 vector++; 2069 2070 /* Other Causes interrupt vector */ 2071 free_irq(adapter->msix_entries[vector].vector, netdev); 2072 return; 2073 } 2074 2075 free_irq(adapter->pdev->irq, netdev); 2076 } 2077 2078 /** 2079 * e1000_irq_disable - Mask off interrupt generation on the NIC 2080 **/ 2081 static void e1000_irq_disable(struct e1000_adapter *adapter) 2082 { 2083 struct e1000_hw *hw = &adapter->hw; 2084 2085 ew32(IMC, ~0); 2086 if (adapter->msix_entries) 2087 ew32(EIAC_82574, 0); 2088 e1e_flush(); 2089 2090 if (adapter->msix_entries) { 2091 int i; 2092 for (i = 0; i < adapter->num_vectors; i++) 2093 synchronize_irq(adapter->msix_entries[i].vector); 2094 } else { 2095 synchronize_irq(adapter->pdev->irq); 2096 } 2097 } 2098 2099 /** 2100 * e1000_irq_enable - Enable default interrupt generation settings 2101 **/ 2102 static void e1000_irq_enable(struct e1000_adapter *adapter) 2103 { 2104 struct e1000_hw *hw = &adapter->hw; 2105 2106 if (adapter->msix_entries) { 2107 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574); 2108 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC); 2109 } else { 2110 ew32(IMS, IMS_ENABLE_MASK); 2111 } 2112 e1e_flush(); 2113 } 2114 2115 /** 2116 * e1000e_get_hw_control - get control of the h/w from f/w 2117 * @adapter: address of board private structure 2118 * 2119 * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit. 2120 * For ASF and Pass Through versions of f/w this means that 2121 * the driver is loaded. For AMT version (only with 82573) 2122 * of the f/w this means that the network i/f is open. 2123 **/ 2124 void e1000e_get_hw_control(struct e1000_adapter *adapter) 2125 { 2126 struct e1000_hw *hw = &adapter->hw; 2127 u32 ctrl_ext; 2128 u32 swsm; 2129 2130 /* Let firmware know the driver has taken over */ 2131 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) { 2132 swsm = er32(SWSM); 2133 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD); 2134 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) { 2135 ctrl_ext = er32(CTRL_EXT); 2136 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); 2137 } 2138 } 2139 2140 /** 2141 * e1000e_release_hw_control - release control of the h/w to f/w 2142 * @adapter: address of board private structure 2143 * 2144 * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit. 2145 * For ASF and Pass Through versions of f/w this means that the 2146 * driver is no longer loaded. For AMT version (only with 82573) i 2147 * of the f/w this means that the network i/f is closed. 2148 * 2149 **/ 2150 void e1000e_release_hw_control(struct e1000_adapter *adapter) 2151 { 2152 struct e1000_hw *hw = &adapter->hw; 2153 u32 ctrl_ext; 2154 u32 swsm; 2155 2156 /* Let firmware taken over control of h/w */ 2157 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) { 2158 swsm = er32(SWSM); 2159 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD); 2160 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) { 2161 ctrl_ext = er32(CTRL_EXT); 2162 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); 2163 } 2164 } 2165 2166 /** 2167 * @e1000_alloc_ring - allocate memory for a ring structure 2168 **/ 2169 static int e1000_alloc_ring_dma(struct e1000_adapter *adapter, 2170 struct e1000_ring *ring) 2171 { 2172 struct pci_dev *pdev = adapter->pdev; 2173 2174 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma, 2175 GFP_KERNEL); 2176 if (!ring->desc) 2177 return -ENOMEM; 2178 2179 return 0; 2180 } 2181 2182 /** 2183 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors) 2184 * @tx_ring: Tx descriptor ring 2185 * 2186 * Return 0 on success, negative on failure 2187 **/ 2188 int e1000e_setup_tx_resources(struct e1000_ring *tx_ring) 2189 { 2190 struct e1000_adapter *adapter = tx_ring->adapter; 2191 int err = -ENOMEM, size; 2192 2193 size = sizeof(struct e1000_buffer) * tx_ring->count; 2194 tx_ring->buffer_info = vzalloc(size); 2195 if (!tx_ring->buffer_info) 2196 goto err; 2197 2198 /* round up to nearest 4K */ 2199 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc); 2200 tx_ring->size = ALIGN(tx_ring->size, 4096); 2201 2202 err = e1000_alloc_ring_dma(adapter, tx_ring); 2203 if (err) 2204 goto err; 2205 2206 tx_ring->next_to_use = 0; 2207 tx_ring->next_to_clean = 0; 2208 2209 return 0; 2210 err: 2211 vfree(tx_ring->buffer_info); 2212 e_err("Unable to allocate memory for the transmit descriptor ring\n"); 2213 return err; 2214 } 2215 2216 /** 2217 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors) 2218 * @rx_ring: Rx descriptor ring 2219 * 2220 * Returns 0 on success, negative on failure 2221 **/ 2222 int e1000e_setup_rx_resources(struct e1000_ring *rx_ring) 2223 { 2224 struct e1000_adapter *adapter = rx_ring->adapter; 2225 struct e1000_buffer *buffer_info; 2226 int i, size, desc_len, err = -ENOMEM; 2227 2228 size = sizeof(struct e1000_buffer) * rx_ring->count; 2229 rx_ring->buffer_info = vzalloc(size); 2230 if (!rx_ring->buffer_info) 2231 goto err; 2232 2233 for (i = 0; i < rx_ring->count; i++) { 2234 buffer_info = &rx_ring->buffer_info[i]; 2235 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS, 2236 sizeof(struct e1000_ps_page), 2237 GFP_KERNEL); 2238 if (!buffer_info->ps_pages) 2239 goto err_pages; 2240 } 2241 2242 desc_len = sizeof(union e1000_rx_desc_packet_split); 2243 2244 /* Round up to nearest 4K */ 2245 rx_ring->size = rx_ring->count * desc_len; 2246 rx_ring->size = ALIGN(rx_ring->size, 4096); 2247 2248 err = e1000_alloc_ring_dma(adapter, rx_ring); 2249 if (err) 2250 goto err_pages; 2251 2252 rx_ring->next_to_clean = 0; 2253 rx_ring->next_to_use = 0; 2254 rx_ring->rx_skb_top = NULL; 2255 2256 return 0; 2257 2258 err_pages: 2259 for (i = 0; i < rx_ring->count; i++) { 2260 buffer_info = &rx_ring->buffer_info[i]; 2261 kfree(buffer_info->ps_pages); 2262 } 2263 err: 2264 vfree(rx_ring->buffer_info); 2265 e_err("Unable to allocate memory for the receive descriptor ring\n"); 2266 return err; 2267 } 2268 2269 /** 2270 * e1000_clean_tx_ring - Free Tx Buffers 2271 * @tx_ring: Tx descriptor ring 2272 **/ 2273 static void e1000_clean_tx_ring(struct e1000_ring *tx_ring) 2274 { 2275 struct e1000_adapter *adapter = tx_ring->adapter; 2276 struct e1000_buffer *buffer_info; 2277 unsigned long size; 2278 unsigned int i; 2279 2280 for (i = 0; i < tx_ring->count; i++) { 2281 buffer_info = &tx_ring->buffer_info[i]; 2282 e1000_put_txbuf(tx_ring, buffer_info); 2283 } 2284 2285 netdev_reset_queue(adapter->netdev); 2286 size = sizeof(struct e1000_buffer) * tx_ring->count; 2287 memset(tx_ring->buffer_info, 0, size); 2288 2289 memset(tx_ring->desc, 0, tx_ring->size); 2290 2291 tx_ring->next_to_use = 0; 2292 tx_ring->next_to_clean = 0; 2293 2294 writel(0, tx_ring->head); 2295 writel(0, tx_ring->tail); 2296 } 2297 2298 /** 2299 * e1000e_free_tx_resources - Free Tx Resources per Queue 2300 * @tx_ring: Tx descriptor ring 2301 * 2302 * Free all transmit software resources 2303 **/ 2304 void e1000e_free_tx_resources(struct e1000_ring *tx_ring) 2305 { 2306 struct e1000_adapter *adapter = tx_ring->adapter; 2307 struct pci_dev *pdev = adapter->pdev; 2308 2309 e1000_clean_tx_ring(tx_ring); 2310 2311 vfree(tx_ring->buffer_info); 2312 tx_ring->buffer_info = NULL; 2313 2314 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc, 2315 tx_ring->dma); 2316 tx_ring->desc = NULL; 2317 } 2318 2319 /** 2320 * e1000e_free_rx_resources - Free Rx Resources 2321 * @rx_ring: Rx descriptor ring 2322 * 2323 * Free all receive software resources 2324 **/ 2325 void e1000e_free_rx_resources(struct e1000_ring *rx_ring) 2326 { 2327 struct e1000_adapter *adapter = rx_ring->adapter; 2328 struct pci_dev *pdev = adapter->pdev; 2329 int i; 2330 2331 e1000_clean_rx_ring(rx_ring); 2332 2333 for (i = 0; i < rx_ring->count; i++) 2334 kfree(rx_ring->buffer_info[i].ps_pages); 2335 2336 vfree(rx_ring->buffer_info); 2337 rx_ring->buffer_info = NULL; 2338 2339 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc, 2340 rx_ring->dma); 2341 rx_ring->desc = NULL; 2342 } 2343 2344 /** 2345 * e1000_update_itr - update the dynamic ITR value based on statistics 2346 * @adapter: pointer to adapter 2347 * @itr_setting: current adapter->itr 2348 * @packets: the number of packets during this measurement interval 2349 * @bytes: the number of bytes during this measurement interval 2350 * 2351 * Stores a new ITR value based on packets and byte 2352 * counts during the last interrupt. The advantage of per interrupt 2353 * computation is faster updates and more accurate ITR for the current 2354 * traffic pattern. Constants in this function were computed 2355 * based on theoretical maximum wire speed and thresholds were set based 2356 * on testing data as well as attempting to minimize response time 2357 * while increasing bulk throughput. This functionality is controlled 2358 * by the InterruptThrottleRate module parameter. 2359 **/ 2360 static unsigned int e1000_update_itr(struct e1000_adapter *adapter, 2361 u16 itr_setting, int packets, 2362 int bytes) 2363 { 2364 unsigned int retval = itr_setting; 2365 2366 if (packets == 0) 2367 goto update_itr_done; 2368 2369 switch (itr_setting) { 2370 case lowest_latency: 2371 /* handle TSO and jumbo frames */ 2372 if (bytes/packets > 8000) 2373 retval = bulk_latency; 2374 else if ((packets < 5) && (bytes > 512)) 2375 retval = low_latency; 2376 break; 2377 case low_latency: /* 50 usec aka 20000 ints/s */ 2378 if (bytes > 10000) { 2379 /* this if handles the TSO accounting */ 2380 if (bytes/packets > 8000) 2381 retval = bulk_latency; 2382 else if ((packets < 10) || ((bytes/packets) > 1200)) 2383 retval = bulk_latency; 2384 else if ((packets > 35)) 2385 retval = lowest_latency; 2386 } else if (bytes/packets > 2000) { 2387 retval = bulk_latency; 2388 } else if (packets <= 2 && bytes < 512) { 2389 retval = lowest_latency; 2390 } 2391 break; 2392 case bulk_latency: /* 250 usec aka 4000 ints/s */ 2393 if (bytes > 25000) { 2394 if (packets > 35) 2395 retval = low_latency; 2396 } else if (bytes < 6000) { 2397 retval = low_latency; 2398 } 2399 break; 2400 } 2401 2402 update_itr_done: 2403 return retval; 2404 } 2405 2406 static void e1000_set_itr(struct e1000_adapter *adapter) 2407 { 2408 struct e1000_hw *hw = &adapter->hw; 2409 u16 current_itr; 2410 u32 new_itr = adapter->itr; 2411 2412 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */ 2413 if (adapter->link_speed != SPEED_1000) { 2414 current_itr = 0; 2415 new_itr = 4000; 2416 goto set_itr_now; 2417 } 2418 2419 if (adapter->flags2 & FLAG2_DISABLE_AIM) { 2420 new_itr = 0; 2421 goto set_itr_now; 2422 } 2423 2424 adapter->tx_itr = e1000_update_itr(adapter, 2425 adapter->tx_itr, 2426 adapter->total_tx_packets, 2427 adapter->total_tx_bytes); 2428 /* conservative mode (itr 3) eliminates the lowest_latency setting */ 2429 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency) 2430 adapter->tx_itr = low_latency; 2431 2432 adapter->rx_itr = e1000_update_itr(adapter, 2433 adapter->rx_itr, 2434 adapter->total_rx_packets, 2435 adapter->total_rx_bytes); 2436 /* conservative mode (itr 3) eliminates the lowest_latency setting */ 2437 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency) 2438 adapter->rx_itr = low_latency; 2439 2440 current_itr = max(adapter->rx_itr, adapter->tx_itr); 2441 2442 switch (current_itr) { 2443 /* counts and packets in update_itr are dependent on these numbers */ 2444 case lowest_latency: 2445 new_itr = 70000; 2446 break; 2447 case low_latency: 2448 new_itr = 20000; /* aka hwitr = ~200 */ 2449 break; 2450 case bulk_latency: 2451 new_itr = 4000; 2452 break; 2453 default: 2454 break; 2455 } 2456 2457 set_itr_now: 2458 if (new_itr != adapter->itr) { 2459 /* 2460 * this attempts to bias the interrupt rate towards Bulk 2461 * by adding intermediate steps when interrupt rate is 2462 * increasing 2463 */ 2464 new_itr = new_itr > adapter->itr ? 2465 min(adapter->itr + (new_itr >> 2), new_itr) : 2466 new_itr; 2467 adapter->itr = new_itr; 2468 adapter->rx_ring->itr_val = new_itr; 2469 if (adapter->msix_entries) 2470 adapter->rx_ring->set_itr = 1; 2471 else 2472 if (new_itr) 2473 ew32(ITR, 1000000000 / (new_itr * 256)); 2474 else 2475 ew32(ITR, 0); 2476 } 2477 } 2478 2479 /** 2480 * e1000_alloc_queues - Allocate memory for all rings 2481 * @adapter: board private structure to initialize 2482 **/ 2483 static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter) 2484 { 2485 int size = sizeof(struct e1000_ring); 2486 2487 adapter->tx_ring = kzalloc(size, GFP_KERNEL); 2488 if (!adapter->tx_ring) 2489 goto err; 2490 adapter->tx_ring->count = adapter->tx_ring_count; 2491 adapter->tx_ring->adapter = adapter; 2492 2493 adapter->rx_ring = kzalloc(size, GFP_KERNEL); 2494 if (!adapter->rx_ring) 2495 goto err; 2496 adapter->rx_ring->count = adapter->rx_ring_count; 2497 adapter->rx_ring->adapter = adapter; 2498 2499 return 0; 2500 err: 2501 e_err("Unable to allocate memory for queues\n"); 2502 kfree(adapter->rx_ring); 2503 kfree(adapter->tx_ring); 2504 return -ENOMEM; 2505 } 2506 2507 /** 2508 * e1000_clean - NAPI Rx polling callback 2509 * @napi: struct associated with this polling callback 2510 * @budget: amount of packets driver is allowed to process this poll 2511 **/ 2512 static int e1000_clean(struct napi_struct *napi, int budget) 2513 { 2514 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi); 2515 struct e1000_hw *hw = &adapter->hw; 2516 struct net_device *poll_dev = adapter->netdev; 2517 int tx_cleaned = 1, work_done = 0; 2518 2519 adapter = netdev_priv(poll_dev); 2520 2521 if (adapter->msix_entries && 2522 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val)) 2523 goto clean_rx; 2524 2525 tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring); 2526 2527 clean_rx: 2528 adapter->clean_rx(adapter->rx_ring, &work_done, budget); 2529 2530 if (!tx_cleaned) 2531 work_done = budget; 2532 2533 /* If budget not fully consumed, exit the polling mode */ 2534 if (work_done < budget) { 2535 if (adapter->itr_setting & 3) 2536 e1000_set_itr(adapter); 2537 napi_complete(napi); 2538 if (!test_bit(__E1000_DOWN, &adapter->state)) { 2539 if (adapter->msix_entries) 2540 ew32(IMS, adapter->rx_ring->ims_val); 2541 else 2542 e1000_irq_enable(adapter); 2543 } 2544 } 2545 2546 return work_done; 2547 } 2548 2549 static int e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid) 2550 { 2551 struct e1000_adapter *adapter = netdev_priv(netdev); 2552 struct e1000_hw *hw = &adapter->hw; 2553 u32 vfta, index; 2554 2555 /* don't update vlan cookie if already programmed */ 2556 if ((adapter->hw.mng_cookie.status & 2557 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) && 2558 (vid == adapter->mng_vlan_id)) 2559 return 0; 2560 2561 /* add VID to filter table */ 2562 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2563 index = (vid >> 5) & 0x7F; 2564 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index); 2565 vfta |= (1 << (vid & 0x1F)); 2566 hw->mac.ops.write_vfta(hw, index, vfta); 2567 } 2568 2569 set_bit(vid, adapter->active_vlans); 2570 2571 return 0; 2572 } 2573 2574 static int e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid) 2575 { 2576 struct e1000_adapter *adapter = netdev_priv(netdev); 2577 struct e1000_hw *hw = &adapter->hw; 2578 u32 vfta, index; 2579 2580 if ((adapter->hw.mng_cookie.status & 2581 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) && 2582 (vid == adapter->mng_vlan_id)) { 2583 /* release control to f/w */ 2584 e1000e_release_hw_control(adapter); 2585 return 0; 2586 } 2587 2588 /* remove VID from filter table */ 2589 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2590 index = (vid >> 5) & 0x7F; 2591 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index); 2592 vfta &= ~(1 << (vid & 0x1F)); 2593 hw->mac.ops.write_vfta(hw, index, vfta); 2594 } 2595 2596 clear_bit(vid, adapter->active_vlans); 2597 2598 return 0; 2599 } 2600 2601 /** 2602 * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering 2603 * @adapter: board private structure to initialize 2604 **/ 2605 static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter) 2606 { 2607 struct net_device *netdev = adapter->netdev; 2608 struct e1000_hw *hw = &adapter->hw; 2609 u32 rctl; 2610 2611 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2612 /* disable VLAN receive filtering */ 2613 rctl = er32(RCTL); 2614 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN); 2615 ew32(RCTL, rctl); 2616 2617 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) { 2618 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); 2619 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; 2620 } 2621 } 2622 } 2623 2624 /** 2625 * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering 2626 * @adapter: board private structure to initialize 2627 **/ 2628 static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter) 2629 { 2630 struct e1000_hw *hw = &adapter->hw; 2631 u32 rctl; 2632 2633 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2634 /* enable VLAN receive filtering */ 2635 rctl = er32(RCTL); 2636 rctl |= E1000_RCTL_VFE; 2637 rctl &= ~E1000_RCTL_CFIEN; 2638 ew32(RCTL, rctl); 2639 } 2640 } 2641 2642 /** 2643 * e1000e_vlan_strip_enable - helper to disable HW VLAN stripping 2644 * @adapter: board private structure to initialize 2645 **/ 2646 static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter) 2647 { 2648 struct e1000_hw *hw = &adapter->hw; 2649 u32 ctrl; 2650 2651 /* disable VLAN tag insert/strip */ 2652 ctrl = er32(CTRL); 2653 ctrl &= ~E1000_CTRL_VME; 2654 ew32(CTRL, ctrl); 2655 } 2656 2657 /** 2658 * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping 2659 * @adapter: board private structure to initialize 2660 **/ 2661 static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter) 2662 { 2663 struct e1000_hw *hw = &adapter->hw; 2664 u32 ctrl; 2665 2666 /* enable VLAN tag insert/strip */ 2667 ctrl = er32(CTRL); 2668 ctrl |= E1000_CTRL_VME; 2669 ew32(CTRL, ctrl); 2670 } 2671 2672 static void e1000_update_mng_vlan(struct e1000_adapter *adapter) 2673 { 2674 struct net_device *netdev = adapter->netdev; 2675 u16 vid = adapter->hw.mng_cookie.vlan_id; 2676 u16 old_vid = adapter->mng_vlan_id; 2677 2678 if (adapter->hw.mng_cookie.status & 2679 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) { 2680 e1000_vlan_rx_add_vid(netdev, vid); 2681 adapter->mng_vlan_id = vid; 2682 } 2683 2684 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid)) 2685 e1000_vlan_rx_kill_vid(netdev, old_vid); 2686 } 2687 2688 static void e1000_restore_vlan(struct e1000_adapter *adapter) 2689 { 2690 u16 vid; 2691 2692 e1000_vlan_rx_add_vid(adapter->netdev, 0); 2693 2694 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID) 2695 e1000_vlan_rx_add_vid(adapter->netdev, vid); 2696 } 2697 2698 static void e1000_init_manageability_pt(struct e1000_adapter *adapter) 2699 { 2700 struct e1000_hw *hw = &adapter->hw; 2701 u32 manc, manc2h, mdef, i, j; 2702 2703 if (!(adapter->flags & FLAG_MNG_PT_ENABLED)) 2704 return; 2705 2706 manc = er32(MANC); 2707 2708 /* 2709 * enable receiving management packets to the host. this will probably 2710 * generate destination unreachable messages from the host OS, but 2711 * the packets will be handled on SMBUS 2712 */ 2713 manc |= E1000_MANC_EN_MNG2HOST; 2714 manc2h = er32(MANC2H); 2715 2716 switch (hw->mac.type) { 2717 default: 2718 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664); 2719 break; 2720 case e1000_82574: 2721 case e1000_82583: 2722 /* 2723 * Check if IPMI pass-through decision filter already exists; 2724 * if so, enable it. 2725 */ 2726 for (i = 0, j = 0; i < 8; i++) { 2727 mdef = er32(MDEF(i)); 2728 2729 /* Ignore filters with anything other than IPMI ports */ 2730 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664)) 2731 continue; 2732 2733 /* Enable this decision filter in MANC2H */ 2734 if (mdef) 2735 manc2h |= (1 << i); 2736 2737 j |= mdef; 2738 } 2739 2740 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664)) 2741 break; 2742 2743 /* Create new decision filter in an empty filter */ 2744 for (i = 0, j = 0; i < 8; i++) 2745 if (er32(MDEF(i)) == 0) { 2746 ew32(MDEF(i), (E1000_MDEF_PORT_623 | 2747 E1000_MDEF_PORT_664)); 2748 manc2h |= (1 << 1); 2749 j++; 2750 break; 2751 } 2752 2753 if (!j) 2754 e_warn("Unable to create IPMI pass-through filter\n"); 2755 break; 2756 } 2757 2758 ew32(MANC2H, manc2h); 2759 ew32(MANC, manc); 2760 } 2761 2762 /** 2763 * e1000_configure_tx - Configure Transmit Unit after Reset 2764 * @adapter: board private structure 2765 * 2766 * Configure the Tx unit of the MAC after a reset. 2767 **/ 2768 static void e1000_configure_tx(struct e1000_adapter *adapter) 2769 { 2770 struct e1000_hw *hw = &adapter->hw; 2771 struct e1000_ring *tx_ring = adapter->tx_ring; 2772 u64 tdba; 2773 u32 tdlen, tarc; 2774 2775 /* Setup the HW Tx Head and Tail descriptor pointers */ 2776 tdba = tx_ring->dma; 2777 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc); 2778 ew32(TDBAL, (tdba & DMA_BIT_MASK(32))); 2779 ew32(TDBAH, (tdba >> 32)); 2780 ew32(TDLEN, tdlen); 2781 ew32(TDH, 0); 2782 ew32(TDT, 0); 2783 tx_ring->head = adapter->hw.hw_addr + E1000_TDH; 2784 tx_ring->tail = adapter->hw.hw_addr + E1000_TDT; 2785 2786 /* Set the Tx Interrupt Delay register */ 2787 ew32(TIDV, adapter->tx_int_delay); 2788 /* Tx irq moderation */ 2789 ew32(TADV, adapter->tx_abs_int_delay); 2790 2791 if (adapter->flags2 & FLAG2_DMA_BURST) { 2792 u32 txdctl = er32(TXDCTL(0)); 2793 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH | 2794 E1000_TXDCTL_WTHRESH); 2795 /* 2796 * set up some performance related parameters to encourage the 2797 * hardware to use the bus more efficiently in bursts, depends 2798 * on the tx_int_delay to be enabled, 2799 * wthresh = 5 ==> burst write a cacheline (64 bytes) at a time 2800 * hthresh = 1 ==> prefetch when one or more available 2801 * pthresh = 0x1f ==> prefetch if internal cache 31 or less 2802 * BEWARE: this seems to work but should be considered first if 2803 * there are Tx hangs or other Tx related bugs 2804 */ 2805 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE; 2806 ew32(TXDCTL(0), txdctl); 2807 } 2808 /* erratum work around: set txdctl the same for both queues */ 2809 ew32(TXDCTL(1), er32(TXDCTL(0))); 2810 2811 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) { 2812 tarc = er32(TARC(0)); 2813 /* 2814 * set the speed mode bit, we'll clear it if we're not at 2815 * gigabit link later 2816 */ 2817 #define SPEED_MODE_BIT (1 << 21) 2818 tarc |= SPEED_MODE_BIT; 2819 ew32(TARC(0), tarc); 2820 } 2821 2822 /* errata: program both queues to unweighted RR */ 2823 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) { 2824 tarc = er32(TARC(0)); 2825 tarc |= 1; 2826 ew32(TARC(0), tarc); 2827 tarc = er32(TARC(1)); 2828 tarc |= 1; 2829 ew32(TARC(1), tarc); 2830 } 2831 2832 /* Setup Transmit Descriptor Settings for eop descriptor */ 2833 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS; 2834 2835 /* only set IDE if we are delaying interrupts using the timers */ 2836 if (adapter->tx_int_delay) 2837 adapter->txd_cmd |= E1000_TXD_CMD_IDE; 2838 2839 /* enable Report Status bit */ 2840 adapter->txd_cmd |= E1000_TXD_CMD_RS; 2841 2842 e1000e_config_collision_dist(hw); 2843 } 2844 2845 /** 2846 * e1000_setup_rctl - configure the receive control registers 2847 * @adapter: Board private structure 2848 **/ 2849 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \ 2850 (((S) & (PAGE_SIZE - 1)) ? 1 : 0)) 2851 static void e1000_setup_rctl(struct e1000_adapter *adapter) 2852 { 2853 struct e1000_hw *hw = &adapter->hw; 2854 u32 rctl, rfctl; 2855 u32 pages = 0; 2856 2857 /* Workaround Si errata on 82579 - configure jumbo frame flow */ 2858 if (hw->mac.type == e1000_pch2lan) { 2859 s32 ret_val; 2860 2861 if (adapter->netdev->mtu > ETH_DATA_LEN) 2862 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true); 2863 else 2864 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false); 2865 2866 if (ret_val) 2867 e_dbg("failed to enable jumbo frame workaround mode\n"); 2868 } 2869 2870 /* Program MC offset vector base */ 2871 rctl = er32(RCTL); 2872 rctl &= ~(3 << E1000_RCTL_MO_SHIFT); 2873 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | 2874 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF | 2875 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT); 2876 2877 /* Do not Store bad packets */ 2878 rctl &= ~E1000_RCTL_SBP; 2879 2880 /* Enable Long Packet receive */ 2881 if (adapter->netdev->mtu <= ETH_DATA_LEN) 2882 rctl &= ~E1000_RCTL_LPE; 2883 else 2884 rctl |= E1000_RCTL_LPE; 2885 2886 /* Some systems expect that the CRC is included in SMBUS traffic. The 2887 * hardware strips the CRC before sending to both SMBUS (BMC) and to 2888 * host memory when this is enabled 2889 */ 2890 if (adapter->flags2 & FLAG2_CRC_STRIPPING) 2891 rctl |= E1000_RCTL_SECRC; 2892 2893 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */ 2894 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) { 2895 u16 phy_data; 2896 2897 e1e_rphy(hw, PHY_REG(770, 26), &phy_data); 2898 phy_data &= 0xfff8; 2899 phy_data |= (1 << 2); 2900 e1e_wphy(hw, PHY_REG(770, 26), phy_data); 2901 2902 e1e_rphy(hw, 22, &phy_data); 2903 phy_data &= 0x0fff; 2904 phy_data |= (1 << 14); 2905 e1e_wphy(hw, 0x10, 0x2823); 2906 e1e_wphy(hw, 0x11, 0x0003); 2907 e1e_wphy(hw, 22, phy_data); 2908 } 2909 2910 /* Setup buffer sizes */ 2911 rctl &= ~E1000_RCTL_SZ_4096; 2912 rctl |= E1000_RCTL_BSEX; 2913 switch (adapter->rx_buffer_len) { 2914 case 2048: 2915 default: 2916 rctl |= E1000_RCTL_SZ_2048; 2917 rctl &= ~E1000_RCTL_BSEX; 2918 break; 2919 case 4096: 2920 rctl |= E1000_RCTL_SZ_4096; 2921 break; 2922 case 8192: 2923 rctl |= E1000_RCTL_SZ_8192; 2924 break; 2925 case 16384: 2926 rctl |= E1000_RCTL_SZ_16384; 2927 break; 2928 } 2929 2930 /* Enable Extended Status in all Receive Descriptors */ 2931 rfctl = er32(RFCTL); 2932 rfctl |= E1000_RFCTL_EXTEN; 2933 2934 /* 2935 * 82571 and greater support packet-split where the protocol 2936 * header is placed in skb->data and the packet data is 2937 * placed in pages hanging off of skb_shinfo(skb)->nr_frags. 2938 * In the case of a non-split, skb->data is linearly filled, 2939 * followed by the page buffers. Therefore, skb->data is 2940 * sized to hold the largest protocol header. 2941 * 2942 * allocations using alloc_page take too long for regular MTU 2943 * so only enable packet split for jumbo frames 2944 * 2945 * Using pages when the page size is greater than 16k wastes 2946 * a lot of memory, since we allocate 3 pages at all times 2947 * per packet. 2948 */ 2949 pages = PAGE_USE_COUNT(adapter->netdev->mtu); 2950 if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE)) 2951 adapter->rx_ps_pages = pages; 2952 else 2953 adapter->rx_ps_pages = 0; 2954 2955 if (adapter->rx_ps_pages) { 2956 u32 psrctl = 0; 2957 2958 /* 2959 * disable packet split support for IPv6 extension headers, 2960 * because some malformed IPv6 headers can hang the Rx 2961 */ 2962 rfctl |= (E1000_RFCTL_IPV6_EX_DIS | 2963 E1000_RFCTL_NEW_IPV6_EXT_DIS); 2964 2965 /* Enable Packet split descriptors */ 2966 rctl |= E1000_RCTL_DTYP_PS; 2967 2968 psrctl |= adapter->rx_ps_bsize0 >> 2969 E1000_PSRCTL_BSIZE0_SHIFT; 2970 2971 switch (adapter->rx_ps_pages) { 2972 case 3: 2973 psrctl |= PAGE_SIZE << 2974 E1000_PSRCTL_BSIZE3_SHIFT; 2975 case 2: 2976 psrctl |= PAGE_SIZE << 2977 E1000_PSRCTL_BSIZE2_SHIFT; 2978 case 1: 2979 psrctl |= PAGE_SIZE >> 2980 E1000_PSRCTL_BSIZE1_SHIFT; 2981 break; 2982 } 2983 2984 ew32(PSRCTL, psrctl); 2985 } 2986 2987 ew32(RFCTL, rfctl); 2988 ew32(RCTL, rctl); 2989 /* just started the receive unit, no need to restart */ 2990 adapter->flags &= ~FLAG_RX_RESTART_NOW; 2991 } 2992 2993 /** 2994 * e1000_configure_rx - Configure Receive Unit after Reset 2995 * @adapter: board private structure 2996 * 2997 * Configure the Rx unit of the MAC after a reset. 2998 **/ 2999 static void e1000_configure_rx(struct e1000_adapter *adapter) 3000 { 3001 struct e1000_hw *hw = &adapter->hw; 3002 struct e1000_ring *rx_ring = adapter->rx_ring; 3003 u64 rdba; 3004 u32 rdlen, rctl, rxcsum, ctrl_ext; 3005 3006 if (adapter->rx_ps_pages) { 3007 /* this is a 32 byte descriptor */ 3008 rdlen = rx_ring->count * 3009 sizeof(union e1000_rx_desc_packet_split); 3010 adapter->clean_rx = e1000_clean_rx_irq_ps; 3011 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps; 3012 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) { 3013 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended); 3014 adapter->clean_rx = e1000_clean_jumbo_rx_irq; 3015 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers; 3016 } else { 3017 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended); 3018 adapter->clean_rx = e1000_clean_rx_irq; 3019 adapter->alloc_rx_buf = e1000_alloc_rx_buffers; 3020 } 3021 3022 /* disable receives while setting up the descriptors */ 3023 rctl = er32(RCTL); 3024 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX)) 3025 ew32(RCTL, rctl & ~E1000_RCTL_EN); 3026 e1e_flush(); 3027 usleep_range(10000, 20000); 3028 3029 if (adapter->flags2 & FLAG2_DMA_BURST) { 3030 /* 3031 * set the writeback threshold (only takes effect if the RDTR 3032 * is set). set GRAN=1 and write back up to 0x4 worth, and 3033 * enable prefetching of 0x20 Rx descriptors 3034 * granularity = 01 3035 * wthresh = 04, 3036 * hthresh = 04, 3037 * pthresh = 0x20 3038 */ 3039 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE); 3040 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE); 3041 3042 /* 3043 * override the delay timers for enabling bursting, only if 3044 * the value was not set by the user via module options 3045 */ 3046 if (adapter->rx_int_delay == DEFAULT_RDTR) 3047 adapter->rx_int_delay = BURST_RDTR; 3048 if (adapter->rx_abs_int_delay == DEFAULT_RADV) 3049 adapter->rx_abs_int_delay = BURST_RADV; 3050 } 3051 3052 /* set the Receive Delay Timer Register */ 3053 ew32(RDTR, adapter->rx_int_delay); 3054 3055 /* irq moderation */ 3056 ew32(RADV, adapter->rx_abs_int_delay); 3057 if ((adapter->itr_setting != 0) && (adapter->itr != 0)) 3058 ew32(ITR, 1000000000 / (adapter->itr * 256)); 3059 3060 ctrl_ext = er32(CTRL_EXT); 3061 /* Auto-Mask interrupts upon ICR access */ 3062 ctrl_ext |= E1000_CTRL_EXT_IAME; 3063 ew32(IAM, 0xffffffff); 3064 ew32(CTRL_EXT, ctrl_ext); 3065 e1e_flush(); 3066 3067 /* 3068 * Setup the HW Rx Head and Tail Descriptor Pointers and 3069 * the Base and Length of the Rx Descriptor Ring 3070 */ 3071 rdba = rx_ring->dma; 3072 ew32(RDBAL, (rdba & DMA_BIT_MASK(32))); 3073 ew32(RDBAH, (rdba >> 32)); 3074 ew32(RDLEN, rdlen); 3075 ew32(RDH, 0); 3076 ew32(RDT, 0); 3077 rx_ring->head = adapter->hw.hw_addr + E1000_RDH; 3078 rx_ring->tail = adapter->hw.hw_addr + E1000_RDT; 3079 3080 /* Enable Receive Checksum Offload for TCP and UDP */ 3081 rxcsum = er32(RXCSUM); 3082 if (adapter->netdev->features & NETIF_F_RXCSUM) { 3083 rxcsum |= E1000_RXCSUM_TUOFL; 3084 3085 /* 3086 * IPv4 payload checksum for UDP fragments must be 3087 * used in conjunction with packet-split. 3088 */ 3089 if (adapter->rx_ps_pages) 3090 rxcsum |= E1000_RXCSUM_IPPCSE; 3091 } else { 3092 rxcsum &= ~E1000_RXCSUM_TUOFL; 3093 /* no need to clear IPPCSE as it defaults to 0 */ 3094 } 3095 ew32(RXCSUM, rxcsum); 3096 3097 if (adapter->hw.mac.type == e1000_pch2lan) { 3098 /* 3099 * With jumbo frames, excessive C-state transition 3100 * latencies result in dropped transactions. 3101 */ 3102 if (adapter->netdev->mtu > ETH_DATA_LEN) { 3103 u32 rxdctl = er32(RXDCTL(0)); 3104 ew32(RXDCTL(0), rxdctl | 0x3); 3105 pm_qos_update_request(&adapter->netdev->pm_qos_req, 55); 3106 } else { 3107 pm_qos_update_request(&adapter->netdev->pm_qos_req, 3108 PM_QOS_DEFAULT_VALUE); 3109 } 3110 } 3111 3112 /* Enable Receives */ 3113 ew32(RCTL, rctl); 3114 } 3115 3116 /** 3117 * e1000e_write_mc_addr_list - write multicast addresses to MTA 3118 * @netdev: network interface device structure 3119 * 3120 * Writes multicast address list to the MTA hash table. 3121 * Returns: -ENOMEM on failure 3122 * 0 on no addresses written 3123 * X on writing X addresses to MTA 3124 */ 3125 static int e1000e_write_mc_addr_list(struct net_device *netdev) 3126 { 3127 struct e1000_adapter *adapter = netdev_priv(netdev); 3128 struct e1000_hw *hw = &adapter->hw; 3129 struct netdev_hw_addr *ha; 3130 u8 *mta_list; 3131 int i; 3132 3133 if (netdev_mc_empty(netdev)) { 3134 /* nothing to program, so clear mc list */ 3135 hw->mac.ops.update_mc_addr_list(hw, NULL, 0); 3136 return 0; 3137 } 3138 3139 mta_list = kzalloc(netdev_mc_count(netdev) * ETH_ALEN, GFP_ATOMIC); 3140 if (!mta_list) 3141 return -ENOMEM; 3142 3143 /* update_mc_addr_list expects a packed array of only addresses. */ 3144 i = 0; 3145 netdev_for_each_mc_addr(ha, netdev) 3146 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN); 3147 3148 hw->mac.ops.update_mc_addr_list(hw, mta_list, i); 3149 kfree(mta_list); 3150 3151 return netdev_mc_count(netdev); 3152 } 3153 3154 /** 3155 * e1000e_write_uc_addr_list - write unicast addresses to RAR table 3156 * @netdev: network interface device structure 3157 * 3158 * Writes unicast address list to the RAR table. 3159 * Returns: -ENOMEM on failure/insufficient address space 3160 * 0 on no addresses written 3161 * X on writing X addresses to the RAR table 3162 **/ 3163 static int e1000e_write_uc_addr_list(struct net_device *netdev) 3164 { 3165 struct e1000_adapter *adapter = netdev_priv(netdev); 3166 struct e1000_hw *hw = &adapter->hw; 3167 unsigned int rar_entries = hw->mac.rar_entry_count; 3168 int count = 0; 3169 3170 /* save a rar entry for our hardware address */ 3171 rar_entries--; 3172 3173 /* save a rar entry for the LAA workaround */ 3174 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) 3175 rar_entries--; 3176 3177 /* return ENOMEM indicating insufficient memory for addresses */ 3178 if (netdev_uc_count(netdev) > rar_entries) 3179 return -ENOMEM; 3180 3181 if (!netdev_uc_empty(netdev) && rar_entries) { 3182 struct netdev_hw_addr *ha; 3183 3184 /* 3185 * write the addresses in reverse order to avoid write 3186 * combining 3187 */ 3188 netdev_for_each_uc_addr(ha, netdev) { 3189 if (!rar_entries) 3190 break; 3191 e1000e_rar_set(hw, ha->addr, rar_entries--); 3192 count++; 3193 } 3194 } 3195 3196 /* zero out the remaining RAR entries not used above */ 3197 for (; rar_entries > 0; rar_entries--) { 3198 ew32(RAH(rar_entries), 0); 3199 ew32(RAL(rar_entries), 0); 3200 } 3201 e1e_flush(); 3202 3203 return count; 3204 } 3205 3206 /** 3207 * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set 3208 * @netdev: network interface device structure 3209 * 3210 * The ndo_set_rx_mode entry point is called whenever the unicast or multicast 3211 * address list or the network interface flags are updated. This routine is 3212 * responsible for configuring the hardware for proper unicast, multicast, 3213 * promiscuous mode, and all-multi behavior. 3214 **/ 3215 static void e1000e_set_rx_mode(struct net_device *netdev) 3216 { 3217 struct e1000_adapter *adapter = netdev_priv(netdev); 3218 struct e1000_hw *hw = &adapter->hw; 3219 u32 rctl; 3220 3221 /* Check for Promiscuous and All Multicast modes */ 3222 rctl = er32(RCTL); 3223 3224 /* clear the affected bits */ 3225 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE); 3226 3227 if (netdev->flags & IFF_PROMISC) { 3228 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); 3229 /* Do not hardware filter VLANs in promisc mode */ 3230 e1000e_vlan_filter_disable(adapter); 3231 } else { 3232 int count; 3233 if (netdev->flags & IFF_ALLMULTI) { 3234 rctl |= E1000_RCTL_MPE; 3235 } else { 3236 /* 3237 * Write addresses to the MTA, if the attempt fails 3238 * then we should just turn on promiscuous mode so 3239 * that we can at least receive multicast traffic 3240 */ 3241 count = e1000e_write_mc_addr_list(netdev); 3242 if (count < 0) 3243 rctl |= E1000_RCTL_MPE; 3244 } 3245 e1000e_vlan_filter_enable(adapter); 3246 /* 3247 * Write addresses to available RAR registers, if there is not 3248 * sufficient space to store all the addresses then enable 3249 * unicast promiscuous mode 3250 */ 3251 count = e1000e_write_uc_addr_list(netdev); 3252 if (count < 0) 3253 rctl |= E1000_RCTL_UPE; 3254 } 3255 3256 ew32(RCTL, rctl); 3257 3258 if (netdev->features & NETIF_F_HW_VLAN_RX) 3259 e1000e_vlan_strip_enable(adapter); 3260 else 3261 e1000e_vlan_strip_disable(adapter); 3262 } 3263 3264 static void e1000e_setup_rss_hash(struct e1000_adapter *adapter) 3265 { 3266 struct e1000_hw *hw = &adapter->hw; 3267 u32 mrqc, rxcsum; 3268 int i; 3269 static const u32 rsskey[10] = { 3270 0xda565a6d, 0xc20e5b25, 0x3d256741, 0xb08fa343, 0xcb2bcad0, 3271 0xb4307bae, 0xa32dcb77, 0x0cf23080, 0x3bb7426a, 0xfa01acbe 3272 }; 3273 3274 /* Fill out hash function seed */ 3275 for (i = 0; i < 10; i++) 3276 ew32(RSSRK(i), rsskey[i]); 3277 3278 /* Direct all traffic to queue 0 */ 3279 for (i = 0; i < 32; i++) 3280 ew32(RETA(i), 0); 3281 3282 /* 3283 * Disable raw packet checksumming so that RSS hash is placed in 3284 * descriptor on writeback. 3285 */ 3286 rxcsum = er32(RXCSUM); 3287 rxcsum |= E1000_RXCSUM_PCSD; 3288 3289 ew32(RXCSUM, rxcsum); 3290 3291 mrqc = (E1000_MRQC_RSS_FIELD_IPV4 | 3292 E1000_MRQC_RSS_FIELD_IPV4_TCP | 3293 E1000_MRQC_RSS_FIELD_IPV6 | 3294 E1000_MRQC_RSS_FIELD_IPV6_TCP | 3295 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX); 3296 3297 ew32(MRQC, mrqc); 3298 } 3299 3300 /** 3301 * e1000_configure - configure the hardware for Rx and Tx 3302 * @adapter: private board structure 3303 **/ 3304 static void e1000_configure(struct e1000_adapter *adapter) 3305 { 3306 struct e1000_ring *rx_ring = adapter->rx_ring; 3307 3308 e1000e_set_rx_mode(adapter->netdev); 3309 3310 e1000_restore_vlan(adapter); 3311 e1000_init_manageability_pt(adapter); 3312 3313 e1000_configure_tx(adapter); 3314 3315 if (adapter->netdev->features & NETIF_F_RXHASH) 3316 e1000e_setup_rss_hash(adapter); 3317 e1000_setup_rctl(adapter); 3318 e1000_configure_rx(adapter); 3319 adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL); 3320 } 3321 3322 /** 3323 * e1000e_power_up_phy - restore link in case the phy was powered down 3324 * @adapter: address of board private structure 3325 * 3326 * The phy may be powered down to save power and turn off link when the 3327 * driver is unloaded and wake on lan is not enabled (among others) 3328 * *** this routine MUST be followed by a call to e1000e_reset *** 3329 **/ 3330 void e1000e_power_up_phy(struct e1000_adapter *adapter) 3331 { 3332 if (adapter->hw.phy.ops.power_up) 3333 adapter->hw.phy.ops.power_up(&adapter->hw); 3334 3335 adapter->hw.mac.ops.setup_link(&adapter->hw); 3336 } 3337 3338 /** 3339 * e1000_power_down_phy - Power down the PHY 3340 * 3341 * Power down the PHY so no link is implied when interface is down. 3342 * The PHY cannot be powered down if management or WoL is active. 3343 */ 3344 static void e1000_power_down_phy(struct e1000_adapter *adapter) 3345 { 3346 /* WoL is enabled */ 3347 if (adapter->wol) 3348 return; 3349 3350 if (adapter->hw.phy.ops.power_down) 3351 adapter->hw.phy.ops.power_down(&adapter->hw); 3352 } 3353 3354 /** 3355 * e1000e_reset - bring the hardware into a known good state 3356 * 3357 * This function boots the hardware and enables some settings that 3358 * require a configuration cycle of the hardware - those cannot be 3359 * set/changed during runtime. After reset the device needs to be 3360 * properly configured for Rx, Tx etc. 3361 */ 3362 void e1000e_reset(struct e1000_adapter *adapter) 3363 { 3364 struct e1000_mac_info *mac = &adapter->hw.mac; 3365 struct e1000_fc_info *fc = &adapter->hw.fc; 3366 struct e1000_hw *hw = &adapter->hw; 3367 u32 tx_space, min_tx_space, min_rx_space; 3368 u32 pba = adapter->pba; 3369 u16 hwm; 3370 3371 /* reset Packet Buffer Allocation to default */ 3372 ew32(PBA, pba); 3373 3374 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) { 3375 /* 3376 * To maintain wire speed transmits, the Tx FIFO should be 3377 * large enough to accommodate two full transmit packets, 3378 * rounded up to the next 1KB and expressed in KB. Likewise, 3379 * the Rx FIFO should be large enough to accommodate at least 3380 * one full receive packet and is similarly rounded up and 3381 * expressed in KB. 3382 */ 3383 pba = er32(PBA); 3384 /* upper 16 bits has Tx packet buffer allocation size in KB */ 3385 tx_space = pba >> 16; 3386 /* lower 16 bits has Rx packet buffer allocation size in KB */ 3387 pba &= 0xffff; 3388 /* 3389 * the Tx fifo also stores 16 bytes of information about the Tx 3390 * but don't include ethernet FCS because hardware appends it 3391 */ 3392 min_tx_space = (adapter->max_frame_size + 3393 sizeof(struct e1000_tx_desc) - 3394 ETH_FCS_LEN) * 2; 3395 min_tx_space = ALIGN(min_tx_space, 1024); 3396 min_tx_space >>= 10; 3397 /* software strips receive CRC, so leave room for it */ 3398 min_rx_space = adapter->max_frame_size; 3399 min_rx_space = ALIGN(min_rx_space, 1024); 3400 min_rx_space >>= 10; 3401 3402 /* 3403 * If current Tx allocation is less than the min Tx FIFO size, 3404 * and the min Tx FIFO size is less than the current Rx FIFO 3405 * allocation, take space away from current Rx allocation 3406 */ 3407 if ((tx_space < min_tx_space) && 3408 ((min_tx_space - tx_space) < pba)) { 3409 pba -= min_tx_space - tx_space; 3410 3411 /* 3412 * if short on Rx space, Rx wins and must trump Tx 3413 * adjustment or use Early Receive if available 3414 */ 3415 if (pba < min_rx_space) 3416 pba = min_rx_space; 3417 } 3418 3419 ew32(PBA, pba); 3420 } 3421 3422 /* 3423 * flow control settings 3424 * 3425 * The high water mark must be low enough to fit one full frame 3426 * (or the size used for early receive) above it in the Rx FIFO. 3427 * Set it to the lower of: 3428 * - 90% of the Rx FIFO size, and 3429 * - the full Rx FIFO size minus one full frame 3430 */ 3431 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME) 3432 fc->pause_time = 0xFFFF; 3433 else 3434 fc->pause_time = E1000_FC_PAUSE_TIME; 3435 fc->send_xon = 1; 3436 fc->current_mode = fc->requested_mode; 3437 3438 switch (hw->mac.type) { 3439 case e1000_ich9lan: 3440 case e1000_ich10lan: 3441 if (adapter->netdev->mtu > ETH_DATA_LEN) { 3442 pba = 14; 3443 ew32(PBA, pba); 3444 fc->high_water = 0x2800; 3445 fc->low_water = fc->high_water - 8; 3446 break; 3447 } 3448 /* fall-through */ 3449 default: 3450 hwm = min(((pba << 10) * 9 / 10), 3451 ((pba << 10) - adapter->max_frame_size)); 3452 3453 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */ 3454 fc->low_water = fc->high_water - 8; 3455 break; 3456 case e1000_pchlan: 3457 /* 3458 * Workaround PCH LOM adapter hangs with certain network 3459 * loads. If hangs persist, try disabling Tx flow control. 3460 */ 3461 if (adapter->netdev->mtu > ETH_DATA_LEN) { 3462 fc->high_water = 0x3500; 3463 fc->low_water = 0x1500; 3464 } else { 3465 fc->high_water = 0x5000; 3466 fc->low_water = 0x3000; 3467 } 3468 fc->refresh_time = 0x1000; 3469 break; 3470 case e1000_pch2lan: 3471 fc->high_water = 0x05C20; 3472 fc->low_water = 0x05048; 3473 fc->pause_time = 0x0650; 3474 fc->refresh_time = 0x0400; 3475 if (adapter->netdev->mtu > ETH_DATA_LEN) { 3476 pba = 14; 3477 ew32(PBA, pba); 3478 } 3479 break; 3480 } 3481 3482 /* 3483 * Disable Adaptive Interrupt Moderation if 2 full packets cannot 3484 * fit in receive buffer. 3485 */ 3486 if (adapter->itr_setting & 0x3) { 3487 if ((adapter->max_frame_size * 2) > (pba << 10)) { 3488 if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) { 3489 dev_info(&adapter->pdev->dev, 3490 "Interrupt Throttle Rate turned off\n"); 3491 adapter->flags2 |= FLAG2_DISABLE_AIM; 3492 ew32(ITR, 0); 3493 } 3494 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) { 3495 dev_info(&adapter->pdev->dev, 3496 "Interrupt Throttle Rate turned on\n"); 3497 adapter->flags2 &= ~FLAG2_DISABLE_AIM; 3498 adapter->itr = 20000; 3499 ew32(ITR, 1000000000 / (adapter->itr * 256)); 3500 } 3501 } 3502 3503 /* Allow time for pending master requests to run */ 3504 mac->ops.reset_hw(hw); 3505 3506 /* 3507 * For parts with AMT enabled, let the firmware know 3508 * that the network interface is in control 3509 */ 3510 if (adapter->flags & FLAG_HAS_AMT) 3511 e1000e_get_hw_control(adapter); 3512 3513 ew32(WUC, 0); 3514 3515 if (mac->ops.init_hw(hw)) 3516 e_err("Hardware Error\n"); 3517 3518 e1000_update_mng_vlan(adapter); 3519 3520 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */ 3521 ew32(VET, ETH_P_8021Q); 3522 3523 e1000e_reset_adaptive(hw); 3524 3525 if (!netif_running(adapter->netdev) && 3526 !test_bit(__E1000_TESTING, &adapter->state)) { 3527 e1000_power_down_phy(adapter); 3528 return; 3529 } 3530 3531 e1000_get_phy_info(hw); 3532 3533 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) && 3534 !(adapter->flags & FLAG_SMART_POWER_DOWN)) { 3535 u16 phy_data = 0; 3536 /* 3537 * speed up time to link by disabling smart power down, ignore 3538 * the return value of this function because there is nothing 3539 * different we would do if it failed 3540 */ 3541 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data); 3542 phy_data &= ~IGP02E1000_PM_SPD; 3543 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data); 3544 } 3545 } 3546 3547 int e1000e_up(struct e1000_adapter *adapter) 3548 { 3549 struct e1000_hw *hw = &adapter->hw; 3550 3551 /* hardware has been reset, we need to reload some things */ 3552 e1000_configure(adapter); 3553 3554 clear_bit(__E1000_DOWN, &adapter->state); 3555 3556 if (adapter->msix_entries) 3557 e1000_configure_msix(adapter); 3558 e1000_irq_enable(adapter); 3559 3560 netif_start_queue(adapter->netdev); 3561 3562 /* fire a link change interrupt to start the watchdog */ 3563 if (adapter->msix_entries) 3564 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER); 3565 else 3566 ew32(ICS, E1000_ICS_LSC); 3567 3568 return 0; 3569 } 3570 3571 static void e1000e_flush_descriptors(struct e1000_adapter *adapter) 3572 { 3573 struct e1000_hw *hw = &adapter->hw; 3574 3575 if (!(adapter->flags2 & FLAG2_DMA_BURST)) 3576 return; 3577 3578 /* flush pending descriptor writebacks to memory */ 3579 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); 3580 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD); 3581 3582 /* execute the writes immediately */ 3583 e1e_flush(); 3584 } 3585 3586 static void e1000e_update_stats(struct e1000_adapter *adapter); 3587 3588 void e1000e_down(struct e1000_adapter *adapter) 3589 { 3590 struct net_device *netdev = adapter->netdev; 3591 struct e1000_hw *hw = &adapter->hw; 3592 u32 tctl, rctl; 3593 3594 /* 3595 * signal that we're down so the interrupt handler does not 3596 * reschedule our watchdog timer 3597 */ 3598 set_bit(__E1000_DOWN, &adapter->state); 3599 3600 /* disable receives in the hardware */ 3601 rctl = er32(RCTL); 3602 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX)) 3603 ew32(RCTL, rctl & ~E1000_RCTL_EN); 3604 /* flush and sleep below */ 3605 3606 netif_stop_queue(netdev); 3607 3608 /* disable transmits in the hardware */ 3609 tctl = er32(TCTL); 3610 tctl &= ~E1000_TCTL_EN; 3611 ew32(TCTL, tctl); 3612 3613 /* flush both disables and wait for them to finish */ 3614 e1e_flush(); 3615 usleep_range(10000, 20000); 3616 3617 e1000_irq_disable(adapter); 3618 3619 del_timer_sync(&adapter->watchdog_timer); 3620 del_timer_sync(&adapter->phy_info_timer); 3621 3622 netif_carrier_off(netdev); 3623 3624 spin_lock(&adapter->stats64_lock); 3625 e1000e_update_stats(adapter); 3626 spin_unlock(&adapter->stats64_lock); 3627 3628 e1000e_flush_descriptors(adapter); 3629 e1000_clean_tx_ring(adapter->tx_ring); 3630 e1000_clean_rx_ring(adapter->rx_ring); 3631 3632 adapter->link_speed = 0; 3633 adapter->link_duplex = 0; 3634 3635 if (!pci_channel_offline(adapter->pdev)) 3636 e1000e_reset(adapter); 3637 3638 /* 3639 * TODO: for power management, we could drop the link and 3640 * pci_disable_device here. 3641 */ 3642 } 3643 3644 void e1000e_reinit_locked(struct e1000_adapter *adapter) 3645 { 3646 might_sleep(); 3647 while (test_and_set_bit(__E1000_RESETTING, &adapter->state)) 3648 usleep_range(1000, 2000); 3649 e1000e_down(adapter); 3650 e1000e_up(adapter); 3651 clear_bit(__E1000_RESETTING, &adapter->state); 3652 } 3653 3654 /** 3655 * e1000_sw_init - Initialize general software structures (struct e1000_adapter) 3656 * @adapter: board private structure to initialize 3657 * 3658 * e1000_sw_init initializes the Adapter private data structure. 3659 * Fields are initialized based on PCI device information and 3660 * OS network device settings (MTU size). 3661 **/ 3662 static int __devinit e1000_sw_init(struct e1000_adapter *adapter) 3663 { 3664 struct net_device *netdev = adapter->netdev; 3665 3666 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN; 3667 adapter->rx_ps_bsize0 = 128; 3668 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; 3669 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN; 3670 adapter->tx_ring_count = E1000_DEFAULT_TXD; 3671 adapter->rx_ring_count = E1000_DEFAULT_RXD; 3672 3673 spin_lock_init(&adapter->stats64_lock); 3674 3675 e1000e_set_interrupt_capability(adapter); 3676 3677 if (e1000_alloc_queues(adapter)) 3678 return -ENOMEM; 3679 3680 /* Explicitly disable IRQ since the NIC can be in any state. */ 3681 e1000_irq_disable(adapter); 3682 3683 set_bit(__E1000_DOWN, &adapter->state); 3684 return 0; 3685 } 3686 3687 /** 3688 * e1000_intr_msi_test - Interrupt Handler 3689 * @irq: interrupt number 3690 * @data: pointer to a network interface device structure 3691 **/ 3692 static irqreturn_t e1000_intr_msi_test(int irq, void *data) 3693 { 3694 struct net_device *netdev = data; 3695 struct e1000_adapter *adapter = netdev_priv(netdev); 3696 struct e1000_hw *hw = &adapter->hw; 3697 u32 icr = er32(ICR); 3698 3699 e_dbg("icr is %08X\n", icr); 3700 if (icr & E1000_ICR_RXSEQ) { 3701 adapter->flags &= ~FLAG_MSI_TEST_FAILED; 3702 wmb(); 3703 } 3704 3705 return IRQ_HANDLED; 3706 } 3707 3708 /** 3709 * e1000_test_msi_interrupt - Returns 0 for successful test 3710 * @adapter: board private struct 3711 * 3712 * code flow taken from tg3.c 3713 **/ 3714 static int e1000_test_msi_interrupt(struct e1000_adapter *adapter) 3715 { 3716 struct net_device *netdev = adapter->netdev; 3717 struct e1000_hw *hw = &adapter->hw; 3718 int err; 3719 3720 /* poll_enable hasn't been called yet, so don't need disable */ 3721 /* clear any pending events */ 3722 er32(ICR); 3723 3724 /* free the real vector and request a test handler */ 3725 e1000_free_irq(adapter); 3726 e1000e_reset_interrupt_capability(adapter); 3727 3728 /* Assume that the test fails, if it succeeds then the test 3729 * MSI irq handler will unset this flag */ 3730 adapter->flags |= FLAG_MSI_TEST_FAILED; 3731 3732 err = pci_enable_msi(adapter->pdev); 3733 if (err) 3734 goto msi_test_failed; 3735 3736 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0, 3737 netdev->name, netdev); 3738 if (err) { 3739 pci_disable_msi(adapter->pdev); 3740 goto msi_test_failed; 3741 } 3742 3743 wmb(); 3744 3745 e1000_irq_enable(adapter); 3746 3747 /* fire an unusual interrupt on the test handler */ 3748 ew32(ICS, E1000_ICS_RXSEQ); 3749 e1e_flush(); 3750 msleep(50); 3751 3752 e1000_irq_disable(adapter); 3753 3754 rmb(); 3755 3756 if (adapter->flags & FLAG_MSI_TEST_FAILED) { 3757 adapter->int_mode = E1000E_INT_MODE_LEGACY; 3758 e_info("MSI interrupt test failed, using legacy interrupt.\n"); 3759 } else 3760 e_dbg("MSI interrupt test succeeded!\n"); 3761 3762 free_irq(adapter->pdev->irq, netdev); 3763 pci_disable_msi(adapter->pdev); 3764 3765 msi_test_failed: 3766 e1000e_set_interrupt_capability(adapter); 3767 return e1000_request_irq(adapter); 3768 } 3769 3770 /** 3771 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored 3772 * @adapter: board private struct 3773 * 3774 * code flow taken from tg3.c, called with e1000 interrupts disabled. 3775 **/ 3776 static int e1000_test_msi(struct e1000_adapter *adapter) 3777 { 3778 int err; 3779 u16 pci_cmd; 3780 3781 if (!(adapter->flags & FLAG_MSI_ENABLED)) 3782 return 0; 3783 3784 /* disable SERR in case the MSI write causes a master abort */ 3785 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd); 3786 if (pci_cmd & PCI_COMMAND_SERR) 3787 pci_write_config_word(adapter->pdev, PCI_COMMAND, 3788 pci_cmd & ~PCI_COMMAND_SERR); 3789 3790 err = e1000_test_msi_interrupt(adapter); 3791 3792 /* re-enable SERR */ 3793 if (pci_cmd & PCI_COMMAND_SERR) { 3794 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd); 3795 pci_cmd |= PCI_COMMAND_SERR; 3796 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd); 3797 } 3798 3799 return err; 3800 } 3801 3802 /** 3803 * e1000_open - Called when a network interface is made active 3804 * @netdev: network interface device structure 3805 * 3806 * Returns 0 on success, negative value on failure 3807 * 3808 * The open entry point is called when a network interface is made 3809 * active by the system (IFF_UP). At this point all resources needed 3810 * for transmit and receive operations are allocated, the interrupt 3811 * handler is registered with the OS, the watchdog timer is started, 3812 * and the stack is notified that the interface is ready. 3813 **/ 3814 static int e1000_open(struct net_device *netdev) 3815 { 3816 struct e1000_adapter *adapter = netdev_priv(netdev); 3817 struct e1000_hw *hw = &adapter->hw; 3818 struct pci_dev *pdev = adapter->pdev; 3819 int err; 3820 3821 /* disallow open during test */ 3822 if (test_bit(__E1000_TESTING, &adapter->state)) 3823 return -EBUSY; 3824 3825 pm_runtime_get_sync(&pdev->dev); 3826 3827 netif_carrier_off(netdev); 3828 3829 /* allocate transmit descriptors */ 3830 err = e1000e_setup_tx_resources(adapter->tx_ring); 3831 if (err) 3832 goto err_setup_tx; 3833 3834 /* allocate receive descriptors */ 3835 err = e1000e_setup_rx_resources(adapter->rx_ring); 3836 if (err) 3837 goto err_setup_rx; 3838 3839 /* 3840 * If AMT is enabled, let the firmware know that the network 3841 * interface is now open and reset the part to a known state. 3842 */ 3843 if (adapter->flags & FLAG_HAS_AMT) { 3844 e1000e_get_hw_control(adapter); 3845 e1000e_reset(adapter); 3846 } 3847 3848 e1000e_power_up_phy(adapter); 3849 3850 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; 3851 if ((adapter->hw.mng_cookie.status & 3852 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)) 3853 e1000_update_mng_vlan(adapter); 3854 3855 /* DMA latency requirement to workaround jumbo issue */ 3856 if (adapter->hw.mac.type == e1000_pch2lan) 3857 pm_qos_add_request(&adapter->netdev->pm_qos_req, 3858 PM_QOS_CPU_DMA_LATENCY, 3859 PM_QOS_DEFAULT_VALUE); 3860 3861 /* 3862 * before we allocate an interrupt, we must be ready to handle it. 3863 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt 3864 * as soon as we call pci_request_irq, so we have to setup our 3865 * clean_rx handler before we do so. 3866 */ 3867 e1000_configure(adapter); 3868 3869 err = e1000_request_irq(adapter); 3870 if (err) 3871 goto err_req_irq; 3872 3873 /* 3874 * Work around PCIe errata with MSI interrupts causing some chipsets to 3875 * ignore e1000e MSI messages, which means we need to test our MSI 3876 * interrupt now 3877 */ 3878 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) { 3879 err = e1000_test_msi(adapter); 3880 if (err) { 3881 e_err("Interrupt allocation failed\n"); 3882 goto err_req_irq; 3883 } 3884 } 3885 3886 /* From here on the code is the same as e1000e_up() */ 3887 clear_bit(__E1000_DOWN, &adapter->state); 3888 3889 napi_enable(&adapter->napi); 3890 3891 e1000_irq_enable(adapter); 3892 3893 adapter->tx_hang_recheck = false; 3894 netif_start_queue(netdev); 3895 3896 adapter->idle_check = true; 3897 pm_runtime_put(&pdev->dev); 3898 3899 /* fire a link status change interrupt to start the watchdog */ 3900 if (adapter->msix_entries) 3901 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER); 3902 else 3903 ew32(ICS, E1000_ICS_LSC); 3904 3905 return 0; 3906 3907 err_req_irq: 3908 e1000e_release_hw_control(adapter); 3909 e1000_power_down_phy(adapter); 3910 e1000e_free_rx_resources(adapter->rx_ring); 3911 err_setup_rx: 3912 e1000e_free_tx_resources(adapter->tx_ring); 3913 err_setup_tx: 3914 e1000e_reset(adapter); 3915 pm_runtime_put_sync(&pdev->dev); 3916 3917 return err; 3918 } 3919 3920 /** 3921 * e1000_close - Disables a network interface 3922 * @netdev: network interface device structure 3923 * 3924 * Returns 0, this is not allowed to fail 3925 * 3926 * The close entry point is called when an interface is de-activated 3927 * by the OS. The hardware is still under the drivers control, but 3928 * needs to be disabled. A global MAC reset is issued to stop the 3929 * hardware, and all transmit and receive resources are freed. 3930 **/ 3931 static int e1000_close(struct net_device *netdev) 3932 { 3933 struct e1000_adapter *adapter = netdev_priv(netdev); 3934 struct pci_dev *pdev = adapter->pdev; 3935 3936 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state)); 3937 3938 pm_runtime_get_sync(&pdev->dev); 3939 3940 napi_disable(&adapter->napi); 3941 3942 if (!test_bit(__E1000_DOWN, &adapter->state)) { 3943 e1000e_down(adapter); 3944 e1000_free_irq(adapter); 3945 } 3946 e1000_power_down_phy(adapter); 3947 3948 e1000e_free_tx_resources(adapter->tx_ring); 3949 e1000e_free_rx_resources(adapter->rx_ring); 3950 3951 /* 3952 * kill manageability vlan ID if supported, but not if a vlan with 3953 * the same ID is registered on the host OS (let 8021q kill it) 3954 */ 3955 if (adapter->hw.mng_cookie.status & 3956 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) 3957 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); 3958 3959 /* 3960 * If AMT is enabled, let the firmware know that the network 3961 * interface is now closed 3962 */ 3963 if ((adapter->flags & FLAG_HAS_AMT) && 3964 !test_bit(__E1000_TESTING, &adapter->state)) 3965 e1000e_release_hw_control(adapter); 3966 3967 if (adapter->hw.mac.type == e1000_pch2lan) 3968 pm_qos_remove_request(&adapter->netdev->pm_qos_req); 3969 3970 pm_runtime_put_sync(&pdev->dev); 3971 3972 return 0; 3973 } 3974 /** 3975 * e1000_set_mac - Change the Ethernet Address of the NIC 3976 * @netdev: network interface device structure 3977 * @p: pointer to an address structure 3978 * 3979 * Returns 0 on success, negative on failure 3980 **/ 3981 static int e1000_set_mac(struct net_device *netdev, void *p) 3982 { 3983 struct e1000_adapter *adapter = netdev_priv(netdev); 3984 struct sockaddr *addr = p; 3985 3986 if (!is_valid_ether_addr(addr->sa_data)) 3987 return -EADDRNOTAVAIL; 3988 3989 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 3990 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len); 3991 3992 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0); 3993 3994 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) { 3995 /* activate the work around */ 3996 e1000e_set_laa_state_82571(&adapter->hw, 1); 3997 3998 /* 3999 * Hold a copy of the LAA in RAR[14] This is done so that 4000 * between the time RAR[0] gets clobbered and the time it 4001 * gets fixed (in e1000_watchdog), the actual LAA is in one 4002 * of the RARs and no incoming packets directed to this port 4003 * are dropped. Eventually the LAA will be in RAR[0] and 4004 * RAR[14] 4005 */ 4006 e1000e_rar_set(&adapter->hw, 4007 adapter->hw.mac.addr, 4008 adapter->hw.mac.rar_entry_count - 1); 4009 } 4010 4011 return 0; 4012 } 4013 4014 /** 4015 * e1000e_update_phy_task - work thread to update phy 4016 * @work: pointer to our work struct 4017 * 4018 * this worker thread exists because we must acquire a 4019 * semaphore to read the phy, which we could msleep while 4020 * waiting for it, and we can't msleep in a timer. 4021 **/ 4022 static void e1000e_update_phy_task(struct work_struct *work) 4023 { 4024 struct e1000_adapter *adapter = container_of(work, 4025 struct e1000_adapter, update_phy_task); 4026 4027 if (test_bit(__E1000_DOWN, &adapter->state)) 4028 return; 4029 4030 e1000_get_phy_info(&adapter->hw); 4031 } 4032 4033 /* 4034 * Need to wait a few seconds after link up to get diagnostic information from 4035 * the phy 4036 */ 4037 static void e1000_update_phy_info(unsigned long data) 4038 { 4039 struct e1000_adapter *adapter = (struct e1000_adapter *) data; 4040 4041 if (test_bit(__E1000_DOWN, &adapter->state)) 4042 return; 4043 4044 schedule_work(&adapter->update_phy_task); 4045 } 4046 4047 /** 4048 * e1000e_update_phy_stats - Update the PHY statistics counters 4049 * @adapter: board private structure 4050 * 4051 * Read/clear the upper 16-bit PHY registers and read/accumulate lower 4052 **/ 4053 static void e1000e_update_phy_stats(struct e1000_adapter *adapter) 4054 { 4055 struct e1000_hw *hw = &adapter->hw; 4056 s32 ret_val; 4057 u16 phy_data; 4058 4059 ret_val = hw->phy.ops.acquire(hw); 4060 if (ret_val) 4061 return; 4062 4063 /* 4064 * A page set is expensive so check if already on desired page. 4065 * If not, set to the page with the PHY status registers. 4066 */ 4067 hw->phy.addr = 1; 4068 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, 4069 &phy_data); 4070 if (ret_val) 4071 goto release; 4072 if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) { 4073 ret_val = hw->phy.ops.set_page(hw, 4074 HV_STATS_PAGE << IGP_PAGE_SHIFT); 4075 if (ret_val) 4076 goto release; 4077 } 4078 4079 /* Single Collision Count */ 4080 hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data); 4081 ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data); 4082 if (!ret_val) 4083 adapter->stats.scc += phy_data; 4084 4085 /* Excessive Collision Count */ 4086 hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data); 4087 ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data); 4088 if (!ret_val) 4089 adapter->stats.ecol += phy_data; 4090 4091 /* Multiple Collision Count */ 4092 hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data); 4093 ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data); 4094 if (!ret_val) 4095 adapter->stats.mcc += phy_data; 4096 4097 /* Late Collision Count */ 4098 hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data); 4099 ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data); 4100 if (!ret_val) 4101 adapter->stats.latecol += phy_data; 4102 4103 /* Collision Count - also used for adaptive IFS */ 4104 hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data); 4105 ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data); 4106 if (!ret_val) 4107 hw->mac.collision_delta = phy_data; 4108 4109 /* Defer Count */ 4110 hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data); 4111 ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data); 4112 if (!ret_val) 4113 adapter->stats.dc += phy_data; 4114 4115 /* Transmit with no CRS */ 4116 hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data); 4117 ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data); 4118 if (!ret_val) 4119 adapter->stats.tncrs += phy_data; 4120 4121 release: 4122 hw->phy.ops.release(hw); 4123 } 4124 4125 /** 4126 * e1000e_update_stats - Update the board statistics counters 4127 * @adapter: board private structure 4128 **/ 4129 static void e1000e_update_stats(struct e1000_adapter *adapter) 4130 { 4131 struct net_device *netdev = adapter->netdev; 4132 struct e1000_hw *hw = &adapter->hw; 4133 struct pci_dev *pdev = adapter->pdev; 4134 4135 /* 4136 * Prevent stats update while adapter is being reset, or if the pci 4137 * connection is down. 4138 */ 4139 if (adapter->link_speed == 0) 4140 return; 4141 if (pci_channel_offline(pdev)) 4142 return; 4143 4144 adapter->stats.crcerrs += er32(CRCERRS); 4145 adapter->stats.gprc += er32(GPRC); 4146 adapter->stats.gorc += er32(GORCL); 4147 er32(GORCH); /* Clear gorc */ 4148 adapter->stats.bprc += er32(BPRC); 4149 adapter->stats.mprc += er32(MPRC); 4150 adapter->stats.roc += er32(ROC); 4151 4152 adapter->stats.mpc += er32(MPC); 4153 4154 /* Half-duplex statistics */ 4155 if (adapter->link_duplex == HALF_DUPLEX) { 4156 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) { 4157 e1000e_update_phy_stats(adapter); 4158 } else { 4159 adapter->stats.scc += er32(SCC); 4160 adapter->stats.ecol += er32(ECOL); 4161 adapter->stats.mcc += er32(MCC); 4162 adapter->stats.latecol += er32(LATECOL); 4163 adapter->stats.dc += er32(DC); 4164 4165 hw->mac.collision_delta = er32(COLC); 4166 4167 if ((hw->mac.type != e1000_82574) && 4168 (hw->mac.type != e1000_82583)) 4169 adapter->stats.tncrs += er32(TNCRS); 4170 } 4171 adapter->stats.colc += hw->mac.collision_delta; 4172 } 4173 4174 adapter->stats.xonrxc += er32(XONRXC); 4175 adapter->stats.xontxc += er32(XONTXC); 4176 adapter->stats.xoffrxc += er32(XOFFRXC); 4177 adapter->stats.xofftxc += er32(XOFFTXC); 4178 adapter->stats.gptc += er32(GPTC); 4179 adapter->stats.gotc += er32(GOTCL); 4180 er32(GOTCH); /* Clear gotc */ 4181 adapter->stats.rnbc += er32(RNBC); 4182 adapter->stats.ruc += er32(RUC); 4183 4184 adapter->stats.mptc += er32(MPTC); 4185 adapter->stats.bptc += er32(BPTC); 4186 4187 /* used for adaptive IFS */ 4188 4189 hw->mac.tx_packet_delta = er32(TPT); 4190 adapter->stats.tpt += hw->mac.tx_packet_delta; 4191 4192 adapter->stats.algnerrc += er32(ALGNERRC); 4193 adapter->stats.rxerrc += er32(RXERRC); 4194 adapter->stats.cexterr += er32(CEXTERR); 4195 adapter->stats.tsctc += er32(TSCTC); 4196 adapter->stats.tsctfc += er32(TSCTFC); 4197 4198 /* Fill out the OS statistics structure */ 4199 netdev->stats.multicast = adapter->stats.mprc; 4200 netdev->stats.collisions = adapter->stats.colc; 4201 4202 /* Rx Errors */ 4203 4204 /* 4205 * RLEC on some newer hardware can be incorrect so build 4206 * our own version based on RUC and ROC 4207 */ 4208 netdev->stats.rx_errors = adapter->stats.rxerrc + 4209 adapter->stats.crcerrs + adapter->stats.algnerrc + 4210 adapter->stats.ruc + adapter->stats.roc + 4211 adapter->stats.cexterr; 4212 netdev->stats.rx_length_errors = adapter->stats.ruc + 4213 adapter->stats.roc; 4214 netdev->stats.rx_crc_errors = adapter->stats.crcerrs; 4215 netdev->stats.rx_frame_errors = adapter->stats.algnerrc; 4216 netdev->stats.rx_missed_errors = adapter->stats.mpc; 4217 4218 /* Tx Errors */ 4219 netdev->stats.tx_errors = adapter->stats.ecol + 4220 adapter->stats.latecol; 4221 netdev->stats.tx_aborted_errors = adapter->stats.ecol; 4222 netdev->stats.tx_window_errors = adapter->stats.latecol; 4223 netdev->stats.tx_carrier_errors = adapter->stats.tncrs; 4224 4225 /* Tx Dropped needs to be maintained elsewhere */ 4226 4227 /* Management Stats */ 4228 adapter->stats.mgptc += er32(MGTPTC); 4229 adapter->stats.mgprc += er32(MGTPRC); 4230 adapter->stats.mgpdc += er32(MGTPDC); 4231 } 4232 4233 /** 4234 * e1000_phy_read_status - Update the PHY register status snapshot 4235 * @adapter: board private structure 4236 **/ 4237 static void e1000_phy_read_status(struct e1000_adapter *adapter) 4238 { 4239 struct e1000_hw *hw = &adapter->hw; 4240 struct e1000_phy_regs *phy = &adapter->phy_regs; 4241 4242 if ((er32(STATUS) & E1000_STATUS_LU) && 4243 (adapter->hw.phy.media_type == e1000_media_type_copper)) { 4244 int ret_val; 4245 4246 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr); 4247 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr); 4248 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise); 4249 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa); 4250 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion); 4251 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000); 4252 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000); 4253 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus); 4254 if (ret_val) 4255 e_warn("Error reading PHY register\n"); 4256 } else { 4257 /* 4258 * Do not read PHY registers if link is not up 4259 * Set values to typical power-on defaults 4260 */ 4261 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX); 4262 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL | 4263 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE | 4264 BMSR_ERCAP); 4265 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP | 4266 ADVERTISE_ALL | ADVERTISE_CSMA); 4267 phy->lpa = 0; 4268 phy->expansion = EXPANSION_ENABLENPAGE; 4269 phy->ctrl1000 = ADVERTISE_1000FULL; 4270 phy->stat1000 = 0; 4271 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF); 4272 } 4273 } 4274 4275 static void e1000_print_link_info(struct e1000_adapter *adapter) 4276 { 4277 struct e1000_hw *hw = &adapter->hw; 4278 u32 ctrl = er32(CTRL); 4279 4280 /* Link status message must follow this format for user tools */ 4281 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n", 4282 adapter->netdev->name, 4283 adapter->link_speed, 4284 adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half", 4285 (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" : 4286 (ctrl & E1000_CTRL_RFCE) ? "Rx" : 4287 (ctrl & E1000_CTRL_TFCE) ? "Tx" : "None"); 4288 } 4289 4290 static bool e1000e_has_link(struct e1000_adapter *adapter) 4291 { 4292 struct e1000_hw *hw = &adapter->hw; 4293 bool link_active = false; 4294 s32 ret_val = 0; 4295 4296 /* 4297 * get_link_status is set on LSC (link status) interrupt or 4298 * Rx sequence error interrupt. get_link_status will stay 4299 * false until the check_for_link establishes link 4300 * for copper adapters ONLY 4301 */ 4302 switch (hw->phy.media_type) { 4303 case e1000_media_type_copper: 4304 if (hw->mac.get_link_status) { 4305 ret_val = hw->mac.ops.check_for_link(hw); 4306 link_active = !hw->mac.get_link_status; 4307 } else { 4308 link_active = true; 4309 } 4310 break; 4311 case e1000_media_type_fiber: 4312 ret_val = hw->mac.ops.check_for_link(hw); 4313 link_active = !!(er32(STATUS) & E1000_STATUS_LU); 4314 break; 4315 case e1000_media_type_internal_serdes: 4316 ret_val = hw->mac.ops.check_for_link(hw); 4317 link_active = adapter->hw.mac.serdes_has_link; 4318 break; 4319 default: 4320 case e1000_media_type_unknown: 4321 break; 4322 } 4323 4324 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) && 4325 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) { 4326 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */ 4327 e_info("Gigabit has been disabled, downgrading speed\n"); 4328 } 4329 4330 return link_active; 4331 } 4332 4333 static void e1000e_enable_receives(struct e1000_adapter *adapter) 4334 { 4335 /* make sure the receive unit is started */ 4336 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) && 4337 (adapter->flags & FLAG_RX_RESTART_NOW)) { 4338 struct e1000_hw *hw = &adapter->hw; 4339 u32 rctl = er32(RCTL); 4340 ew32(RCTL, rctl | E1000_RCTL_EN); 4341 adapter->flags &= ~FLAG_RX_RESTART_NOW; 4342 } 4343 } 4344 4345 static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter) 4346 { 4347 struct e1000_hw *hw = &adapter->hw; 4348 4349 /* 4350 * With 82574 controllers, PHY needs to be checked periodically 4351 * for hung state and reset, if two calls return true 4352 */ 4353 if (e1000_check_phy_82574(hw)) 4354 adapter->phy_hang_count++; 4355 else 4356 adapter->phy_hang_count = 0; 4357 4358 if (adapter->phy_hang_count > 1) { 4359 adapter->phy_hang_count = 0; 4360 schedule_work(&adapter->reset_task); 4361 } 4362 } 4363 4364 /** 4365 * e1000_watchdog - Timer Call-back 4366 * @data: pointer to adapter cast into an unsigned long 4367 **/ 4368 static void e1000_watchdog(unsigned long data) 4369 { 4370 struct e1000_adapter *adapter = (struct e1000_adapter *) data; 4371 4372 /* Do the rest outside of interrupt context */ 4373 schedule_work(&adapter->watchdog_task); 4374 4375 /* TODO: make this use queue_delayed_work() */ 4376 } 4377 4378 static void e1000_watchdog_task(struct work_struct *work) 4379 { 4380 struct e1000_adapter *adapter = container_of(work, 4381 struct e1000_adapter, watchdog_task); 4382 struct net_device *netdev = adapter->netdev; 4383 struct e1000_mac_info *mac = &adapter->hw.mac; 4384 struct e1000_phy_info *phy = &adapter->hw.phy; 4385 struct e1000_ring *tx_ring = adapter->tx_ring; 4386 struct e1000_hw *hw = &adapter->hw; 4387 u32 link, tctl; 4388 4389 if (test_bit(__E1000_DOWN, &adapter->state)) 4390 return; 4391 4392 link = e1000e_has_link(adapter); 4393 if ((netif_carrier_ok(netdev)) && link) { 4394 /* Cancel scheduled suspend requests. */ 4395 pm_runtime_resume(netdev->dev.parent); 4396 4397 e1000e_enable_receives(adapter); 4398 goto link_up; 4399 } 4400 4401 if ((e1000e_enable_tx_pkt_filtering(hw)) && 4402 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)) 4403 e1000_update_mng_vlan(adapter); 4404 4405 if (link) { 4406 if (!netif_carrier_ok(netdev)) { 4407 bool txb2b = true; 4408 4409 /* Cancel scheduled suspend requests. */ 4410 pm_runtime_resume(netdev->dev.parent); 4411 4412 /* update snapshot of PHY registers on LSC */ 4413 e1000_phy_read_status(adapter); 4414 mac->ops.get_link_up_info(&adapter->hw, 4415 &adapter->link_speed, 4416 &adapter->link_duplex); 4417 e1000_print_link_info(adapter); 4418 /* 4419 * On supported PHYs, check for duplex mismatch only 4420 * if link has autonegotiated at 10/100 half 4421 */ 4422 if ((hw->phy.type == e1000_phy_igp_3 || 4423 hw->phy.type == e1000_phy_bm) && 4424 (hw->mac.autoneg == true) && 4425 (adapter->link_speed == SPEED_10 || 4426 adapter->link_speed == SPEED_100) && 4427 (adapter->link_duplex == HALF_DUPLEX)) { 4428 u16 autoneg_exp; 4429 4430 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp); 4431 4432 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS)) 4433 e_info("Autonegotiated half duplex but link partner cannot autoneg. Try forcing full duplex if link gets many collisions.\n"); 4434 } 4435 4436 /* adjust timeout factor according to speed/duplex */ 4437 adapter->tx_timeout_factor = 1; 4438 switch (adapter->link_speed) { 4439 case SPEED_10: 4440 txb2b = false; 4441 adapter->tx_timeout_factor = 16; 4442 break; 4443 case SPEED_100: 4444 txb2b = false; 4445 adapter->tx_timeout_factor = 10; 4446 break; 4447 } 4448 4449 /* 4450 * workaround: re-program speed mode bit after 4451 * link-up event 4452 */ 4453 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) && 4454 !txb2b) { 4455 u32 tarc0; 4456 tarc0 = er32(TARC(0)); 4457 tarc0 &= ~SPEED_MODE_BIT; 4458 ew32(TARC(0), tarc0); 4459 } 4460 4461 /* 4462 * disable TSO for pcie and 10/100 speeds, to avoid 4463 * some hardware issues 4464 */ 4465 if (!(adapter->flags & FLAG_TSO_FORCE)) { 4466 switch (adapter->link_speed) { 4467 case SPEED_10: 4468 case SPEED_100: 4469 e_info("10/100 speed: disabling TSO\n"); 4470 netdev->features &= ~NETIF_F_TSO; 4471 netdev->features &= ~NETIF_F_TSO6; 4472 break; 4473 case SPEED_1000: 4474 netdev->features |= NETIF_F_TSO; 4475 netdev->features |= NETIF_F_TSO6; 4476 break; 4477 default: 4478 /* oops */ 4479 break; 4480 } 4481 } 4482 4483 /* 4484 * enable transmits in the hardware, need to do this 4485 * after setting TARC(0) 4486 */ 4487 tctl = er32(TCTL); 4488 tctl |= E1000_TCTL_EN; 4489 ew32(TCTL, tctl); 4490 4491 /* 4492 * Perform any post-link-up configuration before 4493 * reporting link up. 4494 */ 4495 if (phy->ops.cfg_on_link_up) 4496 phy->ops.cfg_on_link_up(hw); 4497 4498 netif_carrier_on(netdev); 4499 4500 if (!test_bit(__E1000_DOWN, &adapter->state)) 4501 mod_timer(&adapter->phy_info_timer, 4502 round_jiffies(jiffies + 2 * HZ)); 4503 } 4504 } else { 4505 if (netif_carrier_ok(netdev)) { 4506 adapter->link_speed = 0; 4507 adapter->link_duplex = 0; 4508 /* Link status message must follow this format */ 4509 printk(KERN_INFO "e1000e: %s NIC Link is Down\n", 4510 adapter->netdev->name); 4511 netif_carrier_off(netdev); 4512 if (!test_bit(__E1000_DOWN, &adapter->state)) 4513 mod_timer(&adapter->phy_info_timer, 4514 round_jiffies(jiffies + 2 * HZ)); 4515 4516 if (adapter->flags & FLAG_RX_NEEDS_RESTART) 4517 schedule_work(&adapter->reset_task); 4518 else 4519 pm_schedule_suspend(netdev->dev.parent, 4520 LINK_TIMEOUT); 4521 } 4522 } 4523 4524 link_up: 4525 spin_lock(&adapter->stats64_lock); 4526 e1000e_update_stats(adapter); 4527 4528 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old; 4529 adapter->tpt_old = adapter->stats.tpt; 4530 mac->collision_delta = adapter->stats.colc - adapter->colc_old; 4531 adapter->colc_old = adapter->stats.colc; 4532 4533 adapter->gorc = adapter->stats.gorc - adapter->gorc_old; 4534 adapter->gorc_old = adapter->stats.gorc; 4535 adapter->gotc = adapter->stats.gotc - adapter->gotc_old; 4536 adapter->gotc_old = adapter->stats.gotc; 4537 spin_unlock(&adapter->stats64_lock); 4538 4539 e1000e_update_adaptive(&adapter->hw); 4540 4541 if (!netif_carrier_ok(netdev) && 4542 (e1000_desc_unused(tx_ring) + 1 < tx_ring->count)) { 4543 /* 4544 * We've lost link, so the controller stops DMA, 4545 * but we've got queued Tx work that's never going 4546 * to get done, so reset controller to flush Tx. 4547 * (Do the reset outside of interrupt context). 4548 */ 4549 schedule_work(&adapter->reset_task); 4550 /* return immediately since reset is imminent */ 4551 return; 4552 } 4553 4554 /* Simple mode for Interrupt Throttle Rate (ITR) */ 4555 if (adapter->itr_setting == 4) { 4556 /* 4557 * Symmetric Tx/Rx gets a reduced ITR=2000; 4558 * Total asymmetrical Tx or Rx gets ITR=8000; 4559 * everyone else is between 2000-8000. 4560 */ 4561 u32 goc = (adapter->gotc + adapter->gorc) / 10000; 4562 u32 dif = (adapter->gotc > adapter->gorc ? 4563 adapter->gotc - adapter->gorc : 4564 adapter->gorc - adapter->gotc) / 10000; 4565 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000; 4566 4567 ew32(ITR, 1000000000 / (itr * 256)); 4568 } 4569 4570 /* Cause software interrupt to ensure Rx ring is cleaned */ 4571 if (adapter->msix_entries) 4572 ew32(ICS, adapter->rx_ring->ims_val); 4573 else 4574 ew32(ICS, E1000_ICS_RXDMT0); 4575 4576 /* flush pending descriptors to memory before detecting Tx hang */ 4577 e1000e_flush_descriptors(adapter); 4578 4579 /* Force detection of hung controller every watchdog period */ 4580 adapter->detect_tx_hung = true; 4581 4582 /* 4583 * With 82571 controllers, LAA may be overwritten due to controller 4584 * reset from the other port. Set the appropriate LAA in RAR[0] 4585 */ 4586 if (e1000e_get_laa_state_82571(hw)) 4587 e1000e_rar_set(hw, adapter->hw.mac.addr, 0); 4588 4589 if (adapter->flags2 & FLAG2_CHECK_PHY_HANG) 4590 e1000e_check_82574_phy_workaround(adapter); 4591 4592 /* Reset the timer */ 4593 if (!test_bit(__E1000_DOWN, &adapter->state)) 4594 mod_timer(&adapter->watchdog_timer, 4595 round_jiffies(jiffies + 2 * HZ)); 4596 } 4597 4598 #define E1000_TX_FLAGS_CSUM 0x00000001 4599 #define E1000_TX_FLAGS_VLAN 0x00000002 4600 #define E1000_TX_FLAGS_TSO 0x00000004 4601 #define E1000_TX_FLAGS_IPV4 0x00000008 4602 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000 4603 #define E1000_TX_FLAGS_VLAN_SHIFT 16 4604 4605 static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb) 4606 { 4607 struct e1000_context_desc *context_desc; 4608 struct e1000_buffer *buffer_info; 4609 unsigned int i; 4610 u32 cmd_length = 0; 4611 u16 ipcse = 0, tucse, mss; 4612 u8 ipcss, ipcso, tucss, tucso, hdr_len; 4613 4614 if (!skb_is_gso(skb)) 4615 return 0; 4616 4617 if (skb_header_cloned(skb)) { 4618 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); 4619 4620 if (err) 4621 return err; 4622 } 4623 4624 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 4625 mss = skb_shinfo(skb)->gso_size; 4626 if (skb->protocol == htons(ETH_P_IP)) { 4627 struct iphdr *iph = ip_hdr(skb); 4628 iph->tot_len = 0; 4629 iph->check = 0; 4630 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, 4631 0, IPPROTO_TCP, 0); 4632 cmd_length = E1000_TXD_CMD_IP; 4633 ipcse = skb_transport_offset(skb) - 1; 4634 } else if (skb_is_gso_v6(skb)) { 4635 ipv6_hdr(skb)->payload_len = 0; 4636 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, 4637 &ipv6_hdr(skb)->daddr, 4638 0, IPPROTO_TCP, 0); 4639 ipcse = 0; 4640 } 4641 ipcss = skb_network_offset(skb); 4642 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data; 4643 tucss = skb_transport_offset(skb); 4644 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data; 4645 tucse = 0; 4646 4647 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE | 4648 E1000_TXD_CMD_TCP | (skb->len - (hdr_len))); 4649 4650 i = tx_ring->next_to_use; 4651 context_desc = E1000_CONTEXT_DESC(*tx_ring, i); 4652 buffer_info = &tx_ring->buffer_info[i]; 4653 4654 context_desc->lower_setup.ip_fields.ipcss = ipcss; 4655 context_desc->lower_setup.ip_fields.ipcso = ipcso; 4656 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse); 4657 context_desc->upper_setup.tcp_fields.tucss = tucss; 4658 context_desc->upper_setup.tcp_fields.tucso = tucso; 4659 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse); 4660 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss); 4661 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len; 4662 context_desc->cmd_and_length = cpu_to_le32(cmd_length); 4663 4664 buffer_info->time_stamp = jiffies; 4665 buffer_info->next_to_watch = i; 4666 4667 i++; 4668 if (i == tx_ring->count) 4669 i = 0; 4670 tx_ring->next_to_use = i; 4671 4672 return 1; 4673 } 4674 4675 static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb) 4676 { 4677 struct e1000_adapter *adapter = tx_ring->adapter; 4678 struct e1000_context_desc *context_desc; 4679 struct e1000_buffer *buffer_info; 4680 unsigned int i; 4681 u8 css; 4682 u32 cmd_len = E1000_TXD_CMD_DEXT; 4683 __be16 protocol; 4684 4685 if (skb->ip_summed != CHECKSUM_PARTIAL) 4686 return 0; 4687 4688 if (skb->protocol == cpu_to_be16(ETH_P_8021Q)) 4689 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto; 4690 else 4691 protocol = skb->protocol; 4692 4693 switch (protocol) { 4694 case cpu_to_be16(ETH_P_IP): 4695 if (ip_hdr(skb)->protocol == IPPROTO_TCP) 4696 cmd_len |= E1000_TXD_CMD_TCP; 4697 break; 4698 case cpu_to_be16(ETH_P_IPV6): 4699 /* XXX not handling all IPV6 headers */ 4700 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP) 4701 cmd_len |= E1000_TXD_CMD_TCP; 4702 break; 4703 default: 4704 if (unlikely(net_ratelimit())) 4705 e_warn("checksum_partial proto=%x!\n", 4706 be16_to_cpu(protocol)); 4707 break; 4708 } 4709 4710 css = skb_checksum_start_offset(skb); 4711 4712 i = tx_ring->next_to_use; 4713 buffer_info = &tx_ring->buffer_info[i]; 4714 context_desc = E1000_CONTEXT_DESC(*tx_ring, i); 4715 4716 context_desc->lower_setup.ip_config = 0; 4717 context_desc->upper_setup.tcp_fields.tucss = css; 4718 context_desc->upper_setup.tcp_fields.tucso = 4719 css + skb->csum_offset; 4720 context_desc->upper_setup.tcp_fields.tucse = 0; 4721 context_desc->tcp_seg_setup.data = 0; 4722 context_desc->cmd_and_length = cpu_to_le32(cmd_len); 4723 4724 buffer_info->time_stamp = jiffies; 4725 buffer_info->next_to_watch = i; 4726 4727 i++; 4728 if (i == tx_ring->count) 4729 i = 0; 4730 tx_ring->next_to_use = i; 4731 4732 return 1; 4733 } 4734 4735 #define E1000_MAX_PER_TXD 8192 4736 #define E1000_MAX_TXD_PWR 12 4737 4738 static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb, 4739 unsigned int first, unsigned int max_per_txd, 4740 unsigned int nr_frags, unsigned int mss) 4741 { 4742 struct e1000_adapter *adapter = tx_ring->adapter; 4743 struct pci_dev *pdev = adapter->pdev; 4744 struct e1000_buffer *buffer_info; 4745 unsigned int len = skb_headlen(skb); 4746 unsigned int offset = 0, size, count = 0, i; 4747 unsigned int f, bytecount, segs; 4748 4749 i = tx_ring->next_to_use; 4750 4751 while (len) { 4752 buffer_info = &tx_ring->buffer_info[i]; 4753 size = min(len, max_per_txd); 4754 4755 buffer_info->length = size; 4756 buffer_info->time_stamp = jiffies; 4757 buffer_info->next_to_watch = i; 4758 buffer_info->dma = dma_map_single(&pdev->dev, 4759 skb->data + offset, 4760 size, DMA_TO_DEVICE); 4761 buffer_info->mapped_as_page = false; 4762 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) 4763 goto dma_error; 4764 4765 len -= size; 4766 offset += size; 4767 count++; 4768 4769 if (len) { 4770 i++; 4771 if (i == tx_ring->count) 4772 i = 0; 4773 } 4774 } 4775 4776 for (f = 0; f < nr_frags; f++) { 4777 const struct skb_frag_struct *frag; 4778 4779 frag = &skb_shinfo(skb)->frags[f]; 4780 len = skb_frag_size(frag); 4781 offset = 0; 4782 4783 while (len) { 4784 i++; 4785 if (i == tx_ring->count) 4786 i = 0; 4787 4788 buffer_info = &tx_ring->buffer_info[i]; 4789 size = min(len, max_per_txd); 4790 4791 buffer_info->length = size; 4792 buffer_info->time_stamp = jiffies; 4793 buffer_info->next_to_watch = i; 4794 buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag, 4795 offset, size, DMA_TO_DEVICE); 4796 buffer_info->mapped_as_page = true; 4797 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) 4798 goto dma_error; 4799 4800 len -= size; 4801 offset += size; 4802 count++; 4803 } 4804 } 4805 4806 segs = skb_shinfo(skb)->gso_segs ? : 1; 4807 /* multiply data chunks by size of headers */ 4808 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len; 4809 4810 tx_ring->buffer_info[i].skb = skb; 4811 tx_ring->buffer_info[i].segs = segs; 4812 tx_ring->buffer_info[i].bytecount = bytecount; 4813 tx_ring->buffer_info[first].next_to_watch = i; 4814 4815 return count; 4816 4817 dma_error: 4818 dev_err(&pdev->dev, "Tx DMA map failed\n"); 4819 buffer_info->dma = 0; 4820 if (count) 4821 count--; 4822 4823 while (count--) { 4824 if (i == 0) 4825 i += tx_ring->count; 4826 i--; 4827 buffer_info = &tx_ring->buffer_info[i]; 4828 e1000_put_txbuf(tx_ring, buffer_info); 4829 } 4830 4831 return 0; 4832 } 4833 4834 static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count) 4835 { 4836 struct e1000_adapter *adapter = tx_ring->adapter; 4837 struct e1000_tx_desc *tx_desc = NULL; 4838 struct e1000_buffer *buffer_info; 4839 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS; 4840 unsigned int i; 4841 4842 if (tx_flags & E1000_TX_FLAGS_TSO) { 4843 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D | 4844 E1000_TXD_CMD_TSE; 4845 txd_upper |= E1000_TXD_POPTS_TXSM << 8; 4846 4847 if (tx_flags & E1000_TX_FLAGS_IPV4) 4848 txd_upper |= E1000_TXD_POPTS_IXSM << 8; 4849 } 4850 4851 if (tx_flags & E1000_TX_FLAGS_CSUM) { 4852 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; 4853 txd_upper |= E1000_TXD_POPTS_TXSM << 8; 4854 } 4855 4856 if (tx_flags & E1000_TX_FLAGS_VLAN) { 4857 txd_lower |= E1000_TXD_CMD_VLE; 4858 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK); 4859 } 4860 4861 i = tx_ring->next_to_use; 4862 4863 do { 4864 buffer_info = &tx_ring->buffer_info[i]; 4865 tx_desc = E1000_TX_DESC(*tx_ring, i); 4866 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); 4867 tx_desc->lower.data = 4868 cpu_to_le32(txd_lower | buffer_info->length); 4869 tx_desc->upper.data = cpu_to_le32(txd_upper); 4870 4871 i++; 4872 if (i == tx_ring->count) 4873 i = 0; 4874 } while (--count > 0); 4875 4876 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd); 4877 4878 /* 4879 * Force memory writes to complete before letting h/w 4880 * know there are new descriptors to fetch. (Only 4881 * applicable for weak-ordered memory model archs, 4882 * such as IA-64). 4883 */ 4884 wmb(); 4885 4886 tx_ring->next_to_use = i; 4887 4888 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) 4889 e1000e_update_tdt_wa(tx_ring, i); 4890 else 4891 writel(i, tx_ring->tail); 4892 4893 /* 4894 * we need this if more than one processor can write to our tail 4895 * at a time, it synchronizes IO on IA64/Altix systems 4896 */ 4897 mmiowb(); 4898 } 4899 4900 #define MINIMUM_DHCP_PACKET_SIZE 282 4901 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter, 4902 struct sk_buff *skb) 4903 { 4904 struct e1000_hw *hw = &adapter->hw; 4905 u16 length, offset; 4906 4907 if (vlan_tx_tag_present(skb)) { 4908 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) && 4909 (adapter->hw.mng_cookie.status & 4910 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))) 4911 return 0; 4912 } 4913 4914 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE) 4915 return 0; 4916 4917 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP)) 4918 return 0; 4919 4920 { 4921 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14); 4922 struct udphdr *udp; 4923 4924 if (ip->protocol != IPPROTO_UDP) 4925 return 0; 4926 4927 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2)); 4928 if (ntohs(udp->dest) != 67) 4929 return 0; 4930 4931 offset = (u8 *)udp + 8 - skb->data; 4932 length = skb->len - offset; 4933 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length); 4934 } 4935 4936 return 0; 4937 } 4938 4939 static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size) 4940 { 4941 struct e1000_adapter *adapter = tx_ring->adapter; 4942 4943 netif_stop_queue(adapter->netdev); 4944 /* 4945 * Herbert's original patch had: 4946 * smp_mb__after_netif_stop_queue(); 4947 * but since that doesn't exist yet, just open code it. 4948 */ 4949 smp_mb(); 4950 4951 /* 4952 * We need to check again in a case another CPU has just 4953 * made room available. 4954 */ 4955 if (e1000_desc_unused(tx_ring) < size) 4956 return -EBUSY; 4957 4958 /* A reprieve! */ 4959 netif_start_queue(adapter->netdev); 4960 ++adapter->restart_queue; 4961 return 0; 4962 } 4963 4964 static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size) 4965 { 4966 if (e1000_desc_unused(tx_ring) >= size) 4967 return 0; 4968 return __e1000_maybe_stop_tx(tx_ring, size); 4969 } 4970 4971 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 ) 4972 static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb, 4973 struct net_device *netdev) 4974 { 4975 struct e1000_adapter *adapter = netdev_priv(netdev); 4976 struct e1000_ring *tx_ring = adapter->tx_ring; 4977 unsigned int first; 4978 unsigned int max_per_txd = E1000_MAX_PER_TXD; 4979 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR; 4980 unsigned int tx_flags = 0; 4981 unsigned int len = skb_headlen(skb); 4982 unsigned int nr_frags; 4983 unsigned int mss; 4984 int count = 0; 4985 int tso; 4986 unsigned int f; 4987 4988 if (test_bit(__E1000_DOWN, &adapter->state)) { 4989 dev_kfree_skb_any(skb); 4990 return NETDEV_TX_OK; 4991 } 4992 4993 if (skb->len <= 0) { 4994 dev_kfree_skb_any(skb); 4995 return NETDEV_TX_OK; 4996 } 4997 4998 mss = skb_shinfo(skb)->gso_size; 4999 /* 5000 * The controller does a simple calculation to 5001 * make sure there is enough room in the FIFO before 5002 * initiating the DMA for each buffer. The calc is: 5003 * 4 = ceil(buffer len/mss). To make sure we don't 5004 * overrun the FIFO, adjust the max buffer len if mss 5005 * drops. 5006 */ 5007 if (mss) { 5008 u8 hdr_len; 5009 max_per_txd = min(mss << 2, max_per_txd); 5010 max_txd_pwr = fls(max_per_txd) - 1; 5011 5012 /* 5013 * TSO Workaround for 82571/2/3 Controllers -- if skb->data 5014 * points to just header, pull a few bytes of payload from 5015 * frags into skb->data 5016 */ 5017 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 5018 /* 5019 * we do this workaround for ES2LAN, but it is un-necessary, 5020 * avoiding it could save a lot of cycles 5021 */ 5022 if (skb->data_len && (hdr_len == len)) { 5023 unsigned int pull_size; 5024 5025 pull_size = min((unsigned int)4, skb->data_len); 5026 if (!__pskb_pull_tail(skb, pull_size)) { 5027 e_err("__pskb_pull_tail failed.\n"); 5028 dev_kfree_skb_any(skb); 5029 return NETDEV_TX_OK; 5030 } 5031 len = skb_headlen(skb); 5032 } 5033 } 5034 5035 /* reserve a descriptor for the offload context */ 5036 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL)) 5037 count++; 5038 count++; 5039 5040 count += TXD_USE_COUNT(len, max_txd_pwr); 5041 5042 nr_frags = skb_shinfo(skb)->nr_frags; 5043 for (f = 0; f < nr_frags; f++) 5044 count += TXD_USE_COUNT(skb_frag_size(&skb_shinfo(skb)->frags[f]), 5045 max_txd_pwr); 5046 5047 if (adapter->hw.mac.tx_pkt_filtering) 5048 e1000_transfer_dhcp_info(adapter, skb); 5049 5050 /* 5051 * need: count + 2 desc gap to keep tail from touching 5052 * head, otherwise try next time 5053 */ 5054 if (e1000_maybe_stop_tx(tx_ring, count + 2)) 5055 return NETDEV_TX_BUSY; 5056 5057 if (vlan_tx_tag_present(skb)) { 5058 tx_flags |= E1000_TX_FLAGS_VLAN; 5059 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT); 5060 } 5061 5062 first = tx_ring->next_to_use; 5063 5064 tso = e1000_tso(tx_ring, skb); 5065 if (tso < 0) { 5066 dev_kfree_skb_any(skb); 5067 return NETDEV_TX_OK; 5068 } 5069 5070 if (tso) 5071 tx_flags |= E1000_TX_FLAGS_TSO; 5072 else if (e1000_tx_csum(tx_ring, skb)) 5073 tx_flags |= E1000_TX_FLAGS_CSUM; 5074 5075 /* 5076 * Old method was to assume IPv4 packet by default if TSO was enabled. 5077 * 82571 hardware supports TSO capabilities for IPv6 as well... 5078 * no longer assume, we must. 5079 */ 5080 if (skb->protocol == htons(ETH_P_IP)) 5081 tx_flags |= E1000_TX_FLAGS_IPV4; 5082 5083 /* if count is 0 then mapping error has occurred */ 5084 count = e1000_tx_map(tx_ring, skb, first, max_per_txd, nr_frags, mss); 5085 if (count) { 5086 netdev_sent_queue(netdev, skb->len); 5087 e1000_tx_queue(tx_ring, tx_flags, count); 5088 /* Make sure there is space in the ring for the next send. */ 5089 e1000_maybe_stop_tx(tx_ring, MAX_SKB_FRAGS + 2); 5090 5091 } else { 5092 dev_kfree_skb_any(skb); 5093 tx_ring->buffer_info[first].time_stamp = 0; 5094 tx_ring->next_to_use = first; 5095 } 5096 5097 return NETDEV_TX_OK; 5098 } 5099 5100 /** 5101 * e1000_tx_timeout - Respond to a Tx Hang 5102 * @netdev: network interface device structure 5103 **/ 5104 static void e1000_tx_timeout(struct net_device *netdev) 5105 { 5106 struct e1000_adapter *adapter = netdev_priv(netdev); 5107 5108 /* Do the reset outside of interrupt context */ 5109 adapter->tx_timeout_count++; 5110 schedule_work(&adapter->reset_task); 5111 } 5112 5113 static void e1000_reset_task(struct work_struct *work) 5114 { 5115 struct e1000_adapter *adapter; 5116 adapter = container_of(work, struct e1000_adapter, reset_task); 5117 5118 /* don't run the task if already down */ 5119 if (test_bit(__E1000_DOWN, &adapter->state)) 5120 return; 5121 5122 if (!((adapter->flags & FLAG_RX_NEEDS_RESTART) && 5123 (adapter->flags & FLAG_RX_RESTART_NOW))) { 5124 e1000e_dump(adapter); 5125 e_err("Reset adapter\n"); 5126 } 5127 e1000e_reinit_locked(adapter); 5128 } 5129 5130 /** 5131 * e1000_get_stats64 - Get System Network Statistics 5132 * @netdev: network interface device structure 5133 * @stats: rtnl_link_stats64 pointer 5134 * 5135 * Returns the address of the device statistics structure. 5136 **/ 5137 struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev, 5138 struct rtnl_link_stats64 *stats) 5139 { 5140 struct e1000_adapter *adapter = netdev_priv(netdev); 5141 5142 memset(stats, 0, sizeof(struct rtnl_link_stats64)); 5143 spin_lock(&adapter->stats64_lock); 5144 e1000e_update_stats(adapter); 5145 /* Fill out the OS statistics structure */ 5146 stats->rx_bytes = adapter->stats.gorc; 5147 stats->rx_packets = adapter->stats.gprc; 5148 stats->tx_bytes = adapter->stats.gotc; 5149 stats->tx_packets = adapter->stats.gptc; 5150 stats->multicast = adapter->stats.mprc; 5151 stats->collisions = adapter->stats.colc; 5152 5153 /* Rx Errors */ 5154 5155 /* 5156 * RLEC on some newer hardware can be incorrect so build 5157 * our own version based on RUC and ROC 5158 */ 5159 stats->rx_errors = adapter->stats.rxerrc + 5160 adapter->stats.crcerrs + adapter->stats.algnerrc + 5161 adapter->stats.ruc + adapter->stats.roc + 5162 adapter->stats.cexterr; 5163 stats->rx_length_errors = adapter->stats.ruc + 5164 adapter->stats.roc; 5165 stats->rx_crc_errors = adapter->stats.crcerrs; 5166 stats->rx_frame_errors = adapter->stats.algnerrc; 5167 stats->rx_missed_errors = adapter->stats.mpc; 5168 5169 /* Tx Errors */ 5170 stats->tx_errors = adapter->stats.ecol + 5171 adapter->stats.latecol; 5172 stats->tx_aborted_errors = adapter->stats.ecol; 5173 stats->tx_window_errors = adapter->stats.latecol; 5174 stats->tx_carrier_errors = adapter->stats.tncrs; 5175 5176 /* Tx Dropped needs to be maintained elsewhere */ 5177 5178 spin_unlock(&adapter->stats64_lock); 5179 return stats; 5180 } 5181 5182 /** 5183 * e1000_change_mtu - Change the Maximum Transfer Unit 5184 * @netdev: network interface device structure 5185 * @new_mtu: new value for maximum frame size 5186 * 5187 * Returns 0 on success, negative on failure 5188 **/ 5189 static int e1000_change_mtu(struct net_device *netdev, int new_mtu) 5190 { 5191 struct e1000_adapter *adapter = netdev_priv(netdev); 5192 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN; 5193 5194 /* Jumbo frame support */ 5195 if (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) { 5196 if (!(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) { 5197 e_err("Jumbo Frames not supported.\n"); 5198 return -EINVAL; 5199 } 5200 5201 /* 5202 * IP payload checksum (enabled with jumbos/packet-split when 5203 * Rx checksum is enabled) and generation of RSS hash is 5204 * mutually exclusive in the hardware. 5205 */ 5206 if ((netdev->features & NETIF_F_RXCSUM) && 5207 (netdev->features & NETIF_F_RXHASH)) { 5208 e_err("Jumbo frames cannot be enabled when both receive checksum offload and receive hashing are enabled. Disable one of the receive offload features before enabling jumbos.\n"); 5209 return -EINVAL; 5210 } 5211 } 5212 5213 /* Supported frame sizes */ 5214 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) || 5215 (max_frame > adapter->max_hw_frame_size)) { 5216 e_err("Unsupported MTU setting\n"); 5217 return -EINVAL; 5218 } 5219 5220 /* Jumbo frame workaround on 82579 requires CRC be stripped */ 5221 if ((adapter->hw.mac.type == e1000_pch2lan) && 5222 !(adapter->flags2 & FLAG2_CRC_STRIPPING) && 5223 (new_mtu > ETH_DATA_LEN)) { 5224 e_err("Jumbo Frames not supported on 82579 when CRC stripping is disabled.\n"); 5225 return -EINVAL; 5226 } 5227 5228 /* 82573 Errata 17 */ 5229 if (((adapter->hw.mac.type == e1000_82573) || 5230 (adapter->hw.mac.type == e1000_82574)) && 5231 (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN)) { 5232 adapter->flags2 |= FLAG2_DISABLE_ASPM_L1; 5233 e1000e_disable_aspm(adapter->pdev, PCIE_LINK_STATE_L1); 5234 } 5235 5236 while (test_and_set_bit(__E1000_RESETTING, &adapter->state)) 5237 usleep_range(1000, 2000); 5238 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */ 5239 adapter->max_frame_size = max_frame; 5240 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu); 5241 netdev->mtu = new_mtu; 5242 if (netif_running(netdev)) 5243 e1000e_down(adapter); 5244 5245 /* 5246 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN 5247 * means we reserve 2 more, this pushes us to allocate from the next 5248 * larger slab size. 5249 * i.e. RXBUFFER_2048 --> size-4096 slab 5250 * However with the new *_jumbo_rx* routines, jumbo receives will use 5251 * fragmented skbs 5252 */ 5253 5254 if (max_frame <= 2048) 5255 adapter->rx_buffer_len = 2048; 5256 else 5257 adapter->rx_buffer_len = 4096; 5258 5259 /* adjust allocation if LPE protects us, and we aren't using SBP */ 5260 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) || 5261 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN)) 5262 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN 5263 + ETH_FCS_LEN; 5264 5265 if (netif_running(netdev)) 5266 e1000e_up(adapter); 5267 else 5268 e1000e_reset(adapter); 5269 5270 clear_bit(__E1000_RESETTING, &adapter->state); 5271 5272 return 0; 5273 } 5274 5275 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, 5276 int cmd) 5277 { 5278 struct e1000_adapter *adapter = netdev_priv(netdev); 5279 struct mii_ioctl_data *data = if_mii(ifr); 5280 5281 if (adapter->hw.phy.media_type != e1000_media_type_copper) 5282 return -EOPNOTSUPP; 5283 5284 switch (cmd) { 5285 case SIOCGMIIPHY: 5286 data->phy_id = adapter->hw.phy.addr; 5287 break; 5288 case SIOCGMIIREG: 5289 e1000_phy_read_status(adapter); 5290 5291 switch (data->reg_num & 0x1F) { 5292 case MII_BMCR: 5293 data->val_out = adapter->phy_regs.bmcr; 5294 break; 5295 case MII_BMSR: 5296 data->val_out = adapter->phy_regs.bmsr; 5297 break; 5298 case MII_PHYSID1: 5299 data->val_out = (adapter->hw.phy.id >> 16); 5300 break; 5301 case MII_PHYSID2: 5302 data->val_out = (adapter->hw.phy.id & 0xFFFF); 5303 break; 5304 case MII_ADVERTISE: 5305 data->val_out = adapter->phy_regs.advertise; 5306 break; 5307 case MII_LPA: 5308 data->val_out = adapter->phy_regs.lpa; 5309 break; 5310 case MII_EXPANSION: 5311 data->val_out = adapter->phy_regs.expansion; 5312 break; 5313 case MII_CTRL1000: 5314 data->val_out = adapter->phy_regs.ctrl1000; 5315 break; 5316 case MII_STAT1000: 5317 data->val_out = adapter->phy_regs.stat1000; 5318 break; 5319 case MII_ESTATUS: 5320 data->val_out = adapter->phy_regs.estatus; 5321 break; 5322 default: 5323 return -EIO; 5324 } 5325 break; 5326 case SIOCSMIIREG: 5327 default: 5328 return -EOPNOTSUPP; 5329 } 5330 return 0; 5331 } 5332 5333 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 5334 { 5335 switch (cmd) { 5336 case SIOCGMIIPHY: 5337 case SIOCGMIIREG: 5338 case SIOCSMIIREG: 5339 return e1000_mii_ioctl(netdev, ifr, cmd); 5340 default: 5341 return -EOPNOTSUPP; 5342 } 5343 } 5344 5345 static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc) 5346 { 5347 struct e1000_hw *hw = &adapter->hw; 5348 u32 i, mac_reg; 5349 u16 phy_reg, wuc_enable; 5350 int retval = 0; 5351 5352 /* copy MAC RARs to PHY RARs */ 5353 e1000_copy_rx_addrs_to_phy_ich8lan(hw); 5354 5355 retval = hw->phy.ops.acquire(hw); 5356 if (retval) { 5357 e_err("Could not acquire PHY\n"); 5358 return retval; 5359 } 5360 5361 /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */ 5362 retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable); 5363 if (retval) 5364 goto out; 5365 5366 /* copy MAC MTA to PHY MTA - only needed for pchlan */ 5367 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) { 5368 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i); 5369 hw->phy.ops.write_reg_page(hw, BM_MTA(i), 5370 (u16)(mac_reg & 0xFFFF)); 5371 hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1, 5372 (u16)((mac_reg >> 16) & 0xFFFF)); 5373 } 5374 5375 /* configure PHY Rx Control register */ 5376 hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg); 5377 mac_reg = er32(RCTL); 5378 if (mac_reg & E1000_RCTL_UPE) 5379 phy_reg |= BM_RCTL_UPE; 5380 if (mac_reg & E1000_RCTL_MPE) 5381 phy_reg |= BM_RCTL_MPE; 5382 phy_reg &= ~(BM_RCTL_MO_MASK); 5383 if (mac_reg & E1000_RCTL_MO_3) 5384 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT) 5385 << BM_RCTL_MO_SHIFT); 5386 if (mac_reg & E1000_RCTL_BAM) 5387 phy_reg |= BM_RCTL_BAM; 5388 if (mac_reg & E1000_RCTL_PMCF) 5389 phy_reg |= BM_RCTL_PMCF; 5390 mac_reg = er32(CTRL); 5391 if (mac_reg & E1000_CTRL_RFCE) 5392 phy_reg |= BM_RCTL_RFCE; 5393 hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg); 5394 5395 /* enable PHY wakeup in MAC register */ 5396 ew32(WUFC, wufc); 5397 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN); 5398 5399 /* configure and enable PHY wakeup in PHY registers */ 5400 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc); 5401 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, E1000_WUC_PME_EN); 5402 5403 /* activate PHY wakeup */ 5404 wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT; 5405 retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable); 5406 if (retval) 5407 e_err("Could not set PHY Host Wakeup bit\n"); 5408 out: 5409 hw->phy.ops.release(hw); 5410 5411 return retval; 5412 } 5413 5414 static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake, 5415 bool runtime) 5416 { 5417 struct net_device *netdev = pci_get_drvdata(pdev); 5418 struct e1000_adapter *adapter = netdev_priv(netdev); 5419 struct e1000_hw *hw = &adapter->hw; 5420 u32 ctrl, ctrl_ext, rctl, status; 5421 /* Runtime suspend should only enable wakeup for link changes */ 5422 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol; 5423 int retval = 0; 5424 5425 netif_device_detach(netdev); 5426 5427 if (netif_running(netdev)) { 5428 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state)); 5429 e1000e_down(adapter); 5430 e1000_free_irq(adapter); 5431 } 5432 e1000e_reset_interrupt_capability(adapter); 5433 5434 retval = pci_save_state(pdev); 5435 if (retval) 5436 return retval; 5437 5438 status = er32(STATUS); 5439 if (status & E1000_STATUS_LU) 5440 wufc &= ~E1000_WUFC_LNKC; 5441 5442 if (wufc) { 5443 e1000_setup_rctl(adapter); 5444 e1000e_set_rx_mode(netdev); 5445 5446 /* turn on all-multi mode if wake on multicast is enabled */ 5447 if (wufc & E1000_WUFC_MC) { 5448 rctl = er32(RCTL); 5449 rctl |= E1000_RCTL_MPE; 5450 ew32(RCTL, rctl); 5451 } 5452 5453 ctrl = er32(CTRL); 5454 /* advertise wake from D3Cold */ 5455 #define E1000_CTRL_ADVD3WUC 0x00100000 5456 /* phy power management enable */ 5457 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000 5458 ctrl |= E1000_CTRL_ADVD3WUC; 5459 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP)) 5460 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT; 5461 ew32(CTRL, ctrl); 5462 5463 if (adapter->hw.phy.media_type == e1000_media_type_fiber || 5464 adapter->hw.phy.media_type == 5465 e1000_media_type_internal_serdes) { 5466 /* keep the laser running in D3 */ 5467 ctrl_ext = er32(CTRL_EXT); 5468 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA; 5469 ew32(CTRL_EXT, ctrl_ext); 5470 } 5471 5472 if (adapter->flags & FLAG_IS_ICH) 5473 e1000_suspend_workarounds_ich8lan(&adapter->hw); 5474 5475 /* Allow time for pending master requests to run */ 5476 e1000e_disable_pcie_master(&adapter->hw); 5477 5478 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) { 5479 /* enable wakeup by the PHY */ 5480 retval = e1000_init_phy_wakeup(adapter, wufc); 5481 if (retval) 5482 return retval; 5483 } else { 5484 /* enable wakeup by the MAC */ 5485 ew32(WUFC, wufc); 5486 ew32(WUC, E1000_WUC_PME_EN); 5487 } 5488 } else { 5489 ew32(WUC, 0); 5490 ew32(WUFC, 0); 5491 } 5492 5493 *enable_wake = !!wufc; 5494 5495 /* make sure adapter isn't asleep if manageability is enabled */ 5496 if ((adapter->flags & FLAG_MNG_PT_ENABLED) || 5497 (hw->mac.ops.check_mng_mode(hw))) 5498 *enable_wake = true; 5499 5500 if (adapter->hw.phy.type == e1000_phy_igp_3) 5501 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw); 5502 5503 /* 5504 * Release control of h/w to f/w. If f/w is AMT enabled, this 5505 * would have already happened in close and is redundant. 5506 */ 5507 e1000e_release_hw_control(adapter); 5508 5509 pci_disable_device(pdev); 5510 5511 return 0; 5512 } 5513 5514 static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake) 5515 { 5516 if (sleep && wake) { 5517 pci_prepare_to_sleep(pdev); 5518 return; 5519 } 5520 5521 pci_wake_from_d3(pdev, wake); 5522 pci_set_power_state(pdev, PCI_D3hot); 5523 } 5524 5525 static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep, 5526 bool wake) 5527 { 5528 struct net_device *netdev = pci_get_drvdata(pdev); 5529 struct e1000_adapter *adapter = netdev_priv(netdev); 5530 5531 /* 5532 * The pci-e switch on some quad port adapters will report a 5533 * correctable error when the MAC transitions from D0 to D3. To 5534 * prevent this we need to mask off the correctable errors on the 5535 * downstream port of the pci-e switch. 5536 */ 5537 if (adapter->flags & FLAG_IS_QUAD_PORT) { 5538 struct pci_dev *us_dev = pdev->bus->self; 5539 int pos = pci_pcie_cap(us_dev); 5540 u16 devctl; 5541 5542 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl); 5543 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, 5544 (devctl & ~PCI_EXP_DEVCTL_CERE)); 5545 5546 e1000_power_off(pdev, sleep, wake); 5547 5548 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl); 5549 } else { 5550 e1000_power_off(pdev, sleep, wake); 5551 } 5552 } 5553 5554 #ifdef CONFIG_PCIEASPM 5555 static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state) 5556 { 5557 pci_disable_link_state_locked(pdev, state); 5558 } 5559 #else 5560 static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state) 5561 { 5562 int pos; 5563 u16 reg16; 5564 5565 /* 5566 * Both device and parent should have the same ASPM setting. 5567 * Disable ASPM in downstream component first and then upstream. 5568 */ 5569 pos = pci_pcie_cap(pdev); 5570 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, ®16); 5571 reg16 &= ~state; 5572 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16); 5573 5574 if (!pdev->bus->self) 5575 return; 5576 5577 pos = pci_pcie_cap(pdev->bus->self); 5578 pci_read_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, ®16); 5579 reg16 &= ~state; 5580 pci_write_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, reg16); 5581 } 5582 #endif 5583 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state) 5584 { 5585 dev_info(&pdev->dev, "Disabling ASPM %s %s\n", 5586 (state & PCIE_LINK_STATE_L0S) ? "L0s" : "", 5587 (state & PCIE_LINK_STATE_L1) ? "L1" : ""); 5588 5589 __e1000e_disable_aspm(pdev, state); 5590 } 5591 5592 #ifdef CONFIG_PM 5593 static bool e1000e_pm_ready(struct e1000_adapter *adapter) 5594 { 5595 return !!adapter->tx_ring->buffer_info; 5596 } 5597 5598 static int __e1000_resume(struct pci_dev *pdev) 5599 { 5600 struct net_device *netdev = pci_get_drvdata(pdev); 5601 struct e1000_adapter *adapter = netdev_priv(netdev); 5602 struct e1000_hw *hw = &adapter->hw; 5603 u16 aspm_disable_flag = 0; 5604 u32 err; 5605 5606 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S) 5607 aspm_disable_flag = PCIE_LINK_STATE_L0S; 5608 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1) 5609 aspm_disable_flag |= PCIE_LINK_STATE_L1; 5610 if (aspm_disable_flag) 5611 e1000e_disable_aspm(pdev, aspm_disable_flag); 5612 5613 pci_set_power_state(pdev, PCI_D0); 5614 pci_restore_state(pdev); 5615 pci_save_state(pdev); 5616 5617 e1000e_set_interrupt_capability(adapter); 5618 if (netif_running(netdev)) { 5619 err = e1000_request_irq(adapter); 5620 if (err) 5621 return err; 5622 } 5623 5624 if (hw->mac.type == e1000_pch2lan) 5625 e1000_resume_workarounds_pchlan(&adapter->hw); 5626 5627 e1000e_power_up_phy(adapter); 5628 5629 /* report the system wakeup cause from S3/S4 */ 5630 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) { 5631 u16 phy_data; 5632 5633 e1e_rphy(&adapter->hw, BM_WUS, &phy_data); 5634 if (phy_data) { 5635 e_info("PHY Wakeup cause - %s\n", 5636 phy_data & E1000_WUS_EX ? "Unicast Packet" : 5637 phy_data & E1000_WUS_MC ? "Multicast Packet" : 5638 phy_data & E1000_WUS_BC ? "Broadcast Packet" : 5639 phy_data & E1000_WUS_MAG ? "Magic Packet" : 5640 phy_data & E1000_WUS_LNKC ? 5641 "Link Status Change" : "other"); 5642 } 5643 e1e_wphy(&adapter->hw, BM_WUS, ~0); 5644 } else { 5645 u32 wus = er32(WUS); 5646 if (wus) { 5647 e_info("MAC Wakeup cause - %s\n", 5648 wus & E1000_WUS_EX ? "Unicast Packet" : 5649 wus & E1000_WUS_MC ? "Multicast Packet" : 5650 wus & E1000_WUS_BC ? "Broadcast Packet" : 5651 wus & E1000_WUS_MAG ? "Magic Packet" : 5652 wus & E1000_WUS_LNKC ? "Link Status Change" : 5653 "other"); 5654 } 5655 ew32(WUS, ~0); 5656 } 5657 5658 e1000e_reset(adapter); 5659 5660 e1000_init_manageability_pt(adapter); 5661 5662 if (netif_running(netdev)) 5663 e1000e_up(adapter); 5664 5665 netif_device_attach(netdev); 5666 5667 /* 5668 * If the controller has AMT, do not set DRV_LOAD until the interface 5669 * is up. For all other cases, let the f/w know that the h/w is now 5670 * under the control of the driver. 5671 */ 5672 if (!(adapter->flags & FLAG_HAS_AMT)) 5673 e1000e_get_hw_control(adapter); 5674 5675 return 0; 5676 } 5677 5678 #ifdef CONFIG_PM_SLEEP 5679 static int e1000_suspend(struct device *dev) 5680 { 5681 struct pci_dev *pdev = to_pci_dev(dev); 5682 int retval; 5683 bool wake; 5684 5685 retval = __e1000_shutdown(pdev, &wake, false); 5686 if (!retval) 5687 e1000_complete_shutdown(pdev, true, wake); 5688 5689 return retval; 5690 } 5691 5692 static int e1000_resume(struct device *dev) 5693 { 5694 struct pci_dev *pdev = to_pci_dev(dev); 5695 struct net_device *netdev = pci_get_drvdata(pdev); 5696 struct e1000_adapter *adapter = netdev_priv(netdev); 5697 5698 if (e1000e_pm_ready(adapter)) 5699 adapter->idle_check = true; 5700 5701 return __e1000_resume(pdev); 5702 } 5703 #endif /* CONFIG_PM_SLEEP */ 5704 5705 #ifdef CONFIG_PM_RUNTIME 5706 static int e1000_runtime_suspend(struct device *dev) 5707 { 5708 struct pci_dev *pdev = to_pci_dev(dev); 5709 struct net_device *netdev = pci_get_drvdata(pdev); 5710 struct e1000_adapter *adapter = netdev_priv(netdev); 5711 5712 if (e1000e_pm_ready(adapter)) { 5713 bool wake; 5714 5715 __e1000_shutdown(pdev, &wake, true); 5716 } 5717 5718 return 0; 5719 } 5720 5721 static int e1000_idle(struct device *dev) 5722 { 5723 struct pci_dev *pdev = to_pci_dev(dev); 5724 struct net_device *netdev = pci_get_drvdata(pdev); 5725 struct e1000_adapter *adapter = netdev_priv(netdev); 5726 5727 if (!e1000e_pm_ready(adapter)) 5728 return 0; 5729 5730 if (adapter->idle_check) { 5731 adapter->idle_check = false; 5732 if (!e1000e_has_link(adapter)) 5733 pm_schedule_suspend(dev, MSEC_PER_SEC); 5734 } 5735 5736 return -EBUSY; 5737 } 5738 5739 static int e1000_runtime_resume(struct device *dev) 5740 { 5741 struct pci_dev *pdev = to_pci_dev(dev); 5742 struct net_device *netdev = pci_get_drvdata(pdev); 5743 struct e1000_adapter *adapter = netdev_priv(netdev); 5744 5745 if (!e1000e_pm_ready(adapter)) 5746 return 0; 5747 5748 adapter->idle_check = !dev->power.runtime_auto; 5749 return __e1000_resume(pdev); 5750 } 5751 #endif /* CONFIG_PM_RUNTIME */ 5752 #endif /* CONFIG_PM */ 5753 5754 static void e1000_shutdown(struct pci_dev *pdev) 5755 { 5756 bool wake = false; 5757 5758 __e1000_shutdown(pdev, &wake, false); 5759 5760 if (system_state == SYSTEM_POWER_OFF) 5761 e1000_complete_shutdown(pdev, false, wake); 5762 } 5763 5764 #ifdef CONFIG_NET_POLL_CONTROLLER 5765 5766 static irqreturn_t e1000_intr_msix(int irq, void *data) 5767 { 5768 struct net_device *netdev = data; 5769 struct e1000_adapter *adapter = netdev_priv(netdev); 5770 5771 if (adapter->msix_entries) { 5772 int vector, msix_irq; 5773 5774 vector = 0; 5775 msix_irq = adapter->msix_entries[vector].vector; 5776 disable_irq(msix_irq); 5777 e1000_intr_msix_rx(msix_irq, netdev); 5778 enable_irq(msix_irq); 5779 5780 vector++; 5781 msix_irq = adapter->msix_entries[vector].vector; 5782 disable_irq(msix_irq); 5783 e1000_intr_msix_tx(msix_irq, netdev); 5784 enable_irq(msix_irq); 5785 5786 vector++; 5787 msix_irq = adapter->msix_entries[vector].vector; 5788 disable_irq(msix_irq); 5789 e1000_msix_other(msix_irq, netdev); 5790 enable_irq(msix_irq); 5791 } 5792 5793 return IRQ_HANDLED; 5794 } 5795 5796 /* 5797 * Polling 'interrupt' - used by things like netconsole to send skbs 5798 * without having to re-enable interrupts. It's not called while 5799 * the interrupt routine is executing. 5800 */ 5801 static void e1000_netpoll(struct net_device *netdev) 5802 { 5803 struct e1000_adapter *adapter = netdev_priv(netdev); 5804 5805 switch (adapter->int_mode) { 5806 case E1000E_INT_MODE_MSIX: 5807 e1000_intr_msix(adapter->pdev->irq, netdev); 5808 break; 5809 case E1000E_INT_MODE_MSI: 5810 disable_irq(adapter->pdev->irq); 5811 e1000_intr_msi(adapter->pdev->irq, netdev); 5812 enable_irq(adapter->pdev->irq); 5813 break; 5814 default: /* E1000E_INT_MODE_LEGACY */ 5815 disable_irq(adapter->pdev->irq); 5816 e1000_intr(adapter->pdev->irq, netdev); 5817 enable_irq(adapter->pdev->irq); 5818 break; 5819 } 5820 } 5821 #endif 5822 5823 /** 5824 * e1000_io_error_detected - called when PCI error is detected 5825 * @pdev: Pointer to PCI device 5826 * @state: The current pci connection state 5827 * 5828 * This function is called after a PCI bus error affecting 5829 * this device has been detected. 5830 */ 5831 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, 5832 pci_channel_state_t state) 5833 { 5834 struct net_device *netdev = pci_get_drvdata(pdev); 5835 struct e1000_adapter *adapter = netdev_priv(netdev); 5836 5837 netif_device_detach(netdev); 5838 5839 if (state == pci_channel_io_perm_failure) 5840 return PCI_ERS_RESULT_DISCONNECT; 5841 5842 if (netif_running(netdev)) 5843 e1000e_down(adapter); 5844 pci_disable_device(pdev); 5845 5846 /* Request a slot slot reset. */ 5847 return PCI_ERS_RESULT_NEED_RESET; 5848 } 5849 5850 /** 5851 * e1000_io_slot_reset - called after the pci bus has been reset. 5852 * @pdev: Pointer to PCI device 5853 * 5854 * Restart the card from scratch, as if from a cold-boot. Implementation 5855 * resembles the first-half of the e1000_resume routine. 5856 */ 5857 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev) 5858 { 5859 struct net_device *netdev = pci_get_drvdata(pdev); 5860 struct e1000_adapter *adapter = netdev_priv(netdev); 5861 struct e1000_hw *hw = &adapter->hw; 5862 u16 aspm_disable_flag = 0; 5863 int err; 5864 pci_ers_result_t result; 5865 5866 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S) 5867 aspm_disable_flag = PCIE_LINK_STATE_L0S; 5868 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1) 5869 aspm_disable_flag |= PCIE_LINK_STATE_L1; 5870 if (aspm_disable_flag) 5871 e1000e_disable_aspm(pdev, aspm_disable_flag); 5872 5873 err = pci_enable_device_mem(pdev); 5874 if (err) { 5875 dev_err(&pdev->dev, 5876 "Cannot re-enable PCI device after reset.\n"); 5877 result = PCI_ERS_RESULT_DISCONNECT; 5878 } else { 5879 pci_set_master(pdev); 5880 pdev->state_saved = true; 5881 pci_restore_state(pdev); 5882 5883 pci_enable_wake(pdev, PCI_D3hot, 0); 5884 pci_enable_wake(pdev, PCI_D3cold, 0); 5885 5886 e1000e_reset(adapter); 5887 ew32(WUS, ~0); 5888 result = PCI_ERS_RESULT_RECOVERED; 5889 } 5890 5891 pci_cleanup_aer_uncorrect_error_status(pdev); 5892 5893 return result; 5894 } 5895 5896 /** 5897 * e1000_io_resume - called when traffic can start flowing again. 5898 * @pdev: Pointer to PCI device 5899 * 5900 * This callback is called when the error recovery driver tells us that 5901 * its OK to resume normal operation. Implementation resembles the 5902 * second-half of the e1000_resume routine. 5903 */ 5904 static void e1000_io_resume(struct pci_dev *pdev) 5905 { 5906 struct net_device *netdev = pci_get_drvdata(pdev); 5907 struct e1000_adapter *adapter = netdev_priv(netdev); 5908 5909 e1000_init_manageability_pt(adapter); 5910 5911 if (netif_running(netdev)) { 5912 if (e1000e_up(adapter)) { 5913 dev_err(&pdev->dev, 5914 "can't bring device back up after reset\n"); 5915 return; 5916 } 5917 } 5918 5919 netif_device_attach(netdev); 5920 5921 /* 5922 * If the controller has AMT, do not set DRV_LOAD until the interface 5923 * is up. For all other cases, let the f/w know that the h/w is now 5924 * under the control of the driver. 5925 */ 5926 if (!(adapter->flags & FLAG_HAS_AMT)) 5927 e1000e_get_hw_control(adapter); 5928 5929 } 5930 5931 static void e1000_print_device_info(struct e1000_adapter *adapter) 5932 { 5933 struct e1000_hw *hw = &adapter->hw; 5934 struct net_device *netdev = adapter->netdev; 5935 u32 ret_val; 5936 u8 pba_str[E1000_PBANUM_LENGTH]; 5937 5938 /* print bus type/speed/width info */ 5939 e_info("(PCI Express:2.5GT/s:%s) %pM\n", 5940 /* bus width */ 5941 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" : 5942 "Width x1"), 5943 /* MAC address */ 5944 netdev->dev_addr); 5945 e_info("Intel(R) PRO/%s Network Connection\n", 5946 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000"); 5947 ret_val = e1000_read_pba_string_generic(hw, pba_str, 5948 E1000_PBANUM_LENGTH); 5949 if (ret_val) 5950 strlcpy((char *)pba_str, "Unknown", sizeof(pba_str)); 5951 e_info("MAC: %d, PHY: %d, PBA No: %s\n", 5952 hw->mac.type, hw->phy.type, pba_str); 5953 } 5954 5955 static void e1000_eeprom_checks(struct e1000_adapter *adapter) 5956 { 5957 struct e1000_hw *hw = &adapter->hw; 5958 int ret_val; 5959 u16 buf = 0; 5960 5961 if (hw->mac.type != e1000_82573) 5962 return; 5963 5964 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf); 5965 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) { 5966 /* Deep Smart Power Down (DSPD) */ 5967 dev_warn(&adapter->pdev->dev, 5968 "Warning: detected DSPD enabled in EEPROM\n"); 5969 } 5970 } 5971 5972 static int e1000_set_features(struct net_device *netdev, 5973 netdev_features_t features) 5974 { 5975 struct e1000_adapter *adapter = netdev_priv(netdev); 5976 netdev_features_t changed = features ^ netdev->features; 5977 5978 if (changed & (NETIF_F_TSO | NETIF_F_TSO6)) 5979 adapter->flags |= FLAG_TSO_FORCE; 5980 5981 if (!(changed & (NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_TX | 5982 NETIF_F_RXCSUM | NETIF_F_RXHASH))) 5983 return 0; 5984 5985 /* 5986 * IP payload checksum (enabled with jumbos/packet-split when Rx 5987 * checksum is enabled) and generation of RSS hash is mutually 5988 * exclusive in the hardware. 5989 */ 5990 if (adapter->rx_ps_pages && 5991 (features & NETIF_F_RXCSUM) && (features & NETIF_F_RXHASH)) { 5992 e_err("Enabling both receive checksum offload and receive hashing is not possible with jumbo frames. Disable jumbos or enable only one of the receive offload features.\n"); 5993 return -EINVAL; 5994 } 5995 5996 netdev->features = features; 5997 5998 if (netif_running(netdev)) 5999 e1000e_reinit_locked(adapter); 6000 else 6001 e1000e_reset(adapter); 6002 6003 return 0; 6004 } 6005 6006 static const struct net_device_ops e1000e_netdev_ops = { 6007 .ndo_open = e1000_open, 6008 .ndo_stop = e1000_close, 6009 .ndo_start_xmit = e1000_xmit_frame, 6010 .ndo_get_stats64 = e1000e_get_stats64, 6011 .ndo_set_rx_mode = e1000e_set_rx_mode, 6012 .ndo_set_mac_address = e1000_set_mac, 6013 .ndo_change_mtu = e1000_change_mtu, 6014 .ndo_do_ioctl = e1000_ioctl, 6015 .ndo_tx_timeout = e1000_tx_timeout, 6016 .ndo_validate_addr = eth_validate_addr, 6017 6018 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid, 6019 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid, 6020 #ifdef CONFIG_NET_POLL_CONTROLLER 6021 .ndo_poll_controller = e1000_netpoll, 6022 #endif 6023 .ndo_set_features = e1000_set_features, 6024 }; 6025 6026 /** 6027 * e1000_probe - Device Initialization Routine 6028 * @pdev: PCI device information struct 6029 * @ent: entry in e1000_pci_tbl 6030 * 6031 * Returns 0 on success, negative on failure 6032 * 6033 * e1000_probe initializes an adapter identified by a pci_dev structure. 6034 * The OS initialization, configuring of the adapter private structure, 6035 * and a hardware reset occur. 6036 **/ 6037 static int __devinit e1000_probe(struct pci_dev *pdev, 6038 const struct pci_device_id *ent) 6039 { 6040 struct net_device *netdev; 6041 struct e1000_adapter *adapter; 6042 struct e1000_hw *hw; 6043 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data]; 6044 resource_size_t mmio_start, mmio_len; 6045 resource_size_t flash_start, flash_len; 6046 6047 static int cards_found; 6048 u16 aspm_disable_flag = 0; 6049 int i, err, pci_using_dac; 6050 u16 eeprom_data = 0; 6051 u16 eeprom_apme_mask = E1000_EEPROM_APME; 6052 6053 if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S) 6054 aspm_disable_flag = PCIE_LINK_STATE_L0S; 6055 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1) 6056 aspm_disable_flag |= PCIE_LINK_STATE_L1; 6057 if (aspm_disable_flag) 6058 e1000e_disable_aspm(pdev, aspm_disable_flag); 6059 6060 err = pci_enable_device_mem(pdev); 6061 if (err) 6062 return err; 6063 6064 pci_using_dac = 0; 6065 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)); 6066 if (!err) { 6067 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64)); 6068 if (!err) 6069 pci_using_dac = 1; 6070 } else { 6071 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); 6072 if (err) { 6073 err = dma_set_coherent_mask(&pdev->dev, 6074 DMA_BIT_MASK(32)); 6075 if (err) { 6076 dev_err(&pdev->dev, "No usable DMA configuration, aborting\n"); 6077 goto err_dma; 6078 } 6079 } 6080 } 6081 6082 err = pci_request_selected_regions_exclusive(pdev, 6083 pci_select_bars(pdev, IORESOURCE_MEM), 6084 e1000e_driver_name); 6085 if (err) 6086 goto err_pci_reg; 6087 6088 /* AER (Advanced Error Reporting) hooks */ 6089 pci_enable_pcie_error_reporting(pdev); 6090 6091 pci_set_master(pdev); 6092 /* PCI config space info */ 6093 err = pci_save_state(pdev); 6094 if (err) 6095 goto err_alloc_etherdev; 6096 6097 err = -ENOMEM; 6098 netdev = alloc_etherdev(sizeof(struct e1000_adapter)); 6099 if (!netdev) 6100 goto err_alloc_etherdev; 6101 6102 SET_NETDEV_DEV(netdev, &pdev->dev); 6103 6104 netdev->irq = pdev->irq; 6105 6106 pci_set_drvdata(pdev, netdev); 6107 adapter = netdev_priv(netdev); 6108 hw = &adapter->hw; 6109 adapter->netdev = netdev; 6110 adapter->pdev = pdev; 6111 adapter->ei = ei; 6112 adapter->pba = ei->pba; 6113 adapter->flags = ei->flags; 6114 adapter->flags2 = ei->flags2; 6115 adapter->hw.adapter = adapter; 6116 adapter->hw.mac.type = ei->mac; 6117 adapter->max_hw_frame_size = ei->max_hw_frame_size; 6118 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1; 6119 6120 mmio_start = pci_resource_start(pdev, 0); 6121 mmio_len = pci_resource_len(pdev, 0); 6122 6123 err = -EIO; 6124 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len); 6125 if (!adapter->hw.hw_addr) 6126 goto err_ioremap; 6127 6128 if ((adapter->flags & FLAG_HAS_FLASH) && 6129 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) { 6130 flash_start = pci_resource_start(pdev, 1); 6131 flash_len = pci_resource_len(pdev, 1); 6132 adapter->hw.flash_address = ioremap(flash_start, flash_len); 6133 if (!adapter->hw.flash_address) 6134 goto err_flashmap; 6135 } 6136 6137 /* construct the net_device struct */ 6138 netdev->netdev_ops = &e1000e_netdev_ops; 6139 e1000e_set_ethtool_ops(netdev); 6140 netdev->watchdog_timeo = 5 * HZ; 6141 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64); 6142 strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name)); 6143 6144 netdev->mem_start = mmio_start; 6145 netdev->mem_end = mmio_start + mmio_len; 6146 6147 adapter->bd_number = cards_found++; 6148 6149 e1000e_check_options(adapter); 6150 6151 /* setup adapter struct */ 6152 err = e1000_sw_init(adapter); 6153 if (err) 6154 goto err_sw_init; 6155 6156 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops)); 6157 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops)); 6158 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops)); 6159 6160 err = ei->get_variants(adapter); 6161 if (err) 6162 goto err_hw_init; 6163 6164 if ((adapter->flags & FLAG_IS_ICH) && 6165 (adapter->flags & FLAG_READ_ONLY_NVM)) 6166 e1000e_write_protect_nvm_ich8lan(&adapter->hw); 6167 6168 hw->mac.ops.get_bus_info(&adapter->hw); 6169 6170 adapter->hw.phy.autoneg_wait_to_complete = 0; 6171 6172 /* Copper options */ 6173 if (adapter->hw.phy.media_type == e1000_media_type_copper) { 6174 adapter->hw.phy.mdix = AUTO_ALL_MODES; 6175 adapter->hw.phy.disable_polarity_correction = 0; 6176 adapter->hw.phy.ms_type = e1000_ms_hw_default; 6177 } 6178 6179 if (e1000_check_reset_block(&adapter->hw)) 6180 e_info("PHY reset is blocked due to SOL/IDER session.\n"); 6181 6182 /* Set initial default active device features */ 6183 netdev->features = (NETIF_F_SG | 6184 NETIF_F_HW_VLAN_RX | 6185 NETIF_F_HW_VLAN_TX | 6186 NETIF_F_TSO | 6187 NETIF_F_TSO6 | 6188 NETIF_F_RXHASH | 6189 NETIF_F_RXCSUM | 6190 NETIF_F_HW_CSUM); 6191 6192 /* Set user-changeable features (subset of all device features) */ 6193 netdev->hw_features = netdev->features; 6194 6195 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) 6196 netdev->features |= NETIF_F_HW_VLAN_FILTER; 6197 6198 netdev->vlan_features |= (NETIF_F_SG | 6199 NETIF_F_TSO | 6200 NETIF_F_TSO6 | 6201 NETIF_F_HW_CSUM); 6202 6203 netdev->priv_flags |= IFF_UNICAST_FLT; 6204 6205 if (pci_using_dac) { 6206 netdev->features |= NETIF_F_HIGHDMA; 6207 netdev->vlan_features |= NETIF_F_HIGHDMA; 6208 } 6209 6210 if (e1000e_enable_mng_pass_thru(&adapter->hw)) 6211 adapter->flags |= FLAG_MNG_PT_ENABLED; 6212 6213 /* 6214 * before reading the NVM, reset the controller to 6215 * put the device in a known good starting state 6216 */ 6217 adapter->hw.mac.ops.reset_hw(&adapter->hw); 6218 6219 /* 6220 * systems with ASPM and others may see the checksum fail on the first 6221 * attempt. Let's give it a few tries 6222 */ 6223 for (i = 0;; i++) { 6224 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0) 6225 break; 6226 if (i == 2) { 6227 e_err("The NVM Checksum Is Not Valid\n"); 6228 err = -EIO; 6229 goto err_eeprom; 6230 } 6231 } 6232 6233 e1000_eeprom_checks(adapter); 6234 6235 /* copy the MAC address */ 6236 if (e1000e_read_mac_addr(&adapter->hw)) 6237 e_err("NVM Read Error while reading MAC address\n"); 6238 6239 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len); 6240 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len); 6241 6242 if (!is_valid_ether_addr(netdev->perm_addr)) { 6243 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr); 6244 err = -EIO; 6245 goto err_eeprom; 6246 } 6247 6248 init_timer(&adapter->watchdog_timer); 6249 adapter->watchdog_timer.function = e1000_watchdog; 6250 adapter->watchdog_timer.data = (unsigned long) adapter; 6251 6252 init_timer(&adapter->phy_info_timer); 6253 adapter->phy_info_timer.function = e1000_update_phy_info; 6254 adapter->phy_info_timer.data = (unsigned long) adapter; 6255 6256 INIT_WORK(&adapter->reset_task, e1000_reset_task); 6257 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task); 6258 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround); 6259 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task); 6260 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang); 6261 6262 /* Initialize link parameters. User can change them with ethtool */ 6263 adapter->hw.mac.autoneg = 1; 6264 adapter->fc_autoneg = true; 6265 adapter->hw.fc.requested_mode = e1000_fc_default; 6266 adapter->hw.fc.current_mode = e1000_fc_default; 6267 adapter->hw.phy.autoneg_advertised = 0x2f; 6268 6269 /* ring size defaults */ 6270 adapter->rx_ring->count = 256; 6271 adapter->tx_ring->count = 256; 6272 6273 /* 6274 * Initial Wake on LAN setting - If APM wake is enabled in 6275 * the EEPROM, enable the ACPI Magic Packet filter 6276 */ 6277 if (adapter->flags & FLAG_APME_IN_WUC) { 6278 /* APME bit in EEPROM is mapped to WUC.APME */ 6279 eeprom_data = er32(WUC); 6280 eeprom_apme_mask = E1000_WUC_APME; 6281 if ((hw->mac.type > e1000_ich10lan) && 6282 (eeprom_data & E1000_WUC_PHY_WAKE)) 6283 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP; 6284 } else if (adapter->flags & FLAG_APME_IN_CTRL3) { 6285 if (adapter->flags & FLAG_APME_CHECK_PORT_B && 6286 (adapter->hw.bus.func == 1)) 6287 e1000_read_nvm(&adapter->hw, 6288 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data); 6289 else 6290 e1000_read_nvm(&adapter->hw, 6291 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data); 6292 } 6293 6294 /* fetch WoL from EEPROM */ 6295 if (eeprom_data & eeprom_apme_mask) 6296 adapter->eeprom_wol |= E1000_WUFC_MAG; 6297 6298 /* 6299 * now that we have the eeprom settings, apply the special cases 6300 * where the eeprom may be wrong or the board simply won't support 6301 * wake on lan on a particular port 6302 */ 6303 if (!(adapter->flags & FLAG_HAS_WOL)) 6304 adapter->eeprom_wol = 0; 6305 6306 /* initialize the wol settings based on the eeprom settings */ 6307 adapter->wol = adapter->eeprom_wol; 6308 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol); 6309 6310 /* save off EEPROM version number */ 6311 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers); 6312 6313 /* reset the hardware with the new settings */ 6314 e1000e_reset(adapter); 6315 6316 /* 6317 * If the controller has AMT, do not set DRV_LOAD until the interface 6318 * is up. For all other cases, let the f/w know that the h/w is now 6319 * under the control of the driver. 6320 */ 6321 if (!(adapter->flags & FLAG_HAS_AMT)) 6322 e1000e_get_hw_control(adapter); 6323 6324 strlcpy(netdev->name, "eth%d", sizeof(netdev->name)); 6325 err = register_netdev(netdev); 6326 if (err) 6327 goto err_register; 6328 6329 /* carrier off reporting is important to ethtool even BEFORE open */ 6330 netif_carrier_off(netdev); 6331 6332 e1000_print_device_info(adapter); 6333 6334 if (pci_dev_run_wake(pdev)) 6335 pm_runtime_put_noidle(&pdev->dev); 6336 6337 return 0; 6338 6339 err_register: 6340 if (!(adapter->flags & FLAG_HAS_AMT)) 6341 e1000e_release_hw_control(adapter); 6342 err_eeprom: 6343 if (!e1000_check_reset_block(&adapter->hw)) 6344 e1000_phy_hw_reset(&adapter->hw); 6345 err_hw_init: 6346 kfree(adapter->tx_ring); 6347 kfree(adapter->rx_ring); 6348 err_sw_init: 6349 if (adapter->hw.flash_address) 6350 iounmap(adapter->hw.flash_address); 6351 e1000e_reset_interrupt_capability(adapter); 6352 err_flashmap: 6353 iounmap(adapter->hw.hw_addr); 6354 err_ioremap: 6355 free_netdev(netdev); 6356 err_alloc_etherdev: 6357 pci_release_selected_regions(pdev, 6358 pci_select_bars(pdev, IORESOURCE_MEM)); 6359 err_pci_reg: 6360 err_dma: 6361 pci_disable_device(pdev); 6362 return err; 6363 } 6364 6365 /** 6366 * e1000_remove - Device Removal Routine 6367 * @pdev: PCI device information struct 6368 * 6369 * e1000_remove is called by the PCI subsystem to alert the driver 6370 * that it should release a PCI device. The could be caused by a 6371 * Hot-Plug event, or because the driver is going to be removed from 6372 * memory. 6373 **/ 6374 static void __devexit e1000_remove(struct pci_dev *pdev) 6375 { 6376 struct net_device *netdev = pci_get_drvdata(pdev); 6377 struct e1000_adapter *adapter = netdev_priv(netdev); 6378 bool down = test_bit(__E1000_DOWN, &adapter->state); 6379 6380 /* 6381 * The timers may be rescheduled, so explicitly disable them 6382 * from being rescheduled. 6383 */ 6384 if (!down) 6385 set_bit(__E1000_DOWN, &adapter->state); 6386 del_timer_sync(&adapter->watchdog_timer); 6387 del_timer_sync(&adapter->phy_info_timer); 6388 6389 cancel_work_sync(&adapter->reset_task); 6390 cancel_work_sync(&adapter->watchdog_task); 6391 cancel_work_sync(&adapter->downshift_task); 6392 cancel_work_sync(&adapter->update_phy_task); 6393 cancel_work_sync(&adapter->print_hang_task); 6394 6395 if (!(netdev->flags & IFF_UP)) 6396 e1000_power_down_phy(adapter); 6397 6398 /* Don't lie to e1000_close() down the road. */ 6399 if (!down) 6400 clear_bit(__E1000_DOWN, &adapter->state); 6401 unregister_netdev(netdev); 6402 6403 if (pci_dev_run_wake(pdev)) 6404 pm_runtime_get_noresume(&pdev->dev); 6405 6406 /* 6407 * Release control of h/w to f/w. If f/w is AMT enabled, this 6408 * would have already happened in close and is redundant. 6409 */ 6410 e1000e_release_hw_control(adapter); 6411 6412 e1000e_reset_interrupt_capability(adapter); 6413 kfree(adapter->tx_ring); 6414 kfree(adapter->rx_ring); 6415 6416 iounmap(adapter->hw.hw_addr); 6417 if (adapter->hw.flash_address) 6418 iounmap(adapter->hw.flash_address); 6419 pci_release_selected_regions(pdev, 6420 pci_select_bars(pdev, IORESOURCE_MEM)); 6421 6422 free_netdev(netdev); 6423 6424 /* AER disable */ 6425 pci_disable_pcie_error_reporting(pdev); 6426 6427 pci_disable_device(pdev); 6428 } 6429 6430 /* PCI Error Recovery (ERS) */ 6431 static struct pci_error_handlers e1000_err_handler = { 6432 .error_detected = e1000_io_error_detected, 6433 .slot_reset = e1000_io_slot_reset, 6434 .resume = e1000_io_resume, 6435 }; 6436 6437 static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = { 6438 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 }, 6439 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 }, 6440 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 }, 6441 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 }, 6442 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 }, 6443 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 }, 6444 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 }, 6445 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 }, 6446 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 }, 6447 6448 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 }, 6449 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 }, 6450 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 }, 6451 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 }, 6452 6453 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 }, 6454 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 }, 6455 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 }, 6456 6457 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 }, 6458 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 }, 6459 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 }, 6460 6461 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT), 6462 board_80003es2lan }, 6463 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT), 6464 board_80003es2lan }, 6465 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT), 6466 board_80003es2lan }, 6467 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT), 6468 board_80003es2lan }, 6469 6470 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan }, 6471 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan }, 6472 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan }, 6473 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan }, 6474 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan }, 6475 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan }, 6476 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan }, 6477 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan }, 6478 6479 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan }, 6480 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan }, 6481 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan }, 6482 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan }, 6483 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan }, 6484 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan }, 6485 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan }, 6486 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan }, 6487 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan }, 6488 6489 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan }, 6490 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan }, 6491 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan }, 6492 6493 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan }, 6494 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan }, 6495 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan }, 6496 6497 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan }, 6498 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan }, 6499 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan }, 6500 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan }, 6501 6502 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan }, 6503 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan }, 6504 6505 { } /* terminate list */ 6506 }; 6507 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl); 6508 6509 #ifdef CONFIG_PM 6510 static const struct dev_pm_ops e1000_pm_ops = { 6511 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume) 6512 SET_RUNTIME_PM_OPS(e1000_runtime_suspend, 6513 e1000_runtime_resume, e1000_idle) 6514 }; 6515 #endif 6516 6517 /* PCI Device API Driver */ 6518 static struct pci_driver e1000_driver = { 6519 .name = e1000e_driver_name, 6520 .id_table = e1000_pci_tbl, 6521 .probe = e1000_probe, 6522 .remove = __devexit_p(e1000_remove), 6523 #ifdef CONFIG_PM 6524 .driver.pm = &e1000_pm_ops, 6525 #endif 6526 .shutdown = e1000_shutdown, 6527 .err_handler = &e1000_err_handler 6528 }; 6529 6530 /** 6531 * e1000_init_module - Driver Registration Routine 6532 * 6533 * e1000_init_module is the first routine called when the driver is 6534 * loaded. All it does is register with the PCI subsystem. 6535 **/ 6536 static int __init e1000_init_module(void) 6537 { 6538 int ret; 6539 pr_info("Intel(R) PRO/1000 Network Driver - %s\n", 6540 e1000e_driver_version); 6541 pr_info("Copyright(c) 1999 - 2012 Intel Corporation.\n"); 6542 ret = pci_register_driver(&e1000_driver); 6543 6544 return ret; 6545 } 6546 module_init(e1000_init_module); 6547 6548 /** 6549 * e1000_exit_module - Driver Exit Cleanup Routine 6550 * 6551 * e1000_exit_module is called just before the driver is removed 6552 * from memory. 6553 **/ 6554 static void __exit e1000_exit_module(void) 6555 { 6556 pci_unregister_driver(&e1000_driver); 6557 } 6558 module_exit(e1000_exit_module); 6559 6560 6561 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); 6562 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver"); 6563 MODULE_LICENSE("GPL"); 6564 MODULE_VERSION(DRV_VERSION); 6565 6566 /* e1000_main.c */ 6567