1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 1999 - 2006 Intel Corporation. */ 3 4 /* ethtool support for e1000 */ 5 6 #include "e1000.h" 7 #include <linux/jiffies.h> 8 #include <linux/uaccess.h> 9 10 enum {NETDEV_STATS, E1000_STATS}; 11 12 struct e1000_stats { 13 char stat_string[ETH_GSTRING_LEN]; 14 int type; 15 int sizeof_stat; 16 int stat_offset; 17 }; 18 19 #define E1000_STAT(m) E1000_STATS, \ 20 sizeof(((struct e1000_adapter *)0)->m), \ 21 offsetof(struct e1000_adapter, m) 22 #define E1000_NETDEV_STAT(m) NETDEV_STATS, \ 23 sizeof(((struct net_device *)0)->m), \ 24 offsetof(struct net_device, m) 25 26 static const struct e1000_stats e1000_gstrings_stats[] = { 27 { "rx_packets", E1000_STAT(stats.gprc) }, 28 { "tx_packets", E1000_STAT(stats.gptc) }, 29 { "rx_bytes", E1000_STAT(stats.gorcl) }, 30 { "tx_bytes", E1000_STAT(stats.gotcl) }, 31 { "rx_broadcast", E1000_STAT(stats.bprc) }, 32 { "tx_broadcast", E1000_STAT(stats.bptc) }, 33 { "rx_multicast", E1000_STAT(stats.mprc) }, 34 { "tx_multicast", E1000_STAT(stats.mptc) }, 35 { "rx_errors", E1000_STAT(stats.rxerrc) }, 36 { "tx_errors", E1000_STAT(stats.txerrc) }, 37 { "tx_dropped", E1000_NETDEV_STAT(stats.tx_dropped) }, 38 { "multicast", E1000_STAT(stats.mprc) }, 39 { "collisions", E1000_STAT(stats.colc) }, 40 { "rx_length_errors", E1000_STAT(stats.rlerrc) }, 41 { "rx_over_errors", E1000_NETDEV_STAT(stats.rx_over_errors) }, 42 { "rx_crc_errors", E1000_STAT(stats.crcerrs) }, 43 { "rx_frame_errors", E1000_NETDEV_STAT(stats.rx_frame_errors) }, 44 { "rx_no_buffer_count", E1000_STAT(stats.rnbc) }, 45 { "rx_missed_errors", E1000_STAT(stats.mpc) }, 46 { "tx_aborted_errors", E1000_STAT(stats.ecol) }, 47 { "tx_carrier_errors", E1000_STAT(stats.tncrs) }, 48 { "tx_fifo_errors", E1000_NETDEV_STAT(stats.tx_fifo_errors) }, 49 { "tx_heartbeat_errors", E1000_NETDEV_STAT(stats.tx_heartbeat_errors) }, 50 { "tx_window_errors", E1000_STAT(stats.latecol) }, 51 { "tx_abort_late_coll", E1000_STAT(stats.latecol) }, 52 { "tx_deferred_ok", E1000_STAT(stats.dc) }, 53 { "tx_single_coll_ok", E1000_STAT(stats.scc) }, 54 { "tx_multi_coll_ok", E1000_STAT(stats.mcc) }, 55 { "tx_timeout_count", E1000_STAT(tx_timeout_count) }, 56 { "tx_restart_queue", E1000_STAT(restart_queue) }, 57 { "rx_long_length_errors", E1000_STAT(stats.roc) }, 58 { "rx_short_length_errors", E1000_STAT(stats.ruc) }, 59 { "rx_align_errors", E1000_STAT(stats.algnerrc) }, 60 { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) }, 61 { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) }, 62 { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) }, 63 { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) }, 64 { "tx_flow_control_xon", E1000_STAT(stats.xontxc) }, 65 { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) }, 66 { "rx_long_byte_count", E1000_STAT(stats.gorcl) }, 67 { "rx_csum_offload_good", E1000_STAT(hw_csum_good) }, 68 { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) }, 69 { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) }, 70 { "tx_smbus", E1000_STAT(stats.mgptc) }, 71 { "rx_smbus", E1000_STAT(stats.mgprc) }, 72 { "dropped_smbus", E1000_STAT(stats.mgpdc) }, 73 }; 74 75 #define E1000_QUEUE_STATS_LEN 0 76 #define E1000_GLOBAL_STATS_LEN ARRAY_SIZE(e1000_gstrings_stats) 77 #define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN) 78 static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = { 79 "Register test (offline)", "Eeprom test (offline)", 80 "Interrupt test (offline)", "Loopback test (offline)", 81 "Link test (on/offline)" 82 }; 83 84 #define E1000_TEST_LEN ARRAY_SIZE(e1000_gstrings_test) 85 86 static int e1000_get_link_ksettings(struct net_device *netdev, 87 struct ethtool_link_ksettings *cmd) 88 { 89 struct e1000_adapter *adapter = netdev_priv(netdev); 90 struct e1000_hw *hw = &adapter->hw; 91 u32 supported, advertising; 92 93 if (hw->media_type == e1000_media_type_copper) { 94 supported = (SUPPORTED_10baseT_Half | 95 SUPPORTED_10baseT_Full | 96 SUPPORTED_100baseT_Half | 97 SUPPORTED_100baseT_Full | 98 SUPPORTED_1000baseT_Full| 99 SUPPORTED_Autoneg | 100 SUPPORTED_TP); 101 advertising = ADVERTISED_TP; 102 103 if (hw->autoneg == 1) { 104 advertising |= ADVERTISED_Autoneg; 105 /* the e1000 autoneg seems to match ethtool nicely */ 106 advertising |= hw->autoneg_advertised; 107 } 108 109 cmd->base.port = PORT_TP; 110 cmd->base.phy_address = hw->phy_addr; 111 } else { 112 supported = (SUPPORTED_1000baseT_Full | 113 SUPPORTED_FIBRE | 114 SUPPORTED_Autoneg); 115 116 advertising = (ADVERTISED_1000baseT_Full | 117 ADVERTISED_FIBRE | 118 ADVERTISED_Autoneg); 119 120 cmd->base.port = PORT_FIBRE; 121 } 122 123 if (er32(STATUS) & E1000_STATUS_LU) { 124 e1000_get_speed_and_duplex(hw, &adapter->link_speed, 125 &adapter->link_duplex); 126 cmd->base.speed = adapter->link_speed; 127 128 /* unfortunately FULL_DUPLEX != DUPLEX_FULL 129 * and HALF_DUPLEX != DUPLEX_HALF 130 */ 131 if (adapter->link_duplex == FULL_DUPLEX) 132 cmd->base.duplex = DUPLEX_FULL; 133 else 134 cmd->base.duplex = DUPLEX_HALF; 135 } else { 136 cmd->base.speed = SPEED_UNKNOWN; 137 cmd->base.duplex = DUPLEX_UNKNOWN; 138 } 139 140 cmd->base.autoneg = ((hw->media_type == e1000_media_type_fiber) || 141 hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE; 142 143 /* MDI-X => 1; MDI => 0 */ 144 if ((hw->media_type == e1000_media_type_copper) && 145 netif_carrier_ok(netdev)) 146 cmd->base.eth_tp_mdix = (!!adapter->phy_info.mdix_mode ? 147 ETH_TP_MDI_X : ETH_TP_MDI); 148 else 149 cmd->base.eth_tp_mdix = ETH_TP_MDI_INVALID; 150 151 if (hw->mdix == AUTO_ALL_MODES) 152 cmd->base.eth_tp_mdix_ctrl = ETH_TP_MDI_AUTO; 153 else 154 cmd->base.eth_tp_mdix_ctrl = hw->mdix; 155 156 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported, 157 supported); 158 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising, 159 advertising); 160 161 return 0; 162 } 163 164 static int e1000_set_link_ksettings(struct net_device *netdev, 165 const struct ethtool_link_ksettings *cmd) 166 { 167 struct e1000_adapter *adapter = netdev_priv(netdev); 168 struct e1000_hw *hw = &adapter->hw; 169 u32 advertising; 170 171 ethtool_convert_link_mode_to_legacy_u32(&advertising, 172 cmd->link_modes.advertising); 173 174 /* MDI setting is only allowed when autoneg enabled because 175 * some hardware doesn't allow MDI setting when speed or 176 * duplex is forced. 177 */ 178 if (cmd->base.eth_tp_mdix_ctrl) { 179 if (hw->media_type != e1000_media_type_copper) 180 return -EOPNOTSUPP; 181 182 if ((cmd->base.eth_tp_mdix_ctrl != ETH_TP_MDI_AUTO) && 183 (cmd->base.autoneg != AUTONEG_ENABLE)) { 184 e_err(drv, "forcing MDI/MDI-X state is not supported when link speed and/or duplex are forced\n"); 185 return -EINVAL; 186 } 187 } 188 189 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags)) 190 msleep(1); 191 192 if (cmd->base.autoneg == AUTONEG_ENABLE) { 193 hw->autoneg = 1; 194 if (hw->media_type == e1000_media_type_fiber) 195 hw->autoneg_advertised = ADVERTISED_1000baseT_Full | 196 ADVERTISED_FIBRE | 197 ADVERTISED_Autoneg; 198 else 199 hw->autoneg_advertised = advertising | 200 ADVERTISED_TP | 201 ADVERTISED_Autoneg; 202 } else { 203 u32 speed = cmd->base.speed; 204 /* calling this overrides forced MDI setting */ 205 if (e1000_set_spd_dplx(adapter, speed, cmd->base.duplex)) { 206 clear_bit(__E1000_RESETTING, &adapter->flags); 207 return -EINVAL; 208 } 209 } 210 211 /* MDI-X => 2; MDI => 1; Auto => 3 */ 212 if (cmd->base.eth_tp_mdix_ctrl) { 213 if (cmd->base.eth_tp_mdix_ctrl == ETH_TP_MDI_AUTO) 214 hw->mdix = AUTO_ALL_MODES; 215 else 216 hw->mdix = cmd->base.eth_tp_mdix_ctrl; 217 } 218 219 /* reset the link */ 220 221 if (netif_running(adapter->netdev)) { 222 e1000_down(adapter); 223 e1000_up(adapter); 224 } else { 225 e1000_reset(adapter); 226 } 227 clear_bit(__E1000_RESETTING, &adapter->flags); 228 return 0; 229 } 230 231 static u32 e1000_get_link(struct net_device *netdev) 232 { 233 struct e1000_adapter *adapter = netdev_priv(netdev); 234 235 /* If the link is not reported up to netdev, interrupts are disabled, 236 * and so the physical link state may have changed since we last 237 * looked. Set get_link_status to make sure that the true link 238 * state is interrogated, rather than pulling a cached and possibly 239 * stale link state from the driver. 240 */ 241 if (!netif_carrier_ok(netdev)) 242 adapter->hw.get_link_status = 1; 243 244 return e1000_has_link(adapter); 245 } 246 247 static void e1000_get_pauseparam(struct net_device *netdev, 248 struct ethtool_pauseparam *pause) 249 { 250 struct e1000_adapter *adapter = netdev_priv(netdev); 251 struct e1000_hw *hw = &adapter->hw; 252 253 pause->autoneg = 254 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE); 255 256 if (hw->fc == E1000_FC_RX_PAUSE) { 257 pause->rx_pause = 1; 258 } else if (hw->fc == E1000_FC_TX_PAUSE) { 259 pause->tx_pause = 1; 260 } else if (hw->fc == E1000_FC_FULL) { 261 pause->rx_pause = 1; 262 pause->tx_pause = 1; 263 } 264 } 265 266 static int e1000_set_pauseparam(struct net_device *netdev, 267 struct ethtool_pauseparam *pause) 268 { 269 struct e1000_adapter *adapter = netdev_priv(netdev); 270 struct e1000_hw *hw = &adapter->hw; 271 int retval = 0; 272 273 adapter->fc_autoneg = pause->autoneg; 274 275 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags)) 276 msleep(1); 277 278 if (pause->rx_pause && pause->tx_pause) 279 hw->fc = E1000_FC_FULL; 280 else if (pause->rx_pause && !pause->tx_pause) 281 hw->fc = E1000_FC_RX_PAUSE; 282 else if (!pause->rx_pause && pause->tx_pause) 283 hw->fc = E1000_FC_TX_PAUSE; 284 else if (!pause->rx_pause && !pause->tx_pause) 285 hw->fc = E1000_FC_NONE; 286 287 hw->original_fc = hw->fc; 288 289 if (adapter->fc_autoneg == AUTONEG_ENABLE) { 290 if (netif_running(adapter->netdev)) { 291 e1000_down(adapter); 292 e1000_up(adapter); 293 } else { 294 e1000_reset(adapter); 295 } 296 } else 297 retval = ((hw->media_type == e1000_media_type_fiber) ? 298 e1000_setup_link(hw) : e1000_force_mac_fc(hw)); 299 300 clear_bit(__E1000_RESETTING, &adapter->flags); 301 return retval; 302 } 303 304 static u32 e1000_get_msglevel(struct net_device *netdev) 305 { 306 struct e1000_adapter *adapter = netdev_priv(netdev); 307 308 return adapter->msg_enable; 309 } 310 311 static void e1000_set_msglevel(struct net_device *netdev, u32 data) 312 { 313 struct e1000_adapter *adapter = netdev_priv(netdev); 314 315 adapter->msg_enable = data; 316 } 317 318 static int e1000_get_regs_len(struct net_device *netdev) 319 { 320 #define E1000_REGS_LEN 32 321 return E1000_REGS_LEN * sizeof(u32); 322 } 323 324 static void e1000_get_regs(struct net_device *netdev, struct ethtool_regs *regs, 325 void *p) 326 { 327 struct e1000_adapter *adapter = netdev_priv(netdev); 328 struct e1000_hw *hw = &adapter->hw; 329 u32 *regs_buff = p; 330 u16 phy_data; 331 332 memset(p, 0, E1000_REGS_LEN * sizeof(u32)); 333 334 regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id; 335 336 regs_buff[0] = er32(CTRL); 337 regs_buff[1] = er32(STATUS); 338 339 regs_buff[2] = er32(RCTL); 340 regs_buff[3] = er32(RDLEN); 341 regs_buff[4] = er32(RDH); 342 regs_buff[5] = er32(RDT); 343 regs_buff[6] = er32(RDTR); 344 345 regs_buff[7] = er32(TCTL); 346 regs_buff[8] = er32(TDLEN); 347 regs_buff[9] = er32(TDH); 348 regs_buff[10] = er32(TDT); 349 regs_buff[11] = er32(TIDV); 350 351 regs_buff[12] = hw->phy_type; /* PHY type (IGP=1, M88=0) */ 352 if (hw->phy_type == e1000_phy_igp) { 353 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 354 IGP01E1000_PHY_AGC_A); 355 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A & 356 IGP01E1000_PHY_PAGE_SELECT, &phy_data); 357 regs_buff[13] = (u32)phy_data; /* cable length */ 358 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 359 IGP01E1000_PHY_AGC_B); 360 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B & 361 IGP01E1000_PHY_PAGE_SELECT, &phy_data); 362 regs_buff[14] = (u32)phy_data; /* cable length */ 363 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 364 IGP01E1000_PHY_AGC_C); 365 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C & 366 IGP01E1000_PHY_PAGE_SELECT, &phy_data); 367 regs_buff[15] = (u32)phy_data; /* cable length */ 368 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 369 IGP01E1000_PHY_AGC_D); 370 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D & 371 IGP01E1000_PHY_PAGE_SELECT, &phy_data); 372 regs_buff[16] = (u32)phy_data; /* cable length */ 373 regs_buff[17] = 0; /* extended 10bt distance (not needed) */ 374 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0); 375 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS & 376 IGP01E1000_PHY_PAGE_SELECT, &phy_data); 377 regs_buff[18] = (u32)phy_data; /* cable polarity */ 378 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 379 IGP01E1000_PHY_PCS_INIT_REG); 380 e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG & 381 IGP01E1000_PHY_PAGE_SELECT, &phy_data); 382 regs_buff[19] = (u32)phy_data; /* cable polarity */ 383 regs_buff[20] = 0; /* polarity correction enabled (always) */ 384 regs_buff[22] = 0; /* phy receive errors (unavailable) */ 385 regs_buff[23] = regs_buff[18]; /* mdix mode */ 386 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0); 387 } else { 388 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data); 389 regs_buff[13] = (u32)phy_data; /* cable length */ 390 regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */ 391 regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */ 392 regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */ 393 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data); 394 regs_buff[17] = (u32)phy_data; /* extended 10bt distance */ 395 regs_buff[18] = regs_buff[13]; /* cable polarity */ 396 regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */ 397 regs_buff[20] = regs_buff[17]; /* polarity correction */ 398 /* phy receive errors */ 399 regs_buff[22] = adapter->phy_stats.receive_errors; 400 regs_buff[23] = regs_buff[13]; /* mdix mode */ 401 } 402 regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */ 403 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data); 404 regs_buff[24] = (u32)phy_data; /* phy local receiver status */ 405 regs_buff[25] = regs_buff[24]; /* phy remote receiver status */ 406 if (hw->mac_type >= e1000_82540 && 407 hw->media_type == e1000_media_type_copper) { 408 regs_buff[26] = er32(MANC); 409 } 410 } 411 412 static int e1000_get_eeprom_len(struct net_device *netdev) 413 { 414 struct e1000_adapter *adapter = netdev_priv(netdev); 415 struct e1000_hw *hw = &adapter->hw; 416 417 return hw->eeprom.word_size * 2; 418 } 419 420 static int e1000_get_eeprom(struct net_device *netdev, 421 struct ethtool_eeprom *eeprom, u8 *bytes) 422 { 423 struct e1000_adapter *adapter = netdev_priv(netdev); 424 struct e1000_hw *hw = &adapter->hw; 425 u16 *eeprom_buff; 426 int first_word, last_word; 427 int ret_val = 0; 428 u16 i; 429 430 if (eeprom->len == 0) 431 return -EINVAL; 432 433 eeprom->magic = hw->vendor_id | (hw->device_id << 16); 434 435 first_word = eeprom->offset >> 1; 436 last_word = (eeprom->offset + eeprom->len - 1) >> 1; 437 438 eeprom_buff = kmalloc_array(last_word - first_word + 1, sizeof(u16), 439 GFP_KERNEL); 440 if (!eeprom_buff) 441 return -ENOMEM; 442 443 if (hw->eeprom.type == e1000_eeprom_spi) 444 ret_val = e1000_read_eeprom(hw, first_word, 445 last_word - first_word + 1, 446 eeprom_buff); 447 else { 448 for (i = 0; i < last_word - first_word + 1; i++) { 449 ret_val = e1000_read_eeprom(hw, first_word + i, 1, 450 &eeprom_buff[i]); 451 if (ret_val) 452 break; 453 } 454 } 455 456 /* Device's eeprom is always little-endian, word addressable */ 457 for (i = 0; i < last_word - first_word + 1; i++) 458 le16_to_cpus(&eeprom_buff[i]); 459 460 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), 461 eeprom->len); 462 kfree(eeprom_buff); 463 464 return ret_val; 465 } 466 467 static int e1000_set_eeprom(struct net_device *netdev, 468 struct ethtool_eeprom *eeprom, u8 *bytes) 469 { 470 struct e1000_adapter *adapter = netdev_priv(netdev); 471 struct e1000_hw *hw = &adapter->hw; 472 u16 *eeprom_buff; 473 void *ptr; 474 int max_len, first_word, last_word, ret_val = 0; 475 u16 i; 476 477 if (eeprom->len == 0) 478 return -EOPNOTSUPP; 479 480 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16))) 481 return -EFAULT; 482 483 max_len = hw->eeprom.word_size * 2; 484 485 first_word = eeprom->offset >> 1; 486 last_word = (eeprom->offset + eeprom->len - 1) >> 1; 487 eeprom_buff = kmalloc(max_len, GFP_KERNEL); 488 if (!eeprom_buff) 489 return -ENOMEM; 490 491 ptr = (void *)eeprom_buff; 492 493 if (eeprom->offset & 1) { 494 /* need read/modify/write of first changed EEPROM word 495 * only the second byte of the word is being modified 496 */ 497 ret_val = e1000_read_eeprom(hw, first_word, 1, 498 &eeprom_buff[0]); 499 ptr++; 500 } 501 if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) { 502 /* need read/modify/write of last changed EEPROM word 503 * only the first byte of the word is being modified 504 */ 505 ret_val = e1000_read_eeprom(hw, last_word, 1, 506 &eeprom_buff[last_word - first_word]); 507 } 508 509 /* Device's eeprom is always little-endian, word addressable */ 510 for (i = 0; i < last_word - first_word + 1; i++) 511 le16_to_cpus(&eeprom_buff[i]); 512 513 memcpy(ptr, bytes, eeprom->len); 514 515 for (i = 0; i < last_word - first_word + 1; i++) 516 cpu_to_le16s(&eeprom_buff[i]); 517 518 ret_val = e1000_write_eeprom(hw, first_word, 519 last_word - first_word + 1, eeprom_buff); 520 521 /* Update the checksum over the first part of the EEPROM if needed */ 522 if ((ret_val == 0) && (first_word <= EEPROM_CHECKSUM_REG)) 523 e1000_update_eeprom_checksum(hw); 524 525 kfree(eeprom_buff); 526 return ret_val; 527 } 528 529 static void e1000_get_drvinfo(struct net_device *netdev, 530 struct ethtool_drvinfo *drvinfo) 531 { 532 struct e1000_adapter *adapter = netdev_priv(netdev); 533 534 strlcpy(drvinfo->driver, e1000_driver_name, 535 sizeof(drvinfo->driver)); 536 537 strlcpy(drvinfo->bus_info, pci_name(adapter->pdev), 538 sizeof(drvinfo->bus_info)); 539 } 540 541 static void e1000_get_ringparam(struct net_device *netdev, 542 struct ethtool_ringparam *ring) 543 { 544 struct e1000_adapter *adapter = netdev_priv(netdev); 545 struct e1000_hw *hw = &adapter->hw; 546 e1000_mac_type mac_type = hw->mac_type; 547 struct e1000_tx_ring *txdr = adapter->tx_ring; 548 struct e1000_rx_ring *rxdr = adapter->rx_ring; 549 550 ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD : 551 E1000_MAX_82544_RXD; 552 ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD : 553 E1000_MAX_82544_TXD; 554 ring->rx_pending = rxdr->count; 555 ring->tx_pending = txdr->count; 556 } 557 558 static int e1000_set_ringparam(struct net_device *netdev, 559 struct ethtool_ringparam *ring) 560 { 561 struct e1000_adapter *adapter = netdev_priv(netdev); 562 struct e1000_hw *hw = &adapter->hw; 563 e1000_mac_type mac_type = hw->mac_type; 564 struct e1000_tx_ring *txdr, *tx_old; 565 struct e1000_rx_ring *rxdr, *rx_old; 566 int i, err; 567 568 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) 569 return -EINVAL; 570 571 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags)) 572 msleep(1); 573 574 if (netif_running(adapter->netdev)) 575 e1000_down(adapter); 576 577 tx_old = adapter->tx_ring; 578 rx_old = adapter->rx_ring; 579 580 err = -ENOMEM; 581 txdr = kcalloc(adapter->num_tx_queues, sizeof(struct e1000_tx_ring), 582 GFP_KERNEL); 583 if (!txdr) 584 goto err_alloc_tx; 585 586 rxdr = kcalloc(adapter->num_rx_queues, sizeof(struct e1000_rx_ring), 587 GFP_KERNEL); 588 if (!rxdr) 589 goto err_alloc_rx; 590 591 adapter->tx_ring = txdr; 592 adapter->rx_ring = rxdr; 593 594 rxdr->count = max(ring->rx_pending, (u32)E1000_MIN_RXD); 595 rxdr->count = min(rxdr->count, (u32)(mac_type < e1000_82544 ? 596 E1000_MAX_RXD : E1000_MAX_82544_RXD)); 597 rxdr->count = ALIGN(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE); 598 txdr->count = max(ring->tx_pending, (u32)E1000_MIN_TXD); 599 txdr->count = min(txdr->count, (u32)(mac_type < e1000_82544 ? 600 E1000_MAX_TXD : E1000_MAX_82544_TXD)); 601 txdr->count = ALIGN(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE); 602 603 for (i = 0; i < adapter->num_tx_queues; i++) 604 txdr[i].count = txdr->count; 605 for (i = 0; i < adapter->num_rx_queues; i++) 606 rxdr[i].count = rxdr->count; 607 608 err = 0; 609 if (netif_running(adapter->netdev)) { 610 /* Try to get new resources before deleting old */ 611 err = e1000_setup_all_rx_resources(adapter); 612 if (err) 613 goto err_setup_rx; 614 err = e1000_setup_all_tx_resources(adapter); 615 if (err) 616 goto err_setup_tx; 617 618 /* save the new, restore the old in order to free it, 619 * then restore the new back again 620 */ 621 622 adapter->rx_ring = rx_old; 623 adapter->tx_ring = tx_old; 624 e1000_free_all_rx_resources(adapter); 625 e1000_free_all_tx_resources(adapter); 626 adapter->rx_ring = rxdr; 627 adapter->tx_ring = txdr; 628 err = e1000_up(adapter); 629 } 630 kfree(tx_old); 631 kfree(rx_old); 632 633 clear_bit(__E1000_RESETTING, &adapter->flags); 634 return err; 635 636 err_setup_tx: 637 e1000_free_all_rx_resources(adapter); 638 err_setup_rx: 639 adapter->rx_ring = rx_old; 640 adapter->tx_ring = tx_old; 641 kfree(rxdr); 642 err_alloc_rx: 643 kfree(txdr); 644 err_alloc_tx: 645 if (netif_running(adapter->netdev)) 646 e1000_up(adapter); 647 clear_bit(__E1000_RESETTING, &adapter->flags); 648 return err; 649 } 650 651 static bool reg_pattern_test(struct e1000_adapter *adapter, u64 *data, int reg, 652 u32 mask, u32 write) 653 { 654 struct e1000_hw *hw = &adapter->hw; 655 static const u32 test[] = { 656 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF 657 }; 658 u8 __iomem *address = hw->hw_addr + reg; 659 u32 read; 660 int i; 661 662 for (i = 0; i < ARRAY_SIZE(test); i++) { 663 writel(write & test[i], address); 664 read = readl(address); 665 if (read != (write & test[i] & mask)) { 666 e_err(drv, "pattern test reg %04X failed: " 667 "got 0x%08X expected 0x%08X\n", 668 reg, read, (write & test[i] & mask)); 669 *data = reg; 670 return true; 671 } 672 } 673 return false; 674 } 675 676 static bool reg_set_and_check(struct e1000_adapter *adapter, u64 *data, int reg, 677 u32 mask, u32 write) 678 { 679 struct e1000_hw *hw = &adapter->hw; 680 u8 __iomem *address = hw->hw_addr + reg; 681 u32 read; 682 683 writel(write & mask, address); 684 read = readl(address); 685 if ((read & mask) != (write & mask)) { 686 e_err(drv, "set/check reg %04X test failed: " 687 "got 0x%08X expected 0x%08X\n", 688 reg, (read & mask), (write & mask)); 689 *data = reg; 690 return true; 691 } 692 return false; 693 } 694 695 #define REG_PATTERN_TEST(reg, mask, write) \ 696 do { \ 697 if (reg_pattern_test(adapter, data, \ 698 (hw->mac_type >= e1000_82543) \ 699 ? E1000_##reg : E1000_82542_##reg, \ 700 mask, write)) \ 701 return 1; \ 702 } while (0) 703 704 #define REG_SET_AND_CHECK(reg, mask, write) \ 705 do { \ 706 if (reg_set_and_check(adapter, data, \ 707 (hw->mac_type >= e1000_82543) \ 708 ? E1000_##reg : E1000_82542_##reg, \ 709 mask, write)) \ 710 return 1; \ 711 } while (0) 712 713 static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data) 714 { 715 u32 value, before, after; 716 u32 i, toggle; 717 struct e1000_hw *hw = &adapter->hw; 718 719 /* The status register is Read Only, so a write should fail. 720 * Some bits that get toggled are ignored. 721 */ 722 723 /* there are several bits on newer hardware that are r/w */ 724 toggle = 0xFFFFF833; 725 726 before = er32(STATUS); 727 value = (er32(STATUS) & toggle); 728 ew32(STATUS, toggle); 729 after = er32(STATUS) & toggle; 730 if (value != after) { 731 e_err(drv, "failed STATUS register test got: " 732 "0x%08X expected: 0x%08X\n", after, value); 733 *data = 1; 734 return 1; 735 } 736 /* restore previous status */ 737 ew32(STATUS, before); 738 739 REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF); 740 REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF); 741 REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF); 742 REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF); 743 744 REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF); 745 REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF); 746 REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF); 747 REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF); 748 REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF); 749 REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8); 750 REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF); 751 REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF); 752 REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF); 753 REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF); 754 755 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000); 756 757 before = 0x06DFB3FE; 758 REG_SET_AND_CHECK(RCTL, before, 0x003FFFFB); 759 REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000); 760 761 if (hw->mac_type >= e1000_82543) { 762 REG_SET_AND_CHECK(RCTL, before, 0xFFFFFFFF); 763 REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF); 764 REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF); 765 REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF); 766 REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF); 767 value = E1000_RAR_ENTRIES; 768 for (i = 0; i < value; i++) { 769 REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 770 0x8003FFFF, 0xFFFFFFFF); 771 } 772 } else { 773 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF); 774 REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF); 775 REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF); 776 REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF); 777 } 778 779 value = E1000_MC_TBL_SIZE; 780 for (i = 0; i < value; i++) 781 REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF); 782 783 *data = 0; 784 return 0; 785 } 786 787 static int e1000_eeprom_test(struct e1000_adapter *adapter, u64 *data) 788 { 789 struct e1000_hw *hw = &adapter->hw; 790 u16 temp; 791 u16 checksum = 0; 792 u16 i; 793 794 *data = 0; 795 /* Read and add up the contents of the EEPROM */ 796 for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) { 797 if ((e1000_read_eeprom(hw, i, 1, &temp)) < 0) { 798 *data = 1; 799 break; 800 } 801 checksum += temp; 802 } 803 804 /* If Checksum is not Correct return error else test passed */ 805 if ((checksum != (u16)EEPROM_SUM) && !(*data)) 806 *data = 2; 807 808 return *data; 809 } 810 811 static irqreturn_t e1000_test_intr(int irq, void *data) 812 { 813 struct net_device *netdev = (struct net_device *)data; 814 struct e1000_adapter *adapter = netdev_priv(netdev); 815 struct e1000_hw *hw = &adapter->hw; 816 817 adapter->test_icr |= er32(ICR); 818 819 return IRQ_HANDLED; 820 } 821 822 static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data) 823 { 824 struct net_device *netdev = adapter->netdev; 825 u32 mask, i = 0; 826 bool shared_int = true; 827 u32 irq = adapter->pdev->irq; 828 struct e1000_hw *hw = &adapter->hw; 829 830 *data = 0; 831 832 /* NOTE: we don't test MSI interrupts here, yet 833 * Hook up test interrupt handler just for this test 834 */ 835 if (!request_irq(irq, e1000_test_intr, IRQF_PROBE_SHARED, netdev->name, 836 netdev)) 837 shared_int = false; 838 else if (request_irq(irq, e1000_test_intr, IRQF_SHARED, 839 netdev->name, netdev)) { 840 *data = 1; 841 return -1; 842 } 843 e_info(hw, "testing %s interrupt\n", (shared_int ? 844 "shared" : "unshared")); 845 846 /* Disable all the interrupts */ 847 ew32(IMC, 0xFFFFFFFF); 848 E1000_WRITE_FLUSH(); 849 msleep(10); 850 851 /* Test each interrupt */ 852 for (; i < 10; i++) { 853 /* Interrupt to test */ 854 mask = 1 << i; 855 856 if (!shared_int) { 857 /* Disable the interrupt to be reported in 858 * the cause register and then force the same 859 * interrupt and see if one gets posted. If 860 * an interrupt was posted to the bus, the 861 * test failed. 862 */ 863 adapter->test_icr = 0; 864 ew32(IMC, mask); 865 ew32(ICS, mask); 866 E1000_WRITE_FLUSH(); 867 msleep(10); 868 869 if (adapter->test_icr & mask) { 870 *data = 3; 871 break; 872 } 873 } 874 875 /* Enable the interrupt to be reported in 876 * the cause register and then force the same 877 * interrupt and see if one gets posted. If 878 * an interrupt was not posted to the bus, the 879 * test failed. 880 */ 881 adapter->test_icr = 0; 882 ew32(IMS, mask); 883 ew32(ICS, mask); 884 E1000_WRITE_FLUSH(); 885 msleep(10); 886 887 if (!(adapter->test_icr & mask)) { 888 *data = 4; 889 break; 890 } 891 892 if (!shared_int) { 893 /* Disable the other interrupts to be reported in 894 * the cause register and then force the other 895 * interrupts and see if any get posted. If 896 * an interrupt was posted to the bus, the 897 * test failed. 898 */ 899 adapter->test_icr = 0; 900 ew32(IMC, ~mask & 0x00007FFF); 901 ew32(ICS, ~mask & 0x00007FFF); 902 E1000_WRITE_FLUSH(); 903 msleep(10); 904 905 if (adapter->test_icr) { 906 *data = 5; 907 break; 908 } 909 } 910 } 911 912 /* Disable all the interrupts */ 913 ew32(IMC, 0xFFFFFFFF); 914 E1000_WRITE_FLUSH(); 915 msleep(10); 916 917 /* Unhook test interrupt handler */ 918 free_irq(irq, netdev); 919 920 return *data; 921 } 922 923 static void e1000_free_desc_rings(struct e1000_adapter *adapter) 924 { 925 struct e1000_tx_ring *txdr = &adapter->test_tx_ring; 926 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring; 927 struct pci_dev *pdev = adapter->pdev; 928 int i; 929 930 if (txdr->desc && txdr->buffer_info) { 931 for (i = 0; i < txdr->count; i++) { 932 if (txdr->buffer_info[i].dma) 933 dma_unmap_single(&pdev->dev, 934 txdr->buffer_info[i].dma, 935 txdr->buffer_info[i].length, 936 DMA_TO_DEVICE); 937 dev_kfree_skb(txdr->buffer_info[i].skb); 938 } 939 } 940 941 if (rxdr->desc && rxdr->buffer_info) { 942 for (i = 0; i < rxdr->count; i++) { 943 if (rxdr->buffer_info[i].dma) 944 dma_unmap_single(&pdev->dev, 945 rxdr->buffer_info[i].dma, 946 E1000_RXBUFFER_2048, 947 DMA_FROM_DEVICE); 948 kfree(rxdr->buffer_info[i].rxbuf.data); 949 } 950 } 951 952 if (txdr->desc) { 953 dma_free_coherent(&pdev->dev, txdr->size, txdr->desc, 954 txdr->dma); 955 txdr->desc = NULL; 956 } 957 if (rxdr->desc) { 958 dma_free_coherent(&pdev->dev, rxdr->size, rxdr->desc, 959 rxdr->dma); 960 rxdr->desc = NULL; 961 } 962 963 kfree(txdr->buffer_info); 964 txdr->buffer_info = NULL; 965 kfree(rxdr->buffer_info); 966 rxdr->buffer_info = NULL; 967 } 968 969 static int e1000_setup_desc_rings(struct e1000_adapter *adapter) 970 { 971 struct e1000_hw *hw = &adapter->hw; 972 struct e1000_tx_ring *txdr = &adapter->test_tx_ring; 973 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring; 974 struct pci_dev *pdev = adapter->pdev; 975 u32 rctl; 976 int i, ret_val; 977 978 /* Setup Tx descriptor ring and Tx buffers */ 979 980 if (!txdr->count) 981 txdr->count = E1000_DEFAULT_TXD; 982 983 txdr->buffer_info = kcalloc(txdr->count, sizeof(struct e1000_tx_buffer), 984 GFP_KERNEL); 985 if (!txdr->buffer_info) { 986 ret_val = 1; 987 goto err_nomem; 988 } 989 990 txdr->size = txdr->count * sizeof(struct e1000_tx_desc); 991 txdr->size = ALIGN(txdr->size, 4096); 992 txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size, &txdr->dma, 993 GFP_KERNEL); 994 if (!txdr->desc) { 995 ret_val = 2; 996 goto err_nomem; 997 } 998 txdr->next_to_use = txdr->next_to_clean = 0; 999 1000 ew32(TDBAL, ((u64)txdr->dma & 0x00000000FFFFFFFF)); 1001 ew32(TDBAH, ((u64)txdr->dma >> 32)); 1002 ew32(TDLEN, txdr->count * sizeof(struct e1000_tx_desc)); 1003 ew32(TDH, 0); 1004 ew32(TDT, 0); 1005 ew32(TCTL, E1000_TCTL_PSP | E1000_TCTL_EN | 1006 E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT | 1007 E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT); 1008 1009 for (i = 0; i < txdr->count; i++) { 1010 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i); 1011 struct sk_buff *skb; 1012 unsigned int size = 1024; 1013 1014 skb = alloc_skb(size, GFP_KERNEL); 1015 if (!skb) { 1016 ret_val = 3; 1017 goto err_nomem; 1018 } 1019 skb_put(skb, size); 1020 txdr->buffer_info[i].skb = skb; 1021 txdr->buffer_info[i].length = skb->len; 1022 txdr->buffer_info[i].dma = 1023 dma_map_single(&pdev->dev, skb->data, skb->len, 1024 DMA_TO_DEVICE); 1025 if (dma_mapping_error(&pdev->dev, txdr->buffer_info[i].dma)) { 1026 ret_val = 4; 1027 goto err_nomem; 1028 } 1029 tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma); 1030 tx_desc->lower.data = cpu_to_le32(skb->len); 1031 tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP | 1032 E1000_TXD_CMD_IFCS | 1033 E1000_TXD_CMD_RPS); 1034 tx_desc->upper.data = 0; 1035 } 1036 1037 /* Setup Rx descriptor ring and Rx buffers */ 1038 1039 if (!rxdr->count) 1040 rxdr->count = E1000_DEFAULT_RXD; 1041 1042 rxdr->buffer_info = kcalloc(rxdr->count, sizeof(struct e1000_rx_buffer), 1043 GFP_KERNEL); 1044 if (!rxdr->buffer_info) { 1045 ret_val = 5; 1046 goto err_nomem; 1047 } 1048 1049 rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc); 1050 rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size, &rxdr->dma, 1051 GFP_KERNEL); 1052 if (!rxdr->desc) { 1053 ret_val = 6; 1054 goto err_nomem; 1055 } 1056 rxdr->next_to_use = rxdr->next_to_clean = 0; 1057 1058 rctl = er32(RCTL); 1059 ew32(RCTL, rctl & ~E1000_RCTL_EN); 1060 ew32(RDBAL, ((u64)rxdr->dma & 0xFFFFFFFF)); 1061 ew32(RDBAH, ((u64)rxdr->dma >> 32)); 1062 ew32(RDLEN, rxdr->size); 1063 ew32(RDH, 0); 1064 ew32(RDT, 0); 1065 rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 | 1066 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF | 1067 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT); 1068 ew32(RCTL, rctl); 1069 1070 for (i = 0; i < rxdr->count; i++) { 1071 struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i); 1072 u8 *buf; 1073 1074 buf = kzalloc(E1000_RXBUFFER_2048 + NET_SKB_PAD + NET_IP_ALIGN, 1075 GFP_KERNEL); 1076 if (!buf) { 1077 ret_val = 7; 1078 goto err_nomem; 1079 } 1080 rxdr->buffer_info[i].rxbuf.data = buf; 1081 1082 rxdr->buffer_info[i].dma = 1083 dma_map_single(&pdev->dev, 1084 buf + NET_SKB_PAD + NET_IP_ALIGN, 1085 E1000_RXBUFFER_2048, DMA_FROM_DEVICE); 1086 if (dma_mapping_error(&pdev->dev, rxdr->buffer_info[i].dma)) { 1087 ret_val = 8; 1088 goto err_nomem; 1089 } 1090 rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma); 1091 } 1092 1093 return 0; 1094 1095 err_nomem: 1096 e1000_free_desc_rings(adapter); 1097 return ret_val; 1098 } 1099 1100 static void e1000_phy_disable_receiver(struct e1000_adapter *adapter) 1101 { 1102 struct e1000_hw *hw = &adapter->hw; 1103 1104 /* Write out to PHY registers 29 and 30 to disable the Receiver. */ 1105 e1000_write_phy_reg(hw, 29, 0x001F); 1106 e1000_write_phy_reg(hw, 30, 0x8FFC); 1107 e1000_write_phy_reg(hw, 29, 0x001A); 1108 e1000_write_phy_reg(hw, 30, 0x8FF0); 1109 } 1110 1111 static void e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter) 1112 { 1113 struct e1000_hw *hw = &adapter->hw; 1114 u16 phy_reg; 1115 1116 /* Because we reset the PHY above, we need to re-force TX_CLK in the 1117 * Extended PHY Specific Control Register to 25MHz clock. This 1118 * value defaults back to a 2.5MHz clock when the PHY is reset. 1119 */ 1120 e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg); 1121 phy_reg |= M88E1000_EPSCR_TX_CLK_25; 1122 e1000_write_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, phy_reg); 1123 1124 /* In addition, because of the s/w reset above, we need to enable 1125 * CRS on TX. This must be set for both full and half duplex 1126 * operation. 1127 */ 1128 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_reg); 1129 phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX; 1130 e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_reg); 1131 } 1132 1133 static int e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter) 1134 { 1135 struct e1000_hw *hw = &adapter->hw; 1136 u32 ctrl_reg; 1137 u16 phy_reg; 1138 1139 /* Setup the Device Control Register for PHY loopback test. */ 1140 1141 ctrl_reg = er32(CTRL); 1142 ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */ 1143 E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */ 1144 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */ 1145 E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */ 1146 E1000_CTRL_FD); /* Force Duplex to FULL */ 1147 1148 ew32(CTRL, ctrl_reg); 1149 1150 /* Read the PHY Specific Control Register (0x10) */ 1151 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_reg); 1152 1153 /* Clear Auto-Crossover bits in PHY Specific Control Register 1154 * (bits 6:5). 1155 */ 1156 phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE; 1157 e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_reg); 1158 1159 /* Perform software reset on the PHY */ 1160 e1000_phy_reset(hw); 1161 1162 /* Have to setup TX_CLK and TX_CRS after software reset */ 1163 e1000_phy_reset_clk_and_crs(adapter); 1164 1165 e1000_write_phy_reg(hw, PHY_CTRL, 0x8100); 1166 1167 /* Wait for reset to complete. */ 1168 udelay(500); 1169 1170 /* Have to setup TX_CLK and TX_CRS after software reset */ 1171 e1000_phy_reset_clk_and_crs(adapter); 1172 1173 /* Write out to PHY registers 29 and 30 to disable the Receiver. */ 1174 e1000_phy_disable_receiver(adapter); 1175 1176 /* Set the loopback bit in the PHY control register. */ 1177 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg); 1178 phy_reg |= MII_CR_LOOPBACK; 1179 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg); 1180 1181 /* Setup TX_CLK and TX_CRS one more time. */ 1182 e1000_phy_reset_clk_and_crs(adapter); 1183 1184 /* Check Phy Configuration */ 1185 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg); 1186 if (phy_reg != 0x4100) 1187 return 9; 1188 1189 e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg); 1190 if (phy_reg != 0x0070) 1191 return 10; 1192 1193 e1000_read_phy_reg(hw, 29, &phy_reg); 1194 if (phy_reg != 0x001A) 1195 return 11; 1196 1197 return 0; 1198 } 1199 1200 static int e1000_integrated_phy_loopback(struct e1000_adapter *adapter) 1201 { 1202 struct e1000_hw *hw = &adapter->hw; 1203 u32 ctrl_reg = 0; 1204 u32 stat_reg = 0; 1205 1206 hw->autoneg = false; 1207 1208 if (hw->phy_type == e1000_phy_m88) { 1209 /* Auto-MDI/MDIX Off */ 1210 e1000_write_phy_reg(hw, 1211 M88E1000_PHY_SPEC_CTRL, 0x0808); 1212 /* reset to update Auto-MDI/MDIX */ 1213 e1000_write_phy_reg(hw, PHY_CTRL, 0x9140); 1214 /* autoneg off */ 1215 e1000_write_phy_reg(hw, PHY_CTRL, 0x8140); 1216 } 1217 1218 ctrl_reg = er32(CTRL); 1219 1220 /* force 1000, set loopback */ 1221 e1000_write_phy_reg(hw, PHY_CTRL, 0x4140); 1222 1223 /* Now set up the MAC to the same speed/duplex as the PHY. */ 1224 ctrl_reg = er32(CTRL); 1225 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */ 1226 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */ 1227 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */ 1228 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */ 1229 E1000_CTRL_FD); /* Force Duplex to FULL */ 1230 1231 if (hw->media_type == e1000_media_type_copper && 1232 hw->phy_type == e1000_phy_m88) 1233 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */ 1234 else { 1235 /* Set the ILOS bit on the fiber Nic is half 1236 * duplex link is detected. 1237 */ 1238 stat_reg = er32(STATUS); 1239 if ((stat_reg & E1000_STATUS_FD) == 0) 1240 ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU); 1241 } 1242 1243 ew32(CTRL, ctrl_reg); 1244 1245 /* Disable the receiver on the PHY so when a cable is plugged in, the 1246 * PHY does not begin to autoneg when a cable is reconnected to the NIC. 1247 */ 1248 if (hw->phy_type == e1000_phy_m88) 1249 e1000_phy_disable_receiver(adapter); 1250 1251 udelay(500); 1252 1253 return 0; 1254 } 1255 1256 static int e1000_set_phy_loopback(struct e1000_adapter *adapter) 1257 { 1258 struct e1000_hw *hw = &adapter->hw; 1259 u16 phy_reg = 0; 1260 u16 count = 0; 1261 1262 switch (hw->mac_type) { 1263 case e1000_82543: 1264 if (hw->media_type == e1000_media_type_copper) { 1265 /* Attempt to setup Loopback mode on Non-integrated PHY. 1266 * Some PHY registers get corrupted at random, so 1267 * attempt this 10 times. 1268 */ 1269 while (e1000_nonintegrated_phy_loopback(adapter) && 1270 count++ < 10); 1271 if (count < 11) 1272 return 0; 1273 } 1274 break; 1275 1276 case e1000_82544: 1277 case e1000_82540: 1278 case e1000_82545: 1279 case e1000_82545_rev_3: 1280 case e1000_82546: 1281 case e1000_82546_rev_3: 1282 case e1000_82541: 1283 case e1000_82541_rev_2: 1284 case e1000_82547: 1285 case e1000_82547_rev_2: 1286 return e1000_integrated_phy_loopback(adapter); 1287 default: 1288 /* Default PHY loopback work is to read the MII 1289 * control register and assert bit 14 (loopback mode). 1290 */ 1291 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg); 1292 phy_reg |= MII_CR_LOOPBACK; 1293 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg); 1294 return 0; 1295 } 1296 1297 return 8; 1298 } 1299 1300 static int e1000_setup_loopback_test(struct e1000_adapter *adapter) 1301 { 1302 struct e1000_hw *hw = &adapter->hw; 1303 u32 rctl; 1304 1305 if (hw->media_type == e1000_media_type_fiber || 1306 hw->media_type == e1000_media_type_internal_serdes) { 1307 switch (hw->mac_type) { 1308 case e1000_82545: 1309 case e1000_82546: 1310 case e1000_82545_rev_3: 1311 case e1000_82546_rev_3: 1312 return e1000_set_phy_loopback(adapter); 1313 default: 1314 rctl = er32(RCTL); 1315 rctl |= E1000_RCTL_LBM_TCVR; 1316 ew32(RCTL, rctl); 1317 return 0; 1318 } 1319 } else if (hw->media_type == e1000_media_type_copper) { 1320 return e1000_set_phy_loopback(adapter); 1321 } 1322 1323 return 7; 1324 } 1325 1326 static void e1000_loopback_cleanup(struct e1000_adapter *adapter) 1327 { 1328 struct e1000_hw *hw = &adapter->hw; 1329 u32 rctl; 1330 u16 phy_reg; 1331 1332 rctl = er32(RCTL); 1333 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC); 1334 ew32(RCTL, rctl); 1335 1336 switch (hw->mac_type) { 1337 case e1000_82545: 1338 case e1000_82546: 1339 case e1000_82545_rev_3: 1340 case e1000_82546_rev_3: 1341 default: 1342 hw->autoneg = true; 1343 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg); 1344 if (phy_reg & MII_CR_LOOPBACK) { 1345 phy_reg &= ~MII_CR_LOOPBACK; 1346 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg); 1347 e1000_phy_reset(hw); 1348 } 1349 break; 1350 } 1351 } 1352 1353 static void e1000_create_lbtest_frame(struct sk_buff *skb, 1354 unsigned int frame_size) 1355 { 1356 memset(skb->data, 0xFF, frame_size); 1357 frame_size &= ~1; 1358 memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1); 1359 skb->data[frame_size / 2 + 10] = 0xBE; 1360 skb->data[frame_size / 2 + 12] = 0xAF; 1361 } 1362 1363 static int e1000_check_lbtest_frame(const unsigned char *data, 1364 unsigned int frame_size) 1365 { 1366 frame_size &= ~1; 1367 if (*(data + 3) == 0xFF) { 1368 if ((*(data + frame_size / 2 + 10) == 0xBE) && 1369 (*(data + frame_size / 2 + 12) == 0xAF)) { 1370 return 0; 1371 } 1372 } 1373 return 13; 1374 } 1375 1376 static int e1000_run_loopback_test(struct e1000_adapter *adapter) 1377 { 1378 struct e1000_hw *hw = &adapter->hw; 1379 struct e1000_tx_ring *txdr = &adapter->test_tx_ring; 1380 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring; 1381 struct pci_dev *pdev = adapter->pdev; 1382 int i, j, k, l, lc, good_cnt, ret_val = 0; 1383 unsigned long time; 1384 1385 ew32(RDT, rxdr->count - 1); 1386 1387 /* Calculate the loop count based on the largest descriptor ring 1388 * The idea is to wrap the largest ring a number of times using 64 1389 * send/receive pairs during each loop 1390 */ 1391 1392 if (rxdr->count <= txdr->count) 1393 lc = ((txdr->count / 64) * 2) + 1; 1394 else 1395 lc = ((rxdr->count / 64) * 2) + 1; 1396 1397 k = l = 0; 1398 for (j = 0; j <= lc; j++) { /* loop count loop */ 1399 for (i = 0; i < 64; i++) { /* send the packets */ 1400 e1000_create_lbtest_frame(txdr->buffer_info[i].skb, 1401 1024); 1402 dma_sync_single_for_device(&pdev->dev, 1403 txdr->buffer_info[k].dma, 1404 txdr->buffer_info[k].length, 1405 DMA_TO_DEVICE); 1406 if (unlikely(++k == txdr->count)) 1407 k = 0; 1408 } 1409 ew32(TDT, k); 1410 E1000_WRITE_FLUSH(); 1411 msleep(200); 1412 time = jiffies; /* set the start time for the receive */ 1413 good_cnt = 0; 1414 do { /* receive the sent packets */ 1415 dma_sync_single_for_cpu(&pdev->dev, 1416 rxdr->buffer_info[l].dma, 1417 E1000_RXBUFFER_2048, 1418 DMA_FROM_DEVICE); 1419 1420 ret_val = e1000_check_lbtest_frame( 1421 rxdr->buffer_info[l].rxbuf.data + 1422 NET_SKB_PAD + NET_IP_ALIGN, 1423 1024); 1424 if (!ret_val) 1425 good_cnt++; 1426 if (unlikely(++l == rxdr->count)) 1427 l = 0; 1428 /* time + 20 msecs (200 msecs on 2.4) is more than 1429 * enough time to complete the receives, if it's 1430 * exceeded, break and error off 1431 */ 1432 } while (good_cnt < 64 && time_after(time + 20, jiffies)); 1433 1434 if (good_cnt != 64) { 1435 ret_val = 13; /* ret_val is the same as mis-compare */ 1436 break; 1437 } 1438 if (time_after_eq(jiffies, time + 2)) { 1439 ret_val = 14; /* error code for time out error */ 1440 break; 1441 } 1442 } /* end loop count loop */ 1443 return ret_val; 1444 } 1445 1446 static int e1000_loopback_test(struct e1000_adapter *adapter, u64 *data) 1447 { 1448 *data = e1000_setup_desc_rings(adapter); 1449 if (*data) 1450 goto out; 1451 *data = e1000_setup_loopback_test(adapter); 1452 if (*data) 1453 goto err_loopback; 1454 *data = e1000_run_loopback_test(adapter); 1455 e1000_loopback_cleanup(adapter); 1456 1457 err_loopback: 1458 e1000_free_desc_rings(adapter); 1459 out: 1460 return *data; 1461 } 1462 1463 static int e1000_link_test(struct e1000_adapter *adapter, u64 *data) 1464 { 1465 struct e1000_hw *hw = &adapter->hw; 1466 *data = 0; 1467 if (hw->media_type == e1000_media_type_internal_serdes) { 1468 int i = 0; 1469 1470 hw->serdes_has_link = false; 1471 1472 /* On some blade server designs, link establishment 1473 * could take as long as 2-3 minutes 1474 */ 1475 do { 1476 e1000_check_for_link(hw); 1477 if (hw->serdes_has_link) 1478 return *data; 1479 msleep(20); 1480 } while (i++ < 3750); 1481 1482 *data = 1; 1483 } else { 1484 e1000_check_for_link(hw); 1485 if (hw->autoneg) /* if auto_neg is set wait for it */ 1486 msleep(4000); 1487 1488 if (!(er32(STATUS) & E1000_STATUS_LU)) 1489 *data = 1; 1490 } 1491 return *data; 1492 } 1493 1494 static int e1000_get_sset_count(struct net_device *netdev, int sset) 1495 { 1496 switch (sset) { 1497 case ETH_SS_TEST: 1498 return E1000_TEST_LEN; 1499 case ETH_SS_STATS: 1500 return E1000_STATS_LEN; 1501 default: 1502 return -EOPNOTSUPP; 1503 } 1504 } 1505 1506 static void e1000_diag_test(struct net_device *netdev, 1507 struct ethtool_test *eth_test, u64 *data) 1508 { 1509 struct e1000_adapter *adapter = netdev_priv(netdev); 1510 struct e1000_hw *hw = &adapter->hw; 1511 bool if_running = netif_running(netdev); 1512 1513 set_bit(__E1000_TESTING, &adapter->flags); 1514 if (eth_test->flags == ETH_TEST_FL_OFFLINE) { 1515 /* Offline tests */ 1516 1517 /* save speed, duplex, autoneg settings */ 1518 u16 autoneg_advertised = hw->autoneg_advertised; 1519 u8 forced_speed_duplex = hw->forced_speed_duplex; 1520 u8 autoneg = hw->autoneg; 1521 1522 e_info(hw, "offline testing starting\n"); 1523 1524 /* Link test performed before hardware reset so autoneg doesn't 1525 * interfere with test result 1526 */ 1527 if (e1000_link_test(adapter, &data[4])) 1528 eth_test->flags |= ETH_TEST_FL_FAILED; 1529 1530 if (if_running) 1531 /* indicate we're in test mode */ 1532 e1000_close(netdev); 1533 else 1534 e1000_reset(adapter); 1535 1536 if (e1000_reg_test(adapter, &data[0])) 1537 eth_test->flags |= ETH_TEST_FL_FAILED; 1538 1539 e1000_reset(adapter); 1540 if (e1000_eeprom_test(adapter, &data[1])) 1541 eth_test->flags |= ETH_TEST_FL_FAILED; 1542 1543 e1000_reset(adapter); 1544 if (e1000_intr_test(adapter, &data[2])) 1545 eth_test->flags |= ETH_TEST_FL_FAILED; 1546 1547 e1000_reset(adapter); 1548 /* make sure the phy is powered up */ 1549 e1000_power_up_phy(adapter); 1550 if (e1000_loopback_test(adapter, &data[3])) 1551 eth_test->flags |= ETH_TEST_FL_FAILED; 1552 1553 /* restore speed, duplex, autoneg settings */ 1554 hw->autoneg_advertised = autoneg_advertised; 1555 hw->forced_speed_duplex = forced_speed_duplex; 1556 hw->autoneg = autoneg; 1557 1558 e1000_reset(adapter); 1559 clear_bit(__E1000_TESTING, &adapter->flags); 1560 if (if_running) 1561 e1000_open(netdev); 1562 } else { 1563 e_info(hw, "online testing starting\n"); 1564 /* Online tests */ 1565 if (e1000_link_test(adapter, &data[4])) 1566 eth_test->flags |= ETH_TEST_FL_FAILED; 1567 1568 /* Online tests aren't run; pass by default */ 1569 data[0] = 0; 1570 data[1] = 0; 1571 data[2] = 0; 1572 data[3] = 0; 1573 1574 clear_bit(__E1000_TESTING, &adapter->flags); 1575 } 1576 msleep_interruptible(4 * 1000); 1577 } 1578 1579 static int e1000_wol_exclusion(struct e1000_adapter *adapter, 1580 struct ethtool_wolinfo *wol) 1581 { 1582 struct e1000_hw *hw = &adapter->hw; 1583 int retval = 1; /* fail by default */ 1584 1585 switch (hw->device_id) { 1586 case E1000_DEV_ID_82542: 1587 case E1000_DEV_ID_82543GC_FIBER: 1588 case E1000_DEV_ID_82543GC_COPPER: 1589 case E1000_DEV_ID_82544EI_FIBER: 1590 case E1000_DEV_ID_82546EB_QUAD_COPPER: 1591 case E1000_DEV_ID_82545EM_FIBER: 1592 case E1000_DEV_ID_82545EM_COPPER: 1593 case E1000_DEV_ID_82546GB_QUAD_COPPER: 1594 case E1000_DEV_ID_82546GB_PCIE: 1595 /* these don't support WoL at all */ 1596 wol->supported = 0; 1597 break; 1598 case E1000_DEV_ID_82546EB_FIBER: 1599 case E1000_DEV_ID_82546GB_FIBER: 1600 /* Wake events not supported on port B */ 1601 if (er32(STATUS) & E1000_STATUS_FUNC_1) { 1602 wol->supported = 0; 1603 break; 1604 } 1605 /* return success for non excluded adapter ports */ 1606 retval = 0; 1607 break; 1608 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3: 1609 /* quad port adapters only support WoL on port A */ 1610 if (!adapter->quad_port_a) { 1611 wol->supported = 0; 1612 break; 1613 } 1614 /* return success for non excluded adapter ports */ 1615 retval = 0; 1616 break; 1617 default: 1618 /* dual port cards only support WoL on port A from now on 1619 * unless it was enabled in the eeprom for port B 1620 * so exclude FUNC_1 ports from having WoL enabled 1621 */ 1622 if (er32(STATUS) & E1000_STATUS_FUNC_1 && 1623 !adapter->eeprom_wol) { 1624 wol->supported = 0; 1625 break; 1626 } 1627 1628 retval = 0; 1629 } 1630 1631 return retval; 1632 } 1633 1634 static void e1000_get_wol(struct net_device *netdev, 1635 struct ethtool_wolinfo *wol) 1636 { 1637 struct e1000_adapter *adapter = netdev_priv(netdev); 1638 struct e1000_hw *hw = &adapter->hw; 1639 1640 wol->supported = WAKE_UCAST | WAKE_MCAST | WAKE_BCAST | WAKE_MAGIC; 1641 wol->wolopts = 0; 1642 1643 /* this function will set ->supported = 0 and return 1 if wol is not 1644 * supported by this hardware 1645 */ 1646 if (e1000_wol_exclusion(adapter, wol) || 1647 !device_can_wakeup(&adapter->pdev->dev)) 1648 return; 1649 1650 /* apply any specific unsupported masks here */ 1651 switch (hw->device_id) { 1652 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3: 1653 /* KSP3 does not support UCAST wake-ups */ 1654 wol->supported &= ~WAKE_UCAST; 1655 1656 if (adapter->wol & E1000_WUFC_EX) 1657 e_err(drv, "Interface does not support directed " 1658 "(unicast) frame wake-up packets\n"); 1659 break; 1660 default: 1661 break; 1662 } 1663 1664 if (adapter->wol & E1000_WUFC_EX) 1665 wol->wolopts |= WAKE_UCAST; 1666 if (adapter->wol & E1000_WUFC_MC) 1667 wol->wolopts |= WAKE_MCAST; 1668 if (adapter->wol & E1000_WUFC_BC) 1669 wol->wolopts |= WAKE_BCAST; 1670 if (adapter->wol & E1000_WUFC_MAG) 1671 wol->wolopts |= WAKE_MAGIC; 1672 } 1673 1674 static int e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) 1675 { 1676 struct e1000_adapter *adapter = netdev_priv(netdev); 1677 struct e1000_hw *hw = &adapter->hw; 1678 1679 if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE)) 1680 return -EOPNOTSUPP; 1681 1682 if (e1000_wol_exclusion(adapter, wol) || 1683 !device_can_wakeup(&adapter->pdev->dev)) 1684 return wol->wolopts ? -EOPNOTSUPP : 0; 1685 1686 switch (hw->device_id) { 1687 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3: 1688 if (wol->wolopts & WAKE_UCAST) { 1689 e_err(drv, "Interface does not support directed " 1690 "(unicast) frame wake-up packets\n"); 1691 return -EOPNOTSUPP; 1692 } 1693 break; 1694 default: 1695 break; 1696 } 1697 1698 /* these settings will always override what we currently have */ 1699 adapter->wol = 0; 1700 1701 if (wol->wolopts & WAKE_UCAST) 1702 adapter->wol |= E1000_WUFC_EX; 1703 if (wol->wolopts & WAKE_MCAST) 1704 adapter->wol |= E1000_WUFC_MC; 1705 if (wol->wolopts & WAKE_BCAST) 1706 adapter->wol |= E1000_WUFC_BC; 1707 if (wol->wolopts & WAKE_MAGIC) 1708 adapter->wol |= E1000_WUFC_MAG; 1709 1710 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol); 1711 1712 return 0; 1713 } 1714 1715 static int e1000_set_phys_id(struct net_device *netdev, 1716 enum ethtool_phys_id_state state) 1717 { 1718 struct e1000_adapter *adapter = netdev_priv(netdev); 1719 struct e1000_hw *hw = &adapter->hw; 1720 1721 switch (state) { 1722 case ETHTOOL_ID_ACTIVE: 1723 e1000_setup_led(hw); 1724 return 2; 1725 1726 case ETHTOOL_ID_ON: 1727 e1000_led_on(hw); 1728 break; 1729 1730 case ETHTOOL_ID_OFF: 1731 e1000_led_off(hw); 1732 break; 1733 1734 case ETHTOOL_ID_INACTIVE: 1735 e1000_cleanup_led(hw); 1736 } 1737 1738 return 0; 1739 } 1740 1741 static int e1000_get_coalesce(struct net_device *netdev, 1742 struct ethtool_coalesce *ec) 1743 { 1744 struct e1000_adapter *adapter = netdev_priv(netdev); 1745 1746 if (adapter->hw.mac_type < e1000_82545) 1747 return -EOPNOTSUPP; 1748 1749 if (adapter->itr_setting <= 4) 1750 ec->rx_coalesce_usecs = adapter->itr_setting; 1751 else 1752 ec->rx_coalesce_usecs = 1000000 / adapter->itr_setting; 1753 1754 return 0; 1755 } 1756 1757 static int e1000_set_coalesce(struct net_device *netdev, 1758 struct ethtool_coalesce *ec) 1759 { 1760 struct e1000_adapter *adapter = netdev_priv(netdev); 1761 struct e1000_hw *hw = &adapter->hw; 1762 1763 if (hw->mac_type < e1000_82545) 1764 return -EOPNOTSUPP; 1765 1766 if ((ec->rx_coalesce_usecs > E1000_MAX_ITR_USECS) || 1767 ((ec->rx_coalesce_usecs > 4) && 1768 (ec->rx_coalesce_usecs < E1000_MIN_ITR_USECS)) || 1769 (ec->rx_coalesce_usecs == 2)) 1770 return -EINVAL; 1771 1772 if (ec->rx_coalesce_usecs == 4) { 1773 adapter->itr = adapter->itr_setting = 4; 1774 } else if (ec->rx_coalesce_usecs <= 3) { 1775 adapter->itr = 20000; 1776 adapter->itr_setting = ec->rx_coalesce_usecs; 1777 } else { 1778 adapter->itr = (1000000 / ec->rx_coalesce_usecs); 1779 adapter->itr_setting = adapter->itr & ~3; 1780 } 1781 1782 if (adapter->itr_setting != 0) 1783 ew32(ITR, 1000000000 / (adapter->itr * 256)); 1784 else 1785 ew32(ITR, 0); 1786 1787 return 0; 1788 } 1789 1790 static int e1000_nway_reset(struct net_device *netdev) 1791 { 1792 struct e1000_adapter *adapter = netdev_priv(netdev); 1793 1794 if (netif_running(netdev)) 1795 e1000_reinit_locked(adapter); 1796 return 0; 1797 } 1798 1799 static void e1000_get_ethtool_stats(struct net_device *netdev, 1800 struct ethtool_stats *stats, u64 *data) 1801 { 1802 struct e1000_adapter *adapter = netdev_priv(netdev); 1803 int i; 1804 const struct e1000_stats *stat = e1000_gstrings_stats; 1805 1806 e1000_update_stats(adapter); 1807 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++, stat++) { 1808 char *p; 1809 1810 switch (stat->type) { 1811 case NETDEV_STATS: 1812 p = (char *)netdev + stat->stat_offset; 1813 break; 1814 case E1000_STATS: 1815 p = (char *)adapter + stat->stat_offset; 1816 break; 1817 default: 1818 netdev_WARN_ONCE(netdev, "Invalid E1000 stat type: %u index %d\n", 1819 stat->type, i); 1820 continue; 1821 } 1822 1823 if (stat->sizeof_stat == sizeof(u64)) 1824 data[i] = *(u64 *)p; 1825 else 1826 data[i] = *(u32 *)p; 1827 } 1828 /* BUG_ON(i != E1000_STATS_LEN); */ 1829 } 1830 1831 static void e1000_get_strings(struct net_device *netdev, u32 stringset, 1832 u8 *data) 1833 { 1834 u8 *p = data; 1835 int i; 1836 1837 switch (stringset) { 1838 case ETH_SS_TEST: 1839 memcpy(data, e1000_gstrings_test, sizeof(e1000_gstrings_test)); 1840 break; 1841 case ETH_SS_STATS: 1842 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) { 1843 memcpy(p, e1000_gstrings_stats[i].stat_string, 1844 ETH_GSTRING_LEN); 1845 p += ETH_GSTRING_LEN; 1846 } 1847 /* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */ 1848 break; 1849 } 1850 } 1851 1852 static const struct ethtool_ops e1000_ethtool_ops = { 1853 .supported_coalesce_params = ETHTOOL_COALESCE_RX_USECS, 1854 .get_drvinfo = e1000_get_drvinfo, 1855 .get_regs_len = e1000_get_regs_len, 1856 .get_regs = e1000_get_regs, 1857 .get_wol = e1000_get_wol, 1858 .set_wol = e1000_set_wol, 1859 .get_msglevel = e1000_get_msglevel, 1860 .set_msglevel = e1000_set_msglevel, 1861 .nway_reset = e1000_nway_reset, 1862 .get_link = e1000_get_link, 1863 .get_eeprom_len = e1000_get_eeprom_len, 1864 .get_eeprom = e1000_get_eeprom, 1865 .set_eeprom = e1000_set_eeprom, 1866 .get_ringparam = e1000_get_ringparam, 1867 .set_ringparam = e1000_set_ringparam, 1868 .get_pauseparam = e1000_get_pauseparam, 1869 .set_pauseparam = e1000_set_pauseparam, 1870 .self_test = e1000_diag_test, 1871 .get_strings = e1000_get_strings, 1872 .set_phys_id = e1000_set_phys_id, 1873 .get_ethtool_stats = e1000_get_ethtool_stats, 1874 .get_sset_count = e1000_get_sset_count, 1875 .get_coalesce = e1000_get_coalesce, 1876 .set_coalesce = e1000_set_coalesce, 1877 .get_ts_info = ethtool_op_get_ts_info, 1878 .get_link_ksettings = e1000_get_link_ksettings, 1879 .set_link_ksettings = e1000_set_link_ksettings, 1880 }; 1881 1882 void e1000_set_ethtool_ops(struct net_device *netdev) 1883 { 1884 netdev->ethtool_ops = &e1000_ethtool_ops; 1885 } 1886