1*17fcb3dcSFan Gong /* SPDX-License-Identifier: GPL-2.0 */ 2*17fcb3dcSFan Gong /* Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved. */ 3*17fcb3dcSFan Gong 4*17fcb3dcSFan Gong #ifndef _HINIC3_HW_INTF_H_ 5*17fcb3dcSFan Gong #define _HINIC3_HW_INTF_H_ 6*17fcb3dcSFan Gong 7*17fcb3dcSFan Gong #include <linux/bits.h> 8*17fcb3dcSFan Gong #include <linux/types.h> 9*17fcb3dcSFan Gong 10*17fcb3dcSFan Gong #define MGMT_MSG_CMD_OP_SET 1 11*17fcb3dcSFan Gong #define MGMT_MSG_CMD_OP_GET 0 12*17fcb3dcSFan Gong 13*17fcb3dcSFan Gong #define MGMT_STATUS_PF_SET_VF_ALREADY 0x4 14*17fcb3dcSFan Gong #define MGMT_STATUS_EXIST 0x6 15*17fcb3dcSFan Gong #define MGMT_STATUS_CMD_UNSUPPORTED 0xFF 16*17fcb3dcSFan Gong 17*17fcb3dcSFan Gong #define MGMT_MSG_POLLING_TIMEOUT 0 18*17fcb3dcSFan Gong 19*17fcb3dcSFan Gong struct mgmt_msg_head { 20*17fcb3dcSFan Gong u8 status; 21*17fcb3dcSFan Gong u8 version; 22*17fcb3dcSFan Gong u8 rsvd0[6]; 23*17fcb3dcSFan Gong }; 24*17fcb3dcSFan Gong 25*17fcb3dcSFan Gong struct mgmt_msg_params { 26*17fcb3dcSFan Gong const void *buf_in; 27*17fcb3dcSFan Gong u32 in_size; 28*17fcb3dcSFan Gong void *buf_out; 29*17fcb3dcSFan Gong u32 expected_out_size; 30*17fcb3dcSFan Gong u32 timeout_ms; 31*17fcb3dcSFan Gong }; 32*17fcb3dcSFan Gong 33*17fcb3dcSFan Gong /* CMDQ MODULE_TYPE */ 34*17fcb3dcSFan Gong enum mgmt_mod_type { 35*17fcb3dcSFan Gong /* HW communication module */ 36*17fcb3dcSFan Gong MGMT_MOD_COMM = 0, 37*17fcb3dcSFan Gong /* L2NIC module */ 38*17fcb3dcSFan Gong MGMT_MOD_L2NIC = 1, 39*17fcb3dcSFan Gong /* Configuration module */ 40*17fcb3dcSFan Gong MGMT_MOD_CFGM = 7, 41*17fcb3dcSFan Gong MGMT_MOD_HILINK = 14, 42*17fcb3dcSFan Gong }; 43*17fcb3dcSFan Gong 44*17fcb3dcSFan Gong static inline void mgmt_msg_params_init_default(struct mgmt_msg_params *msg_params, 45*17fcb3dcSFan Gong void *inout_buf, u32 buf_size) 46*17fcb3dcSFan Gong { 47*17fcb3dcSFan Gong msg_params->buf_in = inout_buf; 48*17fcb3dcSFan Gong msg_params->buf_out = inout_buf; 49*17fcb3dcSFan Gong msg_params->in_size = buf_size; 50*17fcb3dcSFan Gong msg_params->expected_out_size = buf_size; 51*17fcb3dcSFan Gong msg_params->timeout_ms = 0; 52*17fcb3dcSFan Gong } 53*17fcb3dcSFan Gong 54*17fcb3dcSFan Gong /* COMM Commands between Driver to fw */ 55*17fcb3dcSFan Gong enum comm_cmd { 56*17fcb3dcSFan Gong /* Commands for clearing FLR and resources */ 57*17fcb3dcSFan Gong COMM_CMD_FUNC_RESET = 0, 58*17fcb3dcSFan Gong COMM_CMD_FEATURE_NEGO = 1, 59*17fcb3dcSFan Gong COMM_CMD_FLUSH_DOORBELL = 2, 60*17fcb3dcSFan Gong COMM_CMD_START_FLUSH = 3, 61*17fcb3dcSFan Gong COMM_CMD_GET_GLOBAL_ATTR = 5, 62*17fcb3dcSFan Gong COMM_CMD_SET_FUNC_SVC_USED_STATE = 7, 63*17fcb3dcSFan Gong 64*17fcb3dcSFan Gong /* Driver Configuration Commands */ 65*17fcb3dcSFan Gong COMM_CMD_SET_CMDQ_CTXT = 20, 66*17fcb3dcSFan Gong COMM_CMD_SET_VAT = 21, 67*17fcb3dcSFan Gong COMM_CMD_CFG_PAGESIZE = 22, 68*17fcb3dcSFan Gong COMM_CMD_CFG_MSIX_CTRL_REG = 23, 69*17fcb3dcSFan Gong COMM_CMD_SET_CEQ_CTRL_REG = 24, 70*17fcb3dcSFan Gong COMM_CMD_SET_DMA_ATTR = 25, 71*17fcb3dcSFan Gong }; 72*17fcb3dcSFan Gong 73*17fcb3dcSFan Gong enum comm_func_reset_bits { 74*17fcb3dcSFan Gong COMM_FUNC_RESET_BIT_FLUSH = BIT(0), 75*17fcb3dcSFan Gong COMM_FUNC_RESET_BIT_MQM = BIT(1), 76*17fcb3dcSFan Gong COMM_FUNC_RESET_BIT_SMF = BIT(2), 77*17fcb3dcSFan Gong COMM_FUNC_RESET_BIT_PF_BW_CFG = BIT(3), 78*17fcb3dcSFan Gong 79*17fcb3dcSFan Gong COMM_FUNC_RESET_BIT_COMM = BIT(10), 80*17fcb3dcSFan Gong /* clear mbox and aeq, The COMM_FUNC_RESET_BIT_COMM bit must be set */ 81*17fcb3dcSFan Gong COMM_FUNC_RESET_BIT_COMM_MGMT_CH = BIT(11), 82*17fcb3dcSFan Gong /* clear cmdq and ceq, The COMM_FUNC_RESET_BIT_COMM bit must be set */ 83*17fcb3dcSFan Gong COMM_FUNC_RESET_BIT_COMM_CMD_CH = BIT(12), 84*17fcb3dcSFan Gong COMM_FUNC_RESET_BIT_NIC = BIT(13), 85*17fcb3dcSFan Gong }; 86*17fcb3dcSFan Gong 87*17fcb3dcSFan Gong struct comm_cmd_func_reset { 88*17fcb3dcSFan Gong struct mgmt_msg_head head; 89*17fcb3dcSFan Gong u16 func_id; 90*17fcb3dcSFan Gong u16 rsvd1[3]; 91*17fcb3dcSFan Gong u64 reset_flag; 92*17fcb3dcSFan Gong }; 93*17fcb3dcSFan Gong 94*17fcb3dcSFan Gong #define COMM_MAX_FEATURE_QWORD 4 95*17fcb3dcSFan Gong struct comm_cmd_feature_nego { 96*17fcb3dcSFan Gong struct mgmt_msg_head head; 97*17fcb3dcSFan Gong u16 func_id; 98*17fcb3dcSFan Gong u8 opcode; 99*17fcb3dcSFan Gong u8 rsvd; 100*17fcb3dcSFan Gong u64 s_feature[COMM_MAX_FEATURE_QWORD]; 101*17fcb3dcSFan Gong }; 102*17fcb3dcSFan Gong 103*17fcb3dcSFan Gong /* Services supported by HW. HW uses these values when delivering events. 104*17fcb3dcSFan Gong * HW supports multiple services that are not yet supported by driver 105*17fcb3dcSFan Gong * (e.g. RoCE). 106*17fcb3dcSFan Gong */ 107*17fcb3dcSFan Gong enum hinic3_service_type { 108*17fcb3dcSFan Gong HINIC3_SERVICE_T_NIC = 0, 109*17fcb3dcSFan Gong /* MAX is only used by SW for array sizes. */ 110*17fcb3dcSFan Gong HINIC3_SERVICE_T_MAX = 1, 111*17fcb3dcSFan Gong }; 112*17fcb3dcSFan Gong 113*17fcb3dcSFan Gong #endif 114