1 // SPDX-License-Identifier: GPL-2.0 2 // Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved. 3 4 #include <linux/delay.h> 5 #include <linux/dma-mapping.h> 6 #include <linux/iopoll.h> 7 8 #include "hinic3_common.h" 9 10 int hinic3_dma_zalloc_coherent_align(struct device *dev, u32 size, u32 align, 11 gfp_t flag, 12 struct hinic3_dma_addr_align *mem_align) 13 { 14 dma_addr_t paddr, align_paddr; 15 void *vaddr, *align_vaddr; 16 u32 real_size = size; 17 18 vaddr = dma_alloc_coherent(dev, real_size, &paddr, flag); 19 if (!vaddr) 20 return -ENOMEM; 21 22 align_paddr = ALIGN(paddr, align); 23 if (align_paddr == paddr) { 24 align_vaddr = vaddr; 25 goto out; 26 } 27 28 dma_free_coherent(dev, real_size, vaddr, paddr); 29 30 /* realloc memory for align */ 31 real_size = size + align; 32 vaddr = dma_alloc_coherent(dev, real_size, &paddr, flag); 33 if (!vaddr) 34 return -ENOMEM; 35 36 align_paddr = ALIGN(paddr, align); 37 align_vaddr = vaddr + (align_paddr - paddr); 38 39 out: 40 mem_align->real_size = real_size; 41 mem_align->ori_vaddr = vaddr; 42 mem_align->ori_paddr = paddr; 43 mem_align->align_vaddr = align_vaddr; 44 mem_align->align_paddr = align_paddr; 45 46 return 0; 47 } 48 49 void hinic3_dma_free_coherent_align(struct device *dev, 50 struct hinic3_dma_addr_align *mem_align) 51 { 52 dma_free_coherent(dev, mem_align->real_size, 53 mem_align->ori_vaddr, mem_align->ori_paddr); 54 } 55 56 int hinic3_wait_for_timeout(void *priv_data, wait_cpl_handler handler, 57 u32 wait_total_ms, u32 wait_once_us) 58 { 59 enum hinic3_wait_return ret; 60 int err; 61 62 err = read_poll_timeout(handler, ret, ret == HINIC3_WAIT_PROCESS_CPL, 63 wait_once_us, wait_total_ms * USEC_PER_MSEC, 64 false, priv_data); 65 66 return err; 67 } 68 69 /* Data provided to/by cmdq is arranged in structs with little endian fields but 70 * every dword (32bits) should be swapped since HW swaps it again when it 71 * copies it from/to host memory. 72 */ 73 void hinic3_cmdq_buf_swab32(void *data, int len) 74 { 75 swab32_array(data, len / sizeof(u32)); 76 } 77