12025cf9eSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 251ba902aSAviad Krawczyk /* 351ba902aSAviad Krawczyk * Huawei HiNIC PCI Express Linux driver 451ba902aSAviad Krawczyk * Copyright(c) 2017 Huawei Technologies Co., Ltd 551ba902aSAviad Krawczyk */ 651ba902aSAviad Krawczyk 751ba902aSAviad Krawczyk #ifndef HINIC_DEV_H 851ba902aSAviad Krawczyk #define HINIC_DEV_H 951ba902aSAviad Krawczyk 1051ba902aSAviad Krawczyk #include <linux/netdevice.h> 1151ba902aSAviad Krawczyk #include <linux/types.h> 1225a3ba61SAviad Krawczyk #include <linux/semaphore.h> 13c4d06d2dSAviad Krawczyk #include <linux/workqueue.h> 14c4d06d2dSAviad Krawczyk #include <linux/bitops.h> 1551ba902aSAviad Krawczyk 1651ba902aSAviad Krawczyk #include "hinic_hw_dev.h" 17c3e79bafSAviad Krawczyk #include "hinic_tx.h" 18c3e79bafSAviad Krawczyk #include "hinic_rx.h" 1951ba902aSAviad Krawczyk 2051ba902aSAviad Krawczyk #define HINIC_DRV_NAME "hinic" 2151ba902aSAviad Krawczyk 22c4d06d2dSAviad Krawczyk enum hinic_flags { 23c4d06d2dSAviad Krawczyk HINIC_LINK_UP = BIT(0), 24c4d06d2dSAviad Krawczyk HINIC_INTF_UP = BIT(1), 25*421e9526SXue Chaojing HINIC_RSS_ENABLE = BIT(2), 26c4d06d2dSAviad Krawczyk }; 27c4d06d2dSAviad Krawczyk 28c4d06d2dSAviad Krawczyk struct hinic_rx_mode_work { 29c4d06d2dSAviad Krawczyk struct work_struct work; 30c4d06d2dSAviad Krawczyk u32 rx_mode; 31c4d06d2dSAviad Krawczyk }; 32c4d06d2dSAviad Krawczyk 33*421e9526SXue Chaojing struct hinic_rss_type { 34*421e9526SXue Chaojing u8 tcp_ipv6_ext; 35*421e9526SXue Chaojing u8 ipv6_ext; 36*421e9526SXue Chaojing u8 tcp_ipv6; 37*421e9526SXue Chaojing u8 ipv6; 38*421e9526SXue Chaojing u8 tcp_ipv4; 39*421e9526SXue Chaojing u8 ipv4; 40*421e9526SXue Chaojing u8 udp_ipv6; 41*421e9526SXue Chaojing u8 udp_ipv4; 42*421e9526SXue Chaojing }; 43*421e9526SXue Chaojing 44*421e9526SXue Chaojing enum hinic_rss_hash_type { 45*421e9526SXue Chaojing HINIC_RSS_HASH_ENGINE_TYPE_XOR, 46*421e9526SXue Chaojing HINIC_RSS_HASH_ENGINE_TYPE_TOEP, 47*421e9526SXue Chaojing HINIC_RSS_HASH_ENGINE_TYPE_MAX, 48*421e9526SXue Chaojing }; 49*421e9526SXue Chaojing 5051ba902aSAviad Krawczyk struct hinic_dev { 5151ba902aSAviad Krawczyk struct net_device *netdev; 5251ba902aSAviad Krawczyk struct hinic_hwdev *hwdev; 5351ba902aSAviad Krawczyk 5451ba902aSAviad Krawczyk u32 msg_enable; 5500e57a6dSAviad Krawczyk unsigned int tx_weight; 56e2585ea7SAviad Krawczyk unsigned int rx_weight; 57*421e9526SXue Chaojing u16 num_qps; 58*421e9526SXue Chaojing u16 max_qps; 5925a3ba61SAviad Krawczyk 60c4d06d2dSAviad Krawczyk unsigned int flags; 61c4d06d2dSAviad Krawczyk 6225a3ba61SAviad Krawczyk struct semaphore mgmt_lock; 6325a3ba61SAviad Krawczyk unsigned long *vlan_bitmap; 64c4d06d2dSAviad Krawczyk 65c4d06d2dSAviad Krawczyk struct hinic_rx_mode_work rx_mode_work; 66c4d06d2dSAviad Krawczyk struct workqueue_struct *workq; 67c3e79bafSAviad Krawczyk 68c3e79bafSAviad Krawczyk struct hinic_txq *txqs; 69c3e79bafSAviad Krawczyk struct hinic_rxq *rxqs; 70edd384f6SAviad Krawczyk 71edd384f6SAviad Krawczyk struct hinic_txq_stats tx_stats; 72edd384f6SAviad Krawczyk struct hinic_rxq_stats rx_stats; 73*421e9526SXue Chaojing 74*421e9526SXue Chaojing u8 rss_tmpl_idx; 75*421e9526SXue Chaojing u8 rss_hash_engine; 76*421e9526SXue Chaojing u16 num_rss; 77*421e9526SXue Chaojing u16 rss_limit; 78*421e9526SXue Chaojing struct hinic_rss_type rss_type; 7951ba902aSAviad Krawczyk }; 8051ba902aSAviad Krawczyk 8151ba902aSAviad Krawczyk #endif 82