12ef17216SNishad Kamdar /* SPDX-License-Identifier: GPL-2.0+ */ 2d71d8381SJian Shen // Copyright (c) 2016-2017 Hisilicon Limited. 3256727daSSalil 4256727daSSalil #ifndef __HCLGE_MDIO_H 5256727daSSalil #define __HCLGE_MDIO_H 6256727daSSalil 7*184da9dcSJie Wang #include "hnae3.h" 8*184da9dcSJie Wang 9*184da9dcSJie Wang struct hclge_dev; 10*184da9dcSJie Wang 11256727daSSalil int hclge_mac_mdio_config(struct hclge_dev *hdev); 12c8a8045bSHuazhong Tan int hclge_mac_connect_phy(struct hnae3_handle *handle); 13c8a8045bSHuazhong Tan void hclge_mac_disconnect_phy(struct hnae3_handle *handle); 14b01b7cf1SFuyun Liang void hclge_mac_start_phy(struct hclge_dev *hdev); 15256727daSSalil void hclge_mac_stop_phy(struct hclge_dev *hdev); 16024712f5SGuangbin Huang u16 hclge_read_phy_reg(struct hclge_dev *hdev, u16 reg_addr); 17024712f5SGuangbin Huang int hclge_write_phy_reg(struct hclge_dev *hdev, u16 reg_addr, u16 val); 18256727daSSalil 19256727daSSalil #endif 20