1 // SPDX-License-Identifier: GPL-2.0+ 2 // Copyright (c) 2016-2017 Hisilicon Limited. 3 4 #include "hclge_main.h" 5 #include "hclge_mbx.h" 6 #include "hnae3.h" 7 8 #define CREATE_TRACE_POINTS 9 #include "hclge_trace.h" 10 11 static u16 hclge_errno_to_resp(int errno) 12 { 13 return abs(errno); 14 } 15 16 /* hclge_gen_resp_to_vf: used to generate a synchronous response to VF when PF 17 * receives a mailbox message from VF. 18 * @vport: pointer to struct hclge_vport 19 * @vf_to_pf_req: pointer to hclge_mbx_vf_to_pf_cmd of the original mailbox 20 * message 21 * @resp_status: indicate to VF whether its request success(0) or failed. 22 */ 23 static int hclge_gen_resp_to_vf(struct hclge_vport *vport, 24 struct hclge_mbx_vf_to_pf_cmd *vf_to_pf_req, 25 struct hclge_respond_to_vf_msg *resp_msg) 26 { 27 struct hclge_mbx_pf_to_vf_cmd *resp_pf_to_vf; 28 struct hclge_dev *hdev = vport->back; 29 enum hclge_cmd_status status; 30 struct hclge_desc desc; 31 u16 resp; 32 33 resp_pf_to_vf = (struct hclge_mbx_pf_to_vf_cmd *)desc.data; 34 35 if (resp_msg->len > HCLGE_MBX_MAX_RESP_DATA_SIZE) { 36 dev_err(&hdev->pdev->dev, 37 "PF fail to gen resp to VF len %u exceeds max len %u\n", 38 resp_msg->len, 39 HCLGE_MBX_MAX_RESP_DATA_SIZE); 40 /* If resp_msg->len is too long, set the value to max length 41 * and return the msg to VF 42 */ 43 resp_msg->len = HCLGE_MBX_MAX_RESP_DATA_SIZE; 44 } 45 46 hclge_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_MBX_PF_TO_VF, false); 47 48 resp_pf_to_vf->dest_vfid = vf_to_pf_req->mbx_src_vfid; 49 resp_pf_to_vf->msg_len = vf_to_pf_req->msg_len; 50 51 resp_pf_to_vf->msg.code = HCLGE_MBX_PF_VF_RESP; 52 resp_pf_to_vf->msg.vf_mbx_msg_code = vf_to_pf_req->msg.code; 53 resp_pf_to_vf->msg.vf_mbx_msg_subcode = vf_to_pf_req->msg.subcode; 54 resp = hclge_errno_to_resp(resp_msg->status); 55 if (resp < SHRT_MAX) { 56 resp_pf_to_vf->msg.resp_status = resp; 57 } else { 58 dev_warn(&hdev->pdev->dev, 59 "failed to send response to VF, response status %d is out-of-bound\n", 60 resp); 61 resp_pf_to_vf->msg.resp_status = EIO; 62 } 63 64 if (resp_msg->len > 0) 65 memcpy(resp_pf_to_vf->msg.resp_data, resp_msg->data, 66 resp_msg->len); 67 68 status = hclge_cmd_send(&hdev->hw, &desc, 1); 69 if (status) 70 dev_err(&hdev->pdev->dev, 71 "failed to send response to VF, status: %d, vfid: %u, code: %u, subcode: %u.\n", 72 status, vf_to_pf_req->mbx_src_vfid, 73 vf_to_pf_req->msg.code, vf_to_pf_req->msg.subcode); 74 75 return status; 76 } 77 78 static int hclge_send_mbx_msg(struct hclge_vport *vport, u8 *msg, u16 msg_len, 79 u16 mbx_opcode, u8 dest_vfid) 80 { 81 struct hclge_mbx_pf_to_vf_cmd *resp_pf_to_vf; 82 struct hclge_dev *hdev = vport->back; 83 enum hclge_cmd_status status; 84 struct hclge_desc desc; 85 86 resp_pf_to_vf = (struct hclge_mbx_pf_to_vf_cmd *)desc.data; 87 88 hclge_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_MBX_PF_TO_VF, false); 89 90 resp_pf_to_vf->dest_vfid = dest_vfid; 91 resp_pf_to_vf->msg_len = msg_len; 92 resp_pf_to_vf->msg.code = mbx_opcode; 93 94 memcpy(&resp_pf_to_vf->msg.vf_mbx_msg_code, msg, msg_len); 95 96 trace_hclge_pf_mbx_send(hdev, resp_pf_to_vf); 97 98 status = hclge_cmd_send(&hdev->hw, &desc, 1); 99 if (status) 100 dev_err(&hdev->pdev->dev, 101 "failed to send mailbox to VF, status: %d, vfid: %u, opcode: %u\n", 102 status, dest_vfid, mbx_opcode); 103 104 return status; 105 } 106 107 int hclge_inform_reset_assert_to_vf(struct hclge_vport *vport) 108 { 109 struct hclge_dev *hdev = vport->back; 110 u16 reset_type; 111 u8 msg_data[2]; 112 u8 dest_vfid; 113 114 BUILD_BUG_ON(HNAE3_MAX_RESET > U16_MAX); 115 116 dest_vfid = (u8)vport->vport_id; 117 118 if (hdev->reset_type == HNAE3_FUNC_RESET) 119 reset_type = HNAE3_VF_PF_FUNC_RESET; 120 else if (hdev->reset_type == HNAE3_FLR_RESET) 121 reset_type = HNAE3_VF_FULL_RESET; 122 else 123 reset_type = HNAE3_VF_FUNC_RESET; 124 125 memcpy(&msg_data[0], &reset_type, sizeof(u16)); 126 127 /* send this requested info to VF */ 128 return hclge_send_mbx_msg(vport, msg_data, sizeof(msg_data), 129 HCLGE_MBX_ASSERTING_RESET, dest_vfid); 130 } 131 132 static void hclge_free_vector_ring_chain(struct hnae3_ring_chain_node *head) 133 { 134 struct hnae3_ring_chain_node *chain_tmp, *chain; 135 136 chain = head->next; 137 138 while (chain) { 139 chain_tmp = chain->next; 140 kfree_sensitive(chain); 141 chain = chain_tmp; 142 } 143 } 144 145 /* hclge_get_ring_chain_from_mbx: get ring type & tqp id & int_gl idx 146 * from mailbox message 147 * msg[0]: opcode 148 * msg[1]: <not relevant to this function> 149 * msg[2]: ring_num 150 * msg[3]: first ring type (TX|RX) 151 * msg[4]: first tqp id 152 * msg[5]: first int_gl idx 153 * msg[6] ~ msg[14]: other ring type, tqp id and int_gl idx 154 */ 155 static int hclge_get_ring_chain_from_mbx( 156 struct hclge_mbx_vf_to_pf_cmd *req, 157 struct hnae3_ring_chain_node *ring_chain, 158 struct hclge_vport *vport) 159 { 160 struct hnae3_ring_chain_node *cur_chain, *new_chain; 161 int ring_num; 162 int i = 0; 163 164 ring_num = req->msg.ring_num; 165 166 if (ring_num > HCLGE_MBX_MAX_RING_CHAIN_PARAM_NUM) 167 return -ENOMEM; 168 169 hnae3_set_bit(ring_chain->flag, HNAE3_RING_TYPE_B, 170 req->msg.param[i].ring_type); 171 ring_chain->tqp_index = 172 hclge_get_queue_id(vport->nic.kinfo.tqp 173 [req->msg.param[i].tqp_index]); 174 hnae3_set_field(ring_chain->int_gl_idx, HNAE3_RING_GL_IDX_M, 175 HNAE3_RING_GL_IDX_S, req->msg.param[i].int_gl_index); 176 177 cur_chain = ring_chain; 178 179 for (i = 1; i < ring_num; i++) { 180 new_chain = kzalloc(sizeof(*new_chain), GFP_KERNEL); 181 if (!new_chain) 182 goto err; 183 184 hnae3_set_bit(new_chain->flag, HNAE3_RING_TYPE_B, 185 req->msg.param[i].ring_type); 186 187 new_chain->tqp_index = 188 hclge_get_queue_id(vport->nic.kinfo.tqp 189 [req->msg.param[i].tqp_index]); 190 191 hnae3_set_field(new_chain->int_gl_idx, HNAE3_RING_GL_IDX_M, 192 HNAE3_RING_GL_IDX_S, 193 req->msg.param[i].int_gl_index); 194 195 cur_chain->next = new_chain; 196 cur_chain = new_chain; 197 } 198 199 return 0; 200 err: 201 hclge_free_vector_ring_chain(ring_chain); 202 return -ENOMEM; 203 } 204 205 static int hclge_map_unmap_ring_to_vf_vector(struct hclge_vport *vport, bool en, 206 struct hclge_mbx_vf_to_pf_cmd *req) 207 { 208 struct hnae3_ring_chain_node ring_chain; 209 int vector_id = req->msg.vector_id; 210 int ret; 211 212 memset(&ring_chain, 0, sizeof(ring_chain)); 213 ret = hclge_get_ring_chain_from_mbx(req, &ring_chain, vport); 214 if (ret) 215 return ret; 216 217 ret = hclge_bind_ring_with_vector(vport, vector_id, en, &ring_chain); 218 219 hclge_free_vector_ring_chain(&ring_chain); 220 221 return ret; 222 } 223 224 static int hclge_set_vf_promisc_mode(struct hclge_vport *vport, 225 struct hclge_mbx_vf_to_pf_cmd *req) 226 { 227 bool en_bc = req->msg.en_bc ? true : false; 228 bool en_uc = req->msg.en_uc ? true : false; 229 bool en_mc = req->msg.en_mc ? true : false; 230 struct hnae3_handle *handle = &vport->nic; 231 int ret; 232 233 if (!vport->vf_info.trusted) { 234 en_uc = false; 235 en_mc = false; 236 } 237 238 if (req->msg.en_limit_promisc) 239 set_bit(HNAE3_PFLAG_LIMIT_PROMISC, &handle->priv_flags); 240 else 241 clear_bit(HNAE3_PFLAG_LIMIT_PROMISC, 242 &handle->priv_flags); 243 244 ret = hclge_set_vport_promisc_mode(vport, en_uc, en_mc, en_bc); 245 246 vport->vf_info.promisc_enable = (en_uc || en_mc) ? 1 : 0; 247 248 return ret; 249 } 250 251 void hclge_inform_vf_promisc_info(struct hclge_vport *vport) 252 { 253 u8 dest_vfid = (u8)vport->vport_id; 254 u8 msg_data[2]; 255 256 memcpy(&msg_data[0], &vport->vf_info.promisc_enable, sizeof(u16)); 257 258 hclge_send_mbx_msg(vport, msg_data, sizeof(msg_data), 259 HCLGE_MBX_PUSH_PROMISC_INFO, dest_vfid); 260 } 261 262 static int hclge_set_vf_uc_mac_addr(struct hclge_vport *vport, 263 struct hclge_mbx_vf_to_pf_cmd *mbx_req) 264 { 265 #define HCLGE_MBX_VF_OLD_MAC_ADDR_OFFSET 6 266 267 const u8 *mac_addr = (const u8 *)(mbx_req->msg.data); 268 struct hclge_dev *hdev = vport->back; 269 int status; 270 271 if (mbx_req->msg.subcode == HCLGE_MBX_MAC_VLAN_UC_MODIFY) { 272 const u8 *old_addr = (const u8 *) 273 (&mbx_req->msg.data[HCLGE_MBX_VF_OLD_MAC_ADDR_OFFSET]); 274 275 /* If VF MAC has been configured by the host then it 276 * cannot be overridden by the MAC specified by the VM. 277 */ 278 if (!is_zero_ether_addr(vport->vf_info.mac) && 279 !ether_addr_equal(mac_addr, vport->vf_info.mac)) 280 return -EPERM; 281 282 if (!is_valid_ether_addr(mac_addr)) 283 return -EINVAL; 284 285 spin_lock_bh(&vport->mac_list_lock); 286 status = hclge_update_mac_node_for_dev_addr(vport, old_addr, 287 mac_addr); 288 spin_unlock_bh(&vport->mac_list_lock); 289 hclge_task_schedule(hdev, 0); 290 } else if (mbx_req->msg.subcode == HCLGE_MBX_MAC_VLAN_UC_ADD) { 291 status = hclge_update_mac_list(vport, HCLGE_MAC_TO_ADD, 292 HCLGE_MAC_ADDR_UC, mac_addr); 293 } else if (mbx_req->msg.subcode == HCLGE_MBX_MAC_VLAN_UC_REMOVE) { 294 status = hclge_update_mac_list(vport, HCLGE_MAC_TO_DEL, 295 HCLGE_MAC_ADDR_UC, mac_addr); 296 } else { 297 dev_err(&hdev->pdev->dev, 298 "failed to set unicast mac addr, unknown subcode %u\n", 299 mbx_req->msg.subcode); 300 return -EIO; 301 } 302 303 return status; 304 } 305 306 static int hclge_set_vf_mc_mac_addr(struct hclge_vport *vport, 307 struct hclge_mbx_vf_to_pf_cmd *mbx_req) 308 { 309 const u8 *mac_addr = (const u8 *)(mbx_req->msg.data); 310 struct hclge_dev *hdev = vport->back; 311 312 if (mbx_req->msg.subcode == HCLGE_MBX_MAC_VLAN_MC_ADD) { 313 hclge_update_mac_list(vport, HCLGE_MAC_TO_ADD, 314 HCLGE_MAC_ADDR_MC, mac_addr); 315 } else if (mbx_req->msg.subcode == HCLGE_MBX_MAC_VLAN_MC_REMOVE) { 316 hclge_update_mac_list(vport, HCLGE_MAC_TO_DEL, 317 HCLGE_MAC_ADDR_MC, mac_addr); 318 } else { 319 dev_err(&hdev->pdev->dev, 320 "failed to set mcast mac addr, unknown subcode %u\n", 321 mbx_req->msg.subcode); 322 return -EIO; 323 } 324 325 return 0; 326 } 327 328 int hclge_push_vf_port_base_vlan_info(struct hclge_vport *vport, u8 vfid, 329 u16 state, u16 vlan_tag, u16 qos, 330 u16 vlan_proto) 331 { 332 #define MSG_DATA_SIZE 8 333 334 u8 msg_data[MSG_DATA_SIZE]; 335 336 memcpy(&msg_data[0], &state, sizeof(u16)); 337 memcpy(&msg_data[2], &vlan_proto, sizeof(u16)); 338 memcpy(&msg_data[4], &qos, sizeof(u16)); 339 memcpy(&msg_data[6], &vlan_tag, sizeof(u16)); 340 341 return hclge_send_mbx_msg(vport, msg_data, sizeof(msg_data), 342 HCLGE_MBX_PUSH_VLAN_INFO, vfid); 343 } 344 345 static int hclge_set_vf_vlan_cfg(struct hclge_vport *vport, 346 struct hclge_mbx_vf_to_pf_cmd *mbx_req, 347 struct hclge_respond_to_vf_msg *resp_msg) 348 { 349 #define HCLGE_MBX_VLAN_STATE_OFFSET 0 350 #define HCLGE_MBX_VLAN_INFO_OFFSET 2 351 352 struct hclge_vf_vlan_cfg *msg_cmd; 353 int status = 0; 354 355 msg_cmd = (struct hclge_vf_vlan_cfg *)&mbx_req->msg; 356 if (msg_cmd->subcode == HCLGE_MBX_VLAN_FILTER) { 357 struct hnae3_handle *handle = &vport->nic; 358 u16 vlan, proto; 359 bool is_kill; 360 361 is_kill = !!msg_cmd->is_kill; 362 vlan = msg_cmd->vlan; 363 proto = msg_cmd->proto; 364 status = hclge_set_vlan_filter(handle, cpu_to_be16(proto), 365 vlan, is_kill); 366 } else if (msg_cmd->subcode == HCLGE_MBX_VLAN_RX_OFF_CFG) { 367 struct hnae3_handle *handle = &vport->nic; 368 bool en = msg_cmd->is_kill ? true : false; 369 370 status = hclge_en_hw_strip_rxvtag(handle, en); 371 } else if (msg_cmd->subcode == HCLGE_MBX_PORT_BASE_VLAN_CFG) { 372 struct hclge_vlan_info *vlan_info; 373 u16 *state; 374 375 state = (u16 *)&mbx_req->msg.data[HCLGE_MBX_VLAN_STATE_OFFSET]; 376 vlan_info = (struct hclge_vlan_info *) 377 &mbx_req->msg.data[HCLGE_MBX_VLAN_INFO_OFFSET]; 378 status = hclge_update_port_base_vlan_cfg(vport, *state, 379 vlan_info); 380 } else if (msg_cmd->subcode == HCLGE_MBX_GET_PORT_BASE_VLAN_STATE) { 381 struct hnae3_ae_dev *ae_dev = pci_get_drvdata(vport->nic.pdev); 382 /* vf does not need to know about the port based VLAN state 383 * on device HNAE3_DEVICE_VERSION_V3. So always return disable 384 * on device HNAE3_DEVICE_VERSION_V3 if vf queries the port 385 * based VLAN state. 386 */ 387 resp_msg->data[0] = 388 ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V3 ? 389 HNAE3_PORT_BASE_VLAN_DISABLE : 390 vport->port_base_vlan_cfg.state; 391 resp_msg->len = sizeof(u8); 392 } 393 394 return status; 395 } 396 397 static int hclge_set_vf_alive(struct hclge_vport *vport, 398 struct hclge_mbx_vf_to_pf_cmd *mbx_req) 399 { 400 bool alive = !!mbx_req->msg.data[0]; 401 int ret = 0; 402 403 if (alive) 404 ret = hclge_vport_start(vport); 405 else 406 hclge_vport_stop(vport); 407 408 return ret; 409 } 410 411 static void hclge_get_vf_tcinfo(struct hclge_vport *vport, 412 struct hclge_respond_to_vf_msg *resp_msg) 413 { 414 struct hnae3_knic_private_info *kinfo = &vport->nic.kinfo; 415 unsigned int i; 416 417 for (i = 0; i < kinfo->tc_info.num_tc; i++) 418 resp_msg->data[0] |= BIT(i); 419 420 resp_msg->len = sizeof(u8); 421 } 422 423 static void hclge_get_vf_queue_info(struct hclge_vport *vport, 424 struct hclge_respond_to_vf_msg *resp_msg) 425 { 426 #define HCLGE_TQPS_RSS_INFO_LEN 6 427 #define HCLGE_TQPS_ALLOC_OFFSET 0 428 #define HCLGE_TQPS_RSS_SIZE_OFFSET 2 429 #define HCLGE_TQPS_RX_BUFFER_LEN_OFFSET 4 430 431 struct hclge_dev *hdev = vport->back; 432 433 /* get the queue related info */ 434 memcpy(&resp_msg->data[HCLGE_TQPS_ALLOC_OFFSET], 435 &vport->alloc_tqps, sizeof(u16)); 436 memcpy(&resp_msg->data[HCLGE_TQPS_RSS_SIZE_OFFSET], 437 &vport->nic.kinfo.rss_size, sizeof(u16)); 438 memcpy(&resp_msg->data[HCLGE_TQPS_RX_BUFFER_LEN_OFFSET], 439 &hdev->rx_buf_len, sizeof(u16)); 440 resp_msg->len = HCLGE_TQPS_RSS_INFO_LEN; 441 } 442 443 static void hclge_get_vf_mac_addr(struct hclge_vport *vport, 444 struct hclge_respond_to_vf_msg *resp_msg) 445 { 446 ether_addr_copy(resp_msg->data, vport->vf_info.mac); 447 resp_msg->len = ETH_ALEN; 448 } 449 450 static void hclge_get_vf_queue_depth(struct hclge_vport *vport, 451 struct hclge_respond_to_vf_msg *resp_msg) 452 { 453 #define HCLGE_TQPS_DEPTH_INFO_LEN 4 454 #define HCLGE_TQPS_NUM_TX_DESC_OFFSET 0 455 #define HCLGE_TQPS_NUM_RX_DESC_OFFSET 2 456 457 struct hclge_dev *hdev = vport->back; 458 459 /* get the queue depth info */ 460 memcpy(&resp_msg->data[HCLGE_TQPS_NUM_TX_DESC_OFFSET], 461 &hdev->num_tx_desc, sizeof(u16)); 462 memcpy(&resp_msg->data[HCLGE_TQPS_NUM_RX_DESC_OFFSET], 463 &hdev->num_rx_desc, sizeof(u16)); 464 resp_msg->len = HCLGE_TQPS_DEPTH_INFO_LEN; 465 } 466 467 static void hclge_get_vf_media_type(struct hclge_vport *vport, 468 struct hclge_respond_to_vf_msg *resp_msg) 469 { 470 #define HCLGE_VF_MEDIA_TYPE_OFFSET 0 471 #define HCLGE_VF_MODULE_TYPE_OFFSET 1 472 #define HCLGE_VF_MEDIA_TYPE_LENGTH 2 473 474 struct hclge_dev *hdev = vport->back; 475 476 resp_msg->data[HCLGE_VF_MEDIA_TYPE_OFFSET] = 477 hdev->hw.mac.media_type; 478 resp_msg->data[HCLGE_VF_MODULE_TYPE_OFFSET] = 479 hdev->hw.mac.module_type; 480 resp_msg->len = HCLGE_VF_MEDIA_TYPE_LENGTH; 481 } 482 483 static int hclge_get_link_info(struct hclge_vport *vport, 484 struct hclge_mbx_vf_to_pf_cmd *mbx_req) 485 { 486 #define HCLGE_VF_LINK_STATE_UP 1U 487 #define HCLGE_VF_LINK_STATE_DOWN 0U 488 489 struct hclge_dev *hdev = vport->back; 490 u16 link_status; 491 u8 msg_data[8]; 492 u8 dest_vfid; 493 u16 duplex; 494 495 /* mac.link can only be 0 or 1 */ 496 switch (vport->vf_info.link_state) { 497 case IFLA_VF_LINK_STATE_ENABLE: 498 link_status = HCLGE_VF_LINK_STATE_UP; 499 break; 500 case IFLA_VF_LINK_STATE_DISABLE: 501 link_status = HCLGE_VF_LINK_STATE_DOWN; 502 break; 503 case IFLA_VF_LINK_STATE_AUTO: 504 default: 505 link_status = (u16)hdev->hw.mac.link; 506 break; 507 } 508 509 duplex = hdev->hw.mac.duplex; 510 memcpy(&msg_data[0], &link_status, sizeof(u16)); 511 memcpy(&msg_data[2], &hdev->hw.mac.speed, sizeof(u32)); 512 memcpy(&msg_data[6], &duplex, sizeof(u16)); 513 dest_vfid = mbx_req->mbx_src_vfid; 514 515 /* send this requested info to VF */ 516 return hclge_send_mbx_msg(vport, msg_data, sizeof(msg_data), 517 HCLGE_MBX_LINK_STAT_CHANGE, dest_vfid); 518 } 519 520 static void hclge_get_link_mode(struct hclge_vport *vport, 521 struct hclge_mbx_vf_to_pf_cmd *mbx_req) 522 { 523 #define HCLGE_SUPPORTED 1 524 struct hclge_dev *hdev = vport->back; 525 unsigned long advertising; 526 unsigned long supported; 527 unsigned long send_data; 528 u8 msg_data[10]; 529 u8 dest_vfid; 530 531 advertising = hdev->hw.mac.advertising[0]; 532 supported = hdev->hw.mac.supported[0]; 533 dest_vfid = mbx_req->mbx_src_vfid; 534 msg_data[0] = mbx_req->msg.data[0]; 535 536 send_data = msg_data[0] == HCLGE_SUPPORTED ? supported : advertising; 537 538 memcpy(&msg_data[2], &send_data, sizeof(unsigned long)); 539 hclge_send_mbx_msg(vport, msg_data, sizeof(msg_data), 540 HCLGE_MBX_LINK_STAT_MODE, dest_vfid); 541 } 542 543 static void hclge_mbx_reset_vf_queue(struct hclge_vport *vport, 544 struct hclge_mbx_vf_to_pf_cmd *mbx_req) 545 { 546 u16 queue_id; 547 548 memcpy(&queue_id, mbx_req->msg.data, sizeof(queue_id)); 549 550 hclge_reset_vf_queue(vport, queue_id); 551 } 552 553 static int hclge_reset_vf(struct hclge_vport *vport) 554 { 555 struct hclge_dev *hdev = vport->back; 556 557 dev_warn(&hdev->pdev->dev, "PF received VF reset request from VF %u!", 558 vport->vport_id); 559 560 return hclge_func_reset_cmd(hdev, vport->vport_id); 561 } 562 563 static void hclge_vf_keep_alive(struct hclge_vport *vport) 564 { 565 vport->last_active_jiffies = jiffies; 566 } 567 568 static int hclge_set_vf_mtu(struct hclge_vport *vport, 569 struct hclge_mbx_vf_to_pf_cmd *mbx_req) 570 { 571 u32 mtu; 572 573 memcpy(&mtu, mbx_req->msg.data, sizeof(mtu)); 574 575 return hclge_set_vport_mtu(vport, mtu); 576 } 577 578 static void hclge_get_queue_id_in_pf(struct hclge_vport *vport, 579 struct hclge_mbx_vf_to_pf_cmd *mbx_req, 580 struct hclge_respond_to_vf_msg *resp_msg) 581 { 582 u16 queue_id, qid_in_pf; 583 584 memcpy(&queue_id, mbx_req->msg.data, sizeof(queue_id)); 585 qid_in_pf = hclge_covert_handle_qid_global(&vport->nic, queue_id); 586 memcpy(resp_msg->data, &qid_in_pf, sizeof(qid_in_pf)); 587 resp_msg->len = sizeof(qid_in_pf); 588 } 589 590 static void hclge_get_rss_key(struct hclge_vport *vport, 591 struct hclge_mbx_vf_to_pf_cmd *mbx_req, 592 struct hclge_respond_to_vf_msg *resp_msg) 593 { 594 #define HCLGE_RSS_MBX_RESP_LEN 8 595 struct hclge_dev *hdev = vport->back; 596 u8 index; 597 598 index = mbx_req->msg.data[0]; 599 600 memcpy(resp_msg->data, 601 &hdev->vport[0].rss_hash_key[index * HCLGE_RSS_MBX_RESP_LEN], 602 HCLGE_RSS_MBX_RESP_LEN); 603 resp_msg->len = HCLGE_RSS_MBX_RESP_LEN; 604 } 605 606 static void hclge_link_fail_parse(struct hclge_dev *hdev, u8 link_fail_code) 607 { 608 switch (link_fail_code) { 609 case HCLGE_LF_REF_CLOCK_LOST: 610 dev_warn(&hdev->pdev->dev, "Reference clock lost!\n"); 611 break; 612 case HCLGE_LF_XSFP_TX_DISABLE: 613 dev_warn(&hdev->pdev->dev, "SFP tx is disabled!\n"); 614 break; 615 case HCLGE_LF_XSFP_ABSENT: 616 dev_warn(&hdev->pdev->dev, "SFP is absent!\n"); 617 break; 618 default: 619 break; 620 } 621 } 622 623 static void hclge_handle_link_change_event(struct hclge_dev *hdev, 624 struct hclge_mbx_vf_to_pf_cmd *req) 625 { 626 hclge_task_schedule(hdev, 0); 627 628 if (!req->msg.subcode) 629 hclge_link_fail_parse(hdev, req->msg.data[0]); 630 } 631 632 static bool hclge_cmd_crq_empty(struct hclge_hw *hw) 633 { 634 u32 tail = hclge_read_dev(hw, HCLGE_NIC_CRQ_TAIL_REG); 635 636 return tail == hw->cmq.crq.next_to_use; 637 } 638 639 static void hclge_handle_ncsi_error(struct hclge_dev *hdev) 640 { 641 struct hnae3_ae_dev *ae_dev = hdev->ae_dev; 642 643 ae_dev->ops->set_default_reset_request(ae_dev, HNAE3_GLOBAL_RESET); 644 dev_warn(&hdev->pdev->dev, "requesting reset due to NCSI error\n"); 645 ae_dev->ops->reset_event(hdev->pdev, NULL); 646 } 647 648 static void hclge_handle_vf_tbl(struct hclge_vport *vport, 649 struct hclge_mbx_vf_to_pf_cmd *mbx_req) 650 { 651 struct hclge_dev *hdev = vport->back; 652 struct hclge_vf_vlan_cfg *msg_cmd; 653 654 msg_cmd = (struct hclge_vf_vlan_cfg *)&mbx_req->msg; 655 if (msg_cmd->subcode == HCLGE_MBX_VPORT_LIST_CLEAR) { 656 hclge_rm_vport_all_mac_table(vport, true, HCLGE_MAC_ADDR_UC); 657 hclge_rm_vport_all_mac_table(vport, true, HCLGE_MAC_ADDR_MC); 658 hclge_rm_vport_all_vlan_table(vport, true); 659 } else { 660 dev_warn(&hdev->pdev->dev, "Invalid cmd(%u)\n", 661 msg_cmd->subcode); 662 } 663 } 664 665 void hclge_mbx_handler(struct hclge_dev *hdev) 666 { 667 struct hclge_cmq_ring *crq = &hdev->hw.cmq.crq; 668 struct hclge_respond_to_vf_msg resp_msg; 669 struct hclge_mbx_vf_to_pf_cmd *req; 670 struct hclge_vport *vport; 671 struct hclge_desc *desc; 672 bool is_del = false; 673 unsigned int flag; 674 int ret = 0; 675 676 memset(&resp_msg, 0, sizeof(resp_msg)); 677 /* handle all the mailbox requests in the queue */ 678 while (!hclge_cmd_crq_empty(&hdev->hw)) { 679 if (test_bit(HCLGE_STATE_CMD_DISABLE, &hdev->state)) { 680 dev_warn(&hdev->pdev->dev, 681 "command queue needs re-initializing\n"); 682 return; 683 } 684 685 desc = &crq->desc[crq->next_to_use]; 686 req = (struct hclge_mbx_vf_to_pf_cmd *)desc->data; 687 688 flag = le16_to_cpu(crq->desc[crq->next_to_use].flag); 689 if (unlikely(!hnae3_get_bit(flag, HCLGE_CMDQ_RX_OUTVLD_B))) { 690 dev_warn(&hdev->pdev->dev, 691 "dropped invalid mailbox message, code = %u\n", 692 req->msg.code); 693 694 /* dropping/not processing this invalid message */ 695 crq->desc[crq->next_to_use].flag = 0; 696 hclge_mbx_ring_ptr_move_crq(crq); 697 continue; 698 } 699 700 vport = &hdev->vport[req->mbx_src_vfid]; 701 702 trace_hclge_pf_mbx_get(hdev, req); 703 704 switch (req->msg.code) { 705 case HCLGE_MBX_MAP_RING_TO_VECTOR: 706 ret = hclge_map_unmap_ring_to_vf_vector(vport, true, 707 req); 708 break; 709 case HCLGE_MBX_UNMAP_RING_TO_VECTOR: 710 ret = hclge_map_unmap_ring_to_vf_vector(vport, false, 711 req); 712 break; 713 case HCLGE_MBX_SET_PROMISC_MODE: 714 ret = hclge_set_vf_promisc_mode(vport, req); 715 if (ret) 716 dev_err(&hdev->pdev->dev, 717 "PF fail(%d) to set VF promisc mode\n", 718 ret); 719 break; 720 case HCLGE_MBX_SET_UNICAST: 721 ret = hclge_set_vf_uc_mac_addr(vport, req); 722 if (ret) 723 dev_err(&hdev->pdev->dev, 724 "PF fail(%d) to set VF UC MAC Addr\n", 725 ret); 726 break; 727 case HCLGE_MBX_SET_MULTICAST: 728 ret = hclge_set_vf_mc_mac_addr(vport, req); 729 if (ret) 730 dev_err(&hdev->pdev->dev, 731 "PF fail(%d) to set VF MC MAC Addr\n", 732 ret); 733 break; 734 case HCLGE_MBX_SET_VLAN: 735 ret = hclge_set_vf_vlan_cfg(vport, req, &resp_msg); 736 if (ret) 737 dev_err(&hdev->pdev->dev, 738 "PF failed(%d) to config VF's VLAN\n", 739 ret); 740 break; 741 case HCLGE_MBX_SET_ALIVE: 742 ret = hclge_set_vf_alive(vport, req); 743 if (ret) 744 dev_err(&hdev->pdev->dev, 745 "PF failed(%d) to set VF's ALIVE\n", 746 ret); 747 break; 748 case HCLGE_MBX_GET_QINFO: 749 hclge_get_vf_queue_info(vport, &resp_msg); 750 break; 751 case HCLGE_MBX_GET_QDEPTH: 752 hclge_get_vf_queue_depth(vport, &resp_msg); 753 break; 754 case HCLGE_MBX_GET_TCINFO: 755 hclge_get_vf_tcinfo(vport, &resp_msg); 756 break; 757 case HCLGE_MBX_GET_LINK_STATUS: 758 ret = hclge_get_link_info(vport, req); 759 if (ret) 760 dev_err(&hdev->pdev->dev, 761 "failed to inform link stat to VF, ret = %d\n", 762 ret); 763 break; 764 case HCLGE_MBX_QUEUE_RESET: 765 hclge_mbx_reset_vf_queue(vport, req); 766 break; 767 case HCLGE_MBX_RESET: 768 ret = hclge_reset_vf(vport); 769 break; 770 case HCLGE_MBX_KEEP_ALIVE: 771 hclge_vf_keep_alive(vport); 772 break; 773 case HCLGE_MBX_SET_MTU: 774 ret = hclge_set_vf_mtu(vport, req); 775 if (ret) 776 dev_err(&hdev->pdev->dev, 777 "VF fail(%d) to set mtu\n", ret); 778 break; 779 case HCLGE_MBX_GET_QID_IN_PF: 780 hclge_get_queue_id_in_pf(vport, req, &resp_msg); 781 break; 782 case HCLGE_MBX_GET_RSS_KEY: 783 hclge_get_rss_key(vport, req, &resp_msg); 784 break; 785 case HCLGE_MBX_GET_LINK_MODE: 786 hclge_get_link_mode(vport, req); 787 break; 788 case HCLGE_MBX_GET_VF_FLR_STATUS: 789 case HCLGE_MBX_VF_UNINIT: 790 is_del = req->msg.code == HCLGE_MBX_VF_UNINIT; 791 hclge_rm_vport_all_mac_table(vport, is_del, 792 HCLGE_MAC_ADDR_UC); 793 hclge_rm_vport_all_mac_table(vport, is_del, 794 HCLGE_MAC_ADDR_MC); 795 hclge_rm_vport_all_vlan_table(vport, is_del); 796 break; 797 case HCLGE_MBX_GET_MEDIA_TYPE: 798 hclge_get_vf_media_type(vport, &resp_msg); 799 break; 800 case HCLGE_MBX_PUSH_LINK_STATUS: 801 hclge_handle_link_change_event(hdev, req); 802 break; 803 case HCLGE_MBX_GET_MAC_ADDR: 804 hclge_get_vf_mac_addr(vport, &resp_msg); 805 break; 806 case HCLGE_MBX_NCSI_ERROR: 807 hclge_handle_ncsi_error(hdev); 808 break; 809 case HCLGE_MBX_HANDLE_VF_TBL: 810 hclge_handle_vf_tbl(vport, req); 811 break; 812 default: 813 dev_err(&hdev->pdev->dev, 814 "un-supported mailbox message, code = %u\n", 815 req->msg.code); 816 break; 817 } 818 819 /* PF driver should not reply IMP */ 820 if (hnae3_get_bit(req->mbx_need_resp, HCLGE_MBX_NEED_RESP_B) && 821 req->msg.code < HCLGE_MBX_GET_VF_FLR_STATUS) { 822 resp_msg.status = ret; 823 hclge_gen_resp_to_vf(vport, req, &resp_msg); 824 } 825 826 crq->desc[crq->next_to_use].flag = 0; 827 hclge_mbx_ring_ptr_move_crq(crq); 828 829 /* reinitialize ret after complete the mbx message processing */ 830 ret = 0; 831 } 832 833 /* Write back CMDQ_RQ header pointer, M7 need this pointer */ 834 hclge_write_dev(&hdev->hw, HCLGE_NIC_CRQ_HEAD_REG, crq->next_to_use); 835 } 836