1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 // Copyright (c) 2016-2017 Hisilicon Limited. 3 4 #ifndef __HNAE3_H 5 #define __HNAE3_H 6 7 /* Names used in this framework: 8 * ae handle (handle): 9 * a set of queues provided by AE 10 * ring buffer queue (rbq): 11 * the channel between upper layer and the AE, can do tx and rx 12 * ring: 13 * a tx or rx channel within a rbq 14 * ring description (desc): 15 * an element in the ring with packet information 16 * buffer: 17 * a memory region referred by desc with the full packet payload 18 * 19 * "num" means a static number set as a parameter, "count" mean a dynamic 20 * number set while running 21 * "cb" means control block 22 */ 23 24 #include <linux/acpi.h> 25 #include <linux/dcbnl.h> 26 #include <linux/delay.h> 27 #include <linux/device.h> 28 #include <linux/ethtool.h> 29 #include <linux/module.h> 30 #include <linux/netdevice.h> 31 #include <linux/pci.h> 32 #include <linux/types.h> 33 34 #define HNAE3_MOD_VERSION "1.0" 35 36 #define HNAE3_MIN_VECTOR_NUM 2 /* first one for misc, another for IO */ 37 38 /* Device version */ 39 #define HNAE3_DEVICE_VERSION_V1 0x00020 40 #define HNAE3_DEVICE_VERSION_V2 0x00021 41 #define HNAE3_DEVICE_VERSION_V3 0x00030 42 43 #define HNAE3_PCI_REVISION_BIT_SIZE 8 44 45 /* Device IDs */ 46 #define HNAE3_DEV_ID_GE 0xA220 47 #define HNAE3_DEV_ID_25GE 0xA221 48 #define HNAE3_DEV_ID_25GE_RDMA 0xA222 49 #define HNAE3_DEV_ID_25GE_RDMA_MACSEC 0xA223 50 #define HNAE3_DEV_ID_50GE_RDMA 0xA224 51 #define HNAE3_DEV_ID_50GE_RDMA_MACSEC 0xA225 52 #define HNAE3_DEV_ID_100G_RDMA_MACSEC 0xA226 53 #define HNAE3_DEV_ID_200G_RDMA 0xA228 54 #define HNAE3_DEV_ID_VF 0xA22E 55 #define HNAE3_DEV_ID_RDMA_DCB_PFC_VF 0xA22F 56 57 #define HNAE3_CLASS_NAME_SIZE 16 58 59 #define HNAE3_DEV_INITED_B 0x0 60 #define HNAE3_DEV_SUPPORT_ROCE_B 0x1 61 #define HNAE3_DEV_SUPPORT_DCB_B 0x2 62 #define HNAE3_KNIC_CLIENT_INITED_B 0x3 63 #define HNAE3_UNIC_CLIENT_INITED_B 0x4 64 #define HNAE3_ROCE_CLIENT_INITED_B 0x5 65 66 #define HNAE3_DEV_SUPPORT_ROCE_DCB_BITS (BIT(HNAE3_DEV_SUPPORT_DCB_B) |\ 67 BIT(HNAE3_DEV_SUPPORT_ROCE_B)) 68 69 #define hnae3_dev_roce_supported(hdev) \ 70 hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B) 71 72 #define hnae3_dev_dcb_supported(hdev) \ 73 hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_DCB_B) 74 75 enum HNAE3_DEV_CAP_BITS { 76 HNAE3_DEV_SUPPORT_FD_B, 77 HNAE3_DEV_SUPPORT_GRO_B, 78 HNAE3_DEV_SUPPORT_FEC_B, 79 HNAE3_DEV_SUPPORT_UDP_GSO_B, 80 HNAE3_DEV_SUPPORT_QB_B, 81 HNAE3_DEV_SUPPORT_FD_FORWARD_TC_B, 82 HNAE3_DEV_SUPPORT_PTP_B, 83 HNAE3_DEV_SUPPORT_INT_QL_B, 84 HNAE3_DEV_SUPPORT_SIMPLE_BD_B, 85 HNAE3_DEV_SUPPORT_TX_PUSH_B, 86 HNAE3_DEV_SUPPORT_PHY_IMP_B, 87 HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B, 88 HNAE3_DEV_SUPPORT_HW_PAD_B, 89 HNAE3_DEV_SUPPORT_STASH_B, 90 }; 91 92 #define hnae3_dev_fd_supported(hdev) \ 93 test_bit(HNAE3_DEV_SUPPORT_FD_B, (hdev)->ae_dev->caps) 94 95 #define hnae3_dev_gro_supported(hdev) \ 96 test_bit(HNAE3_DEV_SUPPORT_GRO_B, (hdev)->ae_dev->caps) 97 98 #define hnae3_dev_fec_supported(hdev) \ 99 test_bit(HNAE3_DEV_SUPPORT_FEC_B, (hdev)->ae_dev->caps) 100 101 #define hnae3_dev_udp_gso_supported(hdev) \ 102 test_bit(HNAE3_DEV_SUPPORT_UDP_GSO_B, (hdev)->ae_dev->caps) 103 104 #define hnae3_dev_qb_supported(hdev) \ 105 test_bit(HNAE3_DEV_SUPPORT_QB_B, (hdev)->ae_dev->caps) 106 107 #define hnae3_dev_fd_forward_tc_supported(hdev) \ 108 test_bit(HNAE3_DEV_SUPPORT_FD_FORWARD_TC_B, (hdev)->ae_dev->caps) 109 110 #define hnae3_dev_ptp_supported(hdev) \ 111 test_bit(HNAE3_DEV_SUPPORT_PTP_B, (hdev)->ae_dev->caps) 112 113 #define hnae3_dev_int_ql_supported(hdev) \ 114 test_bit(HNAE3_DEV_SUPPORT_INT_QL_B, (hdev)->ae_dev->caps) 115 116 #define hnae3_dev_simple_bd_supported(hdev) \ 117 test_bit(HNAE3_DEV_SUPPORT_SIMPLE_BD_B, (hdev)->ae_dev->caps) 118 119 #define hnae3_dev_tx_push_supported(hdev) \ 120 test_bit(HNAE3_DEV_SUPPORT_TX_PUSH_B, (hdev)->ae_dev->caps) 121 122 #define hnae3_dev_phy_imp_supported(hdev) \ 123 test_bit(HNAE3_DEV_SUPPORT_PHY_IMP_B, (hdev)->ae_dev->caps) 124 125 #define hnae3_dev_tqp_txrx_indep_supported(hdev) \ 126 test_bit(HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B, (hdev)->ae_dev->caps) 127 128 #define hnae3_dev_hw_pad_supported(hdev) \ 129 test_bit(HNAE3_DEV_SUPPORT_HW_PAD_B, (hdev)->ae_dev->caps) 130 131 #define hnae3_dev_stash_supported(hdev) \ 132 test_bit(HNAE3_DEV_SUPPORT_STASH_B, (hdev)->ae_dev->caps) 133 134 #define hnae3_ae_dev_tqp_txrx_indep_supported(ae_dev) \ 135 test_bit(HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B, (ae_dev)->caps) 136 137 #define ring_ptr_move_fw(ring, p) \ 138 ((ring)->p = ((ring)->p + 1) % (ring)->desc_num) 139 #define ring_ptr_move_bw(ring, p) \ 140 ((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num) 141 142 enum hns_desc_type { 143 DESC_TYPE_UNKNOWN, 144 DESC_TYPE_SKB, 145 DESC_TYPE_FRAGLIST_SKB, 146 DESC_TYPE_PAGE, 147 }; 148 149 struct hnae3_handle; 150 151 struct hnae3_queue { 152 void __iomem *io_base; 153 struct hnae3_ae_algo *ae_algo; 154 struct hnae3_handle *handle; 155 int tqp_index; /* index in a handle */ 156 u32 buf_size; /* size for hnae_desc->addr, preset by AE */ 157 u16 tx_desc_num; /* total number of tx desc */ 158 u16 rx_desc_num; /* total number of rx desc */ 159 }; 160 161 struct hns3_mac_stats { 162 u64 tx_pause_cnt; 163 u64 rx_pause_cnt; 164 }; 165 166 /* hnae3 loop mode */ 167 enum hnae3_loop { 168 HNAE3_LOOP_APP, 169 HNAE3_LOOP_SERIAL_SERDES, 170 HNAE3_LOOP_PARALLEL_SERDES, 171 HNAE3_LOOP_PHY, 172 HNAE3_LOOP_NONE, 173 }; 174 175 enum hnae3_client_type { 176 HNAE3_CLIENT_KNIC, 177 HNAE3_CLIENT_ROCE, 178 }; 179 180 /* mac media type */ 181 enum hnae3_media_type { 182 HNAE3_MEDIA_TYPE_UNKNOWN, 183 HNAE3_MEDIA_TYPE_FIBER, 184 HNAE3_MEDIA_TYPE_COPPER, 185 HNAE3_MEDIA_TYPE_BACKPLANE, 186 HNAE3_MEDIA_TYPE_NONE, 187 }; 188 189 /* must be consistent with definition in firmware */ 190 enum hnae3_module_type { 191 HNAE3_MODULE_TYPE_UNKNOWN = 0x00, 192 HNAE3_MODULE_TYPE_FIBRE_LR = 0x01, 193 HNAE3_MODULE_TYPE_FIBRE_SR = 0x02, 194 HNAE3_MODULE_TYPE_AOC = 0x03, 195 HNAE3_MODULE_TYPE_CR = 0x04, 196 HNAE3_MODULE_TYPE_KR = 0x05, 197 HNAE3_MODULE_TYPE_TP = 0x06, 198 }; 199 200 enum hnae3_fec_mode { 201 HNAE3_FEC_AUTO = 0, 202 HNAE3_FEC_BASER, 203 HNAE3_FEC_RS, 204 HNAE3_FEC_USER_DEF, 205 }; 206 207 enum hnae3_reset_notify_type { 208 HNAE3_UP_CLIENT, 209 HNAE3_DOWN_CLIENT, 210 HNAE3_INIT_CLIENT, 211 HNAE3_UNINIT_CLIENT, 212 }; 213 214 enum hnae3_hw_error_type { 215 HNAE3_PPU_POISON_ERROR, 216 HNAE3_CMDQ_ECC_ERROR, 217 HNAE3_IMP_RD_POISON_ERROR, 218 HNAE3_ROCEE_AXI_RESP_ERROR, 219 }; 220 221 enum hnae3_reset_type { 222 HNAE3_VF_RESET, 223 HNAE3_VF_FUNC_RESET, 224 HNAE3_VF_PF_FUNC_RESET, 225 HNAE3_VF_FULL_RESET, 226 HNAE3_FLR_RESET, 227 HNAE3_FUNC_RESET, 228 HNAE3_GLOBAL_RESET, 229 HNAE3_IMP_RESET, 230 HNAE3_UNKNOWN_RESET, 231 HNAE3_NONE_RESET, 232 HNAE3_MAX_RESET, 233 }; 234 235 enum hnae3_port_base_vlan_state { 236 HNAE3_PORT_BASE_VLAN_DISABLE, 237 HNAE3_PORT_BASE_VLAN_ENABLE, 238 HNAE3_PORT_BASE_VLAN_MODIFY, 239 HNAE3_PORT_BASE_VLAN_NOCHANGE, 240 }; 241 242 struct hnae3_vector_info { 243 u8 __iomem *io_addr; 244 int vector; 245 }; 246 247 #define HNAE3_RING_TYPE_B 0 248 #define HNAE3_RING_TYPE_TX 0 249 #define HNAE3_RING_TYPE_RX 1 250 #define HNAE3_RING_GL_IDX_S 0 251 #define HNAE3_RING_GL_IDX_M GENMASK(1, 0) 252 #define HNAE3_RING_GL_RX 0 253 #define HNAE3_RING_GL_TX 1 254 255 #define HNAE3_FW_VERSION_BYTE3_SHIFT 24 256 #define HNAE3_FW_VERSION_BYTE3_MASK GENMASK(31, 24) 257 #define HNAE3_FW_VERSION_BYTE2_SHIFT 16 258 #define HNAE3_FW_VERSION_BYTE2_MASK GENMASK(23, 16) 259 #define HNAE3_FW_VERSION_BYTE1_SHIFT 8 260 #define HNAE3_FW_VERSION_BYTE1_MASK GENMASK(15, 8) 261 #define HNAE3_FW_VERSION_BYTE0_SHIFT 0 262 #define HNAE3_FW_VERSION_BYTE0_MASK GENMASK(7, 0) 263 264 struct hnae3_ring_chain_node { 265 struct hnae3_ring_chain_node *next; 266 u32 tqp_index; 267 u32 flag; 268 u32 int_gl_idx; 269 }; 270 271 #define HNAE3_IS_TX_RING(node) \ 272 (((node)->flag & (1 << HNAE3_RING_TYPE_B)) == HNAE3_RING_TYPE_TX) 273 274 /* device specification info from firmware */ 275 struct hnae3_dev_specs { 276 u32 mac_entry_num; /* number of mac-vlan table entry */ 277 u32 mng_entry_num; /* number of manager table entry */ 278 u32 max_tm_rate; 279 u16 rss_ind_tbl_size; 280 u16 rss_key_size; 281 u16 int_ql_max; /* max value of interrupt coalesce based on INT_QL */ 282 u16 max_int_gl; /* max value of interrupt coalesce based on INT_GL */ 283 u8 max_non_tso_bd_num; /* max BD number of one non-TSO packet */ 284 }; 285 286 struct hnae3_client_ops { 287 int (*init_instance)(struct hnae3_handle *handle); 288 void (*uninit_instance)(struct hnae3_handle *handle, bool reset); 289 void (*link_status_change)(struct hnae3_handle *handle, bool state); 290 int (*setup_tc)(struct hnae3_handle *handle, u8 tc); 291 int (*reset_notify)(struct hnae3_handle *handle, 292 enum hnae3_reset_notify_type type); 293 void (*process_hw_error)(struct hnae3_handle *handle, 294 enum hnae3_hw_error_type); 295 }; 296 297 #define HNAE3_CLIENT_NAME_LENGTH 16 298 struct hnae3_client { 299 char name[HNAE3_CLIENT_NAME_LENGTH]; 300 unsigned long state; 301 enum hnae3_client_type type; 302 const struct hnae3_client_ops *ops; 303 struct list_head node; 304 }; 305 306 #define HNAE3_DEV_CAPS_MAX_NUM 96 307 struct hnae3_ae_dev { 308 struct pci_dev *pdev; 309 const struct hnae3_ae_ops *ops; 310 struct list_head node; 311 u32 flag; 312 unsigned long hw_err_reset_req; 313 struct hnae3_dev_specs dev_specs; 314 u32 dev_version; 315 unsigned long caps[BITS_TO_LONGS(HNAE3_DEV_CAPS_MAX_NUM)]; 316 void *priv; 317 }; 318 319 /* This struct defines the operation on the handle. 320 * 321 * init_ae_dev(): (mandatory) 322 * Get PF configure from pci_dev and initialize PF hardware 323 * uninit_ae_dev() 324 * Disable PF device and release PF resource 325 * register_client 326 * Register client to ae_dev 327 * unregister_client() 328 * Unregister client from ae_dev 329 * start() 330 * Enable the hardware 331 * stop() 332 * Disable the hardware 333 * start_client() 334 * Inform the hclge that client has been started 335 * stop_client() 336 * Inform the hclge that client has been stopped 337 * get_status() 338 * Get the carrier state of the back channel of the handle, 1 for ok, 0 for 339 * non-ok 340 * get_ksettings_an_result() 341 * Get negotiation status,speed and duplex 342 * get_media_type() 343 * Get media type of MAC 344 * check_port_speed() 345 * Check target speed whether is supported 346 * adjust_link() 347 * Adjust link status 348 * set_loopback() 349 * Set loopback 350 * set_promisc_mode 351 * Set promisc mode 352 * request_update_promisc_mode 353 * request to hclge(vf) to update promisc mode 354 * set_mtu() 355 * set mtu 356 * get_pauseparam() 357 * get tx and rx of pause frame use 358 * set_pauseparam() 359 * set tx and rx of pause frame use 360 * set_autoneg() 361 * set auto autonegotiation of pause frame use 362 * get_autoneg() 363 * get auto autonegotiation of pause frame use 364 * restart_autoneg() 365 * restart autonegotiation 366 * halt_autoneg() 367 * halt/resume autonegotiation when autonegotiation on 368 * get_coalesce_usecs() 369 * get usecs to delay a TX interrupt after a packet is sent 370 * get_rx_max_coalesced_frames() 371 * get Maximum number of packets to be sent before a TX interrupt. 372 * set_coalesce_usecs() 373 * set usecs to delay a TX interrupt after a packet is sent 374 * set_coalesce_frames() 375 * set Maximum number of packets to be sent before a TX interrupt. 376 * get_mac_addr() 377 * get mac address 378 * set_mac_addr() 379 * set mac address 380 * add_uc_addr 381 * Add unicast addr to mac table 382 * rm_uc_addr 383 * Remove unicast addr from mac table 384 * set_mc_addr() 385 * Set multicast address 386 * add_mc_addr 387 * Add multicast address to mac table 388 * rm_mc_addr 389 * Remove multicast address from mac table 390 * update_stats() 391 * Update Old network device statistics 392 * get_mac_stats() 393 * get mac pause statistics including tx_cnt and rx_cnt 394 * get_ethtool_stats() 395 * Get ethtool network device statistics 396 * get_strings() 397 * Get a set of strings that describe the requested objects 398 * get_sset_count() 399 * Get number of strings that @get_strings will write 400 * update_led_status() 401 * Update the led status 402 * set_led_id() 403 * Set led id 404 * get_regs() 405 * Get regs dump 406 * get_regs_len() 407 * Get the len of the regs dump 408 * get_rss_key_size() 409 * Get rss key size 410 * get_rss_indir_size() 411 * Get rss indirection table size 412 * get_rss() 413 * Get rss table 414 * set_rss() 415 * Set rss table 416 * get_tc_size() 417 * Get tc size of handle 418 * get_vector() 419 * Get vector number and vector information 420 * put_vector() 421 * Put the vector in hdev 422 * map_ring_to_vector() 423 * Map rings to vector 424 * unmap_ring_from_vector() 425 * Unmap rings from vector 426 * reset_queue() 427 * Reset queue 428 * get_fw_version() 429 * Get firmware version 430 * get_mdix_mode() 431 * Get media typr of phy 432 * enable_vlan_filter() 433 * Enable vlan filter 434 * set_vlan_filter() 435 * Set vlan filter config of Ports 436 * set_vf_vlan_filter() 437 * Set vlan filter config of vf 438 * enable_hw_strip_rxvtag() 439 * Enable/disable hardware strip vlan tag of packets received 440 * set_gro_en 441 * Enable/disable HW GRO 442 * add_arfs_entry 443 * Check the 5-tuples of flow, and create flow director rule 444 * get_vf_config 445 * Get the VF configuration setting by the host 446 * set_vf_link_state 447 * Set VF link status 448 * set_vf_spoofchk 449 * Enable/disable spoof check for specified vf 450 * set_vf_trust 451 * Enable/disable trust for specified vf, if the vf being trusted, then 452 * it can enable promisc mode 453 * set_vf_rate 454 * Set the max tx rate of specified vf. 455 * set_vf_mac 456 * Configure the default MAC for specified VF 457 * get_module_eeprom 458 * Get the optical module eeprom info. 459 */ 460 struct hnae3_ae_ops { 461 int (*init_ae_dev)(struct hnae3_ae_dev *ae_dev); 462 void (*uninit_ae_dev)(struct hnae3_ae_dev *ae_dev); 463 void (*flr_prepare)(struct hnae3_ae_dev *ae_dev); 464 void (*flr_done)(struct hnae3_ae_dev *ae_dev); 465 int (*init_client_instance)(struct hnae3_client *client, 466 struct hnae3_ae_dev *ae_dev); 467 void (*uninit_client_instance)(struct hnae3_client *client, 468 struct hnae3_ae_dev *ae_dev); 469 int (*start)(struct hnae3_handle *handle); 470 void (*stop)(struct hnae3_handle *handle); 471 int (*client_start)(struct hnae3_handle *handle); 472 void (*client_stop)(struct hnae3_handle *handle); 473 int (*get_status)(struct hnae3_handle *handle); 474 void (*get_ksettings_an_result)(struct hnae3_handle *handle, 475 u8 *auto_neg, u32 *speed, u8 *duplex); 476 477 int (*cfg_mac_speed_dup_h)(struct hnae3_handle *handle, int speed, 478 u8 duplex); 479 480 void (*get_media_type)(struct hnae3_handle *handle, u8 *media_type, 481 u8 *module_type); 482 int (*check_port_speed)(struct hnae3_handle *handle, u32 speed); 483 void (*get_fec)(struct hnae3_handle *handle, u8 *fec_ability, 484 u8 *fec_mode); 485 int (*set_fec)(struct hnae3_handle *handle, u32 fec_mode); 486 void (*adjust_link)(struct hnae3_handle *handle, int speed, int duplex); 487 int (*set_loopback)(struct hnae3_handle *handle, 488 enum hnae3_loop loop_mode, bool en); 489 490 int (*set_promisc_mode)(struct hnae3_handle *handle, bool en_uc_pmc, 491 bool en_mc_pmc); 492 void (*request_update_promisc_mode)(struct hnae3_handle *handle); 493 int (*set_mtu)(struct hnae3_handle *handle, int new_mtu); 494 495 void (*get_pauseparam)(struct hnae3_handle *handle, 496 u32 *auto_neg, u32 *rx_en, u32 *tx_en); 497 int (*set_pauseparam)(struct hnae3_handle *handle, 498 u32 auto_neg, u32 rx_en, u32 tx_en); 499 500 int (*set_autoneg)(struct hnae3_handle *handle, bool enable); 501 int (*get_autoneg)(struct hnae3_handle *handle); 502 int (*restart_autoneg)(struct hnae3_handle *handle); 503 int (*halt_autoneg)(struct hnae3_handle *handle, bool halt); 504 505 void (*get_coalesce_usecs)(struct hnae3_handle *handle, 506 u32 *tx_usecs, u32 *rx_usecs); 507 void (*get_rx_max_coalesced_frames)(struct hnae3_handle *handle, 508 u32 *tx_frames, u32 *rx_frames); 509 int (*set_coalesce_usecs)(struct hnae3_handle *handle, u32 timeout); 510 int (*set_coalesce_frames)(struct hnae3_handle *handle, 511 u32 coalesce_frames); 512 void (*get_coalesce_range)(struct hnae3_handle *handle, 513 u32 *tx_frames_low, u32 *rx_frames_low, 514 u32 *tx_frames_high, u32 *rx_frames_high, 515 u32 *tx_usecs_low, u32 *rx_usecs_low, 516 u32 *tx_usecs_high, u32 *rx_usecs_high); 517 518 void (*get_mac_addr)(struct hnae3_handle *handle, u8 *p); 519 int (*set_mac_addr)(struct hnae3_handle *handle, void *p, 520 bool is_first); 521 int (*do_ioctl)(struct hnae3_handle *handle, 522 struct ifreq *ifr, int cmd); 523 int (*add_uc_addr)(struct hnae3_handle *handle, 524 const unsigned char *addr); 525 int (*rm_uc_addr)(struct hnae3_handle *handle, 526 const unsigned char *addr); 527 int (*set_mc_addr)(struct hnae3_handle *handle, void *addr); 528 int (*add_mc_addr)(struct hnae3_handle *handle, 529 const unsigned char *addr); 530 int (*rm_mc_addr)(struct hnae3_handle *handle, 531 const unsigned char *addr); 532 void (*set_tso_stats)(struct hnae3_handle *handle, int enable); 533 void (*update_stats)(struct hnae3_handle *handle, 534 struct net_device_stats *net_stats); 535 void (*get_stats)(struct hnae3_handle *handle, u64 *data); 536 void (*get_mac_stats)(struct hnae3_handle *handle, 537 struct hns3_mac_stats *mac_stats); 538 void (*get_strings)(struct hnae3_handle *handle, 539 u32 stringset, u8 *data); 540 int (*get_sset_count)(struct hnae3_handle *handle, int stringset); 541 542 void (*get_regs)(struct hnae3_handle *handle, u32 *version, 543 void *data); 544 int (*get_regs_len)(struct hnae3_handle *handle); 545 546 u32 (*get_rss_key_size)(struct hnae3_handle *handle); 547 u32 (*get_rss_indir_size)(struct hnae3_handle *handle); 548 int (*get_rss)(struct hnae3_handle *handle, u32 *indir, u8 *key, 549 u8 *hfunc); 550 int (*set_rss)(struct hnae3_handle *handle, const u32 *indir, 551 const u8 *key, const u8 hfunc); 552 int (*set_rss_tuple)(struct hnae3_handle *handle, 553 struct ethtool_rxnfc *cmd); 554 int (*get_rss_tuple)(struct hnae3_handle *handle, 555 struct ethtool_rxnfc *cmd); 556 557 int (*get_tc_size)(struct hnae3_handle *handle); 558 559 int (*get_vector)(struct hnae3_handle *handle, u16 vector_num, 560 struct hnae3_vector_info *vector_info); 561 int (*put_vector)(struct hnae3_handle *handle, int vector_num); 562 int (*map_ring_to_vector)(struct hnae3_handle *handle, 563 int vector_num, 564 struct hnae3_ring_chain_node *vr_chain); 565 int (*unmap_ring_from_vector)(struct hnae3_handle *handle, 566 int vector_num, 567 struct hnae3_ring_chain_node *vr_chain); 568 569 int (*reset_queue)(struct hnae3_handle *handle, u16 queue_id); 570 u32 (*get_fw_version)(struct hnae3_handle *handle); 571 void (*get_mdix_mode)(struct hnae3_handle *handle, 572 u8 *tp_mdix_ctrl, u8 *tp_mdix); 573 574 void (*enable_vlan_filter)(struct hnae3_handle *handle, bool enable); 575 int (*set_vlan_filter)(struct hnae3_handle *handle, __be16 proto, 576 u16 vlan_id, bool is_kill); 577 int (*set_vf_vlan_filter)(struct hnae3_handle *handle, int vfid, 578 u16 vlan, u8 qos, __be16 proto); 579 int (*enable_hw_strip_rxvtag)(struct hnae3_handle *handle, bool enable); 580 void (*reset_event)(struct pci_dev *pdev, struct hnae3_handle *handle); 581 enum hnae3_reset_type (*get_reset_level)(struct hnae3_ae_dev *ae_dev, 582 unsigned long *addr); 583 void (*set_default_reset_request)(struct hnae3_ae_dev *ae_dev, 584 enum hnae3_reset_type rst_type); 585 void (*get_channels)(struct hnae3_handle *handle, 586 struct ethtool_channels *ch); 587 void (*get_tqps_and_rss_info)(struct hnae3_handle *h, 588 u16 *alloc_tqps, u16 *max_rss_size); 589 int (*set_channels)(struct hnae3_handle *handle, u32 new_tqps_num, 590 bool rxfh_configured); 591 void (*get_flowctrl_adv)(struct hnae3_handle *handle, 592 u32 *flowctrl_adv); 593 int (*set_led_id)(struct hnae3_handle *handle, 594 enum ethtool_phys_id_state status); 595 void (*get_link_mode)(struct hnae3_handle *handle, 596 unsigned long *supported, 597 unsigned long *advertising); 598 int (*add_fd_entry)(struct hnae3_handle *handle, 599 struct ethtool_rxnfc *cmd); 600 int (*del_fd_entry)(struct hnae3_handle *handle, 601 struct ethtool_rxnfc *cmd); 602 void (*del_all_fd_entries)(struct hnae3_handle *handle, 603 bool clear_list); 604 int (*get_fd_rule_cnt)(struct hnae3_handle *handle, 605 struct ethtool_rxnfc *cmd); 606 int (*get_fd_rule_info)(struct hnae3_handle *handle, 607 struct ethtool_rxnfc *cmd); 608 int (*get_fd_all_rules)(struct hnae3_handle *handle, 609 struct ethtool_rxnfc *cmd, u32 *rule_locs); 610 void (*enable_fd)(struct hnae3_handle *handle, bool enable); 611 int (*add_arfs_entry)(struct hnae3_handle *handle, u16 queue_id, 612 u16 flow_id, struct flow_keys *fkeys); 613 int (*dbg_run_cmd)(struct hnae3_handle *handle, const char *cmd_buf); 614 pci_ers_result_t (*handle_hw_ras_error)(struct hnae3_ae_dev *ae_dev); 615 bool (*get_hw_reset_stat)(struct hnae3_handle *handle); 616 bool (*ae_dev_resetting)(struct hnae3_handle *handle); 617 unsigned long (*ae_dev_reset_cnt)(struct hnae3_handle *handle); 618 int (*set_gro_en)(struct hnae3_handle *handle, bool enable); 619 u16 (*get_global_queue_id)(struct hnae3_handle *handle, u16 queue_id); 620 void (*set_timer_task)(struct hnae3_handle *handle, bool enable); 621 int (*mac_connect_phy)(struct hnae3_handle *handle); 622 void (*mac_disconnect_phy)(struct hnae3_handle *handle); 623 int (*get_vf_config)(struct hnae3_handle *handle, int vf, 624 struct ifla_vf_info *ivf); 625 int (*set_vf_link_state)(struct hnae3_handle *handle, int vf, 626 int link_state); 627 int (*set_vf_spoofchk)(struct hnae3_handle *handle, int vf, 628 bool enable); 629 int (*set_vf_trust)(struct hnae3_handle *handle, int vf, bool enable); 630 int (*set_vf_rate)(struct hnae3_handle *handle, int vf, 631 int min_tx_rate, int max_tx_rate, bool force); 632 int (*set_vf_mac)(struct hnae3_handle *handle, int vf, u8 *p); 633 int (*get_module_eeprom)(struct hnae3_handle *handle, u32 offset, 634 u32 len, u8 *data); 635 bool (*get_cmdq_stat)(struct hnae3_handle *handle); 636 }; 637 638 struct hnae3_dcb_ops { 639 /* IEEE 802.1Qaz std */ 640 int (*ieee_getets)(struct hnae3_handle *, struct ieee_ets *); 641 int (*ieee_setets)(struct hnae3_handle *, struct ieee_ets *); 642 int (*ieee_getpfc)(struct hnae3_handle *, struct ieee_pfc *); 643 int (*ieee_setpfc)(struct hnae3_handle *, struct ieee_pfc *); 644 645 /* DCBX configuration */ 646 u8 (*getdcbx)(struct hnae3_handle *); 647 u8 (*setdcbx)(struct hnae3_handle *, u8); 648 649 int (*setup_tc)(struct hnae3_handle *, u8, u8 *); 650 }; 651 652 struct hnae3_ae_algo { 653 const struct hnae3_ae_ops *ops; 654 struct list_head node; 655 const struct pci_device_id *pdev_id_table; 656 }; 657 658 #define HNAE3_INT_NAME_LEN 32 659 #define HNAE3_ITR_COUNTDOWN_START 100 660 661 struct hnae3_tc_info { 662 u16 tqp_offset; /* TQP offset from base TQP */ 663 u16 tqp_count; /* Total TQPs */ 664 u8 tc; /* TC index */ 665 bool enable; /* If this TC is enable or not */ 666 }; 667 668 #define HNAE3_MAX_TC 8 669 #define HNAE3_MAX_USER_PRIO 8 670 struct hnae3_knic_private_info { 671 struct net_device *netdev; /* Set by KNIC client when init instance */ 672 u16 rss_size; /* Allocated RSS queues */ 673 u16 req_rss_size; 674 u16 rx_buf_len; 675 u16 num_tx_desc; 676 u16 num_rx_desc; 677 678 u8 num_tc; /* Total number of enabled TCs */ 679 u8 prio_tc[HNAE3_MAX_USER_PRIO]; /* TC indexed by prio */ 680 struct hnae3_tc_info tc_info[HNAE3_MAX_TC]; /* Idx of array is HW TC */ 681 682 u16 num_tqps; /* total number of TQPs in this handle */ 683 struct hnae3_queue **tqp; /* array base of all TQPs in this instance */ 684 const struct hnae3_dcb_ops *dcb_ops; 685 686 u16 int_rl_setting; 687 enum pkt_hash_types rss_type; 688 }; 689 690 struct hnae3_roce_private_info { 691 struct net_device *netdev; 692 void __iomem *roce_io_base; 693 void __iomem *roce_mem_base; 694 int base_vector; 695 int num_vectors; 696 697 /* The below attributes defined for RoCE client, hnae3 gives 698 * initial values to them, and RoCE client can modify and use 699 * them. 700 */ 701 unsigned long reset_state; 702 unsigned long instance_state; 703 unsigned long state; 704 }; 705 706 #define HNAE3_SUPPORT_APP_LOOPBACK BIT(0) 707 #define HNAE3_SUPPORT_PHY_LOOPBACK BIT(1) 708 #define HNAE3_SUPPORT_SERDES_SERIAL_LOOPBACK BIT(2) 709 #define HNAE3_SUPPORT_VF BIT(3) 710 #define HNAE3_SUPPORT_SERDES_PARALLEL_LOOPBACK BIT(4) 711 712 #define HNAE3_USER_UPE BIT(0) /* unicast promisc enabled by user */ 713 #define HNAE3_USER_MPE BIT(1) /* mulitcast promisc enabled by user */ 714 #define HNAE3_BPE BIT(2) /* broadcast promisc enable */ 715 #define HNAE3_OVERFLOW_UPE BIT(3) /* unicast mac vlan overflow */ 716 #define HNAE3_OVERFLOW_MPE BIT(4) /* multicast mac vlan overflow */ 717 #define HNAE3_VLAN_FLTR BIT(5) /* enable vlan filter */ 718 #define HNAE3_UPE (HNAE3_USER_UPE | HNAE3_OVERFLOW_UPE) 719 #define HNAE3_MPE (HNAE3_USER_MPE | HNAE3_OVERFLOW_MPE) 720 721 struct hnae3_handle { 722 struct hnae3_client *client; 723 struct pci_dev *pdev; 724 void *priv; 725 struct hnae3_ae_algo *ae_algo; /* the class who provides this handle */ 726 u64 flags; /* Indicate the capabilities for this handle */ 727 728 union { 729 struct net_device *netdev; /* first member */ 730 struct hnae3_knic_private_info kinfo; 731 struct hnae3_roce_private_info rinfo; 732 }; 733 734 u32 numa_node_mask; /* for multi-chip support */ 735 736 enum hnae3_port_base_vlan_state port_base_vlan_state; 737 738 u8 netdev_flags; 739 struct dentry *hnae3_dbgfs; 740 741 /* Network interface message level enabled bits */ 742 u32 msg_enable; 743 }; 744 745 #define hnae3_set_field(origin, mask, shift, val) \ 746 do { \ 747 (origin) &= (~(mask)); \ 748 (origin) |= ((val) << (shift)) & (mask); \ 749 } while (0) 750 #define hnae3_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift)) 751 752 #define hnae3_set_bit(origin, shift, val) \ 753 hnae3_set_field((origin), (0x1 << (shift)), (shift), (val)) 754 #define hnae3_get_bit(origin, shift) \ 755 hnae3_get_field((origin), (0x1 << (shift)), (shift)) 756 757 int hnae3_register_ae_dev(struct hnae3_ae_dev *ae_dev); 758 void hnae3_unregister_ae_dev(struct hnae3_ae_dev *ae_dev); 759 760 void hnae3_unregister_ae_algo(struct hnae3_ae_algo *ae_algo); 761 void hnae3_register_ae_algo(struct hnae3_ae_algo *ae_algo); 762 763 void hnae3_unregister_client(struct hnae3_client *client); 764 int hnae3_register_client(struct hnae3_client *client); 765 766 void hnae3_set_client_init_flag(struct hnae3_client *client, 767 struct hnae3_ae_dev *ae_dev, 768 unsigned int inited); 769 #endif 770