1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 // Copyright (c) 2016-2017 Hisilicon Limited. 3 4 #ifndef __HNAE3_H 5 #define __HNAE3_H 6 7 /* Names used in this framework: 8 * ae handle (handle): 9 * a set of queues provided by AE 10 * ring buffer queue (rbq): 11 * the channel between upper layer and the AE, can do tx and rx 12 * ring: 13 * a tx or rx channel within a rbq 14 * ring description (desc): 15 * an element in the ring with packet information 16 * buffer: 17 * a memory region referred by desc with the full packet payload 18 * 19 * "num" means a static number set as a parameter, "count" mean a dynamic 20 * number set while running 21 * "cb" means control block 22 */ 23 24 #include <linux/acpi.h> 25 #include <linux/dcbnl.h> 26 #include <linux/delay.h> 27 #include <linux/device.h> 28 #include <linux/ethtool.h> 29 #include <linux/module.h> 30 #include <linux/netdevice.h> 31 #include <linux/pci.h> 32 #include <linux/types.h> 33 34 #define HNAE3_MOD_VERSION "1.0" 35 36 #define HNAE3_MIN_VECTOR_NUM 2 /* first one for misc, another for IO */ 37 38 /* Device version */ 39 #define HNAE3_DEVICE_VERSION_V1 0x00020 40 #define HNAE3_DEVICE_VERSION_V2 0x00021 41 #define HNAE3_DEVICE_VERSION_V3 0x00030 42 43 #define HNAE3_PCI_REVISION_BIT_SIZE 8 44 45 /* Device IDs */ 46 #define HNAE3_DEV_ID_GE 0xA220 47 #define HNAE3_DEV_ID_25GE 0xA221 48 #define HNAE3_DEV_ID_25GE_RDMA 0xA222 49 #define HNAE3_DEV_ID_25GE_RDMA_MACSEC 0xA223 50 #define HNAE3_DEV_ID_50GE_RDMA 0xA224 51 #define HNAE3_DEV_ID_50GE_RDMA_MACSEC 0xA225 52 #define HNAE3_DEV_ID_100G_RDMA_MACSEC 0xA226 53 #define HNAE3_DEV_ID_200G_RDMA 0xA228 54 #define HNAE3_DEV_ID_VF 0xA22E 55 #define HNAE3_DEV_ID_RDMA_DCB_PFC_VF 0xA22F 56 57 #define HNAE3_CLASS_NAME_SIZE 16 58 59 #define HNAE3_DEV_INITED_B 0x0 60 #define HNAE3_DEV_SUPPORT_ROCE_B 0x1 61 #define HNAE3_DEV_SUPPORT_DCB_B 0x2 62 #define HNAE3_KNIC_CLIENT_INITED_B 0x3 63 #define HNAE3_UNIC_CLIENT_INITED_B 0x4 64 #define HNAE3_ROCE_CLIENT_INITED_B 0x5 65 66 #define HNAE3_DEV_SUPPORT_ROCE_DCB_BITS (BIT(HNAE3_DEV_SUPPORT_DCB_B) |\ 67 BIT(HNAE3_DEV_SUPPORT_ROCE_B)) 68 69 #define hnae3_dev_roce_supported(hdev) \ 70 hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B) 71 72 #define hnae3_dev_dcb_supported(hdev) \ 73 hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_DCB_B) 74 75 enum HNAE3_DEV_CAP_BITS { 76 HNAE3_DEV_SUPPORT_FD_B, 77 HNAE3_DEV_SUPPORT_GRO_B, 78 HNAE3_DEV_SUPPORT_FEC_B, 79 HNAE3_DEV_SUPPORT_UDP_GSO_B, 80 HNAE3_DEV_SUPPORT_QB_B, 81 HNAE3_DEV_SUPPORT_FD_FORWARD_TC_B, 82 HNAE3_DEV_SUPPORT_PTP_B, 83 HNAE3_DEV_SUPPORT_INT_QL_B, 84 HNAE3_DEV_SUPPORT_HW_TX_CSUM_B, 85 HNAE3_DEV_SUPPORT_TX_PUSH_B, 86 HNAE3_DEV_SUPPORT_PHY_IMP_B, 87 HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B, 88 HNAE3_DEV_SUPPORT_HW_PAD_B, 89 HNAE3_DEV_SUPPORT_STASH_B, 90 HNAE3_DEV_SUPPORT_UDP_TUNNEL_CSUM_B, 91 }; 92 93 #define hnae3_dev_fd_supported(hdev) \ 94 test_bit(HNAE3_DEV_SUPPORT_FD_B, (hdev)->ae_dev->caps) 95 96 #define hnae3_dev_gro_supported(hdev) \ 97 test_bit(HNAE3_DEV_SUPPORT_GRO_B, (hdev)->ae_dev->caps) 98 99 #define hnae3_dev_fec_supported(hdev) \ 100 test_bit(HNAE3_DEV_SUPPORT_FEC_B, (hdev)->ae_dev->caps) 101 102 #define hnae3_dev_udp_gso_supported(hdev) \ 103 test_bit(HNAE3_DEV_SUPPORT_UDP_GSO_B, (hdev)->ae_dev->caps) 104 105 #define hnae3_dev_qb_supported(hdev) \ 106 test_bit(HNAE3_DEV_SUPPORT_QB_B, (hdev)->ae_dev->caps) 107 108 #define hnae3_dev_fd_forward_tc_supported(hdev) \ 109 test_bit(HNAE3_DEV_SUPPORT_FD_FORWARD_TC_B, (hdev)->ae_dev->caps) 110 111 #define hnae3_dev_ptp_supported(hdev) \ 112 test_bit(HNAE3_DEV_SUPPORT_PTP_B, (hdev)->ae_dev->caps) 113 114 #define hnae3_dev_int_ql_supported(hdev) \ 115 test_bit(HNAE3_DEV_SUPPORT_INT_QL_B, (hdev)->ae_dev->caps) 116 117 #define hnae3_dev_hw_csum_supported(hdev) \ 118 test_bit(HNAE3_DEV_SUPPORT_HW_TX_CSUM_B, (hdev)->ae_dev->caps) 119 120 #define hnae3_dev_tx_push_supported(hdev) \ 121 test_bit(HNAE3_DEV_SUPPORT_TX_PUSH_B, (hdev)->ae_dev->caps) 122 123 #define hnae3_dev_phy_imp_supported(hdev) \ 124 test_bit(HNAE3_DEV_SUPPORT_PHY_IMP_B, (hdev)->ae_dev->caps) 125 126 #define hnae3_dev_tqp_txrx_indep_supported(hdev) \ 127 test_bit(HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B, (hdev)->ae_dev->caps) 128 129 #define hnae3_dev_hw_pad_supported(hdev) \ 130 test_bit(HNAE3_DEV_SUPPORT_HW_PAD_B, (hdev)->ae_dev->caps) 131 132 #define hnae3_dev_stash_supported(hdev) \ 133 test_bit(HNAE3_DEV_SUPPORT_STASH_B, (hdev)->ae_dev->caps) 134 135 #define hnae3_ae_dev_tqp_txrx_indep_supported(ae_dev) \ 136 test_bit(HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B, (ae_dev)->caps) 137 138 #define ring_ptr_move_fw(ring, p) \ 139 ((ring)->p = ((ring)->p + 1) % (ring)->desc_num) 140 #define ring_ptr_move_bw(ring, p) \ 141 ((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num) 142 143 enum hns_desc_type { 144 DESC_TYPE_UNKNOWN, 145 DESC_TYPE_SKB, 146 DESC_TYPE_FRAGLIST_SKB, 147 DESC_TYPE_PAGE, 148 }; 149 150 struct hnae3_handle; 151 152 struct hnae3_queue { 153 void __iomem *io_base; 154 struct hnae3_ae_algo *ae_algo; 155 struct hnae3_handle *handle; 156 int tqp_index; /* index in a handle */ 157 u32 buf_size; /* size for hnae_desc->addr, preset by AE */ 158 u16 tx_desc_num; /* total number of tx desc */ 159 u16 rx_desc_num; /* total number of rx desc */ 160 }; 161 162 struct hns3_mac_stats { 163 u64 tx_pause_cnt; 164 u64 rx_pause_cnt; 165 }; 166 167 /* hnae3 loop mode */ 168 enum hnae3_loop { 169 HNAE3_LOOP_APP, 170 HNAE3_LOOP_SERIAL_SERDES, 171 HNAE3_LOOP_PARALLEL_SERDES, 172 HNAE3_LOOP_PHY, 173 HNAE3_LOOP_NONE, 174 }; 175 176 enum hnae3_client_type { 177 HNAE3_CLIENT_KNIC, 178 HNAE3_CLIENT_ROCE, 179 }; 180 181 /* mac media type */ 182 enum hnae3_media_type { 183 HNAE3_MEDIA_TYPE_UNKNOWN, 184 HNAE3_MEDIA_TYPE_FIBER, 185 HNAE3_MEDIA_TYPE_COPPER, 186 HNAE3_MEDIA_TYPE_BACKPLANE, 187 HNAE3_MEDIA_TYPE_NONE, 188 }; 189 190 /* must be consistent with definition in firmware */ 191 enum hnae3_module_type { 192 HNAE3_MODULE_TYPE_UNKNOWN = 0x00, 193 HNAE3_MODULE_TYPE_FIBRE_LR = 0x01, 194 HNAE3_MODULE_TYPE_FIBRE_SR = 0x02, 195 HNAE3_MODULE_TYPE_AOC = 0x03, 196 HNAE3_MODULE_TYPE_CR = 0x04, 197 HNAE3_MODULE_TYPE_KR = 0x05, 198 HNAE3_MODULE_TYPE_TP = 0x06, 199 }; 200 201 enum hnae3_fec_mode { 202 HNAE3_FEC_AUTO = 0, 203 HNAE3_FEC_BASER, 204 HNAE3_FEC_RS, 205 HNAE3_FEC_USER_DEF, 206 }; 207 208 enum hnae3_reset_notify_type { 209 HNAE3_UP_CLIENT, 210 HNAE3_DOWN_CLIENT, 211 HNAE3_INIT_CLIENT, 212 HNAE3_UNINIT_CLIENT, 213 }; 214 215 enum hnae3_hw_error_type { 216 HNAE3_PPU_POISON_ERROR, 217 HNAE3_CMDQ_ECC_ERROR, 218 HNAE3_IMP_RD_POISON_ERROR, 219 HNAE3_ROCEE_AXI_RESP_ERROR, 220 }; 221 222 enum hnae3_reset_type { 223 HNAE3_VF_RESET, 224 HNAE3_VF_FUNC_RESET, 225 HNAE3_VF_PF_FUNC_RESET, 226 HNAE3_VF_FULL_RESET, 227 HNAE3_FLR_RESET, 228 HNAE3_FUNC_RESET, 229 HNAE3_GLOBAL_RESET, 230 HNAE3_IMP_RESET, 231 HNAE3_UNKNOWN_RESET, 232 HNAE3_NONE_RESET, 233 HNAE3_MAX_RESET, 234 }; 235 236 enum hnae3_port_base_vlan_state { 237 HNAE3_PORT_BASE_VLAN_DISABLE, 238 HNAE3_PORT_BASE_VLAN_ENABLE, 239 HNAE3_PORT_BASE_VLAN_MODIFY, 240 HNAE3_PORT_BASE_VLAN_NOCHANGE, 241 }; 242 243 struct hnae3_vector_info { 244 u8 __iomem *io_addr; 245 int vector; 246 }; 247 248 #define HNAE3_RING_TYPE_B 0 249 #define HNAE3_RING_TYPE_TX 0 250 #define HNAE3_RING_TYPE_RX 1 251 #define HNAE3_RING_GL_IDX_S 0 252 #define HNAE3_RING_GL_IDX_M GENMASK(1, 0) 253 #define HNAE3_RING_GL_RX 0 254 #define HNAE3_RING_GL_TX 1 255 256 #define HNAE3_FW_VERSION_BYTE3_SHIFT 24 257 #define HNAE3_FW_VERSION_BYTE3_MASK GENMASK(31, 24) 258 #define HNAE3_FW_VERSION_BYTE2_SHIFT 16 259 #define HNAE3_FW_VERSION_BYTE2_MASK GENMASK(23, 16) 260 #define HNAE3_FW_VERSION_BYTE1_SHIFT 8 261 #define HNAE3_FW_VERSION_BYTE1_MASK GENMASK(15, 8) 262 #define HNAE3_FW_VERSION_BYTE0_SHIFT 0 263 #define HNAE3_FW_VERSION_BYTE0_MASK GENMASK(7, 0) 264 265 struct hnae3_ring_chain_node { 266 struct hnae3_ring_chain_node *next; 267 u32 tqp_index; 268 u32 flag; 269 u32 int_gl_idx; 270 }; 271 272 #define HNAE3_IS_TX_RING(node) \ 273 (((node)->flag & (1 << HNAE3_RING_TYPE_B)) == HNAE3_RING_TYPE_TX) 274 275 /* device specification info from firmware */ 276 struct hnae3_dev_specs { 277 u32 mac_entry_num; /* number of mac-vlan table entry */ 278 u32 mng_entry_num; /* number of manager table entry */ 279 u32 max_tm_rate; 280 u16 rss_ind_tbl_size; 281 u16 rss_key_size; 282 u16 int_ql_max; /* max value of interrupt coalesce based on INT_QL */ 283 u16 max_int_gl; /* max value of interrupt coalesce based on INT_GL */ 284 u8 max_non_tso_bd_num; /* max BD number of one non-TSO packet */ 285 }; 286 287 struct hnae3_client_ops { 288 int (*init_instance)(struct hnae3_handle *handle); 289 void (*uninit_instance)(struct hnae3_handle *handle, bool reset); 290 void (*link_status_change)(struct hnae3_handle *handle, bool state); 291 int (*setup_tc)(struct hnae3_handle *handle, u8 tc); 292 int (*reset_notify)(struct hnae3_handle *handle, 293 enum hnae3_reset_notify_type type); 294 void (*process_hw_error)(struct hnae3_handle *handle, 295 enum hnae3_hw_error_type); 296 }; 297 298 #define HNAE3_CLIENT_NAME_LENGTH 16 299 struct hnae3_client { 300 char name[HNAE3_CLIENT_NAME_LENGTH]; 301 unsigned long state; 302 enum hnae3_client_type type; 303 const struct hnae3_client_ops *ops; 304 struct list_head node; 305 }; 306 307 #define HNAE3_DEV_CAPS_MAX_NUM 96 308 struct hnae3_ae_dev { 309 struct pci_dev *pdev; 310 const struct hnae3_ae_ops *ops; 311 struct list_head node; 312 u32 flag; 313 unsigned long hw_err_reset_req; 314 struct hnae3_dev_specs dev_specs; 315 u32 dev_version; 316 unsigned long caps[BITS_TO_LONGS(HNAE3_DEV_CAPS_MAX_NUM)]; 317 void *priv; 318 }; 319 320 /* This struct defines the operation on the handle. 321 * 322 * init_ae_dev(): (mandatory) 323 * Get PF configure from pci_dev and initialize PF hardware 324 * uninit_ae_dev() 325 * Disable PF device and release PF resource 326 * register_client 327 * Register client to ae_dev 328 * unregister_client() 329 * Unregister client from ae_dev 330 * start() 331 * Enable the hardware 332 * stop() 333 * Disable the hardware 334 * start_client() 335 * Inform the hclge that client has been started 336 * stop_client() 337 * Inform the hclge that client has been stopped 338 * get_status() 339 * Get the carrier state of the back channel of the handle, 1 for ok, 0 for 340 * non-ok 341 * get_ksettings_an_result() 342 * Get negotiation status,speed and duplex 343 * get_media_type() 344 * Get media type of MAC 345 * check_port_speed() 346 * Check target speed whether is supported 347 * adjust_link() 348 * Adjust link status 349 * set_loopback() 350 * Set loopback 351 * set_promisc_mode 352 * Set promisc mode 353 * request_update_promisc_mode 354 * request to hclge(vf) to update promisc mode 355 * set_mtu() 356 * set mtu 357 * get_pauseparam() 358 * get tx and rx of pause frame use 359 * set_pauseparam() 360 * set tx and rx of pause frame use 361 * set_autoneg() 362 * set auto autonegotiation of pause frame use 363 * get_autoneg() 364 * get auto autonegotiation of pause frame use 365 * restart_autoneg() 366 * restart autonegotiation 367 * halt_autoneg() 368 * halt/resume autonegotiation when autonegotiation on 369 * get_coalesce_usecs() 370 * get usecs to delay a TX interrupt after a packet is sent 371 * get_rx_max_coalesced_frames() 372 * get Maximum number of packets to be sent before a TX interrupt. 373 * set_coalesce_usecs() 374 * set usecs to delay a TX interrupt after a packet is sent 375 * set_coalesce_frames() 376 * set Maximum number of packets to be sent before a TX interrupt. 377 * get_mac_addr() 378 * get mac address 379 * set_mac_addr() 380 * set mac address 381 * add_uc_addr 382 * Add unicast addr to mac table 383 * rm_uc_addr 384 * Remove unicast addr from mac table 385 * set_mc_addr() 386 * Set multicast address 387 * add_mc_addr 388 * Add multicast address to mac table 389 * rm_mc_addr 390 * Remove multicast address from mac table 391 * update_stats() 392 * Update Old network device statistics 393 * get_mac_stats() 394 * get mac pause statistics including tx_cnt and rx_cnt 395 * get_ethtool_stats() 396 * Get ethtool network device statistics 397 * get_strings() 398 * Get a set of strings that describe the requested objects 399 * get_sset_count() 400 * Get number of strings that @get_strings will write 401 * update_led_status() 402 * Update the led status 403 * set_led_id() 404 * Set led id 405 * get_regs() 406 * Get regs dump 407 * get_regs_len() 408 * Get the len of the regs dump 409 * get_rss_key_size() 410 * Get rss key size 411 * get_rss_indir_size() 412 * Get rss indirection table size 413 * get_rss() 414 * Get rss table 415 * set_rss() 416 * Set rss table 417 * get_tc_size() 418 * Get tc size of handle 419 * get_vector() 420 * Get vector number and vector information 421 * put_vector() 422 * Put the vector in hdev 423 * map_ring_to_vector() 424 * Map rings to vector 425 * unmap_ring_from_vector() 426 * Unmap rings from vector 427 * reset_queue() 428 * Reset queue 429 * get_fw_version() 430 * Get firmware version 431 * get_mdix_mode() 432 * Get media typr of phy 433 * enable_vlan_filter() 434 * Enable vlan filter 435 * set_vlan_filter() 436 * Set vlan filter config of Ports 437 * set_vf_vlan_filter() 438 * Set vlan filter config of vf 439 * enable_hw_strip_rxvtag() 440 * Enable/disable hardware strip vlan tag of packets received 441 * set_gro_en 442 * Enable/disable HW GRO 443 * add_arfs_entry 444 * Check the 5-tuples of flow, and create flow director rule 445 * get_vf_config 446 * Get the VF configuration setting by the host 447 * set_vf_link_state 448 * Set VF link status 449 * set_vf_spoofchk 450 * Enable/disable spoof check for specified vf 451 * set_vf_trust 452 * Enable/disable trust for specified vf, if the vf being trusted, then 453 * it can enable promisc mode 454 * set_vf_rate 455 * Set the max tx rate of specified vf. 456 * set_vf_mac 457 * Configure the default MAC for specified VF 458 * get_module_eeprom 459 * Get the optical module eeprom info. 460 */ 461 struct hnae3_ae_ops { 462 int (*init_ae_dev)(struct hnae3_ae_dev *ae_dev); 463 void (*uninit_ae_dev)(struct hnae3_ae_dev *ae_dev); 464 void (*flr_prepare)(struct hnae3_ae_dev *ae_dev); 465 void (*flr_done)(struct hnae3_ae_dev *ae_dev); 466 int (*init_client_instance)(struct hnae3_client *client, 467 struct hnae3_ae_dev *ae_dev); 468 void (*uninit_client_instance)(struct hnae3_client *client, 469 struct hnae3_ae_dev *ae_dev); 470 int (*start)(struct hnae3_handle *handle); 471 void (*stop)(struct hnae3_handle *handle); 472 int (*client_start)(struct hnae3_handle *handle); 473 void (*client_stop)(struct hnae3_handle *handle); 474 int (*get_status)(struct hnae3_handle *handle); 475 void (*get_ksettings_an_result)(struct hnae3_handle *handle, 476 u8 *auto_neg, u32 *speed, u8 *duplex); 477 478 int (*cfg_mac_speed_dup_h)(struct hnae3_handle *handle, int speed, 479 u8 duplex); 480 481 void (*get_media_type)(struct hnae3_handle *handle, u8 *media_type, 482 u8 *module_type); 483 int (*check_port_speed)(struct hnae3_handle *handle, u32 speed); 484 void (*get_fec)(struct hnae3_handle *handle, u8 *fec_ability, 485 u8 *fec_mode); 486 int (*set_fec)(struct hnae3_handle *handle, u32 fec_mode); 487 void (*adjust_link)(struct hnae3_handle *handle, int speed, int duplex); 488 int (*set_loopback)(struct hnae3_handle *handle, 489 enum hnae3_loop loop_mode, bool en); 490 491 int (*set_promisc_mode)(struct hnae3_handle *handle, bool en_uc_pmc, 492 bool en_mc_pmc); 493 void (*request_update_promisc_mode)(struct hnae3_handle *handle); 494 int (*set_mtu)(struct hnae3_handle *handle, int new_mtu); 495 496 void (*get_pauseparam)(struct hnae3_handle *handle, 497 u32 *auto_neg, u32 *rx_en, u32 *tx_en); 498 int (*set_pauseparam)(struct hnae3_handle *handle, 499 u32 auto_neg, u32 rx_en, u32 tx_en); 500 501 int (*set_autoneg)(struct hnae3_handle *handle, bool enable); 502 int (*get_autoneg)(struct hnae3_handle *handle); 503 int (*restart_autoneg)(struct hnae3_handle *handle); 504 int (*halt_autoneg)(struct hnae3_handle *handle, bool halt); 505 506 void (*get_coalesce_usecs)(struct hnae3_handle *handle, 507 u32 *tx_usecs, u32 *rx_usecs); 508 void (*get_rx_max_coalesced_frames)(struct hnae3_handle *handle, 509 u32 *tx_frames, u32 *rx_frames); 510 int (*set_coalesce_usecs)(struct hnae3_handle *handle, u32 timeout); 511 int (*set_coalesce_frames)(struct hnae3_handle *handle, 512 u32 coalesce_frames); 513 void (*get_coalesce_range)(struct hnae3_handle *handle, 514 u32 *tx_frames_low, u32 *rx_frames_low, 515 u32 *tx_frames_high, u32 *rx_frames_high, 516 u32 *tx_usecs_low, u32 *rx_usecs_low, 517 u32 *tx_usecs_high, u32 *rx_usecs_high); 518 519 void (*get_mac_addr)(struct hnae3_handle *handle, u8 *p); 520 int (*set_mac_addr)(struct hnae3_handle *handle, void *p, 521 bool is_first); 522 int (*do_ioctl)(struct hnae3_handle *handle, 523 struct ifreq *ifr, int cmd); 524 int (*add_uc_addr)(struct hnae3_handle *handle, 525 const unsigned char *addr); 526 int (*rm_uc_addr)(struct hnae3_handle *handle, 527 const unsigned char *addr); 528 int (*set_mc_addr)(struct hnae3_handle *handle, void *addr); 529 int (*add_mc_addr)(struct hnae3_handle *handle, 530 const unsigned char *addr); 531 int (*rm_mc_addr)(struct hnae3_handle *handle, 532 const unsigned char *addr); 533 void (*set_tso_stats)(struct hnae3_handle *handle, int enable); 534 void (*update_stats)(struct hnae3_handle *handle, 535 struct net_device_stats *net_stats); 536 void (*get_stats)(struct hnae3_handle *handle, u64 *data); 537 void (*get_mac_stats)(struct hnae3_handle *handle, 538 struct hns3_mac_stats *mac_stats); 539 void (*get_strings)(struct hnae3_handle *handle, 540 u32 stringset, u8 *data); 541 int (*get_sset_count)(struct hnae3_handle *handle, int stringset); 542 543 void (*get_regs)(struct hnae3_handle *handle, u32 *version, 544 void *data); 545 int (*get_regs_len)(struct hnae3_handle *handle); 546 547 u32 (*get_rss_key_size)(struct hnae3_handle *handle); 548 u32 (*get_rss_indir_size)(struct hnae3_handle *handle); 549 int (*get_rss)(struct hnae3_handle *handle, u32 *indir, u8 *key, 550 u8 *hfunc); 551 int (*set_rss)(struct hnae3_handle *handle, const u32 *indir, 552 const u8 *key, const u8 hfunc); 553 int (*set_rss_tuple)(struct hnae3_handle *handle, 554 struct ethtool_rxnfc *cmd); 555 int (*get_rss_tuple)(struct hnae3_handle *handle, 556 struct ethtool_rxnfc *cmd); 557 558 int (*get_tc_size)(struct hnae3_handle *handle); 559 560 int (*get_vector)(struct hnae3_handle *handle, u16 vector_num, 561 struct hnae3_vector_info *vector_info); 562 int (*put_vector)(struct hnae3_handle *handle, int vector_num); 563 int (*map_ring_to_vector)(struct hnae3_handle *handle, 564 int vector_num, 565 struct hnae3_ring_chain_node *vr_chain); 566 int (*unmap_ring_from_vector)(struct hnae3_handle *handle, 567 int vector_num, 568 struct hnae3_ring_chain_node *vr_chain); 569 570 int (*reset_queue)(struct hnae3_handle *handle, u16 queue_id); 571 u32 (*get_fw_version)(struct hnae3_handle *handle); 572 void (*get_mdix_mode)(struct hnae3_handle *handle, 573 u8 *tp_mdix_ctrl, u8 *tp_mdix); 574 575 void (*enable_vlan_filter)(struct hnae3_handle *handle, bool enable); 576 int (*set_vlan_filter)(struct hnae3_handle *handle, __be16 proto, 577 u16 vlan_id, bool is_kill); 578 int (*set_vf_vlan_filter)(struct hnae3_handle *handle, int vfid, 579 u16 vlan, u8 qos, __be16 proto); 580 int (*enable_hw_strip_rxvtag)(struct hnae3_handle *handle, bool enable); 581 void (*reset_event)(struct pci_dev *pdev, struct hnae3_handle *handle); 582 enum hnae3_reset_type (*get_reset_level)(struct hnae3_ae_dev *ae_dev, 583 unsigned long *addr); 584 void (*set_default_reset_request)(struct hnae3_ae_dev *ae_dev, 585 enum hnae3_reset_type rst_type); 586 void (*get_channels)(struct hnae3_handle *handle, 587 struct ethtool_channels *ch); 588 void (*get_tqps_and_rss_info)(struct hnae3_handle *h, 589 u16 *alloc_tqps, u16 *max_rss_size); 590 int (*set_channels)(struct hnae3_handle *handle, u32 new_tqps_num, 591 bool rxfh_configured); 592 void (*get_flowctrl_adv)(struct hnae3_handle *handle, 593 u32 *flowctrl_adv); 594 int (*set_led_id)(struct hnae3_handle *handle, 595 enum ethtool_phys_id_state status); 596 void (*get_link_mode)(struct hnae3_handle *handle, 597 unsigned long *supported, 598 unsigned long *advertising); 599 int (*add_fd_entry)(struct hnae3_handle *handle, 600 struct ethtool_rxnfc *cmd); 601 int (*del_fd_entry)(struct hnae3_handle *handle, 602 struct ethtool_rxnfc *cmd); 603 void (*del_all_fd_entries)(struct hnae3_handle *handle, 604 bool clear_list); 605 int (*get_fd_rule_cnt)(struct hnae3_handle *handle, 606 struct ethtool_rxnfc *cmd); 607 int (*get_fd_rule_info)(struct hnae3_handle *handle, 608 struct ethtool_rxnfc *cmd); 609 int (*get_fd_all_rules)(struct hnae3_handle *handle, 610 struct ethtool_rxnfc *cmd, u32 *rule_locs); 611 void (*enable_fd)(struct hnae3_handle *handle, bool enable); 612 int (*add_arfs_entry)(struct hnae3_handle *handle, u16 queue_id, 613 u16 flow_id, struct flow_keys *fkeys); 614 int (*dbg_run_cmd)(struct hnae3_handle *handle, const char *cmd_buf); 615 pci_ers_result_t (*handle_hw_ras_error)(struct hnae3_ae_dev *ae_dev); 616 bool (*get_hw_reset_stat)(struct hnae3_handle *handle); 617 bool (*ae_dev_resetting)(struct hnae3_handle *handle); 618 unsigned long (*ae_dev_reset_cnt)(struct hnae3_handle *handle); 619 int (*set_gro_en)(struct hnae3_handle *handle, bool enable); 620 u16 (*get_global_queue_id)(struct hnae3_handle *handle, u16 queue_id); 621 void (*set_timer_task)(struct hnae3_handle *handle, bool enable); 622 int (*mac_connect_phy)(struct hnae3_handle *handle); 623 void (*mac_disconnect_phy)(struct hnae3_handle *handle); 624 int (*get_vf_config)(struct hnae3_handle *handle, int vf, 625 struct ifla_vf_info *ivf); 626 int (*set_vf_link_state)(struct hnae3_handle *handle, int vf, 627 int link_state); 628 int (*set_vf_spoofchk)(struct hnae3_handle *handle, int vf, 629 bool enable); 630 int (*set_vf_trust)(struct hnae3_handle *handle, int vf, bool enable); 631 int (*set_vf_rate)(struct hnae3_handle *handle, int vf, 632 int min_tx_rate, int max_tx_rate, bool force); 633 int (*set_vf_mac)(struct hnae3_handle *handle, int vf, u8 *p); 634 int (*get_module_eeprom)(struct hnae3_handle *handle, u32 offset, 635 u32 len, u8 *data); 636 bool (*get_cmdq_stat)(struct hnae3_handle *handle); 637 }; 638 639 struct hnae3_dcb_ops { 640 /* IEEE 802.1Qaz std */ 641 int (*ieee_getets)(struct hnae3_handle *, struct ieee_ets *); 642 int (*ieee_setets)(struct hnae3_handle *, struct ieee_ets *); 643 int (*ieee_getpfc)(struct hnae3_handle *, struct ieee_pfc *); 644 int (*ieee_setpfc)(struct hnae3_handle *, struct ieee_pfc *); 645 646 /* DCBX configuration */ 647 u8 (*getdcbx)(struct hnae3_handle *); 648 u8 (*setdcbx)(struct hnae3_handle *, u8); 649 650 int (*setup_tc)(struct hnae3_handle *, u8, u8 *); 651 }; 652 653 struct hnae3_ae_algo { 654 const struct hnae3_ae_ops *ops; 655 struct list_head node; 656 const struct pci_device_id *pdev_id_table; 657 }; 658 659 #define HNAE3_INT_NAME_LEN 32 660 #define HNAE3_ITR_COUNTDOWN_START 100 661 662 struct hnae3_tc_info { 663 u16 tqp_offset; /* TQP offset from base TQP */ 664 u16 tqp_count; /* Total TQPs */ 665 u8 tc; /* TC index */ 666 bool enable; /* If this TC is enable or not */ 667 }; 668 669 #define HNAE3_MAX_TC 8 670 #define HNAE3_MAX_USER_PRIO 8 671 struct hnae3_knic_private_info { 672 struct net_device *netdev; /* Set by KNIC client when init instance */ 673 u16 rss_size; /* Allocated RSS queues */ 674 u16 req_rss_size; 675 u16 rx_buf_len; 676 u16 num_tx_desc; 677 u16 num_rx_desc; 678 679 u8 num_tc; /* Total number of enabled TCs */ 680 u8 prio_tc[HNAE3_MAX_USER_PRIO]; /* TC indexed by prio */ 681 struct hnae3_tc_info tc_info[HNAE3_MAX_TC]; /* Idx of array is HW TC */ 682 683 u16 num_tqps; /* total number of TQPs in this handle */ 684 struct hnae3_queue **tqp; /* array base of all TQPs in this instance */ 685 const struct hnae3_dcb_ops *dcb_ops; 686 687 u16 int_rl_setting; 688 enum pkt_hash_types rss_type; 689 }; 690 691 struct hnae3_roce_private_info { 692 struct net_device *netdev; 693 void __iomem *roce_io_base; 694 void __iomem *roce_mem_base; 695 int base_vector; 696 int num_vectors; 697 698 /* The below attributes defined for RoCE client, hnae3 gives 699 * initial values to them, and RoCE client can modify and use 700 * them. 701 */ 702 unsigned long reset_state; 703 unsigned long instance_state; 704 unsigned long state; 705 }; 706 707 #define HNAE3_SUPPORT_APP_LOOPBACK BIT(0) 708 #define HNAE3_SUPPORT_PHY_LOOPBACK BIT(1) 709 #define HNAE3_SUPPORT_SERDES_SERIAL_LOOPBACK BIT(2) 710 #define HNAE3_SUPPORT_VF BIT(3) 711 #define HNAE3_SUPPORT_SERDES_PARALLEL_LOOPBACK BIT(4) 712 713 #define HNAE3_USER_UPE BIT(0) /* unicast promisc enabled by user */ 714 #define HNAE3_USER_MPE BIT(1) /* mulitcast promisc enabled by user */ 715 #define HNAE3_BPE BIT(2) /* broadcast promisc enable */ 716 #define HNAE3_OVERFLOW_UPE BIT(3) /* unicast mac vlan overflow */ 717 #define HNAE3_OVERFLOW_MPE BIT(4) /* multicast mac vlan overflow */ 718 #define HNAE3_VLAN_FLTR BIT(5) /* enable vlan filter */ 719 #define HNAE3_UPE (HNAE3_USER_UPE | HNAE3_OVERFLOW_UPE) 720 #define HNAE3_MPE (HNAE3_USER_MPE | HNAE3_OVERFLOW_MPE) 721 722 struct hnae3_handle { 723 struct hnae3_client *client; 724 struct pci_dev *pdev; 725 void *priv; 726 struct hnae3_ae_algo *ae_algo; /* the class who provides this handle */ 727 u64 flags; /* Indicate the capabilities for this handle */ 728 729 union { 730 struct net_device *netdev; /* first member */ 731 struct hnae3_knic_private_info kinfo; 732 struct hnae3_roce_private_info rinfo; 733 }; 734 735 u32 numa_node_mask; /* for multi-chip support */ 736 737 enum hnae3_port_base_vlan_state port_base_vlan_state; 738 739 u8 netdev_flags; 740 struct dentry *hnae3_dbgfs; 741 742 /* Network interface message level enabled bits */ 743 u32 msg_enable; 744 }; 745 746 #define hnae3_set_field(origin, mask, shift, val) \ 747 do { \ 748 (origin) &= (~(mask)); \ 749 (origin) |= ((val) << (shift)) & (mask); \ 750 } while (0) 751 #define hnae3_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift)) 752 753 #define hnae3_set_bit(origin, shift, val) \ 754 hnae3_set_field((origin), (0x1 << (shift)), (shift), (val)) 755 #define hnae3_get_bit(origin, shift) \ 756 hnae3_get_field((origin), (0x1 << (shift)), (shift)) 757 758 int hnae3_register_ae_dev(struct hnae3_ae_dev *ae_dev); 759 void hnae3_unregister_ae_dev(struct hnae3_ae_dev *ae_dev); 760 761 void hnae3_unregister_ae_algo(struct hnae3_ae_algo *ae_algo); 762 void hnae3_register_ae_algo(struct hnae3_ae_algo *ae_algo); 763 764 void hnae3_unregister_client(struct hnae3_client *client); 765 int hnae3_register_client(struct hnae3_client *client); 766 767 void hnae3_set_client_init_flag(struct hnae3_client *client, 768 struct hnae3_ae_dev *ae_dev, 769 unsigned int inited); 770 #endif 771