1 /* 2 * Copyright (c) 2014-2015 Hisilicon Limited. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 */ 9 10 #include <linux/device.h> 11 #include <linux/init.h> 12 #include <linux/interrupt.h> 13 #include <linux/kernel.h> 14 #include <linux/module.h> 15 #include <linux/netdevice.h> 16 #include <linux/mfd/syscon.h> 17 #include <linux/of.h> 18 #include <linux/of_address.h> 19 #include <linux/of_irq.h> 20 #include <linux/platform_device.h> 21 #include <linux/vmalloc.h> 22 23 #include "hns_dsaf_mac.h" 24 #include "hns_dsaf_main.h" 25 #include "hns_dsaf_ppe.h" 26 #include "hns_dsaf_rcb.h" 27 28 const char *g_dsaf_mode_match[DSAF_MODE_MAX] = { 29 [DSAF_MODE_DISABLE_2PORT_64VM] = "2port-64vf", 30 [DSAF_MODE_DISABLE_6PORT_0VM] = "6port-16rss", 31 [DSAF_MODE_DISABLE_6PORT_16VM] = "6port-16vf", 32 [DSAF_MODE_DISABLE_SP] = "single-port", 33 }; 34 35 int hns_dsaf_get_cfg(struct dsaf_device *dsaf_dev) 36 { 37 int ret, i; 38 u32 desc_num; 39 u32 buf_size; 40 u32 reset_offset = 0; 41 u32 res_idx = 0; 42 const char *mode_str; 43 struct regmap *syscon; 44 struct resource *res; 45 struct device_node *np = dsaf_dev->dev->of_node; 46 struct platform_device *pdev = to_platform_device(dsaf_dev->dev); 47 48 if (of_device_is_compatible(np, "hisilicon,hns-dsaf-v1")) 49 dsaf_dev->dsaf_ver = AE_VERSION_1; 50 else 51 dsaf_dev->dsaf_ver = AE_VERSION_2; 52 53 ret = of_property_read_string(np, "mode", &mode_str); 54 if (ret) { 55 dev_err(dsaf_dev->dev, "get dsaf mode fail, ret=%d!\n", ret); 56 return ret; 57 } 58 for (i = 0; i < DSAF_MODE_MAX; i++) { 59 if (g_dsaf_mode_match[i] && 60 !strcmp(mode_str, g_dsaf_mode_match[i])) 61 break; 62 } 63 if (i >= DSAF_MODE_MAX || 64 i == DSAF_MODE_INVALID || i == DSAF_MODE_ENABLE) { 65 dev_err(dsaf_dev->dev, 66 "%s prs mode str fail!\n", dsaf_dev->ae_dev.name); 67 return -EINVAL; 68 } 69 dsaf_dev->dsaf_mode = (enum dsaf_mode)i; 70 71 if (dsaf_dev->dsaf_mode > DSAF_MODE_ENABLE) 72 dsaf_dev->dsaf_en = HRD_DSAF_NO_DSAF_MODE; 73 else 74 dsaf_dev->dsaf_en = HRD_DSAF_MODE; 75 76 if ((i == DSAF_MODE_ENABLE_16VM) || 77 (i == DSAF_MODE_DISABLE_2PORT_8VM) || 78 (i == DSAF_MODE_DISABLE_6PORT_2VM)) 79 dsaf_dev->dsaf_tc_mode = HRD_DSAF_8TC_MODE; 80 else 81 dsaf_dev->dsaf_tc_mode = HRD_DSAF_4TC_MODE; 82 83 syscon = syscon_node_to_regmap( 84 of_parse_phandle(np, "subctrl-syscon", 0)); 85 if (IS_ERR_OR_NULL(syscon)) { 86 res = platform_get_resource(pdev, IORESOURCE_MEM, res_idx++); 87 if (!res) { 88 dev_err(dsaf_dev->dev, "subctrl info is needed!\n"); 89 return -ENOMEM; 90 } 91 dsaf_dev->sc_base = devm_ioremap_resource(&pdev->dev, res); 92 if (!dsaf_dev->sc_base) { 93 dev_err(dsaf_dev->dev, "subctrl can not map!\n"); 94 return -ENOMEM; 95 } 96 97 res = platform_get_resource(pdev, IORESOURCE_MEM, res_idx++); 98 if (!res) { 99 dev_err(dsaf_dev->dev, "serdes-ctrl info is needed!\n"); 100 return -ENOMEM; 101 } 102 dsaf_dev->sds_base = devm_ioremap_resource(&pdev->dev, res); 103 if (!dsaf_dev->sds_base) { 104 dev_err(dsaf_dev->dev, "serdes-ctrl can not map!\n"); 105 return -ENOMEM; 106 } 107 } else { 108 dsaf_dev->sub_ctrl = syscon; 109 } 110 111 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ppe-base"); 112 if (!res) { 113 res = platform_get_resource(pdev, IORESOURCE_MEM, res_idx++); 114 if (!res) { 115 dev_err(dsaf_dev->dev, "ppe-base info is needed!\n"); 116 return -ENOMEM; 117 } 118 } 119 dsaf_dev->ppe_base = devm_ioremap_resource(&pdev->dev, res); 120 if (!dsaf_dev->ppe_base) { 121 dev_err(dsaf_dev->dev, "ppe-base resource can not map!\n"); 122 return -ENOMEM; 123 } 124 dsaf_dev->ppe_paddr = res->start; 125 126 if (!HNS_DSAF_IS_DEBUG(dsaf_dev)) { 127 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 128 "dsaf-base"); 129 if (!res) { 130 res = platform_get_resource(pdev, IORESOURCE_MEM, 131 res_idx); 132 if (!res) { 133 dev_err(dsaf_dev->dev, 134 "dsaf-base info is needed!\n"); 135 return -ENOMEM; 136 } 137 } 138 dsaf_dev->io_base = devm_ioremap_resource(&pdev->dev, res); 139 if (!dsaf_dev->io_base) { 140 dev_err(dsaf_dev->dev, "dsaf-base resource can not map!\n"); 141 return -ENOMEM; 142 } 143 } 144 145 ret = of_property_read_u32(np, "desc-num", &desc_num); 146 if (ret < 0 || desc_num < HNS_DSAF_MIN_DESC_CNT || 147 desc_num > HNS_DSAF_MAX_DESC_CNT) { 148 dev_err(dsaf_dev->dev, "get desc-num(%d) fail, ret=%d!\n", 149 desc_num, ret); 150 goto unmap_base_addr; 151 } 152 dsaf_dev->desc_num = desc_num; 153 154 ret = of_property_read_u32(np, "reset-field-offset", &reset_offset); 155 if (ret < 0) { 156 dev_dbg(dsaf_dev->dev, 157 "get reset-field-offset fail, ret=%d!\r\n", ret); 158 } 159 dsaf_dev->reset_offset = reset_offset; 160 161 ret = of_property_read_u32(np, "buf-size", &buf_size); 162 if (ret < 0) { 163 dev_err(dsaf_dev->dev, 164 "get buf-size fail, ret=%d!\r\n", ret); 165 goto unmap_base_addr; 166 } 167 dsaf_dev->buf_size = buf_size; 168 169 dsaf_dev->buf_size_type = hns_rcb_buf_size2type(buf_size); 170 if (dsaf_dev->buf_size_type < 0) { 171 dev_err(dsaf_dev->dev, 172 "buf_size(%d) is wrong!\n", buf_size); 173 goto unmap_base_addr; 174 } 175 176 if (!dma_set_mask_and_coherent(dsaf_dev->dev, DMA_BIT_MASK(64ULL))) 177 dev_dbg(dsaf_dev->dev, "set mask to 64bit\n"); 178 else 179 dev_err(dsaf_dev->dev, "set mask to 64bit fail!\n"); 180 181 return 0; 182 183 unmap_base_addr: 184 if (dsaf_dev->io_base) 185 iounmap(dsaf_dev->io_base); 186 if (dsaf_dev->ppe_base) 187 iounmap(dsaf_dev->ppe_base); 188 if (dsaf_dev->sds_base) 189 iounmap(dsaf_dev->sds_base); 190 if (dsaf_dev->sc_base) 191 iounmap(dsaf_dev->sc_base); 192 return ret; 193 } 194 195 static void hns_dsaf_free_cfg(struct dsaf_device *dsaf_dev) 196 { 197 if (dsaf_dev->io_base) 198 iounmap(dsaf_dev->io_base); 199 200 if (dsaf_dev->ppe_base) 201 iounmap(dsaf_dev->ppe_base); 202 203 if (dsaf_dev->sds_base) 204 iounmap(dsaf_dev->sds_base); 205 206 if (dsaf_dev->sc_base) 207 iounmap(dsaf_dev->sc_base); 208 } 209 210 /** 211 * hns_dsaf_sbm_link_sram_init_en - config dsaf_sbm_init_en 212 * @dsaf_id: dsa fabric id 213 */ 214 static void hns_dsaf_sbm_link_sram_init_en(struct dsaf_device *dsaf_dev) 215 { 216 dsaf_set_dev_bit(dsaf_dev, DSAF_CFG_0_REG, DSAF_CFG_SBM_INIT_S, 1); 217 } 218 219 /** 220 * hns_dsaf_reg_cnt_clr_ce - config hns_dsaf_reg_cnt_clr_ce 221 * @dsaf_id: dsa fabric id 222 * @hns_dsaf_reg_cnt_clr_ce: config value 223 */ 224 static void 225 hns_dsaf_reg_cnt_clr_ce(struct dsaf_device *dsaf_dev, u32 reg_cnt_clr_ce) 226 { 227 dsaf_set_dev_bit(dsaf_dev, DSAF_DSA_REG_CNT_CLR_CE_REG, 228 DSAF_CNT_CLR_CE_S, reg_cnt_clr_ce); 229 } 230 231 /** 232 * hns_ppe_qid_cfg - config ppe qid 233 * @dsaf_id: dsa fabric id 234 * @pppe_qid_cfg: value array 235 */ 236 static void 237 hns_dsaf_ppe_qid_cfg(struct dsaf_device *dsaf_dev, u32 qid_cfg) 238 { 239 u32 i; 240 241 for (i = 0; i < DSAF_COMM_CHN; i++) { 242 dsaf_set_dev_field(dsaf_dev, 243 DSAF_PPE_QID_CFG_0_REG + 0x0004 * i, 244 DSAF_PPE_QID_CFG_M, DSAF_PPE_QID_CFG_S, 245 qid_cfg); 246 } 247 } 248 249 static void hns_dsaf_mix_def_qid_cfg(struct dsaf_device *dsaf_dev) 250 { 251 u16 max_q_per_vf, max_vfn; 252 u32 q_id, q_num_per_port; 253 u32 i; 254 255 hns_rcb_get_queue_mode(dsaf_dev->dsaf_mode, &max_vfn, &max_q_per_vf); 256 q_num_per_port = max_vfn * max_q_per_vf; 257 258 for (i = 0, q_id = 0; i < DSAF_SERVICE_NW_NUM; i++) { 259 dsaf_set_dev_field(dsaf_dev, 260 DSAF_MIX_DEF_QID_0_REG + 0x0004 * i, 261 0xff, 0, q_id); 262 q_id += q_num_per_port; 263 } 264 } 265 266 static void hns_dsaf_inner_qid_cfg(struct dsaf_device *dsaf_dev) 267 { 268 u16 max_q_per_vf, max_vfn; 269 u32 q_id, q_num_per_port; 270 u32 mac_id; 271 272 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) 273 return; 274 275 hns_rcb_get_queue_mode(dsaf_dev->dsaf_mode, &max_vfn, &max_q_per_vf); 276 q_num_per_port = max_vfn * max_q_per_vf; 277 278 for (mac_id = 0, q_id = 0; mac_id < DSAF_SERVICE_NW_NUM; mac_id++) { 279 dsaf_set_dev_field(dsaf_dev, 280 DSAFV2_SERDES_LBK_0_REG + 4 * mac_id, 281 DSAFV2_SERDES_LBK_QID_M, 282 DSAFV2_SERDES_LBK_QID_S, 283 q_id); 284 q_id += q_num_per_port; 285 } 286 } 287 288 /** 289 * hns_dsaf_sw_port_type_cfg - cfg sw type 290 * @dsaf_id: dsa fabric id 291 * @psw_port_type: array 292 */ 293 static void hns_dsaf_sw_port_type_cfg(struct dsaf_device *dsaf_dev, 294 enum dsaf_sw_port_type port_type) 295 { 296 u32 i; 297 298 for (i = 0; i < DSAF_SW_PORT_NUM; i++) { 299 dsaf_set_dev_field(dsaf_dev, 300 DSAF_SW_PORT_TYPE_0_REG + 0x0004 * i, 301 DSAF_SW_PORT_TYPE_M, DSAF_SW_PORT_TYPE_S, 302 port_type); 303 } 304 } 305 306 /** 307 * hns_dsaf_stp_port_type_cfg - cfg stp type 308 * @dsaf_id: dsa fabric id 309 * @pstp_port_type: array 310 */ 311 static void hns_dsaf_stp_port_type_cfg(struct dsaf_device *dsaf_dev, 312 enum dsaf_stp_port_type port_type) 313 { 314 u32 i; 315 316 for (i = 0; i < DSAF_COMM_CHN; i++) { 317 dsaf_set_dev_field(dsaf_dev, 318 DSAF_STP_PORT_TYPE_0_REG + 0x0004 * i, 319 DSAF_STP_PORT_TYPE_M, DSAF_STP_PORT_TYPE_S, 320 port_type); 321 } 322 } 323 324 #define HNS_DSAF_SBM_NUM(dev) \ 325 (AE_IS_VER1((dev)->dsaf_ver) ? DSAF_SBM_NUM : DSAFV2_SBM_NUM) 326 /** 327 * hns_dsaf_sbm_cfg - config sbm 328 * @dsaf_id: dsa fabric id 329 */ 330 static void hns_dsaf_sbm_cfg(struct dsaf_device *dsaf_dev) 331 { 332 u32 o_sbm_cfg; 333 u32 i; 334 335 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) { 336 o_sbm_cfg = dsaf_read_dev(dsaf_dev, 337 DSAF_SBM_CFG_REG_0_REG + 0x80 * i); 338 dsaf_set_bit(o_sbm_cfg, DSAF_SBM_CFG_EN_S, 1); 339 dsaf_set_bit(o_sbm_cfg, DSAF_SBM_CFG_SHCUT_EN_S, 0); 340 dsaf_write_dev(dsaf_dev, 341 DSAF_SBM_CFG_REG_0_REG + 0x80 * i, o_sbm_cfg); 342 } 343 } 344 345 /** 346 * hns_dsaf_sbm_cfg_mib_en - config sbm 347 * @dsaf_id: dsa fabric id 348 */ 349 static int hns_dsaf_sbm_cfg_mib_en(struct dsaf_device *dsaf_dev) 350 { 351 u32 sbm_cfg_mib_en; 352 u32 i; 353 u32 reg; 354 u32 read_cnt; 355 356 /* validate configure by setting SBM_CFG_MIB_EN bit from 0 to 1. */ 357 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) { 358 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i; 359 dsaf_set_dev_bit(dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S, 0); 360 } 361 362 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) { 363 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i; 364 dsaf_set_dev_bit(dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S, 1); 365 } 366 367 /* waitint for all sbm enable finished */ 368 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) { 369 read_cnt = 0; 370 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i; 371 do { 372 udelay(1); 373 sbm_cfg_mib_en = dsaf_get_dev_bit( 374 dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S); 375 read_cnt++; 376 } while (sbm_cfg_mib_en == 0 && 377 read_cnt < DSAF_CFG_READ_CNT); 378 379 if (sbm_cfg_mib_en == 0) { 380 dev_err(dsaf_dev->dev, 381 "sbm_cfg_mib_en fail,%s,sbm_num=%d\n", 382 dsaf_dev->ae_dev.name, i); 383 return -ENODEV; 384 } 385 } 386 387 return 0; 388 } 389 390 /** 391 * hns_dsaf_sbm_bp_wl_cfg - config sbm 392 * @dsaf_id: dsa fabric id 393 */ 394 static void hns_dsaf_sbm_bp_wl_cfg(struct dsaf_device *dsaf_dev) 395 { 396 u32 o_sbm_bp_cfg; 397 u32 reg; 398 u32 i; 399 400 /* XGE */ 401 for (i = 0; i < DSAF_XGE_NUM; i++) { 402 reg = DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + 0x80 * i; 403 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 404 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_COM_MAX_BUF_NUM_M, 405 DSAF_SBM_CFG0_COM_MAX_BUF_NUM_S, 512); 406 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_VC0_MAX_BUF_NUM_M, 407 DSAF_SBM_CFG0_VC0_MAX_BUF_NUM_S, 0); 408 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_VC1_MAX_BUF_NUM_M, 409 DSAF_SBM_CFG0_VC1_MAX_BUF_NUM_S, 0); 410 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 411 412 reg = DSAF_SBM_BP_CFG_1_REG_0_REG + 0x80 * i; 413 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 414 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG1_TC4_MAX_BUF_NUM_M, 415 DSAF_SBM_CFG1_TC4_MAX_BUF_NUM_S, 0); 416 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG1_TC0_MAX_BUF_NUM_M, 417 DSAF_SBM_CFG1_TC0_MAX_BUF_NUM_S, 0); 418 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 419 420 reg = DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + 0x80 * i; 421 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 422 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M, 423 DSAF_SBM_CFG2_SET_BUF_NUM_S, 104); 424 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M, 425 DSAF_SBM_CFG2_RESET_BUF_NUM_S, 128); 426 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 427 428 reg = DSAF_SBM_BP_CFG_3_REG_0_REG + 0x80 * i; 429 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 430 dsaf_set_field(o_sbm_bp_cfg, 431 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_M, 432 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 110); 433 dsaf_set_field(o_sbm_bp_cfg, 434 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M, 435 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 160); 436 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 437 438 /* for no enable pfc mode */ 439 reg = DSAF_SBM_BP_CFG_4_REG_0_REG + 0x80 * i; 440 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 441 dsaf_set_field(o_sbm_bp_cfg, 442 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_M, 443 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 128); 444 dsaf_set_field(o_sbm_bp_cfg, 445 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M, 446 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 192); 447 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 448 } 449 450 /* PPE */ 451 for (i = 0; i < DSAF_COMM_CHN; i++) { 452 reg = DSAF_SBM_BP_CFG_2_PPE_REG_0_REG + 0x80 * i; 453 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 454 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M, 455 DSAF_SBM_CFG2_SET_BUF_NUM_S, 10); 456 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M, 457 DSAF_SBM_CFG2_RESET_BUF_NUM_S, 12); 458 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 459 } 460 461 /* RoCEE */ 462 for (i = 0; i < DSAF_COMM_CHN; i++) { 463 reg = DSAF_SBM_BP_CFG_2_ROCEE_REG_0_REG + 0x80 * i; 464 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 465 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M, 466 DSAF_SBM_CFG2_SET_BUF_NUM_S, 2); 467 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M, 468 DSAF_SBM_CFG2_RESET_BUF_NUM_S, 4); 469 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 470 } 471 } 472 473 static void hns_dsafv2_sbm_bp_wl_cfg(struct dsaf_device *dsaf_dev) 474 { 475 u32 o_sbm_bp_cfg; 476 u32 reg; 477 u32 i; 478 479 /* XGE */ 480 for (i = 0; i < DSAFV2_SBM_XGE_CHN; i++) { 481 reg = DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + 0x80 * i; 482 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 483 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_COM_MAX_BUF_NUM_M, 484 DSAFV2_SBM_CFG0_COM_MAX_BUF_NUM_S, 256); 485 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_VC0_MAX_BUF_NUM_M, 486 DSAFV2_SBM_CFG0_VC0_MAX_BUF_NUM_S, 0); 487 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_VC1_MAX_BUF_NUM_M, 488 DSAFV2_SBM_CFG0_VC1_MAX_BUF_NUM_S, 0); 489 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 490 491 reg = DSAF_SBM_BP_CFG_1_REG_0_REG + 0x80 * i; 492 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 493 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG1_TC4_MAX_BUF_NUM_M, 494 DSAFV2_SBM_CFG1_TC4_MAX_BUF_NUM_S, 0); 495 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG1_TC0_MAX_BUF_NUM_M, 496 DSAFV2_SBM_CFG1_TC0_MAX_BUF_NUM_S, 0); 497 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 498 499 reg = DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + 0x80 * i; 500 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 501 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M, 502 DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 104); 503 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M, 504 DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 128); 505 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 506 507 reg = DSAF_SBM_BP_CFG_3_REG_0_REG + 0x80 * i; 508 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 509 dsaf_set_field(o_sbm_bp_cfg, 510 DSAFV2_SBM_CFG3_SET_BUF_NUM_NO_PFC_M, 511 DSAFV2_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 110); 512 dsaf_set_field(o_sbm_bp_cfg, 513 DSAFV2_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M, 514 DSAFV2_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 160); 515 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 516 517 /* for no enable pfc mode */ 518 reg = DSAF_SBM_BP_CFG_4_REG_0_REG + 0x80 * i; 519 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 520 dsaf_set_field(o_sbm_bp_cfg, 521 DSAFV2_SBM_CFG4_SET_BUF_NUM_NO_PFC_M, 522 DSAFV2_SBM_CFG4_SET_BUF_NUM_NO_PFC_S, 128); 523 dsaf_set_field(o_sbm_bp_cfg, 524 DSAFV2_SBM_CFG4_RESET_BUF_NUM_NO_PFC_M, 525 DSAFV2_SBM_CFG4_RESET_BUF_NUM_NO_PFC_S, 192); 526 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 527 } 528 529 /* PPE */ 530 reg = DSAF_SBM_BP_CFG_2_PPE_REG_0_REG + 0x80 * i; 531 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 532 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M, 533 DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 10); 534 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M, 535 DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 12); 536 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 537 /* RoCEE */ 538 for (i = 0; i < DASFV2_ROCEE_CRD_NUM; i++) { 539 reg = DSAFV2_SBM_BP_CFG_2_ROCEE_REG_0_REG + 0x80 * i; 540 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg); 541 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M, 542 DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 2); 543 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M, 544 DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 4); 545 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg); 546 } 547 } 548 549 /** 550 * hns_dsaf_voq_bp_all_thrd_cfg - voq 551 * @dsaf_id: dsa fabric id 552 */ 553 static void hns_dsaf_voq_bp_all_thrd_cfg(struct dsaf_device *dsaf_dev) 554 { 555 u32 voq_bp_all_thrd; 556 u32 i; 557 558 for (i = 0; i < DSAF_VOQ_NUM; i++) { 559 voq_bp_all_thrd = dsaf_read_dev( 560 dsaf_dev, DSAF_VOQ_BP_ALL_THRD_0_REG + 0x40 * i); 561 if (i < DSAF_XGE_NUM) { 562 dsaf_set_field(voq_bp_all_thrd, 563 DSAF_VOQ_BP_ALL_DOWNTHRD_M, 564 DSAF_VOQ_BP_ALL_DOWNTHRD_S, 930); 565 dsaf_set_field(voq_bp_all_thrd, 566 DSAF_VOQ_BP_ALL_UPTHRD_M, 567 DSAF_VOQ_BP_ALL_UPTHRD_S, 950); 568 } else { 569 dsaf_set_field(voq_bp_all_thrd, 570 DSAF_VOQ_BP_ALL_DOWNTHRD_M, 571 DSAF_VOQ_BP_ALL_DOWNTHRD_S, 220); 572 dsaf_set_field(voq_bp_all_thrd, 573 DSAF_VOQ_BP_ALL_UPTHRD_M, 574 DSAF_VOQ_BP_ALL_UPTHRD_S, 230); 575 } 576 dsaf_write_dev( 577 dsaf_dev, DSAF_VOQ_BP_ALL_THRD_0_REG + 0x40 * i, 578 voq_bp_all_thrd); 579 } 580 } 581 582 /** 583 * hns_dsaf_tbl_tcam_data_cfg - tbl 584 * @dsaf_id: dsa fabric id 585 * @ptbl_tcam_data: addr 586 */ 587 static void hns_dsaf_tbl_tcam_data_cfg( 588 struct dsaf_device *dsaf_dev, 589 struct dsaf_tbl_tcam_data *ptbl_tcam_data) 590 { 591 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_LOW_0_REG, 592 ptbl_tcam_data->tbl_tcam_data_low); 593 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_HIGH_0_REG, 594 ptbl_tcam_data->tbl_tcam_data_high); 595 } 596 597 /** 598 * dsaf_tbl_tcam_mcast_cfg - tbl 599 * @dsaf_id: dsa fabric id 600 * @ptbl_tcam_mcast: addr 601 */ 602 static void hns_dsaf_tbl_tcam_mcast_cfg( 603 struct dsaf_device *dsaf_dev, 604 struct dsaf_tbl_tcam_mcast_cfg *mcast) 605 { 606 u32 mcast_cfg4; 607 608 mcast_cfg4 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG); 609 dsaf_set_bit(mcast_cfg4, DSAF_TBL_MCAST_CFG4_ITEM_VLD_S, 610 mcast->tbl_mcast_item_vld); 611 dsaf_set_bit(mcast_cfg4, DSAF_TBL_MCAST_CFG4_OLD_EN_S, 612 mcast->tbl_mcast_old_en); 613 dsaf_set_field(mcast_cfg4, DSAF_TBL_MCAST_CFG4_VM128_112_M, 614 DSAF_TBL_MCAST_CFG4_VM128_112_S, 615 mcast->tbl_mcast_port_msk[4]); 616 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG, mcast_cfg4); 617 618 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG, 619 mcast->tbl_mcast_port_msk[3]); 620 621 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG, 622 mcast->tbl_mcast_port_msk[2]); 623 624 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG, 625 mcast->tbl_mcast_port_msk[1]); 626 627 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG, 628 mcast->tbl_mcast_port_msk[0]); 629 } 630 631 /** 632 * hns_dsaf_tbl_tcam_ucast_cfg - tbl 633 * @dsaf_id: dsa fabric id 634 * @ptbl_tcam_ucast: addr 635 */ 636 static void hns_dsaf_tbl_tcam_ucast_cfg( 637 struct dsaf_device *dsaf_dev, 638 struct dsaf_tbl_tcam_ucast_cfg *tbl_tcam_ucast) 639 { 640 u32 ucast_cfg1; 641 642 ucast_cfg1 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_UCAST_CFG_0_REG); 643 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_MAC_DISCARD_S, 644 tbl_tcam_ucast->tbl_ucast_mac_discard); 645 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_ITEM_VLD_S, 646 tbl_tcam_ucast->tbl_ucast_item_vld); 647 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_OLD_EN_S, 648 tbl_tcam_ucast->tbl_ucast_old_en); 649 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_DVC_S, 650 tbl_tcam_ucast->tbl_ucast_dvc); 651 dsaf_set_field(ucast_cfg1, DSAF_TBL_UCAST_CFG1_OUT_PORT_M, 652 DSAF_TBL_UCAST_CFG1_OUT_PORT_S, 653 tbl_tcam_ucast->tbl_ucast_out_port); 654 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_UCAST_CFG_0_REG, ucast_cfg1); 655 } 656 657 /** 658 * hns_dsaf_tbl_line_cfg - tbl 659 * @dsaf_id: dsa fabric id 660 * @ptbl_lin: addr 661 */ 662 static void hns_dsaf_tbl_line_cfg(struct dsaf_device *dsaf_dev, 663 struct dsaf_tbl_line_cfg *tbl_lin) 664 { 665 u32 tbl_line; 666 667 tbl_line = dsaf_read_dev(dsaf_dev, DSAF_TBL_LIN_CFG_0_REG); 668 dsaf_set_bit(tbl_line, DSAF_TBL_LINE_CFG_MAC_DISCARD_S, 669 tbl_lin->tbl_line_mac_discard); 670 dsaf_set_bit(tbl_line, DSAF_TBL_LINE_CFG_DVC_S, 671 tbl_lin->tbl_line_dvc); 672 dsaf_set_field(tbl_line, DSAF_TBL_LINE_CFG_OUT_PORT_M, 673 DSAF_TBL_LINE_CFG_OUT_PORT_S, 674 tbl_lin->tbl_line_out_port); 675 dsaf_write_dev(dsaf_dev, DSAF_TBL_LIN_CFG_0_REG, tbl_line); 676 } 677 678 /** 679 * hns_dsaf_tbl_tcam_mcast_pul - tbl 680 * @dsaf_id: dsa fabric id 681 */ 682 static void hns_dsaf_tbl_tcam_mcast_pul(struct dsaf_device *dsaf_dev) 683 { 684 u32 o_tbl_pul; 685 686 o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG); 687 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 1); 688 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul); 689 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 0); 690 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul); 691 } 692 693 /** 694 * hns_dsaf_tbl_line_pul - tbl 695 * @dsaf_id: dsa fabric id 696 */ 697 static void hns_dsaf_tbl_line_pul(struct dsaf_device *dsaf_dev) 698 { 699 u32 tbl_pul; 700 701 tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG); 702 dsaf_set_bit(tbl_pul, DSAF_TBL_PUL_LINE_VLD_S, 1); 703 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, tbl_pul); 704 dsaf_set_bit(tbl_pul, DSAF_TBL_PUL_LINE_VLD_S, 0); 705 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, tbl_pul); 706 } 707 708 /** 709 * hns_dsaf_tbl_tcam_data_mcast_pul - tbl 710 * @dsaf_id: dsa fabric id 711 */ 712 static void hns_dsaf_tbl_tcam_data_mcast_pul( 713 struct dsaf_device *dsaf_dev) 714 { 715 u32 o_tbl_pul; 716 717 o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG); 718 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 1); 719 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 1); 720 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul); 721 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 0); 722 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 0); 723 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul); 724 } 725 726 /** 727 * hns_dsaf_tbl_tcam_data_ucast_pul - tbl 728 * @dsaf_id: dsa fabric id 729 */ 730 static void hns_dsaf_tbl_tcam_data_ucast_pul( 731 struct dsaf_device *dsaf_dev) 732 { 733 u32 o_tbl_pul; 734 735 o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG); 736 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 1); 737 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_UCAST_VLD_S, 1); 738 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul); 739 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 0); 740 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_UCAST_VLD_S, 0); 741 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul); 742 } 743 744 void hns_dsaf_set_promisc_mode(struct dsaf_device *dsaf_dev, u32 en) 745 { 746 if (!HNS_DSAF_IS_DEBUG(dsaf_dev)) 747 dsaf_set_dev_bit(dsaf_dev, DSAF_CFG_0_REG, 748 DSAF_CFG_MIX_MODE_S, !!en); 749 } 750 751 void hns_dsaf_set_inner_lb(struct dsaf_device *dsaf_dev, u32 mac_id, u32 en) 752 { 753 if (AE_IS_VER1(dsaf_dev->dsaf_ver) || 754 dsaf_dev->mac_cb[mac_id]->mac_type == HNAE_PORT_DEBUG) 755 return; 756 757 dsaf_set_dev_bit(dsaf_dev, DSAFV2_SERDES_LBK_0_REG + 4 * mac_id, 758 DSAFV2_SERDES_LBK_EN_B, !!en); 759 } 760 761 /** 762 * hns_dsaf_tbl_stat_en - tbl 763 * @dsaf_id: dsa fabric id 764 * @ptbl_stat_en: addr 765 */ 766 static void hns_dsaf_tbl_stat_en(struct dsaf_device *dsaf_dev) 767 { 768 u32 o_tbl_ctrl; 769 770 o_tbl_ctrl = dsaf_read_dev(dsaf_dev, DSAF_TBL_DFX_CTRL_0_REG); 771 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_LINE_LKUP_NUM_EN_S, 1); 772 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_UC_LKUP_NUM_EN_S, 1); 773 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_MC_LKUP_NUM_EN_S, 1); 774 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_BC_LKUP_NUM_EN_S, 1); 775 dsaf_write_dev(dsaf_dev, DSAF_TBL_DFX_CTRL_0_REG, o_tbl_ctrl); 776 } 777 778 /** 779 * hns_dsaf_rocee_bp_en - rocee back press enable 780 * @dsaf_id: dsa fabric id 781 */ 782 static void hns_dsaf_rocee_bp_en(struct dsaf_device *dsaf_dev) 783 { 784 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) 785 dsaf_set_dev_bit(dsaf_dev, DSAF_XGE_CTRL_SIG_CFG_0_REG, 786 DSAF_FC_XGE_TX_PAUSE_S, 1); 787 } 788 789 /* set msk for dsaf exception irq*/ 790 static void hns_dsaf_int_xge_msk_set(struct dsaf_device *dsaf_dev, 791 u32 chnn_num, u32 mask_set) 792 { 793 dsaf_write_dev(dsaf_dev, 794 DSAF_XGE_INT_MSK_0_REG + 0x4 * chnn_num, mask_set); 795 } 796 797 static void hns_dsaf_int_ppe_msk_set(struct dsaf_device *dsaf_dev, 798 u32 chnn_num, u32 msk_set) 799 { 800 dsaf_write_dev(dsaf_dev, 801 DSAF_PPE_INT_MSK_0_REG + 0x4 * chnn_num, msk_set); 802 } 803 804 static void hns_dsaf_int_rocee_msk_set(struct dsaf_device *dsaf_dev, 805 u32 chnn, u32 msk_set) 806 { 807 dsaf_write_dev(dsaf_dev, 808 DSAF_ROCEE_INT_MSK_0_REG + 0x4 * chnn, msk_set); 809 } 810 811 static void 812 hns_dsaf_int_tbl_msk_set(struct dsaf_device *dsaf_dev, u32 msk_set) 813 { 814 dsaf_write_dev(dsaf_dev, DSAF_TBL_INT_MSK_0_REG, msk_set); 815 } 816 817 /* clr dsaf exception irq*/ 818 static void hns_dsaf_int_xge_src_clr(struct dsaf_device *dsaf_dev, 819 u32 chnn_num, u32 int_src) 820 { 821 dsaf_write_dev(dsaf_dev, 822 DSAF_XGE_INT_SRC_0_REG + 0x4 * chnn_num, int_src); 823 } 824 825 static void hns_dsaf_int_ppe_src_clr(struct dsaf_device *dsaf_dev, 826 u32 chnn, u32 int_src) 827 { 828 dsaf_write_dev(dsaf_dev, 829 DSAF_PPE_INT_SRC_0_REG + 0x4 * chnn, int_src); 830 } 831 832 static void hns_dsaf_int_rocee_src_clr(struct dsaf_device *dsaf_dev, 833 u32 chnn, u32 int_src) 834 { 835 dsaf_write_dev(dsaf_dev, 836 DSAF_ROCEE_INT_SRC_0_REG + 0x4 * chnn, int_src); 837 } 838 839 static void hns_dsaf_int_tbl_src_clr(struct dsaf_device *dsaf_dev, 840 u32 int_src) 841 { 842 dsaf_write_dev(dsaf_dev, DSAF_TBL_INT_SRC_0_REG, int_src); 843 } 844 845 /** 846 * hns_dsaf_single_line_tbl_cfg - INT 847 * @dsaf_id: dsa fabric id 848 * @address: 849 * @ptbl_line: 850 */ 851 static void hns_dsaf_single_line_tbl_cfg( 852 struct dsaf_device *dsaf_dev, 853 u32 address, struct dsaf_tbl_line_cfg *ptbl_line) 854 { 855 /*Write Addr*/ 856 hns_dsaf_tbl_line_addr_cfg(dsaf_dev, address); 857 858 /*Write Line*/ 859 hns_dsaf_tbl_line_cfg(dsaf_dev, ptbl_line); 860 861 /*Write Plus*/ 862 hns_dsaf_tbl_line_pul(dsaf_dev); 863 } 864 865 /** 866 * hns_dsaf_tcam_uc_cfg - INT 867 * @dsaf_id: dsa fabric id 868 * @address, 869 * @ptbl_tcam_data, 870 */ 871 static void hns_dsaf_tcam_uc_cfg( 872 struct dsaf_device *dsaf_dev, u32 address, 873 struct dsaf_tbl_tcam_data *ptbl_tcam_data, 874 struct dsaf_tbl_tcam_ucast_cfg *ptbl_tcam_ucast) 875 { 876 /*Write Addr*/ 877 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address); 878 /*Write Tcam Data*/ 879 hns_dsaf_tbl_tcam_data_cfg(dsaf_dev, ptbl_tcam_data); 880 /*Write Tcam Ucast*/ 881 hns_dsaf_tbl_tcam_ucast_cfg(dsaf_dev, ptbl_tcam_ucast); 882 /*Write Plus*/ 883 hns_dsaf_tbl_tcam_data_ucast_pul(dsaf_dev); 884 } 885 886 /** 887 * hns_dsaf_tcam_mc_cfg - INT 888 * @dsaf_id: dsa fabric id 889 * @address, 890 * @ptbl_tcam_data, 891 * @ptbl_tcam_mcast, 892 */ 893 static void hns_dsaf_tcam_mc_cfg( 894 struct dsaf_device *dsaf_dev, u32 address, 895 struct dsaf_tbl_tcam_data *ptbl_tcam_data, 896 struct dsaf_tbl_tcam_mcast_cfg *ptbl_tcam_mcast) 897 { 898 /*Write Addr*/ 899 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address); 900 /*Write Tcam Data*/ 901 hns_dsaf_tbl_tcam_data_cfg(dsaf_dev, ptbl_tcam_data); 902 /*Write Tcam Mcast*/ 903 hns_dsaf_tbl_tcam_mcast_cfg(dsaf_dev, ptbl_tcam_mcast); 904 /*Write Plus*/ 905 hns_dsaf_tbl_tcam_data_mcast_pul(dsaf_dev); 906 } 907 908 /** 909 * hns_dsaf_tcam_mc_invld - INT 910 * @dsaf_id: dsa fabric id 911 * @address 912 */ 913 static void hns_dsaf_tcam_mc_invld(struct dsaf_device *dsaf_dev, u32 address) 914 { 915 /*Write Addr*/ 916 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address); 917 918 /*write tcam mcast*/ 919 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG, 0); 920 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG, 0); 921 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG, 0); 922 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG, 0); 923 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG, 0); 924 925 /*Write Plus*/ 926 hns_dsaf_tbl_tcam_mcast_pul(dsaf_dev); 927 } 928 929 /** 930 * hns_dsaf_tcam_uc_get - INT 931 * @dsaf_id: dsa fabric id 932 * @address 933 * @ptbl_tcam_data 934 * @ptbl_tcam_ucast 935 */ 936 static void hns_dsaf_tcam_uc_get( 937 struct dsaf_device *dsaf_dev, u32 address, 938 struct dsaf_tbl_tcam_data *ptbl_tcam_data, 939 struct dsaf_tbl_tcam_ucast_cfg *ptbl_tcam_ucast) 940 { 941 u32 tcam_read_data0; 942 u32 tcam_read_data4; 943 944 /*Write Addr*/ 945 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address); 946 947 /*read tcam item puls*/ 948 hns_dsaf_tbl_tcam_load_pul(dsaf_dev); 949 950 /*read tcam data*/ 951 ptbl_tcam_data->tbl_tcam_data_high 952 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_LOW_0_REG); 953 ptbl_tcam_data->tbl_tcam_data_low 954 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG); 955 956 /*read tcam mcast*/ 957 tcam_read_data0 = dsaf_read_dev(dsaf_dev, 958 DSAF_TBL_TCAM_RAM_RDATA0_0_REG); 959 tcam_read_data4 = dsaf_read_dev(dsaf_dev, 960 DSAF_TBL_TCAM_RAM_RDATA4_0_REG); 961 962 ptbl_tcam_ucast->tbl_ucast_item_vld 963 = dsaf_get_bit(tcam_read_data4, 964 DSAF_TBL_MCAST_CFG4_ITEM_VLD_S); 965 ptbl_tcam_ucast->tbl_ucast_old_en 966 = dsaf_get_bit(tcam_read_data4, DSAF_TBL_MCAST_CFG4_OLD_EN_S); 967 ptbl_tcam_ucast->tbl_ucast_mac_discard 968 = dsaf_get_bit(tcam_read_data0, 969 DSAF_TBL_UCAST_CFG1_MAC_DISCARD_S); 970 ptbl_tcam_ucast->tbl_ucast_out_port 971 = dsaf_get_field(tcam_read_data0, 972 DSAF_TBL_UCAST_CFG1_OUT_PORT_M, 973 DSAF_TBL_UCAST_CFG1_OUT_PORT_S); 974 ptbl_tcam_ucast->tbl_ucast_dvc 975 = dsaf_get_bit(tcam_read_data0, DSAF_TBL_UCAST_CFG1_DVC_S); 976 } 977 978 /** 979 * hns_dsaf_tcam_mc_get - INT 980 * @dsaf_id: dsa fabric id 981 * @address 982 * @ptbl_tcam_data 983 * @ptbl_tcam_ucast 984 */ 985 static void hns_dsaf_tcam_mc_get( 986 struct dsaf_device *dsaf_dev, u32 address, 987 struct dsaf_tbl_tcam_data *ptbl_tcam_data, 988 struct dsaf_tbl_tcam_mcast_cfg *ptbl_tcam_mcast) 989 { 990 u32 data_tmp; 991 992 /*Write Addr*/ 993 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address); 994 995 /*read tcam item puls*/ 996 hns_dsaf_tbl_tcam_load_pul(dsaf_dev); 997 998 /*read tcam data*/ 999 ptbl_tcam_data->tbl_tcam_data_high = 1000 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_LOW_0_REG); 1001 ptbl_tcam_data->tbl_tcam_data_low = 1002 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG); 1003 1004 /*read tcam mcast*/ 1005 ptbl_tcam_mcast->tbl_mcast_port_msk[0] = 1006 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA0_0_REG); 1007 ptbl_tcam_mcast->tbl_mcast_port_msk[1] = 1008 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA1_0_REG); 1009 ptbl_tcam_mcast->tbl_mcast_port_msk[2] = 1010 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA2_0_REG); 1011 ptbl_tcam_mcast->tbl_mcast_port_msk[3] = 1012 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA3_0_REG); 1013 1014 data_tmp = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA4_0_REG); 1015 ptbl_tcam_mcast->tbl_mcast_item_vld = 1016 dsaf_get_bit(data_tmp, DSAF_TBL_MCAST_CFG4_ITEM_VLD_S); 1017 ptbl_tcam_mcast->tbl_mcast_old_en = 1018 dsaf_get_bit(data_tmp, DSAF_TBL_MCAST_CFG4_OLD_EN_S); 1019 ptbl_tcam_mcast->tbl_mcast_port_msk[4] = 1020 dsaf_get_field(data_tmp, DSAF_TBL_MCAST_CFG4_VM128_112_M, 1021 DSAF_TBL_MCAST_CFG4_VM128_112_S); 1022 } 1023 1024 /** 1025 * hns_dsaf_tbl_line_init - INT 1026 * @dsaf_id: dsa fabric id 1027 */ 1028 static void hns_dsaf_tbl_line_init(struct dsaf_device *dsaf_dev) 1029 { 1030 u32 i; 1031 /* defaultly set all lineal mac table entry resulting discard */ 1032 struct dsaf_tbl_line_cfg tbl_line[] = {{1, 0, 0} }; 1033 1034 for (i = 0; i < DSAF_LINE_SUM; i++) 1035 hns_dsaf_single_line_tbl_cfg(dsaf_dev, i, tbl_line); 1036 } 1037 1038 /** 1039 * hns_dsaf_tbl_tcam_init - INT 1040 * @dsaf_id: dsa fabric id 1041 */ 1042 static void hns_dsaf_tbl_tcam_init(struct dsaf_device *dsaf_dev) 1043 { 1044 u32 i; 1045 struct dsaf_tbl_tcam_data tcam_data[] = {{0, 0} }; 1046 struct dsaf_tbl_tcam_ucast_cfg tcam_ucast[] = {{0, 0, 0, 0, 0} }; 1047 1048 /*tcam tbl*/ 1049 for (i = 0; i < DSAF_TCAM_SUM; i++) 1050 hns_dsaf_tcam_uc_cfg(dsaf_dev, i, tcam_data, tcam_ucast); 1051 } 1052 1053 /** 1054 * hns_dsaf_pfc_en_cfg - dsaf pfc pause cfg 1055 * @mac_cb: mac contrl block 1056 */ 1057 static void hns_dsaf_pfc_en_cfg(struct dsaf_device *dsaf_dev, 1058 int mac_id, int tc_en) 1059 { 1060 dsaf_write_dev(dsaf_dev, DSAF_PFC_EN_0_REG + mac_id * 4, tc_en); 1061 } 1062 1063 static void hns_dsaf_set_pfc_pause(struct dsaf_device *dsaf_dev, 1064 int mac_id, int tx_en, int rx_en) 1065 { 1066 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) { 1067 if (!tx_en || !rx_en) 1068 dev_err(dsaf_dev->dev, "dsaf v1 can not close pfc!\n"); 1069 1070 return; 1071 } 1072 1073 dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4, 1074 DSAF_PFC_PAUSE_RX_EN_B, !!rx_en); 1075 dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4, 1076 DSAF_PFC_PAUSE_TX_EN_B, !!tx_en); 1077 } 1078 1079 int hns_dsaf_set_rx_mac_pause_en(struct dsaf_device *dsaf_dev, int mac_id, 1080 u32 en) 1081 { 1082 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) { 1083 if (!en) 1084 dev_err(dsaf_dev->dev, "dsafv1 can't close rx_pause!\n"); 1085 1086 return -EINVAL; 1087 } 1088 1089 dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4, 1090 DSAF_MAC_PAUSE_RX_EN_B, !!en); 1091 1092 return 0; 1093 } 1094 1095 void hns_dsaf_get_rx_mac_pause_en(struct dsaf_device *dsaf_dev, int mac_id, 1096 u32 *en) 1097 { 1098 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) 1099 *en = 1; 1100 else 1101 *en = dsaf_get_dev_bit(dsaf_dev, 1102 DSAF_PAUSE_CFG_REG + mac_id * 4, 1103 DSAF_MAC_PAUSE_RX_EN_B); 1104 } 1105 1106 /** 1107 * hns_dsaf_tbl_tcam_init - INT 1108 * @dsaf_id: dsa fabric id 1109 * @dsaf_mode 1110 */ 1111 static void hns_dsaf_comm_init(struct dsaf_device *dsaf_dev) 1112 { 1113 u32 i; 1114 u32 o_dsaf_cfg; 1115 bool is_ver1 = AE_IS_VER1(dsaf_dev->dsaf_ver); 1116 1117 o_dsaf_cfg = dsaf_read_dev(dsaf_dev, DSAF_CFG_0_REG); 1118 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_EN_S, dsaf_dev->dsaf_en); 1119 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_TC_MODE_S, dsaf_dev->dsaf_tc_mode); 1120 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_CRC_EN_S, 0); 1121 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_MIX_MODE_S, 0); 1122 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_LOCA_ADDR_EN_S, 0); 1123 dsaf_write_dev(dsaf_dev, DSAF_CFG_0_REG, o_dsaf_cfg); 1124 1125 hns_dsaf_reg_cnt_clr_ce(dsaf_dev, 1); 1126 hns_dsaf_stp_port_type_cfg(dsaf_dev, DSAF_STP_PORT_TYPE_FORWARD); 1127 1128 /* set 22 queue per tx ppe engine, only used in switch mode */ 1129 hns_dsaf_ppe_qid_cfg(dsaf_dev, DSAF_DEFAUTL_QUEUE_NUM_PER_PPE); 1130 1131 /* set promisc def queue id */ 1132 hns_dsaf_mix_def_qid_cfg(dsaf_dev); 1133 1134 /* set inner loopback queue id */ 1135 hns_dsaf_inner_qid_cfg(dsaf_dev); 1136 1137 /* in non switch mode, set all port to access mode */ 1138 hns_dsaf_sw_port_type_cfg(dsaf_dev, DSAF_SW_PORT_TYPE_NON_VLAN); 1139 1140 /*set dsaf pfc to 0 for parseing rx pause*/ 1141 for (i = 0; i < DSAF_COMM_CHN; i++) { 1142 hns_dsaf_pfc_en_cfg(dsaf_dev, i, 0); 1143 hns_dsaf_set_pfc_pause(dsaf_dev, i, is_ver1, is_ver1); 1144 } 1145 1146 /*msk and clr exception irqs */ 1147 for (i = 0; i < DSAF_COMM_CHN; i++) { 1148 hns_dsaf_int_xge_src_clr(dsaf_dev, i, 0xfffffffful); 1149 hns_dsaf_int_ppe_src_clr(dsaf_dev, i, 0xfffffffful); 1150 hns_dsaf_int_rocee_src_clr(dsaf_dev, i, 0xfffffffful); 1151 1152 hns_dsaf_int_xge_msk_set(dsaf_dev, i, 0xfffffffful); 1153 hns_dsaf_int_ppe_msk_set(dsaf_dev, i, 0xfffffffful); 1154 hns_dsaf_int_rocee_msk_set(dsaf_dev, i, 0xfffffffful); 1155 } 1156 hns_dsaf_int_tbl_src_clr(dsaf_dev, 0xfffffffful); 1157 hns_dsaf_int_tbl_msk_set(dsaf_dev, 0xfffffffful); 1158 } 1159 1160 /** 1161 * hns_dsaf_inode_init - INT 1162 * @dsaf_id: dsa fabric id 1163 */ 1164 static void hns_dsaf_inode_init(struct dsaf_device *dsaf_dev) 1165 { 1166 u32 reg; 1167 u32 tc_cfg; 1168 u32 i; 1169 1170 if (dsaf_dev->dsaf_tc_mode == HRD_DSAF_4TC_MODE) 1171 tc_cfg = HNS_DSAF_I4TC_CFG; 1172 else 1173 tc_cfg = HNS_DSAF_I8TC_CFG; 1174 1175 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) { 1176 for (i = 0; i < DSAF_INODE_NUM; i++) { 1177 reg = DSAF_INODE_IN_PORT_NUM_0_REG + 0x80 * i; 1178 dsaf_set_dev_field(dsaf_dev, reg, 1179 DSAF_INODE_IN_PORT_NUM_M, 1180 DSAF_INODE_IN_PORT_NUM_S, 1181 i % DSAF_XGE_NUM); 1182 } 1183 } else { 1184 for (i = 0; i < DSAF_PORT_TYPE_NUM; i++) { 1185 reg = DSAF_INODE_IN_PORT_NUM_0_REG + 0x80 * i; 1186 dsaf_set_dev_field(dsaf_dev, reg, 1187 DSAF_INODE_IN_PORT_NUM_M, 1188 DSAF_INODE_IN_PORT_NUM_S, 0); 1189 dsaf_set_dev_field(dsaf_dev, reg, 1190 DSAFV2_INODE_IN_PORT1_NUM_M, 1191 DSAFV2_INODE_IN_PORT1_NUM_S, 1); 1192 dsaf_set_dev_field(dsaf_dev, reg, 1193 DSAFV2_INODE_IN_PORT2_NUM_M, 1194 DSAFV2_INODE_IN_PORT2_NUM_S, 2); 1195 dsaf_set_dev_field(dsaf_dev, reg, 1196 DSAFV2_INODE_IN_PORT3_NUM_M, 1197 DSAFV2_INODE_IN_PORT3_NUM_S, 3); 1198 dsaf_set_dev_field(dsaf_dev, reg, 1199 DSAFV2_INODE_IN_PORT4_NUM_M, 1200 DSAFV2_INODE_IN_PORT4_NUM_S, 4); 1201 dsaf_set_dev_field(dsaf_dev, reg, 1202 DSAFV2_INODE_IN_PORT5_NUM_M, 1203 DSAFV2_INODE_IN_PORT5_NUM_S, 5); 1204 } 1205 } 1206 for (i = 0; i < DSAF_INODE_NUM; i++) { 1207 reg = DSAF_INODE_PRI_TC_CFG_0_REG + 0x80 * i; 1208 dsaf_write_dev(dsaf_dev, reg, tc_cfg); 1209 } 1210 } 1211 1212 /** 1213 * hns_dsaf_sbm_init - INT 1214 * @dsaf_id: dsa fabric id 1215 */ 1216 static int hns_dsaf_sbm_init(struct dsaf_device *dsaf_dev) 1217 { 1218 u32 flag; 1219 u32 finish_msk; 1220 u32 cnt = 0; 1221 int ret; 1222 1223 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) { 1224 hns_dsaf_sbm_bp_wl_cfg(dsaf_dev); 1225 finish_msk = DSAF_SRAM_INIT_OVER_M; 1226 } else { 1227 hns_dsafv2_sbm_bp_wl_cfg(dsaf_dev); 1228 finish_msk = DSAFV2_SRAM_INIT_OVER_M; 1229 } 1230 1231 /* enable sbm chanel, disable sbm chanel shcut function*/ 1232 hns_dsaf_sbm_cfg(dsaf_dev); 1233 1234 /* enable sbm mib */ 1235 ret = hns_dsaf_sbm_cfg_mib_en(dsaf_dev); 1236 if (ret) { 1237 dev_err(dsaf_dev->dev, 1238 "hns_dsaf_sbm_cfg_mib_en fail,%s, ret=%d\n", 1239 dsaf_dev->ae_dev.name, ret); 1240 return ret; 1241 } 1242 1243 /* enable sbm initial link sram */ 1244 hns_dsaf_sbm_link_sram_init_en(dsaf_dev); 1245 1246 do { 1247 usleep_range(200, 210);/*udelay(200);*/ 1248 flag = dsaf_get_dev_field(dsaf_dev, DSAF_SRAM_INIT_OVER_0_REG, 1249 finish_msk, DSAF_SRAM_INIT_OVER_S); 1250 cnt++; 1251 } while (flag != (finish_msk >> DSAF_SRAM_INIT_OVER_S) && 1252 cnt < DSAF_CFG_READ_CNT); 1253 1254 if (flag != (finish_msk >> DSAF_SRAM_INIT_OVER_S)) { 1255 dev_err(dsaf_dev->dev, 1256 "hns_dsaf_sbm_init fail %s, flag=%d, cnt=%d\n", 1257 dsaf_dev->ae_dev.name, flag, cnt); 1258 return -ENODEV; 1259 } 1260 1261 hns_dsaf_rocee_bp_en(dsaf_dev); 1262 1263 return 0; 1264 } 1265 1266 /** 1267 * hns_dsaf_tbl_init - INT 1268 * @dsaf_id: dsa fabric id 1269 */ 1270 static void hns_dsaf_tbl_init(struct dsaf_device *dsaf_dev) 1271 { 1272 hns_dsaf_tbl_stat_en(dsaf_dev); 1273 1274 hns_dsaf_tbl_tcam_init(dsaf_dev); 1275 hns_dsaf_tbl_line_init(dsaf_dev); 1276 } 1277 1278 /** 1279 * hns_dsaf_voq_init - INT 1280 * @dsaf_id: dsa fabric id 1281 */ 1282 static void hns_dsaf_voq_init(struct dsaf_device *dsaf_dev) 1283 { 1284 hns_dsaf_voq_bp_all_thrd_cfg(dsaf_dev); 1285 } 1286 1287 /** 1288 * hns_dsaf_init_hw - init dsa fabric hardware 1289 * @dsaf_dev: dsa fabric device struct pointer 1290 */ 1291 static int hns_dsaf_init_hw(struct dsaf_device *dsaf_dev) 1292 { 1293 int ret; 1294 1295 dev_dbg(dsaf_dev->dev, 1296 "hns_dsaf_init_hw begin %s !\n", dsaf_dev->ae_dev.name); 1297 1298 hns_dsaf_rst(dsaf_dev, 0); 1299 mdelay(10); 1300 hns_dsaf_rst(dsaf_dev, 1); 1301 1302 hns_dsaf_comm_init(dsaf_dev); 1303 1304 /*init XBAR_INODE*/ 1305 hns_dsaf_inode_init(dsaf_dev); 1306 1307 /*init SBM*/ 1308 ret = hns_dsaf_sbm_init(dsaf_dev); 1309 if (ret) 1310 return ret; 1311 1312 /*init TBL*/ 1313 hns_dsaf_tbl_init(dsaf_dev); 1314 1315 /*init VOQ*/ 1316 hns_dsaf_voq_init(dsaf_dev); 1317 1318 return 0; 1319 } 1320 1321 /** 1322 * hns_dsaf_remove_hw - uninit dsa fabric hardware 1323 * @dsaf_dev: dsa fabric device struct pointer 1324 */ 1325 static void hns_dsaf_remove_hw(struct dsaf_device *dsaf_dev) 1326 { 1327 /*reset*/ 1328 hns_dsaf_rst(dsaf_dev, 0); 1329 } 1330 1331 /** 1332 * hns_dsaf_init - init dsa fabric 1333 * @dsaf_dev: dsa fabric device struct pointer 1334 * retuen 0 - success , negative --fail 1335 */ 1336 static int hns_dsaf_init(struct dsaf_device *dsaf_dev) 1337 { 1338 struct dsaf_drv_priv *priv = 1339 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev); 1340 u32 i; 1341 int ret; 1342 1343 if (HNS_DSAF_IS_DEBUG(dsaf_dev)) 1344 return 0; 1345 1346 ret = hns_dsaf_init_hw(dsaf_dev); 1347 if (ret) 1348 return ret; 1349 1350 /* malloc mem for tcam mac key(vlan+mac) */ 1351 priv->soft_mac_tbl = vzalloc(sizeof(*priv->soft_mac_tbl) 1352 * DSAF_TCAM_SUM); 1353 if (!priv->soft_mac_tbl) { 1354 ret = -ENOMEM; 1355 goto remove_hw; 1356 } 1357 1358 /*all entry invall */ 1359 for (i = 0; i < DSAF_TCAM_SUM; i++) 1360 (priv->soft_mac_tbl + i)->index = DSAF_INVALID_ENTRY_IDX; 1361 1362 return 0; 1363 1364 remove_hw: 1365 hns_dsaf_remove_hw(dsaf_dev); 1366 return ret; 1367 } 1368 1369 /** 1370 * hns_dsaf_free - free dsa fabric 1371 * @dsaf_dev: dsa fabric device struct pointer 1372 */ 1373 static void hns_dsaf_free(struct dsaf_device *dsaf_dev) 1374 { 1375 struct dsaf_drv_priv *priv = 1376 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev); 1377 1378 hns_dsaf_remove_hw(dsaf_dev); 1379 1380 /* free all mac mem */ 1381 vfree(priv->soft_mac_tbl); 1382 priv->soft_mac_tbl = NULL; 1383 } 1384 1385 /** 1386 * hns_dsaf_find_soft_mac_entry - find dsa fabric soft entry 1387 * @dsaf_dev: dsa fabric device struct pointer 1388 * @mac_key: mac entry struct pointer 1389 */ 1390 static u16 hns_dsaf_find_soft_mac_entry( 1391 struct dsaf_device *dsaf_dev, 1392 struct dsaf_drv_tbl_tcam_key *mac_key) 1393 { 1394 struct dsaf_drv_priv *priv = 1395 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev); 1396 struct dsaf_drv_soft_mac_tbl *soft_mac_entry; 1397 u32 i; 1398 1399 soft_mac_entry = priv->soft_mac_tbl; 1400 for (i = 0; i < DSAF_TCAM_SUM; i++) { 1401 /* invall tab entry */ 1402 if ((soft_mac_entry->index != DSAF_INVALID_ENTRY_IDX) && 1403 (soft_mac_entry->tcam_key.high.val == mac_key->high.val) && 1404 (soft_mac_entry->tcam_key.low.val == mac_key->low.val)) 1405 /* return find result --soft index */ 1406 return soft_mac_entry->index; 1407 1408 soft_mac_entry++; 1409 } 1410 return DSAF_INVALID_ENTRY_IDX; 1411 } 1412 1413 /** 1414 * hns_dsaf_find_empty_mac_entry - search dsa fabric soft empty-entry 1415 * @dsaf_dev: dsa fabric device struct pointer 1416 */ 1417 static u16 hns_dsaf_find_empty_mac_entry(struct dsaf_device *dsaf_dev) 1418 { 1419 struct dsaf_drv_priv *priv = 1420 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev); 1421 struct dsaf_drv_soft_mac_tbl *soft_mac_entry; 1422 u32 i; 1423 1424 soft_mac_entry = priv->soft_mac_tbl; 1425 for (i = 0; i < DSAF_TCAM_SUM; i++) { 1426 /* inv all entry */ 1427 if (soft_mac_entry->index == DSAF_INVALID_ENTRY_IDX) 1428 /* return find result --soft index */ 1429 return i; 1430 1431 soft_mac_entry++; 1432 } 1433 return DSAF_INVALID_ENTRY_IDX; 1434 } 1435 1436 /** 1437 * hns_dsaf_set_mac_key - set mac key 1438 * @dsaf_dev: dsa fabric device struct pointer 1439 * @mac_key: tcam key pointer 1440 * @vlan_id: vlan id 1441 * @in_port_num: input port num 1442 * @addr: mac addr 1443 */ 1444 static void hns_dsaf_set_mac_key( 1445 struct dsaf_device *dsaf_dev, 1446 struct dsaf_drv_tbl_tcam_key *mac_key, u16 vlan_id, u8 in_port_num, 1447 u8 *addr) 1448 { 1449 u8 port; 1450 1451 if (dsaf_dev->dsaf_mode <= DSAF_MODE_ENABLE) 1452 /*DSAF mode : in port id fixed 0*/ 1453 port = 0; 1454 else 1455 /*non-dsaf mode*/ 1456 port = in_port_num; 1457 1458 mac_key->high.bits.mac_0 = addr[0]; 1459 mac_key->high.bits.mac_1 = addr[1]; 1460 mac_key->high.bits.mac_2 = addr[2]; 1461 mac_key->high.bits.mac_3 = addr[3]; 1462 mac_key->low.bits.mac_4 = addr[4]; 1463 mac_key->low.bits.mac_5 = addr[5]; 1464 mac_key->low.bits.vlan = vlan_id; 1465 mac_key->low.bits.port = port; 1466 } 1467 1468 /** 1469 * hns_dsaf_set_mac_uc_entry - set mac uc-entry 1470 * @dsaf_dev: dsa fabric device struct pointer 1471 * @mac_entry: uc-mac entry 1472 */ 1473 int hns_dsaf_set_mac_uc_entry( 1474 struct dsaf_device *dsaf_dev, 1475 struct dsaf_drv_mac_single_dest_entry *mac_entry) 1476 { 1477 u16 entry_index = DSAF_INVALID_ENTRY_IDX; 1478 struct dsaf_drv_tbl_tcam_key mac_key; 1479 struct dsaf_tbl_tcam_ucast_cfg mac_data; 1480 struct dsaf_drv_priv *priv = 1481 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev); 1482 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl; 1483 1484 /* mac addr check */ 1485 if (MAC_IS_ALL_ZEROS(mac_entry->addr) || 1486 MAC_IS_BROADCAST(mac_entry->addr) || 1487 MAC_IS_MULTICAST(mac_entry->addr)) { 1488 dev_err(dsaf_dev->dev, "set_uc %s Mac %pM err!\n", 1489 dsaf_dev->ae_dev.name, mac_entry->addr); 1490 return -EINVAL; 1491 } 1492 1493 /* config key */ 1494 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id, 1495 mac_entry->in_port_num, mac_entry->addr); 1496 1497 /* entry ie exist? */ 1498 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key); 1499 if (entry_index == DSAF_INVALID_ENTRY_IDX) { 1500 /*if has not inv entry,find a empty entry */ 1501 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev); 1502 if (entry_index == DSAF_INVALID_ENTRY_IDX) { 1503 /* has not empty,return error */ 1504 dev_err(dsaf_dev->dev, 1505 "set_uc_entry failed, %s Mac key(%#x:%#x)\n", 1506 dsaf_dev->ae_dev.name, 1507 mac_key.high.val, mac_key.low.val); 1508 return -EINVAL; 1509 } 1510 } 1511 1512 dev_dbg(dsaf_dev->dev, 1513 "set_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n", 1514 dsaf_dev->ae_dev.name, mac_key.high.val, 1515 mac_key.low.val, entry_index); 1516 1517 /* config hardware entry */ 1518 mac_data.tbl_ucast_item_vld = 1; 1519 mac_data.tbl_ucast_mac_discard = 0; 1520 mac_data.tbl_ucast_old_en = 0; 1521 /* default config dvc to 0 */ 1522 mac_data.tbl_ucast_dvc = 0; 1523 mac_data.tbl_ucast_out_port = mac_entry->port_num; 1524 hns_dsaf_tcam_uc_cfg( 1525 dsaf_dev, entry_index, 1526 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data); 1527 1528 /* config software entry */ 1529 soft_mac_entry += entry_index; 1530 soft_mac_entry->index = entry_index; 1531 soft_mac_entry->tcam_key.high.val = mac_key.high.val; 1532 soft_mac_entry->tcam_key.low.val = mac_key.low.val; 1533 1534 return 0; 1535 } 1536 1537 /** 1538 * hns_dsaf_set_mac_mc_entry - set mac mc-entry 1539 * @dsaf_dev: dsa fabric device struct pointer 1540 * @mac_entry: mc-mac entry 1541 */ 1542 int hns_dsaf_set_mac_mc_entry( 1543 struct dsaf_device *dsaf_dev, 1544 struct dsaf_drv_mac_multi_dest_entry *mac_entry) 1545 { 1546 u16 entry_index = DSAF_INVALID_ENTRY_IDX; 1547 struct dsaf_drv_tbl_tcam_key mac_key; 1548 struct dsaf_tbl_tcam_mcast_cfg mac_data; 1549 struct dsaf_drv_priv *priv = 1550 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev); 1551 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl; 1552 struct dsaf_drv_tbl_tcam_key tmp_mac_key; 1553 1554 /* mac addr check */ 1555 if (MAC_IS_ALL_ZEROS(mac_entry->addr)) { 1556 dev_err(dsaf_dev->dev, "set uc %s Mac %pM err!\n", 1557 dsaf_dev->ae_dev.name, mac_entry->addr); 1558 return -EINVAL; 1559 } 1560 1561 /*config key */ 1562 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, 1563 mac_entry->in_vlan_id, 1564 mac_entry->in_port_num, mac_entry->addr); 1565 1566 /* entry ie exist? */ 1567 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key); 1568 if (entry_index == DSAF_INVALID_ENTRY_IDX) { 1569 /*if hasnot, find enpty entry*/ 1570 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev); 1571 if (entry_index == DSAF_INVALID_ENTRY_IDX) { 1572 /*if hasnot empty, error*/ 1573 dev_err(dsaf_dev->dev, 1574 "set_uc_entry failed, %s Mac key(%#x:%#x)\n", 1575 dsaf_dev->ae_dev.name, 1576 mac_key.high.val, mac_key.low.val); 1577 return -EINVAL; 1578 } 1579 1580 /* config hardware entry */ 1581 memset(mac_data.tbl_mcast_port_msk, 1582 0, sizeof(mac_data.tbl_mcast_port_msk)); 1583 } else { 1584 /* config hardware entry */ 1585 hns_dsaf_tcam_mc_get( 1586 dsaf_dev, entry_index, 1587 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data); 1588 } 1589 mac_data.tbl_mcast_old_en = 0; 1590 mac_data.tbl_mcast_item_vld = 1; 1591 dsaf_set_field(mac_data.tbl_mcast_port_msk[0], 1592 0x3F, 0, mac_entry->port_mask[0]); 1593 1594 dev_dbg(dsaf_dev->dev, 1595 "set_uc_entry, %s key(%#x:%#x) entry_index%d\n", 1596 dsaf_dev->ae_dev.name, mac_key.high.val, 1597 mac_key.low.val, entry_index); 1598 1599 hns_dsaf_tcam_mc_cfg( 1600 dsaf_dev, entry_index, 1601 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data); 1602 1603 /* config software entry */ 1604 soft_mac_entry += entry_index; 1605 soft_mac_entry->index = entry_index; 1606 soft_mac_entry->tcam_key.high.val = mac_key.high.val; 1607 soft_mac_entry->tcam_key.low.val = mac_key.low.val; 1608 1609 return 0; 1610 } 1611 1612 /** 1613 * hns_dsaf_add_mac_mc_port - add mac mc-port 1614 * @dsaf_dev: dsa fabric device struct pointer 1615 * @mac_entry: mc-mac entry 1616 */ 1617 int hns_dsaf_add_mac_mc_port(struct dsaf_device *dsaf_dev, 1618 struct dsaf_drv_mac_single_dest_entry *mac_entry) 1619 { 1620 u16 entry_index = DSAF_INVALID_ENTRY_IDX; 1621 struct dsaf_drv_tbl_tcam_key mac_key; 1622 struct dsaf_tbl_tcam_mcast_cfg mac_data; 1623 struct dsaf_drv_priv *priv = 1624 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev); 1625 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl; 1626 struct dsaf_drv_tbl_tcam_key tmp_mac_key; 1627 int mskid; 1628 1629 /*chechk mac addr */ 1630 if (MAC_IS_ALL_ZEROS(mac_entry->addr)) { 1631 dev_err(dsaf_dev->dev, "set_entry failed,addr %pM!\n", 1632 mac_entry->addr); 1633 return -EINVAL; 1634 } 1635 1636 /*config key */ 1637 hns_dsaf_set_mac_key( 1638 dsaf_dev, &mac_key, mac_entry->in_vlan_id, 1639 mac_entry->in_port_num, mac_entry->addr); 1640 1641 memset(&mac_data, 0, sizeof(struct dsaf_tbl_tcam_mcast_cfg)); 1642 1643 /*check exist? */ 1644 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key); 1645 if (entry_index == DSAF_INVALID_ENTRY_IDX) { 1646 /*if hasnot , find a empty*/ 1647 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev); 1648 if (entry_index == DSAF_INVALID_ENTRY_IDX) { 1649 /*if hasnot empty, error*/ 1650 dev_err(dsaf_dev->dev, 1651 "set_uc_entry failed, %s Mac key(%#x:%#x)\n", 1652 dsaf_dev->ae_dev.name, mac_key.high.val, 1653 mac_key.low.val); 1654 return -EINVAL; 1655 } 1656 } else { 1657 /*if exist, add in */ 1658 hns_dsaf_tcam_mc_get( 1659 dsaf_dev, entry_index, 1660 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data); 1661 } 1662 /* config hardware entry */ 1663 if (mac_entry->port_num < DSAF_SERVICE_NW_NUM) { 1664 mskid = mac_entry->port_num; 1665 } else if (mac_entry->port_num >= DSAF_BASE_INNER_PORT_NUM) { 1666 mskid = mac_entry->port_num - 1667 DSAF_BASE_INNER_PORT_NUM + DSAF_SERVICE_NW_NUM; 1668 } else { 1669 dev_err(dsaf_dev->dev, 1670 "%s,pnum(%d)error,key(%#x:%#x)\n", 1671 dsaf_dev->ae_dev.name, mac_entry->port_num, 1672 mac_key.high.val, mac_key.low.val); 1673 return -EINVAL; 1674 } 1675 dsaf_set_bit(mac_data.tbl_mcast_port_msk[mskid / 32], mskid % 32, 1); 1676 mac_data.tbl_mcast_old_en = 0; 1677 mac_data.tbl_mcast_item_vld = 1; 1678 1679 dev_dbg(dsaf_dev->dev, 1680 "set_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n", 1681 dsaf_dev->ae_dev.name, mac_key.high.val, 1682 mac_key.low.val, entry_index); 1683 1684 hns_dsaf_tcam_mc_cfg( 1685 dsaf_dev, entry_index, 1686 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data); 1687 1688 /*config software entry */ 1689 soft_mac_entry += entry_index; 1690 soft_mac_entry->index = entry_index; 1691 soft_mac_entry->tcam_key.high.val = mac_key.high.val; 1692 soft_mac_entry->tcam_key.low.val = mac_key.low.val; 1693 1694 return 0; 1695 } 1696 1697 /** 1698 * hns_dsaf_del_mac_entry - del mac mc-port 1699 * @dsaf_dev: dsa fabric device struct pointer 1700 * @vlan_id: vlian id 1701 * @in_port_num: input port num 1702 * @addr : mac addr 1703 */ 1704 int hns_dsaf_del_mac_entry(struct dsaf_device *dsaf_dev, u16 vlan_id, 1705 u8 in_port_num, u8 *addr) 1706 { 1707 u16 entry_index = DSAF_INVALID_ENTRY_IDX; 1708 struct dsaf_drv_tbl_tcam_key mac_key; 1709 struct dsaf_drv_priv *priv = 1710 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev); 1711 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl; 1712 1713 /*check mac addr */ 1714 if (MAC_IS_ALL_ZEROS(addr) || MAC_IS_BROADCAST(addr)) { 1715 dev_err(dsaf_dev->dev, "del_entry failed,addr %pM!\n", 1716 addr); 1717 return -EINVAL; 1718 } 1719 1720 /*config key */ 1721 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, vlan_id, in_port_num, addr); 1722 1723 /*exist ?*/ 1724 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key); 1725 if (entry_index == DSAF_INVALID_ENTRY_IDX) { 1726 /*not exist, error */ 1727 dev_err(dsaf_dev->dev, 1728 "del_mac_entry failed, %s Mac key(%#x:%#x)\n", 1729 dsaf_dev->ae_dev.name, 1730 mac_key.high.val, mac_key.low.val); 1731 return -EINVAL; 1732 } 1733 dev_dbg(dsaf_dev->dev, 1734 "del_mac_entry, %s Mac key(%#x:%#x) entry_index%d\n", 1735 dsaf_dev->ae_dev.name, mac_key.high.val, 1736 mac_key.low.val, entry_index); 1737 1738 /*do del opt*/ 1739 hns_dsaf_tcam_mc_invld(dsaf_dev, entry_index); 1740 1741 /*del soft emtry */ 1742 soft_mac_entry += entry_index; 1743 soft_mac_entry->index = DSAF_INVALID_ENTRY_IDX; 1744 1745 return 0; 1746 } 1747 1748 /** 1749 * hns_dsaf_del_mac_mc_port - del mac mc- port 1750 * @dsaf_dev: dsa fabric device struct pointer 1751 * @mac_entry: mac entry 1752 */ 1753 int hns_dsaf_del_mac_mc_port(struct dsaf_device *dsaf_dev, 1754 struct dsaf_drv_mac_single_dest_entry *mac_entry) 1755 { 1756 u16 entry_index = DSAF_INVALID_ENTRY_IDX; 1757 struct dsaf_drv_tbl_tcam_key mac_key; 1758 struct dsaf_drv_priv *priv = 1759 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev); 1760 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl; 1761 u16 vlan_id; 1762 u8 in_port_num; 1763 struct dsaf_tbl_tcam_mcast_cfg mac_data; 1764 struct dsaf_drv_tbl_tcam_key tmp_mac_key; 1765 int mskid; 1766 const u8 empty_msk[sizeof(mac_data.tbl_mcast_port_msk)] = {0}; 1767 1768 if (!(void *)mac_entry) { 1769 dev_err(dsaf_dev->dev, 1770 "hns_dsaf_del_mac_mc_port mac_entry is NULL\n"); 1771 return -EINVAL; 1772 } 1773 1774 /*get key info*/ 1775 vlan_id = mac_entry->in_vlan_id; 1776 in_port_num = mac_entry->in_port_num; 1777 1778 /*check mac addr */ 1779 if (MAC_IS_ALL_ZEROS(mac_entry->addr)) { 1780 dev_err(dsaf_dev->dev, "del_port failed, addr %pM!\n", 1781 mac_entry->addr); 1782 return -EINVAL; 1783 } 1784 1785 /*config key */ 1786 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, vlan_id, in_port_num, 1787 mac_entry->addr); 1788 1789 /*check is exist? */ 1790 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key); 1791 if (entry_index == DSAF_INVALID_ENTRY_IDX) { 1792 /*find none */ 1793 dev_err(dsaf_dev->dev, 1794 "find_soft_mac_entry failed, %s Mac key(%#x:%#x)\n", 1795 dsaf_dev->ae_dev.name, 1796 mac_key.high.val, mac_key.low.val); 1797 return -EINVAL; 1798 } 1799 1800 dev_dbg(dsaf_dev->dev, 1801 "del_mac_mc_port, %s key(%#x:%#x) index%d\n", 1802 dsaf_dev->ae_dev.name, mac_key.high.val, 1803 mac_key.low.val, entry_index); 1804 1805 /*read entry*/ 1806 hns_dsaf_tcam_mc_get( 1807 dsaf_dev, entry_index, 1808 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data); 1809 1810 /*del the port*/ 1811 if (mac_entry->port_num < DSAF_SERVICE_NW_NUM) { 1812 mskid = mac_entry->port_num; 1813 } else if (mac_entry->port_num >= DSAF_BASE_INNER_PORT_NUM) { 1814 mskid = mac_entry->port_num - 1815 DSAF_BASE_INNER_PORT_NUM + DSAF_SERVICE_NW_NUM; 1816 } else { 1817 dev_err(dsaf_dev->dev, 1818 "%s,pnum(%d)error,key(%#x:%#x)\n", 1819 dsaf_dev->ae_dev.name, mac_entry->port_num, 1820 mac_key.high.val, mac_key.low.val); 1821 return -EINVAL; 1822 } 1823 dsaf_set_bit(mac_data.tbl_mcast_port_msk[mskid / 32], mskid % 32, 0); 1824 1825 /*check non port, do del entry */ 1826 if (!memcmp(mac_data.tbl_mcast_port_msk, empty_msk, 1827 sizeof(mac_data.tbl_mcast_port_msk))) { 1828 hns_dsaf_tcam_mc_invld(dsaf_dev, entry_index); 1829 1830 /* del soft entry */ 1831 soft_mac_entry += entry_index; 1832 soft_mac_entry->index = DSAF_INVALID_ENTRY_IDX; 1833 } else { /* not zer, just del port, updata*/ 1834 hns_dsaf_tcam_mc_cfg( 1835 dsaf_dev, entry_index, 1836 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data); 1837 } 1838 1839 return 0; 1840 } 1841 1842 /** 1843 * hns_dsaf_get_mac_uc_entry - get mac uc entry 1844 * @dsaf_dev: dsa fabric device struct pointer 1845 * @mac_entry: mac entry 1846 */ 1847 int hns_dsaf_get_mac_uc_entry(struct dsaf_device *dsaf_dev, 1848 struct dsaf_drv_mac_single_dest_entry *mac_entry) 1849 { 1850 u16 entry_index = DSAF_INVALID_ENTRY_IDX; 1851 struct dsaf_drv_tbl_tcam_key mac_key; 1852 1853 struct dsaf_tbl_tcam_ucast_cfg mac_data; 1854 1855 /* check macaddr */ 1856 if (MAC_IS_ALL_ZEROS(mac_entry->addr) || 1857 MAC_IS_BROADCAST(mac_entry->addr)) { 1858 dev_err(dsaf_dev->dev, "get_entry failed,addr %pM\n", 1859 mac_entry->addr); 1860 return -EINVAL; 1861 } 1862 1863 /*config key */ 1864 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id, 1865 mac_entry->in_port_num, mac_entry->addr); 1866 1867 /*check exist? */ 1868 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key); 1869 if (entry_index == DSAF_INVALID_ENTRY_IDX) { 1870 /*find none, error */ 1871 dev_err(dsaf_dev->dev, 1872 "get_uc_entry failed, %s Mac key(%#x:%#x)\n", 1873 dsaf_dev->ae_dev.name, 1874 mac_key.high.val, mac_key.low.val); 1875 return -EINVAL; 1876 } 1877 dev_dbg(dsaf_dev->dev, 1878 "get_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n", 1879 dsaf_dev->ae_dev.name, mac_key.high.val, 1880 mac_key.low.val, entry_index); 1881 1882 /*read entry*/ 1883 hns_dsaf_tcam_uc_get(dsaf_dev, entry_index, 1884 (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data); 1885 mac_entry->port_num = mac_data.tbl_ucast_out_port; 1886 1887 return 0; 1888 } 1889 1890 /** 1891 * hns_dsaf_get_mac_mc_entry - get mac mc entry 1892 * @dsaf_dev: dsa fabric device struct pointer 1893 * @mac_entry: mac entry 1894 */ 1895 int hns_dsaf_get_mac_mc_entry(struct dsaf_device *dsaf_dev, 1896 struct dsaf_drv_mac_multi_dest_entry *mac_entry) 1897 { 1898 u16 entry_index = DSAF_INVALID_ENTRY_IDX; 1899 struct dsaf_drv_tbl_tcam_key mac_key; 1900 1901 struct dsaf_tbl_tcam_mcast_cfg mac_data; 1902 1903 /*check mac addr */ 1904 if (MAC_IS_ALL_ZEROS(mac_entry->addr) || 1905 MAC_IS_BROADCAST(mac_entry->addr)) { 1906 dev_err(dsaf_dev->dev, "get_entry failed,addr %pM\n", 1907 mac_entry->addr); 1908 return -EINVAL; 1909 } 1910 1911 /*config key */ 1912 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id, 1913 mac_entry->in_port_num, mac_entry->addr); 1914 1915 /*check exist? */ 1916 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key); 1917 if (entry_index == DSAF_INVALID_ENTRY_IDX) { 1918 /* find none, error */ 1919 dev_err(dsaf_dev->dev, 1920 "get_mac_uc_entry failed, %s Mac key(%#x:%#x)\n", 1921 dsaf_dev->ae_dev.name, mac_key.high.val, 1922 mac_key.low.val); 1923 return -EINVAL; 1924 } 1925 dev_dbg(dsaf_dev->dev, 1926 "get_mac_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n", 1927 dsaf_dev->ae_dev.name, mac_key.high.val, 1928 mac_key.low.val, entry_index); 1929 1930 /*read entry */ 1931 hns_dsaf_tcam_mc_get(dsaf_dev, entry_index, 1932 (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data); 1933 1934 mac_entry->port_mask[0] = mac_data.tbl_mcast_port_msk[0] & 0x3F; 1935 return 0; 1936 } 1937 1938 /** 1939 * hns_dsaf_get_mac_entry_by_index - get mac entry by tab index 1940 * @dsaf_dev: dsa fabric device struct pointer 1941 * @entry_index: tab entry index 1942 * @mac_entry: mac entry 1943 */ 1944 int hns_dsaf_get_mac_entry_by_index( 1945 struct dsaf_device *dsaf_dev, 1946 u16 entry_index, struct dsaf_drv_mac_multi_dest_entry *mac_entry) 1947 { 1948 struct dsaf_drv_tbl_tcam_key mac_key; 1949 1950 struct dsaf_tbl_tcam_mcast_cfg mac_data; 1951 struct dsaf_tbl_tcam_ucast_cfg mac_uc_data; 1952 char mac_addr[MAC_NUM_OCTETS_PER_ADDR] = {0}; 1953 1954 if (entry_index >= DSAF_TCAM_SUM) { 1955 /* find none, del error */ 1956 dev_err(dsaf_dev->dev, "get_uc_entry failed, %s\n", 1957 dsaf_dev->ae_dev.name); 1958 return -EINVAL; 1959 } 1960 1961 /* mc entry, do read opt */ 1962 hns_dsaf_tcam_mc_get(dsaf_dev, entry_index, 1963 (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data); 1964 1965 mac_entry->port_mask[0] = mac_data.tbl_mcast_port_msk[0] & 0x3F; 1966 1967 /***get mac addr*/ 1968 mac_addr[0] = mac_key.high.bits.mac_0; 1969 mac_addr[1] = mac_key.high.bits.mac_1; 1970 mac_addr[2] = mac_key.high.bits.mac_2; 1971 mac_addr[3] = mac_key.high.bits.mac_3; 1972 mac_addr[4] = mac_key.low.bits.mac_4; 1973 mac_addr[5] = mac_key.low.bits.mac_5; 1974 /**is mc or uc*/ 1975 if (MAC_IS_MULTICAST((u8 *)mac_addr) || 1976 MAC_IS_L3_MULTICAST((u8 *)mac_addr)) { 1977 /**mc donot do*/ 1978 } else { 1979 /*is not mc, just uc... */ 1980 hns_dsaf_tcam_uc_get(dsaf_dev, entry_index, 1981 (struct dsaf_tbl_tcam_data *)&mac_key, 1982 &mac_uc_data); 1983 mac_entry->port_mask[0] = (1 << mac_uc_data.tbl_ucast_out_port); 1984 } 1985 1986 return 0; 1987 } 1988 1989 static struct dsaf_device *hns_dsaf_alloc_dev(struct device *dev, 1990 size_t sizeof_priv) 1991 { 1992 struct dsaf_device *dsaf_dev; 1993 1994 dsaf_dev = devm_kzalloc(dev, 1995 sizeof(*dsaf_dev) + sizeof_priv, GFP_KERNEL); 1996 if (unlikely(!dsaf_dev)) { 1997 dsaf_dev = ERR_PTR(-ENOMEM); 1998 } else { 1999 dsaf_dev->dev = dev; 2000 dev_set_drvdata(dev, dsaf_dev); 2001 } 2002 2003 return dsaf_dev; 2004 } 2005 2006 /** 2007 * hns_dsaf_free_dev - free dev mem 2008 * @dev: struct device pointer 2009 */ 2010 static void hns_dsaf_free_dev(struct dsaf_device *dsaf_dev) 2011 { 2012 (void)dev_set_drvdata(dsaf_dev->dev, NULL); 2013 } 2014 2015 /** 2016 * dsaf_pfc_unit_cnt - set pfc unit count 2017 * @dsaf_id: dsa fabric id 2018 * @pport_rate: value array 2019 * @pdsaf_pfc_unit_cnt: value array 2020 */ 2021 static void hns_dsaf_pfc_unit_cnt(struct dsaf_device *dsaf_dev, int mac_id, 2022 enum dsaf_port_rate_mode rate) 2023 { 2024 u32 unit_cnt; 2025 2026 switch (rate) { 2027 case DSAF_PORT_RATE_10000: 2028 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_XGE; 2029 break; 2030 case DSAF_PORT_RATE_1000: 2031 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_GE_1000; 2032 break; 2033 case DSAF_PORT_RATE_2500: 2034 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_GE_1000; 2035 break; 2036 default: 2037 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_XGE; 2038 } 2039 2040 dsaf_set_dev_field(dsaf_dev, 2041 (DSAF_PFC_UNIT_CNT_0_REG + 0x4 * (u64)mac_id), 2042 DSAF_PFC_UNINT_CNT_M, DSAF_PFC_UNINT_CNT_S, 2043 unit_cnt); 2044 } 2045 2046 /** 2047 * dsaf_port_work_rate_cfg - fifo 2048 * @dsaf_id: dsa fabric id 2049 * @xge_ge_work_mode 2050 */ 2051 void hns_dsaf_port_work_rate_cfg(struct dsaf_device *dsaf_dev, int mac_id, 2052 enum dsaf_port_rate_mode rate_mode) 2053 { 2054 u32 port_work_mode; 2055 2056 port_work_mode = dsaf_read_dev( 2057 dsaf_dev, DSAF_XGE_GE_WORK_MODE_0_REG + 0x4 * (u64)mac_id); 2058 2059 if (rate_mode == DSAF_PORT_RATE_10000) 2060 dsaf_set_bit(port_work_mode, DSAF_XGE_GE_WORK_MODE_S, 1); 2061 else 2062 dsaf_set_bit(port_work_mode, DSAF_XGE_GE_WORK_MODE_S, 0); 2063 2064 dsaf_write_dev(dsaf_dev, 2065 DSAF_XGE_GE_WORK_MODE_0_REG + 0x4 * (u64)mac_id, 2066 port_work_mode); 2067 2068 hns_dsaf_pfc_unit_cnt(dsaf_dev, mac_id, rate_mode); 2069 } 2070 2071 /** 2072 * hns_dsaf_fix_mac_mode - dsaf modify mac mode 2073 * @mac_cb: mac contrl block 2074 */ 2075 void hns_dsaf_fix_mac_mode(struct hns_mac_cb *mac_cb) 2076 { 2077 enum dsaf_port_rate_mode mode; 2078 struct dsaf_device *dsaf_dev = mac_cb->dsaf_dev; 2079 int mac_id = mac_cb->mac_id; 2080 2081 if (mac_cb->mac_type != HNAE_PORT_SERVICE) 2082 return; 2083 if (mac_cb->phy_if == PHY_INTERFACE_MODE_XGMII) 2084 mode = DSAF_PORT_RATE_10000; 2085 else 2086 mode = DSAF_PORT_RATE_1000; 2087 2088 hns_dsaf_port_work_rate_cfg(dsaf_dev, mac_id, mode); 2089 } 2090 2091 void hns_dsaf_update_stats(struct dsaf_device *dsaf_dev, u32 node_num) 2092 { 2093 struct dsaf_hw_stats *hw_stats 2094 = &dsaf_dev->hw_stats[node_num]; 2095 bool is_ver1 = AE_IS_VER1(dsaf_dev->dsaf_ver); 2096 u32 reg_tmp; 2097 2098 hw_stats->pad_drop += dsaf_read_dev(dsaf_dev, 2099 DSAF_INODE_PAD_DISCARD_NUM_0_REG + 0x80 * (u64)node_num); 2100 hw_stats->man_pkts += dsaf_read_dev(dsaf_dev, 2101 DSAF_INODE_FINAL_IN_MAN_NUM_0_REG + 0x80 * (u64)node_num); 2102 hw_stats->rx_pkts += dsaf_read_dev(dsaf_dev, 2103 DSAF_INODE_FINAL_IN_PKT_NUM_0_REG + 0x80 * (u64)node_num); 2104 hw_stats->rx_pkt_id += dsaf_read_dev(dsaf_dev, 2105 DSAF_INODE_SBM_PID_NUM_0_REG + 0x80 * (u64)node_num); 2106 2107 reg_tmp = is_ver1 ? DSAF_INODE_FINAL_IN_PAUSE_NUM_0_REG : 2108 DSAFV2_INODE_FINAL_IN_PAUSE_NUM_0_REG; 2109 hw_stats->rx_pause_frame += 2110 dsaf_read_dev(dsaf_dev, reg_tmp + 0x80 * (u64)node_num); 2111 2112 hw_stats->release_buf_num += dsaf_read_dev(dsaf_dev, 2113 DSAF_INODE_SBM_RELS_NUM_0_REG + 0x80 * (u64)node_num); 2114 hw_stats->sbm_drop += dsaf_read_dev(dsaf_dev, 2115 DSAF_INODE_SBM_DROP_NUM_0_REG + 0x80 * (u64)node_num); 2116 hw_stats->crc_false += dsaf_read_dev(dsaf_dev, 2117 DSAF_INODE_CRC_FALSE_NUM_0_REG + 0x80 * (u64)node_num); 2118 hw_stats->bp_drop += dsaf_read_dev(dsaf_dev, 2119 DSAF_INODE_BP_DISCARD_NUM_0_REG + 0x80 * (u64)node_num); 2120 hw_stats->rslt_drop += dsaf_read_dev(dsaf_dev, 2121 DSAF_INODE_RSLT_DISCARD_NUM_0_REG + 0x80 * (u64)node_num); 2122 hw_stats->local_addr_false += dsaf_read_dev(dsaf_dev, 2123 DSAF_INODE_LOCAL_ADDR_FALSE_NUM_0_REG + 0x80 * (u64)node_num); 2124 2125 hw_stats->vlan_drop += dsaf_read_dev(dsaf_dev, 2126 DSAF_INODE_SW_VLAN_TAG_DISC_0_REG + 0x80 * (u64)node_num); 2127 hw_stats->stp_drop += dsaf_read_dev(dsaf_dev, 2128 DSAF_INODE_IN_DATA_STP_DISC_0_REG + 0x80 * (u64)node_num); 2129 2130 hw_stats->tx_pkts += dsaf_read_dev(dsaf_dev, 2131 DSAF_XOD_RCVPKT_CNT_0_REG + 0x90 * (u64)node_num); 2132 } 2133 2134 /** 2135 *hns_dsaf_get_regs - dump dsaf regs 2136 *@dsaf_dev: dsaf device 2137 *@data:data for value of regs 2138 */ 2139 void hns_dsaf_get_regs(struct dsaf_device *ddev, u32 port, void *data) 2140 { 2141 u32 i = 0; 2142 u32 j; 2143 u32 *p = data; 2144 u32 reg_tmp; 2145 bool is_ver1 = AE_IS_VER1(ddev->dsaf_ver); 2146 2147 /* dsaf common registers */ 2148 p[0] = dsaf_read_dev(ddev, DSAF_SRAM_INIT_OVER_0_REG); 2149 p[1] = dsaf_read_dev(ddev, DSAF_CFG_0_REG); 2150 p[2] = dsaf_read_dev(ddev, DSAF_ECC_ERR_INVERT_0_REG); 2151 p[3] = dsaf_read_dev(ddev, DSAF_ABNORMAL_TIMEOUT_0_REG); 2152 p[4] = dsaf_read_dev(ddev, DSAF_FSM_TIMEOUT_0_REG); 2153 p[5] = dsaf_read_dev(ddev, DSAF_DSA_REG_CNT_CLR_CE_REG); 2154 p[6] = dsaf_read_dev(ddev, DSAF_DSA_SBM_INF_FIFO_THRD_REG); 2155 p[7] = dsaf_read_dev(ddev, DSAF_DSA_SRAM_1BIT_ECC_SEL_REG); 2156 p[8] = dsaf_read_dev(ddev, DSAF_DSA_SRAM_1BIT_ECC_CNT_REG); 2157 2158 p[9] = dsaf_read_dev(ddev, DSAF_PFC_EN_0_REG + port * 4); 2159 p[10] = dsaf_read_dev(ddev, DSAF_PFC_UNIT_CNT_0_REG + port * 4); 2160 p[11] = dsaf_read_dev(ddev, DSAF_XGE_INT_MSK_0_REG + port * 4); 2161 p[12] = dsaf_read_dev(ddev, DSAF_XGE_INT_SRC_0_REG + port * 4); 2162 p[13] = dsaf_read_dev(ddev, DSAF_XGE_INT_STS_0_REG + port * 4); 2163 p[14] = dsaf_read_dev(ddev, DSAF_XGE_INT_MSK_0_REG + port * 4); 2164 p[15] = dsaf_read_dev(ddev, DSAF_PPE_INT_MSK_0_REG + port * 4); 2165 p[16] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_MSK_0_REG + port * 4); 2166 p[17] = dsaf_read_dev(ddev, DSAF_XGE_INT_SRC_0_REG + port * 4); 2167 p[18] = dsaf_read_dev(ddev, DSAF_PPE_INT_SRC_0_REG + port * 4); 2168 p[19] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_SRC_0_REG + port * 4); 2169 p[20] = dsaf_read_dev(ddev, DSAF_XGE_INT_STS_0_REG + port * 4); 2170 p[21] = dsaf_read_dev(ddev, DSAF_PPE_INT_STS_0_REG + port * 4); 2171 p[22] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_STS_0_REG + port * 4); 2172 p[23] = dsaf_read_dev(ddev, DSAF_PPE_QID_CFG_0_REG + port * 4); 2173 2174 for (i = 0; i < DSAF_SW_PORT_NUM; i++) 2175 p[24 + i] = dsaf_read_dev(ddev, 2176 DSAF_SW_PORT_TYPE_0_REG + i * 4); 2177 2178 p[32] = dsaf_read_dev(ddev, DSAF_MIX_DEF_QID_0_REG + port * 4); 2179 2180 for (i = 0; i < DSAF_SW_PORT_NUM; i++) 2181 p[33 + i] = dsaf_read_dev(ddev, 2182 DSAF_PORT_DEF_VLAN_0_REG + i * 4); 2183 2184 for (i = 0; i < DSAF_TOTAL_QUEUE_NUM; i++) 2185 p[41 + i] = dsaf_read_dev(ddev, 2186 DSAF_VM_DEF_VLAN_0_REG + i * 4); 2187 2188 /* dsaf inode registers */ 2189 p[170] = dsaf_read_dev(ddev, DSAF_INODE_CUT_THROUGH_CFG_0_REG); 2190 2191 p[171] = dsaf_read_dev(ddev, 2192 DSAF_INODE_ECC_ERR_ADDR_0_REG + port * 0x80); 2193 2194 for (i = 0; i < DSAF_INODE_NUM / DSAF_COMM_CHN; i++) { 2195 j = i * DSAF_COMM_CHN + port; 2196 p[172 + i] = dsaf_read_dev(ddev, 2197 DSAF_INODE_IN_PORT_NUM_0_REG + j * 0x80); 2198 p[175 + i] = dsaf_read_dev(ddev, 2199 DSAF_INODE_PRI_TC_CFG_0_REG + j * 0x80); 2200 p[178 + i] = dsaf_read_dev(ddev, 2201 DSAF_INODE_BP_STATUS_0_REG + j * 0x80); 2202 p[181 + i] = dsaf_read_dev(ddev, 2203 DSAF_INODE_PAD_DISCARD_NUM_0_REG + j * 0x80); 2204 p[184 + i] = dsaf_read_dev(ddev, 2205 DSAF_INODE_FINAL_IN_MAN_NUM_0_REG + j * 0x80); 2206 p[187 + i] = dsaf_read_dev(ddev, 2207 DSAF_INODE_FINAL_IN_PKT_NUM_0_REG + j * 0x80); 2208 p[190 + i] = dsaf_read_dev(ddev, 2209 DSAF_INODE_SBM_PID_NUM_0_REG + j * 0x80); 2210 reg_tmp = is_ver1 ? DSAF_INODE_FINAL_IN_PAUSE_NUM_0_REG : 2211 DSAFV2_INODE_FINAL_IN_PAUSE_NUM_0_REG; 2212 p[193 + i] = dsaf_read_dev(ddev, reg_tmp + j * 0x80); 2213 p[196 + i] = dsaf_read_dev(ddev, 2214 DSAF_INODE_SBM_RELS_NUM_0_REG + j * 0x80); 2215 p[199 + i] = dsaf_read_dev(ddev, 2216 DSAF_INODE_SBM_DROP_NUM_0_REG + j * 0x80); 2217 p[202 + i] = dsaf_read_dev(ddev, 2218 DSAF_INODE_CRC_FALSE_NUM_0_REG + j * 0x80); 2219 p[205 + i] = dsaf_read_dev(ddev, 2220 DSAF_INODE_BP_DISCARD_NUM_0_REG + j * 0x80); 2221 p[208 + i] = dsaf_read_dev(ddev, 2222 DSAF_INODE_RSLT_DISCARD_NUM_0_REG + j * 0x80); 2223 p[211 + i] = dsaf_read_dev(ddev, 2224 DSAF_INODE_LOCAL_ADDR_FALSE_NUM_0_REG + j * 0x80); 2225 p[214 + i] = dsaf_read_dev(ddev, 2226 DSAF_INODE_VOQ_OVER_NUM_0_REG + j * 0x80); 2227 p[217 + i] = dsaf_read_dev(ddev, 2228 DSAF_INODE_BD_SAVE_STATUS_0_REG + j * 4); 2229 p[220 + i] = dsaf_read_dev(ddev, 2230 DSAF_INODE_BD_ORDER_STATUS_0_REG + j * 4); 2231 p[223 + i] = dsaf_read_dev(ddev, 2232 DSAF_INODE_SW_VLAN_TAG_DISC_0_REG + j * 4); 2233 p[224 + i] = dsaf_read_dev(ddev, 2234 DSAF_INODE_IN_DATA_STP_DISC_0_REG + j * 4); 2235 } 2236 2237 p[227] = dsaf_read_dev(ddev, DSAF_INODE_GE_FC_EN_0_REG + port * 4); 2238 2239 for (i = 0; i < DSAF_INODE_NUM / DSAF_COMM_CHN; i++) { 2240 j = i * DSAF_COMM_CHN + port; 2241 p[228 + i] = dsaf_read_dev(ddev, 2242 DSAF_INODE_VC0_IN_PKT_NUM_0_REG + j * 4); 2243 } 2244 2245 p[231] = dsaf_read_dev(ddev, 2246 DSAF_INODE_VC1_IN_PKT_NUM_0_REG + port * 4); 2247 2248 /* dsaf inode registers */ 2249 for (i = 0; i < HNS_DSAF_SBM_NUM(ddev) / DSAF_COMM_CHN; i++) { 2250 j = i * DSAF_COMM_CHN + port; 2251 p[232 + i] = dsaf_read_dev(ddev, 2252 DSAF_SBM_CFG_REG_0_REG + j * 0x80); 2253 p[235 + i] = dsaf_read_dev(ddev, 2254 DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + j * 0x80); 2255 p[238 + i] = dsaf_read_dev(ddev, 2256 DSAF_SBM_BP_CFG_1_REG_0_REG + j * 0x80); 2257 p[241 + i] = dsaf_read_dev(ddev, 2258 DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + j * 0x80); 2259 p[244 + i] = dsaf_read_dev(ddev, 2260 DSAF_SBM_FREE_CNT_0_0_REG + j * 0x80); 2261 p[245 + i] = dsaf_read_dev(ddev, 2262 DSAF_SBM_FREE_CNT_1_0_REG + j * 0x80); 2263 p[248 + i] = dsaf_read_dev(ddev, 2264 DSAF_SBM_BP_CNT_0_0_REG + j * 0x80); 2265 p[251 + i] = dsaf_read_dev(ddev, 2266 DSAF_SBM_BP_CNT_1_0_REG + j * 0x80); 2267 p[254 + i] = dsaf_read_dev(ddev, 2268 DSAF_SBM_BP_CNT_2_0_REG + j * 0x80); 2269 p[257 + i] = dsaf_read_dev(ddev, 2270 DSAF_SBM_BP_CNT_3_0_REG + j * 0x80); 2271 p[260 + i] = dsaf_read_dev(ddev, 2272 DSAF_SBM_INER_ST_0_REG + j * 0x80); 2273 p[263 + i] = dsaf_read_dev(ddev, 2274 DSAF_SBM_MIB_REQ_FAILED_TC_0_REG + j * 0x80); 2275 p[266 + i] = dsaf_read_dev(ddev, 2276 DSAF_SBM_LNK_INPORT_CNT_0_REG + j * 0x80); 2277 p[269 + i] = dsaf_read_dev(ddev, 2278 DSAF_SBM_LNK_DROP_CNT_0_REG + j * 0x80); 2279 p[272 + i] = dsaf_read_dev(ddev, 2280 DSAF_SBM_INF_OUTPORT_CNT_0_REG + j * 0x80); 2281 p[275 + i] = dsaf_read_dev(ddev, 2282 DSAF_SBM_LNK_INPORT_TC0_CNT_0_REG + j * 0x80); 2283 p[278 + i] = dsaf_read_dev(ddev, 2284 DSAF_SBM_LNK_INPORT_TC1_CNT_0_REG + j * 0x80); 2285 p[281 + i] = dsaf_read_dev(ddev, 2286 DSAF_SBM_LNK_INPORT_TC2_CNT_0_REG + j * 0x80); 2287 p[284 + i] = dsaf_read_dev(ddev, 2288 DSAF_SBM_LNK_INPORT_TC3_CNT_0_REG + j * 0x80); 2289 p[287 + i] = dsaf_read_dev(ddev, 2290 DSAF_SBM_LNK_INPORT_TC4_CNT_0_REG + j * 0x80); 2291 p[290 + i] = dsaf_read_dev(ddev, 2292 DSAF_SBM_LNK_INPORT_TC5_CNT_0_REG + j * 0x80); 2293 p[293 + i] = dsaf_read_dev(ddev, 2294 DSAF_SBM_LNK_INPORT_TC6_CNT_0_REG + j * 0x80); 2295 p[296 + i] = dsaf_read_dev(ddev, 2296 DSAF_SBM_LNK_INPORT_TC7_CNT_0_REG + j * 0x80); 2297 p[299 + i] = dsaf_read_dev(ddev, 2298 DSAF_SBM_LNK_REQ_CNT_0_REG + j * 0x80); 2299 p[302 + i] = dsaf_read_dev(ddev, 2300 DSAF_SBM_LNK_RELS_CNT_0_REG + j * 0x80); 2301 p[305 + i] = dsaf_read_dev(ddev, 2302 DSAF_SBM_BP_CFG_3_REG_0_REG + j * 0x80); 2303 p[308 + i] = dsaf_read_dev(ddev, 2304 DSAF_SBM_BP_CFG_4_REG_0_REG + j * 0x80); 2305 } 2306 2307 /* dsaf onode registers */ 2308 for (i = 0; i < DSAF_XOD_NUM; i++) { 2309 p[311 + i] = dsaf_read_dev(ddev, 2310 DSAF_XOD_ETS_TSA_TC0_TC3_CFG_0_REG + i * 0x90); 2311 p[319 + i] = dsaf_read_dev(ddev, 2312 DSAF_XOD_ETS_TSA_TC4_TC7_CFG_0_REG + i * 0x90); 2313 p[327 + i] = dsaf_read_dev(ddev, 2314 DSAF_XOD_ETS_BW_TC0_TC3_CFG_0_REG + i * 0x90); 2315 p[335 + i] = dsaf_read_dev(ddev, 2316 DSAF_XOD_ETS_BW_TC4_TC7_CFG_0_REG + i * 0x90); 2317 p[343 + i] = dsaf_read_dev(ddev, 2318 DSAF_XOD_ETS_BW_OFFSET_CFG_0_REG + i * 0x90); 2319 p[351 + i] = dsaf_read_dev(ddev, 2320 DSAF_XOD_ETS_TOKEN_CFG_0_REG + i * 0x90); 2321 } 2322 2323 p[359] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_0_0_REG + port * 0x90); 2324 p[360] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_1_0_REG + port * 0x90); 2325 p[361] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_2_0_REG + port * 0x90); 2326 2327 for (i = 0; i < DSAF_XOD_BIG_NUM / DSAF_COMM_CHN; i++) { 2328 j = i * DSAF_COMM_CHN + port; 2329 p[362 + i] = dsaf_read_dev(ddev, 2330 DSAF_XOD_GNT_L_0_REG + j * 0x90); 2331 p[365 + i] = dsaf_read_dev(ddev, 2332 DSAF_XOD_GNT_H_0_REG + j * 0x90); 2333 p[368 + i] = dsaf_read_dev(ddev, 2334 DSAF_XOD_CONNECT_STATE_0_REG + j * 0x90); 2335 p[371 + i] = dsaf_read_dev(ddev, 2336 DSAF_XOD_RCVPKT_CNT_0_REG + j * 0x90); 2337 p[374 + i] = dsaf_read_dev(ddev, 2338 DSAF_XOD_RCVTC0_CNT_0_REG + j * 0x90); 2339 p[377 + i] = dsaf_read_dev(ddev, 2340 DSAF_XOD_RCVTC1_CNT_0_REG + j * 0x90); 2341 p[380 + i] = dsaf_read_dev(ddev, 2342 DSAF_XOD_RCVTC2_CNT_0_REG + j * 0x90); 2343 p[383 + i] = dsaf_read_dev(ddev, 2344 DSAF_XOD_RCVTC3_CNT_0_REG + j * 0x90); 2345 p[386 + i] = dsaf_read_dev(ddev, 2346 DSAF_XOD_RCVVC0_CNT_0_REG + j * 0x90); 2347 p[389 + i] = dsaf_read_dev(ddev, 2348 DSAF_XOD_RCVVC1_CNT_0_REG + j * 0x90); 2349 } 2350 2351 p[392] = dsaf_read_dev(ddev, 2352 DSAF_XOD_XGE_RCVIN0_CNT_0_REG + port * 0x90); 2353 p[393] = dsaf_read_dev(ddev, 2354 DSAF_XOD_XGE_RCVIN1_CNT_0_REG + port * 0x90); 2355 p[394] = dsaf_read_dev(ddev, 2356 DSAF_XOD_XGE_RCVIN2_CNT_0_REG + port * 0x90); 2357 p[395] = dsaf_read_dev(ddev, 2358 DSAF_XOD_XGE_RCVIN3_CNT_0_REG + port * 0x90); 2359 p[396] = dsaf_read_dev(ddev, 2360 DSAF_XOD_XGE_RCVIN4_CNT_0_REG + port * 0x90); 2361 p[397] = dsaf_read_dev(ddev, 2362 DSAF_XOD_XGE_RCVIN5_CNT_0_REG + port * 0x90); 2363 p[398] = dsaf_read_dev(ddev, 2364 DSAF_XOD_XGE_RCVIN6_CNT_0_REG + port * 0x90); 2365 p[399] = dsaf_read_dev(ddev, 2366 DSAF_XOD_XGE_RCVIN7_CNT_0_REG + port * 0x90); 2367 p[400] = dsaf_read_dev(ddev, 2368 DSAF_XOD_PPE_RCVIN0_CNT_0_REG + port * 0x90); 2369 p[401] = dsaf_read_dev(ddev, 2370 DSAF_XOD_PPE_RCVIN1_CNT_0_REG + port * 0x90); 2371 p[402] = dsaf_read_dev(ddev, 2372 DSAF_XOD_ROCEE_RCVIN0_CNT_0_REG + port * 0x90); 2373 p[403] = dsaf_read_dev(ddev, 2374 DSAF_XOD_ROCEE_RCVIN1_CNT_0_REG + port * 0x90); 2375 p[404] = dsaf_read_dev(ddev, 2376 DSAF_XOD_FIFO_STATUS_0_REG + port * 0x90); 2377 2378 /* dsaf voq registers */ 2379 for (i = 0; i < DSAF_VOQ_NUM / DSAF_COMM_CHN; i++) { 2380 j = (i * DSAF_COMM_CHN + port) * 0x90; 2381 p[405 + i] = dsaf_read_dev(ddev, 2382 DSAF_VOQ_ECC_INVERT_EN_0_REG + j); 2383 p[408 + i] = dsaf_read_dev(ddev, 2384 DSAF_VOQ_SRAM_PKT_NUM_0_REG + j); 2385 p[411 + i] = dsaf_read_dev(ddev, DSAF_VOQ_IN_PKT_NUM_0_REG + j); 2386 p[414 + i] = dsaf_read_dev(ddev, 2387 DSAF_VOQ_OUT_PKT_NUM_0_REG + j); 2388 p[417 + i] = dsaf_read_dev(ddev, 2389 DSAF_VOQ_ECC_ERR_ADDR_0_REG + j); 2390 p[420 + i] = dsaf_read_dev(ddev, DSAF_VOQ_BP_STATUS_0_REG + j); 2391 p[423 + i] = dsaf_read_dev(ddev, DSAF_VOQ_SPUP_IDLE_0_REG + j); 2392 p[426 + i] = dsaf_read_dev(ddev, 2393 DSAF_VOQ_XGE_XOD_REQ_0_0_REG + j); 2394 p[429 + i] = dsaf_read_dev(ddev, 2395 DSAF_VOQ_XGE_XOD_REQ_1_0_REG + j); 2396 p[432 + i] = dsaf_read_dev(ddev, 2397 DSAF_VOQ_PPE_XOD_REQ_0_REG + j); 2398 p[435 + i] = dsaf_read_dev(ddev, 2399 DSAF_VOQ_ROCEE_XOD_REQ_0_REG + j); 2400 p[438 + i] = dsaf_read_dev(ddev, 2401 DSAF_VOQ_BP_ALL_THRD_0_REG + j); 2402 } 2403 2404 /* dsaf tbl registers */ 2405 p[441] = dsaf_read_dev(ddev, DSAF_TBL_CTRL_0_REG); 2406 p[442] = dsaf_read_dev(ddev, DSAF_TBL_INT_MSK_0_REG); 2407 p[443] = dsaf_read_dev(ddev, DSAF_TBL_INT_SRC_0_REG); 2408 p[444] = dsaf_read_dev(ddev, DSAF_TBL_INT_STS_0_REG); 2409 p[445] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_ADDR_0_REG); 2410 p[446] = dsaf_read_dev(ddev, DSAF_TBL_LINE_ADDR_0_REG); 2411 p[447] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_HIGH_0_REG); 2412 p[448] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_LOW_0_REG); 2413 p[449] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG); 2414 p[450] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG); 2415 p[451] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG); 2416 p[452] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG); 2417 p[453] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG); 2418 p[454] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_UCAST_CFG_0_REG); 2419 p[455] = dsaf_read_dev(ddev, DSAF_TBL_LIN_CFG_0_REG); 2420 p[456] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG); 2421 p[457] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RDATA_LOW_0_REG); 2422 p[458] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA4_0_REG); 2423 p[459] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA3_0_REG); 2424 p[460] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA2_0_REG); 2425 p[461] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA1_0_REG); 2426 p[462] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA0_0_REG); 2427 p[463] = dsaf_read_dev(ddev, DSAF_TBL_LIN_RDATA_0_REG); 2428 2429 for (i = 0; i < DSAF_SW_PORT_NUM; i++) { 2430 j = i * 0x8; 2431 p[464 + 2 * i] = dsaf_read_dev(ddev, 2432 DSAF_TBL_DA0_MIS_INFO1_0_REG + j); 2433 p[465 + 2 * i] = dsaf_read_dev(ddev, 2434 DSAF_TBL_DA0_MIS_INFO0_0_REG + j); 2435 } 2436 2437 p[480] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO2_0_REG); 2438 p[481] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO1_0_REG); 2439 p[482] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO0_0_REG); 2440 p[483] = dsaf_read_dev(ddev, DSAF_TBL_PUL_0_REG); 2441 p[484] = dsaf_read_dev(ddev, DSAF_TBL_OLD_RSLT_0_REG); 2442 p[485] = dsaf_read_dev(ddev, DSAF_TBL_OLD_SCAN_VAL_0_REG); 2443 p[486] = dsaf_read_dev(ddev, DSAF_TBL_DFX_CTRL_0_REG); 2444 p[487] = dsaf_read_dev(ddev, DSAF_TBL_DFX_STAT_0_REG); 2445 p[488] = dsaf_read_dev(ddev, DSAF_TBL_DFX_STAT_2_0_REG); 2446 p[489] = dsaf_read_dev(ddev, DSAF_TBL_LKUP_NUM_I_0_REG); 2447 p[490] = dsaf_read_dev(ddev, DSAF_TBL_LKUP_NUM_O_0_REG); 2448 p[491] = dsaf_read_dev(ddev, DSAF_TBL_UCAST_BCAST_MIS_INFO_0_0_REG); 2449 2450 /* dsaf other registers */ 2451 p[492] = dsaf_read_dev(ddev, DSAF_INODE_FIFO_WL_0_REG + port * 0x4); 2452 p[493] = dsaf_read_dev(ddev, DSAF_ONODE_FIFO_WL_0_REG + port * 0x4); 2453 p[494] = dsaf_read_dev(ddev, DSAF_XGE_GE_WORK_MODE_0_REG + port * 0x4); 2454 p[495] = dsaf_read_dev(ddev, 2455 DSAF_XGE_APP_RX_LINK_UP_0_REG + port * 0x4); 2456 p[496] = dsaf_read_dev(ddev, DSAF_NETPORT_CTRL_SIG_0_REG + port * 0x4); 2457 p[497] = dsaf_read_dev(ddev, DSAF_XGE_CTRL_SIG_CFG_0_REG + port * 0x4); 2458 2459 if (!is_ver1) 2460 p[498] = dsaf_read_dev(ddev, DSAF_PAUSE_CFG_REG + port * 0x4); 2461 2462 /* mark end of dsaf regs */ 2463 for (i = 499; i < 504; i++) 2464 p[i] = 0xdddddddd; 2465 } 2466 2467 static char *hns_dsaf_get_node_stats_strings(char *data, int node) 2468 { 2469 char *buff = data; 2470 2471 snprintf(buff, ETH_GSTRING_LEN, "innod%d_pad_drop_pkts", node); 2472 buff = buff + ETH_GSTRING_LEN; 2473 snprintf(buff, ETH_GSTRING_LEN, "innod%d_manage_pkts", node); 2474 buff = buff + ETH_GSTRING_LEN; 2475 snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pkts", node); 2476 buff = buff + ETH_GSTRING_LEN; 2477 snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pkt_id", node); 2478 buff = buff + ETH_GSTRING_LEN; 2479 snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pause_frame", node); 2480 buff = buff + ETH_GSTRING_LEN; 2481 snprintf(buff, ETH_GSTRING_LEN, "innod%d_release_buf_num", node); 2482 buff = buff + ETH_GSTRING_LEN; 2483 snprintf(buff, ETH_GSTRING_LEN, "innod%d_sbm_drop_pkts", node); 2484 buff = buff + ETH_GSTRING_LEN; 2485 snprintf(buff, ETH_GSTRING_LEN, "innod%d_crc_false_pkts", node); 2486 buff = buff + ETH_GSTRING_LEN; 2487 snprintf(buff, ETH_GSTRING_LEN, "innod%d_bp_drop_pkts", node); 2488 buff = buff + ETH_GSTRING_LEN; 2489 snprintf(buff, ETH_GSTRING_LEN, "innod%d_lookup_rslt_drop_pkts", node); 2490 buff = buff + ETH_GSTRING_LEN; 2491 snprintf(buff, ETH_GSTRING_LEN, "innod%d_local_rslt_fail_pkts", node); 2492 buff = buff + ETH_GSTRING_LEN; 2493 snprintf(buff, ETH_GSTRING_LEN, "innod%d_vlan_drop_pkts", node); 2494 buff = buff + ETH_GSTRING_LEN; 2495 snprintf(buff, ETH_GSTRING_LEN, "innod%d_stp_drop_pkts", node); 2496 buff = buff + ETH_GSTRING_LEN; 2497 snprintf(buff, ETH_GSTRING_LEN, "onnod%d_tx_pkts", node); 2498 buff = buff + ETH_GSTRING_LEN; 2499 2500 return buff; 2501 } 2502 2503 static u64 *hns_dsaf_get_node_stats(struct dsaf_device *ddev, u64 *data, 2504 int node_num) 2505 { 2506 u64 *p = data; 2507 struct dsaf_hw_stats *hw_stats = &ddev->hw_stats[node_num]; 2508 2509 p[0] = hw_stats->pad_drop; 2510 p[1] = hw_stats->man_pkts; 2511 p[2] = hw_stats->rx_pkts; 2512 p[3] = hw_stats->rx_pkt_id; 2513 p[4] = hw_stats->rx_pause_frame; 2514 p[5] = hw_stats->release_buf_num; 2515 p[6] = hw_stats->sbm_drop; 2516 p[7] = hw_stats->crc_false; 2517 p[8] = hw_stats->bp_drop; 2518 p[9] = hw_stats->rslt_drop; 2519 p[10] = hw_stats->local_addr_false; 2520 p[11] = hw_stats->vlan_drop; 2521 p[12] = hw_stats->stp_drop; 2522 p[13] = hw_stats->tx_pkts; 2523 2524 return &p[14]; 2525 } 2526 2527 /** 2528 *hns_dsaf_get_stats - get dsaf statistic 2529 *@ddev: dsaf device 2530 *@data:statistic value 2531 *@port: port num 2532 */ 2533 void hns_dsaf_get_stats(struct dsaf_device *ddev, u64 *data, int port) 2534 { 2535 u64 *p = data; 2536 int node_num = port; 2537 2538 /* for ge/xge node info */ 2539 p = hns_dsaf_get_node_stats(ddev, p, node_num); 2540 2541 /* for ppe node info */ 2542 node_num = port + DSAF_PPE_INODE_BASE; 2543 (void)hns_dsaf_get_node_stats(ddev, p, node_num); 2544 } 2545 2546 /** 2547 *hns_dsaf_get_sset_count - get dsaf string set count 2548 *@stringset: type of values in data 2549 *return dsaf string name count 2550 */ 2551 int hns_dsaf_get_sset_count(int stringset) 2552 { 2553 if (stringset == ETH_SS_STATS) 2554 return DSAF_STATIC_NUM; 2555 2556 return 0; 2557 } 2558 2559 /** 2560 *hns_dsaf_get_strings - get dsaf string set 2561 *@stringset:srting set index 2562 *@data:strings name value 2563 *@port:port index 2564 */ 2565 void hns_dsaf_get_strings(int stringset, u8 *data, int port) 2566 { 2567 char *buff = (char *)data; 2568 int node = port; 2569 2570 if (stringset != ETH_SS_STATS) 2571 return; 2572 2573 /* for ge/xge node info */ 2574 buff = hns_dsaf_get_node_stats_strings(buff, node); 2575 2576 /* for ppe node info */ 2577 node = port + DSAF_PPE_INODE_BASE; 2578 (void)hns_dsaf_get_node_stats_strings(buff, node); 2579 } 2580 2581 /** 2582 *hns_dsaf_get_sset_count - get dsaf regs count 2583 *return dsaf regs count 2584 */ 2585 int hns_dsaf_get_regs_count(void) 2586 { 2587 return DSAF_DUMP_REGS_NUM; 2588 } 2589 2590 /** 2591 * dsaf_probe - probo dsaf dev 2592 * @pdev: dasf platform device 2593 * retuen 0 - success , negative --fail 2594 */ 2595 static int hns_dsaf_probe(struct platform_device *pdev) 2596 { 2597 struct dsaf_device *dsaf_dev; 2598 int ret; 2599 2600 dsaf_dev = hns_dsaf_alloc_dev(&pdev->dev, sizeof(struct dsaf_drv_priv)); 2601 if (IS_ERR(dsaf_dev)) { 2602 ret = PTR_ERR(dsaf_dev); 2603 dev_err(&pdev->dev, 2604 "dsaf_probe dsaf_alloc_dev failed, ret = %#x!\n", ret); 2605 return ret; 2606 } 2607 2608 ret = hns_dsaf_get_cfg(dsaf_dev); 2609 if (ret) 2610 goto free_dev; 2611 2612 ret = hns_dsaf_init(dsaf_dev); 2613 if (ret) 2614 goto free_cfg; 2615 2616 ret = hns_mac_init(dsaf_dev); 2617 if (ret) 2618 goto uninit_dsaf; 2619 2620 ret = hns_ppe_init(dsaf_dev); 2621 if (ret) 2622 goto uninit_mac; 2623 2624 ret = hns_dsaf_ae_init(dsaf_dev); 2625 if (ret) 2626 goto uninit_ppe; 2627 2628 return 0; 2629 2630 uninit_ppe: 2631 hns_ppe_uninit(dsaf_dev); 2632 2633 uninit_mac: 2634 hns_mac_uninit(dsaf_dev); 2635 2636 uninit_dsaf: 2637 hns_dsaf_free(dsaf_dev); 2638 2639 free_cfg: 2640 hns_dsaf_free_cfg(dsaf_dev); 2641 2642 free_dev: 2643 hns_dsaf_free_dev(dsaf_dev); 2644 2645 return ret; 2646 } 2647 2648 /** 2649 * dsaf_remove - remove dsaf dev 2650 * @pdev: dasf platform device 2651 */ 2652 static int hns_dsaf_remove(struct platform_device *pdev) 2653 { 2654 struct dsaf_device *dsaf_dev = dev_get_drvdata(&pdev->dev); 2655 2656 hns_dsaf_ae_uninit(dsaf_dev); 2657 2658 hns_ppe_uninit(dsaf_dev); 2659 2660 hns_mac_uninit(dsaf_dev); 2661 2662 hns_dsaf_free(dsaf_dev); 2663 2664 hns_dsaf_free_cfg(dsaf_dev); 2665 2666 hns_dsaf_free_dev(dsaf_dev); 2667 2668 return 0; 2669 } 2670 2671 static const struct of_device_id g_dsaf_match[] = { 2672 {.compatible = "hisilicon,hns-dsaf-v1"}, 2673 {.compatible = "hisilicon,hns-dsaf-v2"}, 2674 {} 2675 }; 2676 2677 static struct platform_driver g_dsaf_driver = { 2678 .probe = hns_dsaf_probe, 2679 .remove = hns_dsaf_remove, 2680 .driver = { 2681 .name = DSAF_DRV_NAME, 2682 .of_match_table = g_dsaf_match, 2683 }, 2684 }; 2685 2686 module_platform_driver(g_dsaf_driver); 2687 2688 MODULE_LICENSE("GPL"); 2689 MODULE_AUTHOR("Huawei Tech. Co., Ltd."); 2690 MODULE_DESCRIPTION("HNS DSAF driver"); 2691 MODULE_VERSION(DSAF_MOD_VERSION); 2692