1 // SPDX-License-Identifier: GPL-2.0+ 2 // Copyright (c) 2024 Hisilicon Limited. 3 4 #include <linux/etherdevice.h> 5 #include <linux/netdevice.h> 6 #include <linux/phy.h> 7 #include <linux/rtnetlink.h> 8 #include "hbg_common.h" 9 #include "hbg_err.h" 10 #include "hbg_hw.h" 11 12 static void hbg_restore_mac_table(struct hbg_priv *priv) 13 { 14 struct hbg_mac_filter *filter = &priv->filter; 15 u64 addr; 16 u32 i; 17 18 for (i = 0; i < filter->table_max_len; i++) 19 if (!is_zero_ether_addr(filter->mac_table[i].addr)) { 20 addr = ether_addr_to_u64(filter->mac_table[i].addr); 21 hbg_hw_set_uc_addr(priv, addr, i); 22 } 23 24 hbg_hw_set_mac_filter_enable(priv, priv->filter.enabled); 25 } 26 27 static void hbg_restore_user_def_settings(struct hbg_priv *priv) 28 { 29 /* The index of host mac is always 0. */ 30 u64 rx_pause_addr = ether_addr_to_u64(priv->filter.mac_table[0].addr); 31 struct ethtool_pauseparam *pause_param = &priv->user_def.pause_param; 32 33 hbg_restore_mac_table(priv); 34 hbg_hw_set_mtu(priv, priv->netdev->mtu); 35 hbg_hw_set_pause_enable(priv, pause_param->tx_pause, 36 pause_param->rx_pause); 37 hbg_hw_set_rx_pause_mac_addr(priv, rx_pause_addr); 38 } 39 40 int hbg_rebuild(struct hbg_priv *priv) 41 { 42 int ret; 43 44 ret = hbg_hw_init(priv); 45 if (ret) 46 return ret; 47 48 hbg_restore_user_def_settings(priv); 49 return 0; 50 } 51 52 static int hbg_reset_prepare(struct hbg_priv *priv, enum hbg_reset_type type) 53 { 54 int ret; 55 56 if (test_and_set_bit(HBG_NIC_STATE_RESETTING, &priv->state)) 57 return -EBUSY; 58 59 if (netif_running(priv->netdev)) { 60 clear_bit(HBG_NIC_STATE_RESETTING, &priv->state); 61 dev_warn(&priv->pdev->dev, 62 "failed to reset because port is up\n"); 63 return -EBUSY; 64 } 65 66 netif_device_detach(priv->netdev); 67 68 priv->reset_type = type; 69 clear_bit(HBG_NIC_STATE_RESET_FAIL, &priv->state); 70 ret = hbg_hw_event_notify(priv, HBG_HW_EVENT_RESET); 71 if (ret) { 72 priv->stats.reset_fail_cnt++; 73 set_bit(HBG_NIC_STATE_RESET_FAIL, &priv->state); 74 clear_bit(HBG_NIC_STATE_RESETTING, &priv->state); 75 } 76 77 return ret; 78 } 79 80 static int hbg_reset_done(struct hbg_priv *priv, enum hbg_reset_type type) 81 { 82 int ret; 83 84 if (!test_bit(HBG_NIC_STATE_RESETTING, &priv->state) || 85 type != priv->reset_type) 86 return 0; 87 88 ret = hbg_rebuild(priv); 89 if (ret) { 90 priv->stats.reset_fail_cnt++; 91 set_bit(HBG_NIC_STATE_RESET_FAIL, &priv->state); 92 clear_bit(HBG_NIC_STATE_RESETTING, &priv->state); 93 dev_err(&priv->pdev->dev, "failed to rebuild after reset\n"); 94 return ret; 95 } 96 97 netif_device_attach(priv->netdev); 98 clear_bit(HBG_NIC_STATE_RESETTING, &priv->state); 99 100 dev_info(&priv->pdev->dev, "reset done\n"); 101 return ret; 102 } 103 104 int hbg_reset(struct hbg_priv *priv) 105 { 106 int ret; 107 108 ret = hbg_reset_prepare(priv, HBG_RESET_TYPE_FUNCTION); 109 if (ret) 110 return ret; 111 112 return hbg_reset_done(priv, HBG_RESET_TYPE_FUNCTION); 113 } 114 115 void hbg_err_reset(struct hbg_priv *priv) 116 { 117 bool running; 118 119 rtnl_lock(); 120 running = netif_running(priv->netdev); 121 if (running) 122 dev_close(priv->netdev); 123 124 if (hbg_reset(priv)) 125 goto err_unlock; 126 127 if (running) 128 dev_open(priv->netdev, NULL); 129 130 err_unlock: 131 rtnl_unlock(); 132 } 133 134 static pci_ers_result_t hbg_pci_err_detected(struct pci_dev *pdev, 135 pci_channel_state_t state) 136 { 137 struct net_device *netdev = pci_get_drvdata(pdev); 138 139 netif_device_detach(netdev); 140 141 if (state == pci_channel_io_perm_failure) 142 return PCI_ERS_RESULT_DISCONNECT; 143 144 pci_disable_device(pdev); 145 return PCI_ERS_RESULT_NEED_RESET; 146 } 147 148 static pci_ers_result_t hbg_pci_err_slot_reset(struct pci_dev *pdev) 149 { 150 struct net_device *netdev = pci_get_drvdata(pdev); 151 struct hbg_priv *priv = netdev_priv(netdev); 152 153 if (pci_enable_device(pdev)) { 154 dev_err(&pdev->dev, 155 "failed to re-enable PCI device after reset\n"); 156 return PCI_ERS_RESULT_DISCONNECT; 157 } 158 159 pci_set_master(pdev); 160 pci_restore_state(pdev); 161 pci_save_state(pdev); 162 163 hbg_err_reset(priv); 164 return PCI_ERS_RESULT_RECOVERED; 165 } 166 167 static void hbg_pci_err_reset_prepare(struct pci_dev *pdev) 168 { 169 struct net_device *netdev = pci_get_drvdata(pdev); 170 struct hbg_priv *priv = netdev_priv(netdev); 171 172 hbg_reset_prepare(priv, HBG_RESET_TYPE_FLR); 173 } 174 175 static void hbg_pci_err_reset_done(struct pci_dev *pdev) 176 { 177 struct net_device *netdev = pci_get_drvdata(pdev); 178 struct hbg_priv *priv = netdev_priv(netdev); 179 180 hbg_reset_done(priv, HBG_RESET_TYPE_FLR); 181 } 182 183 static const struct pci_error_handlers hbg_pci_err_handler = { 184 .error_detected = hbg_pci_err_detected, 185 .slot_reset = hbg_pci_err_slot_reset, 186 .reset_prepare = hbg_pci_err_reset_prepare, 187 .reset_done = hbg_pci_err_reset_done, 188 }; 189 190 void hbg_set_pci_err_handler(struct pci_driver *pdrv) 191 { 192 pdrv->err_handler = &hbg_pci_err_handler; 193 } 194