1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) 2 * Google virtual Ethernet (gve) driver 3 * 4 * Copyright (C) 2015-2021 Google, Inc. 5 */ 6 7 #ifndef _GVE_ADMINQ_H 8 #define _GVE_ADMINQ_H 9 10 #include <linux/build_bug.h> 11 12 /* Admin queue opcodes */ 13 enum gve_adminq_opcodes { 14 GVE_ADMINQ_DESCRIBE_DEVICE = 0x1, 15 GVE_ADMINQ_CONFIGURE_DEVICE_RESOURCES = 0x2, 16 GVE_ADMINQ_REGISTER_PAGE_LIST = 0x3, 17 GVE_ADMINQ_UNREGISTER_PAGE_LIST = 0x4, 18 GVE_ADMINQ_CREATE_TX_QUEUE = 0x5, 19 GVE_ADMINQ_CREATE_RX_QUEUE = 0x6, 20 GVE_ADMINQ_DESTROY_TX_QUEUE = 0x7, 21 GVE_ADMINQ_DESTROY_RX_QUEUE = 0x8, 22 GVE_ADMINQ_DECONFIGURE_DEVICE_RESOURCES = 0x9, 23 GVE_ADMINQ_SET_DRIVER_PARAMETER = 0xB, 24 GVE_ADMINQ_REPORT_STATS = 0xC, 25 GVE_ADMINQ_REPORT_LINK_SPEED = 0xD, 26 GVE_ADMINQ_GET_PTYPE_MAP = 0xE, 27 GVE_ADMINQ_VERIFY_DRIVER_COMPATIBILITY = 0xF, 28 }; 29 30 /* Admin queue status codes */ 31 enum gve_adminq_statuses { 32 GVE_ADMINQ_COMMAND_UNSET = 0x0, 33 GVE_ADMINQ_COMMAND_PASSED = 0x1, 34 GVE_ADMINQ_COMMAND_ERROR_ABORTED = 0xFFFFFFF0, 35 GVE_ADMINQ_COMMAND_ERROR_ALREADY_EXISTS = 0xFFFFFFF1, 36 GVE_ADMINQ_COMMAND_ERROR_CANCELLED = 0xFFFFFFF2, 37 GVE_ADMINQ_COMMAND_ERROR_DATALOSS = 0xFFFFFFF3, 38 GVE_ADMINQ_COMMAND_ERROR_DEADLINE_EXCEEDED = 0xFFFFFFF4, 39 GVE_ADMINQ_COMMAND_ERROR_FAILED_PRECONDITION = 0xFFFFFFF5, 40 GVE_ADMINQ_COMMAND_ERROR_INTERNAL_ERROR = 0xFFFFFFF6, 41 GVE_ADMINQ_COMMAND_ERROR_INVALID_ARGUMENT = 0xFFFFFFF7, 42 GVE_ADMINQ_COMMAND_ERROR_NOT_FOUND = 0xFFFFFFF8, 43 GVE_ADMINQ_COMMAND_ERROR_OUT_OF_RANGE = 0xFFFFFFF9, 44 GVE_ADMINQ_COMMAND_ERROR_PERMISSION_DENIED = 0xFFFFFFFA, 45 GVE_ADMINQ_COMMAND_ERROR_UNAUTHENTICATED = 0xFFFFFFFB, 46 GVE_ADMINQ_COMMAND_ERROR_RESOURCE_EXHAUSTED = 0xFFFFFFFC, 47 GVE_ADMINQ_COMMAND_ERROR_UNAVAILABLE = 0xFFFFFFFD, 48 GVE_ADMINQ_COMMAND_ERROR_UNIMPLEMENTED = 0xFFFFFFFE, 49 GVE_ADMINQ_COMMAND_ERROR_UNKNOWN_ERROR = 0xFFFFFFFF, 50 }; 51 52 #define GVE_ADMINQ_DEVICE_DESCRIPTOR_VERSION 1 53 54 /* All AdminQ command structs should be naturally packed. The static_assert 55 * calls make sure this is the case at compile time. 56 */ 57 58 struct gve_adminq_describe_device { 59 __be64 device_descriptor_addr; 60 __be32 device_descriptor_version; 61 __be32 available_length; 62 }; 63 64 static_assert(sizeof(struct gve_adminq_describe_device) == 16); 65 66 struct gve_device_descriptor { 67 __be64 max_registered_pages; 68 __be16 reserved1; 69 __be16 tx_queue_entries; 70 __be16 rx_queue_entries; 71 __be16 default_num_queues; 72 __be16 mtu; 73 __be16 counters; 74 __be16 tx_pages_per_qpl; 75 __be16 rx_pages_per_qpl; 76 u8 mac[ETH_ALEN]; 77 __be16 num_device_options; 78 __be16 total_length; 79 u8 reserved2[6]; 80 }; 81 82 static_assert(sizeof(struct gve_device_descriptor) == 40); 83 84 struct gve_device_option { 85 __be16 option_id; 86 __be16 option_length; 87 __be32 required_features_mask; 88 }; 89 90 static_assert(sizeof(struct gve_device_option) == 8); 91 92 struct gve_device_option_gqi_rda { 93 __be32 supported_features_mask; 94 }; 95 96 static_assert(sizeof(struct gve_device_option_gqi_rda) == 4); 97 98 struct gve_device_option_gqi_qpl { 99 __be32 supported_features_mask; 100 }; 101 102 static_assert(sizeof(struct gve_device_option_gqi_qpl) == 4); 103 104 struct gve_device_option_dqo_rda { 105 __be32 supported_features_mask; 106 __be16 tx_comp_ring_entries; 107 __be16 rx_buff_ring_entries; 108 }; 109 110 static_assert(sizeof(struct gve_device_option_dqo_rda) == 8); 111 112 struct gve_device_option_jumbo_frames { 113 __be32 supported_features_mask; 114 __be16 max_mtu; 115 u8 padding[2]; 116 }; 117 118 static_assert(sizeof(struct gve_device_option_jumbo_frames) == 8); 119 120 /* Terminology: 121 * 122 * RDA - Raw DMA Addressing - Buffers associated with SKBs are directly DMA 123 * mapped and read/updated by the device. 124 * 125 * QPL - Queue Page Lists - Driver uses bounce buffers which are DMA mapped with 126 * the device for read/write and data is copied from/to SKBs. 127 */ 128 enum gve_dev_opt_id { 129 GVE_DEV_OPT_ID_GQI_RAW_ADDRESSING = 0x1, 130 GVE_DEV_OPT_ID_GQI_RDA = 0x2, 131 GVE_DEV_OPT_ID_GQI_QPL = 0x3, 132 GVE_DEV_OPT_ID_DQO_RDA = 0x4, 133 GVE_DEV_OPT_ID_JUMBO_FRAMES = 0x8, 134 }; 135 136 enum gve_dev_opt_req_feat_mask { 137 GVE_DEV_OPT_REQ_FEAT_MASK_GQI_RAW_ADDRESSING = 0x0, 138 GVE_DEV_OPT_REQ_FEAT_MASK_GQI_RDA = 0x0, 139 GVE_DEV_OPT_REQ_FEAT_MASK_GQI_QPL = 0x0, 140 GVE_DEV_OPT_REQ_FEAT_MASK_DQO_RDA = 0x0, 141 GVE_DEV_OPT_REQ_FEAT_MASK_JUMBO_FRAMES = 0x0, 142 }; 143 144 enum gve_sup_feature_mask { 145 GVE_SUP_JUMBO_FRAMES_MASK = 1 << 2, 146 }; 147 148 #define GVE_DEV_OPT_LEN_GQI_RAW_ADDRESSING 0x0 149 150 #define GVE_VERSION_STR_LEN 128 151 152 enum gve_driver_capbility { 153 gve_driver_capability_gqi_qpl = 0, 154 gve_driver_capability_gqi_rda = 1, 155 gve_driver_capability_dqo_qpl = 2, /* reserved for future use */ 156 gve_driver_capability_dqo_rda = 3, 157 gve_driver_capability_alt_miss_compl = 4, 158 }; 159 160 #define GVE_CAP1(a) BIT((int)a) 161 #define GVE_CAP2(a) BIT(((int)a) - 64) 162 #define GVE_CAP3(a) BIT(((int)a) - 128) 163 #define GVE_CAP4(a) BIT(((int)a) - 192) 164 165 #define GVE_DRIVER_CAPABILITY_FLAGS1 \ 166 (GVE_CAP1(gve_driver_capability_gqi_qpl) | \ 167 GVE_CAP1(gve_driver_capability_gqi_rda) | \ 168 GVE_CAP1(gve_driver_capability_dqo_rda) | \ 169 GVE_CAP1(gve_driver_capability_alt_miss_compl)) 170 171 #define GVE_DRIVER_CAPABILITY_FLAGS2 0x0 172 #define GVE_DRIVER_CAPABILITY_FLAGS3 0x0 173 #define GVE_DRIVER_CAPABILITY_FLAGS4 0x0 174 175 struct gve_driver_info { 176 u8 os_type; /* 0x01 = Linux */ 177 u8 driver_major; 178 u8 driver_minor; 179 u8 driver_sub; 180 __be32 os_version_major; 181 __be32 os_version_minor; 182 __be32 os_version_sub; 183 __be64 driver_capability_flags[4]; 184 u8 os_version_str1[GVE_VERSION_STR_LEN]; 185 u8 os_version_str2[GVE_VERSION_STR_LEN]; 186 }; 187 188 struct gve_adminq_verify_driver_compatibility { 189 __be64 driver_info_len; 190 __be64 driver_info_addr; 191 }; 192 193 static_assert(sizeof(struct gve_adminq_verify_driver_compatibility) == 16); 194 195 struct gve_adminq_configure_device_resources { 196 __be64 counter_array; 197 __be64 irq_db_addr; 198 __be32 num_counters; 199 __be32 num_irq_dbs; 200 __be32 irq_db_stride; 201 __be32 ntfy_blk_msix_base_idx; 202 u8 queue_format; 203 u8 padding[7]; 204 }; 205 206 static_assert(sizeof(struct gve_adminq_configure_device_resources) == 40); 207 208 struct gve_adminq_register_page_list { 209 __be32 page_list_id; 210 __be32 num_pages; 211 __be64 page_address_list_addr; 212 }; 213 214 static_assert(sizeof(struct gve_adminq_register_page_list) == 16); 215 216 struct gve_adminq_unregister_page_list { 217 __be32 page_list_id; 218 }; 219 220 static_assert(sizeof(struct gve_adminq_unregister_page_list) == 4); 221 222 #define GVE_RAW_ADDRESSING_QPL_ID 0xFFFFFFFF 223 224 struct gve_adminq_create_tx_queue { 225 __be32 queue_id; 226 __be32 reserved; 227 __be64 queue_resources_addr; 228 __be64 tx_ring_addr; 229 __be32 queue_page_list_id; 230 __be32 ntfy_id; 231 __be64 tx_comp_ring_addr; 232 __be16 tx_ring_size; 233 __be16 tx_comp_ring_size; 234 u8 padding[4]; 235 }; 236 237 static_assert(sizeof(struct gve_adminq_create_tx_queue) == 48); 238 239 struct gve_adminq_create_rx_queue { 240 __be32 queue_id; 241 __be32 index; 242 __be32 reserved; 243 __be32 ntfy_id; 244 __be64 queue_resources_addr; 245 __be64 rx_desc_ring_addr; 246 __be64 rx_data_ring_addr; 247 __be32 queue_page_list_id; 248 __be16 rx_ring_size; 249 __be16 packet_buffer_size; 250 __be16 rx_buff_ring_size; 251 u8 enable_rsc; 252 u8 padding[5]; 253 }; 254 255 static_assert(sizeof(struct gve_adminq_create_rx_queue) == 56); 256 257 /* Queue resources that are shared with the device */ 258 struct gve_queue_resources { 259 union { 260 struct { 261 __be32 db_index; /* Device -> Guest */ 262 __be32 counter_index; /* Device -> Guest */ 263 }; 264 u8 reserved[64]; 265 }; 266 }; 267 268 static_assert(sizeof(struct gve_queue_resources) == 64); 269 270 struct gve_adminq_destroy_tx_queue { 271 __be32 queue_id; 272 }; 273 274 static_assert(sizeof(struct gve_adminq_destroy_tx_queue) == 4); 275 276 struct gve_adminq_destroy_rx_queue { 277 __be32 queue_id; 278 }; 279 280 static_assert(sizeof(struct gve_adminq_destroy_rx_queue) == 4); 281 282 /* GVE Set Driver Parameter Types */ 283 enum gve_set_driver_param_types { 284 GVE_SET_PARAM_MTU = 0x1, 285 }; 286 287 struct gve_adminq_set_driver_parameter { 288 __be32 parameter_type; 289 u8 reserved[4]; 290 __be64 parameter_value; 291 }; 292 293 static_assert(sizeof(struct gve_adminq_set_driver_parameter) == 16); 294 295 struct gve_adminq_report_stats { 296 __be64 stats_report_len; 297 __be64 stats_report_addr; 298 __be64 interval; 299 }; 300 301 static_assert(sizeof(struct gve_adminq_report_stats) == 24); 302 303 struct gve_adminq_report_link_speed { 304 __be64 link_speed_address; 305 }; 306 307 static_assert(sizeof(struct gve_adminq_report_link_speed) == 8); 308 309 struct stats { 310 __be32 stat_name; 311 __be32 queue_id; 312 __be64 value; 313 }; 314 315 static_assert(sizeof(struct stats) == 16); 316 317 struct gve_stats_report { 318 __be64 written_count; 319 struct stats stats[]; 320 }; 321 322 static_assert(sizeof(struct gve_stats_report) == 8); 323 324 enum gve_stat_names { 325 // stats from gve 326 TX_WAKE_CNT = 1, 327 TX_STOP_CNT = 2, 328 TX_FRAMES_SENT = 3, 329 TX_BYTES_SENT = 4, 330 TX_LAST_COMPLETION_PROCESSED = 5, 331 RX_NEXT_EXPECTED_SEQUENCE = 6, 332 RX_BUFFERS_POSTED = 7, 333 TX_TIMEOUT_CNT = 8, 334 // stats from NIC 335 RX_QUEUE_DROP_CNT = 65, 336 RX_NO_BUFFERS_POSTED = 66, 337 RX_DROPS_PACKET_OVER_MRU = 67, 338 RX_DROPS_INVALID_CHECKSUM = 68, 339 }; 340 341 enum gve_l3_type { 342 /* Must be zero so zero initialized LUT is unknown. */ 343 GVE_L3_TYPE_UNKNOWN = 0, 344 GVE_L3_TYPE_OTHER, 345 GVE_L3_TYPE_IPV4, 346 GVE_L3_TYPE_IPV6, 347 }; 348 349 enum gve_l4_type { 350 /* Must be zero so zero initialized LUT is unknown. */ 351 GVE_L4_TYPE_UNKNOWN = 0, 352 GVE_L4_TYPE_OTHER, 353 GVE_L4_TYPE_TCP, 354 GVE_L4_TYPE_UDP, 355 GVE_L4_TYPE_ICMP, 356 GVE_L4_TYPE_SCTP, 357 }; 358 359 /* These are control path types for PTYPE which are the same as the data path 360 * types. 361 */ 362 struct gve_ptype_entry { 363 u8 l3_type; 364 u8 l4_type; 365 }; 366 367 struct gve_ptype_map { 368 struct gve_ptype_entry ptypes[1 << 10]; /* PTYPES are always 10 bits. */ 369 }; 370 371 struct gve_adminq_get_ptype_map { 372 __be64 ptype_map_len; 373 __be64 ptype_map_addr; 374 }; 375 376 union gve_adminq_command { 377 struct { 378 __be32 opcode; 379 __be32 status; 380 union { 381 struct gve_adminq_configure_device_resources 382 configure_device_resources; 383 struct gve_adminq_create_tx_queue create_tx_queue; 384 struct gve_adminq_create_rx_queue create_rx_queue; 385 struct gve_adminq_destroy_tx_queue destroy_tx_queue; 386 struct gve_adminq_destroy_rx_queue destroy_rx_queue; 387 struct gve_adminq_describe_device describe_device; 388 struct gve_adminq_register_page_list reg_page_list; 389 struct gve_adminq_unregister_page_list unreg_page_list; 390 struct gve_adminq_set_driver_parameter set_driver_param; 391 struct gve_adminq_report_stats report_stats; 392 struct gve_adminq_report_link_speed report_link_speed; 393 struct gve_adminq_get_ptype_map get_ptype_map; 394 struct gve_adminq_verify_driver_compatibility 395 verify_driver_compatibility; 396 }; 397 }; 398 u8 reserved[64]; 399 }; 400 401 static_assert(sizeof(union gve_adminq_command) == 64); 402 403 int gve_adminq_alloc(struct device *dev, struct gve_priv *priv); 404 void gve_adminq_free(struct device *dev, struct gve_priv *priv); 405 void gve_adminq_release(struct gve_priv *priv); 406 int gve_adminq_describe_device(struct gve_priv *priv); 407 int gve_adminq_configure_device_resources(struct gve_priv *priv, 408 dma_addr_t counter_array_bus_addr, 409 u32 num_counters, 410 dma_addr_t db_array_bus_addr, 411 u32 num_ntfy_blks); 412 int gve_adminq_deconfigure_device_resources(struct gve_priv *priv); 413 int gve_adminq_create_tx_queues(struct gve_priv *priv, u32 num_queues); 414 int gve_adminq_destroy_tx_queues(struct gve_priv *priv, u32 queue_id); 415 int gve_adminq_create_rx_queues(struct gve_priv *priv, u32 num_queues); 416 int gve_adminq_destroy_rx_queues(struct gve_priv *priv, u32 queue_id); 417 int gve_adminq_register_page_list(struct gve_priv *priv, 418 struct gve_queue_page_list *qpl); 419 int gve_adminq_unregister_page_list(struct gve_priv *priv, u32 page_list_id); 420 int gve_adminq_set_mtu(struct gve_priv *priv, u64 mtu); 421 int gve_adminq_report_stats(struct gve_priv *priv, u64 stats_report_len, 422 dma_addr_t stats_report_addr, u64 interval); 423 int gve_adminq_verify_driver_compatibility(struct gve_priv *priv, 424 u64 driver_info_len, 425 dma_addr_t driver_info_addr); 426 int gve_adminq_report_link_speed(struct gve_priv *priv); 427 428 struct gve_ptype_lut; 429 int gve_adminq_get_ptype_map_dqo(struct gve_priv *priv, 430 struct gve_ptype_lut *ptype_lut); 431 432 #endif /* _GVE_ADMINQ_H */ 433