1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * drivers/net/ethernet/freescale/gianfar_ethtool.c 4 * 5 * Gianfar Ethernet Driver 6 * Ethtool support for Gianfar Enet 7 * Based on e1000 ethtool support 8 * 9 * Author: Andy Fleming 10 * Maintainer: Kumar Gala 11 * Modifier: Sandeep Gopalpet <sandeep.kumar@freescale.com> 12 * 13 * Copyright 2003-2006, 2008-2009, 2011 Freescale Semiconductor, Inc. 14 */ 15 16 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 17 18 #include <linux/kernel.h> 19 #include <linux/string.h> 20 #include <linux/errno.h> 21 #include <linux/interrupt.h> 22 #include <linux/delay.h> 23 #include <linux/netdevice.h> 24 #include <linux/etherdevice.h> 25 #include <linux/net_tstamp.h> 26 #include <linux/skbuff.h> 27 #include <linux/spinlock.h> 28 #include <linux/mm.h> 29 30 #include <asm/io.h> 31 #include <asm/irq.h> 32 #include <linux/uaccess.h> 33 #include <linux/module.h> 34 #include <linux/crc32.h> 35 #include <asm/types.h> 36 #include <linux/ethtool.h> 37 #include <linux/mii.h> 38 #include <linux/phy.h> 39 #include <linux/sort.h> 40 #include <linux/if_vlan.h> 41 #include <linux/of.h> 42 #include <linux/of_platform.h> 43 #include <linux/platform_device.h> 44 #include <linux/fsl/ptp_qoriq.h> 45 46 #include "gianfar.h" 47 48 #define GFAR_MAX_COAL_USECS 0xffff 49 #define GFAR_MAX_COAL_FRAMES 0xff 50 51 static const char stat_gstrings[][ETH_GSTRING_LEN] = { 52 /* extra stats */ 53 "rx-allocation-errors", 54 "rx-large-frame-errors", 55 "rx-short-frame-errors", 56 "rx-non-octet-errors", 57 "rx-crc-errors", 58 "rx-overrun-errors", 59 "rx-busy-errors", 60 "rx-babbling-errors", 61 "rx-truncated-frames", 62 "ethernet-bus-error", 63 "tx-babbling-errors", 64 "tx-underrun-errors", 65 "tx-timeout-errors", 66 /* rmon stats */ 67 "tx-rx-64-frames", 68 "tx-rx-65-127-frames", 69 "tx-rx-128-255-frames", 70 "tx-rx-256-511-frames", 71 "tx-rx-512-1023-frames", 72 "tx-rx-1024-1518-frames", 73 "tx-rx-1519-1522-good-vlan", 74 "rx-bytes", 75 "rx-packets", 76 "rx-fcs-errors", 77 "receive-multicast-packet", 78 "receive-broadcast-packet", 79 "rx-control-frame-packets", 80 "rx-pause-frame-packets", 81 "rx-unknown-op-code", 82 "rx-alignment-error", 83 "rx-frame-length-error", 84 "rx-code-error", 85 "rx-carrier-sense-error", 86 "rx-undersize-packets", 87 "rx-oversize-packets", 88 "rx-fragmented-frames", 89 "rx-jabber-frames", 90 "rx-dropped-frames", 91 "tx-byte-counter", 92 "tx-packets", 93 "tx-multicast-packets", 94 "tx-broadcast-packets", 95 "tx-pause-control-frames", 96 "tx-deferral-packets", 97 "tx-excessive-deferral-packets", 98 "tx-single-collision-packets", 99 "tx-multiple-collision-packets", 100 "tx-late-collision-packets", 101 "tx-excessive-collision-packets", 102 "tx-total-collision", 103 "reserved", 104 "tx-dropped-frames", 105 "tx-jabber-frames", 106 "tx-fcs-errors", 107 "tx-control-frames", 108 "tx-oversize-frames", 109 "tx-undersize-frames", 110 "tx-fragmented-frames", 111 }; 112 113 /* Fill in a buffer with the strings which correspond to the 114 * stats */ 115 static void gfar_gstrings(struct net_device *dev, u32 stringset, u8 * buf) 116 { 117 struct gfar_private *priv = netdev_priv(dev); 118 119 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_RMON) 120 memcpy(buf, stat_gstrings, GFAR_STATS_LEN * ETH_GSTRING_LEN); 121 else 122 memcpy(buf, stat_gstrings, 123 GFAR_EXTRA_STATS_LEN * ETH_GSTRING_LEN); 124 } 125 126 /* Fill in an array of 64-bit statistics from various sources. 127 * This array will be appended to the end of the ethtool_stats 128 * structure, and returned to user space 129 */ 130 static void gfar_fill_stats(struct net_device *dev, struct ethtool_stats *dummy, 131 u64 *buf) 132 { 133 int i; 134 struct gfar_private *priv = netdev_priv(dev); 135 struct gfar __iomem *regs = priv->gfargrp[0].regs; 136 atomic64_t *extra = (atomic64_t *)&priv->extra_stats; 137 138 for (i = 0; i < GFAR_EXTRA_STATS_LEN; i++) 139 buf[i] = atomic64_read(&extra[i]); 140 141 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_RMON) { 142 u32 __iomem *rmon = (u32 __iomem *) ®s->rmon; 143 144 for (; i < GFAR_STATS_LEN; i++, rmon++) 145 buf[i] = (u64) gfar_read(rmon); 146 } 147 } 148 149 static int gfar_sset_count(struct net_device *dev, int sset) 150 { 151 struct gfar_private *priv = netdev_priv(dev); 152 153 switch (sset) { 154 case ETH_SS_STATS: 155 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_RMON) 156 return GFAR_STATS_LEN; 157 else 158 return GFAR_EXTRA_STATS_LEN; 159 default: 160 return -EOPNOTSUPP; 161 } 162 } 163 164 /* Fills in the drvinfo structure with some basic info */ 165 static void gfar_gdrvinfo(struct net_device *dev, 166 struct ethtool_drvinfo *drvinfo) 167 { 168 strscpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver)); 169 } 170 171 /* Return the length of the register structure */ 172 static int gfar_reglen(struct net_device *dev) 173 { 174 return sizeof (struct gfar); 175 } 176 177 /* Return a dump of the GFAR register space */ 178 static void gfar_get_regs(struct net_device *dev, struct ethtool_regs *regs, 179 void *regbuf) 180 { 181 int i; 182 struct gfar_private *priv = netdev_priv(dev); 183 u32 __iomem *theregs = (u32 __iomem *) priv->gfargrp[0].regs; 184 u32 *buf = (u32 *) regbuf; 185 186 for (i = 0; i < sizeof (struct gfar) / sizeof (u32); i++) 187 buf[i] = gfar_read(&theregs[i]); 188 } 189 190 /* Convert microseconds to ethernet clock ticks, which changes 191 * depending on what speed the controller is running at */ 192 static unsigned int gfar_usecs2ticks(struct gfar_private *priv, 193 unsigned int usecs) 194 { 195 struct net_device *ndev = priv->ndev; 196 struct phy_device *phydev = ndev->phydev; 197 unsigned int count; 198 199 /* The timer is different, depending on the interface speed */ 200 switch (phydev->speed) { 201 case SPEED_1000: 202 count = GFAR_GBIT_TIME; 203 break; 204 case SPEED_100: 205 count = GFAR_100_TIME; 206 break; 207 case SPEED_10: 208 default: 209 count = GFAR_10_TIME; 210 break; 211 } 212 213 /* Make sure we return a number greater than 0 214 * if usecs > 0 */ 215 return DIV_ROUND_UP(usecs * 1000, count); 216 } 217 218 /* Convert ethernet clock ticks to microseconds */ 219 static unsigned int gfar_ticks2usecs(struct gfar_private *priv, 220 unsigned int ticks) 221 { 222 struct net_device *ndev = priv->ndev; 223 struct phy_device *phydev = ndev->phydev; 224 unsigned int count; 225 226 /* The timer is different, depending on the interface speed */ 227 switch (phydev->speed) { 228 case SPEED_1000: 229 count = GFAR_GBIT_TIME; 230 break; 231 case SPEED_100: 232 count = GFAR_100_TIME; 233 break; 234 case SPEED_10: 235 default: 236 count = GFAR_10_TIME; 237 break; 238 } 239 240 /* Make sure we return a number greater than 0 */ 241 /* if ticks is > 0 */ 242 return (ticks * count) / 1000; 243 } 244 245 /* Get the coalescing parameters, and put them in the cvals 246 * structure. */ 247 static int gfar_gcoalesce(struct net_device *dev, 248 struct ethtool_coalesce *cvals, 249 struct kernel_ethtool_coalesce *kernel_coal, 250 struct netlink_ext_ack *extack) 251 { 252 struct gfar_private *priv = netdev_priv(dev); 253 struct gfar_priv_rx_q *rx_queue = NULL; 254 struct gfar_priv_tx_q *tx_queue = NULL; 255 unsigned long rxtime; 256 unsigned long rxcount; 257 unsigned long txtime; 258 unsigned long txcount; 259 260 if (!(priv->device_flags & FSL_GIANFAR_DEV_HAS_COALESCE)) 261 return -EOPNOTSUPP; 262 263 if (!dev->phydev) 264 return -ENODEV; 265 266 rx_queue = priv->rx_queue[0]; 267 tx_queue = priv->tx_queue[0]; 268 269 rxtime = get_ictt_value(rx_queue->rxic); 270 rxcount = get_icft_value(rx_queue->rxic); 271 txtime = get_ictt_value(tx_queue->txic); 272 txcount = get_icft_value(tx_queue->txic); 273 cvals->rx_coalesce_usecs = gfar_ticks2usecs(priv, rxtime); 274 cvals->rx_max_coalesced_frames = rxcount; 275 276 cvals->tx_coalesce_usecs = gfar_ticks2usecs(priv, txtime); 277 cvals->tx_max_coalesced_frames = txcount; 278 279 return 0; 280 } 281 282 /* Change the coalescing values. 283 * Both cvals->*_usecs and cvals->*_frames have to be > 0 284 * in order for coalescing to be active 285 */ 286 static int gfar_scoalesce(struct net_device *dev, 287 struct ethtool_coalesce *cvals, 288 struct kernel_ethtool_coalesce *kernel_coal, 289 struct netlink_ext_ack *extack) 290 { 291 struct gfar_private *priv = netdev_priv(dev); 292 int i, err = 0; 293 294 if (!(priv->device_flags & FSL_GIANFAR_DEV_HAS_COALESCE)) 295 return -EOPNOTSUPP; 296 297 if (!dev->phydev) 298 return -ENODEV; 299 300 /* Check the bounds of the values */ 301 if (cvals->rx_coalesce_usecs > GFAR_MAX_COAL_USECS) { 302 netdev_info(dev, "Coalescing is limited to %d microseconds\n", 303 GFAR_MAX_COAL_USECS); 304 return -EINVAL; 305 } 306 307 if (cvals->rx_max_coalesced_frames > GFAR_MAX_COAL_FRAMES) { 308 netdev_info(dev, "Coalescing is limited to %d frames\n", 309 GFAR_MAX_COAL_FRAMES); 310 return -EINVAL; 311 } 312 313 /* Check the bounds of the values */ 314 if (cvals->tx_coalesce_usecs > GFAR_MAX_COAL_USECS) { 315 netdev_info(dev, "Coalescing is limited to %d microseconds\n", 316 GFAR_MAX_COAL_USECS); 317 return -EINVAL; 318 } 319 320 if (cvals->tx_max_coalesced_frames > GFAR_MAX_COAL_FRAMES) { 321 netdev_info(dev, "Coalescing is limited to %d frames\n", 322 GFAR_MAX_COAL_FRAMES); 323 return -EINVAL; 324 } 325 326 while (test_and_set_bit_lock(GFAR_RESETTING, &priv->state)) 327 cpu_relax(); 328 329 /* Set up rx coalescing */ 330 if ((cvals->rx_coalesce_usecs == 0) || 331 (cvals->rx_max_coalesced_frames == 0)) { 332 for (i = 0; i < priv->num_rx_queues; i++) 333 priv->rx_queue[i]->rxcoalescing = 0; 334 } else { 335 for (i = 0; i < priv->num_rx_queues; i++) 336 priv->rx_queue[i]->rxcoalescing = 1; 337 } 338 339 for (i = 0; i < priv->num_rx_queues; i++) { 340 priv->rx_queue[i]->rxic = mk_ic_value( 341 cvals->rx_max_coalesced_frames, 342 gfar_usecs2ticks(priv, cvals->rx_coalesce_usecs)); 343 } 344 345 /* Set up tx coalescing */ 346 if ((cvals->tx_coalesce_usecs == 0) || 347 (cvals->tx_max_coalesced_frames == 0)) { 348 for (i = 0; i < priv->num_tx_queues; i++) 349 priv->tx_queue[i]->txcoalescing = 0; 350 } else { 351 for (i = 0; i < priv->num_tx_queues; i++) 352 priv->tx_queue[i]->txcoalescing = 1; 353 } 354 355 for (i = 0; i < priv->num_tx_queues; i++) { 356 priv->tx_queue[i]->txic = mk_ic_value( 357 cvals->tx_max_coalesced_frames, 358 gfar_usecs2ticks(priv, cvals->tx_coalesce_usecs)); 359 } 360 361 if (dev->flags & IFF_UP) { 362 stop_gfar(dev); 363 err = startup_gfar(dev); 364 } else { 365 gfar_mac_reset(priv); 366 } 367 368 clear_bit_unlock(GFAR_RESETTING, &priv->state); 369 370 return err; 371 } 372 373 /* Fills in rvals with the current ring parameters. Currently, 374 * rx, rx_mini, and rx_jumbo rings are the same size, as mini and 375 * jumbo are ignored by the driver */ 376 static void gfar_gringparam(struct net_device *dev, 377 struct ethtool_ringparam *rvals, 378 struct kernel_ethtool_ringparam *kernel_rvals, 379 struct netlink_ext_ack *extack) 380 { 381 struct gfar_private *priv = netdev_priv(dev); 382 struct gfar_priv_tx_q *tx_queue = NULL; 383 struct gfar_priv_rx_q *rx_queue = NULL; 384 385 tx_queue = priv->tx_queue[0]; 386 rx_queue = priv->rx_queue[0]; 387 388 rvals->rx_max_pending = GFAR_RX_MAX_RING_SIZE; 389 rvals->rx_mini_max_pending = GFAR_RX_MAX_RING_SIZE; 390 rvals->rx_jumbo_max_pending = GFAR_RX_MAX_RING_SIZE; 391 rvals->tx_max_pending = GFAR_TX_MAX_RING_SIZE; 392 393 /* Values changeable by the user. The valid values are 394 * in the range 1 to the "*_max_pending" counterpart above. 395 */ 396 rvals->rx_pending = rx_queue->rx_ring_size; 397 rvals->rx_mini_pending = rx_queue->rx_ring_size; 398 rvals->rx_jumbo_pending = rx_queue->rx_ring_size; 399 rvals->tx_pending = tx_queue->tx_ring_size; 400 } 401 402 /* Change the current ring parameters, stopping the controller if 403 * necessary so that we don't mess things up while we're in motion. 404 */ 405 static int gfar_sringparam(struct net_device *dev, 406 struct ethtool_ringparam *rvals, 407 struct kernel_ethtool_ringparam *kernel_rvals, 408 struct netlink_ext_ack *extack) 409 { 410 struct gfar_private *priv = netdev_priv(dev); 411 int err = 0, i; 412 413 if (rvals->rx_pending > GFAR_RX_MAX_RING_SIZE) 414 return -EINVAL; 415 416 if (!is_power_of_2(rvals->rx_pending)) { 417 netdev_err(dev, "Ring sizes must be a power of 2\n"); 418 return -EINVAL; 419 } 420 421 if (rvals->tx_pending > GFAR_TX_MAX_RING_SIZE) 422 return -EINVAL; 423 424 if (!is_power_of_2(rvals->tx_pending)) { 425 netdev_err(dev, "Ring sizes must be a power of 2\n"); 426 return -EINVAL; 427 } 428 429 while (test_and_set_bit_lock(GFAR_RESETTING, &priv->state)) 430 cpu_relax(); 431 432 if (dev->flags & IFF_UP) 433 stop_gfar(dev); 434 435 /* Change the sizes */ 436 for (i = 0; i < priv->num_rx_queues; i++) 437 priv->rx_queue[i]->rx_ring_size = rvals->rx_pending; 438 439 for (i = 0; i < priv->num_tx_queues; i++) 440 priv->tx_queue[i]->tx_ring_size = rvals->tx_pending; 441 442 /* Rebuild the rings with the new size */ 443 if (dev->flags & IFF_UP) 444 err = startup_gfar(dev); 445 446 clear_bit_unlock(GFAR_RESETTING, &priv->state); 447 448 return err; 449 } 450 451 static void gfar_gpauseparam(struct net_device *dev, 452 struct ethtool_pauseparam *epause) 453 { 454 struct gfar_private *priv = netdev_priv(dev); 455 456 epause->autoneg = !!priv->pause_aneg_en; 457 epause->rx_pause = !!priv->rx_pause_en; 458 epause->tx_pause = !!priv->tx_pause_en; 459 } 460 461 static int gfar_spauseparam(struct net_device *dev, 462 struct ethtool_pauseparam *epause) 463 { 464 struct gfar_private *priv = netdev_priv(dev); 465 struct phy_device *phydev = dev->phydev; 466 struct gfar __iomem *regs = priv->gfargrp[0].regs; 467 468 if (!phydev) 469 return -ENODEV; 470 471 if (!phy_validate_pause(phydev, epause)) 472 return -EINVAL; 473 474 priv->rx_pause_en = priv->tx_pause_en = 0; 475 phy_set_asym_pause(phydev, epause->rx_pause, epause->tx_pause); 476 if (epause->rx_pause) { 477 priv->rx_pause_en = 1; 478 479 if (epause->tx_pause) { 480 priv->tx_pause_en = 1; 481 } 482 } else if (epause->tx_pause) { 483 priv->tx_pause_en = 1; 484 } 485 486 if (epause->autoneg) 487 priv->pause_aneg_en = 1; 488 else 489 priv->pause_aneg_en = 0; 490 491 if (!epause->autoneg) { 492 u32 tempval = gfar_read(®s->maccfg1); 493 494 tempval &= ~(MACCFG1_TX_FLOW | MACCFG1_RX_FLOW); 495 496 priv->tx_actual_en = 0; 497 if (priv->tx_pause_en) { 498 priv->tx_actual_en = 1; 499 tempval |= MACCFG1_TX_FLOW; 500 } 501 502 if (priv->rx_pause_en) 503 tempval |= MACCFG1_RX_FLOW; 504 gfar_write(®s->maccfg1, tempval); 505 } 506 507 return 0; 508 } 509 510 int gfar_set_features(struct net_device *dev, netdev_features_t features) 511 { 512 netdev_features_t changed = dev->features ^ features; 513 struct gfar_private *priv = netdev_priv(dev); 514 int err = 0; 515 516 if (!(changed & (NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX | 517 NETIF_F_RXCSUM))) 518 return 0; 519 520 while (test_and_set_bit_lock(GFAR_RESETTING, &priv->state)) 521 cpu_relax(); 522 523 dev->features = features; 524 525 if (dev->flags & IFF_UP) { 526 /* Now we take down the rings to rebuild them */ 527 stop_gfar(dev); 528 err = startup_gfar(dev); 529 } else { 530 gfar_mac_reset(priv); 531 } 532 533 clear_bit_unlock(GFAR_RESETTING, &priv->state); 534 535 return err; 536 } 537 538 static uint32_t gfar_get_msglevel(struct net_device *dev) 539 { 540 struct gfar_private *priv = netdev_priv(dev); 541 542 return priv->msg_enable; 543 } 544 545 static void gfar_set_msglevel(struct net_device *dev, uint32_t data) 546 { 547 struct gfar_private *priv = netdev_priv(dev); 548 549 priv->msg_enable = data; 550 } 551 552 #ifdef CONFIG_PM 553 static void gfar_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 554 { 555 struct gfar_private *priv = netdev_priv(dev); 556 557 wol->supported = 0; 558 wol->wolopts = 0; 559 560 if (priv->wol_supported & GFAR_WOL_MAGIC) 561 wol->supported |= WAKE_MAGIC; 562 563 if (priv->wol_supported & GFAR_WOL_FILER_UCAST) 564 wol->supported |= WAKE_UCAST; 565 566 if (priv->wol_opts & GFAR_WOL_MAGIC) 567 wol->wolopts |= WAKE_MAGIC; 568 569 if (priv->wol_opts & GFAR_WOL_FILER_UCAST) 570 wol->wolopts |= WAKE_UCAST; 571 } 572 573 static int gfar_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 574 { 575 struct gfar_private *priv = netdev_priv(dev); 576 u16 wol_opts = 0; 577 int err; 578 579 if (!priv->wol_supported && wol->wolopts) 580 return -EINVAL; 581 582 if (wol->wolopts & ~(WAKE_MAGIC | WAKE_UCAST)) 583 return -EINVAL; 584 585 if (wol->wolopts & WAKE_MAGIC) { 586 wol_opts |= GFAR_WOL_MAGIC; 587 } else { 588 if (wol->wolopts & WAKE_UCAST) 589 wol_opts |= GFAR_WOL_FILER_UCAST; 590 } 591 592 wol_opts &= priv->wol_supported; 593 priv->wol_opts = 0; 594 595 err = device_set_wakeup_enable(priv->dev, wol_opts); 596 if (err) 597 return err; 598 599 priv->wol_opts = wol_opts; 600 601 return 0; 602 } 603 #endif 604 605 static void ethflow_to_filer_rules (struct gfar_private *priv, u64 ethflow) 606 { 607 u32 fcr = 0x0, fpr = FPR_FILER_MASK; 608 609 if (ethflow & RXH_L2DA) { 610 fcr = RQFCR_PID_DAH | RQFCR_CMP_NOMATCH | 611 RQFCR_HASH | RQFCR_AND | RQFCR_HASHTBL_0; 612 priv->ftp_rqfpr[priv->cur_filer_idx] = fpr; 613 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr; 614 gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr); 615 priv->cur_filer_idx = priv->cur_filer_idx - 1; 616 617 fcr = RQFCR_PID_DAL | RQFCR_CMP_NOMATCH | 618 RQFCR_HASH | RQFCR_AND | RQFCR_HASHTBL_0; 619 priv->ftp_rqfpr[priv->cur_filer_idx] = fpr; 620 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr; 621 gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr); 622 priv->cur_filer_idx = priv->cur_filer_idx - 1; 623 } 624 625 if (ethflow & RXH_VLAN) { 626 fcr = RQFCR_PID_VID | RQFCR_CMP_NOMATCH | RQFCR_HASH | 627 RQFCR_AND | RQFCR_HASHTBL_0; 628 gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr); 629 priv->ftp_rqfpr[priv->cur_filer_idx] = fpr; 630 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr; 631 priv->cur_filer_idx = priv->cur_filer_idx - 1; 632 } 633 634 if (ethflow & RXH_IP_SRC) { 635 fcr = RQFCR_PID_SIA | RQFCR_CMP_NOMATCH | RQFCR_HASH | 636 RQFCR_AND | RQFCR_HASHTBL_0; 637 priv->ftp_rqfpr[priv->cur_filer_idx] = fpr; 638 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr; 639 gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr); 640 priv->cur_filer_idx = priv->cur_filer_idx - 1; 641 } 642 643 if (ethflow & (RXH_IP_DST)) { 644 fcr = RQFCR_PID_DIA | RQFCR_CMP_NOMATCH | RQFCR_HASH | 645 RQFCR_AND | RQFCR_HASHTBL_0; 646 priv->ftp_rqfpr[priv->cur_filer_idx] = fpr; 647 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr; 648 gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr); 649 priv->cur_filer_idx = priv->cur_filer_idx - 1; 650 } 651 652 if (ethflow & RXH_L3_PROTO) { 653 fcr = RQFCR_PID_L4P | RQFCR_CMP_NOMATCH | RQFCR_HASH | 654 RQFCR_AND | RQFCR_HASHTBL_0; 655 priv->ftp_rqfpr[priv->cur_filer_idx] = fpr; 656 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr; 657 gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr); 658 priv->cur_filer_idx = priv->cur_filer_idx - 1; 659 } 660 661 if (ethflow & RXH_L4_B_0_1) { 662 fcr = RQFCR_PID_SPT | RQFCR_CMP_NOMATCH | RQFCR_HASH | 663 RQFCR_AND | RQFCR_HASHTBL_0; 664 priv->ftp_rqfpr[priv->cur_filer_idx] = fpr; 665 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr; 666 gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr); 667 priv->cur_filer_idx = priv->cur_filer_idx - 1; 668 } 669 670 if (ethflow & RXH_L4_B_2_3) { 671 fcr = RQFCR_PID_DPT | RQFCR_CMP_NOMATCH | RQFCR_HASH | 672 RQFCR_AND | RQFCR_HASHTBL_0; 673 priv->ftp_rqfpr[priv->cur_filer_idx] = fpr; 674 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr; 675 gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr); 676 priv->cur_filer_idx = priv->cur_filer_idx - 1; 677 } 678 } 679 680 static int gfar_ethflow_to_filer_table(struct gfar_private *priv, u64 ethflow, 681 u64 class) 682 { 683 unsigned int cmp_rqfpr; 684 unsigned int *local_rqfpr; 685 unsigned int *local_rqfcr; 686 int i = 0x0, k = 0x0; 687 int j = MAX_FILER_IDX, l = 0x0; 688 int ret = 1; 689 690 local_rqfpr = kmalloc_array(MAX_FILER_IDX + 1, sizeof(unsigned int), 691 GFP_KERNEL); 692 local_rqfcr = kmalloc_array(MAX_FILER_IDX + 1, sizeof(unsigned int), 693 GFP_KERNEL); 694 if (!local_rqfpr || !local_rqfcr) { 695 ret = 0; 696 goto err; 697 } 698 699 switch (class) { 700 case TCP_V4_FLOW: 701 cmp_rqfpr = RQFPR_IPV4 |RQFPR_TCP; 702 break; 703 case UDP_V4_FLOW: 704 cmp_rqfpr = RQFPR_IPV4 |RQFPR_UDP; 705 break; 706 case TCP_V6_FLOW: 707 cmp_rqfpr = RQFPR_IPV6 |RQFPR_TCP; 708 break; 709 case UDP_V6_FLOW: 710 cmp_rqfpr = RQFPR_IPV6 |RQFPR_UDP; 711 break; 712 default: 713 netdev_err(priv->ndev, 714 "Right now this class is not supported\n"); 715 ret = 0; 716 goto err; 717 } 718 719 for (i = 0; i < MAX_FILER_IDX + 1; i++) { 720 local_rqfpr[j] = priv->ftp_rqfpr[i]; 721 local_rqfcr[j] = priv->ftp_rqfcr[i]; 722 j--; 723 if ((priv->ftp_rqfcr[i] == 724 (RQFCR_PID_PARSE | RQFCR_CLE | RQFCR_AND)) && 725 (priv->ftp_rqfpr[i] == cmp_rqfpr)) 726 break; 727 } 728 729 if (i == MAX_FILER_IDX + 1) { 730 netdev_err(priv->ndev, 731 "No parse rule found, can't create hash rules\n"); 732 ret = 0; 733 goto err; 734 } 735 736 /* If a match was found, then it begins the starting of a cluster rule 737 * if it was already programmed, we need to overwrite these rules 738 */ 739 for (l = i+1; l < MAX_FILER_IDX; l++) { 740 if ((priv->ftp_rqfcr[l] & RQFCR_CLE) && 741 !(priv->ftp_rqfcr[l] & RQFCR_AND)) { 742 priv->ftp_rqfcr[l] = RQFCR_CLE | RQFCR_CMP_EXACT | 743 RQFCR_HASHTBL_0 | RQFCR_PID_MASK; 744 priv->ftp_rqfpr[l] = FPR_FILER_MASK; 745 gfar_write_filer(priv, l, priv->ftp_rqfcr[l], 746 priv->ftp_rqfpr[l]); 747 break; 748 } 749 750 if (!(priv->ftp_rqfcr[l] & RQFCR_CLE) && 751 (priv->ftp_rqfcr[l] & RQFCR_AND)) 752 continue; 753 else { 754 local_rqfpr[j] = priv->ftp_rqfpr[l]; 755 local_rqfcr[j] = priv->ftp_rqfcr[l]; 756 j--; 757 } 758 } 759 760 priv->cur_filer_idx = l - 1; 761 762 /* hash rules */ 763 ethflow_to_filer_rules(priv, ethflow); 764 765 /* Write back the popped out rules again */ 766 for (k = j+1; k < MAX_FILER_IDX; k++) { 767 priv->ftp_rqfpr[priv->cur_filer_idx] = local_rqfpr[k]; 768 priv->ftp_rqfcr[priv->cur_filer_idx] = local_rqfcr[k]; 769 gfar_write_filer(priv, priv->cur_filer_idx, 770 local_rqfcr[k], local_rqfpr[k]); 771 if (!priv->cur_filer_idx) 772 break; 773 priv->cur_filer_idx = priv->cur_filer_idx - 1; 774 } 775 776 err: 777 kfree(local_rqfcr); 778 kfree(local_rqfpr); 779 return ret; 780 } 781 782 static int gfar_set_hash_opts(struct gfar_private *priv, 783 struct ethtool_rxnfc *cmd) 784 { 785 /* write the filer rules here */ 786 if (!gfar_ethflow_to_filer_table(priv, cmd->data, cmd->flow_type)) 787 return -EINVAL; 788 789 return 0; 790 } 791 792 static int gfar_check_filer_hardware(struct gfar_private *priv) 793 { 794 struct gfar __iomem *regs = priv->gfargrp[0].regs; 795 u32 i; 796 797 /* Check if we are in FIFO mode */ 798 i = gfar_read(®s->ecntrl); 799 i &= ECNTRL_FIFM; 800 if (i == ECNTRL_FIFM) { 801 netdev_notice(priv->ndev, "Interface in FIFO mode\n"); 802 i = gfar_read(®s->rctrl); 803 i &= RCTRL_PRSDEP_MASK | RCTRL_PRSFM; 804 if (i == (RCTRL_PRSDEP_MASK | RCTRL_PRSFM)) { 805 netdev_info(priv->ndev, 806 "Receive Queue Filtering enabled\n"); 807 } else { 808 netdev_warn(priv->ndev, 809 "Receive Queue Filtering disabled\n"); 810 return -EOPNOTSUPP; 811 } 812 } 813 /* Or in standard mode */ 814 else { 815 i = gfar_read(®s->rctrl); 816 i &= RCTRL_PRSDEP_MASK; 817 if (i == RCTRL_PRSDEP_MASK) { 818 netdev_info(priv->ndev, 819 "Receive Queue Filtering enabled\n"); 820 } else { 821 netdev_warn(priv->ndev, 822 "Receive Queue Filtering disabled\n"); 823 return -EOPNOTSUPP; 824 } 825 } 826 827 /* Sets the properties for arbitrary filer rule 828 * to the first 4 Layer 4 Bytes 829 */ 830 gfar_write(®s->rbifx, 0xC0C1C2C3); 831 return 0; 832 } 833 834 /* Write a mask to filer cache */ 835 static void gfar_set_mask(u32 mask, struct filer_table *tab) 836 { 837 tab->fe[tab->index].ctrl = RQFCR_AND | RQFCR_PID_MASK | RQFCR_CMP_EXACT; 838 tab->fe[tab->index].prop = mask; 839 tab->index++; 840 } 841 842 /* Sets parse bits (e.g. IP or TCP) */ 843 static void gfar_set_parse_bits(u32 value, u32 mask, struct filer_table *tab) 844 { 845 gfar_set_mask(mask, tab); 846 tab->fe[tab->index].ctrl = RQFCR_CMP_EXACT | RQFCR_PID_PARSE | 847 RQFCR_AND; 848 tab->fe[tab->index].prop = value; 849 tab->index++; 850 } 851 852 static void gfar_set_general_attribute(u32 value, u32 mask, u32 flag, 853 struct filer_table *tab) 854 { 855 gfar_set_mask(mask, tab); 856 tab->fe[tab->index].ctrl = RQFCR_CMP_EXACT | RQFCR_AND | flag; 857 tab->fe[tab->index].prop = value; 858 tab->index++; 859 } 860 861 /* For setting a tuple of value and mask of type flag 862 * Example: 863 * IP-Src = 10.0.0.0/255.0.0.0 864 * value: 0x0A000000 mask: FF000000 flag: RQFPR_IPV4 865 * 866 * Ethtool gives us a value=0 and mask=~0 for don't care a tuple 867 * For a don't care mask it gives us a 0 868 * 869 * The check if don't care and the mask adjustment if mask=0 is done for VLAN 870 * and MAC stuff on an upper level (due to missing information on this level). 871 * For these guys we can discard them if they are value=0 and mask=0. 872 * 873 * Further the all masks are one-padded for better hardware efficiency. 874 */ 875 static void gfar_set_attribute(u32 value, u32 mask, u32 flag, 876 struct filer_table *tab) 877 { 878 switch (flag) { 879 /* 3bit */ 880 case RQFCR_PID_PRI: 881 if (!(value | mask)) 882 return; 883 mask |= RQFCR_PID_PRI_MASK; 884 break; 885 /* 8bit */ 886 case RQFCR_PID_L4P: 887 case RQFCR_PID_TOS: 888 if (!~(mask | RQFCR_PID_L4P_MASK)) 889 return; 890 if (!mask) 891 mask = ~0; 892 else 893 mask |= RQFCR_PID_L4P_MASK; 894 break; 895 /* 12bit */ 896 case RQFCR_PID_VID: 897 if (!(value | mask)) 898 return; 899 mask |= RQFCR_PID_VID_MASK; 900 break; 901 /* 16bit */ 902 case RQFCR_PID_DPT: 903 case RQFCR_PID_SPT: 904 case RQFCR_PID_ETY: 905 if (!~(mask | RQFCR_PID_PORT_MASK)) 906 return; 907 if (!mask) 908 mask = ~0; 909 else 910 mask |= RQFCR_PID_PORT_MASK; 911 break; 912 /* 24bit */ 913 case RQFCR_PID_DAH: 914 case RQFCR_PID_DAL: 915 case RQFCR_PID_SAH: 916 case RQFCR_PID_SAL: 917 if (!(value | mask)) 918 return; 919 mask |= RQFCR_PID_MAC_MASK; 920 break; 921 /* for all real 32bit masks */ 922 default: 923 if (!~mask) 924 return; 925 if (!mask) 926 mask = ~0; 927 break; 928 } 929 gfar_set_general_attribute(value, mask, flag, tab); 930 } 931 932 /* Translates value and mask for UDP, TCP or SCTP */ 933 static void gfar_set_basic_ip(struct ethtool_tcpip4_spec *value, 934 struct ethtool_tcpip4_spec *mask, 935 struct filer_table *tab) 936 { 937 gfar_set_attribute(be32_to_cpu(value->ip4src), 938 be32_to_cpu(mask->ip4src), 939 RQFCR_PID_SIA, tab); 940 gfar_set_attribute(be32_to_cpu(value->ip4dst), 941 be32_to_cpu(mask->ip4dst), 942 RQFCR_PID_DIA, tab); 943 gfar_set_attribute(be16_to_cpu(value->pdst), 944 be16_to_cpu(mask->pdst), 945 RQFCR_PID_DPT, tab); 946 gfar_set_attribute(be16_to_cpu(value->psrc), 947 be16_to_cpu(mask->psrc), 948 RQFCR_PID_SPT, tab); 949 gfar_set_attribute(value->tos, mask->tos, RQFCR_PID_TOS, tab); 950 } 951 952 /* Translates value and mask for RAW-IP4 */ 953 static void gfar_set_user_ip(struct ethtool_usrip4_spec *value, 954 struct ethtool_usrip4_spec *mask, 955 struct filer_table *tab) 956 { 957 gfar_set_attribute(be32_to_cpu(value->ip4src), 958 be32_to_cpu(mask->ip4src), 959 RQFCR_PID_SIA, tab); 960 gfar_set_attribute(be32_to_cpu(value->ip4dst), 961 be32_to_cpu(mask->ip4dst), 962 RQFCR_PID_DIA, tab); 963 gfar_set_attribute(value->tos, mask->tos, RQFCR_PID_TOS, tab); 964 gfar_set_attribute(value->proto, mask->proto, RQFCR_PID_L4P, tab); 965 gfar_set_attribute(be32_to_cpu(value->l4_4_bytes), 966 be32_to_cpu(mask->l4_4_bytes), 967 RQFCR_PID_ARB, tab); 968 969 } 970 971 /* Translates value and mask for ETHER spec */ 972 static void gfar_set_ether(struct ethhdr *value, struct ethhdr *mask, 973 struct filer_table *tab) 974 { 975 u32 upper_temp_mask = 0; 976 u32 lower_temp_mask = 0; 977 978 /* Source address */ 979 if (!is_broadcast_ether_addr(mask->h_source)) { 980 if (is_zero_ether_addr(mask->h_source)) { 981 upper_temp_mask = 0xFFFFFFFF; 982 lower_temp_mask = 0xFFFFFFFF; 983 } else { 984 upper_temp_mask = mask->h_source[0] << 16 | 985 mask->h_source[1] << 8 | 986 mask->h_source[2]; 987 lower_temp_mask = mask->h_source[3] << 16 | 988 mask->h_source[4] << 8 | 989 mask->h_source[5]; 990 } 991 /* Upper 24bit */ 992 gfar_set_attribute(value->h_source[0] << 16 | 993 value->h_source[1] << 8 | 994 value->h_source[2], 995 upper_temp_mask, RQFCR_PID_SAH, tab); 996 /* And the same for the lower part */ 997 gfar_set_attribute(value->h_source[3] << 16 | 998 value->h_source[4] << 8 | 999 value->h_source[5], 1000 lower_temp_mask, RQFCR_PID_SAL, tab); 1001 } 1002 /* Destination address */ 1003 if (!is_broadcast_ether_addr(mask->h_dest)) { 1004 /* Special for destination is limited broadcast */ 1005 if ((is_broadcast_ether_addr(value->h_dest) && 1006 is_zero_ether_addr(mask->h_dest))) { 1007 gfar_set_parse_bits(RQFPR_EBC, RQFPR_EBC, tab); 1008 } else { 1009 if (is_zero_ether_addr(mask->h_dest)) { 1010 upper_temp_mask = 0xFFFFFFFF; 1011 lower_temp_mask = 0xFFFFFFFF; 1012 } else { 1013 upper_temp_mask = mask->h_dest[0] << 16 | 1014 mask->h_dest[1] << 8 | 1015 mask->h_dest[2]; 1016 lower_temp_mask = mask->h_dest[3] << 16 | 1017 mask->h_dest[4] << 8 | 1018 mask->h_dest[5]; 1019 } 1020 1021 /* Upper 24bit */ 1022 gfar_set_attribute(value->h_dest[0] << 16 | 1023 value->h_dest[1] << 8 | 1024 value->h_dest[2], 1025 upper_temp_mask, RQFCR_PID_DAH, tab); 1026 /* And the same for the lower part */ 1027 gfar_set_attribute(value->h_dest[3] << 16 | 1028 value->h_dest[4] << 8 | 1029 value->h_dest[5], 1030 lower_temp_mask, RQFCR_PID_DAL, tab); 1031 } 1032 } 1033 1034 gfar_set_attribute(be16_to_cpu(value->h_proto), 1035 be16_to_cpu(mask->h_proto), 1036 RQFCR_PID_ETY, tab); 1037 } 1038 1039 static inline u32 vlan_tci_vid(struct ethtool_rx_flow_spec *rule) 1040 { 1041 return be16_to_cpu(rule->h_ext.vlan_tci) & VLAN_VID_MASK; 1042 } 1043 1044 static inline u32 vlan_tci_vidm(struct ethtool_rx_flow_spec *rule) 1045 { 1046 return be16_to_cpu(rule->m_ext.vlan_tci) & VLAN_VID_MASK; 1047 } 1048 1049 static inline u32 vlan_tci_cfi(struct ethtool_rx_flow_spec *rule) 1050 { 1051 return be16_to_cpu(rule->h_ext.vlan_tci) & VLAN_CFI_MASK; 1052 } 1053 1054 static inline u32 vlan_tci_cfim(struct ethtool_rx_flow_spec *rule) 1055 { 1056 return be16_to_cpu(rule->m_ext.vlan_tci) & VLAN_CFI_MASK; 1057 } 1058 1059 static inline u32 vlan_tci_prio(struct ethtool_rx_flow_spec *rule) 1060 { 1061 return (be16_to_cpu(rule->h_ext.vlan_tci) & VLAN_PRIO_MASK) >> 1062 VLAN_PRIO_SHIFT; 1063 } 1064 1065 static inline u32 vlan_tci_priom(struct ethtool_rx_flow_spec *rule) 1066 { 1067 return (be16_to_cpu(rule->m_ext.vlan_tci) & VLAN_PRIO_MASK) >> 1068 VLAN_PRIO_SHIFT; 1069 } 1070 1071 /* Convert a rule to binary filter format of gianfar */ 1072 static int gfar_convert_to_filer(struct ethtool_rx_flow_spec *rule, 1073 struct filer_table *tab) 1074 { 1075 u32 vlan = 0, vlan_mask = 0; 1076 u32 id = 0, id_mask = 0; 1077 u32 cfi = 0, cfi_mask = 0; 1078 u32 prio = 0, prio_mask = 0; 1079 u32 old_index = tab->index; 1080 1081 /* Check if vlan is wanted */ 1082 if ((rule->flow_type & FLOW_EXT) && 1083 (rule->m_ext.vlan_tci != cpu_to_be16(0xFFFF))) { 1084 if (!rule->m_ext.vlan_tci) 1085 rule->m_ext.vlan_tci = cpu_to_be16(0xFFFF); 1086 1087 vlan = RQFPR_VLN; 1088 vlan_mask = RQFPR_VLN; 1089 1090 /* Separate the fields */ 1091 id = vlan_tci_vid(rule); 1092 id_mask = vlan_tci_vidm(rule); 1093 cfi = vlan_tci_cfi(rule); 1094 cfi_mask = vlan_tci_cfim(rule); 1095 prio = vlan_tci_prio(rule); 1096 prio_mask = vlan_tci_priom(rule); 1097 1098 if (cfi_mask) { 1099 if (cfi) 1100 vlan |= RQFPR_CFI; 1101 vlan_mask |= RQFPR_CFI; 1102 } 1103 } 1104 1105 switch (rule->flow_type & ~FLOW_EXT) { 1106 case TCP_V4_FLOW: 1107 gfar_set_parse_bits(RQFPR_IPV4 | RQFPR_TCP | vlan, 1108 RQFPR_IPV4 | RQFPR_TCP | vlan_mask, tab); 1109 gfar_set_basic_ip(&rule->h_u.tcp_ip4_spec, 1110 &rule->m_u.tcp_ip4_spec, tab); 1111 break; 1112 case UDP_V4_FLOW: 1113 gfar_set_parse_bits(RQFPR_IPV4 | RQFPR_UDP | vlan, 1114 RQFPR_IPV4 | RQFPR_UDP | vlan_mask, tab); 1115 gfar_set_basic_ip(&rule->h_u.udp_ip4_spec, 1116 &rule->m_u.udp_ip4_spec, tab); 1117 break; 1118 case SCTP_V4_FLOW: 1119 gfar_set_parse_bits(RQFPR_IPV4 | vlan, RQFPR_IPV4 | vlan_mask, 1120 tab); 1121 gfar_set_attribute(132, 0, RQFCR_PID_L4P, tab); 1122 gfar_set_basic_ip((struct ethtool_tcpip4_spec *)&rule->h_u, 1123 (struct ethtool_tcpip4_spec *)&rule->m_u, 1124 tab); 1125 break; 1126 case IP_USER_FLOW: 1127 gfar_set_parse_bits(RQFPR_IPV4 | vlan, RQFPR_IPV4 | vlan_mask, 1128 tab); 1129 gfar_set_user_ip((struct ethtool_usrip4_spec *) &rule->h_u, 1130 (struct ethtool_usrip4_spec *) &rule->m_u, 1131 tab); 1132 break; 1133 case ETHER_FLOW: 1134 if (vlan) 1135 gfar_set_parse_bits(vlan, vlan_mask, tab); 1136 gfar_set_ether((struct ethhdr *) &rule->h_u, 1137 (struct ethhdr *) &rule->m_u, tab); 1138 break; 1139 default: 1140 return -1; 1141 } 1142 1143 /* Set the vlan attributes in the end */ 1144 if (vlan) { 1145 gfar_set_attribute(id, id_mask, RQFCR_PID_VID, tab); 1146 gfar_set_attribute(prio, prio_mask, RQFCR_PID_PRI, tab); 1147 } 1148 1149 /* If there has been nothing written till now, it must be a default */ 1150 if (tab->index == old_index) { 1151 gfar_set_mask(0xFFFFFFFF, tab); 1152 tab->fe[tab->index].ctrl = 0x20; 1153 tab->fe[tab->index].prop = 0x0; 1154 tab->index++; 1155 } 1156 1157 /* Remove last AND */ 1158 tab->fe[tab->index - 1].ctrl &= (~RQFCR_AND); 1159 1160 /* Specify which queue to use or to drop */ 1161 if (rule->ring_cookie == RX_CLS_FLOW_DISC) 1162 tab->fe[tab->index - 1].ctrl |= RQFCR_RJE; 1163 else 1164 tab->fe[tab->index - 1].ctrl |= (rule->ring_cookie << 10); 1165 1166 /* Only big enough entries can be clustered */ 1167 if (tab->index > (old_index + 2)) { 1168 tab->fe[old_index + 1].ctrl |= RQFCR_CLE; 1169 tab->fe[tab->index - 1].ctrl |= RQFCR_CLE; 1170 } 1171 1172 /* In rare cases the cache can be full while there is 1173 * free space in hw 1174 */ 1175 if (tab->index > MAX_FILER_CACHE_IDX - 1) 1176 return -EBUSY; 1177 1178 return 0; 1179 } 1180 1181 /* Write the bit-pattern from software's buffer to hardware registers */ 1182 static int gfar_write_filer_table(struct gfar_private *priv, 1183 struct filer_table *tab) 1184 { 1185 u32 i = 0; 1186 if (tab->index > MAX_FILER_IDX - 1) 1187 return -EBUSY; 1188 1189 /* Fill regular entries */ 1190 for (; i < MAX_FILER_IDX && (tab->fe[i].ctrl | tab->fe[i].prop); i++) 1191 gfar_write_filer(priv, i, tab->fe[i].ctrl, tab->fe[i].prop); 1192 /* Fill the rest with fall-troughs */ 1193 for (; i < MAX_FILER_IDX; i++) 1194 gfar_write_filer(priv, i, 0x60, 0xFFFFFFFF); 1195 /* Last entry must be default accept 1196 * because that's what people expect 1197 */ 1198 gfar_write_filer(priv, i, 0x20, 0x0); 1199 1200 return 0; 1201 } 1202 1203 static int gfar_check_capability(struct ethtool_rx_flow_spec *flow, 1204 struct gfar_private *priv) 1205 { 1206 1207 if (flow->flow_type & FLOW_EXT) { 1208 if (~flow->m_ext.data[0] || ~flow->m_ext.data[1]) 1209 netdev_warn(priv->ndev, 1210 "User-specific data not supported!\n"); 1211 if (~flow->m_ext.vlan_etype) 1212 netdev_warn(priv->ndev, 1213 "VLAN-etype not supported!\n"); 1214 } 1215 if (flow->flow_type == IP_USER_FLOW) 1216 if (flow->h_u.usr_ip4_spec.ip_ver != ETH_RX_NFC_IP4) 1217 netdev_warn(priv->ndev, 1218 "IP-Version differing from IPv4 not supported!\n"); 1219 1220 return 0; 1221 } 1222 1223 static int gfar_process_filer_changes(struct gfar_private *priv) 1224 { 1225 struct ethtool_flow_spec_container *j; 1226 struct filer_table *tab; 1227 s32 ret = 0; 1228 1229 /* So index is set to zero, too! */ 1230 tab = kzalloc(sizeof(*tab), GFP_KERNEL); 1231 if (tab == NULL) 1232 return -ENOMEM; 1233 1234 /* Now convert the existing filer data from flow_spec into 1235 * filer tables binary format 1236 */ 1237 list_for_each_entry(j, &priv->rx_list.list, list) { 1238 ret = gfar_convert_to_filer(&j->fs, tab); 1239 if (ret == -EBUSY) { 1240 netdev_err(priv->ndev, 1241 "Rule not added: No free space!\n"); 1242 goto end; 1243 } 1244 if (ret == -1) { 1245 netdev_err(priv->ndev, 1246 "Rule not added: Unsupported Flow-type!\n"); 1247 goto end; 1248 } 1249 } 1250 1251 /* Write everything to hardware */ 1252 ret = gfar_write_filer_table(priv, tab); 1253 if (ret == -EBUSY) { 1254 netdev_err(priv->ndev, "Rule not added: No free space!\n"); 1255 goto end; 1256 } 1257 1258 end: 1259 kfree(tab); 1260 return ret; 1261 } 1262 1263 static void gfar_invert_masks(struct ethtool_rx_flow_spec *flow) 1264 { 1265 u32 i = 0; 1266 1267 for (i = 0; i < sizeof(flow->m_u); i++) 1268 flow->m_u.hdata[i] ^= 0xFF; 1269 1270 flow->m_ext.vlan_etype ^= cpu_to_be16(0xFFFF); 1271 flow->m_ext.vlan_tci ^= cpu_to_be16(0xFFFF); 1272 flow->m_ext.data[0] ^= cpu_to_be32(~0); 1273 flow->m_ext.data[1] ^= cpu_to_be32(~0); 1274 } 1275 1276 static int gfar_add_cls(struct gfar_private *priv, 1277 struct ethtool_rx_flow_spec *flow) 1278 { 1279 struct ethtool_flow_spec_container *temp, *comp; 1280 int ret = 0; 1281 1282 temp = kmalloc(sizeof(*temp), GFP_KERNEL); 1283 if (temp == NULL) 1284 return -ENOMEM; 1285 memcpy(&temp->fs, flow, sizeof(temp->fs)); 1286 1287 gfar_invert_masks(&temp->fs); 1288 ret = gfar_check_capability(&temp->fs, priv); 1289 if (ret) 1290 goto clean_mem; 1291 /* Link in the new element at the right @location */ 1292 if (list_empty(&priv->rx_list.list)) { 1293 ret = gfar_check_filer_hardware(priv); 1294 if (ret != 0) 1295 goto clean_mem; 1296 list_add(&temp->list, &priv->rx_list.list); 1297 goto process; 1298 } else { 1299 list_for_each_entry(comp, &priv->rx_list.list, list) { 1300 if (comp->fs.location > flow->location) { 1301 list_add_tail(&temp->list, &comp->list); 1302 goto process; 1303 } 1304 if (comp->fs.location == flow->location) { 1305 netdev_err(priv->ndev, 1306 "Rule not added: ID %d not free!\n", 1307 flow->location); 1308 ret = -EBUSY; 1309 goto clean_mem; 1310 } 1311 } 1312 list_add_tail(&temp->list, &priv->rx_list.list); 1313 } 1314 1315 process: 1316 priv->rx_list.count++; 1317 ret = gfar_process_filer_changes(priv); 1318 if (ret) 1319 goto clean_list; 1320 return ret; 1321 1322 clean_list: 1323 priv->rx_list.count--; 1324 list_del(&temp->list); 1325 clean_mem: 1326 kfree(temp); 1327 return ret; 1328 } 1329 1330 static int gfar_del_cls(struct gfar_private *priv, u32 loc) 1331 { 1332 struct ethtool_flow_spec_container *comp; 1333 u32 ret = -EINVAL; 1334 1335 if (list_empty(&priv->rx_list.list)) 1336 return ret; 1337 1338 list_for_each_entry(comp, &priv->rx_list.list, list) { 1339 if (comp->fs.location == loc) { 1340 list_del(&comp->list); 1341 kfree(comp); 1342 priv->rx_list.count--; 1343 gfar_process_filer_changes(priv); 1344 ret = 0; 1345 break; 1346 } 1347 } 1348 1349 return ret; 1350 } 1351 1352 static int gfar_get_cls(struct gfar_private *priv, struct ethtool_rxnfc *cmd) 1353 { 1354 struct ethtool_flow_spec_container *comp; 1355 u32 ret = -EINVAL; 1356 1357 list_for_each_entry(comp, &priv->rx_list.list, list) { 1358 if (comp->fs.location == cmd->fs.location) { 1359 memcpy(&cmd->fs, &comp->fs, sizeof(cmd->fs)); 1360 gfar_invert_masks(&cmd->fs); 1361 ret = 0; 1362 break; 1363 } 1364 } 1365 1366 return ret; 1367 } 1368 1369 static int gfar_get_cls_all(struct gfar_private *priv, 1370 struct ethtool_rxnfc *cmd, u32 *rule_locs) 1371 { 1372 struct ethtool_flow_spec_container *comp; 1373 u32 i = 0; 1374 1375 list_for_each_entry(comp, &priv->rx_list.list, list) { 1376 if (i == cmd->rule_cnt) 1377 return -EMSGSIZE; 1378 rule_locs[i] = comp->fs.location; 1379 i++; 1380 } 1381 1382 cmd->data = MAX_FILER_IDX; 1383 cmd->rule_cnt = i; 1384 1385 return 0; 1386 } 1387 1388 static int gfar_set_nfc(struct net_device *dev, struct ethtool_rxnfc *cmd) 1389 { 1390 struct gfar_private *priv = netdev_priv(dev); 1391 int ret = 0; 1392 1393 if (test_bit(GFAR_RESETTING, &priv->state)) 1394 return -EBUSY; 1395 1396 mutex_lock(&priv->rx_queue_access); 1397 1398 switch (cmd->cmd) { 1399 case ETHTOOL_SRXFH: 1400 ret = gfar_set_hash_opts(priv, cmd); 1401 break; 1402 case ETHTOOL_SRXCLSRLINS: 1403 if ((cmd->fs.ring_cookie != RX_CLS_FLOW_DISC && 1404 cmd->fs.ring_cookie >= priv->num_rx_queues) || 1405 cmd->fs.location >= MAX_FILER_IDX) { 1406 ret = -EINVAL; 1407 break; 1408 } 1409 ret = gfar_add_cls(priv, &cmd->fs); 1410 break; 1411 case ETHTOOL_SRXCLSRLDEL: 1412 ret = gfar_del_cls(priv, cmd->fs.location); 1413 break; 1414 default: 1415 ret = -EINVAL; 1416 } 1417 1418 mutex_unlock(&priv->rx_queue_access); 1419 1420 return ret; 1421 } 1422 1423 static int gfar_get_nfc(struct net_device *dev, struct ethtool_rxnfc *cmd, 1424 u32 *rule_locs) 1425 { 1426 struct gfar_private *priv = netdev_priv(dev); 1427 int ret = 0; 1428 1429 switch (cmd->cmd) { 1430 case ETHTOOL_GRXRINGS: 1431 cmd->data = priv->num_rx_queues; 1432 break; 1433 case ETHTOOL_GRXCLSRLCNT: 1434 cmd->rule_cnt = priv->rx_list.count; 1435 break; 1436 case ETHTOOL_GRXCLSRULE: 1437 ret = gfar_get_cls(priv, cmd); 1438 break; 1439 case ETHTOOL_GRXCLSRLALL: 1440 ret = gfar_get_cls_all(priv, cmd, rule_locs); 1441 break; 1442 default: 1443 ret = -EINVAL; 1444 break; 1445 } 1446 1447 return ret; 1448 } 1449 1450 static int gfar_get_ts_info(struct net_device *dev, 1451 struct kernel_ethtool_ts_info *info) 1452 { 1453 struct gfar_private *priv = netdev_priv(dev); 1454 struct platform_device *ptp_dev; 1455 struct device_node *ptp_node; 1456 struct ptp_qoriq *ptp = NULL; 1457 1458 if (!(priv->device_flags & FSL_GIANFAR_DEV_HAS_TIMER)) { 1459 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE; 1460 return 0; 1461 } 1462 1463 ptp_node = of_find_compatible_node(NULL, NULL, "fsl,etsec-ptp"); 1464 if (ptp_node) { 1465 ptp_dev = of_find_device_by_node(ptp_node); 1466 of_node_put(ptp_node); 1467 if (ptp_dev) 1468 ptp = platform_get_drvdata(ptp_dev); 1469 } 1470 1471 if (ptp) 1472 info->phc_index = ptp->phc_index; 1473 1474 info->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE | 1475 SOF_TIMESTAMPING_RX_HARDWARE | 1476 SOF_TIMESTAMPING_RAW_HARDWARE | 1477 SOF_TIMESTAMPING_TX_SOFTWARE; 1478 info->tx_types = (1 << HWTSTAMP_TX_OFF) | 1479 (1 << HWTSTAMP_TX_ON); 1480 info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) | 1481 (1 << HWTSTAMP_FILTER_ALL); 1482 return 0; 1483 } 1484 1485 const struct ethtool_ops gfar_ethtool_ops = { 1486 .supported_coalesce_params = ETHTOOL_COALESCE_USECS | 1487 ETHTOOL_COALESCE_MAX_FRAMES, 1488 .get_drvinfo = gfar_gdrvinfo, 1489 .get_regs_len = gfar_reglen, 1490 .get_regs = gfar_get_regs, 1491 .get_link = ethtool_op_get_link, 1492 .get_coalesce = gfar_gcoalesce, 1493 .set_coalesce = gfar_scoalesce, 1494 .get_ringparam = gfar_gringparam, 1495 .set_ringparam = gfar_sringparam, 1496 .get_pauseparam = gfar_gpauseparam, 1497 .set_pauseparam = gfar_spauseparam, 1498 .get_strings = gfar_gstrings, 1499 .get_sset_count = gfar_sset_count, 1500 .get_ethtool_stats = gfar_fill_stats, 1501 .get_msglevel = gfar_get_msglevel, 1502 .set_msglevel = gfar_set_msglevel, 1503 #ifdef CONFIG_PM 1504 .get_wol = gfar_get_wol, 1505 .set_wol = gfar_set_wol, 1506 #endif 1507 .set_rxnfc = gfar_set_nfc, 1508 .get_rxnfc = gfar_get_nfc, 1509 .get_ts_info = gfar_get_ts_info, 1510 .get_link_ksettings = phy_ethtool_get_link_ksettings, 1511 .set_link_ksettings = phy_ethtool_set_link_ksettings, 1512 }; 1513