xref: /linux/drivers/net/ethernet/freescale/fs_enet/mac-fec.c (revision c4ee0af3fa0dc65f690fc908f02b8355f9576ea0)
1 /*
2  * Freescale Ethernet controllers
3  *
4  * Copyright (c) 2005 Intracom S.A.
5  *  by Pantelis Antoniou <panto@intracom.gr>
6  *
7  * 2005 (c) MontaVista Software, Inc.
8  * Vitaly Bordug <vbordug@ru.mvista.com>
9  *
10  * This file is licensed under the terms of the GNU General Public License
11  * version 2. This program is licensed "as is" without any warranty of any
12  * kind, whether express or implied.
13  */
14 
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/types.h>
18 #include <linux/string.h>
19 #include <linux/ptrace.h>
20 #include <linux/errno.h>
21 #include <linux/ioport.h>
22 #include <linux/interrupt.h>
23 #include <linux/init.h>
24 #include <linux/delay.h>
25 #include <linux/netdevice.h>
26 #include <linux/etherdevice.h>
27 #include <linux/skbuff.h>
28 #include <linux/spinlock.h>
29 #include <linux/mii.h>
30 #include <linux/ethtool.h>
31 #include <linux/bitops.h>
32 #include <linux/fs.h>
33 #include <linux/platform_device.h>
34 #include <linux/of_address.h>
35 #include <linux/of_device.h>
36 #include <linux/of_irq.h>
37 #include <linux/gfp.h>
38 
39 #include <asm/irq.h>
40 #include <asm/uaccess.h>
41 
42 #ifdef CONFIG_8xx
43 #include <asm/8xx_immap.h>
44 #include <asm/pgtable.h>
45 #include <asm/mpc8xx.h>
46 #include <asm/cpm1.h>
47 #endif
48 
49 #include "fs_enet.h"
50 #include "fec.h"
51 
52 /*************************************************/
53 
54 #if defined(CONFIG_CPM1)
55 /* for a CPM1 __raw_xxx's are sufficient */
56 #define __fs_out32(addr, x)	__raw_writel(x, addr)
57 #define __fs_out16(addr, x)	__raw_writew(x, addr)
58 #define __fs_in32(addr)	__raw_readl(addr)
59 #define __fs_in16(addr)	__raw_readw(addr)
60 #else
61 /* for others play it safe */
62 #define __fs_out32(addr, x)	out_be32(addr, x)
63 #define __fs_out16(addr, x)	out_be16(addr, x)
64 #define __fs_in32(addr)	in_be32(addr)
65 #define __fs_in16(addr)	in_be16(addr)
66 #endif
67 
68 /* write */
69 #define FW(_fecp, _reg, _v) __fs_out32(&(_fecp)->fec_ ## _reg, (_v))
70 
71 /* read */
72 #define FR(_fecp, _reg)	__fs_in32(&(_fecp)->fec_ ## _reg)
73 
74 /* set bits */
75 #define FS(_fecp, _reg, _v) FW(_fecp, _reg, FR(_fecp, _reg) | (_v))
76 
77 /* clear bits */
78 #define FC(_fecp, _reg, _v) FW(_fecp, _reg, FR(_fecp, _reg) & ~(_v))
79 
80 /*
81  * Delay to wait for FEC reset command to complete (in us)
82  */
83 #define FEC_RESET_DELAY		50
84 
85 static int whack_reset(struct fec __iomem *fecp)
86 {
87 	int i;
88 
89 	FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_RESET);
90 	for (i = 0; i < FEC_RESET_DELAY; i++) {
91 		if ((FR(fecp, ecntrl) & FEC_ECNTRL_RESET) == 0)
92 			return 0;	/* OK */
93 		udelay(1);
94 	}
95 
96 	return -1;
97 }
98 
99 static int do_pd_setup(struct fs_enet_private *fep)
100 {
101 	struct platform_device *ofdev = to_platform_device(fep->dev);
102 
103 	fep->interrupt = irq_of_parse_and_map(ofdev->dev.of_node, 0);
104 	if (fep->interrupt == NO_IRQ)
105 		return -EINVAL;
106 
107 	fep->fec.fecp = of_iomap(ofdev->dev.of_node, 0);
108 	if (!fep->fcc.fccp)
109 		return -EINVAL;
110 
111 	return 0;
112 }
113 
114 #define FEC_NAPI_RX_EVENT_MSK	(FEC_ENET_RXF | FEC_ENET_RXB)
115 #define FEC_RX_EVENT		(FEC_ENET_RXF)
116 #define FEC_TX_EVENT		(FEC_ENET_TXF)
117 #define FEC_ERR_EVENT_MSK	(FEC_ENET_HBERR | FEC_ENET_BABR | \
118 				 FEC_ENET_BABT | FEC_ENET_EBERR)
119 
120 static int setup_data(struct net_device *dev)
121 {
122 	struct fs_enet_private *fep = netdev_priv(dev);
123 
124 	if (do_pd_setup(fep) != 0)
125 		return -EINVAL;
126 
127 	fep->fec.hthi = 0;
128 	fep->fec.htlo = 0;
129 
130 	fep->ev_napi_rx = FEC_NAPI_RX_EVENT_MSK;
131 	fep->ev_rx = FEC_RX_EVENT;
132 	fep->ev_tx = FEC_TX_EVENT;
133 	fep->ev_err = FEC_ERR_EVENT_MSK;
134 
135 	return 0;
136 }
137 
138 static int allocate_bd(struct net_device *dev)
139 {
140 	struct fs_enet_private *fep = netdev_priv(dev);
141 	const struct fs_platform_info *fpi = fep->fpi;
142 
143 	fep->ring_base = (void __force __iomem *)dma_alloc_coherent(fep->dev,
144 					    (fpi->tx_ring + fpi->rx_ring) *
145 					    sizeof(cbd_t), &fep->ring_mem_addr,
146 					    GFP_KERNEL);
147 	if (fep->ring_base == NULL)
148 		return -ENOMEM;
149 
150 	return 0;
151 }
152 
153 static void free_bd(struct net_device *dev)
154 {
155 	struct fs_enet_private *fep = netdev_priv(dev);
156 	const struct fs_platform_info *fpi = fep->fpi;
157 
158 	if(fep->ring_base)
159 		dma_free_coherent(fep->dev, (fpi->tx_ring + fpi->rx_ring)
160 					* sizeof(cbd_t),
161 					(void __force *)fep->ring_base,
162 					fep->ring_mem_addr);
163 }
164 
165 static void cleanup_data(struct net_device *dev)
166 {
167 	/* nothing */
168 }
169 
170 static void set_promiscuous_mode(struct net_device *dev)
171 {
172 	struct fs_enet_private *fep = netdev_priv(dev);
173 	struct fec __iomem *fecp = fep->fec.fecp;
174 
175 	FS(fecp, r_cntrl, FEC_RCNTRL_PROM);
176 }
177 
178 static void set_multicast_start(struct net_device *dev)
179 {
180 	struct fs_enet_private *fep = netdev_priv(dev);
181 
182 	fep->fec.hthi = 0;
183 	fep->fec.htlo = 0;
184 }
185 
186 static void set_multicast_one(struct net_device *dev, const u8 *mac)
187 {
188 	struct fs_enet_private *fep = netdev_priv(dev);
189 	int temp, hash_index, i, j;
190 	u32 crc, csrVal;
191 	u8 byte, msb;
192 
193 	crc = 0xffffffff;
194 	for (i = 0; i < 6; i++) {
195 		byte = mac[i];
196 		for (j = 0; j < 8; j++) {
197 			msb = crc >> 31;
198 			crc <<= 1;
199 			if (msb ^ (byte & 0x1))
200 				crc ^= FEC_CRC_POLY;
201 			byte >>= 1;
202 		}
203 	}
204 
205 	temp = (crc & 0x3f) >> 1;
206 	hash_index = ((temp & 0x01) << 4) |
207 		     ((temp & 0x02) << 2) |
208 		     ((temp & 0x04)) |
209 		     ((temp & 0x08) >> 2) |
210 		     ((temp & 0x10) >> 4);
211 	csrVal = 1 << hash_index;
212 	if (crc & 1)
213 		fep->fec.hthi |= csrVal;
214 	else
215 		fep->fec.htlo |= csrVal;
216 }
217 
218 static void set_multicast_finish(struct net_device *dev)
219 {
220 	struct fs_enet_private *fep = netdev_priv(dev);
221 	struct fec __iomem *fecp = fep->fec.fecp;
222 
223 	/* if all multi or too many multicasts; just enable all */
224 	if ((dev->flags & IFF_ALLMULTI) != 0 ||
225 	    netdev_mc_count(dev) > FEC_MAX_MULTICAST_ADDRS) {
226 		fep->fec.hthi = 0xffffffffU;
227 		fep->fec.htlo = 0xffffffffU;
228 	}
229 
230 	FC(fecp, r_cntrl, FEC_RCNTRL_PROM);
231 	FW(fecp, grp_hash_table_high, fep->fec.hthi);
232 	FW(fecp, grp_hash_table_low, fep->fec.htlo);
233 }
234 
235 static void set_multicast_list(struct net_device *dev)
236 {
237 	struct netdev_hw_addr *ha;
238 
239 	if ((dev->flags & IFF_PROMISC) == 0) {
240 		set_multicast_start(dev);
241 		netdev_for_each_mc_addr(ha, dev)
242 			set_multicast_one(dev, ha->addr);
243 		set_multicast_finish(dev);
244 	} else
245 		set_promiscuous_mode(dev);
246 }
247 
248 static void restart(struct net_device *dev)
249 {
250 	struct fs_enet_private *fep = netdev_priv(dev);
251 	struct fec __iomem *fecp = fep->fec.fecp;
252 	const struct fs_platform_info *fpi = fep->fpi;
253 	dma_addr_t rx_bd_base_phys, tx_bd_base_phys;
254 	int r;
255 	u32 addrhi, addrlo;
256 
257 	struct mii_bus* mii = fep->phydev->bus;
258 	struct fec_info* fec_inf = mii->priv;
259 
260 	r = whack_reset(fep->fec.fecp);
261 	if (r != 0)
262 		dev_err(fep->dev, "FEC Reset FAILED!\n");
263 	/*
264 	 * Set station address.
265 	 */
266 	addrhi = ((u32) dev->dev_addr[0] << 24) |
267 		 ((u32) dev->dev_addr[1] << 16) |
268 		 ((u32) dev->dev_addr[2] <<  8) |
269 		  (u32) dev->dev_addr[3];
270 	addrlo = ((u32) dev->dev_addr[4] << 24) |
271 		 ((u32) dev->dev_addr[5] << 16);
272 	FW(fecp, addr_low, addrhi);
273 	FW(fecp, addr_high, addrlo);
274 
275 	/*
276 	 * Reset all multicast.
277 	 */
278 	FW(fecp, grp_hash_table_high, fep->fec.hthi);
279 	FW(fecp, grp_hash_table_low, fep->fec.htlo);
280 
281 	/*
282 	 * Set maximum receive buffer size.
283 	 */
284 	FW(fecp, r_buff_size, PKT_MAXBLR_SIZE);
285 #ifdef CONFIG_FS_ENET_MPC5121_FEC
286 	FW(fecp, r_cntrl, PKT_MAXBUF_SIZE << 16);
287 #else
288 	FW(fecp, r_hash, PKT_MAXBUF_SIZE);
289 #endif
290 
291 	/* get physical address */
292 	rx_bd_base_phys = fep->ring_mem_addr;
293 	tx_bd_base_phys = rx_bd_base_phys + sizeof(cbd_t) * fpi->rx_ring;
294 
295 	/*
296 	 * Set receive and transmit descriptor base.
297 	 */
298 	FW(fecp, r_des_start, rx_bd_base_phys);
299 	FW(fecp, x_des_start, tx_bd_base_phys);
300 
301 	fs_init_bds(dev);
302 
303 	/*
304 	 * Enable big endian and don't care about SDMA FC.
305 	 */
306 #ifdef CONFIG_FS_ENET_MPC5121_FEC
307 	FS(fecp, dma_control, 0xC0000000);
308 #else
309 	FW(fecp, fun_code, 0x78000000);
310 #endif
311 
312 	/*
313 	 * Set MII speed.
314 	 */
315 	FW(fecp, mii_speed, fec_inf->mii_speed);
316 
317 	/*
318 	 * Clear any outstanding interrupt.
319 	 */
320 	FW(fecp, ievent, 0xffc0);
321 #ifndef CONFIG_FS_ENET_MPC5121_FEC
322 	FW(fecp, ivec, (virq_to_hw(fep->interrupt) / 2) << 29);
323 
324 	FW(fecp, r_cntrl, FEC_RCNTRL_MII_MODE);	/* MII enable */
325 #else
326 	/*
327 	 * Only set MII/RMII mode - do not touch maximum frame length
328 	 * configured before.
329 	 */
330 	FS(fecp, r_cntrl, fpi->use_rmii ?
331 			FEC_RCNTRL_RMII_MODE : FEC_RCNTRL_MII_MODE);
332 #endif
333 	/*
334 	 * adjust to duplex mode
335 	 */
336 	if (fep->phydev->duplex) {
337 		FC(fecp, r_cntrl, FEC_RCNTRL_DRT);
338 		FS(fecp, x_cntrl, FEC_TCNTRL_FDEN);	/* FD enable */
339 	} else {
340 		FS(fecp, r_cntrl, FEC_RCNTRL_DRT);
341 		FC(fecp, x_cntrl, FEC_TCNTRL_FDEN);	/* FD disable */
342 	}
343 
344 	/*
345 	 * Enable interrupts we wish to service.
346 	 */
347 	FW(fecp, imask, FEC_ENET_TXF | FEC_ENET_TXB |
348 	   FEC_ENET_RXF | FEC_ENET_RXB);
349 
350 	/*
351 	 * And last, enable the transmit and receive processing.
352 	 */
353 	FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
354 	FW(fecp, r_des_active, 0x01000000);
355 }
356 
357 static void stop(struct net_device *dev)
358 {
359 	struct fs_enet_private *fep = netdev_priv(dev);
360 	const struct fs_platform_info *fpi = fep->fpi;
361 	struct fec __iomem *fecp = fep->fec.fecp;
362 
363 	struct fec_info* feci= fep->phydev->bus->priv;
364 
365 	int i;
366 
367 	if ((FR(fecp, ecntrl) & FEC_ECNTRL_ETHER_EN) == 0)
368 		return;		/* already down */
369 
370 	FW(fecp, x_cntrl, 0x01);	/* Graceful transmit stop */
371 	for (i = 0; ((FR(fecp, ievent) & 0x10000000) == 0) &&
372 	     i < FEC_RESET_DELAY; i++)
373 		udelay(1);
374 
375 	if (i == FEC_RESET_DELAY)
376 		dev_warn(fep->dev, "FEC timeout on graceful transmit stop\n");
377 	/*
378 	 * Disable FEC. Let only MII interrupts.
379 	 */
380 	FW(fecp, imask, 0);
381 	FC(fecp, ecntrl, FEC_ECNTRL_ETHER_EN);
382 
383 	fs_cleanup_bds(dev);
384 
385 	/* shut down FEC1? that's where the mii bus is */
386 	if (fpi->has_phy) {
387 		FS(fecp, r_cntrl, fpi->use_rmii ?
388 				FEC_RCNTRL_RMII_MODE :
389 				FEC_RCNTRL_MII_MODE);	/* MII/RMII enable */
390 		FS(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
391 		FW(fecp, ievent, FEC_ENET_MII);
392 		FW(fecp, mii_speed, feci->mii_speed);
393 	}
394 }
395 
396 static void napi_clear_rx_event(struct net_device *dev)
397 {
398 	struct fs_enet_private *fep = netdev_priv(dev);
399 	struct fec __iomem *fecp = fep->fec.fecp;
400 
401 	FW(fecp, ievent, FEC_NAPI_RX_EVENT_MSK);
402 }
403 
404 static void napi_enable_rx(struct net_device *dev)
405 {
406 	struct fs_enet_private *fep = netdev_priv(dev);
407 	struct fec __iomem *fecp = fep->fec.fecp;
408 
409 	FS(fecp, imask, FEC_NAPI_RX_EVENT_MSK);
410 }
411 
412 static void napi_disable_rx(struct net_device *dev)
413 {
414 	struct fs_enet_private *fep = netdev_priv(dev);
415 	struct fec __iomem *fecp = fep->fec.fecp;
416 
417 	FC(fecp, imask, FEC_NAPI_RX_EVENT_MSK);
418 }
419 
420 static void rx_bd_done(struct net_device *dev)
421 {
422 	struct fs_enet_private *fep = netdev_priv(dev);
423 	struct fec __iomem *fecp = fep->fec.fecp;
424 
425 	FW(fecp, r_des_active, 0x01000000);
426 }
427 
428 static void tx_kickstart(struct net_device *dev)
429 {
430 	struct fs_enet_private *fep = netdev_priv(dev);
431 	struct fec __iomem *fecp = fep->fec.fecp;
432 
433 	FW(fecp, x_des_active, 0x01000000);
434 }
435 
436 static u32 get_int_events(struct net_device *dev)
437 {
438 	struct fs_enet_private *fep = netdev_priv(dev);
439 	struct fec __iomem *fecp = fep->fec.fecp;
440 
441 	return FR(fecp, ievent) & FR(fecp, imask);
442 }
443 
444 static void clear_int_events(struct net_device *dev, u32 int_events)
445 {
446 	struct fs_enet_private *fep = netdev_priv(dev);
447 	struct fec __iomem *fecp = fep->fec.fecp;
448 
449 	FW(fecp, ievent, int_events);
450 }
451 
452 static void ev_error(struct net_device *dev, u32 int_events)
453 {
454 	struct fs_enet_private *fep = netdev_priv(dev);
455 
456 	dev_warn(fep->dev, "FEC ERROR(s) 0x%x\n", int_events);
457 }
458 
459 static int get_regs(struct net_device *dev, void *p, int *sizep)
460 {
461 	struct fs_enet_private *fep = netdev_priv(dev);
462 
463 	if (*sizep < sizeof(struct fec))
464 		return -EINVAL;
465 
466 	memcpy_fromio(p, fep->fec.fecp, sizeof(struct fec));
467 
468 	return 0;
469 }
470 
471 static int get_regs_len(struct net_device *dev)
472 {
473 	return sizeof(struct fec);
474 }
475 
476 static void tx_restart(struct net_device *dev)
477 {
478 	/* nothing */
479 }
480 
481 /*************************************************************************/
482 
483 const struct fs_ops fs_fec_ops = {
484 	.setup_data		= setup_data,
485 	.cleanup_data		= cleanup_data,
486 	.set_multicast_list	= set_multicast_list,
487 	.restart		= restart,
488 	.stop			= stop,
489 	.napi_clear_rx_event	= napi_clear_rx_event,
490 	.napi_enable_rx		= napi_enable_rx,
491 	.napi_disable_rx	= napi_disable_rx,
492 	.rx_bd_done		= rx_bd_done,
493 	.tx_kickstart		= tx_kickstart,
494 	.get_int_events		= get_int_events,
495 	.clear_int_events	= clear_int_events,
496 	.ev_error		= ev_error,
497 	.get_regs		= get_regs,
498 	.get_regs_len		= get_regs_len,
499 	.tx_restart		= tx_restart,
500 	.allocate_bd		= allocate_bd,
501 	.free_bd		= free_bd,
502 };
503 
504