1*8585bdadSSean Anderson /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later */ 2414fd46eSIgal Liberman /* 3414fd46eSIgal Liberman * Copyright 2008 - 2015 Freescale Semiconductor Inc. 4b281f7b9SMadalin Bucur * Copyright 2020 NXP 5414fd46eSIgal Liberman */ 6414fd46eSIgal Liberman 7414fd46eSIgal Liberman #ifndef __FM_H 8414fd46eSIgal Liberman #define __FM_H 9414fd46eSIgal Liberman 10414fd46eSIgal Liberman #include <linux/io.h> 11ca58ce57SMadalin Bucur #include <linux/interrupt.h> 12ca58ce57SMadalin Bucur #include <linux/of_irq.h> 13414fd46eSIgal Liberman 14414fd46eSIgal Liberman /* FM Frame descriptor macros */ 15414fd46eSIgal Liberman /* Frame queue Context Override */ 16414fd46eSIgal Liberman #define FM_FD_CMD_FCO 0x80000000 17414fd46eSIgal Liberman #define FM_FD_CMD_RPD 0x40000000 /* Read Prepended Data */ 18dcce36abSYangbo Lu #define FM_FD_CMD_UPD 0x20000000 /* Update Prepended Data */ 19414fd46eSIgal Liberman #define FM_FD_CMD_DTC 0x10000000 /* Do L4 Checksum */ 20414fd46eSIgal Liberman 21414fd46eSIgal Liberman /* TX-Port: Unsupported Format */ 22414fd46eSIgal Liberman #define FM_FD_ERR_UNSUPPORTED_FORMAT 0x04000000 23414fd46eSIgal Liberman /* TX Port: Length Error */ 24414fd46eSIgal Liberman #define FM_FD_ERR_LENGTH 0x02000000 25414fd46eSIgal Liberman #define FM_FD_ERR_DMA 0x01000000 /* DMA Data error */ 26414fd46eSIgal Liberman 27414fd46eSIgal Liberman /* IPR frame (not error) */ 28414fd46eSIgal Liberman #define FM_FD_IPR 0x00000001 29414fd46eSIgal Liberman /* IPR non-consistent-sp */ 30414fd46eSIgal Liberman #define FM_FD_ERR_IPR_NCSP (0x00100000 | FM_FD_IPR) 31414fd46eSIgal Liberman /* IPR error */ 32414fd46eSIgal Liberman #define FM_FD_ERR_IPR (0x00200000 | FM_FD_IPR) 33414fd46eSIgal Liberman /* IPR timeout */ 34414fd46eSIgal Liberman #define FM_FD_ERR_IPR_TO (0x00300000 | FM_FD_IPR) 35414fd46eSIgal Liberman /* TX Port: Length Error */ 36414fd46eSIgal Liberman #define FM_FD_ERR_IPRE (FM_FD_ERR_IPR & ~FM_FD_IPR) 37414fd46eSIgal Liberman 38414fd46eSIgal Liberman /* Rx FIFO overflow, FCS error, code error, running disparity error 39414fd46eSIgal Liberman * (SGMII and TBI modes), FIFO parity error. PHY Sequence error, 40414fd46eSIgal Liberman * PHY error control character detected. 41414fd46eSIgal Liberman */ 42414fd46eSIgal Liberman #define FM_FD_ERR_PHYSICAL 0x00080000 43414fd46eSIgal Liberman /* Frame too long OR Frame size exceeds max_length_frame */ 44414fd46eSIgal Liberman #define FM_FD_ERR_SIZE 0x00040000 45414fd46eSIgal Liberman /* classification discard */ 46414fd46eSIgal Liberman #define FM_FD_ERR_CLS_DISCARD 0x00020000 47414fd46eSIgal Liberman /* Extract Out of Frame */ 48414fd46eSIgal Liberman #define FM_FD_ERR_EXTRACTION 0x00008000 49414fd46eSIgal Liberman /* No Scheme Selected */ 50414fd46eSIgal Liberman #define FM_FD_ERR_NO_SCHEME 0x00004000 51414fd46eSIgal Liberman /* Keysize Overflow */ 52414fd46eSIgal Liberman #define FM_FD_ERR_KEYSIZE_OVERFLOW 0x00002000 53414fd46eSIgal Liberman /* Frame color is red */ 54414fd46eSIgal Liberman #define FM_FD_ERR_COLOR_RED 0x00000800 55414fd46eSIgal Liberman /* Frame color is yellow */ 56414fd46eSIgal Liberman #define FM_FD_ERR_COLOR_YELLOW 0x00000400 57414fd46eSIgal Liberman /* Parser Time out Exceed */ 58414fd46eSIgal Liberman #define FM_FD_ERR_PRS_TIMEOUT 0x00000080 59414fd46eSIgal Liberman /* Invalid Soft Parser instruction */ 60414fd46eSIgal Liberman #define FM_FD_ERR_PRS_ILL_INSTRUCT 0x00000040 61414fd46eSIgal Liberman /* Header error was identified during parsing */ 62414fd46eSIgal Liberman #define FM_FD_ERR_PRS_HDR_ERR 0x00000020 63414fd46eSIgal Liberman /* Frame parsed beyind 256 first bytes */ 64414fd46eSIgal Liberman #define FM_FD_ERR_BLOCK_LIMIT_EXCEEDED 0x00000008 65414fd46eSIgal Liberman 66414fd46eSIgal Liberman /* non Frame-Manager error */ 67414fd46eSIgal Liberman #define FM_FD_RX_STATUS_ERR_NON_FM 0x00400000 68414fd46eSIgal Liberman 69414fd46eSIgal Liberman /* FMan driver defines */ 70414fd46eSIgal Liberman #define FMAN_BMI_FIFO_UNITS 0x100 71414fd46eSIgal Liberman #define OFFSET_UNITS 16 72414fd46eSIgal Liberman 73414fd46eSIgal Liberman /* BMan defines */ 74414fd46eSIgal Liberman #define BM_MAX_NUM_OF_POOLS 64 /* Buffers pools */ 75414fd46eSIgal Liberman #define FMAN_PORT_MAX_EXT_POOLS_NUM 8 /* External BM pools per Rx port */ 76414fd46eSIgal Liberman 77414fd46eSIgal Liberman struct fman; /* FMan data */ 78414fd46eSIgal Liberman 79414fd46eSIgal Liberman /* Enum for defining port types */ 80414fd46eSIgal Liberman enum fman_port_type { 81414fd46eSIgal Liberman FMAN_PORT_TYPE_TX = 0, /* TX Port */ 82414fd46eSIgal Liberman FMAN_PORT_TYPE_RX, /* RX Port */ 83414fd46eSIgal Liberman }; 84414fd46eSIgal Liberman 85414fd46eSIgal Liberman struct fman_rev_info { 86414fd46eSIgal Liberman u8 major; /* Major revision */ 87414fd46eSIgal Liberman u8 minor; /* Minor revision */ 88414fd46eSIgal Liberman }; 89414fd46eSIgal Liberman 90414fd46eSIgal Liberman enum fman_exceptions { 91414fd46eSIgal Liberman FMAN_EX_DMA_BUS_ERROR = 0, /* DMA bus error. */ 92414fd46eSIgal Liberman FMAN_EX_DMA_READ_ECC, /* Read Buffer ECC error */ 93414fd46eSIgal Liberman FMAN_EX_DMA_SYSTEM_WRITE_ECC, /* Write Buffer ECC err on sys side */ 94414fd46eSIgal Liberman FMAN_EX_DMA_FM_WRITE_ECC, /* Write Buffer ECC error on FM side */ 95414fd46eSIgal Liberman FMAN_EX_DMA_SINGLE_PORT_ECC, /* Single Port ECC error on FM side */ 96414fd46eSIgal Liberman FMAN_EX_FPM_STALL_ON_TASKS, /* Stall of tasks on FPM */ 97414fd46eSIgal Liberman FMAN_EX_FPM_SINGLE_ECC, /* Single ECC on FPM. */ 98414fd46eSIgal Liberman FMAN_EX_FPM_DOUBLE_ECC, /* Double ECC error on FPM ram access */ 99414fd46eSIgal Liberman FMAN_EX_QMI_SINGLE_ECC, /* Single ECC on QMI. */ 100414fd46eSIgal Liberman FMAN_EX_QMI_DOUBLE_ECC, /* Double bit ECC occurred on QMI */ 101414fd46eSIgal Liberman FMAN_EX_QMI_DEQ_FROM_UNKNOWN_PORTID,/* DeQ from unknown port id */ 102414fd46eSIgal Liberman FMAN_EX_BMI_LIST_RAM_ECC, /* Linked List RAM ECC error */ 103414fd46eSIgal Liberman FMAN_EX_BMI_STORAGE_PROFILE_ECC,/* storage profile */ 104414fd46eSIgal Liberman FMAN_EX_BMI_STATISTICS_RAM_ECC,/* Statistics RAM ECC Err Enable */ 105414fd46eSIgal Liberman FMAN_EX_BMI_DISPATCH_RAM_ECC, /* Dispatch RAM ECC Error Enable */ 106414fd46eSIgal Liberman FMAN_EX_IRAM_ECC, /* Double bit ECC occurred on IRAM */ 107414fd46eSIgal Liberman FMAN_EX_MURAM_ECC /* Double bit ECC occurred on MURAM */ 108414fd46eSIgal Liberman }; 109414fd46eSIgal Liberman 110414fd46eSIgal Liberman /* Parse results memory layout */ 111414fd46eSIgal Liberman struct fman_prs_result { 112414fd46eSIgal Liberman u8 lpid; /* Logical port id */ 113414fd46eSIgal Liberman u8 shimr; /* Shim header result */ 1143907e490SMadalin Bucur __be16 l2r; /* Layer 2 result */ 1153907e490SMadalin Bucur __be16 l3r; /* Layer 3 result */ 116414fd46eSIgal Liberman u8 l4r; /* Layer 4 result */ 117414fd46eSIgal Liberman u8 cplan; /* Classification plan id */ 1183907e490SMadalin Bucur __be16 nxthdr; /* Next Header */ 1193907e490SMadalin Bucur __be16 cksum; /* Running-sum */ 120414fd46eSIgal Liberman /* Flags&fragment-offset field of the last IP-header */ 1213907e490SMadalin Bucur __be16 flags_frag_off; 122414fd46eSIgal Liberman /* Routing type field of a IPV6 routing extension header */ 123414fd46eSIgal Liberman u8 route_type; 124414fd46eSIgal Liberman /* Routing Extension Header Present; last bit is IP valid */ 125414fd46eSIgal Liberman u8 rhp_ip_valid; 126414fd46eSIgal Liberman u8 shim_off[2]; /* Shim offset */ 127414fd46eSIgal Liberman u8 ip_pid_off; /* IP PID (last IP-proto) offset */ 128414fd46eSIgal Liberman u8 eth_off; /* ETH offset */ 129414fd46eSIgal Liberman u8 llc_snap_off; /* LLC_SNAP offset */ 130414fd46eSIgal Liberman u8 vlan_off[2]; /* VLAN offset */ 131414fd46eSIgal Liberman u8 etype_off; /* ETYPE offset */ 132414fd46eSIgal Liberman u8 pppoe_off; /* PPP offset */ 133414fd46eSIgal Liberman u8 mpls_off[2]; /* MPLS offset */ 134414fd46eSIgal Liberman u8 ip_off[2]; /* IP offset */ 135414fd46eSIgal Liberman u8 gre_off; /* GRE offset */ 136414fd46eSIgal Liberman u8 l4_off; /* Layer 4 offset */ 137414fd46eSIgal Liberman u8 nxthdr_off; /* Parser end point */ 138414fd46eSIgal Liberman }; 139414fd46eSIgal Liberman 140414fd46eSIgal Liberman /* A structure for defining buffer prefix area content. */ 141414fd46eSIgal Liberman struct fman_buffer_prefix_content { 142414fd46eSIgal Liberman /* Number of bytes to be left at the beginning of the external 143414fd46eSIgal Liberman * buffer; Note that the private-area will start from the base 144414fd46eSIgal Liberman * of the buffer address. 145414fd46eSIgal Liberman */ 146414fd46eSIgal Liberman u16 priv_data_size; 147414fd46eSIgal Liberman /* true to pass the parse result to/from the FM; 148414fd46eSIgal Liberman * User may use FM_PORT_GetBufferPrsResult() in 149414fd46eSIgal Liberman * order to get the parser-result from a buffer. 150414fd46eSIgal Liberman */ 151414fd46eSIgal Liberman bool pass_prs_result; 152414fd46eSIgal Liberman /* true to pass the timeStamp to/from the FM User */ 153414fd46eSIgal Liberman bool pass_time_stamp; 154414fd46eSIgal Liberman /* true to pass the KG hash result to/from the FM User may 155414fd46eSIgal Liberman * use FM_PORT_GetBufferHashResult() in order to get the 156414fd46eSIgal Liberman * parser-result from a buffer. 157414fd46eSIgal Liberman */ 158414fd46eSIgal Liberman bool pass_hash_result; 159414fd46eSIgal Liberman /* Add all other Internal-Context information: AD, 160414fd46eSIgal Liberman * hash-result, key, etc. 161414fd46eSIgal Liberman */ 162414fd46eSIgal Liberman u16 data_align; 163414fd46eSIgal Liberman }; 164414fd46eSIgal Liberman 165414fd46eSIgal Liberman /* A structure of information about each of the external 166414fd46eSIgal Liberman * buffer pools used by a port or storage-profile. 167414fd46eSIgal Liberman */ 168414fd46eSIgal Liberman struct fman_ext_pool_params { 169414fd46eSIgal Liberman u8 id; /* External buffer pool id */ 170414fd46eSIgal Liberman u16 size; /* External buffer pool buffer size */ 171414fd46eSIgal Liberman }; 172414fd46eSIgal Liberman 173414fd46eSIgal Liberman /* A structure for informing the driver about the external 174414fd46eSIgal Liberman * buffer pools allocated in the BM and used by a port or a 175414fd46eSIgal Liberman * storage-profile. 176414fd46eSIgal Liberman */ 177414fd46eSIgal Liberman struct fman_ext_pools { 178414fd46eSIgal Liberman u8 num_of_pools_used; /* Number of pools use by this port */ 179414fd46eSIgal Liberman struct fman_ext_pool_params ext_buf_pool[FMAN_PORT_MAX_EXT_POOLS_NUM]; 180414fd46eSIgal Liberman /* Parameters for each port */ 181414fd46eSIgal Liberman }; 182414fd46eSIgal Liberman 183414fd46eSIgal Liberman /* A structure for defining BM pool depletion criteria */ 184414fd46eSIgal Liberman struct fman_buf_pool_depletion { 185414fd46eSIgal Liberman /* select mode in which pause frames will be sent after a 186414fd46eSIgal Liberman * number of pools (all together!) are depleted 187414fd46eSIgal Liberman */ 188414fd46eSIgal Liberman bool pools_grp_mode_enable; 189414fd46eSIgal Liberman /* the number of depleted pools that will invoke pause 190414fd46eSIgal Liberman * frames transmission. 191414fd46eSIgal Liberman */ 192414fd46eSIgal Liberman u8 num_of_pools; 193414fd46eSIgal Liberman /* For each pool, true if it should be considered for 194414fd46eSIgal Liberman * depletion (Note - this pool must be used by this port!). 195414fd46eSIgal Liberman */ 196414fd46eSIgal Liberman bool pools_to_consider[BM_MAX_NUM_OF_POOLS]; 197414fd46eSIgal Liberman /* select mode in which pause frames will be sent 198414fd46eSIgal Liberman * after a single-pool is depleted; 199414fd46eSIgal Liberman */ 200414fd46eSIgal Liberman bool single_pool_mode_enable; 201414fd46eSIgal Liberman /* For each pool, true if it should be considered 202414fd46eSIgal Liberman * for depletion (Note - this pool must be used by this port!) 203414fd46eSIgal Liberman */ 204414fd46eSIgal Liberman bool pools_to_consider_for_single_mode[BM_MAX_NUM_OF_POOLS]; 205414fd46eSIgal Liberman }; 206414fd46eSIgal Liberman 207414fd46eSIgal Liberman /* Enum for inter-module interrupts registration */ 208414fd46eSIgal Liberman enum fman_event_modules { 209414fd46eSIgal Liberman FMAN_MOD_MAC = 0, /* MAC event */ 210414fd46eSIgal Liberman FMAN_MOD_FMAN_CTRL, /* FMAN Controller */ 211414fd46eSIgal Liberman FMAN_MOD_DUMMY_LAST 212414fd46eSIgal Liberman }; 213414fd46eSIgal Liberman 214414fd46eSIgal Liberman /* Enum for interrupts types */ 215414fd46eSIgal Liberman enum fman_intr_type { 216414fd46eSIgal Liberman FMAN_INTR_TYPE_ERR, 217414fd46eSIgal Liberman FMAN_INTR_TYPE_NORMAL 218414fd46eSIgal Liberman }; 219414fd46eSIgal Liberman 220414fd46eSIgal Liberman /* Enum for inter-module interrupts registration */ 221414fd46eSIgal Liberman enum fman_inter_module_event { 222414fd46eSIgal Liberman FMAN_EV_ERR_MAC0 = 0, /* MAC 0 error event */ 223414fd46eSIgal Liberman FMAN_EV_ERR_MAC1, /* MAC 1 error event */ 224414fd46eSIgal Liberman FMAN_EV_ERR_MAC2, /* MAC 2 error event */ 225414fd46eSIgal Liberman FMAN_EV_ERR_MAC3, /* MAC 3 error event */ 226414fd46eSIgal Liberman FMAN_EV_ERR_MAC4, /* MAC 4 error event */ 227414fd46eSIgal Liberman FMAN_EV_ERR_MAC5, /* MAC 5 error event */ 228414fd46eSIgal Liberman FMAN_EV_ERR_MAC6, /* MAC 6 error event */ 229414fd46eSIgal Liberman FMAN_EV_ERR_MAC7, /* MAC 7 error event */ 230414fd46eSIgal Liberman FMAN_EV_ERR_MAC8, /* MAC 8 error event */ 231414fd46eSIgal Liberman FMAN_EV_ERR_MAC9, /* MAC 9 error event */ 232414fd46eSIgal Liberman FMAN_EV_MAC0, /* MAC 0 event (Magic packet detection) */ 233414fd46eSIgal Liberman FMAN_EV_MAC1, /* MAC 1 event (Magic packet detection) */ 234414fd46eSIgal Liberman FMAN_EV_MAC2, /* MAC 2 (Magic packet detection) */ 235414fd46eSIgal Liberman FMAN_EV_MAC3, /* MAC 3 (Magic packet detection) */ 236414fd46eSIgal Liberman FMAN_EV_MAC4, /* MAC 4 (Magic packet detection) */ 237414fd46eSIgal Liberman FMAN_EV_MAC5, /* MAC 5 (Magic packet detection) */ 238414fd46eSIgal Liberman FMAN_EV_MAC6, /* MAC 6 (Magic packet detection) */ 239414fd46eSIgal Liberman FMAN_EV_MAC7, /* MAC 7 (Magic packet detection) */ 240414fd46eSIgal Liberman FMAN_EV_MAC8, /* MAC 8 event (Magic packet detection) */ 241414fd46eSIgal Liberman FMAN_EV_MAC9, /* MAC 9 event (Magic packet detection) */ 242414fd46eSIgal Liberman FMAN_EV_FMAN_CTRL_0, /* Fman controller event 0 */ 243414fd46eSIgal Liberman FMAN_EV_FMAN_CTRL_1, /* Fman controller event 1 */ 244414fd46eSIgal Liberman FMAN_EV_FMAN_CTRL_2, /* Fman controller event 2 */ 245414fd46eSIgal Liberman FMAN_EV_FMAN_CTRL_3, /* Fman controller event 3 */ 246414fd46eSIgal Liberman FMAN_EV_CNT 247414fd46eSIgal Liberman }; 248414fd46eSIgal Liberman 249414fd46eSIgal Liberman struct fman_intr_src { 250414fd46eSIgal Liberman void (*isr_cb)(void *src_arg); 251414fd46eSIgal Liberman void *src_handle; 252414fd46eSIgal Liberman }; 253414fd46eSIgal Liberman 254ca58ce57SMadalin Bucur /** fman_exceptions_cb 255ca58ce57SMadalin Bucur * fman - Pointer to FMan 256ca58ce57SMadalin Bucur * exception - The exception. 257ca58ce57SMadalin Bucur * 258ca58ce57SMadalin Bucur * Exceptions user callback routine, will be called upon an exception 259ca58ce57SMadalin Bucur * passing the exception identification. 260ca58ce57SMadalin Bucur * 261ca58ce57SMadalin Bucur * Return: irq status 262ca58ce57SMadalin Bucur */ 263ca58ce57SMadalin Bucur typedef irqreturn_t (fman_exceptions_cb)(struct fman *fman, 264ca58ce57SMadalin Bucur enum fman_exceptions exception); 265ca58ce57SMadalin Bucur /** fman_bus_error_cb 266ca58ce57SMadalin Bucur * fman - Pointer to FMan 267ca58ce57SMadalin Bucur * port_id - Port id 268ca58ce57SMadalin Bucur * addr - Address that caused the error 269ca58ce57SMadalin Bucur * tnum - Owner of error 270ca58ce57SMadalin Bucur * liodn - Logical IO device number 271ca58ce57SMadalin Bucur * 272ca58ce57SMadalin Bucur * Bus error user callback routine, will be called upon bus error, 273ca58ce57SMadalin Bucur * passing parameters describing the errors and the owner. 274ca58ce57SMadalin Bucur * 275ca58ce57SMadalin Bucur * Return: IRQ status 276ca58ce57SMadalin Bucur */ 277ca58ce57SMadalin Bucur typedef irqreturn_t (fman_bus_error_cb)(struct fman *fman, u8 port_id, 278ca58ce57SMadalin Bucur u64 addr, u8 tnum, u16 liodn); 279ca58ce57SMadalin Bucur 280ca58ce57SMadalin Bucur /* Structure that holds information received from device tree */ 281ca58ce57SMadalin Bucur struct fman_dts_params { 282ca58ce57SMadalin Bucur void __iomem *base_addr; /* FMan virtual address */ 283ca58ce57SMadalin Bucur struct resource *res; /* FMan memory resource */ 284ca58ce57SMadalin Bucur u8 id; /* FMan ID */ 285ca58ce57SMadalin Bucur 286ca58ce57SMadalin Bucur int err_irq; /* FMan Error IRQ */ 287ca58ce57SMadalin Bucur 288ca58ce57SMadalin Bucur u16 clk_freq; /* FMan clock freq (In Mhz) */ 289ca58ce57SMadalin Bucur 290ca58ce57SMadalin Bucur u32 qman_channel_base; /* QMan channels base */ 291ca58ce57SMadalin Bucur u32 num_of_qman_channels; /* Number of QMan channels */ 292ca58ce57SMadalin Bucur 293ca58ce57SMadalin Bucur struct resource muram_res; /* MURAM resource */ 294ca58ce57SMadalin Bucur }; 295ca58ce57SMadalin Bucur 296ca58ce57SMadalin Bucur struct fman { 297ca58ce57SMadalin Bucur struct device *dev; 298ca58ce57SMadalin Bucur void __iomem *base_addr; 299ca58ce57SMadalin Bucur struct fman_intr_src intr_mng[FMAN_EV_CNT]; 300ca58ce57SMadalin Bucur 301ca58ce57SMadalin Bucur struct fman_fpm_regs __iomem *fpm_regs; 302ca58ce57SMadalin Bucur struct fman_bmi_regs __iomem *bmi_regs; 303ca58ce57SMadalin Bucur struct fman_qmi_regs __iomem *qmi_regs; 304ca58ce57SMadalin Bucur struct fman_dma_regs __iomem *dma_regs; 305ca58ce57SMadalin Bucur struct fman_hwp_regs __iomem *hwp_regs; 3067472f4f2SIordache Florinel-R70177 struct fman_kg_regs __iomem *kg_regs; 307ca58ce57SMadalin Bucur fman_exceptions_cb *exception_cb; 308ca58ce57SMadalin Bucur fman_bus_error_cb *bus_error_cb; 309ca58ce57SMadalin Bucur /* Spinlock for FMan use */ 310ca58ce57SMadalin Bucur spinlock_t spinlock; 311ca58ce57SMadalin Bucur struct fman_state_struct *state; 312ca58ce57SMadalin Bucur 313ca58ce57SMadalin Bucur struct fman_cfg *cfg; 314ca58ce57SMadalin Bucur struct muram_info *muram; 3157472f4f2SIordache Florinel-R70177 struct fman_keygen *keygen; 316ca58ce57SMadalin Bucur /* cam section in muram */ 317ca58ce57SMadalin Bucur unsigned long cam_offset; 318ca58ce57SMadalin Bucur size_t cam_size; 319ca58ce57SMadalin Bucur /* Fifo in MURAM */ 320ca58ce57SMadalin Bucur unsigned long fifo_offset; 321ca58ce57SMadalin Bucur size_t fifo_size; 322ca58ce57SMadalin Bucur 323ca58ce57SMadalin Bucur u32 liodn_base[64]; 324ca58ce57SMadalin Bucur u32 liodn_offset[64]; 325ca58ce57SMadalin Bucur 326ca58ce57SMadalin Bucur struct fman_dts_params dts_params; 327ca58ce57SMadalin Bucur }; 328ca58ce57SMadalin Bucur 329414fd46eSIgal Liberman /* Structure for port-FM communication during fman_port_init. */ 330414fd46eSIgal Liberman struct fman_port_init_params { 331414fd46eSIgal Liberman u8 port_id; /* port Id */ 332414fd46eSIgal Liberman enum fman_port_type port_type; /* Port type */ 333414fd46eSIgal Liberman u16 port_speed; /* Port speed */ 334414fd46eSIgal Liberman u16 liodn_offset; /* Port's requested resource */ 335414fd46eSIgal Liberman u8 num_of_tasks; /* Port's requested resource */ 336414fd46eSIgal Liberman u8 num_of_extra_tasks; /* Port's requested resource */ 337414fd46eSIgal Liberman u8 num_of_open_dmas; /* Port's requested resource */ 338414fd46eSIgal Liberman u8 num_of_extra_open_dmas; /* Port's requested resource */ 339414fd46eSIgal Liberman u32 size_of_fifo; /* Port's requested resource */ 340414fd46eSIgal Liberman u32 extra_size_of_fifo; /* Port's requested resource */ 341414fd46eSIgal Liberman u8 deq_pipeline_depth; /* Port's requested resource */ 342414fd46eSIgal Liberman u16 max_frame_length; /* Port's max frame length. */ 343414fd46eSIgal Liberman u16 liodn_base; 344414fd46eSIgal Liberman /* LIODN base for this port, to be used together with LIODN offset. */ 345414fd46eSIgal Liberman }; 346414fd46eSIgal Liberman 347414fd46eSIgal Liberman void fman_get_revision(struct fman *fman, struct fman_rev_info *rev_info); 348414fd46eSIgal Liberman 349414fd46eSIgal Liberman void fman_register_intr(struct fman *fman, enum fman_event_modules mod, 350414fd46eSIgal Liberman u8 mod_id, enum fman_intr_type intr_type, 351414fd46eSIgal Liberman void (*f_isr)(void *h_src_arg), void *h_src_arg); 352414fd46eSIgal Liberman 353414fd46eSIgal Liberman void fman_unregister_intr(struct fman *fman, enum fman_event_modules mod, 354414fd46eSIgal Liberman u8 mod_id, enum fman_intr_type intr_type); 355414fd46eSIgal Liberman 356414fd46eSIgal Liberman int fman_set_port_params(struct fman *fman, 357414fd46eSIgal Liberman struct fman_port_init_params *port_params); 358414fd46eSIgal Liberman 359414fd46eSIgal Liberman int fman_reset_mac(struct fman *fman, u8 mac_id); 360414fd46eSIgal Liberman 361414fd46eSIgal Liberman u16 fman_get_clock_freq(struct fman *fman); 362414fd46eSIgal Liberman 363414fd46eSIgal Liberman u32 fman_get_bmi_max_fifo_size(struct fman *fman); 364414fd46eSIgal Liberman 365414fd46eSIgal Liberman int fman_set_mac_max_frame(struct fman *fman, u8 mac_id, u16 mfl); 366414fd46eSIgal Liberman 367414fd46eSIgal Liberman u32 fman_get_qman_channel_id(struct fman *fman, u32 port_id); 368414fd46eSIgal Liberman 369414fd46eSIgal Liberman struct resource *fman_get_mem_region(struct fman *fman); 370414fd46eSIgal Liberman 371414fd46eSIgal Liberman u16 fman_get_max_frm(void); 372414fd46eSIgal Liberman 373414fd46eSIgal Liberman int fman_get_rx_extra_headroom(void); 374414fd46eSIgal Liberman 375b281f7b9SMadalin Bucur #ifdef CONFIG_DPAA_ERRATUM_A050385 376b281f7b9SMadalin Bucur bool fman_has_errata_a050385(void); 377b281f7b9SMadalin Bucur #endif 378b281f7b9SMadalin Bucur 379414fd46eSIgal Liberman struct fman *fman_bind(struct device *dev); 380414fd46eSIgal Liberman 381414fd46eSIgal Liberman #endif /* __FM_H */ 382