xref: /linux/drivers/net/ethernet/freescale/enetc/enetc_pf_common.c (revision 7f71507851fc7764b36a3221839607d3a45c2025)
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2 /* Copyright 2024 NXP */
3 
4 #include <linux/fsl/enetc_mdio.h>
5 #include <linux/of_mdio.h>
6 #include <linux/of_net.h>
7 
8 #include "enetc_pf_common.h"
9 
10 static void enetc_set_si_hw_addr(struct enetc_pf *pf, int si,
11 				 const u8 *mac_addr)
12 {
13 	struct enetc_hw *hw = &pf->si->hw;
14 
15 	pf->ops->set_si_primary_mac(hw, si, mac_addr);
16 }
17 
18 static void enetc_get_si_hw_addr(struct enetc_pf *pf, int si, u8 *mac_addr)
19 {
20 	struct enetc_hw *hw = &pf->si->hw;
21 
22 	pf->ops->get_si_primary_mac(hw, si, mac_addr);
23 }
24 
25 int enetc_pf_set_mac_addr(struct net_device *ndev, void *addr)
26 {
27 	struct enetc_ndev_priv *priv = netdev_priv(ndev);
28 	struct enetc_pf *pf = enetc_si_priv(priv->si);
29 	struct sockaddr *saddr = addr;
30 
31 	if (!is_valid_ether_addr(saddr->sa_data))
32 		return -EADDRNOTAVAIL;
33 
34 	eth_hw_addr_set(ndev, saddr->sa_data);
35 	enetc_set_si_hw_addr(pf, 0, saddr->sa_data);
36 
37 	return 0;
38 }
39 EXPORT_SYMBOL_GPL(enetc_pf_set_mac_addr);
40 
41 static int enetc_setup_mac_address(struct device_node *np, struct enetc_pf *pf,
42 				   int si)
43 {
44 	struct device *dev = &pf->si->pdev->dev;
45 	u8 mac_addr[ETH_ALEN] = { 0 };
46 	int err;
47 
48 	/* (1) try to get the MAC address from the device tree */
49 	if (np) {
50 		err = of_get_mac_address(np, mac_addr);
51 		if (err == -EPROBE_DEFER)
52 			return err;
53 	}
54 
55 	/* (2) bootloader supplied MAC address */
56 	if (is_zero_ether_addr(mac_addr))
57 		enetc_get_si_hw_addr(pf, si, mac_addr);
58 
59 	/* (3) choose a random one */
60 	if (is_zero_ether_addr(mac_addr)) {
61 		eth_random_addr(mac_addr);
62 		dev_info(dev, "no MAC address specified for SI%d, using %pM\n",
63 			 si, mac_addr);
64 	}
65 
66 	enetc_set_si_hw_addr(pf, si, mac_addr);
67 
68 	return 0;
69 }
70 
71 int enetc_setup_mac_addresses(struct device_node *np, struct enetc_pf *pf)
72 {
73 	int err, i;
74 
75 	/* The PF might take its MAC from the device tree */
76 	err = enetc_setup_mac_address(np, pf, 0);
77 	if (err)
78 		return err;
79 
80 	for (i = 0; i < pf->total_vfs; i++) {
81 		err = enetc_setup_mac_address(NULL, pf, i + 1);
82 		if (err)
83 			return err;
84 	}
85 
86 	return 0;
87 }
88 EXPORT_SYMBOL_GPL(enetc_setup_mac_addresses);
89 
90 void enetc_pf_netdev_setup(struct enetc_si *si, struct net_device *ndev,
91 			   const struct net_device_ops *ndev_ops)
92 {
93 	struct enetc_ndev_priv *priv = netdev_priv(ndev);
94 	struct enetc_pf *pf = enetc_si_priv(si);
95 
96 	SET_NETDEV_DEV(ndev, &si->pdev->dev);
97 	priv->ndev = ndev;
98 	priv->si = si;
99 	priv->dev = &si->pdev->dev;
100 	si->ndev = ndev;
101 
102 	priv->msg_enable = (NETIF_MSG_WOL << 1) - 1;
103 	priv->sysclk_freq = si->drvdata->sysclk_freq;
104 	ndev->netdev_ops = ndev_ops;
105 	enetc_set_ethtool_ops(ndev);
106 	ndev->watchdog_timeo = 5 * HZ;
107 	ndev->max_mtu = ENETC_MAX_MTU;
108 
109 	ndev->hw_features = NETIF_F_SG | NETIF_F_RXCSUM |
110 			    NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
111 			    NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_LOOPBACK |
112 			    NETIF_F_HW_CSUM | NETIF_F_TSO | NETIF_F_TSO6;
113 	ndev->features = NETIF_F_HIGHDMA | NETIF_F_SG | NETIF_F_RXCSUM |
114 			 NETIF_F_HW_VLAN_CTAG_TX |
115 			 NETIF_F_HW_VLAN_CTAG_RX |
116 			 NETIF_F_HW_CSUM | NETIF_F_TSO | NETIF_F_TSO6;
117 	ndev->vlan_features = NETIF_F_SG | NETIF_F_HW_CSUM |
118 			      NETIF_F_TSO | NETIF_F_TSO6;
119 
120 	ndev->priv_flags |= IFF_UNICAST_FLT;
121 
122 	/* TODO: currently, i.MX95 ENETC driver does not support advanced features */
123 	if (!is_enetc_rev1(si)) {
124 		ndev->hw_features &= ~(NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_LOOPBACK);
125 		goto end;
126 	}
127 
128 	if (si->num_rss)
129 		ndev->hw_features |= NETIF_F_RXHASH;
130 
131 	ndev->xdp_features = NETDEV_XDP_ACT_BASIC | NETDEV_XDP_ACT_REDIRECT |
132 			     NETDEV_XDP_ACT_NDO_XMIT | NETDEV_XDP_ACT_RX_SG |
133 			     NETDEV_XDP_ACT_NDO_XMIT_SG;
134 
135 	if (si->hw_features & ENETC_SI_F_PSFP && pf->ops->enable_psfp &&
136 	    !pf->ops->enable_psfp(priv)) {
137 		priv->active_offloads |= ENETC_F_QCI;
138 		ndev->features |= NETIF_F_HW_TC;
139 		ndev->hw_features |= NETIF_F_HW_TC;
140 	}
141 
142 end:
143 	/* pick up primary MAC address from SI */
144 	enetc_load_primary_mac_addr(&si->hw, ndev);
145 }
146 EXPORT_SYMBOL_GPL(enetc_pf_netdev_setup);
147 
148 static int enetc_mdio_probe(struct enetc_pf *pf, struct device_node *np)
149 {
150 	struct device *dev = &pf->si->pdev->dev;
151 	struct enetc_mdio_priv *mdio_priv;
152 	struct mii_bus *bus;
153 	int err;
154 
155 	bus = devm_mdiobus_alloc_size(dev, sizeof(*mdio_priv));
156 	if (!bus)
157 		return -ENOMEM;
158 
159 	bus->name = "Freescale ENETC MDIO Bus";
160 	bus->read = enetc_mdio_read_c22;
161 	bus->write = enetc_mdio_write_c22;
162 	bus->read_c45 = enetc_mdio_read_c45;
163 	bus->write_c45 = enetc_mdio_write_c45;
164 	bus->parent = dev;
165 	mdio_priv = bus->priv;
166 	mdio_priv->hw = &pf->si->hw;
167 	mdio_priv->mdio_base = ENETC_EMDIO_BASE;
168 	snprintf(bus->id, MII_BUS_ID_SIZE, "%s", dev_name(dev));
169 
170 	err = of_mdiobus_register(bus, np);
171 	if (err)
172 		return dev_err_probe(dev, err, "cannot register MDIO bus\n");
173 
174 	pf->mdio = bus;
175 
176 	return 0;
177 }
178 
179 static void enetc_mdio_remove(struct enetc_pf *pf)
180 {
181 	if (pf->mdio)
182 		mdiobus_unregister(pf->mdio);
183 }
184 
185 static int enetc_imdio_create(struct enetc_pf *pf)
186 {
187 	struct device *dev = &pf->si->pdev->dev;
188 	struct enetc_mdio_priv *mdio_priv;
189 	struct phylink_pcs *phylink_pcs;
190 	struct mii_bus *bus;
191 	int err;
192 
193 	if (!pf->ops->create_pcs) {
194 		dev_err(dev, "Creating PCS is not supported\n");
195 
196 		return -EOPNOTSUPP;
197 	}
198 
199 	bus = mdiobus_alloc_size(sizeof(*mdio_priv));
200 	if (!bus)
201 		return -ENOMEM;
202 
203 	bus->name = "Freescale ENETC internal MDIO Bus";
204 	bus->read = enetc_mdio_read_c22;
205 	bus->write = enetc_mdio_write_c22;
206 	bus->read_c45 = enetc_mdio_read_c45;
207 	bus->write_c45 = enetc_mdio_write_c45;
208 	bus->parent = dev;
209 	bus->phy_mask = ~0;
210 	mdio_priv = bus->priv;
211 	mdio_priv->hw = &pf->si->hw;
212 	mdio_priv->mdio_base = ENETC_PM_IMDIO_BASE;
213 	snprintf(bus->id, MII_BUS_ID_SIZE, "%s-imdio", dev_name(dev));
214 
215 	err = mdiobus_register(bus);
216 	if (err) {
217 		dev_err(dev, "cannot register internal MDIO bus (%d)\n", err);
218 		goto free_mdio_bus;
219 	}
220 
221 	phylink_pcs = pf->ops->create_pcs(pf, bus);
222 	if (IS_ERR(phylink_pcs)) {
223 		err = PTR_ERR(phylink_pcs);
224 		dev_err(dev, "cannot create lynx pcs (%d)\n", err);
225 		goto unregister_mdiobus;
226 	}
227 
228 	pf->imdio = bus;
229 	pf->pcs = phylink_pcs;
230 
231 	return 0;
232 
233 unregister_mdiobus:
234 	mdiobus_unregister(bus);
235 free_mdio_bus:
236 	mdiobus_free(bus);
237 	return err;
238 }
239 
240 static void enetc_imdio_remove(struct enetc_pf *pf)
241 {
242 	if (pf->pcs && pf->ops->destroy_pcs)
243 		pf->ops->destroy_pcs(pf->pcs);
244 
245 	if (pf->imdio) {
246 		mdiobus_unregister(pf->imdio);
247 		mdiobus_free(pf->imdio);
248 	}
249 }
250 
251 static bool enetc_port_has_pcs(struct enetc_pf *pf)
252 {
253 	return (pf->if_mode == PHY_INTERFACE_MODE_SGMII ||
254 		pf->if_mode == PHY_INTERFACE_MODE_1000BASEX ||
255 		pf->if_mode == PHY_INTERFACE_MODE_2500BASEX ||
256 		pf->if_mode == PHY_INTERFACE_MODE_USXGMII);
257 }
258 
259 int enetc_mdiobus_create(struct enetc_pf *pf, struct device_node *node)
260 {
261 	struct device_node *mdio_np;
262 	int err;
263 
264 	mdio_np = of_get_child_by_name(node, "mdio");
265 	if (mdio_np) {
266 		err = enetc_mdio_probe(pf, mdio_np);
267 
268 		of_node_put(mdio_np);
269 		if (err)
270 			return err;
271 	}
272 
273 	if (enetc_port_has_pcs(pf)) {
274 		err = enetc_imdio_create(pf);
275 		if (err) {
276 			enetc_mdio_remove(pf);
277 			return err;
278 		}
279 	}
280 
281 	return 0;
282 }
283 EXPORT_SYMBOL_GPL(enetc_mdiobus_create);
284 
285 void enetc_mdiobus_destroy(struct enetc_pf *pf)
286 {
287 	enetc_mdio_remove(pf);
288 	enetc_imdio_remove(pf);
289 }
290 EXPORT_SYMBOL_GPL(enetc_mdiobus_destroy);
291 
292 int enetc_phylink_create(struct enetc_ndev_priv *priv, struct device_node *node,
293 			 const struct phylink_mac_ops *ops)
294 {
295 	struct enetc_pf *pf = enetc_si_priv(priv->si);
296 	struct phylink *phylink;
297 	int err;
298 
299 	pf->phylink_config.dev = &priv->ndev->dev;
300 	pf->phylink_config.type = PHYLINK_NETDEV;
301 	pf->phylink_config.mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
302 		MAC_10 | MAC_100 | MAC_1000 | MAC_2500FD;
303 
304 	__set_bit(PHY_INTERFACE_MODE_INTERNAL,
305 		  pf->phylink_config.supported_interfaces);
306 	__set_bit(PHY_INTERFACE_MODE_SGMII,
307 		  pf->phylink_config.supported_interfaces);
308 	__set_bit(PHY_INTERFACE_MODE_1000BASEX,
309 		  pf->phylink_config.supported_interfaces);
310 	__set_bit(PHY_INTERFACE_MODE_2500BASEX,
311 		  pf->phylink_config.supported_interfaces);
312 	__set_bit(PHY_INTERFACE_MODE_USXGMII,
313 		  pf->phylink_config.supported_interfaces);
314 	phy_interface_set_rgmii(pf->phylink_config.supported_interfaces);
315 
316 	phylink = phylink_create(&pf->phylink_config, of_fwnode_handle(node),
317 				 pf->if_mode, ops);
318 	if (IS_ERR(phylink)) {
319 		err = PTR_ERR(phylink);
320 		return err;
321 	}
322 
323 	priv->phylink = phylink;
324 
325 	return 0;
326 }
327 EXPORT_SYMBOL_GPL(enetc_phylink_create);
328 
329 void enetc_phylink_destroy(struct enetc_ndev_priv *priv)
330 {
331 	phylink_destroy(priv->phylink);
332 }
333 EXPORT_SYMBOL_GPL(enetc_phylink_destroy);
334 
335 MODULE_DESCRIPTION("NXP ENETC PF common functionality driver");
336 MODULE_LICENSE("Dual BSD/GPL");
337