1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2 /* Copyright 2017-2019 NXP */ 3 4 #include <linux/ethtool_netlink.h> 5 #include <linux/net_tstamp.h> 6 #include <linux/module.h> 7 #include "enetc.h" 8 9 static const u32 enetc_si_regs[] = { 10 ENETC_SIMR, ENETC_SIPMAR0, ENETC_SIPMAR1, ENETC_SICBDRMR, 11 ENETC_SICBDRSR, ENETC_SICBDRBAR0, ENETC_SICBDRBAR1, ENETC_SICBDRPIR, 12 ENETC_SICBDRCIR, ENETC_SICBDRLENR, ENETC_SICAPR0, ENETC_SICAPR1, 13 ENETC_SIUEFDCR 14 }; 15 16 static const u32 enetc_txbdr_regs[] = { 17 ENETC_TBMR, ENETC_TBSR, ENETC_TBBAR0, ENETC_TBBAR1, 18 ENETC_TBPIR, ENETC_TBCIR, ENETC_TBLENR, ENETC_TBIER, ENETC_TBICR0, 19 ENETC_TBICR1 20 }; 21 22 static const u32 enetc_rxbdr_regs[] = { 23 ENETC_RBMR, ENETC_RBSR, ENETC_RBBSR, ENETC_RBCIR, ENETC_RBBAR0, 24 ENETC_RBBAR1, ENETC_RBPIR, ENETC_RBLENR, ENETC_RBIER, ENETC_RBICR0, 25 ENETC_RBICR1 26 }; 27 28 static const u32 enetc_port_regs[] = { 29 ENETC_PMR, ENETC_PSR, ENETC_PSIPMR, ENETC_PSIPMAR0(0), 30 ENETC_PSIPMAR1(0), ENETC_PTXMBAR, ENETC_PCAPR0, ENETC_PCAPR1, 31 ENETC_PSICFGR0(0), ENETC_PRFSCAPR, ENETC_PTCMSDUR(0), 32 ENETC_PM0_CMD_CFG, ENETC_PM0_MAXFRM, ENETC_PM0_IF_MODE 33 }; 34 35 static const u32 enetc_port_mm_regs[] = { 36 ENETC_MMCSR, ENETC_PFPMR, ENETC_PTCFPR(0), ENETC_PTCFPR(1), 37 ENETC_PTCFPR(2), ENETC_PTCFPR(3), ENETC_PTCFPR(4), ENETC_PTCFPR(5), 38 ENETC_PTCFPR(6), ENETC_PTCFPR(7), 39 }; 40 41 static int enetc_get_reglen(struct net_device *ndev) 42 { 43 struct enetc_ndev_priv *priv = netdev_priv(ndev); 44 struct enetc_hw *hw = &priv->si->hw; 45 int len; 46 47 len = ARRAY_SIZE(enetc_si_regs); 48 len += ARRAY_SIZE(enetc_txbdr_regs) * priv->num_tx_rings; 49 len += ARRAY_SIZE(enetc_rxbdr_regs) * priv->num_rx_rings; 50 51 if (hw->port) 52 len += ARRAY_SIZE(enetc_port_regs); 53 54 if (hw->port && !!(priv->si->hw_features & ENETC_SI_F_QBU)) 55 len += ARRAY_SIZE(enetc_port_mm_regs); 56 57 len *= sizeof(u32) * 2; /* store 2 entries per reg: addr and value */ 58 59 return len; 60 } 61 62 static void enetc_get_regs(struct net_device *ndev, struct ethtool_regs *regs, 63 void *regbuf) 64 { 65 struct enetc_ndev_priv *priv = netdev_priv(ndev); 66 struct enetc_hw *hw = &priv->si->hw; 67 u32 *buf = (u32 *)regbuf; 68 int i, j; 69 u32 addr; 70 71 for (i = 0; i < ARRAY_SIZE(enetc_si_regs); i++) { 72 *buf++ = enetc_si_regs[i]; 73 *buf++ = enetc_rd(hw, enetc_si_regs[i]); 74 } 75 76 for (i = 0; i < priv->num_tx_rings; i++) { 77 for (j = 0; j < ARRAY_SIZE(enetc_txbdr_regs); j++) { 78 addr = ENETC_BDR(TX, i, enetc_txbdr_regs[j]); 79 80 *buf++ = addr; 81 *buf++ = enetc_rd(hw, addr); 82 } 83 } 84 85 for (i = 0; i < priv->num_rx_rings; i++) { 86 for (j = 0; j < ARRAY_SIZE(enetc_rxbdr_regs); j++) { 87 addr = ENETC_BDR(RX, i, enetc_rxbdr_regs[j]); 88 89 *buf++ = addr; 90 *buf++ = enetc_rd(hw, addr); 91 } 92 } 93 94 if (!hw->port) 95 return; 96 97 for (i = 0; i < ARRAY_SIZE(enetc_port_regs); i++) { 98 addr = ENETC_PORT_BASE + enetc_port_regs[i]; 99 *buf++ = addr; 100 *buf++ = enetc_rd(hw, addr); 101 } 102 103 if (priv->si->hw_features & ENETC_SI_F_QBU) { 104 for (i = 0; i < ARRAY_SIZE(enetc_port_mm_regs); i++) { 105 addr = ENETC_PORT_BASE + enetc_port_mm_regs[i]; 106 *buf++ = addr; 107 *buf++ = enetc_rd(hw, addr); 108 } 109 } 110 } 111 112 static const struct { 113 int reg; 114 char name[ETH_GSTRING_LEN]; 115 } enetc_si_counters[] = { 116 { ENETC_SIROCT, "SI rx octets" }, 117 { ENETC_SIRFRM, "SI rx frames" }, 118 { ENETC_SIRUCA, "SI rx u-cast frames" }, 119 { ENETC_SIRMCA, "SI rx m-cast frames" }, 120 { ENETC_SITOCT, "SI tx octets" }, 121 { ENETC_SITFRM, "SI tx frames" }, 122 { ENETC_SITUCA, "SI tx u-cast frames" }, 123 { ENETC_SITMCA, "SI tx m-cast frames" }, 124 { ENETC_RBDCR(0), "Rx ring 0 discarded frames" }, 125 { ENETC_RBDCR(1), "Rx ring 1 discarded frames" }, 126 { ENETC_RBDCR(2), "Rx ring 2 discarded frames" }, 127 { ENETC_RBDCR(3), "Rx ring 3 discarded frames" }, 128 { ENETC_RBDCR(4), "Rx ring 4 discarded frames" }, 129 { ENETC_RBDCR(5), "Rx ring 5 discarded frames" }, 130 { ENETC_RBDCR(6), "Rx ring 6 discarded frames" }, 131 { ENETC_RBDCR(7), "Rx ring 7 discarded frames" }, 132 { ENETC_RBDCR(8), "Rx ring 8 discarded frames" }, 133 { ENETC_RBDCR(9), "Rx ring 9 discarded frames" }, 134 { ENETC_RBDCR(10), "Rx ring 10 discarded frames" }, 135 { ENETC_RBDCR(11), "Rx ring 11 discarded frames" }, 136 { ENETC_RBDCR(12), "Rx ring 12 discarded frames" }, 137 { ENETC_RBDCR(13), "Rx ring 13 discarded frames" }, 138 { ENETC_RBDCR(14), "Rx ring 14 discarded frames" }, 139 { ENETC_RBDCR(15), "Rx ring 15 discarded frames" }, 140 }; 141 142 static const struct { 143 int reg; 144 char name[ETH_GSTRING_LEN] __nonstring; 145 } enetc_pm_counters[] = { 146 { ENETC_PM_REOCT(0), "MAC rx ethernet octets" }, 147 { ENETC_PM_RALN(0), "MAC rx alignment errors" }, 148 { ENETC_PM_RXPF(0), "MAC rx valid pause frames" }, 149 { ENETC_PM_RFRM(0), "MAC rx valid frames" }, 150 { ENETC_PM_RFCS(0), "MAC rx fcs errors" }, 151 { ENETC_PM_RVLAN(0), "MAC rx VLAN frames" }, 152 { ENETC_PM_RERR(0), "MAC rx frame errors" }, 153 { ENETC_PM_RUCA(0), "MAC rx unicast frames" }, 154 { ENETC_PM_RMCA(0), "MAC rx multicast frames" }, 155 { ENETC_PM_RBCA(0), "MAC rx broadcast frames" }, 156 { ENETC_PM_RDRP(0), "MAC rx dropped packets" }, 157 { ENETC_PM_RPKT(0), "MAC rx packets" }, 158 { ENETC_PM_RUND(0), "MAC rx undersized packets" }, 159 { ENETC_PM_R64(0), "MAC rx 64 byte packets" }, 160 { ENETC_PM_R127(0), "MAC rx 65-127 byte packets" }, 161 { ENETC_PM_R255(0), "MAC rx 128-255 byte packets" }, 162 { ENETC_PM_R511(0), "MAC rx 256-511 byte packets" }, 163 { ENETC_PM_R1023(0), "MAC rx 512-1023 byte packets" }, 164 { ENETC_PM_R1522(0), "MAC rx 1024-1522 byte packets" }, 165 { ENETC_PM_R1523X(0), "MAC rx 1523 to max-octet packets" }, 166 { ENETC_PM_ROVR(0), "MAC rx oversized packets" }, 167 { ENETC_PM_RJBR(0), "MAC rx jabber packets" }, 168 { ENETC_PM_RFRG(0), "MAC rx fragment packets" }, 169 { ENETC_PM_RCNP(0), "MAC rx control packets" }, 170 { ENETC_PM_RDRNTP(0), "MAC rx fifo drop" }, 171 { ENETC_PM_TEOCT(0), "MAC tx ethernet octets" }, 172 { ENETC_PM_TOCT(0), "MAC tx octets" }, 173 { ENETC_PM_TCRSE(0), "MAC tx carrier sense errors" }, 174 { ENETC_PM_TXPF(0), "MAC tx valid pause frames" }, 175 { ENETC_PM_TFRM(0), "MAC tx frames" }, 176 { ENETC_PM_TFCS(0), "MAC tx fcs errors" }, 177 { ENETC_PM_TVLAN(0), "MAC tx VLAN frames" }, 178 { ENETC_PM_TERR(0), "MAC tx frame errors" }, 179 { ENETC_PM_TUCA(0), "MAC tx unicast frames" }, 180 { ENETC_PM_TMCA(0), "MAC tx multicast frames" }, 181 { ENETC_PM_TBCA(0), "MAC tx broadcast frames" }, 182 { ENETC_PM_TPKT(0), "MAC tx packets" }, 183 { ENETC_PM_TUND(0), "MAC tx undersized packets" }, 184 { ENETC_PM_T64(0), "MAC tx 64 byte packets" }, 185 { ENETC_PM_T127(0), "MAC tx 65-127 byte packets" }, 186 { ENETC_PM_T255(0), "MAC tx 128-255 byte packets" }, 187 { ENETC_PM_T511(0), "MAC tx 256-511 byte packets" }, 188 { ENETC_PM_T1023(0), "MAC tx 512-1023 byte packets" }, 189 { ENETC_PM_T1522(0), "MAC tx 1024-1522 byte packets" }, 190 { ENETC_PM_T1523X(0), "MAC tx 1523 to max-octet packets" }, 191 { ENETC_PM_TCNP(0), "MAC tx control packets" }, 192 { ENETC_PM_TDFR(0), "MAC tx deferred packets" }, 193 { ENETC_PM_TMCOL(0), "MAC tx multiple collisions" }, 194 { ENETC_PM_TSCOL(0), "MAC tx single collisions" }, 195 { ENETC_PM_TLCOL(0), "MAC tx late collisions" }, 196 { ENETC_PM_TECOL(0), "MAC tx excessive collisions" }, 197 }; 198 199 static const struct { 200 int reg; 201 char name[ETH_GSTRING_LEN] __nonstring; 202 } enetc_port_counters[] = { 203 { ENETC_UFDMF, "SI MAC nomatch u-cast discards" }, 204 { ENETC_MFDMF, "SI MAC nomatch m-cast discards" }, 205 { ENETC_PBFDSIR, "SI MAC nomatch b-cast discards" }, 206 { ENETC_PUFDVFR, "SI VLAN nomatch u-cast discards" }, 207 { ENETC_PMFDVFR, "SI VLAN nomatch m-cast discards" }, 208 { ENETC_PBFDVFR, "SI VLAN nomatch b-cast discards" }, 209 { ENETC_PFDMSAPR, "SI pruning discarded frames" }, 210 { ENETC_PICDR(0), "ICM DR0 discarded frames" }, 211 { ENETC_PICDR(1), "ICM DR1 discarded frames" }, 212 { ENETC_PICDR(2), "ICM DR2 discarded frames" }, 213 { ENETC_PICDR(3), "ICM DR3 discarded frames" }, 214 }; 215 216 static const char rx_ring_stats[][ETH_GSTRING_LEN] = { 217 "Rx ring %2d frames", 218 "Rx ring %2d alloc errors", 219 "Rx ring %2d XDP drops", 220 "Rx ring %2d recycles", 221 "Rx ring %2d recycle failures", 222 "Rx ring %2d redirects", 223 "Rx ring %2d redirect failures", 224 }; 225 226 static const char tx_ring_stats[][ETH_GSTRING_LEN] = { 227 "Tx ring %2d frames", 228 "Tx ring %2d XDP frames", 229 "Tx ring %2d XDP drops", 230 "Tx window drop %2d frames", 231 }; 232 233 static int enetc_get_sset_count(struct net_device *ndev, int sset) 234 { 235 struct enetc_ndev_priv *priv = netdev_priv(ndev); 236 int len; 237 238 if (sset != ETH_SS_STATS) 239 return -EOPNOTSUPP; 240 241 len = ARRAY_SIZE(enetc_si_counters) + 242 ARRAY_SIZE(tx_ring_stats) * priv->num_tx_rings + 243 ARRAY_SIZE(rx_ring_stats) * priv->num_rx_rings; 244 245 if (!enetc_si_is_pf(priv->si)) 246 return len; 247 248 len += ARRAY_SIZE(enetc_port_counters); 249 len += ARRAY_SIZE(enetc_pm_counters); 250 251 return len; 252 } 253 254 static void enetc_get_strings(struct net_device *ndev, u32 stringset, u8 *data) 255 { 256 struct enetc_ndev_priv *priv = netdev_priv(ndev); 257 int i, j; 258 259 switch (stringset) { 260 case ETH_SS_STATS: 261 for (i = 0; i < ARRAY_SIZE(enetc_si_counters); i++) 262 ethtool_puts(&data, enetc_si_counters[i].name); 263 for (i = 0; i < priv->num_tx_rings; i++) 264 for (j = 0; j < ARRAY_SIZE(tx_ring_stats); j++) 265 ethtool_sprintf(&data, tx_ring_stats[j], i); 266 for (i = 0; i < priv->num_rx_rings; i++) 267 for (j = 0; j < ARRAY_SIZE(rx_ring_stats); j++) 268 ethtool_sprintf(&data, rx_ring_stats[j], i); 269 270 if (!enetc_si_is_pf(priv->si)) 271 break; 272 273 for (i = 0; i < ARRAY_SIZE(enetc_port_counters); i++) 274 ethtool_cpy(&data, enetc_port_counters[i].name); 275 276 for (i = 0; i < ARRAY_SIZE(enetc_pm_counters); i++) 277 ethtool_cpy(&data, enetc_pm_counters[i].name); 278 279 break; 280 } 281 } 282 283 static void enetc_get_ethtool_stats(struct net_device *ndev, 284 struct ethtool_stats *stats, u64 *data) 285 { 286 struct enetc_ndev_priv *priv = netdev_priv(ndev); 287 struct enetc_hw *hw = &priv->si->hw; 288 int i, o = 0; 289 290 for (i = 0; i < ARRAY_SIZE(enetc_si_counters); i++) 291 data[o++] = enetc_rd64(hw, enetc_si_counters[i].reg); 292 293 for (i = 0; i < priv->num_tx_rings; i++) { 294 data[o++] = priv->tx_ring[i]->stats.packets; 295 data[o++] = priv->tx_ring[i]->stats.xdp_tx; 296 data[o++] = priv->tx_ring[i]->stats.xdp_tx_drops; 297 data[o++] = priv->tx_ring[i]->stats.win_drop; 298 } 299 300 for (i = 0; i < priv->num_rx_rings; i++) { 301 data[o++] = priv->rx_ring[i]->stats.packets; 302 data[o++] = priv->rx_ring[i]->stats.rx_alloc_errs; 303 data[o++] = priv->rx_ring[i]->stats.xdp_drops; 304 data[o++] = priv->rx_ring[i]->stats.recycles; 305 data[o++] = priv->rx_ring[i]->stats.recycle_failures; 306 data[o++] = priv->rx_ring[i]->stats.xdp_redirect; 307 data[o++] = priv->rx_ring[i]->stats.xdp_redirect_failures; 308 } 309 310 if (!enetc_si_is_pf(priv->si)) 311 return; 312 313 for (i = 0; i < ARRAY_SIZE(enetc_port_counters); i++) 314 data[o++] = enetc_port_rd(hw, enetc_port_counters[i].reg); 315 316 for (i = 0; i < ARRAY_SIZE(enetc_pm_counters); i++) 317 data[o++] = enetc_port_rd64(hw, enetc_pm_counters[i].reg); 318 } 319 320 static void enetc_pause_stats(struct enetc_hw *hw, int mac, 321 struct ethtool_pause_stats *pause_stats) 322 { 323 pause_stats->tx_pause_frames = enetc_port_rd64(hw, ENETC_PM_TXPF(mac)); 324 pause_stats->rx_pause_frames = enetc_port_rd64(hw, ENETC_PM_RXPF(mac)); 325 } 326 327 static void enetc_get_pause_stats(struct net_device *ndev, 328 struct ethtool_pause_stats *pause_stats) 329 { 330 struct enetc_ndev_priv *priv = netdev_priv(ndev); 331 struct enetc_hw *hw = &priv->si->hw; 332 struct enetc_si *si = priv->si; 333 334 switch (pause_stats->src) { 335 case ETHTOOL_MAC_STATS_SRC_EMAC: 336 enetc_pause_stats(hw, 0, pause_stats); 337 break; 338 case ETHTOOL_MAC_STATS_SRC_PMAC: 339 if (si->hw_features & ENETC_SI_F_QBU) 340 enetc_pause_stats(hw, 1, pause_stats); 341 break; 342 case ETHTOOL_MAC_STATS_SRC_AGGREGATE: 343 ethtool_aggregate_pause_stats(ndev, pause_stats); 344 break; 345 } 346 } 347 348 static void enetc_mac_stats(struct enetc_hw *hw, int mac, 349 struct ethtool_eth_mac_stats *s) 350 { 351 s->FramesTransmittedOK = enetc_port_rd64(hw, ENETC_PM_TFRM(mac)); 352 s->SingleCollisionFrames = enetc_port_rd64(hw, ENETC_PM_TSCOL(mac)); 353 s->MultipleCollisionFrames = enetc_port_rd64(hw, ENETC_PM_TMCOL(mac)); 354 s->FramesReceivedOK = enetc_port_rd64(hw, ENETC_PM_RFRM(mac)); 355 s->FrameCheckSequenceErrors = enetc_port_rd64(hw, ENETC_PM_RFCS(mac)); 356 s->AlignmentErrors = enetc_port_rd64(hw, ENETC_PM_RALN(mac)); 357 s->OctetsTransmittedOK = enetc_port_rd64(hw, ENETC_PM_TEOCT(mac)); 358 s->FramesWithDeferredXmissions = enetc_port_rd64(hw, ENETC_PM_TDFR(mac)); 359 s->LateCollisions = enetc_port_rd64(hw, ENETC_PM_TLCOL(mac)); 360 s->FramesAbortedDueToXSColls = enetc_port_rd64(hw, ENETC_PM_TECOL(mac)); 361 s->FramesLostDueToIntMACXmitError = enetc_port_rd64(hw, ENETC_PM_TERR(mac)); 362 s->CarrierSenseErrors = enetc_port_rd64(hw, ENETC_PM_TCRSE(mac)); 363 s->OctetsReceivedOK = enetc_port_rd64(hw, ENETC_PM_REOCT(mac)); 364 s->FramesLostDueToIntMACRcvError = enetc_port_rd64(hw, ENETC_PM_RDRNTP(mac)); 365 s->MulticastFramesXmittedOK = enetc_port_rd64(hw, ENETC_PM_TMCA(mac)); 366 s->BroadcastFramesXmittedOK = enetc_port_rd64(hw, ENETC_PM_TBCA(mac)); 367 s->MulticastFramesReceivedOK = enetc_port_rd64(hw, ENETC_PM_RMCA(mac)); 368 s->BroadcastFramesReceivedOK = enetc_port_rd64(hw, ENETC_PM_RBCA(mac)); 369 } 370 371 static void enetc_ctrl_stats(struct enetc_hw *hw, int mac, 372 struct ethtool_eth_ctrl_stats *s) 373 { 374 s->MACControlFramesTransmitted = enetc_port_rd64(hw, ENETC_PM_TCNP(mac)); 375 s->MACControlFramesReceived = enetc_port_rd64(hw, ENETC_PM_RCNP(mac)); 376 } 377 378 static const struct ethtool_rmon_hist_range enetc_rmon_ranges[] = { 379 { 64, 64 }, 380 { 65, 127 }, 381 { 128, 255 }, 382 { 256, 511 }, 383 { 512, 1023 }, 384 { 1024, 1522 }, 385 { 1523, ENETC_MAC_MAXFRM_SIZE }, 386 {}, 387 }; 388 389 static void enetc_rmon_stats(struct enetc_hw *hw, int mac, 390 struct ethtool_rmon_stats *s) 391 { 392 s->undersize_pkts = enetc_port_rd64(hw, ENETC_PM_RUND(mac)); 393 s->oversize_pkts = enetc_port_rd64(hw, ENETC_PM_ROVR(mac)); 394 s->fragments = enetc_port_rd64(hw, ENETC_PM_RFRG(mac)); 395 s->jabbers = enetc_port_rd64(hw, ENETC_PM_RJBR(mac)); 396 397 s->hist[0] = enetc_port_rd64(hw, ENETC_PM_R64(mac)); 398 s->hist[1] = enetc_port_rd64(hw, ENETC_PM_R127(mac)); 399 s->hist[2] = enetc_port_rd64(hw, ENETC_PM_R255(mac)); 400 s->hist[3] = enetc_port_rd64(hw, ENETC_PM_R511(mac)); 401 s->hist[4] = enetc_port_rd64(hw, ENETC_PM_R1023(mac)); 402 s->hist[5] = enetc_port_rd64(hw, ENETC_PM_R1522(mac)); 403 s->hist[6] = enetc_port_rd64(hw, ENETC_PM_R1523X(mac)); 404 405 s->hist_tx[0] = enetc_port_rd64(hw, ENETC_PM_T64(mac)); 406 s->hist_tx[1] = enetc_port_rd64(hw, ENETC_PM_T127(mac)); 407 s->hist_tx[2] = enetc_port_rd64(hw, ENETC_PM_T255(mac)); 408 s->hist_tx[3] = enetc_port_rd64(hw, ENETC_PM_T511(mac)); 409 s->hist_tx[4] = enetc_port_rd64(hw, ENETC_PM_T1023(mac)); 410 s->hist_tx[5] = enetc_port_rd64(hw, ENETC_PM_T1522(mac)); 411 s->hist_tx[6] = enetc_port_rd64(hw, ENETC_PM_T1523X(mac)); 412 } 413 414 static void enetc_get_eth_mac_stats(struct net_device *ndev, 415 struct ethtool_eth_mac_stats *mac_stats) 416 { 417 struct enetc_ndev_priv *priv = netdev_priv(ndev); 418 struct enetc_hw *hw = &priv->si->hw; 419 struct enetc_si *si = priv->si; 420 421 switch (mac_stats->src) { 422 case ETHTOOL_MAC_STATS_SRC_EMAC: 423 enetc_mac_stats(hw, 0, mac_stats); 424 break; 425 case ETHTOOL_MAC_STATS_SRC_PMAC: 426 if (si->hw_features & ENETC_SI_F_QBU) 427 enetc_mac_stats(hw, 1, mac_stats); 428 break; 429 case ETHTOOL_MAC_STATS_SRC_AGGREGATE: 430 ethtool_aggregate_mac_stats(ndev, mac_stats); 431 break; 432 } 433 } 434 435 static void enetc_get_eth_ctrl_stats(struct net_device *ndev, 436 struct ethtool_eth_ctrl_stats *ctrl_stats) 437 { 438 struct enetc_ndev_priv *priv = netdev_priv(ndev); 439 struct enetc_hw *hw = &priv->si->hw; 440 struct enetc_si *si = priv->si; 441 442 switch (ctrl_stats->src) { 443 case ETHTOOL_MAC_STATS_SRC_EMAC: 444 enetc_ctrl_stats(hw, 0, ctrl_stats); 445 break; 446 case ETHTOOL_MAC_STATS_SRC_PMAC: 447 if (si->hw_features & ENETC_SI_F_QBU) 448 enetc_ctrl_stats(hw, 1, ctrl_stats); 449 break; 450 case ETHTOOL_MAC_STATS_SRC_AGGREGATE: 451 ethtool_aggregate_ctrl_stats(ndev, ctrl_stats); 452 break; 453 } 454 } 455 456 static void enetc_get_rmon_stats(struct net_device *ndev, 457 struct ethtool_rmon_stats *rmon_stats, 458 const struct ethtool_rmon_hist_range **ranges) 459 { 460 struct enetc_ndev_priv *priv = netdev_priv(ndev); 461 struct enetc_hw *hw = &priv->si->hw; 462 struct enetc_si *si = priv->si; 463 464 *ranges = enetc_rmon_ranges; 465 466 switch (rmon_stats->src) { 467 case ETHTOOL_MAC_STATS_SRC_EMAC: 468 enetc_rmon_stats(hw, 0, rmon_stats); 469 break; 470 case ETHTOOL_MAC_STATS_SRC_PMAC: 471 if (si->hw_features & ENETC_SI_F_QBU) 472 enetc_rmon_stats(hw, 1, rmon_stats); 473 break; 474 case ETHTOOL_MAC_STATS_SRC_AGGREGATE: 475 ethtool_aggregate_rmon_stats(ndev, rmon_stats); 476 break; 477 } 478 } 479 480 #define ENETC_RSSHASH_L3 (RXH_L2DA | RXH_VLAN | RXH_L3_PROTO | RXH_IP_SRC | \ 481 RXH_IP_DST) 482 #define ENETC_RSSHASH_L4 (ENETC_RSSHASH_L3 | RXH_L4_B_0_1 | RXH_L4_B_2_3) 483 static int enetc_get_rxfh_fields(struct net_device *netdev, 484 struct ethtool_rxfh_fields *rxnfc) 485 { 486 static const u32 rsshash[] = { 487 [TCP_V4_FLOW] = ENETC_RSSHASH_L4, 488 [UDP_V4_FLOW] = ENETC_RSSHASH_L4, 489 [SCTP_V4_FLOW] = ENETC_RSSHASH_L4, 490 [AH_ESP_V4_FLOW] = ENETC_RSSHASH_L3, 491 [IPV4_FLOW] = ENETC_RSSHASH_L3, 492 [TCP_V6_FLOW] = ENETC_RSSHASH_L4, 493 [UDP_V6_FLOW] = ENETC_RSSHASH_L4, 494 [SCTP_V6_FLOW] = ENETC_RSSHASH_L4, 495 [AH_ESP_V6_FLOW] = ENETC_RSSHASH_L3, 496 [IPV6_FLOW] = ENETC_RSSHASH_L3, 497 [ETHER_FLOW] = 0, 498 }; 499 500 if (rxnfc->flow_type >= ARRAY_SIZE(rsshash)) 501 return -EINVAL; 502 503 rxnfc->data = rsshash[rxnfc->flow_type]; 504 505 return 0; 506 } 507 508 /* current HW spec does byte reversal on everything including MAC addresses */ 509 static void ether_addr_copy_swap(u8 *dst, const u8 *src) 510 { 511 int i; 512 513 for (i = 0; i < ETH_ALEN; i++) 514 dst[i] = src[ETH_ALEN - i - 1]; 515 } 516 517 static int enetc_set_cls_entry(struct enetc_si *si, 518 struct ethtool_rx_flow_spec *fs, bool en) 519 { 520 struct ethtool_tcpip4_spec *l4ip4_h, *l4ip4_m; 521 struct ethtool_usrip4_spec *l3ip4_h, *l3ip4_m; 522 struct ethhdr *eth_h, *eth_m; 523 struct enetc_cmd_rfse rfse = { {0} }; 524 525 if (!en) 526 goto done; 527 528 switch (fs->flow_type & 0xff) { 529 case TCP_V4_FLOW: 530 l4ip4_h = &fs->h_u.tcp_ip4_spec; 531 l4ip4_m = &fs->m_u.tcp_ip4_spec; 532 goto l4ip4; 533 case UDP_V4_FLOW: 534 l4ip4_h = &fs->h_u.udp_ip4_spec; 535 l4ip4_m = &fs->m_u.udp_ip4_spec; 536 goto l4ip4; 537 case SCTP_V4_FLOW: 538 l4ip4_h = &fs->h_u.sctp_ip4_spec; 539 l4ip4_m = &fs->m_u.sctp_ip4_spec; 540 l4ip4: 541 rfse.sip_h[0] = l4ip4_h->ip4src; 542 rfse.sip_m[0] = l4ip4_m->ip4src; 543 rfse.dip_h[0] = l4ip4_h->ip4dst; 544 rfse.dip_m[0] = l4ip4_m->ip4dst; 545 rfse.sport_h = ntohs(l4ip4_h->psrc); 546 rfse.sport_m = ntohs(l4ip4_m->psrc); 547 rfse.dport_h = ntohs(l4ip4_h->pdst); 548 rfse.dport_m = ntohs(l4ip4_m->pdst); 549 if (l4ip4_m->tos) 550 netdev_warn(si->ndev, "ToS field is not supported and was ignored\n"); 551 rfse.ethtype_h = ETH_P_IP; /* IPv4 */ 552 rfse.ethtype_m = 0xffff; 553 break; 554 case IP_USER_FLOW: 555 l3ip4_h = &fs->h_u.usr_ip4_spec; 556 l3ip4_m = &fs->m_u.usr_ip4_spec; 557 558 rfse.sip_h[0] = l3ip4_h->ip4src; 559 rfse.sip_m[0] = l3ip4_m->ip4src; 560 rfse.dip_h[0] = l3ip4_h->ip4dst; 561 rfse.dip_m[0] = l3ip4_m->ip4dst; 562 if (l3ip4_m->tos) 563 netdev_warn(si->ndev, "ToS field is not supported and was ignored\n"); 564 rfse.ethtype_h = ETH_P_IP; /* IPv4 */ 565 rfse.ethtype_m = 0xffff; 566 break; 567 case ETHER_FLOW: 568 eth_h = &fs->h_u.ether_spec; 569 eth_m = &fs->m_u.ether_spec; 570 571 ether_addr_copy_swap(rfse.smac_h, eth_h->h_source); 572 ether_addr_copy_swap(rfse.smac_m, eth_m->h_source); 573 ether_addr_copy_swap(rfse.dmac_h, eth_h->h_dest); 574 ether_addr_copy_swap(rfse.dmac_m, eth_m->h_dest); 575 rfse.ethtype_h = ntohs(eth_h->h_proto); 576 rfse.ethtype_m = ntohs(eth_m->h_proto); 577 break; 578 default: 579 return -EOPNOTSUPP; 580 } 581 582 rfse.mode |= ENETC_RFSE_EN; 583 if (fs->ring_cookie != RX_CLS_FLOW_DISC) { 584 rfse.mode |= ENETC_RFSE_MODE_BD; 585 rfse.result = fs->ring_cookie; 586 } 587 done: 588 return enetc_set_fs_entry(si, &rfse, fs->location); 589 } 590 591 static int enetc_get_rxnfc(struct net_device *ndev, struct ethtool_rxnfc *rxnfc, 592 u32 *rule_locs) 593 { 594 struct enetc_ndev_priv *priv = netdev_priv(ndev); 595 int i, j; 596 597 switch (rxnfc->cmd) { 598 case ETHTOOL_GRXRINGS: 599 rxnfc->data = priv->num_rx_rings; 600 break; 601 case ETHTOOL_GRXCLSRLCNT: 602 /* total number of entries */ 603 rxnfc->data = priv->si->num_fs_entries; 604 /* number of entries in use */ 605 rxnfc->rule_cnt = 0; 606 for (i = 0; i < priv->si->num_fs_entries; i++) 607 if (priv->cls_rules[i].used) 608 rxnfc->rule_cnt++; 609 break; 610 case ETHTOOL_GRXCLSRULE: 611 if (rxnfc->fs.location >= priv->si->num_fs_entries) 612 return -EINVAL; 613 614 /* get entry x */ 615 rxnfc->fs = priv->cls_rules[rxnfc->fs.location].fs; 616 break; 617 case ETHTOOL_GRXCLSRLALL: 618 /* total number of entries */ 619 rxnfc->data = priv->si->num_fs_entries; 620 /* array of indexes of used entries */ 621 j = 0; 622 for (i = 0; i < priv->si->num_fs_entries; i++) { 623 if (!priv->cls_rules[i].used) 624 continue; 625 if (j == rxnfc->rule_cnt) 626 return -EMSGSIZE; 627 rule_locs[j++] = i; 628 } 629 /* number of entries in use */ 630 rxnfc->rule_cnt = j; 631 break; 632 default: 633 return -EOPNOTSUPP; 634 } 635 636 return 0; 637 } 638 639 /* i.MX95 ENETC does not support RFS table, but we can use ingress port 640 * filter table to implement Wake-on-LAN filter or drop the matched flow, 641 * so the implementation will be different from enetc_get_rxnfc() and 642 * enetc_set_rxnfc(). Therefore, add enetc4_get_rxnfc() for ENETC v4 PF. 643 */ 644 static int enetc4_get_rxnfc(struct net_device *ndev, struct ethtool_rxnfc *rxnfc, 645 u32 *rule_locs) 646 { 647 struct enetc_ndev_priv *priv = netdev_priv(ndev); 648 649 switch (rxnfc->cmd) { 650 case ETHTOOL_GRXRINGS: 651 rxnfc->data = priv->num_rx_rings; 652 break; 653 default: 654 return -EOPNOTSUPP; 655 } 656 657 return 0; 658 } 659 660 static int enetc_set_rxnfc(struct net_device *ndev, struct ethtool_rxnfc *rxnfc) 661 { 662 struct enetc_ndev_priv *priv = netdev_priv(ndev); 663 int err; 664 665 switch (rxnfc->cmd) { 666 case ETHTOOL_SRXCLSRLINS: 667 if (rxnfc->fs.location >= priv->si->num_fs_entries) 668 return -EINVAL; 669 670 if (rxnfc->fs.ring_cookie >= priv->num_rx_rings && 671 rxnfc->fs.ring_cookie != RX_CLS_FLOW_DISC) 672 return -EINVAL; 673 674 err = enetc_set_cls_entry(priv->si, &rxnfc->fs, true); 675 if (err) 676 return err; 677 priv->cls_rules[rxnfc->fs.location].fs = rxnfc->fs; 678 priv->cls_rules[rxnfc->fs.location].used = 1; 679 break; 680 case ETHTOOL_SRXCLSRLDEL: 681 if (rxnfc->fs.location >= priv->si->num_fs_entries) 682 return -EINVAL; 683 684 err = enetc_set_cls_entry(priv->si, &rxnfc->fs, false); 685 if (err) 686 return err; 687 priv->cls_rules[rxnfc->fs.location].used = 0; 688 break; 689 default: 690 return -EOPNOTSUPP; 691 } 692 693 return 0; 694 } 695 696 static u32 enetc_get_rxfh_key_size(struct net_device *ndev) 697 { 698 struct enetc_ndev_priv *priv = netdev_priv(ndev); 699 700 /* return the size of the RX flow hash key. PF only */ 701 return (priv->si->hw.port) ? ENETC_RSSHASH_KEY_SIZE : 0; 702 } 703 704 static u32 enetc_get_rxfh_indir_size(struct net_device *ndev) 705 { 706 struct enetc_ndev_priv *priv = netdev_priv(ndev); 707 708 /* return the size of the RX flow hash indirection table */ 709 return priv->si->num_rss; 710 } 711 712 static int enetc_get_rss_key_base(struct enetc_si *si) 713 { 714 if (is_enetc_rev1(si)) 715 return ENETC_PRSSK(0); 716 717 return ENETC4_PRSSKR(0); 718 } 719 720 static void enetc_get_rss_key(struct enetc_si *si, const u8 *key) 721 { 722 int base = enetc_get_rss_key_base(si); 723 struct enetc_hw *hw = &si->hw; 724 int i; 725 726 for (i = 0; i < ENETC_RSSHASH_KEY_SIZE / 4; i++) 727 ((u32 *)key)[i] = enetc_port_rd(hw, base + i * 4); 728 } 729 730 static int enetc_get_rxfh(struct net_device *ndev, 731 struct ethtool_rxfh_param *rxfh) 732 { 733 struct enetc_ndev_priv *priv = netdev_priv(ndev); 734 struct enetc_si *si = priv->si; 735 int err = 0; 736 737 /* return hash function */ 738 rxfh->hfunc = ETH_RSS_HASH_TOP; 739 740 /* return hash key */ 741 if (rxfh->key && enetc_si_is_pf(si)) 742 enetc_get_rss_key(si, rxfh->key); 743 744 /* return RSS table */ 745 if (rxfh->indir) 746 err = si->ops->get_rss_table(si, rxfh->indir, si->num_rss); 747 748 return err; 749 } 750 751 void enetc_set_rss_key(struct enetc_si *si, const u8 *bytes) 752 { 753 int base = enetc_get_rss_key_base(si); 754 struct enetc_hw *hw = &si->hw; 755 int i; 756 757 for (i = 0; i < ENETC_RSSHASH_KEY_SIZE / 4; i++) 758 enetc_port_wr(hw, base + i * 4, ((u32 *)bytes)[i]); 759 } 760 EXPORT_SYMBOL_GPL(enetc_set_rss_key); 761 762 static int enetc_set_rxfh(struct net_device *ndev, 763 struct ethtool_rxfh_param *rxfh, 764 struct netlink_ext_ack *extack) 765 { 766 struct enetc_ndev_priv *priv = netdev_priv(ndev); 767 struct enetc_si *si = priv->si; 768 int err = 0; 769 770 /* set hash key, if PF */ 771 if (rxfh->key && enetc_si_is_pf(si)) 772 enetc_set_rss_key(si, rxfh->key); 773 774 /* set RSS table */ 775 if (rxfh->indir) 776 err = si->ops->set_rss_table(si, rxfh->indir, si->num_rss); 777 778 return err; 779 } 780 781 static void enetc_get_ringparam(struct net_device *ndev, 782 struct ethtool_ringparam *ring, 783 struct kernel_ethtool_ringparam *kernel_ring, 784 struct netlink_ext_ack *extack) 785 { 786 struct enetc_ndev_priv *priv = netdev_priv(ndev); 787 788 ring->rx_pending = priv->rx_bd_count; 789 ring->tx_pending = priv->tx_bd_count; 790 791 /* do some h/w sanity checks for BDR length */ 792 if (netif_running(ndev)) { 793 struct enetc_hw *hw = &priv->si->hw; 794 u32 val = enetc_rxbdr_rd(hw, 0, ENETC_RBLENR); 795 796 if (val != priv->rx_bd_count) 797 netif_err(priv, hw, ndev, "RxBDR[RBLENR] = %d!\n", val); 798 799 val = enetc_txbdr_rd(hw, 0, ENETC_TBLENR); 800 801 if (val != priv->tx_bd_count) 802 netif_err(priv, hw, ndev, "TxBDR[TBLENR] = %d!\n", val); 803 } 804 } 805 806 static int enetc_get_coalesce(struct net_device *ndev, 807 struct ethtool_coalesce *ic, 808 struct kernel_ethtool_coalesce *kernel_coal, 809 struct netlink_ext_ack *extack) 810 { 811 struct enetc_ndev_priv *priv = netdev_priv(ndev); 812 struct enetc_int_vector *v = priv->int_vector[0]; 813 u64 clk_freq = priv->sysclk_freq; 814 815 ic->tx_coalesce_usecs = enetc_cycles_to_usecs(priv->tx_ictt, clk_freq); 816 ic->rx_coalesce_usecs = enetc_cycles_to_usecs(v->rx_ictt, clk_freq); 817 818 ic->tx_max_coalesced_frames = ENETC_TXIC_PKTTHR; 819 ic->rx_max_coalesced_frames = ENETC_RXIC_PKTTHR; 820 821 ic->use_adaptive_rx_coalesce = priv->ic_mode & ENETC_IC_RX_ADAPTIVE; 822 823 return 0; 824 } 825 826 static int enetc_set_coalesce(struct net_device *ndev, 827 struct ethtool_coalesce *ic, 828 struct kernel_ethtool_coalesce *kernel_coal, 829 struct netlink_ext_ack *extack) 830 { 831 struct enetc_ndev_priv *priv = netdev_priv(ndev); 832 u64 clk_freq = priv->sysclk_freq; 833 u32 rx_ictt, tx_ictt; 834 int i, ic_mode; 835 bool changed; 836 837 tx_ictt = enetc_usecs_to_cycles(ic->tx_coalesce_usecs, clk_freq); 838 rx_ictt = enetc_usecs_to_cycles(ic->rx_coalesce_usecs, clk_freq); 839 840 if (ic->rx_max_coalesced_frames != ENETC_RXIC_PKTTHR) 841 return -EOPNOTSUPP; 842 843 if (ic->tx_max_coalesced_frames != ENETC_TXIC_PKTTHR) 844 return -EOPNOTSUPP; 845 846 ic_mode = ENETC_IC_NONE; 847 if (ic->use_adaptive_rx_coalesce) { 848 ic_mode |= ENETC_IC_RX_ADAPTIVE; 849 rx_ictt = 0x1; 850 } else { 851 ic_mode |= rx_ictt ? ENETC_IC_RX_MANUAL : 0; 852 } 853 854 ic_mode |= tx_ictt ? ENETC_IC_TX_MANUAL : 0; 855 856 /* commit the settings */ 857 changed = (ic_mode != priv->ic_mode) || (priv->tx_ictt != tx_ictt); 858 859 priv->ic_mode = ic_mode; 860 priv->tx_ictt = tx_ictt; 861 862 for (i = 0; i < priv->bdr_int_num; i++) { 863 struct enetc_int_vector *v = priv->int_vector[i]; 864 865 v->rx_ictt = rx_ictt; 866 v->rx_dim_en = !!(ic_mode & ENETC_IC_RX_ADAPTIVE); 867 } 868 869 if (netif_running(ndev) && changed) { 870 /* reconfigure the operation mode of h/w interrupts, 871 * traffic needs to be paused in the process 872 */ 873 enetc_stop(ndev); 874 enetc_start(ndev); 875 } 876 877 return 0; 878 } 879 880 static int enetc_get_ts_info(struct net_device *ndev, 881 struct kernel_ethtool_ts_info *info) 882 { 883 struct enetc_ndev_priv *priv = netdev_priv(ndev); 884 int *phc_idx; 885 886 phc_idx = symbol_get(enetc_phc_index); 887 if (phc_idx) { 888 info->phc_index = *phc_idx; 889 symbol_put(enetc_phc_index); 890 } 891 892 if (!IS_ENABLED(CONFIG_FSL_ENETC_PTP_CLOCK)) { 893 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE; 894 895 return 0; 896 } 897 898 info->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE | 899 SOF_TIMESTAMPING_RX_HARDWARE | 900 SOF_TIMESTAMPING_RAW_HARDWARE | 901 SOF_TIMESTAMPING_TX_SOFTWARE; 902 903 info->tx_types = (1 << HWTSTAMP_TX_OFF) | 904 (1 << HWTSTAMP_TX_ON); 905 906 if (enetc_si_is_pf(priv->si)) 907 info->tx_types |= (1 << HWTSTAMP_TX_ONESTEP_SYNC); 908 909 info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) | 910 (1 << HWTSTAMP_FILTER_ALL); 911 912 return 0; 913 } 914 915 static void enetc_get_wol(struct net_device *dev, 916 struct ethtool_wolinfo *wol) 917 { 918 wol->supported = 0; 919 wol->wolopts = 0; 920 921 if (dev->phydev) 922 phy_ethtool_get_wol(dev->phydev, wol); 923 } 924 925 static int enetc_set_wol(struct net_device *dev, 926 struct ethtool_wolinfo *wol) 927 { 928 int ret; 929 930 if (!dev->phydev) 931 return -EOPNOTSUPP; 932 933 ret = phy_ethtool_set_wol(dev->phydev, wol); 934 if (!ret) 935 device_set_wakeup_enable(&dev->dev, wol->wolopts); 936 937 return ret; 938 } 939 940 static void enetc_get_pauseparam(struct net_device *dev, 941 struct ethtool_pauseparam *pause) 942 { 943 struct enetc_ndev_priv *priv = netdev_priv(dev); 944 945 phylink_ethtool_get_pauseparam(priv->phylink, pause); 946 } 947 948 static int enetc_set_pauseparam(struct net_device *dev, 949 struct ethtool_pauseparam *pause) 950 { 951 struct enetc_ndev_priv *priv = netdev_priv(dev); 952 953 return phylink_ethtool_set_pauseparam(priv->phylink, pause); 954 } 955 956 static int enetc_get_link_ksettings(struct net_device *dev, 957 struct ethtool_link_ksettings *cmd) 958 { 959 struct enetc_ndev_priv *priv = netdev_priv(dev); 960 961 if (!priv->phylink) 962 return -EOPNOTSUPP; 963 964 return phylink_ethtool_ksettings_get(priv->phylink, cmd); 965 } 966 967 static int enetc_set_link_ksettings(struct net_device *dev, 968 const struct ethtool_link_ksettings *cmd) 969 { 970 struct enetc_ndev_priv *priv = netdev_priv(dev); 971 972 if (!priv->phylink) 973 return -EOPNOTSUPP; 974 975 return phylink_ethtool_ksettings_set(priv->phylink, cmd); 976 } 977 978 static void enetc_get_mm_stats(struct net_device *ndev, 979 struct ethtool_mm_stats *s) 980 { 981 struct enetc_ndev_priv *priv = netdev_priv(ndev); 982 struct enetc_hw *hw = &priv->si->hw; 983 struct enetc_si *si = priv->si; 984 985 if (!(si->hw_features & ENETC_SI_F_QBU)) 986 return; 987 988 s->MACMergeFrameAssErrorCount = enetc_port_rd(hw, ENETC_MMFAECR); 989 s->MACMergeFrameSmdErrorCount = enetc_port_rd(hw, ENETC_MMFSECR); 990 s->MACMergeFrameAssOkCount = enetc_port_rd(hw, ENETC_MMFAOCR); 991 s->MACMergeFragCountRx = enetc_port_rd(hw, ENETC_MMFCRXR); 992 s->MACMergeFragCountTx = enetc_port_rd(hw, ENETC_MMFCTXR); 993 s->MACMergeHoldCount = enetc_port_rd(hw, ENETC_MMHCR); 994 } 995 996 static int enetc_get_mm(struct net_device *ndev, struct ethtool_mm_state *state) 997 { 998 struct enetc_ndev_priv *priv = netdev_priv(ndev); 999 struct enetc_si *si = priv->si; 1000 struct enetc_hw *hw = &si->hw; 1001 u32 lafs, rafs, val; 1002 1003 if (!(si->hw_features & ENETC_SI_F_QBU)) 1004 return -EOPNOTSUPP; 1005 1006 mutex_lock(&priv->mm_lock); 1007 1008 val = enetc_port_rd(hw, ENETC_PFPMR); 1009 state->pmac_enabled = !!(val & ENETC_PFPMR_PMACE); 1010 1011 val = enetc_port_rd(hw, ENETC_MMCSR); 1012 1013 switch (ENETC_MMCSR_GET_VSTS(val)) { 1014 case 0: 1015 state->verify_status = ETHTOOL_MM_VERIFY_STATUS_DISABLED; 1016 break; 1017 case 2: 1018 state->verify_status = ETHTOOL_MM_VERIFY_STATUS_VERIFYING; 1019 break; 1020 case 3: 1021 state->verify_status = ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED; 1022 break; 1023 case 4: 1024 state->verify_status = ETHTOOL_MM_VERIFY_STATUS_FAILED; 1025 break; 1026 case 5: 1027 default: 1028 state->verify_status = ETHTOOL_MM_VERIFY_STATUS_UNKNOWN; 1029 break; 1030 } 1031 1032 rafs = ENETC_MMCSR_GET_RAFS(val); 1033 state->tx_min_frag_size = ethtool_mm_frag_size_add_to_min(rafs); 1034 lafs = ENETC_MMCSR_GET_LAFS(val); 1035 state->rx_min_frag_size = ethtool_mm_frag_size_add_to_min(lafs); 1036 state->tx_enabled = !!(val & ENETC_MMCSR_LPE); /* mirror of MMCSR_ME */ 1037 state->tx_active = state->tx_enabled && 1038 (state->verify_status == ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED || 1039 state->verify_status == ETHTOOL_MM_VERIFY_STATUS_DISABLED); 1040 state->verify_enabled = !(val & ENETC_MMCSR_VDIS); 1041 state->verify_time = ENETC_MMCSR_GET_VT(val); 1042 /* A verifyTime of 128 ms would exceed the 7 bit width 1043 * of the ENETC_MMCSR_VT field 1044 */ 1045 state->max_verify_time = 127; 1046 1047 mutex_unlock(&priv->mm_lock); 1048 1049 return 0; 1050 } 1051 1052 static int enetc_mm_wait_tx_active(struct enetc_hw *hw, int verify_time) 1053 { 1054 int timeout = verify_time * USEC_PER_MSEC * ENETC_MM_VERIFY_RETRIES; 1055 u32 val; 1056 1057 /* This will time out after the standard value of 3 verification 1058 * attempts. To not sleep forever, it relies on a non-zero verify_time, 1059 * guarantee which is provided by the ethtool nlattr policy. 1060 */ 1061 return read_poll_timeout(enetc_port_rd, val, 1062 ENETC_MMCSR_GET_VSTS(val) == 3, 1063 ENETC_MM_VERIFY_SLEEP_US, timeout, 1064 true, hw, ENETC_MMCSR); 1065 } 1066 1067 static void enetc_set_ptcfpr(struct enetc_hw *hw, u8 preemptible_tcs) 1068 { 1069 u32 val; 1070 int tc; 1071 1072 for (tc = 0; tc < 8; tc++) { 1073 val = enetc_port_rd(hw, ENETC_PTCFPR(tc)); 1074 1075 if (preemptible_tcs & BIT(tc)) 1076 val |= ENETC_PTCFPR_FPE; 1077 else 1078 val &= ~ENETC_PTCFPR_FPE; 1079 1080 enetc_port_wr(hw, ENETC_PTCFPR(tc), val); 1081 } 1082 } 1083 1084 /* ENETC does not have an IRQ to notify changes to the MAC Merge TX status 1085 * (active/inactive), but the preemptible traffic classes should only be 1086 * committed to hardware once TX is active. Resort to polling. 1087 */ 1088 void enetc_mm_commit_preemptible_tcs(struct enetc_ndev_priv *priv) 1089 { 1090 struct enetc_hw *hw = &priv->si->hw; 1091 u8 preemptible_tcs = 0; 1092 u32 val; 1093 int err; 1094 1095 val = enetc_port_rd(hw, ENETC_MMCSR); 1096 if (!(val & ENETC_MMCSR_ME)) 1097 goto out; 1098 1099 if (!(val & ENETC_MMCSR_VDIS)) { 1100 err = enetc_mm_wait_tx_active(hw, ENETC_MMCSR_GET_VT(val)); 1101 if (err) 1102 goto out; 1103 } 1104 1105 preemptible_tcs = priv->preemptible_tcs; 1106 out: 1107 enetc_set_ptcfpr(hw, preemptible_tcs); 1108 } 1109 1110 /* FIXME: Workaround for the link partner's verification failing if ENETC 1111 * priorly received too much express traffic. The documentation doesn't 1112 * suggest this is needed. 1113 */ 1114 static void enetc_restart_emac_rx(struct enetc_si *si) 1115 { 1116 u32 val = enetc_port_rd(&si->hw, ENETC_PM0_CMD_CFG); 1117 1118 enetc_port_wr(&si->hw, ENETC_PM0_CMD_CFG, val & ~ENETC_PM0_RX_EN); 1119 1120 if (val & ENETC_PM0_RX_EN) 1121 enetc_port_wr(&si->hw, ENETC_PM0_CMD_CFG, val); 1122 } 1123 1124 static int enetc_set_mm(struct net_device *ndev, struct ethtool_mm_cfg *cfg, 1125 struct netlink_ext_ack *extack) 1126 { 1127 struct enetc_ndev_priv *priv = netdev_priv(ndev); 1128 struct enetc_hw *hw = &priv->si->hw; 1129 struct enetc_si *si = priv->si; 1130 u32 val, add_frag_size; 1131 int err; 1132 1133 if (!(si->hw_features & ENETC_SI_F_QBU)) 1134 return -EOPNOTSUPP; 1135 1136 err = ethtool_mm_frag_size_min_to_add(cfg->tx_min_frag_size, 1137 &add_frag_size, extack); 1138 if (err) 1139 return err; 1140 1141 mutex_lock(&priv->mm_lock); 1142 1143 val = enetc_port_rd(hw, ENETC_PFPMR); 1144 if (cfg->pmac_enabled) 1145 val |= ENETC_PFPMR_PMACE; 1146 else 1147 val &= ~ENETC_PFPMR_PMACE; 1148 enetc_port_wr(hw, ENETC_PFPMR, val); 1149 1150 val = enetc_port_rd(hw, ENETC_MMCSR); 1151 1152 if (cfg->verify_enabled) 1153 val &= ~ENETC_MMCSR_VDIS; 1154 else 1155 val |= ENETC_MMCSR_VDIS; 1156 1157 if (cfg->tx_enabled) 1158 priv->active_offloads |= ENETC_F_QBU; 1159 else 1160 priv->active_offloads &= ~ENETC_F_QBU; 1161 1162 /* If link is up, enable/disable MAC Merge right away */ 1163 if (!(val & ENETC_MMCSR_LINK_FAIL)) { 1164 if (!!(priv->active_offloads & ENETC_F_QBU)) 1165 val |= ENETC_MMCSR_ME; 1166 else 1167 val &= ~ENETC_MMCSR_ME; 1168 } 1169 1170 val &= ~ENETC_MMCSR_VT_MASK; 1171 val |= ENETC_MMCSR_VT(cfg->verify_time); 1172 1173 val &= ~ENETC_MMCSR_RAFS_MASK; 1174 val |= ENETC_MMCSR_RAFS(add_frag_size); 1175 1176 enetc_port_wr(hw, ENETC_MMCSR, val); 1177 1178 enetc_restart_emac_rx(priv->si); 1179 1180 enetc_mm_commit_preemptible_tcs(priv); 1181 1182 mutex_unlock(&priv->mm_lock); 1183 1184 return 0; 1185 } 1186 1187 /* When the link is lost, the verification state machine goes to the FAILED 1188 * state and doesn't restart on its own after a new link up event. 1189 * According to 802.3 Figure 99-8 - Verify state diagram, the LINK_FAIL bit 1190 * should have been sufficient to re-trigger verification, but for ENETC it 1191 * doesn't. As a workaround, we need to toggle the Merge Enable bit to 1192 * re-trigger verification when link comes up. 1193 */ 1194 void enetc_mm_link_state_update(struct enetc_ndev_priv *priv, bool link) 1195 { 1196 struct enetc_hw *hw = &priv->si->hw; 1197 u32 val; 1198 1199 mutex_lock(&priv->mm_lock); 1200 1201 val = enetc_port_rd(hw, ENETC_MMCSR); 1202 1203 if (link) { 1204 val &= ~ENETC_MMCSR_LINK_FAIL; 1205 if (priv->active_offloads & ENETC_F_QBU) 1206 val |= ENETC_MMCSR_ME; 1207 } else { 1208 val |= ENETC_MMCSR_LINK_FAIL; 1209 if (priv->active_offloads & ENETC_F_QBU) 1210 val &= ~ENETC_MMCSR_ME; 1211 } 1212 1213 enetc_port_wr(hw, ENETC_MMCSR, val); 1214 1215 enetc_mm_commit_preemptible_tcs(priv); 1216 1217 mutex_unlock(&priv->mm_lock); 1218 } 1219 EXPORT_SYMBOL_GPL(enetc_mm_link_state_update); 1220 1221 const struct ethtool_ops enetc_pf_ethtool_ops = { 1222 .supported_coalesce_params = ETHTOOL_COALESCE_USECS | 1223 ETHTOOL_COALESCE_MAX_FRAMES | 1224 ETHTOOL_COALESCE_USE_ADAPTIVE_RX, 1225 .get_regs_len = enetc_get_reglen, 1226 .get_regs = enetc_get_regs, 1227 .get_sset_count = enetc_get_sset_count, 1228 .get_strings = enetc_get_strings, 1229 .get_ethtool_stats = enetc_get_ethtool_stats, 1230 .get_pause_stats = enetc_get_pause_stats, 1231 .get_rmon_stats = enetc_get_rmon_stats, 1232 .get_eth_ctrl_stats = enetc_get_eth_ctrl_stats, 1233 .get_eth_mac_stats = enetc_get_eth_mac_stats, 1234 .get_rxnfc = enetc_get_rxnfc, 1235 .set_rxnfc = enetc_set_rxnfc, 1236 .get_rxfh_key_size = enetc_get_rxfh_key_size, 1237 .get_rxfh_indir_size = enetc_get_rxfh_indir_size, 1238 .get_rxfh = enetc_get_rxfh, 1239 .set_rxfh = enetc_set_rxfh, 1240 .get_rxfh_fields = enetc_get_rxfh_fields, 1241 .get_ringparam = enetc_get_ringparam, 1242 .get_coalesce = enetc_get_coalesce, 1243 .set_coalesce = enetc_set_coalesce, 1244 .get_link_ksettings = enetc_get_link_ksettings, 1245 .set_link_ksettings = enetc_set_link_ksettings, 1246 .get_link = ethtool_op_get_link, 1247 .get_ts_info = enetc_get_ts_info, 1248 .get_wol = enetc_get_wol, 1249 .set_wol = enetc_set_wol, 1250 .get_pauseparam = enetc_get_pauseparam, 1251 .set_pauseparam = enetc_set_pauseparam, 1252 .get_mm = enetc_get_mm, 1253 .set_mm = enetc_set_mm, 1254 .get_mm_stats = enetc_get_mm_stats, 1255 }; 1256 1257 const struct ethtool_ops enetc_vf_ethtool_ops = { 1258 .supported_coalesce_params = ETHTOOL_COALESCE_USECS | 1259 ETHTOOL_COALESCE_MAX_FRAMES | 1260 ETHTOOL_COALESCE_USE_ADAPTIVE_RX, 1261 .get_regs_len = enetc_get_reglen, 1262 .get_regs = enetc_get_regs, 1263 .get_sset_count = enetc_get_sset_count, 1264 .get_strings = enetc_get_strings, 1265 .get_ethtool_stats = enetc_get_ethtool_stats, 1266 .get_rxnfc = enetc_get_rxnfc, 1267 .set_rxnfc = enetc_set_rxnfc, 1268 .get_rxfh_indir_size = enetc_get_rxfh_indir_size, 1269 .get_rxfh = enetc_get_rxfh, 1270 .set_rxfh = enetc_set_rxfh, 1271 .get_rxfh_fields = enetc_get_rxfh_fields, 1272 .get_ringparam = enetc_get_ringparam, 1273 .get_coalesce = enetc_get_coalesce, 1274 .set_coalesce = enetc_set_coalesce, 1275 .get_link = ethtool_op_get_link, 1276 .get_ts_info = enetc_get_ts_info, 1277 }; 1278 1279 const struct ethtool_ops enetc4_pf_ethtool_ops = { 1280 .supported_coalesce_params = ETHTOOL_COALESCE_USECS | 1281 ETHTOOL_COALESCE_MAX_FRAMES | 1282 ETHTOOL_COALESCE_USE_ADAPTIVE_RX, 1283 .get_ringparam = enetc_get_ringparam, 1284 .get_coalesce = enetc_get_coalesce, 1285 .set_coalesce = enetc_set_coalesce, 1286 .get_link_ksettings = enetc_get_link_ksettings, 1287 .set_link_ksettings = enetc_set_link_ksettings, 1288 .get_link = ethtool_op_get_link, 1289 .get_wol = enetc_get_wol, 1290 .set_wol = enetc_set_wol, 1291 .get_pauseparam = enetc_get_pauseparam, 1292 .set_pauseparam = enetc_set_pauseparam, 1293 .get_rxnfc = enetc4_get_rxnfc, 1294 .get_rxfh_key_size = enetc_get_rxfh_key_size, 1295 .get_rxfh_indir_size = enetc_get_rxfh_indir_size, 1296 .get_rxfh = enetc_get_rxfh, 1297 .set_rxfh = enetc_set_rxfh, 1298 .get_rxfh_fields = enetc_get_rxfh_fields, 1299 }; 1300 1301 void enetc_set_ethtool_ops(struct net_device *ndev) 1302 { 1303 struct enetc_ndev_priv *priv = netdev_priv(ndev); 1304 1305 ndev->ethtool_ops = priv->si->drvdata->eth_ops; 1306 } 1307 EXPORT_SYMBOL_GPL(enetc_set_ethtool_ops); 1308