xref: /linux/drivers/net/ethernet/freescale/enetc/enetc.h (revision 8a5f956a9fb7d74fff681145082acfad5afa6bb8)
1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2 /* Copyright 2017-2019 NXP */
3 
4 #include <linux/timer.h>
5 #include <linux/pci.h>
6 #include <linux/netdevice.h>
7 #include <linux/etherdevice.h>
8 #include <linux/dma-mapping.h>
9 #include <linux/skbuff.h>
10 #include <linux/ethtool.h>
11 #include <linux/fsl/ntmp.h>
12 #include <linux/if_vlan.h>
13 #include <linux/phylink.h>
14 #include <linux/dim.h>
15 #include <net/xdp.h>
16 
17 #include "enetc_hw.h"
18 #include "enetc4_hw.h"
19 
20 #define ENETC_MAC_MAXFRM_SIZE	9600
21 #define ENETC_MAX_MTU		(ENETC_MAC_MAXFRM_SIZE - \
22 				(ETH_FCS_LEN + ETH_HLEN + VLAN_HLEN))
23 
24 #define ENETC_CBD_DATA_MEM_ALIGN 64
25 
26 #define ENETC_MADDR_HASH_TBL_SZ	64
27 
28 enum enetc_mac_addr_type {UC, MC, MADDR_TYPE};
29 
30 struct enetc_mac_filter {
31 	union {
32 		char mac_addr[ETH_ALEN];
33 		DECLARE_BITMAP(mac_hash_table, ENETC_MADDR_HASH_TBL_SZ);
34 	};
35 	int mac_addr_cnt;
36 };
37 
38 struct enetc_tx_swbd {
39 	union {
40 		struct sk_buff *skb;
41 		struct xdp_frame *xdp_frame;
42 	};
43 	dma_addr_t dma;
44 	struct page *page;	/* valid only if is_xdp_tx */
45 	u16 page_offset;	/* valid only if is_xdp_tx */
46 	u16 len;
47 	enum dma_data_direction dir;
48 	u8 is_dma_page:1;
49 	u8 check_wb:1;
50 	u8 do_twostep_tstamp:1;
51 	u8 is_eof:1;
52 	u8 is_xdp_tx:1;
53 	u8 is_xdp_redirect:1;
54 	u8 qbv_en:1;
55 };
56 
57 struct enetc_skb_cb {
58 	u8 flag;
59 	bool udp;
60 	u16 correction_off;
61 	u16 origin_tstamp_off;
62 };
63 
64 #define ENETC_SKB_CB(skb) ((struct enetc_skb_cb *)((skb)->cb))
65 
66 struct enetc_lso_t {
67 	bool	ipv6;
68 	bool	tcp;
69 	u8	l3_hdr_len;
70 	u8	hdr_len; /* LSO header length */
71 	u8	l3_start;
72 	u16	lso_seg_size;
73 	int	total_len; /* total data length, not include LSO header */
74 };
75 
76 #define ENETC_LSO_MAX_DATA_LEN		SZ_256K
77 
78 #define ENETC_RX_MAXFRM_SIZE	ENETC_MAC_MAXFRM_SIZE
79 #define ENETC_RXB_TRUESIZE	2048 /* PAGE_SIZE >> 1 */
80 #define ENETC_RXB_PAD		NET_SKB_PAD /* add extra space if needed */
81 #define ENETC_RXB_DMA_SIZE	\
82 	(SKB_WITH_OVERHEAD(ENETC_RXB_TRUESIZE) - ENETC_RXB_PAD)
83 #define ENETC_RXB_DMA_SIZE_XDP	\
84 	(SKB_WITH_OVERHEAD(ENETC_RXB_TRUESIZE) - XDP_PACKET_HEADROOM)
85 
86 struct enetc_rx_swbd {
87 	dma_addr_t dma;
88 	struct page *page;
89 	u16 page_offset;
90 	enum dma_data_direction dir;
91 	u16 len;
92 };
93 
94 /* ENETC overhead: optional extension BD + 1 BD gap */
95 #define ENETC_TXBDS_NEEDED(val)	((val) + 2)
96 /* For LS1028A, max # of chained Tx BDs is 15, including head and
97  * extension BD.
98  */
99 #define ENETC_MAX_SKB_FRAGS	13
100 /* For ENETC v4 and later versions, max # of chained Tx BDs is 63,
101  * including head and extension BD, but the range of MAX_SKB_FRAGS
102  * is 17 ~ 45, so set ENETC4_MAX_SKB_FRAGS to MAX_SKB_FRAGS.
103  */
104 #define ENETC4_MAX_SKB_FRAGS		MAX_SKB_FRAGS
105 #define ENETC_TXBDS_MAX_NEEDED(x)	ENETC_TXBDS_NEEDED((x) + 1)
106 
107 struct enetc_ring_stats {
108 	unsigned long packets;
109 	unsigned long bytes;
110 	unsigned long rx_alloc_errs;
111 	unsigned long xdp_drops;
112 	unsigned long xdp_tx;
113 	unsigned long xdp_tx_drops;
114 	unsigned long xdp_redirect;
115 	unsigned long xdp_redirect_failures;
116 	unsigned long recycles;
117 	unsigned long recycle_failures;
118 	unsigned long win_drop;
119 };
120 
121 struct enetc_xdp_data {
122 	struct xdp_rxq_info rxq;
123 	struct bpf_prog *prog;
124 	int xdp_tx_in_flight;
125 };
126 
127 #define ENETC_RX_RING_DEFAULT_SIZE	2048
128 #define ENETC_TX_RING_DEFAULT_SIZE	2048
129 #define ENETC_DEFAULT_TX_WORK		(ENETC_TX_RING_DEFAULT_SIZE / 2)
130 
131 struct enetc_bdr_resource {
132 	/* Input arguments saved for teardown */
133 	struct device *dev; /* for DMA mapping */
134 	size_t bd_count;
135 	size_t bd_size;
136 
137 	/* Resource proper */
138 	void *bd_base; /* points to Rx or Tx BD ring */
139 	dma_addr_t bd_dma_base;
140 	union {
141 		struct enetc_tx_swbd *tx_swbd;
142 		struct enetc_rx_swbd *rx_swbd;
143 	};
144 	char *tso_headers;
145 	dma_addr_t tso_headers_dma;
146 };
147 
148 struct enetc_bdr {
149 	struct device *dev; /* for DMA mapping */
150 	struct net_device *ndev;
151 	void *bd_base; /* points to Rx or Tx BD ring */
152 	union {
153 		void __iomem *tpir;
154 		void __iomem *rcir;
155 	};
156 	u16 index;
157 	u16 prio;
158 	int bd_count; /* # of BDs */
159 	int next_to_use;
160 	int next_to_clean;
161 	union {
162 		struct enetc_tx_swbd *tx_swbd;
163 		struct enetc_rx_swbd *rx_swbd;
164 	};
165 	union {
166 		void __iomem *tcir; /* Tx */
167 		int next_to_alloc; /* Rx */
168 	};
169 	void __iomem *idr; /* Interrupt Detect Register pointer */
170 
171 	int buffer_offset;
172 	struct enetc_xdp_data xdp;
173 
174 	struct enetc_ring_stats stats;
175 
176 	dma_addr_t bd_dma_base;
177 	u8 tsd_enable; /* Time specific departure */
178 	bool ext_en; /* enable h/w descriptor extensions */
179 
180 	/* DMA buffer for TSO headers */
181 	char *tso_headers;
182 	dma_addr_t tso_headers_dma;
183 } ____cacheline_aligned_in_smp;
184 
185 static inline void enetc_bdr_idx_inc(struct enetc_bdr *bdr, int *i)
186 {
187 	if (unlikely(++*i == bdr->bd_count))
188 		*i = 0;
189 }
190 
191 static inline int enetc_bd_unused(struct enetc_bdr *bdr)
192 {
193 	if (bdr->next_to_clean > bdr->next_to_use)
194 		return bdr->next_to_clean - bdr->next_to_use - 1;
195 
196 	return bdr->bd_count + bdr->next_to_clean - bdr->next_to_use - 1;
197 }
198 
199 static inline int enetc_swbd_unused(struct enetc_bdr *bdr)
200 {
201 	if (bdr->next_to_clean > bdr->next_to_alloc)
202 		return bdr->next_to_clean - bdr->next_to_alloc - 1;
203 
204 	return bdr->bd_count + bdr->next_to_clean - bdr->next_to_alloc - 1;
205 }
206 
207 /* Control BD ring */
208 #define ENETC_CBDR_DEFAULT_SIZE	64
209 struct enetc_cbdr {
210 	void *bd_base; /* points to Rx or Tx BD ring */
211 	void __iomem *pir;
212 	void __iomem *cir;
213 	void __iomem *mr; /* mode register */
214 
215 	int bd_count; /* # of BDs */
216 	int next_to_use;
217 	int next_to_clean;
218 
219 	dma_addr_t bd_dma_base;
220 	struct device *dma_dev;
221 };
222 
223 #define ENETC_TXBD(BDR, i) (&(((union enetc_tx_bd *)((BDR).bd_base))[i]))
224 
225 static inline union enetc_rx_bd *enetc_rxbd(struct enetc_bdr *rx_ring, int i)
226 {
227 	int hw_idx = i;
228 
229 	if (rx_ring->ext_en)
230 		hw_idx = 2 * i;
231 
232 	return &(((union enetc_rx_bd *)rx_ring->bd_base)[hw_idx]);
233 }
234 
235 static inline void enetc_rxbd_next(struct enetc_bdr *rx_ring,
236 				   union enetc_rx_bd **old_rxbd, int *old_index)
237 {
238 	union enetc_rx_bd *new_rxbd = *old_rxbd;
239 	int new_index = *old_index;
240 
241 	new_rxbd++;
242 
243 	if (rx_ring->ext_en)
244 		new_rxbd++;
245 
246 	if (unlikely(++new_index == rx_ring->bd_count)) {
247 		new_rxbd = rx_ring->bd_base;
248 		new_index = 0;
249 	}
250 
251 	*old_rxbd = new_rxbd;
252 	*old_index = new_index;
253 }
254 
255 static inline union enetc_rx_bd *enetc_rxbd_ext(union enetc_rx_bd *rxbd)
256 {
257 	return ++rxbd;
258 }
259 
260 struct enetc_msg_swbd {
261 	void *vaddr;
262 	dma_addr_t dma;
263 	int size;
264 };
265 
266 #define ENETC_REV1	0x1
267 enum enetc_errata {
268 	ENETC_ERR_VLAN_ISOL	= BIT(0),
269 	ENETC_ERR_UCMCSWP	= BIT(1),
270 };
271 
272 #define ENETC_SI_F_PSFP BIT(0)
273 #define ENETC_SI_F_QBV  BIT(1)
274 #define ENETC_SI_F_QBU  BIT(2)
275 #define ENETC_SI_F_LSO	BIT(3)
276 
277 struct enetc_drvdata {
278 	u32 pmac_offset; /* Only valid for PSI which supports 802.1Qbu */
279 	u8 tx_csum:1;
280 	u8 max_frags;
281 	u64 sysclk_freq;
282 	const struct ethtool_ops *eth_ops;
283 };
284 
285 struct enetc_platform_info {
286 	u16 revision;
287 	u16 dev_id;
288 	const struct enetc_drvdata *data;
289 };
290 
291 struct enetc_si;
292 
293 /*
294  * This structure defines the some common hooks for ENETC PSI and VSI.
295  * In addition, since VSI only uses the struct enetc_si as its private
296  * driver data, so this structure also define some hooks specifically
297  * for VSI. For VSI-specific hooks, the format is ‘vf_*()’.
298  */
299 struct enetc_si_ops {
300 	int (*get_rss_table)(struct enetc_si *si, u32 *table, int count);
301 	int (*set_rss_table)(struct enetc_si *si, const u32 *table, int count);
302 };
303 
304 /* PCI IEP device data */
305 struct enetc_si {
306 	struct pci_dev *pdev;
307 	struct enetc_hw hw;
308 	enum enetc_errata errata;
309 
310 	struct net_device *ndev; /* back ref. */
311 
312 	union {
313 		struct enetc_cbdr cbd_ring; /* Only ENETC 1.0 */
314 		struct ntmp_user ntmp_user; /* ENETC 4.1 and later */
315 	};
316 
317 	int num_rx_rings; /* how many rings are available in the SI */
318 	int num_tx_rings;
319 	int num_fs_entries;
320 	int num_rss; /* number of RSS buckets */
321 	unsigned short pad;
322 	u16 revision;
323 	int hw_features;
324 	const struct enetc_drvdata *drvdata;
325 	const struct enetc_si_ops *ops;
326 
327 	struct workqueue_struct *workqueue;
328 	struct work_struct rx_mode_task;
329 	struct dentry *debugfs_root;
330 };
331 
332 #define ENETC_SI_ALIGN	32
333 
334 static inline bool is_enetc_rev1(struct enetc_si *si)
335 {
336 	return si->pdev->revision == ENETC_REV1;
337 }
338 
339 static inline void *enetc_si_priv(const struct enetc_si *si)
340 {
341 	return (char *)si + ALIGN(sizeof(struct enetc_si), ENETC_SI_ALIGN);
342 }
343 
344 static inline bool enetc_si_is_pf(struct enetc_si *si)
345 {
346 	return !!(si->hw.port);
347 }
348 
349 static inline int enetc_pf_to_port(struct pci_dev *pf_pdev)
350 {
351 	switch (pf_pdev->devfn) {
352 	case 0:
353 		return 0;
354 	case 1:
355 		return 1;
356 	case 2:
357 		return 2;
358 	case 6:
359 		return 3;
360 	default:
361 		return -1;
362 	}
363 }
364 
365 #define ENETC_MAX_NUM_TXQS	8
366 #define ENETC_INT_NAME_MAX	(IFNAMSIZ + 8)
367 
368 struct enetc_int_vector {
369 	void __iomem *rbier;
370 	void __iomem *tbier_base;
371 	void __iomem *ricr1;
372 	unsigned long tx_rings_map;
373 	int count_tx_rings;
374 	u32 rx_ictt;
375 	u16 comp_cnt;
376 	bool rx_dim_en, rx_napi_work;
377 	struct napi_struct napi ____cacheline_aligned_in_smp;
378 	struct dim rx_dim ____cacheline_aligned_in_smp;
379 	char name[ENETC_INT_NAME_MAX];
380 
381 	struct enetc_bdr rx_ring;
382 	struct enetc_bdr tx_ring[] __counted_by(count_tx_rings);
383 } ____cacheline_aligned_in_smp;
384 
385 struct enetc_cls_rule {
386 	struct ethtool_rx_flow_spec fs;
387 	int used;
388 };
389 
390 #define ENETC_MAX_BDR_INT	6 /* fixed to max # of available cpus */
391 struct psfp_cap {
392 	u32 max_streamid;
393 	u32 max_psfp_filter;
394 	u32 max_psfp_gate;
395 	u32 max_psfp_gatelist;
396 	u32 max_psfp_meter;
397 };
398 
399 #define ENETC_F_TX_TSTAMP_MASK	0xff
400 enum enetc_active_offloads {
401 	/* 8 bits reserved for TX timestamp types (hwtstamp_tx_types) */
402 	ENETC_F_TX_TSTAMP		= BIT(0),
403 	ENETC_F_TX_ONESTEP_SYNC_TSTAMP	= BIT(1),
404 
405 	ENETC_F_RX_TSTAMP		= BIT(8),
406 	ENETC_F_QBV			= BIT(9),
407 	ENETC_F_QCI			= BIT(10),
408 	ENETC_F_QBU			= BIT(11),
409 	ENETC_F_TXCSUM			= BIT(12),
410 	ENETC_F_LSO			= BIT(13),
411 };
412 
413 enum enetc_flags_bit {
414 	ENETC_TX_ONESTEP_TSTAMP_IN_PROGRESS = 0,
415 	ENETC_TX_DOWN,
416 };
417 
418 /* interrupt coalescing modes */
419 enum enetc_ic_mode {
420 	/* one interrupt per frame */
421 	ENETC_IC_NONE = 0,
422 	/* activated when int coalescing time is set to a non-0 value */
423 	ENETC_IC_RX_MANUAL = BIT(0),
424 	ENETC_IC_TX_MANUAL = BIT(1),
425 	/* use dynamic interrupt moderation */
426 	ENETC_IC_RX_ADAPTIVE = BIT(2),
427 };
428 
429 #define ENETC_RXIC_PKTTHR	min_t(u32, 256, ENETC_RX_RING_DEFAULT_SIZE / 2)
430 #define ENETC_TXIC_PKTTHR	min_t(u32, 128, ENETC_TX_RING_DEFAULT_SIZE / 2)
431 
432 struct enetc_ndev_priv {
433 	struct net_device *ndev;
434 	struct device *dev; /* dma-mapping device */
435 	struct enetc_si *si;
436 
437 	int bdr_int_num; /* number of Rx/Tx ring interrupts */
438 	struct enetc_int_vector *int_vector[ENETC_MAX_BDR_INT];
439 	u16 num_rx_rings, num_tx_rings;
440 	u16 rx_bd_count, tx_bd_count;
441 
442 	u16 msg_enable;
443 
444 	u8 preemptible_tcs;
445 	u8 max_frags; /* The maximum number of BDs for fragments */
446 
447 	enum enetc_active_offloads active_offloads;
448 
449 	u32 speed; /* store speed for compare update pspeed */
450 
451 	struct enetc_bdr **xdp_tx_ring;
452 	struct enetc_bdr *tx_ring[16];
453 	struct enetc_bdr *rx_ring[16];
454 	const struct enetc_bdr_resource *tx_res;
455 	const struct enetc_bdr_resource *rx_res;
456 
457 	struct enetc_cls_rule *cls_rules;
458 
459 	struct psfp_cap psfp_cap;
460 
461 	/* Minimum number of TX queues required by the network stack */
462 	unsigned int min_num_stack_tx_queues;
463 
464 	struct phylink *phylink;
465 	int ic_mode;
466 	u32 tx_ictt;
467 
468 	struct bpf_prog *xdp_prog;
469 
470 	unsigned long flags;
471 
472 	struct work_struct	tx_onestep_tstamp;
473 	struct sk_buff_head	tx_skbs;
474 
475 	/* Serialize access to MAC Merge state between ethtool requests
476 	 * and link state updates
477 	 */
478 	struct mutex		mm_lock;
479 
480 	struct clk *ref_clk; /* RGMII/RMII reference clock */
481 	u64 sysclk_freq; /* NETC system clock frequency */
482 };
483 
484 /* Messaging */
485 
486 /* VF-PF set primary MAC address message format */
487 struct enetc_msg_cmd_set_primary_mac {
488 	struct enetc_msg_cmd_header header;
489 	struct sockaddr mac;
490 };
491 
492 #define ENETC_CBD(R, i)	(&(((struct enetc_cbd *)((R).bd_base))[i]))
493 
494 #define ENETC_CBDR_TIMEOUT	1000 /* usecs */
495 
496 /* SI common */
497 u32 enetc_port_mac_rd(struct enetc_si *si, u32 reg);
498 void enetc_port_mac_wr(struct enetc_si *si, u32 reg, u32 val);
499 int enetc_pci_probe(struct pci_dev *pdev, const char *name, int sizeof_priv);
500 void enetc_pci_remove(struct pci_dev *pdev);
501 int enetc_alloc_msix(struct enetc_ndev_priv *priv);
502 void enetc_free_msix(struct enetc_ndev_priv *priv);
503 void enetc_get_si_caps(struct enetc_si *si);
504 void enetc_init_si_rings_params(struct enetc_ndev_priv *priv);
505 int enetc_alloc_si_resources(struct enetc_ndev_priv *priv);
506 void enetc_free_si_resources(struct enetc_ndev_priv *priv);
507 int enetc_configure_si(struct enetc_ndev_priv *priv);
508 int enetc_get_driver_data(struct enetc_si *si);
509 void enetc_add_mac_addr_ht_filter(struct enetc_mac_filter *filter,
510 				  const unsigned char *addr);
511 void enetc_reset_mac_addr_filter(struct enetc_mac_filter *filter);
512 
513 int enetc_open(struct net_device *ndev);
514 int enetc_close(struct net_device *ndev);
515 void enetc_start(struct net_device *ndev);
516 void enetc_stop(struct net_device *ndev);
517 netdev_tx_t enetc_xmit(struct sk_buff *skb, struct net_device *ndev);
518 struct net_device_stats *enetc_get_stats(struct net_device *ndev);
519 void enetc_set_features(struct net_device *ndev, netdev_features_t features);
520 int enetc_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd);
521 int enetc_setup_tc_mqprio(struct net_device *ndev, void *type_data);
522 void enetc_reset_tc_mqprio(struct net_device *ndev);
523 int enetc_setup_bpf(struct net_device *ndev, struct netdev_bpf *bpf);
524 int enetc_xdp_xmit(struct net_device *ndev, int num_frames,
525 		   struct xdp_frame **frames, u32 flags);
526 
527 int enetc_hwtstamp_get(struct net_device *ndev,
528 		       struct kernel_hwtstamp_config *config);
529 int enetc_hwtstamp_set(struct net_device *ndev,
530 		       struct kernel_hwtstamp_config *config,
531 		       struct netlink_ext_ack *extack);
532 
533 /* ethtool */
534 extern const struct ethtool_ops enetc_pf_ethtool_ops;
535 extern const struct ethtool_ops enetc4_pf_ethtool_ops;
536 extern const struct ethtool_ops enetc_vf_ethtool_ops;
537 void enetc_set_ethtool_ops(struct net_device *ndev);
538 void enetc_mm_link_state_update(struct enetc_ndev_priv *priv, bool link);
539 void enetc_mm_commit_preemptible_tcs(struct enetc_ndev_priv *priv);
540 
541 /* control buffer descriptor ring (CBDR) */
542 int enetc_setup_cbdr(struct device *dev, struct enetc_hw *hw, int bd_count,
543 		     struct enetc_cbdr *cbdr);
544 void enetc_teardown_cbdr(struct enetc_cbdr *cbdr);
545 int enetc4_setup_cbdr(struct enetc_si *si);
546 void enetc4_teardown_cbdr(struct enetc_si *si);
547 int enetc_set_mac_flt_entry(struct enetc_si *si, int index,
548 			    char *mac_addr, int si_map);
549 int enetc_clear_mac_flt_entry(struct enetc_si *si, int index);
550 int enetc_set_fs_entry(struct enetc_si *si, struct enetc_cmd_rfse *rfse,
551 		       int index);
552 void enetc_set_rss_key(struct enetc_si *si, const u8 *bytes);
553 int enetc_get_rss_table(struct enetc_si *si, u32 *table, int count);
554 int enetc_set_rss_table(struct enetc_si *si, const u32 *table, int count);
555 int enetc_send_cmd(struct enetc_si *si, struct enetc_cbd *cbd);
556 int enetc4_get_rss_table(struct enetc_si *si, u32 *table, int count);
557 int enetc4_set_rss_table(struct enetc_si *si, const u32 *table, int count);
558 
559 static inline void *enetc_cbd_alloc_data_mem(struct enetc_si *si,
560 					     struct enetc_cbd *cbd,
561 					     int size, dma_addr_t *dma,
562 					     void **data_align)
563 {
564 	struct enetc_cbdr *ring = &si->cbd_ring;
565 	dma_addr_t dma_align;
566 	void *data;
567 
568 	data = dma_alloc_coherent(ring->dma_dev,
569 				  size + ENETC_CBD_DATA_MEM_ALIGN,
570 				  dma, GFP_KERNEL);
571 	if (!data) {
572 		dev_err(ring->dma_dev, "CBD alloc data memory failed!\n");
573 		return NULL;
574 	}
575 
576 	dma_align = ALIGN(*dma, ENETC_CBD_DATA_MEM_ALIGN);
577 	*data_align = PTR_ALIGN(data, ENETC_CBD_DATA_MEM_ALIGN);
578 
579 	cbd->addr[0] = cpu_to_le32(lower_32_bits(dma_align));
580 	cbd->addr[1] = cpu_to_le32(upper_32_bits(dma_align));
581 	cbd->length = cpu_to_le16(size);
582 
583 	return data;
584 }
585 
586 static inline void enetc_cbd_free_data_mem(struct enetc_si *si, int size,
587 					   void *data, dma_addr_t *dma)
588 {
589 	struct enetc_cbdr *ring = &si->cbd_ring;
590 
591 	dma_free_coherent(ring->dma_dev, size + ENETC_CBD_DATA_MEM_ALIGN,
592 			  data, *dma);
593 }
594 
595 void enetc_reset_ptcmsdur(struct enetc_hw *hw);
596 void enetc_set_ptcmsdur(struct enetc_hw *hw, u32 *queue_max_sdu);
597 
598 static inline bool enetc_ptp_clock_is_enabled(struct enetc_si *si)
599 {
600 	if (is_enetc_rev1(si))
601 		return IS_ENABLED(CONFIG_FSL_ENETC_PTP_CLOCK);
602 
603 	return IS_ENABLED(CONFIG_PTP_NETC_V4_TIMER);
604 }
605 
606 #ifdef CONFIG_FSL_ENETC_QOS
607 int enetc_qos_query_caps(struct net_device *ndev, void *type_data);
608 int enetc_setup_tc_taprio(struct net_device *ndev, void *type_data);
609 void enetc_sched_speed_set(struct enetc_ndev_priv *priv, int speed);
610 int enetc_setup_tc_cbs(struct net_device *ndev, void *type_data);
611 int enetc_setup_tc_txtime(struct net_device *ndev, void *type_data);
612 int enetc_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
613 			    void *cb_priv);
614 int enetc_setup_tc_psfp(struct net_device *ndev, void *type_data);
615 int enetc_psfp_init(struct enetc_ndev_priv *priv);
616 int enetc_psfp_clean(struct enetc_ndev_priv *priv);
617 int enetc_set_psfp(struct net_device *ndev, bool en);
618 
619 static inline void enetc_get_max_cap(struct enetc_ndev_priv *priv)
620 {
621 	struct enetc_hw *hw = &priv->si->hw;
622 	u32 reg;
623 
624 	reg = enetc_port_rd(hw, ENETC_PSIDCAPR);
625 	priv->psfp_cap.max_streamid = reg & ENETC_PSIDCAPR_MSK;
626 	/* Port stream filter capability */
627 	reg = enetc_port_rd(hw, ENETC_PSFCAPR);
628 	priv->psfp_cap.max_psfp_filter = reg & ENETC_PSFCAPR_MSK;
629 	/* Port stream gate capability */
630 	reg = enetc_port_rd(hw, ENETC_PSGCAPR);
631 	priv->psfp_cap.max_psfp_gate = (reg & ENETC_PSGCAPR_SGIT_MSK);
632 	priv->psfp_cap.max_psfp_gatelist = (reg & ENETC_PSGCAPR_GCL_MSK) >> 16;
633 	/* Port flow meter capability */
634 	reg = enetc_port_rd(hw, ENETC_PFMCAPR);
635 	priv->psfp_cap.max_psfp_meter = reg & ENETC_PFMCAPR_MSK;
636 }
637 
638 static inline int enetc_psfp_enable(struct enetc_ndev_priv *priv)
639 {
640 	struct enetc_hw *hw = &priv->si->hw;
641 	int err;
642 
643 	enetc_get_max_cap(priv);
644 
645 	err = enetc_psfp_init(priv);
646 	if (err)
647 		return err;
648 
649 	enetc_wr(hw, ENETC_PPSFPMR, enetc_rd(hw, ENETC_PPSFPMR) |
650 		 ENETC_PPSFPMR_PSFPEN | ENETC_PPSFPMR_VS |
651 		 ENETC_PPSFPMR_PVC | ENETC_PPSFPMR_PVZC);
652 
653 	return 0;
654 }
655 
656 static inline int enetc_psfp_disable(struct enetc_ndev_priv *priv)
657 {
658 	struct enetc_hw *hw = &priv->si->hw;
659 	int err;
660 
661 	err = enetc_psfp_clean(priv);
662 	if (err)
663 		return err;
664 
665 	enetc_wr(hw, ENETC_PPSFPMR, enetc_rd(hw, ENETC_PPSFPMR) &
666 		 ~ENETC_PPSFPMR_PSFPEN & ~ENETC_PPSFPMR_VS &
667 		 ~ENETC_PPSFPMR_PVC & ~ENETC_PPSFPMR_PVZC);
668 
669 	memset(&priv->psfp_cap, 0, sizeof(struct psfp_cap));
670 
671 	return 0;
672 }
673 
674 #else
675 #define enetc_qos_query_caps(ndev, type_data) -EOPNOTSUPP
676 #define enetc_setup_tc_taprio(ndev, type_data) -EOPNOTSUPP
677 #define enetc_sched_speed_set(priv, speed) (void)0
678 #define enetc_setup_tc_cbs(ndev, type_data) -EOPNOTSUPP
679 #define enetc_setup_tc_txtime(ndev, type_data) -EOPNOTSUPP
680 #define enetc_setup_tc_psfp(ndev, type_data) -EOPNOTSUPP
681 #define enetc_setup_tc_block_cb NULL
682 
683 #define enetc_get_max_cap(p)		\
684 	memset(&((p)->psfp_cap), 0, sizeof(struct psfp_cap))
685 
686 static inline int enetc_psfp_enable(struct enetc_ndev_priv *priv)
687 {
688 	return 0;
689 }
690 
691 static inline int enetc_psfp_disable(struct enetc_ndev_priv *priv)
692 {
693 	return 0;
694 }
695 
696 static inline int enetc_set_psfp(struct net_device *ndev, bool en)
697 {
698 	return 0;
699 }
700 #endif
701